2 * Maxim MAX77620 Regulator driver
4 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
6 * Author: Mallikarjun Kasoju <mkasoju@nvidia.com>
7 * Laxman Dewangan <ldewangan@nvidia.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms and conditions of the GNU General Public License,
11 * version 2, as published by the Free Software Foundation.
14 #include <linux/init.h>
15 #include <linux/mfd/max77620.h>
16 #include <linux/module.h>
18 #include <linux/platform_device.h>
19 #include <linux/regmap.h>
20 #include <linux/regulator/driver.h>
21 #include <linux/regulator/machine.h>
22 #include <linux/regulator/of_regulator.h>
24 #define max77620_rails(_name) "max77620-"#_name
27 #define MAX77620_POWER_MODE_NORMAL 3
28 #define MAX77620_POWER_MODE_LPM 2
29 #define MAX77620_POWER_MODE_GLPM 1
30 #define MAX77620_POWER_MODE_DISABLE 0
33 #define MAX77620_SD_SR_13_75 0
34 #define MAX77620_SD_SR_27_5 1
35 #define MAX77620_SD_SR_55 2
36 #define MAX77620_SD_SR_100 3
38 enum max77620_regulators {
39 MAX77620_REGULATOR_ID_SD0,
40 MAX77620_REGULATOR_ID_SD1,
41 MAX77620_REGULATOR_ID_SD2,
42 MAX77620_REGULATOR_ID_SD3,
43 MAX77620_REGULATOR_ID_SD4,
44 MAX77620_REGULATOR_ID_LDO0,
45 MAX77620_REGULATOR_ID_LDO1,
46 MAX77620_REGULATOR_ID_LDO2,
47 MAX77620_REGULATOR_ID_LDO3,
48 MAX77620_REGULATOR_ID_LDO4,
49 MAX77620_REGULATOR_ID_LDO5,
50 MAX77620_REGULATOR_ID_LDO6,
51 MAX77620_REGULATOR_ID_LDO7,
52 MAX77620_REGULATOR_ID_LDO8,
57 enum max77620_regulator_type {
58 MAX77620_REGULATOR_TYPE_SD,
59 MAX77620_REGULATOR_TYPE_LDO_N,
60 MAX77620_REGULATOR_TYPE_LDO_P,
63 struct max77620_regulator_info {
72 struct regulator_desc desc;
75 struct max77620_regulator_pdata {
76 struct regulator_init_data *reg_idata;
78 int active_fps_pd_slot;
79 int active_fps_pu_slot;
81 int suspend_fps_pd_slot;
82 int suspend_fps_pu_slot;
84 int ramp_rate_setting;
87 struct max77620_regulator {
90 struct max77620_regulator_info *rinfo[MAX77620_NUM_REGS];
91 struct max77620_regulator_pdata reg_pdata[MAX77620_NUM_REGS];
92 int enable_power_mode[MAX77620_NUM_REGS];
93 int current_power_mode[MAX77620_NUM_REGS];
94 int active_fps_src[MAX77620_NUM_REGS];
97 #define fps_src_name(fps_src) \
98 (fps_src == MAX77620_FPS_SRC_0 ? "FPS_SRC_0" : \
99 fps_src == MAX77620_FPS_SRC_1 ? "FPS_SRC_1" : \
100 fps_src == MAX77620_FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE")
102 static int max77620_regulator_get_fps_src(struct max77620_regulator *pmic,
105 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
109 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val);
111 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n",
112 rinfo->fps_addr, ret);
116 return (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
119 static int max77620_regulator_set_fps_src(struct max77620_regulator *pmic,
122 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
127 case MAX77620_FPS_SRC_0:
128 case MAX77620_FPS_SRC_1:
129 case MAX77620_FPS_SRC_2:
130 case MAX77620_FPS_SRC_NONE:
133 case MAX77620_FPS_SRC_DEF:
134 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val);
136 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n",
137 rinfo->fps_addr, ret);
140 ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
141 pmic->active_fps_src[id] = ret;
145 dev_err(pmic->dev, "Invalid FPS %d for regulator %d\n",
150 ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr,
151 MAX77620_FPS_SRC_MASK,
152 fps_src << MAX77620_FPS_SRC_SHIFT);
154 dev_err(pmic->dev, "Reg 0x%02x update failed %d\n",
155 rinfo->fps_addr, ret);
158 pmic->active_fps_src[id] = fps_src;
163 static int max77620_regulator_set_fps_slots(struct max77620_regulator *pmic,
164 int id, bool is_suspend)
166 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
167 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
168 unsigned int val = 0;
169 unsigned int mask = 0;
170 int pu = rpdata->active_fps_pu_slot;
171 int pd = rpdata->active_fps_pd_slot;
175 pu = rpdata->suspend_fps_pu_slot;
176 pd = rpdata->suspend_fps_pd_slot;
179 /* FPS power up period setting */
181 val |= (pu << MAX77620_FPS_PU_PERIOD_SHIFT);
182 mask |= MAX77620_FPS_PU_PERIOD_MASK;
185 /* FPS power down period setting */
187 val |= (pd << MAX77620_FPS_PD_PERIOD_SHIFT);
188 mask |= MAX77620_FPS_PD_PERIOD_MASK;
192 ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr,
195 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n",
196 rinfo->fps_addr, ret);
204 static int max77620_regulator_set_power_mode(struct max77620_regulator *pmic,
205 int power_mode, int id)
207 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
208 u8 mask = rinfo->power_mode_mask;
209 u8 shift = rinfo->power_mode_shift;
213 switch (rinfo->type) {
214 case MAX77620_REGULATOR_TYPE_SD:
215 addr = rinfo->cfg_addr;
218 addr = rinfo->volt_addr;
222 ret = regmap_update_bits(pmic->rmap, addr, mask, power_mode << shift);
224 dev_err(pmic->dev, "Regulator %d mode set failed: %d\n",
228 pmic->current_power_mode[id] = power_mode;
233 static int max77620_regulator_get_power_mode(struct max77620_regulator *pmic,
236 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
237 unsigned int val, addr;
238 u8 mask = rinfo->power_mode_mask;
239 u8 shift = rinfo->power_mode_shift;
242 switch (rinfo->type) {
243 case MAX77620_REGULATOR_TYPE_SD:
244 addr = rinfo->cfg_addr;
247 addr = rinfo->volt_addr;
251 ret = regmap_read(pmic->rmap, addr, &val);
253 dev_err(pmic->dev, "Regulator %d: Reg 0x%02x read failed: %d\n",
258 return (val & mask) >> shift;
261 static int max77620_read_slew_rate(struct max77620_regulator *pmic, int id)
263 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
268 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &rval);
270 dev_err(pmic->dev, "Register 0x%02x read failed: %d\n",
271 rinfo->cfg_addr, ret);
275 switch (rinfo->type) {
276 case MAX77620_REGULATOR_TYPE_SD:
277 slew_rate = (rval >> MAX77620_SD_SR_SHIFT) & 0x3;
292 rinfo->desc.ramp_delay = slew_rate;
295 slew_rate = rval & 0x1;
304 rinfo->desc.ramp_delay = slew_rate;
311 static int max77620_set_slew_rate(struct max77620_regulator *pmic, int id,
314 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
319 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
320 if (slew_rate <= 13750)
322 else if (slew_rate <= 27500)
324 else if (slew_rate <= 55000)
328 val <<= MAX77620_SD_SR_SHIFT;
329 mask = MAX77620_SD_SR_MASK;
331 if (slew_rate <= 5000)
335 mask = MAX77620_LDO_SLEW_RATE_MASK;
338 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, mask, val);
340 dev_err(pmic->dev, "Regulator %d slew rate set failed: %d\n",
348 static int max77620_init_pmic(struct max77620_regulator *pmic, int id)
350 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
353 /* Update power mode */
354 ret = max77620_regulator_get_power_mode(pmic, id);
358 pmic->current_power_mode[id] = ret;
359 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
361 if (rpdata->active_fps_src == MAX77620_FPS_SRC_DEF) {
362 ret = max77620_regulator_get_fps_src(pmic, id);
365 rpdata->active_fps_src = ret;
368 /* If rails are externally control of FPS then enable it always. */
369 if (rpdata->active_fps_src == MAX77620_FPS_SRC_NONE) {
370 ret = max77620_regulator_set_power_mode(pmic,
371 pmic->enable_power_mode[id], id);
375 if (pmic->current_power_mode[id] !=
376 pmic->enable_power_mode[id]) {
377 ret = max77620_regulator_set_power_mode(pmic,
378 pmic->enable_power_mode[id], id);
384 ret = max77620_regulator_set_fps_src(pmic, rpdata->active_fps_src, id);
388 ret = max77620_regulator_set_fps_slots(pmic, id, false);
392 if (rpdata->ramp_rate_setting) {
393 ret = max77620_set_slew_rate(pmic, id,
394 rpdata->ramp_rate_setting);
402 static int max77620_regulator_enable(struct regulator_dev *rdev)
404 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
405 int id = rdev_get_id(rdev);
407 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)
410 return max77620_regulator_set_power_mode(pmic,
411 pmic->enable_power_mode[id], id);
414 static int max77620_regulator_disable(struct regulator_dev *rdev)
416 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
417 int id = rdev_get_id(rdev);
419 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)
422 return max77620_regulator_set_power_mode(pmic,
423 MAX77620_POWER_MODE_DISABLE, id);
426 static int max77620_regulator_is_enabled(struct regulator_dev *rdev)
428 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
429 int id = rdev_get_id(rdev);
432 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)
435 ret = max77620_regulator_get_power_mode(pmic, id);
439 if (ret != MAX77620_POWER_MODE_DISABLE)
445 static int max77620_regulator_set_mode(struct regulator_dev *rdev,
448 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
449 int id = rdev_get_id(rdev);
450 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
451 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
458 case REGULATOR_MODE_FAST:
460 power_mode = MAX77620_POWER_MODE_NORMAL;
463 case REGULATOR_MODE_NORMAL:
464 power_mode = MAX77620_POWER_MODE_NORMAL;
467 case REGULATOR_MODE_IDLE:
468 power_mode = MAX77620_POWER_MODE_LPM;
472 dev_err(pmic->dev, "Regulator %d mode %d is invalid\n",
477 if (rinfo->type != MAX77620_REGULATOR_TYPE_SD)
480 val = (fpwm) ? MAX77620_SD_FPWM_MASK : 0;
481 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr,
482 MAX77620_SD_FPWM_MASK, val);
484 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n",
485 rinfo->cfg_addr, ret);
488 rpdata->current_mode = mode;
491 ret = max77620_regulator_set_power_mode(pmic, power_mode, id);
495 pmic->enable_power_mode[id] = power_mode;
500 static unsigned int max77620_regulator_get_mode(struct regulator_dev *rdev)
502 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
503 int id = rdev_get_id(rdev);
504 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
507 int pm_mode, reg_mode;
510 ret = max77620_regulator_get_power_mode(pmic, id);
516 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
517 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &val);
519 dev_err(pmic->dev, "Reg 0x%02x read failed: %d\n",
520 rinfo->cfg_addr, ret);
523 fpwm = !!(val & MAX77620_SD_FPWM_MASK);
527 case MAX77620_POWER_MODE_NORMAL:
528 case MAX77620_POWER_MODE_DISABLE:
530 reg_mode = REGULATOR_MODE_FAST;
532 reg_mode = REGULATOR_MODE_NORMAL;
534 case MAX77620_POWER_MODE_LPM:
535 case MAX77620_POWER_MODE_GLPM:
536 reg_mode = REGULATOR_MODE_IDLE;
545 static int max77620_regulator_set_ramp_delay(struct regulator_dev *rdev,
548 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
549 int id = rdev_get_id(rdev);
550 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
552 /* Device specific ramp rate setting tells that platform has
553 * different ramp rate from advertised value. In this case,
554 * do not configure anything and just return success.
556 if (rpdata->ramp_rate_setting)
559 return max77620_set_slew_rate(pmic, id, ramp_delay);
562 static int max77620_of_parse_cb(struct device_node *np,
563 const struct regulator_desc *desc,
564 struct regulator_config *config)
566 struct max77620_regulator *pmic = config->driver_data;
567 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[desc->id];
571 ret = of_property_read_u32(np, "maxim,active-fps-source", &pval);
572 rpdata->active_fps_src = (!ret) ? pval : MAX77620_FPS_SRC_DEF;
574 ret = of_property_read_u32(np, "maxim,active-fps-power-up-slot", &pval);
575 rpdata->active_fps_pu_slot = (!ret) ? pval : -1;
577 ret = of_property_read_u32(
578 np, "maxim,active-fps-power-down-slot", &pval);
579 rpdata->active_fps_pd_slot = (!ret) ? pval : -1;
581 ret = of_property_read_u32(np, "maxim,suspend-fps-source", &pval);
582 rpdata->suspend_fps_src = (!ret) ? pval : -1;
584 ret = of_property_read_u32(
585 np, "maxim,suspend-fps-power-up-slot", &pval);
586 rpdata->suspend_fps_pu_slot = (!ret) ? pval : -1;
588 ret = of_property_read_u32(
589 np, "maxim,suspend-fps-power-down-slot", &pval);
590 rpdata->suspend_fps_pd_slot = (!ret) ? pval : -1;
592 ret = of_property_read_u32(np, "maxim,ramp-rate-setting", &pval);
593 rpdata->ramp_rate_setting = (!ret) ? pval : 0;
595 return max77620_init_pmic(pmic, desc->id);
598 static struct regulator_ops max77620_regulator_ops = {
599 .is_enabled = max77620_regulator_is_enabled,
600 .enable = max77620_regulator_enable,
601 .disable = max77620_regulator_disable,
602 .list_voltage = regulator_list_voltage_linear,
603 .map_voltage = regulator_map_voltage_linear,
604 .get_voltage_sel = regulator_get_voltage_sel_regmap,
605 .set_voltage_sel = regulator_set_voltage_sel_regmap,
606 .set_mode = max77620_regulator_set_mode,
607 .get_mode = max77620_regulator_get_mode,
608 .set_ramp_delay = max77620_regulator_set_ramp_delay,
609 .set_voltage_time_sel = regulator_set_voltage_time_sel,
610 .set_active_discharge = regulator_set_active_discharge_regmap,
613 #define MAX77620_SD_CNF2_ROVS_EN_NONE 0
614 #define RAIL_SD(_id, _name, _sname, _volt_mask, _min_uV, _max_uV, \
615 _step_uV, _rs_add, _rs_mask) \
616 [MAX77620_REGULATOR_ID_##_id] = { \
617 .type = MAX77620_REGULATOR_TYPE_SD, \
618 .volt_addr = MAX77620_REG_##_id, \
619 .cfg_addr = MAX77620_REG_##_id##_CFG, \
620 .fps_addr = MAX77620_REG_FPS_##_id, \
621 .remote_sense_addr = _rs_add, \
622 .remote_sense_mask = MAX77620_SD_CNF2_ROVS_EN_##_rs_mask, \
623 .power_mode_mask = MAX77620_SD_POWER_MODE_MASK, \
624 .power_mode_shift = MAX77620_SD_POWER_MODE_SHIFT, \
626 .name = max77620_rails(_name), \
627 .of_match = of_match_ptr(#_name), \
628 .regulators_node = of_match_ptr("regulators"), \
629 .of_parse_cb = max77620_of_parse_cb, \
630 .supply_name = _sname, \
631 .id = MAX77620_REGULATOR_ID_##_id, \
632 .ops = &max77620_regulator_ops, \
633 .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
635 .uV_step = _step_uV, \
636 .enable_time = 500, \
637 .vsel_mask = MAX77620_##_volt_mask##_VOLT_MASK, \
638 .vsel_reg = MAX77620_REG_##_id, \
639 .active_discharge_off = 0, \
640 .active_discharge_on = MAX77620_SD_CFG1_ADE_ENABLE, \
641 .active_discharge_mask = MAX77620_SD_CFG1_ADE_MASK, \
642 .active_discharge_reg = MAX77620_REG_##_id##_CFG, \
643 .type = REGULATOR_VOLTAGE, \
647 #define RAIL_LDO(_id, _name, _sname, _type, _min_uV, _max_uV, _step_uV) \
648 [MAX77620_REGULATOR_ID_##_id] = { \
649 .type = MAX77620_REGULATOR_TYPE_LDO_##_type, \
650 .volt_addr = MAX77620_REG_##_id##_CFG, \
651 .cfg_addr = MAX77620_REG_##_id##_CFG2, \
652 .fps_addr = MAX77620_REG_FPS_##_id, \
653 .remote_sense_addr = 0xFF, \
654 .power_mode_mask = MAX77620_LDO_POWER_MODE_MASK, \
655 .power_mode_shift = MAX77620_LDO_POWER_MODE_SHIFT, \
657 .name = max77620_rails(_name), \
658 .of_match = of_match_ptr(#_name), \
659 .regulators_node = of_match_ptr("regulators"), \
660 .of_parse_cb = max77620_of_parse_cb, \
661 .supply_name = _sname, \
662 .id = MAX77620_REGULATOR_ID_##_id, \
663 .ops = &max77620_regulator_ops, \
664 .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
666 .uV_step = _step_uV, \
667 .enable_time = 500, \
668 .vsel_mask = MAX77620_LDO_VOLT_MASK, \
669 .vsel_reg = MAX77620_REG_##_id##_CFG, \
670 .active_discharge_off = 0, \
671 .active_discharge_on = MAX77620_LDO_CFG2_ADE_ENABLE, \
672 .active_discharge_mask = MAX77620_LDO_CFG2_ADE_MASK, \
673 .active_discharge_reg = MAX77620_REG_##_id##_CFG2, \
674 .type = REGULATOR_VOLTAGE, \
678 static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = {
679 RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 1400000, 12500, 0x22, SD0),
680 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1),
681 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
682 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
683 RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
685 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
686 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
687 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),
688 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
689 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
690 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
691 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
692 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
693 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
696 static struct max77620_regulator_info max20024_regs_info[MAX77620_NUM_REGS] = {
697 RAIL_SD(SD0, sd0, "in-sd0", SD0, 800000, 1587500, 12500, 0x22, SD0),
698 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 3387500, 12500, 0x22, SD1),
699 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
700 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
701 RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
703 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
704 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
705 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),
706 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
707 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
708 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
709 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
710 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
711 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
714 static int max77620_regulator_probe(struct platform_device *pdev)
716 struct max77620_chip *max77620_chip = dev_get_drvdata(pdev->dev.parent);
717 struct max77620_regulator_info *rinfo;
718 struct device *dev = &pdev->dev;
719 struct regulator_config config = { };
720 struct max77620_regulator *pmic;
724 pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
728 platform_set_drvdata(pdev, pmic);
730 pmic->rmap = max77620_chip->rmap;
732 dev->of_node = pdev->dev.parent->of_node;
734 switch (max77620_chip->chip_id) {
736 rinfo = max77620_regs_info;
739 rinfo = max20024_regs_info;
743 config.regmap = pmic->rmap;
745 config.driver_data = pmic;
747 for (id = 0; id < MAX77620_NUM_REGS; id++) {
748 struct regulator_dev *rdev;
749 struct regulator_desc *rdesc;
751 if ((max77620_chip->chip_id == MAX77620) &&
752 (id == MAX77620_REGULATOR_ID_SD4))
755 rdesc = &rinfo[id].desc;
756 pmic->rinfo[id] = &max77620_regs_info[id];
757 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
759 ret = max77620_read_slew_rate(pmic, id);
763 rdev = devm_regulator_register(dev, rdesc, &config);
766 dev_err(dev, "Regulator registration %s failed: %d\n",
775 #ifdef CONFIG_PM_SLEEP
776 static int max77620_regulator_suspend(struct device *dev)
778 struct max77620_regulator *pmic = dev_get_drvdata(dev);
779 struct max77620_regulator_pdata *reg_pdata;
782 for (id = 0; id < MAX77620_NUM_REGS; id++) {
783 reg_pdata = &pmic->reg_pdata[id];
785 max77620_regulator_set_fps_slots(pmic, id, true);
786 if (reg_pdata->suspend_fps_src < 0)
789 max77620_regulator_set_fps_src(pmic, reg_pdata->suspend_fps_src,
796 static int max77620_regulator_resume(struct device *dev)
798 struct max77620_regulator *pmic = dev_get_drvdata(dev);
799 struct max77620_regulator_pdata *reg_pdata;
802 for (id = 0; id < MAX77620_NUM_REGS; id++) {
803 reg_pdata = &pmic->reg_pdata[id];
805 max77620_regulator_set_fps_slots(pmic, id, false);
806 if (reg_pdata->active_fps_src < 0)
808 max77620_regulator_set_fps_src(pmic, reg_pdata->active_fps_src,
816 static const struct dev_pm_ops max77620_regulator_pm_ops = {
817 SET_SYSTEM_SLEEP_PM_OPS(max77620_regulator_suspend,
818 max77620_regulator_resume)
821 static const struct platform_device_id max77620_regulator_devtype[] = {
822 { .name = "max77620-pmic", },
823 { .name = "max20024-pmic", },
826 MODULE_DEVICE_TABLE(platform, max77620_regulator_devtype);
828 static struct platform_driver max77620_regulator_driver = {
829 .probe = max77620_regulator_probe,
830 .id_table = max77620_regulator_devtype,
832 .name = "max77620-pmic",
833 .pm = &max77620_regulator_pm_ops,
837 module_platform_driver(max77620_regulator_driver);
839 MODULE_DESCRIPTION("MAX77620/MAX20024 regulator driver");
840 MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>");
841 MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
842 MODULE_LICENSE("GPL v2");