drivers/regulator/axp20x-regulator.c

   1 /*
   2  * AXP20x regulators driver.
   3  *
   4  * Copyright (C) 2013 Carlo Caione <carlo@caione.org>
   5  *
   6  * This file is subject to the terms and conditions of the GNU General
   7  * Public License. See the file "COPYING" in the main directory of this
   8  * archive for more details.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <linux/bitops.h>
  17 #include <linux/delay.h>
  18 #include <linux/err.h>
  19 #include <linux/init.h>
  20 #include <linux/mfd/axp20x.h>
  21 #include <linux/module.h>
  22 #include <linux/of.h>
  23 #include <linux/of_device.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/regmap.h>
  26 #include <linux/regulator/driver.h>
  27 #include <linux/regulator/machine.h>
  28 #include <linux/regulator/of_regulator.h>
  29
  30 #define AXP20X_GPIO0_FUNC_MASK          GENMASK(3, 0)
  31 #define AXP20X_GPIO1_FUNC_MASK          GENMASK(3, 0)
  32
  33 #define AXP20X_IO_ENABLED               0x03
  34 #define AXP20X_IO_DISABLED              0x07
  35
  36 #define AXP20X_WORKMODE_DCDC2_MASK      BIT_MASK(2)
  37 #define AXP20X_WORKMODE_DCDC3_MASK      BIT_MASK(1)
  38
  39 #define AXP20X_FREQ_DCDC_MASK           GENMASK(3, 0)
  40
  41 #define AXP20X_VBUS_IPSOUT_MGMT_MASK    BIT_MASK(2)
  42
  43 #define AXP20X_DCDC2_V_OUT_MASK         GENMASK(5, 0)
  44 #define AXP20X_DCDC3_V_OUT_MASK         GENMASK(7, 0)
  45 #define AXP20X_LDO24_V_OUT_MASK         GENMASK(7, 4)
  46 #define AXP20X_LDO3_V_OUT_MASK          GENMASK(6, 0)
  47 #define AXP20X_LDO5_V_OUT_MASK          GENMASK(7, 4)
  48
  49 #define AXP20X_PWR_OUT_EXTEN_MASK       BIT_MASK(0)
  50 #define AXP20X_PWR_OUT_DCDC3_MASK       BIT_MASK(1)
  51 #define AXP20X_PWR_OUT_LDO2_MASK        BIT_MASK(2)
  52 #define AXP20X_PWR_OUT_LDO4_MASK        BIT_MASK(3)
  53 #define AXP20X_PWR_OUT_DCDC2_MASK       BIT_MASK(4)
  54 #define AXP20X_PWR_OUT_LDO3_MASK        BIT_MASK(6)
  55
  56 #define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE_MASK        BIT_MASK(0)
  57 #define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE(x) \
  58         ((x) << 0)
  59 #define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE_MASK         BIT_MASK(1)
  60 #define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE(x) \
  61         ((x) << 1)
  62 #define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN_MASK          BIT_MASK(2)
  63 #define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN               BIT(2)
  64 #define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN_MASK           BIT_MASK(3)
  65 #define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN                BIT(3)
  66
  67 #define AXP20X_LDO4_V_OUT_1250mV_START  0x0
  68 #define AXP20X_LDO4_V_OUT_1250mV_STEPS  0
  69 #define AXP20X_LDO4_V_OUT_1250mV_END    \
  70         (AXP20X_LDO4_V_OUT_1250mV_START + AXP20X_LDO4_V_OUT_1250mV_STEPS)
  71 #define AXP20X_LDO4_V_OUT_1300mV_START  0x1
  72 #define AXP20X_LDO4_V_OUT_1300mV_STEPS  7
  73 #define AXP20X_LDO4_V_OUT_1300mV_END    \
  74         (AXP20X_LDO4_V_OUT_1300mV_START + AXP20X_LDO4_V_OUT_1300mV_STEPS)
  75 #define AXP20X_LDO4_V_OUT_2500mV_START  0x9
  76 #define AXP20X_LDO4_V_OUT_2500mV_STEPS  0
  77 #define AXP20X_LDO4_V_OUT_2500mV_END    \
  78         (AXP20X_LDO4_V_OUT_2500mV_START + AXP20X_LDO4_V_OUT_2500mV_STEPS)
  79 #define AXP20X_LDO4_V_OUT_2700mV_START  0xa
  80 #define AXP20X_LDO4_V_OUT_2700mV_STEPS  1
  81 #define AXP20X_LDO4_V_OUT_2700mV_END    \
  82         (AXP20X_LDO4_V_OUT_2700mV_START + AXP20X_LDO4_V_OUT_2700mV_STEPS)
  83 #define AXP20X_LDO4_V_OUT_3000mV_START  0xc
  84 #define AXP20X_LDO4_V_OUT_3000mV_STEPS  3
  85 #define AXP20X_LDO4_V_OUT_3000mV_END    \
  86         (AXP20X_LDO4_V_OUT_3000mV_START + AXP20X_LDO4_V_OUT_3000mV_STEPS)
  87 #define AXP20X_LDO4_V_OUT_NUM_VOLTAGES  16
  88
  89 #define AXP22X_IO_ENABLED               0x03
  90 #define AXP22X_IO_DISABLED              0x04
  91
  92 #define AXP22X_WORKMODE_DCDCX_MASK(x)   BIT_MASK(x)
  93
  94 #define AXP22X_MISC_N_VBUSEN_FUNC       BIT(4)
  95
  96 #define AXP22X_DCDC1_V_OUT_MASK         GENMASK(4, 0)
  97 #define AXP22X_DCDC2_V_OUT_MASK         GENMASK(5, 0)
  98 #define AXP22X_DCDC3_V_OUT_MASK         GENMASK(5, 0)
  99 #define AXP22X_DCDC4_V_OUT_MASK         GENMASK(5, 0)
 100 #define AXP22X_DCDC5_V_OUT_MASK         GENMASK(4, 0)
 101 #define AXP22X_DC5LDO_V_OUT_MASK        GENMASK(2, 0)
 102 #define AXP22X_ALDO1_V_OUT_MASK         GENMASK(4, 0)
 103 #define AXP22X_ALDO2_V_OUT_MASK         GENMASK(4, 0)
 104 #define AXP22X_ALDO3_V_OUT_MASK         GENMASK(4, 0)
 105 #define AXP22X_DLDO1_V_OUT_MASK         GENMASK(4, 0)
 106 #define AXP22X_DLDO2_V_OUT_MASK         GENMASK(4, 0)
 107 #define AXP22X_DLDO3_V_OUT_MASK         GENMASK(4, 0)
 108 #define AXP22X_DLDO4_V_OUT_MASK         GENMASK(4, 0)
 109 #define AXP22X_ELDO1_V_OUT_MASK         GENMASK(4, 0)
 110 #define AXP22X_ELDO2_V_OUT_MASK         GENMASK(4, 0)
 111 #define AXP22X_ELDO3_V_OUT_MASK         GENMASK(4, 0)
 112 #define AXP22X_LDO_IO0_V_OUT_MASK       GENMASK(4, 0)
 113 #define AXP22X_LDO_IO1_V_OUT_MASK       GENMASK(4, 0)
 114
 115 #define AXP22X_PWR_OUT_DC5LDO_MASK      BIT_MASK(0)
 116 #define AXP22X_PWR_OUT_DCDC1_MASK       BIT_MASK(1)
 117 #define AXP22X_PWR_OUT_DCDC2_MASK       BIT_MASK(2)
 118 #define AXP22X_PWR_OUT_DCDC3_MASK       BIT_MASK(3)
 119 #define AXP22X_PWR_OUT_DCDC4_MASK       BIT_MASK(4)
 120 #define AXP22X_PWR_OUT_DCDC5_MASK       BIT_MASK(5)
 121 #define AXP22X_PWR_OUT_ALDO1_MASK       BIT_MASK(6)
 122 #define AXP22X_PWR_OUT_ALDO2_MASK       BIT_MASK(7)
 123
 124 #define AXP22X_PWR_OUT_SW_MASK          BIT_MASK(6)
 125 #define AXP22X_PWR_OUT_DC1SW_MASK       BIT_MASK(7)
 126
 127 #define AXP22X_PWR_OUT_ELDO1_MASK       BIT_MASK(0)
 128 #define AXP22X_PWR_OUT_ELDO2_MASK       BIT_MASK(1)
 129 #define AXP22X_PWR_OUT_ELDO3_MASK       BIT_MASK(2)
 130 #define AXP22X_PWR_OUT_DLDO1_MASK       BIT_MASK(3)
 131 #define AXP22X_PWR_OUT_DLDO2_MASK       BIT_MASK(4)
 132 #define AXP22X_PWR_OUT_DLDO3_MASK       BIT_MASK(5)
 133 #define AXP22X_PWR_OUT_DLDO4_MASK       BIT_MASK(6)
 134 #define AXP22X_PWR_OUT_ALDO3_MASK       BIT_MASK(7)
 135
 136 #define AXP803_PWR_OUT_DCDC1_MASK       BIT_MASK(0)
 137 #define AXP803_PWR_OUT_DCDC2_MASK       BIT_MASK(1)
 138 #define AXP803_PWR_OUT_DCDC3_MASK       BIT_MASK(2)
 139 #define AXP803_PWR_OUT_DCDC4_MASK       BIT_MASK(3)
 140 #define AXP803_PWR_OUT_DCDC5_MASK       BIT_MASK(4)
 141 #define AXP803_PWR_OUT_DCDC6_MASK       BIT_MASK(5)
 142
 143 #define AXP803_PWR_OUT_FLDO1_MASK       BIT_MASK(2)
 144 #define AXP803_PWR_OUT_FLDO2_MASK       BIT_MASK(3)
 145
 146 #define AXP803_DCDC1_V_OUT_MASK         GENMASK(4, 0)
 147 #define AXP803_DCDC2_V_OUT_MASK         GENMASK(6, 0)
 148 #define AXP803_DCDC3_V_OUT_MASK         GENMASK(6, 0)
 149 #define AXP803_DCDC4_V_OUT_MASK         GENMASK(6, 0)
 150 #define AXP803_DCDC5_V_OUT_MASK         GENMASK(6, 0)
 151 #define AXP803_DCDC6_V_OUT_MASK         GENMASK(6, 0)
 152
 153 #define AXP803_FLDO1_V_OUT_MASK         GENMASK(3, 0)
 154 #define AXP803_FLDO2_V_OUT_MASK         GENMASK(3, 0)
 155
 156 #define AXP803_DCDC23_POLYPHASE_DUAL    BIT(6)
 157 #define AXP803_DCDC56_POLYPHASE_DUAL    BIT(5)
 158
 159 #define AXP803_DCDC234_500mV_START      0x00
 160 #define AXP803_DCDC234_500mV_STEPS      70
 161 #define AXP803_DCDC234_500mV_END        \
 162         (AXP803_DCDC234_500mV_START + AXP803_DCDC234_500mV_STEPS)
 163 #define AXP803_DCDC234_1220mV_START     0x47
 164 #define AXP803_DCDC234_1220mV_STEPS     4
 165 #define AXP803_DCDC234_1220mV_END       \
 166         (AXP803_DCDC234_1220mV_START + AXP803_DCDC234_1220mV_STEPS)
 167 #define AXP803_DCDC234_NUM_VOLTAGES     76
 168
 169 #define AXP803_DCDC5_800mV_START        0x00
 170 #define AXP803_DCDC5_800mV_STEPS        32
 171 #define AXP803_DCDC5_800mV_END          \
 172         (AXP803_DCDC5_800mV_START + AXP803_DCDC5_800mV_STEPS)
 173 #define AXP803_DCDC5_1140mV_START       0x21
 174 #define AXP803_DCDC5_1140mV_STEPS       35
 175 #define AXP803_DCDC5_1140mV_END         \
 176         (AXP803_DCDC5_1140mV_START + AXP803_DCDC5_1140mV_STEPS)
 177 #define AXP803_DCDC5_NUM_VOLTAGES       69
 178
 179 #define AXP803_DCDC6_600mV_START        0x00
 180 #define AXP803_DCDC6_600mV_STEPS        50
 181 #define AXP803_DCDC6_600mV_END          \
 182         (AXP803_DCDC6_600mV_START + AXP803_DCDC6_600mV_STEPS)
 183 #define AXP803_DCDC6_1120mV_START       0x33
 184 #define AXP803_DCDC6_1120mV_STEPS       20
 185 #define AXP803_DCDC6_1120mV_END         \
 186         (AXP803_DCDC6_1120mV_START + AXP803_DCDC6_1120mV_STEPS)
 187 #define AXP803_DCDC6_NUM_VOLTAGES       72
 188
 189 #define AXP803_DLDO2_700mV_START        0x00
 190 #define AXP803_DLDO2_700mV_STEPS        26
 191 #define AXP803_DLDO2_700mV_END          \
 192         (AXP803_DLDO2_700mV_START + AXP803_DLDO2_700mV_STEPS)
 193 #define AXP803_DLDO2_3400mV_START       0x1b
 194 #define AXP803_DLDO2_3400mV_STEPS       4
 195 #define AXP803_DLDO2_3400mV_END         \
 196         (AXP803_DLDO2_3400mV_START + AXP803_DLDO2_3400mV_STEPS)
 197 #define AXP803_DLDO2_NUM_VOLTAGES       32
 198
 199 #define AXP806_DCDCA_V_CTRL_MASK        GENMASK(6, 0)
 200 #define AXP806_DCDCB_V_CTRL_MASK        GENMASK(4, 0)
 201 #define AXP806_DCDCC_V_CTRL_MASK        GENMASK(6, 0)
 202 #define AXP806_DCDCD_V_CTRL_MASK        GENMASK(5, 0)
 203 #define AXP806_DCDCE_V_CTRL_MASK        GENMASK(4, 0)
 204 #define AXP806_ALDO1_V_CTRL_MASK        GENMASK(4, 0)
 205 #define AXP806_ALDO2_V_CTRL_MASK        GENMASK(4, 0)
 206 #define AXP806_ALDO3_V_CTRL_MASK        GENMASK(4, 0)
 207 #define AXP806_BLDO1_V_CTRL_MASK        GENMASK(3, 0)
 208 #define AXP806_BLDO2_V_CTRL_MASK        GENMASK(3, 0)
 209 #define AXP806_BLDO3_V_CTRL_MASK        GENMASK(3, 0)
 210 #define AXP806_BLDO4_V_CTRL_MASK        GENMASK(3, 0)
 211 #define AXP806_CLDO1_V_CTRL_MASK        GENMASK(4, 0)
 212 #define AXP806_CLDO2_V_CTRL_MASK        GENMASK(4, 0)
 213 #define AXP806_CLDO3_V_CTRL_MASK        GENMASK(4, 0)
 214
 215 #define AXP806_PWR_OUT_DCDCA_MASK       BIT_MASK(0)
 216 #define AXP806_PWR_OUT_DCDCB_MASK       BIT_MASK(1)
 217 #define AXP806_PWR_OUT_DCDCC_MASK       BIT_MASK(2)
 218 #define AXP806_PWR_OUT_DCDCD_MASK       BIT_MASK(3)
 219 #define AXP806_PWR_OUT_DCDCE_MASK       BIT_MASK(4)
 220 #define AXP806_PWR_OUT_ALDO1_MASK       BIT_MASK(5)
 221 #define AXP806_PWR_OUT_ALDO2_MASK       BIT_MASK(6)
 222 #define AXP806_PWR_OUT_ALDO3_MASK       BIT_MASK(7)
 223 #define AXP806_PWR_OUT_BLDO1_MASK       BIT_MASK(0)
 224 #define AXP806_PWR_OUT_BLDO2_MASK       BIT_MASK(1)
 225 #define AXP806_PWR_OUT_BLDO3_MASK       BIT_MASK(2)
 226 #define AXP806_PWR_OUT_BLDO4_MASK       BIT_MASK(3)
 227 #define AXP806_PWR_OUT_CLDO1_MASK       BIT_MASK(4)
 228 #define AXP806_PWR_OUT_CLDO2_MASK       BIT_MASK(5)
 229 #define AXP806_PWR_OUT_CLDO3_MASK       BIT_MASK(6)
 230 #define AXP806_PWR_OUT_SW_MASK          BIT_MASK(7)
 231
 232 #define AXP806_DCDCAB_POLYPHASE_DUAL    0x40
 233 #define AXP806_DCDCABC_POLYPHASE_TRI    0x80
 234 #define AXP806_DCDCABC_POLYPHASE_MASK   GENMASK(7, 6)
 235
 236 #define AXP806_DCDCDE_POLYPHASE_DUAL    BIT(5)
 237
 238 #define AXP806_DCDCA_600mV_START        0x00
 239 #define AXP806_DCDCA_600mV_STEPS        50
 240 #define AXP806_DCDCA_600mV_END          \
 241         (AXP806_DCDCA_600mV_START + AXP806_DCDCA_600mV_STEPS)
 242 #define AXP806_DCDCA_1120mV_START       0x33
 243 #define AXP806_DCDCA_1120mV_STEPS       20
 244 #define AXP806_DCDCA_1120mV_END         \
 245         (AXP806_DCDCA_1120mV_START + AXP806_DCDCA_1120mV_STEPS)
 246 #define AXP806_DCDCA_NUM_VOLTAGES       72
 247
 248 #define AXP806_DCDCD_600mV_START        0x00
 249 #define AXP806_DCDCD_600mV_STEPS        45
 250 #define AXP806_DCDCD_600mV_END          \
 251         (AXP806_DCDCD_600mV_START + AXP806_DCDCD_600mV_STEPS)
 252 #define AXP806_DCDCD_1600mV_START       0x2e
 253 #define AXP806_DCDCD_1600mV_STEPS       17
 254 #define AXP806_DCDCD_1600mV_END         \
 255         (AXP806_DCDCD_1600mV_START + AXP806_DCDCD_1600mV_STEPS)
 256 #define AXP806_DCDCD_NUM_VOLTAGES       64
 257
 258 #define AXP809_DCDC4_600mV_START        0x00
 259 #define AXP809_DCDC4_600mV_STEPS        47
 260 #define AXP809_DCDC4_600mV_END          \
 261         (AXP809_DCDC4_600mV_START + AXP809_DCDC4_600mV_STEPS)
 262 #define AXP809_DCDC4_1800mV_START       0x30
 263 #define AXP809_DCDC4_1800mV_STEPS       8
 264 #define AXP809_DCDC4_1800mV_END         \
 265         (AXP809_DCDC4_1800mV_START + AXP809_DCDC4_1800mV_STEPS)
 266 #define AXP809_DCDC4_NUM_VOLTAGES       57
 267
 268 #define AXP813_DCDC7_V_OUT_MASK         GENMASK(6, 0)
 269
 270 #define AXP813_PWR_OUT_DCDC7_MASK       BIT_MASK(6)
 271
 272 #define AXP_DESC_IO(_family, _id, _match, _supply, _min, _max, _step, _vreg,    \
 273                     _vmask, _ereg, _emask, _enable_val, _disable_val)           \
 274         [_family##_##_id] = {                                                   \
 275                 .name           = (_match),                                     \
 276                 .supply_name    = (_supply),                                    \
 277                 .of_match       = of_match_ptr(_match),                         \
 278                 .regulators_node = of_match_ptr("regulators"),                  \
 279                 .type           = REGULATOR_VOLTAGE,                            \
 280                 .id             = _family##_##_id,                              \
 281                 .n_voltages     = (((_max) - (_min)) / (_step) + 1),            \
 282                 .owner          = THIS_MODULE,                                  \
 283                 .min_uV         = (_min) * 1000,                                \
 284                 .uV_step        = (_step) * 1000,                               \
 285                 .vsel_reg       = (_vreg),                                      \
 286                 .vsel_mask      = (_vmask),                                     \
 287                 .enable_reg     = (_ereg),                                      \
 288                 .enable_mask    = (_emask),                                     \
 289                 .enable_val     = (_enable_val),                                \
 290                 .disable_val    = (_disable_val),                               \
 291                 .ops            = &axp20x_ops,                                  \
 292         }
 293
 294 #define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg,       \
 295                  _vmask, _ereg, _emask)                                         \
 296         [_family##_##_id] = {                                                   \
 297                 .name           = (_match),                                     \
 298                 .supply_name    = (_supply),                                    \
 299                 .of_match       = of_match_ptr(_match),                         \
 300                 .regulators_node = of_match_ptr("regulators"),                  \
 301                 .type           = REGULATOR_VOLTAGE,                            \
 302                 .id             = _family##_##_id,                              \
 303                 .n_voltages     = (((_max) - (_min)) / (_step) + 1),            \
 304                 .owner          = THIS_MODULE,                                  \
 305                 .min_uV         = (_min) * 1000,                                \
 306                 .uV_step        = (_step) * 1000,                               \
 307                 .vsel_reg       = (_vreg),                                      \
 308                 .vsel_mask      = (_vmask),                                     \
 309                 .enable_reg     = (_ereg),                                      \
 310                 .enable_mask    = (_emask),                                     \
 311                 .ops            = &axp20x_ops,                                  \
 312         }
 313
 314 #define AXP_DESC_SW(_family, _id, _match, _supply, _ereg, _emask)               \
 315         [_family##_##_id] = {                                                   \
 316                 .name           = (_match),                                     \
 317                 .supply_name    = (_supply),                                    \
 318                 .of_match       = of_match_ptr(_match),                         \
 319                 .regulators_node = of_match_ptr("regulators"),                  \
 320                 .type           = REGULATOR_VOLTAGE,                            \
 321                 .id             = _family##_##_id,                              \
 322                 .owner          = THIS_MODULE,                                  \
 323                 .enable_reg     = (_ereg),                                      \
 324                 .enable_mask    = (_emask),                                     \
 325                 .ops            = &axp20x_ops_sw,                               \
 326         }
 327
 328 #define AXP_DESC_FIXED(_family, _id, _match, _supply, _volt)                    \
 329         [_family##_##_id] = {                                                   \
 330                 .name           = (_match),                                     \
 331                 .supply_name    = (_supply),                                    \
 332                 .of_match       = of_match_ptr(_match),                         \
 333                 .regulators_node = of_match_ptr("regulators"),                  \
 334                 .type           = REGULATOR_VOLTAGE,                            \
 335                 .id             = _family##_##_id,                              \
 336                 .n_voltages     = 1,                                            \
 337                 .owner          = THIS_MODULE,                                  \
 338                 .min_uV         = (_volt) * 1000,                               \
 339                 .ops            = &axp20x_ops_fixed                             \
 340         }
 341
 342 #define AXP_DESC_RANGES(_family, _id, _match, _supply, _ranges, _n_voltages,    \
 343                         _vreg, _vmask, _ereg, _emask)                           \
 344         [_family##_##_id] = {                                                   \
 345                 .name           = (_match),                                     \
 346                 .supply_name    = (_supply),                                    \
 347                 .of_match       = of_match_ptr(_match),                         \
 348                 .regulators_node = of_match_ptr("regulators"),                  \
 349                 .type           = REGULATOR_VOLTAGE,                            \
 350                 .id             = _family##_##_id,                              \
 351                 .n_voltages     = (_n_voltages),                                \
 352                 .owner          = THIS_MODULE,                                  \
 353                 .vsel_reg       = (_vreg),                                      \
 354                 .vsel_mask      = (_vmask),                                     \
 355                 .enable_reg     = (_ereg),                                      \
 356                 .enable_mask    = (_emask),                                     \
 357                 .linear_ranges  = (_ranges),                                    \
 358                 .n_linear_ranges = ARRAY_SIZE(_ranges),                         \
 359                 .ops            = &axp20x_ops_range,                            \
 360         }
 361
 362 static const int axp209_dcdc2_ldo3_slew_rates[] = {
 363         1600,
 364          800,
 365 };
 366
 367 static int axp20x_set_ramp_delay(struct regulator_dev *rdev, int ramp)
 368 {
 369         struct axp20x_dev *axp20x = rdev_get_drvdata(rdev);
 370         int id = rdev_get_id(rdev);
 371         u8 reg, mask, enable, cfg = 0xff;
 372         const int *slew_rates;
 373         int rate_count = 0;
 374
 375         switch (axp20x->variant) {
 376         case AXP209_ID:
 377                 if (id == AXP20X_DCDC2) {
 378                         slew_rates = axp209_dcdc2_ldo3_slew_rates;
 379                         rate_count = ARRAY_SIZE(axp209_dcdc2_ldo3_slew_rates);
 380                         reg = AXP20X_DCDC2_LDO3_V_RAMP;
 381                         mask = AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE_MASK |
 382                                AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN_MASK;
 383                         enable = (ramp > 0) ?
 384                                  AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN : 0;
 385                         break;
 386                 }
 387
 388                 if (id == AXP20X_LDO3) {
 389                         slew_rates = axp209_dcdc2_ldo3_slew_rates;
 390                         rate_count = ARRAY_SIZE(axp209_dcdc2_ldo3_slew_rates);
 391                         reg = AXP20X_DCDC2_LDO3_V_RAMP;
 392                         mask = AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE_MASK |
 393                                AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN_MASK;
 394                         enable = (ramp > 0) ?
 395                                  AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN : 0;
 396                         break;
 397                 }
 398
 399                 if (rate_count > 0)
 400                         break;
 401
 402                 fallthrough;
 403         default:
 404                 /* Not supported for this regulator */
 405                 return -ENOTSUPP;
 406         }
 407
 408         if (ramp == 0) {
 409                 cfg = enable;
 410         } else {
 411                 int i;
 412
 413                 for (i = 0; i < rate_count; i++) {
 414                         if (ramp > slew_rates[i])
 415                                 break;
 416
 417                         if (id == AXP20X_DCDC2)
 418                                 cfg = AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE(i);
 419                         else
 420                                 cfg = AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE(i);
 421                 }
 422
 423                 if (cfg == 0xff) {
 424                         dev_err(axp20x->dev, "unsupported ramp value %d", ramp);
 425                         return -EINVAL;
 426                 }
 427
 428                 cfg |= enable;
 429         }
 430
 431         return regmap_update_bits(axp20x->regmap, reg, mask, cfg);
 432 }
 433
 434 static int axp20x_regulator_enable_regmap(struct regulator_dev *rdev)
 435 {
 436         struct axp20x_dev *axp20x = rdev_get_drvdata(rdev);
 437         int id = rdev_get_id(rdev);
 438
 439         switch (axp20x->variant) {
 440         case AXP209_ID:
 441                 if ((id == AXP20X_LDO3) &&
 442                     rdev->constraints && rdev->constraints->soft_start) {
 443                         int v_out;
 444                         int ret;
 445
 446                         /*
 447                          * On some boards, the LDO3 can be overloaded when
 448                          * turning on, causing the entire PMIC to shutdown
 449                          * without warning. Turning it on at the minimal voltage
 450                          * and then setting the voltage to the requested value
 451                          * works reliably.
 452                          */
 453                         if (regulator_is_enabled_regmap(rdev))
 454                                 break;
 455
 456                         v_out = regulator_get_voltage_sel_regmap(rdev);
 457                         if (v_out < 0)
 458                                 return v_out;
 459
 460                         if (v_out == 0)
 461                                 break;
 462
 463                         ret = regulator_set_voltage_sel_regmap(rdev, 0x00);
 464                         /*
 465                          * A small pause is needed between
 466                          * setting the voltage and enabling the LDO to give the
 467                          * internal state machine time to process the request.
 468                          */
 469                         usleep_range(1000, 5000);
 470                         ret |= regulator_enable_regmap(rdev);
 471                         ret |= regulator_set_voltage_sel_regmap(rdev, v_out);
 472
 473                         return ret;
 474                 }
 475                 break;
 476         default:
 477                 /* No quirks */
 478                 break;
 479         }
 480
 481         return regulator_enable_regmap(rdev);
 482 };
 483
 484 static const struct regulator_ops axp20x_ops_fixed = {
 485         .list_voltage           = regulator_list_voltage_linear,
 486 };
 487
 488 static const struct regulator_ops axp20x_ops_range = {
 489         .set_voltage_sel        = regulator_set_voltage_sel_regmap,
 490         .get_voltage_sel        = regulator_get_voltage_sel_regmap,
 491         .list_voltage           = regulator_list_voltage_linear_range,
 492         .enable                 = regulator_enable_regmap,
 493         .disable                = regulator_disable_regmap,
 494         .is_enabled             = regulator_is_enabled_regmap,
 495 };
 496
 497 static const struct regulator_ops axp20x_ops = {
 498         .set_voltage_sel        = regulator_set_voltage_sel_regmap,
 499         .get_voltage_sel        = regulator_get_voltage_sel_regmap,
 500         .list_voltage           = regulator_list_voltage_linear,
 501         .enable                 = axp20x_regulator_enable_regmap,
 502         .disable                = regulator_disable_regmap,
 503         .is_enabled             = regulator_is_enabled_regmap,
 504         .set_ramp_delay         = axp20x_set_ramp_delay,
 505 };
 506
 507 static const struct regulator_ops axp20x_ops_sw = {
 508         .enable                 = regulator_enable_regmap,
 509         .disable                = regulator_disable_regmap,
 510         .is_enabled             = regulator_is_enabled_regmap,
 511 };
 512
 513 static const struct linear_range axp20x_ldo4_ranges[] = {
 514         REGULATOR_LINEAR_RANGE(1250000,
 515                                AXP20X_LDO4_V_OUT_1250mV_START,
 516                                AXP20X_LDO4_V_OUT_1250mV_END,
 517                                0),
 518         REGULATOR_LINEAR_RANGE(1300000,
 519                                AXP20X_LDO4_V_OUT_1300mV_START,
 520                                AXP20X_LDO4_V_OUT_1300mV_END,
 521                                100000),
 522         REGULATOR_LINEAR_RANGE(2500000,
 523                                AXP20X_LDO4_V_OUT_2500mV_START,
 524                                AXP20X_LDO4_V_OUT_2500mV_END,
 525                                0),
 526         REGULATOR_LINEAR_RANGE(2700000,
 527                                AXP20X_LDO4_V_OUT_2700mV_START,
 528                                AXP20X_LDO4_V_OUT_2700mV_END,
 529                                100000),
 530         REGULATOR_LINEAR_RANGE(3000000,
 531                                AXP20X_LDO4_V_OUT_3000mV_START,
 532                                AXP20X_LDO4_V_OUT_3000mV_END,
 533                                100000),
 534 };
 535
 536 static const struct regulator_desc axp20x_regulators[] = {
 537         AXP_DESC(AXP20X, DCDC2, "dcdc2", "vin2", 700, 2275, 25,
 538                  AXP20X_DCDC2_V_OUT, AXP20X_DCDC2_V_OUT_MASK,
 539                  AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_DCDC2_MASK),
 540         AXP_DESC(AXP20X, DCDC3, "dcdc3", "vin3", 700, 3500, 25,
 541                  AXP20X_DCDC3_V_OUT, AXP20X_DCDC3_V_OUT_MASK,
 542                  AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_DCDC3_MASK),
 543         AXP_DESC_FIXED(AXP20X, LDO1, "ldo1", "acin", 1300),
 544         AXP_DESC(AXP20X, LDO2, "ldo2", "ldo24in", 1800, 3300, 100,
 545                  AXP20X_LDO24_V_OUT, AXP20X_LDO24_V_OUT_MASK,
 546                  AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_LDO2_MASK),
 547         AXP_DESC(AXP20X, LDO3, "ldo3", "ldo3in", 700, 3500, 25,
 548                  AXP20X_LDO3_V_OUT, AXP20X_LDO3_V_OUT_MASK,
 549                  AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_LDO3_MASK),
 550         AXP_DESC_RANGES(AXP20X, LDO4, "ldo4", "ldo24in",
 551                         axp20x_ldo4_ranges, AXP20X_LDO4_V_OUT_NUM_VOLTAGES,
 552                         AXP20X_LDO24_V_OUT, AXP20X_LDO24_V_OUT_MASK,
 553                         AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_LDO4_MASK),
 554         AXP_DESC_IO(AXP20X, LDO5, "ldo5", "ldo5in", 1800, 3300, 100,
 555                     AXP20X_LDO5_V_OUT, AXP20X_LDO5_V_OUT_MASK,
 556                     AXP20X_GPIO0_CTRL, AXP20X_GPIO0_FUNC_MASK,
 557                     AXP20X_IO_ENABLED, AXP20X_IO_DISABLED),
 558 };
 559
 560 static const struct regulator_desc axp22x_regulators[] = {
 561         AXP_DESC(AXP22X, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
 562                  AXP22X_DCDC1_V_OUT, AXP22X_DCDC1_V_OUT_MASK,
 563                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC1_MASK),
 564         AXP_DESC(AXP22X, DCDC2, "dcdc2", "vin2", 600, 1540, 20,
 565                  AXP22X_DCDC2_V_OUT, AXP22X_DCDC2_V_OUT_MASK,
 566                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC2_MASK),
 567         AXP_DESC(AXP22X, DCDC3, "dcdc3", "vin3", 600, 1860, 20,
 568                  AXP22X_DCDC3_V_OUT, AXP22X_DCDC3_V_OUT_MASK,
 569                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC3_MASK),
 570         AXP_DESC(AXP22X, DCDC4, "dcdc4", "vin4", 600, 1540, 20,
 571                  AXP22X_DCDC4_V_OUT, AXP22X_DCDC4_V_OUT_MASK,
 572                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC4_MASK),
 573         AXP_DESC(AXP22X, DCDC5, "dcdc5", "vin5", 1000, 2550, 50,
 574                  AXP22X_DCDC5_V_OUT, AXP22X_DCDC5_V_OUT_MASK,
 575                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC5_MASK),
 576         /* secondary switchable output of DCDC1 */
 577         AXP_DESC_SW(AXP22X, DC1SW, "dc1sw", NULL,
 578                     AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DC1SW_MASK),
 579         /* LDO regulator internally chained to DCDC5 */
 580         AXP_DESC(AXP22X, DC5LDO, "dc5ldo", NULL, 700, 1400, 100,
 581                  AXP22X_DC5LDO_V_OUT, AXP22X_DC5LDO_V_OUT_MASK,
 582                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DC5LDO_MASK),
 583         AXP_DESC(AXP22X, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
 584                  AXP22X_ALDO1_V_OUT, AXP22X_ALDO1_V_OUT_MASK,
 585                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_ALDO1_MASK),
 586         AXP_DESC(AXP22X, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
 587                  AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT_MASK,
 588                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_ALDO2_MASK),
 589         AXP_DESC(AXP22X, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
 590                  AXP22X_ALDO3_V_OUT, AXP22X_ALDO3_V_OUT_MASK,
 591                  AXP22X_PWR_OUT_CTRL3, AXP22X_PWR_OUT_ALDO3_MASK),
 592         AXP_DESC(AXP22X, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
 593                  AXP22X_DLDO1_V_OUT, AXP22X_DLDO1_V_OUT_MASK,
 594                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO1_MASK),
 595         AXP_DESC(AXP22X, DLDO2, "dldo2", "dldoin", 700, 3300, 100,
 596                  AXP22X_DLDO2_V_OUT, AXP22X_PWR_OUT_DLDO2_MASK,
 597                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO2_MASK),
 598         AXP_DESC(AXP22X, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
 599                  AXP22X_DLDO3_V_OUT, AXP22X_DLDO3_V_OUT_MASK,
 600                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO3_MASK),
 601         AXP_DESC(AXP22X, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
 602                  AXP22X_DLDO4_V_OUT, AXP22X_DLDO4_V_OUT_MASK,
 603                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO4_MASK),
 604         AXP_DESC(AXP22X, ELDO1, "eldo1", "eldoin", 700, 3300, 100,
 605                  AXP22X_ELDO1_V_OUT, AXP22X_ELDO1_V_OUT_MASK,
 606                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO1_MASK),
 607         AXP_DESC(AXP22X, ELDO2, "eldo2", "eldoin", 700, 3300, 100,
 608                  AXP22X_ELDO2_V_OUT, AXP22X_ELDO2_V_OUT_MASK,
 609                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO2_MASK),
 610         AXP_DESC(AXP22X, ELDO3, "eldo3", "eldoin", 700, 3300, 100,
 611                  AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT_MASK,
 612                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO3_MASK),
 613         /* Note the datasheet only guarantees reliable operation up to
 614          * 3.3V, this needs to be enforced via dts provided constraints */
 615         AXP_DESC_IO(AXP22X, LDO_IO0, "ldo_io0", "ips", 700, 3800, 100,
 616                     AXP22X_LDO_IO0_V_OUT, AXP22X_LDO_IO0_V_OUT_MASK,
 617                     AXP20X_GPIO0_CTRL, AXP20X_GPIO0_FUNC_MASK,
 618                     AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
 619         /* Note the datasheet only guarantees reliable operation up to
 620          * 3.3V, this needs to be enforced via dts provided constraints */
 621         AXP_DESC_IO(AXP22X, LDO_IO1, "ldo_io1", "ips", 700, 3800, 100,
 622                     AXP22X_LDO_IO1_V_OUT, AXP22X_LDO_IO1_V_OUT_MASK,
 623                     AXP20X_GPIO1_CTRL, AXP20X_GPIO1_FUNC_MASK,
 624                     AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
 625         AXP_DESC_FIXED(AXP22X, RTC_LDO, "rtc_ldo", "ips", 3000),
 626 };
 627
 628 static const struct regulator_desc axp22x_drivevbus_regulator = {
 629         .name           = "drivevbus",
 630         .supply_name    = "drivevbus",
 631         .of_match       = of_match_ptr("drivevbus"),
 632         .regulators_node = of_match_ptr("regulators"),
 633         .type           = REGULATOR_VOLTAGE,
 634         .owner          = THIS_MODULE,
 635         .enable_reg     = AXP20X_VBUS_IPSOUT_MGMT,
 636         .enable_mask    = AXP20X_VBUS_IPSOUT_MGMT_MASK,
 637         .ops            = &axp20x_ops_sw,
 638 };
 639
 640 /* DCDC ranges shared with AXP813 */
 641 static const struct linear_range axp803_dcdc234_ranges[] = {
 642         REGULATOR_LINEAR_RANGE(500000,
 643                                AXP803_DCDC234_500mV_START,
 644                                AXP803_DCDC234_500mV_END,
 645                                10000),
 646         REGULATOR_LINEAR_RANGE(1220000,
 647                                AXP803_DCDC234_1220mV_START,
 648                                AXP803_DCDC234_1220mV_END,
 649                                20000),
 650 };
 651
 652 static const struct linear_range axp803_dcdc5_ranges[] = {
 653         REGULATOR_LINEAR_RANGE(800000,
 654                                AXP803_DCDC5_800mV_START,
 655                                AXP803_DCDC5_800mV_END,
 656                                10000),
 657         REGULATOR_LINEAR_RANGE(1140000,
 658                                AXP803_DCDC5_1140mV_START,
 659                                AXP803_DCDC5_1140mV_END,
 660                                20000),
 661 };
 662
 663 static const struct linear_range axp803_dcdc6_ranges[] = {
 664         REGULATOR_LINEAR_RANGE(600000,
 665                                AXP803_DCDC6_600mV_START,
 666                                AXP803_DCDC6_600mV_END,
 667                                10000),
 668         REGULATOR_LINEAR_RANGE(1120000,
 669                                AXP803_DCDC6_1120mV_START,
 670                                AXP803_DCDC6_1120mV_END,
 671                                20000),
 672 };
 673
 674 /* AXP806's CLDO2 and AXP809's DLDO1 share the same range */
 675 static const struct linear_range axp803_dldo2_ranges[] = {
 676         REGULATOR_LINEAR_RANGE(700000,
 677                                AXP803_DLDO2_700mV_START,
 678                                AXP803_DLDO2_700mV_END,
 679                                100000),
 680         REGULATOR_LINEAR_RANGE(3400000,
 681                                AXP803_DLDO2_3400mV_START,
 682                                AXP803_DLDO2_3400mV_END,
 683                                200000),
 684 };
 685
 686 static const struct regulator_desc axp803_regulators[] = {
 687         AXP_DESC(AXP803, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
 688                  AXP803_DCDC1_V_OUT, AXP803_DCDC1_V_OUT_MASK,
 689                  AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC1_MASK),
 690         AXP_DESC_RANGES(AXP803, DCDC2, "dcdc2", "vin2",
 691                         axp803_dcdc234_ranges, AXP803_DCDC234_NUM_VOLTAGES,
 692                         AXP803_DCDC2_V_OUT, AXP803_DCDC2_V_OUT_MASK,
 693                         AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC2_MASK),
 694         AXP_DESC_RANGES(AXP803, DCDC3, "dcdc3", "vin3",
 695                         axp803_dcdc234_ranges, AXP803_DCDC234_NUM_VOLTAGES,
 696                         AXP803_DCDC3_V_OUT, AXP803_DCDC3_V_OUT_MASK,
 697                         AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC3_MASK),
 698         AXP_DESC_RANGES(AXP803, DCDC4, "dcdc4", "vin4",
 699                         axp803_dcdc234_ranges, AXP803_DCDC234_NUM_VOLTAGES,
 700                         AXP803_DCDC4_V_OUT, AXP803_DCDC4_V_OUT_MASK,
 701                         AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC4_MASK),
 702         AXP_DESC_RANGES(AXP803, DCDC5, "dcdc5", "vin5",
 703                         axp803_dcdc5_ranges, AXP803_DCDC5_NUM_VOLTAGES,
 704                         AXP803_DCDC5_V_OUT, AXP803_DCDC5_V_OUT_MASK,
 705                         AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC5_MASK),
 706         AXP_DESC_RANGES(AXP803, DCDC6, "dcdc6", "vin6",
 707                         axp803_dcdc6_ranges, AXP803_DCDC6_NUM_VOLTAGES,
 708                         AXP803_DCDC6_V_OUT, AXP803_DCDC6_V_OUT_MASK,
 709                         AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC6_MASK),
 710         /* secondary switchable output of DCDC1 */
 711         AXP_DESC_SW(AXP803, DC1SW, "dc1sw", NULL,
 712                     AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DC1SW_MASK),
 713         AXP_DESC(AXP803, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
 714                  AXP22X_ALDO1_V_OUT, AXP22X_ALDO1_V_OUT_MASK,
 715                  AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO1_MASK),
 716         AXP_DESC(AXP803, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
 717                  AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT_MASK,
 718                  AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO2_MASK),
 719         AXP_DESC(AXP803, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
 720                  AXP22X_ALDO3_V_OUT, AXP22X_ALDO3_V_OUT_MASK,
 721                  AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO3_MASK),
 722         AXP_DESC(AXP803, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
 723                  AXP22X_DLDO1_V_OUT, AXP22X_DLDO1_V_OUT_MASK,
 724                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO1_MASK),
 725         AXP_DESC_RANGES(AXP803, DLDO2, "dldo2", "dldoin",
 726                         axp803_dldo2_ranges, AXP803_DLDO2_NUM_VOLTAGES,
 727                         AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT_MASK,
 728                         AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO2_MASK),
 729         AXP_DESC(AXP803, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
 730                  AXP22X_DLDO3_V_OUT, AXP22X_DLDO3_V_OUT_MASK,
 731                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO3_MASK),
 732         AXP_DESC(AXP803, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
 733                  AXP22X_DLDO4_V_OUT, AXP22X_DLDO4_V_OUT_MASK,
 734                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO4_MASK),
 735         AXP_DESC(AXP803, ELDO1, "eldo1", "eldoin", 700, 1900, 50,
 736                  AXP22X_ELDO1_V_OUT, AXP22X_ELDO1_V_OUT_MASK,
 737                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO1_MASK),
 738         AXP_DESC(AXP803, ELDO2, "eldo2", "eldoin", 700, 1900, 50,
 739                  AXP22X_ELDO2_V_OUT, AXP22X_ELDO2_V_OUT_MASK,
 740                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO2_MASK),
 741         AXP_DESC(AXP803, ELDO3, "eldo3", "eldoin", 700, 1900, 50,
 742                  AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT_MASK,
 743                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO3_MASK),
 744         AXP_DESC(AXP803, FLDO1, "fldo1", "fldoin", 700, 1450, 50,
 745                  AXP803_FLDO1_V_OUT, AXP803_FLDO1_V_OUT_MASK,
 746                  AXP22X_PWR_OUT_CTRL3, AXP803_PWR_OUT_FLDO1_MASK),
 747         AXP_DESC(AXP803, FLDO2, "fldo2", "fldoin", 700, 1450, 50,
 748                  AXP803_FLDO2_V_OUT, AXP803_FLDO2_V_OUT_MASK,
 749                  AXP22X_PWR_OUT_CTRL3, AXP803_PWR_OUT_FLDO2_MASK),
 750         AXP_DESC_IO(AXP803, LDO_IO0, "ldo-io0", "ips", 700, 3300, 100,
 751                     AXP22X_LDO_IO0_V_OUT, AXP22X_LDO_IO0_V_OUT_MASK,
 752                     AXP20X_GPIO0_CTRL, AXP20X_GPIO0_FUNC_MASK,
 753                     AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
 754         AXP_DESC_IO(AXP803, LDO_IO1, "ldo-io1", "ips", 700, 3300, 100,
 755                     AXP22X_LDO_IO1_V_OUT, AXP22X_LDO_IO1_V_OUT_MASK,
 756                     AXP20X_GPIO1_CTRL, AXP20X_GPIO1_FUNC_MASK,
 757                     AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
 758         AXP_DESC_FIXED(AXP803, RTC_LDO, "rtc-ldo", "ips", 3000),
 759 };
 760
 761 static const struct linear_range axp806_dcdca_ranges[] = {
 762         REGULATOR_LINEAR_RANGE(600000,
 763                                AXP806_DCDCA_600mV_START,
 764                                AXP806_DCDCA_600mV_END,
 765                                10000),
 766         REGULATOR_LINEAR_RANGE(1120000,
 767                                AXP806_DCDCA_1120mV_START,
 768                                AXP806_DCDCA_1120mV_END,
 769                                20000),
 770 };
 771
 772 static const struct linear_range axp806_dcdcd_ranges[] = {
 773         REGULATOR_LINEAR_RANGE(600000,
 774                                AXP806_DCDCD_600mV_START,
 775                                AXP806_DCDCD_600mV_END,
 776                                20000),
 777         REGULATOR_LINEAR_RANGE(1600000,
 778                                AXP806_DCDCD_1600mV_START,
 779                                AXP806_DCDCD_1600mV_END,
 780                                100000),
 781 };
 782
 783 static const struct regulator_desc axp806_regulators[] = {
 784         AXP_DESC_RANGES(AXP806, DCDCA, "dcdca", "vina",
 785                         axp806_dcdca_ranges, AXP806_DCDCA_NUM_VOLTAGES,
 786                         AXP806_DCDCA_V_CTRL, AXP806_DCDCA_V_CTRL_MASK,
 787                         AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCA_MASK),
 788         AXP_DESC(AXP806, DCDCB, "dcdcb", "vinb", 1000, 2550, 50,
 789                  AXP806_DCDCB_V_CTRL, AXP806_DCDCB_V_CTRL_MASK,
 790                  AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCB_MASK),
 791         AXP_DESC_RANGES(AXP806, DCDCC, "dcdcc", "vinc",
 792                         axp806_dcdca_ranges, AXP806_DCDCA_NUM_VOLTAGES,
 793                         AXP806_DCDCC_V_CTRL, AXP806_DCDCC_V_CTRL_MASK,
 794                         AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCC_MASK),
 795         AXP_DESC_RANGES(AXP806, DCDCD, "dcdcd", "vind",
 796                         axp806_dcdcd_ranges, AXP806_DCDCD_NUM_VOLTAGES,
 797                         AXP806_DCDCD_V_CTRL, AXP806_DCDCD_V_CTRL_MASK,
 798                         AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCD_MASK),
 799         AXP_DESC(AXP806, DCDCE, "dcdce", "vine", 1100, 3400, 100,
 800                  AXP806_DCDCE_V_CTRL, AXP806_DCDCE_V_CTRL_MASK,
 801                  AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCE_MASK),
 802         AXP_DESC(AXP806, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
 803                  AXP806_ALDO1_V_CTRL, AXP806_ALDO1_V_CTRL_MASK,
 804                  AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_ALDO1_MASK),
 805         AXP_DESC(AXP806, ALDO2, "aldo2", "aldoin", 700, 3400, 100,
 806                  AXP806_ALDO2_V_CTRL, AXP806_ALDO2_V_CTRL_MASK,
 807                  AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_ALDO2_MASK),
 808         AXP_DESC(AXP806, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
 809                  AXP806_ALDO3_V_CTRL, AXP806_ALDO3_V_CTRL_MASK,
 810                  AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_ALDO3_MASK),
 811         AXP_DESC(AXP806, BLDO1, "bldo1", "bldoin", 700, 1900, 100,
 812                  AXP806_BLDO1_V_CTRL, AXP806_BLDO1_V_CTRL_MASK,
 813                  AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO1_MASK),
 814         AXP_DESC(AXP806, BLDO2, "bldo2", "bldoin", 700, 1900, 100,
 815                  AXP806_BLDO2_V_CTRL, AXP806_BLDO2_V_CTRL_MASK,
 816                  AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO2_MASK),
 817         AXP_DESC(AXP806, BLDO3, "bldo3", "bldoin", 700, 1900, 100,
 818                  AXP806_BLDO3_V_CTRL, AXP806_BLDO3_V_CTRL_MASK,
 819                  AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO3_MASK),
 820         AXP_DESC(AXP806, BLDO4, "bldo4", "bldoin", 700, 1900, 100,
 821                  AXP806_BLDO4_V_CTRL, AXP806_BLDO4_V_CTRL_MASK,
 822                  AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO4_MASK),
 823         AXP_DESC(AXP806, CLDO1, "cldo1", "cldoin", 700, 3300, 100,
 824                  AXP806_CLDO1_V_CTRL, AXP806_CLDO1_V_CTRL_MASK,
 825                  AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_CLDO1_MASK),
 826         AXP_DESC_RANGES(AXP806, CLDO2, "cldo2", "cldoin",
 827                         axp803_dldo2_ranges, AXP803_DLDO2_NUM_VOLTAGES,
 828                         AXP806_CLDO2_V_CTRL, AXP806_CLDO2_V_CTRL_MASK,
 829                         AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_CLDO2_MASK),
 830         AXP_DESC(AXP806, CLDO3, "cldo3", "cldoin", 700, 3300, 100,
 831                  AXP806_CLDO3_V_CTRL, AXP806_CLDO3_V_CTRL_MASK,
 832                  AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_CLDO3_MASK),
 833         AXP_DESC_SW(AXP806, SW, "sw", "swin",
 834                     AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_SW_MASK),
 835 };
 836
 837 static const struct linear_range axp809_dcdc4_ranges[] = {
 838         REGULATOR_LINEAR_RANGE(600000,
 839                                AXP809_DCDC4_600mV_START,
 840                                AXP809_DCDC4_600mV_END,
 841                                20000),
 842         REGULATOR_LINEAR_RANGE(1800000,
 843                                AXP809_DCDC4_1800mV_START,
 844                                AXP809_DCDC4_1800mV_END,
 845                                100000),
 846 };
 847
 848 static const struct regulator_desc axp809_regulators[] = {
 849         AXP_DESC(AXP809, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
 850                  AXP22X_DCDC1_V_OUT, AXP22X_DCDC1_V_OUT_MASK,
 851                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC1_MASK),
 852         AXP_DESC(AXP809, DCDC2, "dcdc2", "vin2", 600, 1540, 20,
 853                  AXP22X_DCDC2_V_OUT, AXP22X_DCDC2_V_OUT_MASK,
 854                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC2_MASK),
 855         AXP_DESC(AXP809, DCDC3, "dcdc3", "vin3", 600, 1860, 20,
 856                  AXP22X_DCDC3_V_OUT, AXP22X_DCDC3_V_OUT_MASK,
 857                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC3_MASK),
 858         AXP_DESC_RANGES(AXP809, DCDC4, "dcdc4", "vin4",
 859                         axp809_dcdc4_ranges, AXP809_DCDC4_NUM_VOLTAGES,
 860                         AXP22X_DCDC4_V_OUT, AXP22X_DCDC4_V_OUT_MASK,
 861                         AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC4_MASK),
 862         AXP_DESC(AXP809, DCDC5, "dcdc5", "vin5", 1000, 2550, 50,
 863                  AXP22X_DCDC5_V_OUT, AXP22X_DCDC5_V_OUT_MASK,
 864                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC5_MASK),
 865         /* secondary switchable output of DCDC1 */
 866         AXP_DESC_SW(AXP809, DC1SW, "dc1sw", NULL,
 867                     AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DC1SW_MASK),
 868         /* LDO regulator internally chained to DCDC5 */
 869         AXP_DESC(AXP809, DC5LDO, "dc5ldo", NULL, 700, 1400, 100,
 870                  AXP22X_DC5LDO_V_OUT, AXP22X_DC5LDO_V_OUT_MASK,
 871                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DC5LDO_MASK),
 872         AXP_DESC(AXP809, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
 873                  AXP22X_ALDO1_V_OUT, AXP22X_ALDO1_V_OUT_MASK,
 874                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_ALDO1_MASK),
 875         AXP_DESC(AXP809, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
 876                  AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT_MASK,
 877                  AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_ALDO2_MASK),
 878         AXP_DESC(AXP809, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
 879                  AXP22X_ALDO3_V_OUT, AXP22X_ALDO3_V_OUT_MASK,
 880                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ALDO3_MASK),
 881         AXP_DESC_RANGES(AXP809, DLDO1, "dldo1", "dldoin",
 882                         axp803_dldo2_ranges, AXP803_DLDO2_NUM_VOLTAGES,
 883                         AXP22X_DLDO1_V_OUT, AXP22X_DLDO1_V_OUT_MASK,
 884                         AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO1_MASK),
 885         AXP_DESC(AXP809, DLDO2, "dldo2", "dldoin", 700, 3300, 100,
 886                  AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT_MASK,
 887                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO2_MASK),
 888         AXP_DESC(AXP809, ELDO1, "eldo1", "eldoin", 700, 3300, 100,
 889                  AXP22X_ELDO1_V_OUT, AXP22X_ELDO1_V_OUT_MASK,
 890                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO1_MASK),
 891         AXP_DESC(AXP809, ELDO2, "eldo2", "eldoin", 700, 3300, 100,
 892                  AXP22X_ELDO2_V_OUT, AXP22X_ELDO2_V_OUT_MASK,
 893                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO2_MASK),
 894         AXP_DESC(AXP809, ELDO3, "eldo3", "eldoin", 700, 3300, 100,
 895                  AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT_MASK,
 896                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO3_MASK),
 897         /*
 898          * Note the datasheet only guarantees reliable operation up to
 899          * 3.3V, this needs to be enforced via dts provided constraints
 900          */
 901         AXP_DESC_IO(AXP809, LDO_IO0, "ldo_io0", "ips", 700, 3800, 100,
 902                     AXP22X_LDO_IO0_V_OUT, AXP22X_LDO_IO0_V_OUT_MASK,
 903                     AXP20X_GPIO0_CTRL, AXP20X_GPIO0_FUNC_MASK,
 904                     AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
 905         /*
 906          * Note the datasheet only guarantees reliable operation up to
 907          * 3.3V, this needs to be enforced via dts provided constraints
 908          */
 909         AXP_DESC_IO(AXP809, LDO_IO1, "ldo_io1", "ips", 700, 3800, 100,
 910                     AXP22X_LDO_IO1_V_OUT, AXP22X_LDO_IO1_V_OUT_MASK,
 911                     AXP20X_GPIO1_CTRL, AXP20X_GPIO1_FUNC_MASK,
 912                     AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
 913         AXP_DESC_FIXED(AXP809, RTC_LDO, "rtc_ldo", "ips", 1800),
 914         AXP_DESC_SW(AXP809, SW, "sw", "swin",
 915                     AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_SW_MASK),
 916 };
 917
 918 static const struct regulator_desc axp813_regulators[] = {
 919         AXP_DESC(AXP813, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
 920                  AXP803_DCDC1_V_OUT, AXP803_DCDC1_V_OUT_MASK,
 921                  AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC1_MASK),
 922         AXP_DESC_RANGES(AXP813, DCDC2, "dcdc2", "vin2",
 923                         axp803_dcdc234_ranges, AXP803_DCDC234_NUM_VOLTAGES,
 924                         AXP803_DCDC2_V_OUT, AXP803_DCDC2_V_OUT_MASK,
 925                         AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC2_MASK),
 926         AXP_DESC_RANGES(AXP813, DCDC3, "dcdc3", "vin3",
 927                         axp803_dcdc234_ranges, AXP803_DCDC234_NUM_VOLTAGES,
 928                         AXP803_DCDC3_V_OUT, AXP803_DCDC3_V_OUT_MASK,
 929                         AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC3_MASK),
 930         AXP_DESC_RANGES(AXP813, DCDC4, "dcdc4", "vin4",
 931                         axp803_dcdc234_ranges, AXP803_DCDC234_NUM_VOLTAGES,
 932                         AXP803_DCDC4_V_OUT, AXP803_DCDC4_V_OUT_MASK,
 933                         AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC4_MASK),
 934         AXP_DESC_RANGES(AXP813, DCDC5, "dcdc5", "vin5",
 935                         axp803_dcdc5_ranges, AXP803_DCDC5_NUM_VOLTAGES,
 936                         AXP803_DCDC5_V_OUT, AXP803_DCDC5_V_OUT_MASK,
 937                         AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC5_MASK),
 938         AXP_DESC_RANGES(AXP813, DCDC6, "dcdc6", "vin6",
 939                         axp803_dcdc6_ranges, AXP803_DCDC6_NUM_VOLTAGES,
 940                         AXP803_DCDC6_V_OUT, AXP803_DCDC6_V_OUT_MASK,
 941                         AXP22X_PWR_OUT_CTRL1, AXP803_PWR_OUT_DCDC6_MASK),
 942         AXP_DESC_RANGES(AXP813, DCDC7, "dcdc7", "vin7",
 943                         axp803_dcdc6_ranges, AXP803_DCDC6_NUM_VOLTAGES,
 944                         AXP813_DCDC7_V_OUT, AXP813_DCDC7_V_OUT_MASK,
 945                         AXP22X_PWR_OUT_CTRL1, AXP813_PWR_OUT_DCDC7_MASK),
 946         AXP_DESC(AXP813, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
 947                  AXP22X_ALDO1_V_OUT, AXP22X_ALDO1_V_OUT_MASK,
 948                  AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO1_MASK),
 949         AXP_DESC(AXP813, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
 950                  AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT_MASK,
 951                  AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO2_MASK),
 952         AXP_DESC(AXP813, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
 953                  AXP22X_ALDO3_V_OUT, AXP22X_ALDO3_V_OUT_MASK,
 954                  AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO3_MASK),
 955         AXP_DESC(AXP813, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
 956                  AXP22X_DLDO1_V_OUT, AXP22X_DLDO1_V_OUT_MASK,
 957                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO1_MASK),
 958         AXP_DESC_RANGES(AXP813, DLDO2, "dldo2", "dldoin",
 959                         axp803_dldo2_ranges, AXP803_DLDO2_NUM_VOLTAGES,
 960                         AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT_MASK,
 961                         AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO2_MASK),
 962         AXP_DESC(AXP813, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
 963                  AXP22X_DLDO3_V_OUT, AXP22X_DLDO3_V_OUT_MASK,
 964                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO3_MASK),
 965         AXP_DESC(AXP813, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
 966                  AXP22X_DLDO4_V_OUT, AXP22X_DLDO4_V_OUT_MASK,
 967                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO4_MASK),
 968         AXP_DESC(AXP813, ELDO1, "eldo1", "eldoin", 700, 1900, 50,
 969                  AXP22X_ELDO1_V_OUT, AXP22X_ELDO1_V_OUT_MASK,
 970                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO1_MASK),
 971         AXP_DESC(AXP813, ELDO2, "eldo2", "eldoin", 700, 1900, 50,
 972                  AXP22X_ELDO2_V_OUT, AXP22X_ELDO2_V_OUT_MASK,
 973                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO2_MASK),
 974         AXP_DESC(AXP813, ELDO3, "eldo3", "eldoin", 700, 1900, 50,
 975                  AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT_MASK,
 976                  AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO3_MASK),
 977         /* to do / check ... */
 978         AXP_DESC(AXP813, FLDO1, "fldo1", "fldoin", 700, 1450, 50,
 979                  AXP803_FLDO1_V_OUT, AXP803_FLDO1_V_OUT_MASK,
 980                  AXP22X_PWR_OUT_CTRL3, AXP803_PWR_OUT_FLDO1_MASK),
 981         AXP_DESC(AXP813, FLDO2, "fldo2", "fldoin", 700, 1450, 50,
 982                  AXP803_FLDO2_V_OUT, AXP803_FLDO2_V_OUT_MASK,
 983                  AXP22X_PWR_OUT_CTRL3, AXP803_PWR_OUT_FLDO2_MASK),
 984         /*
 985          * TODO: FLDO3 = {DCDC5, FLDOIN} / 2
 986          *
 987          * This means FLDO3 effectively switches supplies at runtime,
 988          * something the regulator subsystem does not support.
 989          */
 990         AXP_DESC_FIXED(AXP813, RTC_LDO, "rtc-ldo", "ips", 1800),
 991         AXP_DESC_IO(AXP813, LDO_IO0, "ldo-io0", "ips", 700, 3300, 100,
 992                     AXP22X_LDO_IO0_V_OUT, AXP22X_LDO_IO0_V_OUT_MASK,
 993                     AXP20X_GPIO0_CTRL, AXP20X_GPIO0_FUNC_MASK,
 994                     AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
 995         AXP_DESC_IO(AXP813, LDO_IO1, "ldo-io1", "ips", 700, 3300, 100,
 996                     AXP22X_LDO_IO1_V_OUT, AXP22X_LDO_IO1_V_OUT_MASK,
 997                     AXP20X_GPIO1_CTRL, AXP20X_GPIO1_FUNC_MASK,
 998                     AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
 999         AXP_DESC_SW(AXP813, SW, "sw", "swin",
1000                     AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DC1SW_MASK),
1001 };
1002
1003 static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
1004 {
1005         struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
1006         unsigned int reg = AXP20X_DCDC_FREQ;
1007         u32 min, max, def, step;
1008
1009         switch (axp20x->variant) {
1010         case AXP202_ID:
1011         case AXP209_ID:
1012                 min = 750;
1013                 max = 1875;
1014                 def = 1500;
1015                 step = 75;
1016                 break;
1017         case AXP803_ID:
1018         case AXP813_ID:
1019                 /*
1020                  * AXP803/AXP813 DCDC work frequency setting has the same
1021                  * range and step as AXP22X, but at a different register.
1022                  * (See include/linux/mfd/axp20x.h)
1023                  */
1024                 reg = AXP803_DCDC_FREQ_CTRL;
1025                 fallthrough;    /* to the check below */
1026         case AXP806_ID:
1027                 /*
1028                  * AXP806 also have DCDC work frequency setting register at a
1029                  * different position.
1030                  */
1031                 if (axp20x->variant == AXP806_ID)
1032                         reg = AXP806_DCDC_FREQ_CTRL;
1033                 fallthrough;
1034         case AXP221_ID:
1035         case AXP223_ID:
1036         case AXP809_ID:
1037                 min = 1800;
1038                 max = 4050;
1039                 def = 3000;
1040                 step = 150;
1041                 break;
1042         default:
1043                 dev_err(&pdev->dev,
1044                         "Setting DCDC frequency for unsupported AXP variant\n");
1045                 return -EINVAL;
1046         }
1047
1048         if (dcdcfreq == 0)
1049                 dcdcfreq = def;
1050
1051         if (dcdcfreq < min) {
1052                 dcdcfreq = min;
1053                 dev_warn(&pdev->dev, "DCDC frequency too low. Set to %ukHz\n",
1054                          min);
1055         }
1056
1057         if (dcdcfreq > max) {
1058                 dcdcfreq = max;
1059                 dev_warn(&pdev->dev, "DCDC frequency too high. Set to %ukHz\n",
1060                          max);
1061         }
1062
1063         dcdcfreq = (dcdcfreq - min) / step;
1064
1065         return regmap_update_bits(axp20x->regmap, reg,
1066                                   AXP20X_FREQ_DCDC_MASK, dcdcfreq);
1067 }
1068
1069 static int axp20x_regulator_parse_dt(struct platform_device *pdev)
1070 {
1071         struct device_node *np, *regulators;
1072         int ret;
1073         u32 dcdcfreq = 0;
1074
1075         np = of_node_get(pdev->dev.parent->of_node);
1076         if (!np)
1077                 return 0;
1078
1079         regulators = of_get_child_by_name(np, "regulators");
1080         if (!regulators) {
1081                 dev_warn(&pdev->dev, "regulators node not found\n");
1082         } else {
1083                 of_property_read_u32(regulators, "x-powers,dcdc-freq", &dcdcfreq);
1084                 ret = axp20x_set_dcdc_freq(pdev, dcdcfreq);
1085                 if (ret < 0) {
1086                         dev_err(&pdev->dev, "Error setting dcdc frequency: %d\n", ret);
1087                         return ret;
1088                 }
1089
1090                 of_node_put(regulators);
1091         }
1092
1093         return 0;
1094 }
1095
1096 static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 workmode)
1097 {
1098         struct axp20x_dev *axp20x = rdev_get_drvdata(rdev);
1099         unsigned int reg = AXP20X_DCDC_MODE;
1100         unsigned int mask;
1101
1102         switch (axp20x->variant) {
1103         case AXP202_ID:
1104         case AXP209_ID:
1105                 if ((id != AXP20X_DCDC2) && (id != AXP20X_DCDC3))
1106                         return -EINVAL;
1107
1108                 mask = AXP20X_WORKMODE_DCDC2_MASK;
1109                 if (id == AXP20X_DCDC3)
1110                         mask = AXP20X_WORKMODE_DCDC3_MASK;
1111
1112                 workmode <<= ffs(mask) - 1;
1113                 break;
1114
1115         case AXP806_ID:
1116                 /*
1117                  * AXP806 DCDC regulator IDs have the same range as AXP22X.
1118                  * (See include/linux/mfd/axp20x.h)
1119                  */
1120                 reg = AXP806_DCDC_MODE_CTRL2;
1121                 fallthrough;    /* to the check below */
1122         case AXP221_ID:
1123         case AXP223_ID:
1124         case AXP809_ID:
1125                 if (id < AXP22X_DCDC1 || id > AXP22X_DCDC5)
1126                         return -EINVAL;
1127
1128                 mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP22X_DCDC1);
1129                 workmode <<= id - AXP22X_DCDC1;
1130                 break;
1131
1132         case AXP803_ID:
1133                 if (id < AXP803_DCDC1 || id > AXP803_DCDC6)
1134                         return -EINVAL;
1135
1136                 mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP803_DCDC1);
1137                 workmode <<= id - AXP803_DCDC1;
1138                 break;
1139
1140         case AXP813_ID:
1141                 if (id < AXP813_DCDC1 || id > AXP813_DCDC7)
1142                         return -EINVAL;
1143
1144                 mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP813_DCDC1);
1145                 workmode <<= id - AXP813_DCDC1;
1146                 break;
1147
1148         default:
1149                 /* should not happen */
1150                 WARN_ON(1);
1151                 return -EINVAL;
1152         }
1153
1154         return regmap_update_bits(rdev->regmap, reg, mask, workmode);
1155 }
1156
1157 /*
1158  * This function checks whether a regulator is part of a poly-phase
1159  * output setup based on the registers settings. Returns true if it is.
1160  */
1161 static bool axp20x_is_polyphase_slave(struct axp20x_dev *axp20x, int id)
1162 {
1163         u32 reg = 0;
1164
1165         /*
1166          * Currently in our supported AXP variants, only AXP803, AXP806,
1167          * and AXP813 have polyphase regulators.
1168          */
1169         switch (axp20x->variant) {
1170         case AXP803_ID:
1171         case AXP813_ID:
1172                 regmap_read(axp20x->regmap, AXP803_POLYPHASE_CTRL, &reg);
1173
1174                 switch (id) {
1175                 case AXP803_DCDC3:
1176                         return !!(reg & AXP803_DCDC23_POLYPHASE_DUAL);
1177                 case AXP803_DCDC6:
1178                         return !!(reg & AXP803_DCDC56_POLYPHASE_DUAL);
1179                 }
1180                 break;
1181
1182         case AXP806_ID:
1183                 regmap_read(axp20x->regmap, AXP806_DCDC_MODE_CTRL2, &reg);
1184
1185                 switch (id) {
1186                 case AXP806_DCDCB:
1187                         return (((reg & AXP806_DCDCABC_POLYPHASE_MASK) ==
1188                                 AXP806_DCDCAB_POLYPHASE_DUAL) ||
1189                                 ((reg & AXP806_DCDCABC_POLYPHASE_MASK) ==
1190                                 AXP806_DCDCABC_POLYPHASE_TRI));
1191                 case AXP806_DCDCC:
1192                         return ((reg & AXP806_DCDCABC_POLYPHASE_MASK) ==
1193                                 AXP806_DCDCABC_POLYPHASE_TRI);
1194                 case AXP806_DCDCE:
1195                         return !!(reg & AXP806_DCDCDE_POLYPHASE_DUAL);
1196                 }
1197                 break;
1198
1199         default:
1200                 return false;
1201         }
1202
1203         return false;
1204 }
1205
1206 static int axp20x_regulator_probe(struct platform_device *pdev)
1207 {
1208         struct regulator_dev *rdev;
1209         struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
1210         const struct regulator_desc *regulators;
1211         struct regulator_config config = {
1212                 .dev = pdev->dev.parent,
1213                 .regmap = axp20x->regmap,
1214                 .driver_data = axp20x,
1215         };
1216         int ret, i, nregulators;
1217         u32 workmode;
1218         const char *dcdc1_name = axp22x_regulators[AXP22X_DCDC1].name;
1219         const char *dcdc5_name = axp22x_regulators[AXP22X_DCDC5].name;
1220         bool drivevbus = false;
1221
1222         switch (axp20x->variant) {
1223         case AXP202_ID:
1224         case AXP209_ID:
1225                 regulators = axp20x_regulators;
1226                 nregulators = AXP20X_REG_ID_MAX;
1227                 break;
1228         case AXP221_ID:
1229         case AXP223_ID:
1230                 regulators = axp22x_regulators;
1231                 nregulators = AXP22X_REG_ID_MAX;
1232                 drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
1233                                                   "x-powers,drive-vbus-en");
1234                 break;
1235         case AXP803_ID:
1236                 regulators = axp803_regulators;
1237                 nregulators = AXP803_REG_ID_MAX;
1238                 drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
1239                                                   "x-powers,drive-vbus-en");
1240                 break;
1241         case AXP806_ID:
1242                 regulators = axp806_regulators;
1243                 nregulators = AXP806_REG_ID_MAX;
1244                 break;
1245         case AXP809_ID:
1246                 regulators = axp809_regulators;
1247                 nregulators = AXP809_REG_ID_MAX;
1248                 break;
1249         case AXP813_ID:
1250                 regulators = axp813_regulators;
1251                 nregulators = AXP813_REG_ID_MAX;
1252                 drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
1253                                                   "x-powers,drive-vbus-en");
1254                 break;
1255         default:
1256                 dev_err(&pdev->dev, "Unsupported AXP variant: %ld\n",
1257                         axp20x->variant);
1258                 return -EINVAL;
1259         }
1260
1261         /* This only sets the dcdc freq. Ignore any errors */
1262         axp20x_regulator_parse_dt(pdev);
1263
1264         for (i = 0; i < nregulators; i++) {
1265                 const struct regulator_desc *desc = &regulators[i];
1266                 struct regulator_desc *new_desc;
1267
1268                 /*
1269                  * If this regulator is a slave in a poly-phase setup,
1270                  * skip it, as its controls are bound to the master
1271                  * regulator and won't work.
1272                  */
1273                 if (axp20x_is_polyphase_slave(axp20x, i))
1274                         continue;
1275
1276                 /* Support for AXP813's FLDO3 is not implemented */
1277                 if (axp20x->variant == AXP813_ID && i == AXP813_FLDO3)
1278                         continue;
1279
1280                 /*
1281                  * Regulators DC1SW and DC5LDO are connected internally,
1282                  * so we have to handle their supply names separately.
1283                  *
1284                  * We always register the regulators in proper sequence,
1285                  * so the supply names are correctly read. See the last
1286                  * part of this loop to see where we save the DT defined
1287                  * name.
1288                  */
1289                 if ((regulators == axp22x_regulators && i == AXP22X_DC1SW) ||
1290                     (regulators == axp803_regulators && i == AXP803_DC1SW) ||
1291                     (regulators == axp809_regulators && i == AXP809_DC1SW)) {
1292                         new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
1293                                                 GFP_KERNEL);
1294                         if (!new_desc)
1295                                 return -ENOMEM;
1296
1297                         *new_desc = regulators[i];
1298                         new_desc->supply_name = dcdc1_name;
1299                         desc = new_desc;
1300                 }
1301
1302                 if ((regulators == axp22x_regulators && i == AXP22X_DC5LDO) ||
1303                     (regulators == axp809_regulators && i == AXP809_DC5LDO)) {
1304                         new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
1305                                                 GFP_KERNEL);
1306                         if (!new_desc)
1307                                 return -ENOMEM;
1308
1309                         *new_desc = regulators[i];
1310                         new_desc->supply_name = dcdc5_name;
1311                         desc = new_desc;
1312                 }
1313
1314                 rdev = devm_regulator_register(&pdev->dev, desc, &config);
1315                 if (IS_ERR(rdev)) {
1316                         dev_err(&pdev->dev, "Failed to register %s\n",
1317                                 regulators[i].name);
1318
1319                         return PTR_ERR(rdev);
1320                 }
1321
1322                 ret = of_property_read_u32(rdev->dev.of_node,
1323                                            "x-powers,dcdc-workmode",
1324                                            &workmode);
1325                 if (!ret) {
1326                         if (axp20x_set_dcdc_workmode(rdev, i, workmode))
1327                                 dev_err(&pdev->dev, "Failed to set workmode on %s\n",
1328                                         rdev->desc->name);
1329                 }
1330
1331                 /*
1332                  * Save AXP22X DCDC1 / DCDC5 regulator names for later.
1333                  */
1334                 if ((regulators == axp22x_regulators && i == AXP22X_DCDC1) ||
1335                     (regulators == axp809_regulators && i == AXP809_DCDC1))
1336                         of_property_read_string(rdev->dev.of_node,
1337                                                 "regulator-name",
1338                                                 &dcdc1_name);
1339
1340                 if ((regulators == axp22x_regulators && i == AXP22X_DCDC5) ||
1341                     (regulators == axp809_regulators && i == AXP809_DCDC5))
1342                         of_property_read_string(rdev->dev.of_node,
1343                                                 "regulator-name",
1344                                                 &dcdc5_name);
1345         }
1346
1347         if (drivevbus) {
1348                 /* Change N_VBUSEN sense pin to DRIVEVBUS output pin */
1349                 regmap_update_bits(axp20x->regmap, AXP20X_OVER_TMP,
1350                                    AXP22X_MISC_N_VBUSEN_FUNC, 0);
1351                 rdev = devm_regulator_register(&pdev->dev,
1352                                                &axp22x_drivevbus_regulator,
1353                                                &config);
1354                 if (IS_ERR(rdev)) {
1355                         dev_err(&pdev->dev, "Failed to register drivevbus\n");
1356                         return PTR_ERR(rdev);
1357                 }
1358         }
1359
1360         return 0;
1361 }
1362
1363 static struct platform_driver axp20x_regulator_driver = {
1364         .probe  = axp20x_regulator_probe,
1365         .driver = {
1366                 .name           = "axp20x-regulator",
1367         },
1368 };
1369
1370 module_platform_driver(axp20x_regulator_driver);
1371
1372 MODULE_LICENSE("GPL v2");
1373 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
1374 MODULE_DESCRIPTION("Regulator Driver for AXP20X PMIC");
1375 MODULE_ALIAS("platform:axp20x-regulator");