drivers/regulator/ab8500.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) ST-Ericsson SA 2010
   4  *
   5  * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
   6  *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
   7  *          Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
   8  *
   9  * AB8500 peripheral regulators
  10  *
  11  * AB8500 supports the following regulators:
  12  *   VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  13  *
  14  * AB8505 supports the following regulators:
  15  *   VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  16  */
  17 #include <linux/init.h>
  18 #include <linux/kernel.h>
  19 #include <linux/module.h>
  20 #include <linux/err.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/mfd/abx500.h>
  23 #include <linux/mfd/abx500/ab8500.h>
  24 #include <linux/of.h>
  25 #include <linux/regulator/of_regulator.h>
  26 #include <linux/regulator/driver.h>
  27 #include <linux/regulator/machine.h>
  28 #include <linux/regulator/ab8500.h>
  29 #include <linux/slab.h>
  30
  31 /**
  32  * struct ab8500_shared_mode - is used when mode is shared between
  33  * two regulators.
  34  * @shared_regulator: pointer to the other sharing regulator
  35  * @lp_mode_req: low power mode requested by this regulator
  36  */
  37 struct ab8500_shared_mode {
  38         struct ab8500_regulator_info *shared_regulator;
  39         bool lp_mode_req;
  40 };
  41
  42 /**
  43  * struct ab8500_regulator_info - ab8500 regulator information
  44  * @dev: device pointer
  45  * @desc: regulator description
  46  * @shared_mode: used when mode is shared between two regulators
  47  * @load_lp_uA: maximum load in idle (low power) mode
  48  * @update_bank: bank to control on/off
  49  * @update_reg: register to control on/off
  50  * @update_mask: mask to enable/disable and set mode of regulator
  51  * @update_val: bits holding the regulator current mode
  52  * @update_val_idle: bits to enable the regulator in idle (low power) mode
  53  * @update_val_normal: bits to enable the regulator in normal (high power) mode
  54  * @mode_bank: bank with location of mode register
  55  * @mode_reg: mode register
  56  * @mode_mask: mask for setting mode
  57  * @mode_val_idle: mode setting for low power
  58  * @mode_val_normal: mode setting for normal power
  59  * @voltage_bank: bank to control regulator voltage
  60  * @voltage_reg: register to control regulator voltage
  61  * @voltage_mask: mask to control regulator voltage
  62  */
  63 struct ab8500_regulator_info {
  64         struct device           *dev;
  65         struct regulator_desc   desc;
  66         struct ab8500_shared_mode *shared_mode;
  67         int load_lp_uA;
  68         u8 update_bank;
  69         u8 update_reg;
  70         u8 update_mask;
  71         u8 update_val;
  72         u8 update_val_idle;
  73         u8 update_val_normal;
  74         u8 mode_bank;
  75         u8 mode_reg;
  76         u8 mode_mask;
  77         u8 mode_val_idle;
  78         u8 mode_val_normal;
  79         u8 voltage_bank;
  80         u8 voltage_reg;
  81         u8 voltage_mask;
  82         struct {
  83                 u8 voltage_limit;
  84                 u8 voltage_bank;
  85                 u8 voltage_reg;
  86                 u8 voltage_mask;
  87         } expand_register;
  88 };
  89
  90 /* voltage tables for the vauxn/vintcore supplies */
  91 static const unsigned int ldo_vauxn_voltages[] = {
  92         1100000,
  93         1200000,
  94         1300000,
  95         1400000,
  96         1500000,
  97         1800000,
  98         1850000,
  99         1900000,
 100         2500000,
 101         2650000,
 102         2700000,
 103         2750000,
 104         2800000,
 105         2900000,
 106         3000000,
 107         3300000,
 108 };
 109
 110 static const unsigned int ldo_vaux3_voltages[] = {
 111         1200000,
 112         1500000,
 113         1800000,
 114         2100000,
 115         2500000,
 116         2750000,
 117         2790000,
 118         2910000,
 119 };
 120
 121 static const unsigned int ldo_vaux56_voltages[] = {
 122         1800000,
 123         1050000,
 124         1100000,
 125         1200000,
 126         1500000,
 127         2200000,
 128         2500000,
 129         2790000,
 130 };
 131
 132 static const unsigned int ldo_vintcore_voltages[] = {
 133         1200000,
 134         1225000,
 135         1250000,
 136         1275000,
 137         1300000,
 138         1325000,
 139         1350000,
 140 };
 141
 142 static const unsigned int ldo_sdio_voltages[] = {
 143         1160000,
 144         1050000,
 145         1100000,
 146         1500000,
 147         1800000,
 148         2200000,
 149         2910000,
 150         3050000,
 151 };
 152
 153 static const unsigned int fixed_1200000_voltage[] = {
 154         1200000,
 155 };
 156
 157 static const unsigned int fixed_1800000_voltage[] = {
 158         1800000,
 159 };
 160
 161 static const unsigned int fixed_2000000_voltage[] = {
 162         2000000,
 163 };
 164
 165 static const unsigned int fixed_2050000_voltage[] = {
 166         2050000,
 167 };
 168
 169 static const unsigned int fixed_3300000_voltage[] = {
 170         3300000,
 171 };
 172
 173 static const unsigned int ldo_vana_voltages[] = {
 174         1050000,
 175         1075000,
 176         1100000,
 177         1125000,
 178         1150000,
 179         1175000,
 180         1200000,
 181         1225000,
 182 };
 183
 184 static const unsigned int ldo_vaudio_voltages[] = {
 185         2000000,
 186         2100000,
 187         2200000,
 188         2300000,
 189         2400000,
 190         2500000,
 191         2600000,
 192         2600000,        /* Duplicated in Vaudio and IsoUicc Control register. */
 193 };
 194
 195 static const unsigned int ldo_vdmic_voltages[] = {
 196         1800000,
 197         1900000,
 198         2000000,
 199         2850000,
 200 };
 201
 202 static DEFINE_MUTEX(shared_mode_mutex);
 203 static struct ab8500_shared_mode ldo_anamic1_shared;
 204 static struct ab8500_shared_mode ldo_anamic2_shared;
 205
 206 static int ab8500_regulator_enable(struct regulator_dev *rdev)
 207 {
 208         int ret;
 209         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 210
 211         if (info == NULL) {
 212                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 213                 return -EINVAL;
 214         }
 215
 216         ret = abx500_mask_and_set_register_interruptible(info->dev,
 217                 info->update_bank, info->update_reg,
 218                 info->update_mask, info->update_val);
 219         if (ret < 0) {
 220                 dev_err(rdev_get_dev(rdev),
 221                         "couldn't set enable bits for regulator\n");
 222                 return ret;
 223         }
 224
 225         dev_vdbg(rdev_get_dev(rdev),
 226                 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 227                 info->desc.name, info->update_bank, info->update_reg,
 228                 info->update_mask, info->update_val);
 229
 230         return ret;
 231 }
 232
 233 static int ab8500_regulator_disable(struct regulator_dev *rdev)
 234 {
 235         int ret;
 236         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 237
 238         if (info == NULL) {
 239                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 240                 return -EINVAL;
 241         }
 242
 243         ret = abx500_mask_and_set_register_interruptible(info->dev,
 244                 info->update_bank, info->update_reg,
 245                 info->update_mask, 0x0);
 246         if (ret < 0) {
 247                 dev_err(rdev_get_dev(rdev),
 248                         "couldn't set disable bits for regulator\n");
 249                 return ret;
 250         }
 251
 252         dev_vdbg(rdev_get_dev(rdev),
 253                 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 254                 info->desc.name, info->update_bank, info->update_reg,
 255                 info->update_mask, 0x0);
 256
 257         return ret;
 258 }
 259
 260 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
 261 {
 262         int ret;
 263         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 264         u8 regval;
 265
 266         if (info == NULL) {
 267                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 268                 return -EINVAL;
 269         }
 270
 271         ret = abx500_get_register_interruptible(info->dev,
 272                 info->update_bank, info->update_reg, &regval);
 273         if (ret < 0) {
 274                 dev_err(rdev_get_dev(rdev),
 275                         "couldn't read 0x%x register\n", info->update_reg);
 276                 return ret;
 277         }
 278
 279         dev_vdbg(rdev_get_dev(rdev),
 280                 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 281                 " 0x%x\n",
 282                 info->desc.name, info->update_bank, info->update_reg,
 283                 info->update_mask, regval);
 284
 285         if (regval & info->update_mask)
 286                 return 1;
 287         else
 288                 return 0;
 289 }
 290
 291 static unsigned int ab8500_regulator_get_optimum_mode(
 292                 struct regulator_dev *rdev, int input_uV,
 293                 int output_uV, int load_uA)
 294 {
 295         unsigned int mode;
 296
 297         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 298
 299         if (info == NULL) {
 300                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 301                 return -EINVAL;
 302         }
 303
 304         if (load_uA <= info->load_lp_uA)
 305                 mode = REGULATOR_MODE_IDLE;
 306         else
 307                 mode = REGULATOR_MODE_NORMAL;
 308
 309         return mode;
 310 }
 311
 312 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
 313                                      unsigned int mode)
 314 {
 315         int ret = 0;
 316         u8 bank, reg, mask, val;
 317         bool lp_mode_req = false;
 318         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 319
 320         if (info == NULL) {
 321                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 322                 return -EINVAL;
 323         }
 324
 325         if (info->mode_mask) {
 326                 bank = info->mode_bank;
 327                 reg = info->mode_reg;
 328                 mask = info->mode_mask;
 329         } else {
 330                 bank = info->update_bank;
 331                 reg = info->update_reg;
 332                 mask = info->update_mask;
 333         }
 334
 335         if (info->shared_mode)
 336                 mutex_lock(&shared_mode_mutex);
 337
 338         switch (mode) {
 339         case REGULATOR_MODE_NORMAL:
 340                 if (info->shared_mode)
 341                         lp_mode_req = false;
 342
 343                 if (info->mode_mask)
 344                         val = info->mode_val_normal;
 345                 else
 346                         val = info->update_val_normal;
 347                 break;
 348         case REGULATOR_MODE_IDLE:
 349                 if (info->shared_mode) {
 350                         struct ab8500_regulator_info *shared_regulator;
 351
 352                         shared_regulator = info->shared_mode->shared_regulator;
 353                         if (!shared_regulator->shared_mode->lp_mode_req) {
 354                                 /* Other regulator prevent LP mode */
 355                                 info->shared_mode->lp_mode_req = true;
 356                                 goto out_unlock;
 357                         }
 358
 359                         lp_mode_req = true;
 360                 }
 361
 362                 if (info->mode_mask)
 363                         val = info->mode_val_idle;
 364                 else
 365                         val = info->update_val_idle;
 366                 break;
 367         default:
 368                 ret = -EINVAL;
 369                 goto out_unlock;
 370         }
 371
 372         if (info->mode_mask || ab8500_regulator_is_enabled(rdev)) {
 373                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 374                         bank, reg, mask, val);
 375                 if (ret < 0) {
 376                         dev_err(rdev_get_dev(rdev),
 377                                 "couldn't set regulator mode\n");
 378                         goto out_unlock;
 379                 }
 380
 381                 dev_vdbg(rdev_get_dev(rdev),
 382                         "%s-set_mode (bank, reg, mask, value): "
 383                         "0x%x, 0x%x, 0x%x, 0x%x\n",
 384                         info->desc.name, bank, reg,
 385                         mask, val);
 386         }
 387
 388         if (!info->mode_mask)
 389                 info->update_val = val;
 390
 391         if (info->shared_mode)
 392                 info->shared_mode->lp_mode_req = lp_mode_req;
 393
 394 out_unlock:
 395         if (info->shared_mode)
 396                 mutex_unlock(&shared_mode_mutex);
 397
 398         return ret;
 399 }
 400
 401 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
 402 {
 403         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 404         int ret;
 405         u8 val;
 406         u8 val_normal;
 407         u8 val_idle;
 408
 409         if (info == NULL) {
 410                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 411                 return -EINVAL;
 412         }
 413
 414         /* Need special handling for shared mode */
 415         if (info->shared_mode) {
 416                 if (info->shared_mode->lp_mode_req)
 417                         return REGULATOR_MODE_IDLE;
 418                 else
 419                         return REGULATOR_MODE_NORMAL;
 420         }
 421
 422         if (info->mode_mask) {
 423                 /* Dedicated register for handling mode */
 424                 ret = abx500_get_register_interruptible(info->dev,
 425                 info->mode_bank, info->mode_reg, &val);
 426                 val = val & info->mode_mask;
 427
 428                 val_normal = info->mode_val_normal;
 429                 val_idle = info->mode_val_idle;
 430         } else {
 431                 /* Mode register same as enable register */
 432                 val = info->update_val;
 433                 val_normal = info->update_val_normal;
 434                 val_idle = info->update_val_idle;
 435         }
 436
 437         if (val == val_normal)
 438                 ret = REGULATOR_MODE_NORMAL;
 439         else if (val == val_idle)
 440                 ret = REGULATOR_MODE_IDLE;
 441         else
 442                 ret = -EINVAL;
 443
 444         return ret;
 445 }
 446
 447 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
 448 {
 449         int ret, voltage_shift;
 450         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 451         u8 regval;
 452
 453         if (info == NULL) {
 454                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 455                 return -EINVAL;
 456         }
 457
 458         voltage_shift = ffs(info->voltage_mask) - 1;
 459
 460         ret = abx500_get_register_interruptible(info->dev,
 461                         info->voltage_bank, info->voltage_reg, &regval);
 462         if (ret < 0) {
 463                 dev_err(rdev_get_dev(rdev),
 464                         "couldn't read voltage reg for regulator\n");
 465                 return ret;
 466         }
 467
 468         dev_vdbg(rdev_get_dev(rdev),
 469                 "%s-get_voltage (bank, reg, mask, shift, value): "
 470                 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
 471                 info->desc.name, info->voltage_bank,
 472                 info->voltage_reg, info->voltage_mask,
 473                 voltage_shift, regval);
 474
 475         return (regval & info->voltage_mask) >> voltage_shift;
 476 }
 477
 478 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
 479                                             unsigned selector)
 480 {
 481         int ret, voltage_shift;
 482         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 483         u8 regval;
 484
 485         if (info == NULL) {
 486                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 487                 return -EINVAL;
 488         }
 489
 490         voltage_shift = ffs(info->voltage_mask) - 1;
 491
 492         /* set the registers for the request */
 493         regval = (u8)selector << voltage_shift;
 494         ret = abx500_mask_and_set_register_interruptible(info->dev,
 495                         info->voltage_bank, info->voltage_reg,
 496                         info->voltage_mask, regval);
 497         if (ret < 0)
 498                 dev_err(rdev_get_dev(rdev),
 499                 "couldn't set voltage reg for regulator\n");
 500
 501         dev_vdbg(rdev_get_dev(rdev),
 502                 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 503                 " 0x%x\n",
 504                 info->desc.name, info->voltage_bank, info->voltage_reg,
 505                 info->voltage_mask, regval);
 506
 507         return ret;
 508 }
 509
 510 static const struct regulator_ops ab8500_regulator_volt_mode_ops = {
 511         .enable                 = ab8500_regulator_enable,
 512         .disable                = ab8500_regulator_disable,
 513         .is_enabled             = ab8500_regulator_is_enabled,
 514         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 515         .set_mode               = ab8500_regulator_set_mode,
 516         .get_mode               = ab8500_regulator_get_mode,
 517         .get_voltage_sel        = ab8500_regulator_get_voltage_sel,
 518         .set_voltage_sel        = ab8500_regulator_set_voltage_sel,
 519         .list_voltage           = regulator_list_voltage_table,
 520 };
 521
 522 static const struct regulator_ops ab8500_regulator_volt_ops = {
 523         .enable         = ab8500_regulator_enable,
 524         .disable        = ab8500_regulator_disable,
 525         .is_enabled     = ab8500_regulator_is_enabled,
 526         .get_voltage_sel = ab8500_regulator_get_voltage_sel,
 527         .set_voltage_sel = ab8500_regulator_set_voltage_sel,
 528         .list_voltage   = regulator_list_voltage_table,
 529 };
 530
 531 static const struct regulator_ops ab8500_regulator_mode_ops = {
 532         .enable                 = ab8500_regulator_enable,
 533         .disable                = ab8500_regulator_disable,
 534         .is_enabled             = ab8500_regulator_is_enabled,
 535         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 536         .set_mode               = ab8500_regulator_set_mode,
 537         .get_mode               = ab8500_regulator_get_mode,
 538         .list_voltage           = regulator_list_voltage_table,
 539 };
 540
 541 static const struct regulator_ops ab8500_regulator_ops = {
 542         .enable                 = ab8500_regulator_enable,
 543         .disable                = ab8500_regulator_disable,
 544         .is_enabled             = ab8500_regulator_is_enabled,
 545         .list_voltage           = regulator_list_voltage_table,
 546 };
 547
 548 static const struct regulator_ops ab8500_regulator_anamic_mode_ops = {
 549         .enable         = ab8500_regulator_enable,
 550         .disable        = ab8500_regulator_disable,
 551         .is_enabled     = ab8500_regulator_is_enabled,
 552         .set_mode       = ab8500_regulator_set_mode,
 553         .get_mode       = ab8500_regulator_get_mode,
 554         .list_voltage   = regulator_list_voltage_table,
 555 };
 556
 557 /* AB8500 regulator information */
 558 static struct ab8500_regulator_info
 559                 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
 560         /*
 561          * Variable Voltage Regulators
 562          *   name, min mV, max mV,
 563          *   update bank, reg, mask, enable val
 564          *   volt bank, reg, mask
 565          */
 566         [AB8500_LDO_AUX1] = {
 567                 .desc = {
 568                         .name           = "LDO-AUX1",
 569                         .ops            = &ab8500_regulator_volt_mode_ops,
 570                         .type           = REGULATOR_VOLTAGE,
 571                         .id             = AB8500_LDO_AUX1,
 572                         .owner          = THIS_MODULE,
 573                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 574                         .volt_table     = ldo_vauxn_voltages,
 575                         .enable_time    = 200,
 576                         .supply_name    = "vin",
 577                 },
 578                 .load_lp_uA             = 5000,
 579                 .update_bank            = 0x04,
 580                 .update_reg             = 0x09,
 581                 .update_mask            = 0x03,
 582                 .update_val             = 0x01,
 583                 .update_val_idle        = 0x03,
 584                 .update_val_normal      = 0x01,
 585                 .voltage_bank           = 0x04,
 586                 .voltage_reg            = 0x1f,
 587                 .voltage_mask           = 0x0f,
 588         },
 589         [AB8500_LDO_AUX2] = {
 590                 .desc = {
 591                         .name           = "LDO-AUX2",
 592                         .ops            = &ab8500_regulator_volt_mode_ops,
 593                         .type           = REGULATOR_VOLTAGE,
 594                         .id             = AB8500_LDO_AUX2,
 595                         .owner          = THIS_MODULE,
 596                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 597                         .volt_table     = ldo_vauxn_voltages,
 598                         .enable_time    = 200,
 599                         .supply_name    = "vin",
 600                 },
 601                 .load_lp_uA             = 5000,
 602                 .update_bank            = 0x04,
 603                 .update_reg             = 0x09,
 604                 .update_mask            = 0x0c,
 605                 .update_val             = 0x04,
 606                 .update_val_idle        = 0x0c,
 607                 .update_val_normal      = 0x04,
 608                 .voltage_bank           = 0x04,
 609                 .voltage_reg            = 0x20,
 610                 .voltage_mask           = 0x0f,
 611         },
 612         [AB8500_LDO_AUX3] = {
 613                 .desc = {
 614                         .name           = "LDO-AUX3",
 615                         .ops            = &ab8500_regulator_volt_mode_ops,
 616                         .type           = REGULATOR_VOLTAGE,
 617                         .id             = AB8500_LDO_AUX3,
 618                         .owner          = THIS_MODULE,
 619                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 620                         .volt_table     = ldo_vaux3_voltages,
 621                         .enable_time    = 450,
 622                         .supply_name    = "vin",
 623                 },
 624                 .load_lp_uA             = 5000,
 625                 .update_bank            = 0x04,
 626                 .update_reg             = 0x0a,
 627                 .update_mask            = 0x03,
 628                 .update_val             = 0x01,
 629                 .update_val_idle        = 0x03,
 630                 .update_val_normal      = 0x01,
 631                 .voltage_bank           = 0x04,
 632                 .voltage_reg            = 0x21,
 633                 .voltage_mask           = 0x07,
 634         },
 635         [AB8500_LDO_INTCORE] = {
 636                 .desc = {
 637                         .name           = "LDO-INTCORE",
 638                         .ops            = &ab8500_regulator_volt_mode_ops,
 639                         .type           = REGULATOR_VOLTAGE,
 640                         .id             = AB8500_LDO_INTCORE,
 641                         .owner          = THIS_MODULE,
 642                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 643                         .volt_table     = ldo_vintcore_voltages,
 644                         .enable_time    = 750,
 645                 },
 646                 .load_lp_uA             = 5000,
 647                 .update_bank            = 0x03,
 648                 .update_reg             = 0x80,
 649                 .update_mask            = 0x44,
 650                 .update_val             = 0x44,
 651                 .update_val_idle        = 0x44,
 652                 .update_val_normal      = 0x04,
 653                 .voltage_bank           = 0x03,
 654                 .voltage_reg            = 0x80,
 655                 .voltage_mask           = 0x38,
 656         },
 657
 658         /*
 659          * Fixed Voltage Regulators
 660          *   name, fixed mV,
 661          *   update bank, reg, mask, enable val
 662          */
 663         [AB8500_LDO_TVOUT] = {
 664                 .desc = {
 665                         .name           = "LDO-TVOUT",
 666                         .ops            = &ab8500_regulator_mode_ops,
 667                         .type           = REGULATOR_VOLTAGE,
 668                         .id             = AB8500_LDO_TVOUT,
 669                         .owner          = THIS_MODULE,
 670                         .n_voltages     = 1,
 671                         .volt_table     = fixed_2000000_voltage,
 672                         .enable_time    = 500,
 673                 },
 674                 .load_lp_uA             = 1000,
 675                 .update_bank            = 0x03,
 676                 .update_reg             = 0x80,
 677                 .update_mask            = 0x82,
 678                 .update_val             = 0x02,
 679                 .update_val_idle        = 0x82,
 680                 .update_val_normal      = 0x02,
 681         },
 682         [AB8500_LDO_AUDIO] = {
 683                 .desc = {
 684                         .name           = "LDO-AUDIO",
 685                         .ops            = &ab8500_regulator_ops,
 686                         .type           = REGULATOR_VOLTAGE,
 687                         .id             = AB8500_LDO_AUDIO,
 688                         .owner          = THIS_MODULE,
 689                         .n_voltages     = 1,
 690                         .enable_time    = 140,
 691                         .volt_table     = fixed_2000000_voltage,
 692                 },
 693                 .update_bank            = 0x03,
 694                 .update_reg             = 0x83,
 695                 .update_mask            = 0x02,
 696                 .update_val             = 0x02,
 697         },
 698         [AB8500_LDO_ANAMIC1] = {
 699                 .desc = {
 700                         .name           = "LDO-ANAMIC1",
 701                         .ops            = &ab8500_regulator_ops,
 702                         .type           = REGULATOR_VOLTAGE,
 703                         .id             = AB8500_LDO_ANAMIC1,
 704                         .owner          = THIS_MODULE,
 705                         .n_voltages     = 1,
 706                         .enable_time    = 500,
 707                         .volt_table     = fixed_2050000_voltage,
 708                 },
 709                 .update_bank            = 0x03,
 710                 .update_reg             = 0x83,
 711                 .update_mask            = 0x08,
 712                 .update_val             = 0x08,
 713         },
 714         [AB8500_LDO_ANAMIC2] = {
 715                 .desc = {
 716                         .name           = "LDO-ANAMIC2",
 717                         .ops            = &ab8500_regulator_ops,
 718                         .type           = REGULATOR_VOLTAGE,
 719                         .id             = AB8500_LDO_ANAMIC2,
 720                         .owner          = THIS_MODULE,
 721                         .n_voltages     = 1,
 722                         .enable_time    = 500,
 723                         .volt_table     = fixed_2050000_voltage,
 724                 },
 725                 .update_bank            = 0x03,
 726                 .update_reg             = 0x83,
 727                 .update_mask            = 0x10,
 728                 .update_val             = 0x10,
 729         },
 730         [AB8500_LDO_DMIC] = {
 731                 .desc = {
 732                         .name           = "LDO-DMIC",
 733                         .ops            = &ab8500_regulator_ops,
 734                         .type           = REGULATOR_VOLTAGE,
 735                         .id             = AB8500_LDO_DMIC,
 736                         .owner          = THIS_MODULE,
 737                         .n_voltages     = 1,
 738                         .enable_time    = 420,
 739                         .volt_table     = fixed_1800000_voltage,
 740                 },
 741                 .update_bank            = 0x03,
 742                 .update_reg             = 0x83,
 743                 .update_mask            = 0x04,
 744                 .update_val             = 0x04,
 745         },
 746
 747         /*
 748          * Regulators with fixed voltage and normal/idle modes
 749          */
 750         [AB8500_LDO_ANA] = {
 751                 .desc = {
 752                         .name           = "LDO-ANA",
 753                         .ops            = &ab8500_regulator_mode_ops,
 754                         .type           = REGULATOR_VOLTAGE,
 755                         .id             = AB8500_LDO_ANA,
 756                         .owner          = THIS_MODULE,
 757                         .n_voltages     = 1,
 758                         .enable_time    = 140,
 759                         .volt_table     = fixed_1200000_voltage,
 760                 },
 761                 .load_lp_uA             = 1000,
 762                 .update_bank            = 0x04,
 763                 .update_reg             = 0x06,
 764                 .update_mask            = 0x0c,
 765                 .update_val             = 0x04,
 766                 .update_val_idle        = 0x0c,
 767                 .update_val_normal      = 0x04,
 768         },
 769 };
 770
 771 /* AB8505 regulator information */
 772 static struct ab8500_regulator_info
 773                 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
 774         /*
 775          * Variable Voltage Regulators
 776          *   name, min mV, max mV,
 777          *   update bank, reg, mask, enable val
 778          *   volt bank, reg, mask
 779          */
 780         [AB8505_LDO_AUX1] = {
 781                 .desc = {
 782                         .name           = "LDO-AUX1",
 783                         .ops            = &ab8500_regulator_volt_mode_ops,
 784                         .type           = REGULATOR_VOLTAGE,
 785                         .id             = AB8505_LDO_AUX1,
 786                         .owner          = THIS_MODULE,
 787                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 788                         .volt_table     = ldo_vauxn_voltages,
 789                 },
 790                 .load_lp_uA             = 5000,
 791                 .update_bank            = 0x04,
 792                 .update_reg             = 0x09,
 793                 .update_mask            = 0x03,
 794                 .update_val             = 0x01,
 795                 .update_val_idle        = 0x03,
 796                 .update_val_normal      = 0x01,
 797                 .voltage_bank           = 0x04,
 798                 .voltage_reg            = 0x1f,
 799                 .voltage_mask           = 0x0f,
 800         },
 801         [AB8505_LDO_AUX2] = {
 802                 .desc = {
 803                         .name           = "LDO-AUX2",
 804                         .ops            = &ab8500_regulator_volt_mode_ops,
 805                         .type           = REGULATOR_VOLTAGE,
 806                         .id             = AB8505_LDO_AUX2,
 807                         .owner          = THIS_MODULE,
 808                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 809                         .volt_table     = ldo_vauxn_voltages,
 810                 },
 811                 .load_lp_uA             = 5000,
 812                 .update_bank            = 0x04,
 813                 .update_reg             = 0x09,
 814                 .update_mask            = 0x0c,
 815                 .update_val             = 0x04,
 816                 .update_val_idle        = 0x0c,
 817                 .update_val_normal      = 0x04,
 818                 .voltage_bank           = 0x04,
 819                 .voltage_reg            = 0x20,
 820                 .voltage_mask           = 0x0f,
 821         },
 822         [AB8505_LDO_AUX3] = {
 823                 .desc = {
 824                         .name           = "LDO-AUX3",
 825                         .ops            = &ab8500_regulator_volt_mode_ops,
 826                         .type           = REGULATOR_VOLTAGE,
 827                         .id             = AB8505_LDO_AUX3,
 828                         .owner          = THIS_MODULE,
 829                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 830                         .volt_table     = ldo_vaux3_voltages,
 831                 },
 832                 .load_lp_uA             = 5000,
 833                 .update_bank            = 0x04,
 834                 .update_reg             = 0x0a,
 835                 .update_mask            = 0x03,
 836                 .update_val             = 0x01,
 837                 .update_val_idle        = 0x03,
 838                 .update_val_normal      = 0x01,
 839                 .voltage_bank           = 0x04,
 840                 .voltage_reg            = 0x21,
 841                 .voltage_mask           = 0x07,
 842         },
 843         [AB8505_LDO_AUX4] = {
 844                 .desc = {
 845                         .name           = "LDO-AUX4",
 846                         .ops            = &ab8500_regulator_volt_mode_ops,
 847                         .type           = REGULATOR_VOLTAGE,
 848                         .id             = AB8505_LDO_AUX4,
 849                         .owner          = THIS_MODULE,
 850                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 851                         .volt_table     = ldo_vauxn_voltages,
 852                 },
 853                 .load_lp_uA             = 5000,
 854                 /* values for Vaux4Regu register */
 855                 .update_bank            = 0x04,
 856                 .update_reg             = 0x2e,
 857                 .update_mask            = 0x03,
 858                 .update_val             = 0x01,
 859                 .update_val_idle        = 0x03,
 860                 .update_val_normal      = 0x01,
 861                 /* values for Vaux4SEL register */
 862                 .voltage_bank           = 0x04,
 863                 .voltage_reg            = 0x2f,
 864                 .voltage_mask           = 0x0f,
 865         },
 866         [AB8505_LDO_AUX5] = {
 867                 .desc = {
 868                         .name           = "LDO-AUX5",
 869                         .ops            = &ab8500_regulator_volt_mode_ops,
 870                         .type           = REGULATOR_VOLTAGE,
 871                         .id             = AB8505_LDO_AUX5,
 872                         .owner          = THIS_MODULE,
 873                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
 874                         .volt_table     = ldo_vaux56_voltages,
 875                 },
 876                 .load_lp_uA             = 2000,
 877                 /* values for CtrlVaux5 register */
 878                 .update_bank            = 0x01,
 879                 .update_reg             = 0x55,
 880                 .update_mask            = 0x18,
 881                 .update_val             = 0x10,
 882                 .update_val_idle        = 0x18,
 883                 .update_val_normal      = 0x10,
 884                 .voltage_bank           = 0x01,
 885                 .voltage_reg            = 0x55,
 886                 .voltage_mask           = 0x07,
 887         },
 888         [AB8505_LDO_AUX6] = {
 889                 .desc = {
 890                         .name           = "LDO-AUX6",
 891                         .ops            = &ab8500_regulator_volt_mode_ops,
 892                         .type           = REGULATOR_VOLTAGE,
 893                         .id             = AB8505_LDO_AUX6,
 894                         .owner          = THIS_MODULE,
 895                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
 896                         .volt_table     = ldo_vaux56_voltages,
 897                 },
 898                 .load_lp_uA             = 2000,
 899                 /* values for CtrlVaux6 register */
 900                 .update_bank            = 0x01,
 901                 .update_reg             = 0x56,
 902                 .update_mask            = 0x18,
 903                 .update_val             = 0x10,
 904                 .update_val_idle        = 0x18,
 905                 .update_val_normal      = 0x10,
 906                 .voltage_bank           = 0x01,
 907                 .voltage_reg            = 0x56,
 908                 .voltage_mask           = 0x07,
 909         },
 910         [AB8505_LDO_INTCORE] = {
 911                 .desc = {
 912                         .name           = "LDO-INTCORE",
 913                         .ops            = &ab8500_regulator_volt_mode_ops,
 914                         .type           = REGULATOR_VOLTAGE,
 915                         .id             = AB8505_LDO_INTCORE,
 916                         .owner          = THIS_MODULE,
 917                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 918                         .volt_table     = ldo_vintcore_voltages,
 919                 },
 920                 .load_lp_uA             = 5000,
 921                 .update_bank            = 0x03,
 922                 .update_reg             = 0x80,
 923                 .update_mask            = 0x44,
 924                 .update_val             = 0x04,
 925                 .update_val_idle        = 0x44,
 926                 .update_val_normal      = 0x04,
 927                 .voltage_bank           = 0x03,
 928                 .voltage_reg            = 0x80,
 929                 .voltage_mask           = 0x38,
 930         },
 931
 932         /*
 933          * Fixed Voltage Regulators
 934          *   name, fixed mV,
 935          *   update bank, reg, mask, enable val
 936          */
 937         [AB8505_LDO_ADC] = {
 938                 .desc = {
 939                         .name           = "LDO-ADC",
 940                         .ops            = &ab8500_regulator_mode_ops,
 941                         .type           = REGULATOR_VOLTAGE,
 942                         .id             = AB8505_LDO_ADC,
 943                         .owner          = THIS_MODULE,
 944                         .n_voltages     = 1,
 945                         .volt_table     = fixed_2000000_voltage,
 946                         .enable_time    = 10000,
 947                 },
 948                 .load_lp_uA             = 1000,
 949                 .update_bank            = 0x03,
 950                 .update_reg             = 0x80,
 951                 .update_mask            = 0x82,
 952                 .update_val             = 0x02,
 953                 .update_val_idle        = 0x82,
 954                 .update_val_normal      = 0x02,
 955         },
 956         [AB8505_LDO_USB] = {
 957                 .desc = {
 958                         .name           = "LDO-USB",
 959                         .ops            = &ab8500_regulator_mode_ops,
 960                         .type           = REGULATOR_VOLTAGE,
 961                         .id             = AB8505_LDO_USB,
 962                         .owner          = THIS_MODULE,
 963                         .n_voltages     = 1,
 964                         .volt_table     = fixed_3300000_voltage,
 965                 },
 966                 .update_bank            = 0x03,
 967                 .update_reg             = 0x82,
 968                 .update_mask            = 0x03,
 969                 .update_val             = 0x01,
 970                 .update_val_idle        = 0x03,
 971                 .update_val_normal      = 0x01,
 972         },
 973         [AB8505_LDO_AUDIO] = {
 974                 .desc = {
 975                         .name           = "LDO-AUDIO",
 976                         .ops            = &ab8500_regulator_volt_ops,
 977                         .type           = REGULATOR_VOLTAGE,
 978                         .id             = AB8505_LDO_AUDIO,
 979                         .owner          = THIS_MODULE,
 980                         .n_voltages     = ARRAY_SIZE(ldo_vaudio_voltages),
 981                         .volt_table     = ldo_vaudio_voltages,
 982                 },
 983                 .update_bank            = 0x03,
 984                 .update_reg             = 0x83,
 985                 .update_mask            = 0x02,
 986                 .update_val             = 0x02,
 987                 .voltage_bank           = 0x01,
 988                 .voltage_reg            = 0x57,
 989                 .voltage_mask           = 0x70,
 990         },
 991         [AB8505_LDO_ANAMIC1] = {
 992                 .desc = {
 993                         .name           = "LDO-ANAMIC1",
 994                         .ops            = &ab8500_regulator_anamic_mode_ops,
 995                         .type           = REGULATOR_VOLTAGE,
 996                         .id             = AB8505_LDO_ANAMIC1,
 997                         .owner          = THIS_MODULE,
 998                         .n_voltages     = 1,
 999                         .volt_table     = fixed_2050000_voltage,
1000                 },
1001                 .shared_mode            = &ldo_anamic1_shared,
1002                 .update_bank            = 0x03,
1003                 .update_reg             = 0x83,
1004                 .update_mask            = 0x08,
1005                 .update_val             = 0x08,
1006                 .mode_bank              = 0x01,
1007                 .mode_reg               = 0x54,
1008                 .mode_mask              = 0x04,
1009                 .mode_val_idle          = 0x04,
1010                 .mode_val_normal        = 0x00,
1011         },
1012         [AB8505_LDO_ANAMIC2] = {
1013                 .desc = {
1014                         .name           = "LDO-ANAMIC2",
1015                         .ops            = &ab8500_regulator_anamic_mode_ops,
1016                         .type           = REGULATOR_VOLTAGE,
1017                         .id             = AB8505_LDO_ANAMIC2,
1018                         .owner          = THIS_MODULE,
1019                         .n_voltages     = 1,
1020                         .volt_table     = fixed_2050000_voltage,
1021                 },
1022                 .shared_mode            = &ldo_anamic2_shared,
1023                 .update_bank            = 0x03,
1024                 .update_reg             = 0x83,
1025                 .update_mask            = 0x10,
1026                 .update_val             = 0x10,
1027                 .mode_bank              = 0x01,
1028                 .mode_reg               = 0x54,
1029                 .mode_mask              = 0x04,
1030                 .mode_val_idle          = 0x04,
1031                 .mode_val_normal        = 0x00,
1032         },
1033         [AB8505_LDO_AUX8] = {
1034                 .desc = {
1035                         .name           = "LDO-AUX8",
1036                         .ops            = &ab8500_regulator_ops,
1037                         .type           = REGULATOR_VOLTAGE,
1038                         .id             = AB8505_LDO_AUX8,
1039                         .owner          = THIS_MODULE,
1040                         .n_voltages     = 1,
1041                         .volt_table     = fixed_1800000_voltage,
1042                 },
1043                 .update_bank            = 0x03,
1044                 .update_reg             = 0x83,
1045                 .update_mask            = 0x04,
1046                 .update_val             = 0x04,
1047         },
1048         /*
1049          * Regulators with fixed voltage and normal/idle modes
1050          */
1051         [AB8505_LDO_ANA] = {
1052                 .desc = {
1053                         .name           = "LDO-ANA",
1054                         .ops            = &ab8500_regulator_volt_mode_ops,
1055                         .type           = REGULATOR_VOLTAGE,
1056                         .id             = AB8505_LDO_ANA,
1057                         .owner          = THIS_MODULE,
1058                         .n_voltages     = ARRAY_SIZE(ldo_vana_voltages),
1059                         .volt_table     = ldo_vana_voltages,
1060                 },
1061                 .load_lp_uA             = 1000,
1062                 .update_bank            = 0x04,
1063                 .update_reg             = 0x06,
1064                 .update_mask            = 0x0c,
1065                 .update_val             = 0x04,
1066                 .update_val_idle        = 0x0c,
1067                 .update_val_normal      = 0x04,
1068                 .voltage_bank           = 0x04,
1069                 .voltage_reg            = 0x29,
1070                 .voltage_mask           = 0x7,
1071         },
1072 };
1073
1074 static struct ab8500_shared_mode ldo_anamic1_shared = {
1075         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2],
1076 };
1077
1078 static struct ab8500_shared_mode ldo_anamic2_shared = {
1079         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1],
1080 };
1081
1082 struct ab8500_reg_init {
1083         u8 bank;
1084         u8 addr;
1085         u8 mask;
1086 };
1087
1088 #define REG_INIT(_id, _bank, _addr, _mask)      \
1089         [_id] = {                               \
1090                 .bank = _bank,                  \
1091                 .addr = _addr,                  \
1092                 .mask = _mask,                  \
1093         }
1094
1095 /* AB8500 register init */
1096 static struct ab8500_reg_init ab8500_reg_init[] = {
1097         /*
1098          * 0x30, VanaRequestCtrl
1099          * 0xc0, VextSupply1RequestCtrl
1100          */
1101         REG_INIT(AB8500_REGUREQUESTCTRL2,       0x03, 0x04, 0xf0),
1102         /*
1103          * 0x03, VextSupply2RequestCtrl
1104          * 0x0c, VextSupply3RequestCtrl
1105          * 0x30, Vaux1RequestCtrl
1106          * 0xc0, Vaux2RequestCtrl
1107          */
1108         REG_INIT(AB8500_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
1109         /*
1110          * 0x03, Vaux3RequestCtrl
1111          * 0x04, SwHPReq
1112          */
1113         REG_INIT(AB8500_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1114         /*
1115          * 0x08, VanaSysClkReq1HPValid
1116          * 0x20, Vaux1SysClkReq1HPValid
1117          * 0x40, Vaux2SysClkReq1HPValid
1118          * 0x80, Vaux3SysClkReq1HPValid
1119          */
1120         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1121         /*
1122          * 0x10, VextSupply1SysClkReq1HPValid
1123          * 0x20, VextSupply2SysClkReq1HPValid
1124          * 0x40, VextSupply3SysClkReq1HPValid
1125          */
1126         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1127         /*
1128          * 0x08, VanaHwHPReq1Valid
1129          * 0x20, Vaux1HwHPReq1Valid
1130          * 0x40, Vaux2HwHPReq1Valid
1131          * 0x80, Vaux3HwHPReq1Valid
1132          */
1133         REG_INIT(AB8500_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xe8),
1134         /*
1135          * 0x01, VextSupply1HwHPReq1Valid
1136          * 0x02, VextSupply2HwHPReq1Valid
1137          * 0x04, VextSupply3HwHPReq1Valid
1138          */
1139         REG_INIT(AB8500_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
1140         /*
1141          * 0x08, VanaHwHPReq2Valid
1142          * 0x20, Vaux1HwHPReq2Valid
1143          * 0x40, Vaux2HwHPReq2Valid
1144          * 0x80, Vaux3HwHPReq2Valid
1145          */
1146         REG_INIT(AB8500_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xe8),
1147         /*
1148          * 0x01, VextSupply1HwHPReq2Valid
1149          * 0x02, VextSupply2HwHPReq2Valid
1150          * 0x04, VextSupply3HwHPReq2Valid
1151          */
1152         REG_INIT(AB8500_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
1153         /*
1154          * 0x20, VanaSwHPReqValid
1155          * 0x80, Vaux1SwHPReqValid
1156          */
1157         REG_INIT(AB8500_REGUSWHPREQVALID1,      0x03, 0x0d, 0xa0),
1158         /*
1159          * 0x01, Vaux2SwHPReqValid
1160          * 0x02, Vaux3SwHPReqValid
1161          * 0x04, VextSupply1SwHPReqValid
1162          * 0x08, VextSupply2SwHPReqValid
1163          * 0x10, VextSupply3SwHPReqValid
1164          */
1165         REG_INIT(AB8500_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
1166         /*
1167          * 0x02, SysClkReq2Valid1
1168          * 0x04, SysClkReq3Valid1
1169          * 0x08, SysClkReq4Valid1
1170          * 0x10, SysClkReq5Valid1
1171          * 0x20, SysClkReq6Valid1
1172          * 0x40, SysClkReq7Valid1
1173          * 0x80, SysClkReq8Valid1
1174          */
1175         REG_INIT(AB8500_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
1176         /*
1177          * 0x02, SysClkReq2Valid2
1178          * 0x04, SysClkReq3Valid2
1179          * 0x08, SysClkReq4Valid2
1180          * 0x10, SysClkReq5Valid2
1181          * 0x20, SysClkReq6Valid2
1182          * 0x40, SysClkReq7Valid2
1183          * 0x80, SysClkReq8Valid2
1184          */
1185         REG_INIT(AB8500_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
1186         /*
1187          * 0x02, VTVoutEna
1188          * 0x04, Vintcore12Ena
1189          * 0x38, Vintcore12Sel
1190          * 0x40, Vintcore12LP
1191          * 0x80, VTVoutLP
1192          */
1193         REG_INIT(AB8500_REGUMISC1,              0x03, 0x80, 0xfe),
1194         /*
1195          * 0x02, VaudioEna
1196          * 0x04, VdmicEna
1197          * 0x08, Vamic1Ena
1198          * 0x10, Vamic2Ena
1199          */
1200         REG_INIT(AB8500_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1201         /*
1202          * 0x01, Vamic1_dzout
1203          * 0x02, Vamic2_dzout
1204          */
1205         REG_INIT(AB8500_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1206         /*
1207          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1208          * 0x0c, VanaRegu
1209          */
1210         REG_INIT(AB8500_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1211         /*
1212          * 0x01, VrefDDREna
1213          * 0x02, VrefDDRSleepMode
1214          */
1215         REG_INIT(AB8500_VREFDDR,                0x04, 0x07, 0x03),
1216         /*
1217          * 0x03, VextSupply1Regu
1218          * 0x0c, VextSupply2Regu
1219          * 0x30, VextSupply3Regu
1220          * 0x40, ExtSupply2Bypass
1221          * 0x80, ExtSupply3Bypass
1222          */
1223         REG_INIT(AB8500_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1224         /*
1225          * 0x03, Vaux1Regu
1226          * 0x0c, Vaux2Regu
1227          */
1228         REG_INIT(AB8500_VAUX12REGU,             0x04, 0x09, 0x0f),
1229         /*
1230          * 0x03, Vaux3Regu
1231          */
1232         REG_INIT(AB8500_VRF1VAUX3REGU,          0x04, 0x0a, 0x03),
1233         /*
1234          * 0x0f, Vaux1Sel
1235          */
1236         REG_INIT(AB8500_VAUX1SEL,               0x04, 0x1f, 0x0f),
1237         /*
1238          * 0x0f, Vaux2Sel
1239          */
1240         REG_INIT(AB8500_VAUX2SEL,               0x04, 0x20, 0x0f),
1241         /*
1242          * 0x07, Vaux3Sel
1243          */
1244         REG_INIT(AB8500_VRF1VAUX3SEL,           0x04, 0x21, 0x07),
1245         /*
1246          * 0x01, VextSupply12LP
1247          */
1248         REG_INIT(AB8500_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
1249         /*
1250          * 0x04, Vaux1Disch
1251          * 0x08, Vaux2Disch
1252          * 0x10, Vaux3Disch
1253          * 0x20, Vintcore12Disch
1254          * 0x40, VTVoutDisch
1255          * 0x80, VaudioDisch
1256          */
1257         REG_INIT(AB8500_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1258         /*
1259          * 0x02, VanaDisch
1260          * 0x04, VdmicPullDownEna
1261          * 0x10, VdmicDisch
1262          */
1263         REG_INIT(AB8500_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1264 };
1265
1266 /* AB8505 register init */
1267 static struct ab8500_reg_init ab8505_reg_init[] = {
1268         /*
1269          * 0x03, VarmRequestCtrl
1270          * 0x0c, VsmpsCRequestCtrl
1271          * 0x30, VsmpsARequestCtrl
1272          * 0xc0, VsmpsBRequestCtrl
1273          */
1274         REG_INIT(AB8505_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
1275         /*
1276          * 0x03, VsafeRequestCtrl
1277          * 0x0c, VpllRequestCtrl
1278          * 0x30, VanaRequestCtrl
1279          */
1280         REG_INIT(AB8505_REGUREQUESTCTRL2,       0x03, 0x04, 0x3f),
1281         /*
1282          * 0x30, Vaux1RequestCtrl
1283          * 0xc0, Vaux2RequestCtrl
1284          */
1285         REG_INIT(AB8505_REGUREQUESTCTRL3,       0x03, 0x05, 0xf0),
1286         /*
1287          * 0x03, Vaux3RequestCtrl
1288          * 0x04, SwHPReq
1289          */
1290         REG_INIT(AB8505_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1291         /*
1292          * 0x01, VsmpsASysClkReq1HPValid
1293          * 0x02, VsmpsBSysClkReq1HPValid
1294          * 0x04, VsafeSysClkReq1HPValid
1295          * 0x08, VanaSysClkReq1HPValid
1296          * 0x10, VpllSysClkReq1HPValid
1297          * 0x20, Vaux1SysClkReq1HPValid
1298          * 0x40, Vaux2SysClkReq1HPValid
1299          * 0x80, Vaux3SysClkReq1HPValid
1300          */
1301         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1302         /*
1303          * 0x01, VsmpsCSysClkReq1HPValid
1304          * 0x02, VarmSysClkReq1HPValid
1305          * 0x04, VbbSysClkReq1HPValid
1306          * 0x08, VsmpsMSysClkReq1HPValid
1307          */
1308         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
1309         /*
1310          * 0x01, VsmpsAHwHPReq1Valid
1311          * 0x02, VsmpsBHwHPReq1Valid
1312          * 0x04, VsafeHwHPReq1Valid
1313          * 0x08, VanaHwHPReq1Valid
1314          * 0x10, VpllHwHPReq1Valid
1315          * 0x20, Vaux1HwHPReq1Valid
1316          * 0x40, Vaux2HwHPReq1Valid
1317          * 0x80, Vaux3HwHPReq1Valid
1318          */
1319         REG_INIT(AB8505_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
1320         /*
1321          * 0x08, VsmpsMHwHPReq1Valid
1322          */
1323         REG_INIT(AB8505_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x08),
1324         /*
1325          * 0x01, VsmpsAHwHPReq2Valid
1326          * 0x02, VsmpsBHwHPReq2Valid
1327          * 0x04, VsafeHwHPReq2Valid
1328          * 0x08, VanaHwHPReq2Valid
1329          * 0x10, VpllHwHPReq2Valid
1330          * 0x20, Vaux1HwHPReq2Valid
1331          * 0x40, Vaux2HwHPReq2Valid
1332          * 0x80, Vaux3HwHPReq2Valid
1333          */
1334         REG_INIT(AB8505_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
1335         /*
1336          * 0x08, VsmpsMHwHPReq2Valid
1337          */
1338         REG_INIT(AB8505_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x08),
1339         /*
1340          * 0x01, VsmpsCSwHPReqValid
1341          * 0x02, VarmSwHPReqValid
1342          * 0x04, VsmpsASwHPReqValid
1343          * 0x08, VsmpsBSwHPReqValid
1344          * 0x10, VsafeSwHPReqValid
1345          * 0x20, VanaSwHPReqValid
1346          * 0x40, VpllSwHPReqValid
1347          * 0x80, Vaux1SwHPReqValid
1348          */
1349         REG_INIT(AB8505_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
1350         /*
1351          * 0x01, Vaux2SwHPReqValid
1352          * 0x02, Vaux3SwHPReqValid
1353          * 0x20, VsmpsMSwHPReqValid
1354          */
1355         REG_INIT(AB8505_REGUSWHPREQVALID2,      0x03, 0x0e, 0x23),
1356         /*
1357          * 0x02, SysClkReq2Valid1
1358          * 0x04, SysClkReq3Valid1
1359          * 0x08, SysClkReq4Valid1
1360          */
1361         REG_INIT(AB8505_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0x0e),
1362         /*
1363          * 0x02, SysClkReq2Valid2
1364          * 0x04, SysClkReq3Valid2
1365          * 0x08, SysClkReq4Valid2
1366          */
1367         REG_INIT(AB8505_REGUSYSCLKREQVALID2,    0x03, 0x10, 0x0e),
1368         /*
1369          * 0x01, Vaux4SwHPReqValid
1370          * 0x02, Vaux4HwHPReq2Valid
1371          * 0x04, Vaux4HwHPReq1Valid
1372          * 0x08, Vaux4SysClkReq1HPValid
1373          */
1374         REG_INIT(AB8505_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
1375         /*
1376          * 0x02, VadcEna
1377          * 0x04, VintCore12Ena
1378          * 0x38, VintCore12Sel
1379          * 0x40, VintCore12LP
1380          * 0x80, VadcLP
1381          */
1382         REG_INIT(AB8505_REGUMISC1,              0x03, 0x80, 0xfe),
1383         /*
1384          * 0x02, VaudioEna
1385          * 0x04, VdmicEna
1386          * 0x08, Vamic1Ena
1387          * 0x10, Vamic2Ena
1388          */
1389         REG_INIT(AB8505_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1390         /*
1391          * 0x01, Vamic1_dzout
1392          * 0x02, Vamic2_dzout
1393          */
1394         REG_INIT(AB8505_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1395         /*
1396          * 0x03, VsmpsARegu
1397          * 0x0c, VsmpsASelCtrl
1398          * 0x10, VsmpsAAutoMode
1399          * 0x20, VsmpsAPWMMode
1400          */
1401         REG_INIT(AB8505_VSMPSAREGU,             0x04, 0x03, 0x3f),
1402         /*
1403          * 0x03, VsmpsBRegu
1404          * 0x0c, VsmpsBSelCtrl
1405          * 0x10, VsmpsBAutoMode
1406          * 0x20, VsmpsBPWMMode
1407          */
1408         REG_INIT(AB8505_VSMPSBREGU,             0x04, 0x04, 0x3f),
1409         /*
1410          * 0x03, VsafeRegu
1411          * 0x0c, VsafeSelCtrl
1412          * 0x10, VsafeAutoMode
1413          * 0x20, VsafePWMMode
1414          */
1415         REG_INIT(AB8505_VSAFEREGU,              0x04, 0x05, 0x3f),
1416         /*
1417          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1418          * 0x0c, VanaRegu
1419          */
1420         REG_INIT(AB8505_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1421         /*
1422          * 0x03, VextSupply1Regu
1423          * 0x0c, VextSupply2Regu
1424          * 0x30, VextSupply3Regu
1425          * 0x40, ExtSupply2Bypass
1426          * 0x80, ExtSupply3Bypass
1427          */
1428         REG_INIT(AB8505_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1429         /*
1430          * 0x03, Vaux1Regu
1431          * 0x0c, Vaux2Regu
1432          */
1433         REG_INIT(AB8505_VAUX12REGU,             0x04, 0x09, 0x0f),
1434         /*
1435          * 0x0f, Vaux3Regu
1436          */
1437         REG_INIT(AB8505_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
1438         /*
1439          * 0x3f, VsmpsASel1
1440          */
1441         REG_INIT(AB8505_VSMPSASEL1,             0x04, 0x13, 0x3f),
1442         /*
1443          * 0x3f, VsmpsASel2
1444          */
1445         REG_INIT(AB8505_VSMPSASEL2,             0x04, 0x14, 0x3f),
1446         /*
1447          * 0x3f, VsmpsASel3
1448          */
1449         REG_INIT(AB8505_VSMPSASEL3,             0x04, 0x15, 0x3f),
1450         /*
1451          * 0x3f, VsmpsBSel1
1452          */
1453         REG_INIT(AB8505_VSMPSBSEL1,             0x04, 0x17, 0x3f),
1454         /*
1455          * 0x3f, VsmpsBSel2
1456          */
1457         REG_INIT(AB8505_VSMPSBSEL2,             0x04, 0x18, 0x3f),
1458         /*
1459          * 0x3f, VsmpsBSel3
1460          */
1461         REG_INIT(AB8505_VSMPSBSEL3,             0x04, 0x19, 0x3f),
1462         /*
1463          * 0x7f, VsafeSel1
1464          */
1465         REG_INIT(AB8505_VSAFESEL1,              0x04, 0x1b, 0x7f),
1466         /*
1467          * 0x3f, VsafeSel2
1468          */
1469         REG_INIT(AB8505_VSAFESEL2,              0x04, 0x1c, 0x7f),
1470         /*
1471          * 0x3f, VsafeSel3
1472          */
1473         REG_INIT(AB8505_VSAFESEL3,              0x04, 0x1d, 0x7f),
1474         /*
1475          * 0x0f, Vaux1Sel
1476          */
1477         REG_INIT(AB8505_VAUX1SEL,               0x04, 0x1f, 0x0f),
1478         /*
1479          * 0x0f, Vaux2Sel
1480          */
1481         REG_INIT(AB8505_VAUX2SEL,               0x04, 0x20, 0x0f),
1482         /*
1483          * 0x07, Vaux3Sel
1484          * 0x30, VRF1Sel
1485          */
1486         REG_INIT(AB8505_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
1487         /*
1488          * 0x03, Vaux4RequestCtrl
1489          */
1490         REG_INIT(AB8505_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
1491         /*
1492          * 0x03, Vaux4Regu
1493          */
1494         REG_INIT(AB8505_VAUX4REGU,              0x04, 0x2e, 0x03),
1495         /*
1496          * 0x0f, Vaux4Sel
1497          */
1498         REG_INIT(AB8505_VAUX4SEL,               0x04, 0x2f, 0x0f),
1499         /*
1500          * 0x04, Vaux1Disch
1501          * 0x08, Vaux2Disch
1502          * 0x10, Vaux3Disch
1503          * 0x20, Vintcore12Disch
1504          * 0x40, VTVoutDisch
1505          * 0x80, VaudioDisch
1506          */
1507         REG_INIT(AB8505_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1508         /*
1509          * 0x02, VanaDisch
1510          * 0x04, VdmicPullDownEna
1511          * 0x10, VdmicDisch
1512          */
1513         REG_INIT(AB8505_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1514         /*
1515          * 0x01, Vaux4Disch
1516          */
1517         REG_INIT(AB8505_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
1518         /*
1519          * 0x07, Vaux5Sel
1520          * 0x08, Vaux5LP
1521          * 0x10, Vaux5Ena
1522          * 0x20, Vaux5Disch
1523          * 0x40, Vaux5DisSfst
1524          * 0x80, Vaux5DisPulld
1525          */
1526         REG_INIT(AB8505_CTRLVAUX5,              0x01, 0x55, 0xff),
1527         /*
1528          * 0x07, Vaux6Sel
1529          * 0x08, Vaux6LP
1530          * 0x10, Vaux6Ena
1531          * 0x80, Vaux6DisPulld
1532          */
1533         REG_INIT(AB8505_CTRLVAUX6,              0x01, 0x56, 0x9f),
1534 };
1535
1536 static struct of_regulator_match ab8500_regulator_match[] = {
1537         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8500_LDO_AUX1, },
1538         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8500_LDO_AUX2, },
1539         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8500_LDO_AUX3, },
1540         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
1541         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8500_LDO_TVOUT, },
1542         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8500_LDO_AUDIO, },
1543         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
1544         { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
1545         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8500_LDO_DMIC, },
1546         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8500_LDO_ANA, },
1547 };
1548
1549 static struct of_regulator_match ab8505_regulator_match[] = {
1550         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8505_LDO_AUX1, },
1551         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8505_LDO_AUX2, },
1552         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8505_LDO_AUX3, },
1553         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8505_LDO_AUX4, },
1554         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8505_LDO_AUX5, },
1555         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8505_LDO_AUX6, },
1556         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
1557         { .name = "ab8500_ldo_adc",     .driver_data = (void *) AB8505_LDO_ADC, },
1558         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8505_LDO_AUDIO, },
1559         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
1560         { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
1561         { .name = "ab8500_ldo_aux8",    .driver_data = (void *) AB8505_LDO_AUX8, },
1562         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8505_LDO_ANA, },
1563 };
1564
1565 static struct {
1566         struct ab8500_regulator_info *info;
1567         int info_size;
1568         struct ab8500_reg_init *init;
1569         int init_size;
1570         struct of_regulator_match *match;
1571         int match_size;
1572 } abx500_regulator;
1573
1574 static void abx500_get_regulator_info(struct ab8500 *ab8500)
1575 {
1576         if (is_ab8505(ab8500)) {
1577                 abx500_regulator.info = ab8505_regulator_info;
1578                 abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info);
1579                 abx500_regulator.init = ab8505_reg_init;
1580                 abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS;
1581                 abx500_regulator.match = ab8505_regulator_match;
1582                 abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match);
1583         } else {
1584                 abx500_regulator.info = ab8500_regulator_info;
1585                 abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info);
1586                 abx500_regulator.init = ab8500_reg_init;
1587                 abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS;
1588                 abx500_regulator.match = ab8500_regulator_match;
1589                 abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match);
1590         }
1591 }
1592
1593 static int ab8500_regulator_register(struct platform_device *pdev,
1594                                      struct regulator_init_data *init_data,
1595                                      int id, struct device_node *np)
1596 {
1597         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1598         struct ab8500_regulator_info *info = NULL;
1599         struct regulator_config config = { };
1600         struct regulator_dev *rdev;
1601
1602         /* assign per-regulator data */
1603         info = &abx500_regulator.info[id];
1604         info->dev = &pdev->dev;
1605
1606         config.dev = &pdev->dev;
1607         config.init_data = init_data;
1608         config.driver_data = info;
1609         config.of_node = np;
1610
1611         /* fix for hardware before ab8500v2.0 */
1612         if (is_ab8500_1p1_or_earlier(ab8500)) {
1613                 if (info->desc.id == AB8500_LDO_AUX3) {
1614                         info->desc.n_voltages =
1615                                 ARRAY_SIZE(ldo_vauxn_voltages);
1616                         info->desc.volt_table = ldo_vauxn_voltages;
1617                         info->voltage_mask = 0xf;
1618                 }
1619         }
1620
1621         /* register regulator with framework */
1622         rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
1623         if (IS_ERR(rdev)) {
1624                 dev_err(&pdev->dev, "failed to register regulator %s\n",
1625                         info->desc.name);
1626                 return PTR_ERR(rdev);
1627         }
1628
1629         return 0;
1630 }
1631
1632 static int ab8500_regulator_probe(struct platform_device *pdev)
1633 {
1634         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1635         struct device_node *np = pdev->dev.of_node;
1636         struct of_regulator_match *match;
1637         int err, i;
1638
1639         if (!ab8500) {
1640                 dev_err(&pdev->dev, "null mfd parent\n");
1641                 return -EINVAL;
1642         }
1643
1644         abx500_get_regulator_info(ab8500);
1645
1646         err = of_regulator_match(&pdev->dev, np,
1647                                  abx500_regulator.match,
1648                                  abx500_regulator.match_size);
1649         if (err < 0) {
1650                 dev_err(&pdev->dev,
1651                         "Error parsing regulator init data: %d\n", err);
1652                 return err;
1653         }
1654
1655         match = abx500_regulator.match;
1656         for (i = 0; i < abx500_regulator.info_size; i++) {
1657                 err = ab8500_regulator_register(pdev, match[i].init_data, i,
1658                                                 match[i].of_node);
1659                 if (err)
1660                         return err;
1661         }
1662
1663         return 0;
1664 }
1665
1666 static struct platform_driver ab8500_regulator_driver = {
1667         .probe = ab8500_regulator_probe,
1668         .driver         = {
1669                 .name   = "ab8500-regulator",
1670         },
1671 };
1672
1673 static int __init ab8500_regulator_init(void)
1674 {
1675         int ret;
1676
1677         ret = platform_driver_register(&ab8500_regulator_driver);
1678         if (ret != 0)
1679                 pr_err("Failed to register ab8500 regulator: %d\n", ret);
1680
1681         return ret;
1682 }
1683 subsys_initcall(ab8500_regulator_init);
1684
1685 static void __exit ab8500_regulator_exit(void)
1686 {
1687         platform_driver_unregister(&ab8500_regulator_driver);
1688 }
1689 module_exit(ab8500_regulator_exit);
1690
1691 MODULE_LICENSE("GPL v2");
1692 MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
1693 MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
1694 MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
1695 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
1696 MODULE_ALIAS("platform:ab8500-regulator");