1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/pwm/pwm-vt8500.c
5 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
6 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
9 #include <linux/mod_devicetable.h>
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/slab.h>
14 #include <linux/err.h>
16 #include <linux/pwm.h>
17 #include <linux/delay.h>
18 #include <linux/clk.h>
20 #include <asm/div64.h>
23 * SoC architecture allocates register space for 4 PWMs but only
24 * 2 are currently implemented.
26 #define VT8500_NR_PWMS 2
28 #define REG_CTRL(pwm) (((pwm) << 4) + 0x00)
29 #define REG_SCALAR(pwm) (((pwm) << 4) + 0x04)
30 #define REG_PERIOD(pwm) (((pwm) << 4) + 0x08)
31 #define REG_DUTY(pwm) (((pwm) << 4) + 0x0C)
32 #define REG_STATUS 0x40
34 #define CTRL_ENABLE BIT(0)
35 #define CTRL_INVERT BIT(1)
36 #define CTRL_AUTOLOAD BIT(2)
37 #define CTRL_STOP_IMM BIT(3)
38 #define CTRL_LOAD_PRESCALE BIT(4)
39 #define CTRL_LOAD_PERIOD BIT(5)
41 #define STATUS_CTRL_UPDATE BIT(0)
42 #define STATUS_SCALAR_UPDATE BIT(1)
43 #define STATUS_PERIOD_UPDATE BIT(2)
44 #define STATUS_DUTY_UPDATE BIT(3)
45 #define STATUS_ALL_UPDATE 0x0F
52 static inline struct vt8500_chip *to_vt8500_chip(struct pwm_chip *chip)
54 return pwmchip_get_drvdata(chip);
57 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
58 static inline void vt8500_pwm_busy_wait(struct pwm_chip *chip, int nr, u8 bitmask)
60 struct vt8500_chip *vt8500 = to_vt8500_chip(chip);
61 int loops = msecs_to_loops(10);
62 u32 mask = bitmask << (nr << 8);
64 while ((readl(vt8500->base + REG_STATUS) & mask) && --loops)
68 dev_warn(pwmchip_parent(chip), "Waiting for status bits 0x%x to clear timed out\n",
72 static int vt8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
73 u64 duty_ns, u64 period_ns)
75 struct vt8500_chip *vt8500 = to_vt8500_chip(chip);
77 unsigned long period_cycles, prescale, pv, dc;
81 err = clk_enable(vt8500->clk);
83 dev_err(pwmchip_parent(chip), "failed to enable clock\n");
87 c = clk_get_rate(vt8500->clk);
89 do_div(c, 1000000000);
92 if (period_cycles < 1)
94 prescale = (period_cycles - 1) / 4096;
95 pv = period_cycles / (prescale + 1) - 1;
99 if (prescale > 1023) {
100 clk_disable(vt8500->clk);
104 c = (unsigned long long)pv * duty_ns;
106 dc = div64_u64(c, period_ns);
108 writel(prescale, vt8500->base + REG_SCALAR(pwm->hwpwm));
109 vt8500_pwm_busy_wait(chip, pwm->hwpwm, STATUS_SCALAR_UPDATE);
111 writel(pv, vt8500->base + REG_PERIOD(pwm->hwpwm));
112 vt8500_pwm_busy_wait(chip, pwm->hwpwm, STATUS_PERIOD_UPDATE);
114 writel(dc, vt8500->base + REG_DUTY(pwm->hwpwm));
115 vt8500_pwm_busy_wait(chip, pwm->hwpwm, STATUS_DUTY_UPDATE);
117 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm));
118 val |= CTRL_AUTOLOAD;
119 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm));
120 vt8500_pwm_busy_wait(chip, pwm->hwpwm, STATUS_CTRL_UPDATE);
122 clk_disable(vt8500->clk);
126 static int vt8500_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
128 struct vt8500_chip *vt8500 = to_vt8500_chip(chip);
132 err = clk_enable(vt8500->clk);
134 dev_err(pwmchip_parent(chip), "failed to enable clock\n");
138 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm));
140 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm));
141 vt8500_pwm_busy_wait(chip, pwm->hwpwm, STATUS_CTRL_UPDATE);
146 static void vt8500_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
148 struct vt8500_chip *vt8500 = to_vt8500_chip(chip);
151 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm));
153 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm));
154 vt8500_pwm_busy_wait(chip, pwm->hwpwm, STATUS_CTRL_UPDATE);
156 clk_disable(vt8500->clk);
159 static int vt8500_pwm_set_polarity(struct pwm_chip *chip,
160 struct pwm_device *pwm,
161 enum pwm_polarity polarity)
163 struct vt8500_chip *vt8500 = to_vt8500_chip(chip);
166 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm));
168 if (polarity == PWM_POLARITY_INVERSED)
173 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm));
174 vt8500_pwm_busy_wait(chip, pwm->hwpwm, STATUS_CTRL_UPDATE);
179 static int vt8500_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
180 const struct pwm_state *state)
183 bool enabled = pwm->state.enabled;
185 if (state->polarity != pwm->state.polarity) {
187 * Changing the polarity of a running PWM is only allowed when
188 * the PWM driver implements ->apply().
191 vt8500_pwm_disable(chip, pwm);
196 err = vt8500_pwm_set_polarity(chip, pwm, state->polarity);
201 if (!state->enabled) {
203 vt8500_pwm_disable(chip, pwm);
209 * We cannot skip calling ->config even if state->period ==
210 * pwm->state.period && state->duty_cycle == pwm->state.duty_cycle
211 * because we might have exited early in the last call to
212 * pwm_apply_might_sleep because of !state->enabled and so the two values in
213 * pwm->state might not be configured in hardware.
215 err = vt8500_pwm_config(chip, pwm, state->duty_cycle, state->period);
220 err = vt8500_pwm_enable(chip, pwm);
225 static const struct pwm_ops vt8500_pwm_ops = {
226 .apply = vt8500_pwm_apply,
229 static const struct of_device_id vt8500_pwm_dt_ids[] = {
230 { .compatible = "via,vt8500-pwm", },
233 MODULE_DEVICE_TABLE(of, vt8500_pwm_dt_ids);
235 static int vt8500_pwm_probe(struct platform_device *pdev)
237 struct pwm_chip *chip;
238 struct vt8500_chip *vt8500;
239 struct device_node *np = pdev->dev.of_node;
243 return dev_err_probe(&pdev->dev, -EINVAL, "invalid devicetree node\n");
245 chip = devm_pwmchip_alloc(&pdev->dev, VT8500_NR_PWMS, sizeof(*vt8500));
247 return PTR_ERR(chip);
248 vt8500 = to_vt8500_chip(chip);
250 chip->ops = &vt8500_pwm_ops;
252 vt8500->clk = devm_clk_get_prepared(&pdev->dev, NULL);
253 if (IS_ERR(vt8500->clk))
254 return dev_err_probe(&pdev->dev, PTR_ERR(vt8500->clk), "clock source not specified\n");
256 vt8500->base = devm_platform_ioremap_resource(pdev, 0);
257 if (IS_ERR(vt8500->base))
258 return PTR_ERR(vt8500->base);
260 ret = devm_pwmchip_add(&pdev->dev, chip);
262 return dev_err_probe(&pdev->dev, ret, "failed to add PWM chip\n");
267 static struct platform_driver vt8500_pwm_driver = {
268 .probe = vt8500_pwm_probe,
270 .name = "vt8500-pwm",
271 .of_match_table = vt8500_pwm_dt_ids,
274 module_platform_driver(vt8500_pwm_driver);
276 MODULE_DESCRIPTION("VT8500 PWM Driver");
277 MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>");
278 MODULE_LICENSE("GPL v2");