1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) Overkiz SAS 2012
5 * Author: Boris BREZILLON <b.brezillon@overkiz.com>
8 #include <linux/module.h>
9 #include <linux/init.h>
10 #include <linux/clocksource.h>
11 #include <linux/clockchips.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
15 #include <linux/clk.h>
16 #include <linux/err.h>
17 #include <linux/ioport.h>
19 #include <linux/mfd/syscon.h>
20 #include <linux/platform_device.h>
21 #include <linux/pwm.h>
23 #include <linux/regmap.h>
24 #include <linux/slab.h>
25 #include <soc/at91/atmel_tcb.h>
29 #define ATMEL_TC_ACMR_MASK (ATMEL_TC_ACPA | ATMEL_TC_ACPC | \
30 ATMEL_TC_AEEVT | ATMEL_TC_ASWTRG)
32 #define ATMEL_TC_BCMR_MASK (ATMEL_TC_BCPB | ATMEL_TC_BCPC | \
33 ATMEL_TC_BEEVT | ATMEL_TC_BSWTRG)
35 struct atmel_tcb_pwm_device {
36 enum pwm_polarity polarity; /* PWM polarity */
37 unsigned div; /* PWM clock divider */
38 unsigned duty; /* PWM duty expressed in clk cycles */
39 unsigned period; /* PWM period expressed in clk cycles */
42 struct atmel_tcb_channel {
50 struct atmel_tcb_pwm_chip {
55 struct regmap *regmap;
59 struct atmel_tcb_pwm_device *pwms[NPWM];
60 struct atmel_tcb_channel bkup;
63 static const u8 atmel_tcb_divisors[] = { 2, 8, 32, 128, 0, };
65 static inline struct atmel_tcb_pwm_chip *to_tcb_chip(struct pwm_chip *chip)
67 return container_of(chip, struct atmel_tcb_pwm_chip, chip);
70 static int atmel_tcb_pwm_set_polarity(struct pwm_chip *chip,
71 struct pwm_device *pwm,
72 enum pwm_polarity polarity)
74 struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
75 struct atmel_tcb_pwm_device *tcbpwm = tcbpwmc->pwms[pwm->hwpwm];
77 tcbpwm->polarity = polarity;
82 static int atmel_tcb_pwm_request(struct pwm_chip *chip,
83 struct pwm_device *pwm)
85 struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
86 struct atmel_tcb_pwm_device *tcbpwm;
90 tcbpwm = devm_kzalloc(chip->dev, sizeof(*tcbpwm), GFP_KERNEL);
94 ret = clk_prepare_enable(tcbpwmc->clk);
96 devm_kfree(chip->dev, tcbpwm);
100 tcbpwm->polarity = PWM_POLARITY_NORMAL;
105 spin_lock(&tcbpwmc->lock);
106 regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), &cmr);
108 * Get init config from Timer Counter registers if
109 * Timer Counter is already configured as a PWM generator.
111 if (cmr & ATMEL_TC_WAVE) {
113 regmap_read(tcbpwmc->regmap,
114 ATMEL_TC_REG(tcbpwmc->channel, RA),
117 regmap_read(tcbpwmc->regmap,
118 ATMEL_TC_REG(tcbpwmc->channel, RB),
121 tcbpwm->div = cmr & ATMEL_TC_TCCLKS;
122 regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, RC),
124 cmr &= (ATMEL_TC_TCCLKS | ATMEL_TC_ACMR_MASK |
129 cmr |= ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO | ATMEL_TC_EEVT_XC0;
130 regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), cmr);
131 spin_unlock(&tcbpwmc->lock);
133 tcbpwmc->pwms[pwm->hwpwm] = tcbpwm;
138 static void atmel_tcb_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
140 struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
141 struct atmel_tcb_pwm_device *tcbpwm = tcbpwmc->pwms[pwm->hwpwm];
143 clk_disable_unprepare(tcbpwmc->clk);
144 tcbpwmc->pwms[pwm->hwpwm] = NULL;
145 devm_kfree(chip->dev, tcbpwm);
148 static void atmel_tcb_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
150 struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
151 struct atmel_tcb_pwm_device *tcbpwm = tcbpwmc->pwms[pwm->hwpwm];
153 enum pwm_polarity polarity = tcbpwm->polarity;
156 * If duty is 0 the timer will be stopped and we have to
157 * configure the output correctly on software trigger:
158 * - set output to high if PWM_POLARITY_INVERSED
159 * - set output to low if PWM_POLARITY_NORMAL
161 * This is why we're reverting polarity in this case.
163 if (tcbpwm->duty == 0)
164 polarity = !polarity;
166 spin_lock(&tcbpwmc->lock);
167 regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), &cmr);
169 /* flush old setting and set the new one */
170 if (pwm->hwpwm == 0) {
171 cmr &= ~ATMEL_TC_ACMR_MASK;
172 if (polarity == PWM_POLARITY_INVERSED)
173 cmr |= ATMEL_TC_ASWTRG_CLEAR;
175 cmr |= ATMEL_TC_ASWTRG_SET;
177 cmr &= ~ATMEL_TC_BCMR_MASK;
178 if (polarity == PWM_POLARITY_INVERSED)
179 cmr |= ATMEL_TC_BSWTRG_CLEAR;
181 cmr |= ATMEL_TC_BSWTRG_SET;
184 regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), cmr);
187 * Use software trigger to apply the new setting.
188 * If both PWM devices in this group are disabled we stop the clock.
190 if (!(cmr & (ATMEL_TC_ACPC | ATMEL_TC_BCPC))) {
191 regmap_write(tcbpwmc->regmap,
192 ATMEL_TC_REG(tcbpwmc->channel, CCR),
193 ATMEL_TC_SWTRG | ATMEL_TC_CLKDIS);
194 tcbpwmc->bkup.enabled = 1;
196 regmap_write(tcbpwmc->regmap,
197 ATMEL_TC_REG(tcbpwmc->channel, CCR),
199 tcbpwmc->bkup.enabled = 0;
202 spin_unlock(&tcbpwmc->lock);
205 static int atmel_tcb_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
207 struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
208 struct atmel_tcb_pwm_device *tcbpwm = tcbpwmc->pwms[pwm->hwpwm];
210 enum pwm_polarity polarity = tcbpwm->polarity;
213 * If duty is 0 the timer will be stopped and we have to
214 * configure the output correctly on software trigger:
215 * - set output to high if PWM_POLARITY_INVERSED
216 * - set output to low if PWM_POLARITY_NORMAL
218 * This is why we're reverting polarity in this case.
220 if (tcbpwm->duty == 0)
221 polarity = !polarity;
223 spin_lock(&tcbpwmc->lock);
224 regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), &cmr);
226 /* flush old setting and set the new one */
227 cmr &= ~ATMEL_TC_TCCLKS;
229 if (pwm->hwpwm == 0) {
230 cmr &= ~ATMEL_TC_ACMR_MASK;
232 /* Set CMR flags according to given polarity */
233 if (polarity == PWM_POLARITY_INVERSED)
234 cmr |= ATMEL_TC_ASWTRG_CLEAR;
236 cmr |= ATMEL_TC_ASWTRG_SET;
238 cmr &= ~ATMEL_TC_BCMR_MASK;
239 if (polarity == PWM_POLARITY_INVERSED)
240 cmr |= ATMEL_TC_BSWTRG_CLEAR;
242 cmr |= ATMEL_TC_BSWTRG_SET;
246 * If duty is 0 or equal to period there's no need to register
247 * a specific action on RA/RB and RC compare.
248 * The output will be configured on software trigger and keep
249 * this config till next config call.
251 if (tcbpwm->duty != tcbpwm->period && tcbpwm->duty > 0) {
252 if (pwm->hwpwm == 0) {
253 if (polarity == PWM_POLARITY_INVERSED)
254 cmr |= ATMEL_TC_ACPA_SET | ATMEL_TC_ACPC_CLEAR;
256 cmr |= ATMEL_TC_ACPA_CLEAR | ATMEL_TC_ACPC_SET;
258 if (polarity == PWM_POLARITY_INVERSED)
259 cmr |= ATMEL_TC_BCPB_SET | ATMEL_TC_BCPC_CLEAR;
261 cmr |= ATMEL_TC_BCPB_CLEAR | ATMEL_TC_BCPC_SET;
265 cmr |= (tcbpwm->div & ATMEL_TC_TCCLKS);
267 regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), cmr);
270 regmap_write(tcbpwmc->regmap,
271 ATMEL_TC_REG(tcbpwmc->channel, RA),
274 regmap_write(tcbpwmc->regmap,
275 ATMEL_TC_REG(tcbpwmc->channel, RB),
278 regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, RC),
281 /* Use software trigger to apply the new setting */
282 regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CCR),
283 ATMEL_TC_SWTRG | ATMEL_TC_CLKEN);
284 tcbpwmc->bkup.enabled = 1;
285 spin_unlock(&tcbpwmc->lock);
289 static int atmel_tcb_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
290 int duty_ns, int period_ns)
292 struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
293 struct atmel_tcb_pwm_device *tcbpwm = tcbpwmc->pwms[pwm->hwpwm];
294 struct atmel_tcb_pwm_device *atcbpwm = NULL;
299 unsigned rate = clk_get_rate(tcbpwmc->clk);
300 unsigned long long min;
301 unsigned long long max;
304 * Find best clk divisor:
305 * the smallest divisor which can fulfill the period_ns requirements.
306 * If there is a gclk, the first divisor is actually the gclk selector
310 for (; i < ARRAY_SIZE(atmel_tcb_divisors); ++i) {
311 if (atmel_tcb_divisors[i] == 0) {
315 min = div_u64((u64)NSEC_PER_SEC * atmel_tcb_divisors[i], rate);
316 max = min << tcbpwmc->width;
317 if (max >= period_ns)
322 * If none of the divisor are small enough to represent period_ns
323 * take slow clock (32KHz).
325 if (i == ARRAY_SIZE(atmel_tcb_divisors)) {
327 rate = clk_get_rate(tcbpwmc->slow_clk);
328 min = div_u64(NSEC_PER_SEC, rate);
329 max = min << tcbpwmc->width;
331 /* If period is too big return ERANGE error */
336 duty = div_u64(duty_ns, min);
337 period = div_u64(period_ns, min);
340 atcbpwm = tcbpwmc->pwms[1];
342 atcbpwm = tcbpwmc->pwms[0];
345 * PWM devices provided by the TCB driver are grouped by 2.
346 * PWM devices in a given group must be configured with the
349 * We're checking the period value of the second PWM device
350 * in this group before applying the new config.
352 if ((atcbpwm && atcbpwm->duty > 0 &&
353 atcbpwm->duty != atcbpwm->period) &&
354 (atcbpwm->div != i || atcbpwm->period != period)) {
356 "failed to configure period_ns: PWM group already configured with a different value\n");
360 tcbpwm->period = period;
367 static int atmel_tcb_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
368 const struct pwm_state *state)
370 int duty_cycle, period;
373 /* This function only sets a flag in driver data */
374 atmel_tcb_pwm_set_polarity(chip, pwm, state->polarity);
376 if (!state->enabled) {
377 atmel_tcb_pwm_disable(chip, pwm);
381 period = state->period < INT_MAX ? state->period : INT_MAX;
382 duty_cycle = state->duty_cycle < INT_MAX ? state->duty_cycle : INT_MAX;
384 ret = atmel_tcb_pwm_config(chip, pwm, duty_cycle, period);
388 return atmel_tcb_pwm_enable(chip, pwm);
391 static const struct pwm_ops atmel_tcb_pwm_ops = {
392 .request = atmel_tcb_pwm_request,
393 .free = atmel_tcb_pwm_free,
394 .apply = atmel_tcb_pwm_apply,
395 .owner = THIS_MODULE,
398 static struct atmel_tcb_config tcb_rm9200_config = {
402 static struct atmel_tcb_config tcb_sam9x5_config = {
406 static struct atmel_tcb_config tcb_sama5d2_config = {
411 static const struct of_device_id atmel_tcb_of_match[] = {
412 { .compatible = "atmel,at91rm9200-tcb", .data = &tcb_rm9200_config, },
413 { .compatible = "atmel,at91sam9x5-tcb", .data = &tcb_sam9x5_config, },
414 { .compatible = "atmel,sama5d2-tcb", .data = &tcb_sama5d2_config, },
418 static int atmel_tcb_pwm_probe(struct platform_device *pdev)
420 const struct of_device_id *match;
421 struct atmel_tcb_pwm_chip *tcbpwm;
422 const struct atmel_tcb_config *config;
423 struct device_node *np = pdev->dev.of_node;
424 struct regmap *regmap;
425 struct clk *clk, *gclk = NULL;
426 struct clk *slow_clk;
427 char clk_name[] = "t0_clk";
431 err = of_property_read_u32(np, "reg", &channel);
434 "failed to get Timer Counter Block channel from device tree (error: %d)\n",
439 regmap = syscon_node_to_regmap(np->parent);
441 return PTR_ERR(regmap);
443 slow_clk = of_clk_get_by_name(np->parent, "slow_clk");
444 if (IS_ERR(slow_clk))
445 return PTR_ERR(slow_clk);
447 clk_name[1] += channel;
448 clk = of_clk_get_by_name(np->parent, clk_name);
450 clk = of_clk_get_by_name(np->parent, "t0_clk");
454 match = of_match_node(atmel_tcb_of_match, np->parent);
455 config = match->data;
457 if (config->has_gclk) {
458 gclk = of_clk_get_by_name(np->parent, "gclk");
460 return PTR_ERR(gclk);
463 tcbpwm = devm_kzalloc(&pdev->dev, sizeof(*tcbpwm), GFP_KERNEL);
464 if (tcbpwm == NULL) {
469 tcbpwm->chip.dev = &pdev->dev;
470 tcbpwm->chip.ops = &atmel_tcb_pwm_ops;
471 tcbpwm->chip.npwm = NPWM;
472 tcbpwm->channel = channel;
473 tcbpwm->regmap = regmap;
476 tcbpwm->slow_clk = slow_clk;
477 tcbpwm->width = config->counter_width;
479 err = clk_prepare_enable(slow_clk);
483 spin_lock_init(&tcbpwm->lock);
485 err = pwmchip_add(&tcbpwm->chip);
487 goto err_disable_clk;
489 platform_set_drvdata(pdev, tcbpwm);
494 clk_disable_unprepare(tcbpwm->slow_clk);
502 static void atmel_tcb_pwm_remove(struct platform_device *pdev)
504 struct atmel_tcb_pwm_chip *tcbpwm = platform_get_drvdata(pdev);
506 pwmchip_remove(&tcbpwm->chip);
508 clk_disable_unprepare(tcbpwm->slow_clk);
509 clk_put(tcbpwm->slow_clk);
510 clk_put(tcbpwm->clk);
513 static const struct of_device_id atmel_tcb_pwm_dt_ids[] = {
514 { .compatible = "atmel,tcb-pwm", },
517 MODULE_DEVICE_TABLE(of, atmel_tcb_pwm_dt_ids);
519 #ifdef CONFIG_PM_SLEEP
520 static int atmel_tcb_pwm_suspend(struct device *dev)
522 struct atmel_tcb_pwm_chip *tcbpwm = dev_get_drvdata(dev);
523 struct atmel_tcb_channel *chan = &tcbpwm->bkup;
524 unsigned int channel = tcbpwm->channel;
526 regmap_read(tcbpwm->regmap, ATMEL_TC_REG(channel, CMR), &chan->cmr);
527 regmap_read(tcbpwm->regmap, ATMEL_TC_REG(channel, RA), &chan->ra);
528 regmap_read(tcbpwm->regmap, ATMEL_TC_REG(channel, RB), &chan->rb);
529 regmap_read(tcbpwm->regmap, ATMEL_TC_REG(channel, RC), &chan->rc);
534 static int atmel_tcb_pwm_resume(struct device *dev)
536 struct atmel_tcb_pwm_chip *tcbpwm = dev_get_drvdata(dev);
537 struct atmel_tcb_channel *chan = &tcbpwm->bkup;
538 unsigned int channel = tcbpwm->channel;
540 regmap_write(tcbpwm->regmap, ATMEL_TC_REG(channel, CMR), chan->cmr);
541 regmap_write(tcbpwm->regmap, ATMEL_TC_REG(channel, RA), chan->ra);
542 regmap_write(tcbpwm->regmap, ATMEL_TC_REG(channel, RB), chan->rb);
543 regmap_write(tcbpwm->regmap, ATMEL_TC_REG(channel, RC), chan->rc);
546 regmap_write(tcbpwm->regmap,
547 ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,
548 ATMEL_TC_REG(channel, CCR));
554 static SIMPLE_DEV_PM_OPS(atmel_tcb_pwm_pm_ops, atmel_tcb_pwm_suspend,
555 atmel_tcb_pwm_resume);
557 static struct platform_driver atmel_tcb_pwm_driver = {
559 .name = "atmel-tcb-pwm",
560 .of_match_table = atmel_tcb_pwm_dt_ids,
561 .pm = &atmel_tcb_pwm_pm_ops,
563 .probe = atmel_tcb_pwm_probe,
564 .remove_new = atmel_tcb_pwm_remove,
566 module_platform_driver(atmel_tcb_pwm_driver);
568 MODULE_AUTHOR("Boris BREZILLON <b.brezillon@overkiz.com>");
569 MODULE_DESCRIPTION("Atmel Timer Counter Pulse Width Modulation Driver");
570 MODULE_LICENSE("GPL v2");