1 // SPDX-License-Identifier: GPL-2.0
3 * Primary to Sideband (P2SB) bridge access support
5 * Copyright (c) 2017, 2021-2022 Intel Corporation.
7 * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
8 * Jonathan Yong <jonathan.yong@intel.com>
11 #include <linux/bits.h>
12 #include <linux/export.h>
13 #include <linux/pci.h>
14 #include <linux/platform_data/x86/p2sb.h>
16 #include <asm/cpu_device_id.h>
17 #include <asm/intel-family.h>
20 #define P2SBC_HIDE BIT(8)
22 #define P2SB_DEVFN_DEFAULT PCI_DEVFN(31, 1)
24 static const struct x86_cpu_id p2sb_cpu_ids[] = {
25 X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, PCI_DEVFN(13, 0)),
30 * Cache BAR0 of P2SB device functions 0 to 7.
31 * TODO: The constant 8 is the number of functions that PCI specification
32 * defines. Same definitions exist tree-wide. Unify this definition and
33 * the other definitions then move to include/uapi/linux/pci.h.
35 #define NR_P2SB_RES_CACHE 8
37 struct p2sb_res_cache {
42 static struct p2sb_res_cache p2sb_resources[NR_P2SB_RES_CACHE];
44 static int p2sb_get_devfn(unsigned int *devfn)
46 unsigned int fn = P2SB_DEVFN_DEFAULT;
47 const struct x86_cpu_id *id;
49 id = x86_match_cpu(p2sb_cpu_ids);
51 fn = (unsigned int)id->driver_data;
57 static bool p2sb_valid_resource(struct resource *res)
65 /* Copy resource from the first BAR of the device in question */
66 static void p2sb_read_bar0(struct pci_dev *pdev, struct resource *mem)
68 struct resource *bar0 = pci_resource_n(pdev, 0);
70 /* Make sure we have no dangling pointers in the output */
71 memset(mem, 0, sizeof(*mem));
74 * We copy only selected fields from the original resource.
75 * Because a PCI device will be removed soon, we may not use
76 * any allocated data, hence we may not copy any pointers.
78 mem->start = bar0->start;
80 mem->flags = bar0->flags;
81 mem->desc = bar0->desc;
84 static void p2sb_scan_and_cache_devfn(struct pci_bus *bus, unsigned int devfn)
86 struct p2sb_res_cache *cache = &p2sb_resources[PCI_FUNC(devfn)];
89 pdev = pci_scan_single_device(bus, devfn);
93 p2sb_read_bar0(pdev, &cache->res);
94 cache->bus_dev_id = bus->dev.id;
96 pci_stop_and_remove_bus_device(pdev);
99 static int p2sb_scan_and_cache(struct pci_bus *bus, unsigned int devfn)
101 unsigned int slot, fn;
103 if (PCI_FUNC(devfn) == 0) {
105 * When function number of the P2SB device is zero, scan it and
106 * other function numbers, and if devices are available, cache
109 slot = PCI_SLOT(devfn);
110 for (fn = 0; fn < NR_P2SB_RES_CACHE; fn++)
111 p2sb_scan_and_cache_devfn(bus, PCI_DEVFN(slot, fn));
113 /* Scan the P2SB device and cache its BAR0 */
114 p2sb_scan_and_cache_devfn(bus, devfn);
117 if (!p2sb_valid_resource(&p2sb_resources[PCI_FUNC(devfn)].res))
123 static struct pci_bus *p2sb_get_bus(struct pci_bus *bus)
125 static struct pci_bus *p2sb_bus;
127 bus = bus ?: p2sb_bus;
131 /* Assume P2SB is on the bus 0 in domain 0 */
132 p2sb_bus = pci_find_bus(0, 0);
136 static int p2sb_cache_resources(void)
138 unsigned int devfn_p2sb;
139 u32 value = P2SBC_HIDE;
144 /* Get devfn for P2SB device itself */
145 ret = p2sb_get_devfn(&devfn_p2sb);
149 bus = p2sb_get_bus(NULL);
154 * When a device with same devfn exists and its device class is not
155 * PCI_CLASS_MEMORY_OTHER for P2SB, do not touch it.
157 pci_bus_read_config_word(bus, devfn_p2sb, PCI_CLASS_DEVICE, &class);
158 if (!PCI_POSSIBLE_ERROR(class) && class != PCI_CLASS_MEMORY_OTHER)
162 * Prevent concurrent PCI bus scan from seeing the P2SB device and
163 * removing via sysfs while it is temporarily exposed.
165 pci_lock_rescan_remove();
168 * The BIOS prevents the P2SB device from being enumerated by the PCI
169 * subsystem, so we need to unhide and hide it back to lookup the BAR.
170 * Unhide the P2SB device here, if needed.
172 pci_bus_read_config_dword(bus, devfn_p2sb, P2SBC, &value);
173 if (value & P2SBC_HIDE)
174 pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, 0);
176 ret = p2sb_scan_and_cache(bus, devfn_p2sb);
178 /* Hide the P2SB device, if it was hidden */
179 if (value & P2SBC_HIDE)
180 pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, P2SBC_HIDE);
182 pci_unlock_rescan_remove();
188 * p2sb_bar - Get Primary to Sideband (P2SB) bridge device BAR
189 * @bus: PCI bus to communicate with
190 * @devfn: PCI slot and function to communicate with
191 * @mem: memory resource to be filled in
193 * If @bus is NULL, the bus 0 in domain 0 will be used.
194 * If @devfn is 0, it will be replaced by devfn of the P2SB device.
196 * Caller must provide a valid pointer to @mem.
199 * 0 on success or appropriate errno value on error.
201 int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
203 struct p2sb_res_cache *cache;
206 bus = p2sb_get_bus(bus);
211 ret = p2sb_get_devfn(&devfn);
216 cache = &p2sb_resources[PCI_FUNC(devfn)];
217 if (cache->bus_dev_id != bus->dev.id)
220 if (!p2sb_valid_resource(&cache->res))
223 memcpy(mem, &cache->res, sizeof(*mem));
226 EXPORT_SYMBOL_GPL(p2sb_bar);
228 static int __init p2sb_fs_init(void)
230 p2sb_cache_resources();
235 * pci_rescan_remove_lock to avoid access to unhidden P2SB devices can
236 * not be locked in sysfs pci bus rescan path because of deadlock. To
237 * avoid the deadlock, access to P2SB devices with the lock at an early
238 * step in kernel initialization and cache required resources. This
239 * should happen after subsys_initcall which initializes PCI subsystem
240 * and before device_initcall which requires P2SB resources.
242 fs_initcall(p2sb_fs_init);