drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c

   1 /*
   2  * Allwinner H3 SoCs pinctrl driver.
   3  *
   4  * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
   5  *
   6  * Based on pinctrl-sun8i-a23.c, which is:
   7  * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org>
   8  * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
   9  *
  10  * This file is licensed under the terms of the GNU General Public
  11  * License version 2.  This program is licensed "as is" without any
  12  * warranty of any kind, whether express or implied.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/of.h>
  18 #include <linux/of_device.h>
  19 #include <linux/pinctrl/pinctrl.h>
  20
  21 #include "pinctrl-sunxi.h"
  22
  23 static const struct sunxi_desc_pin sun8i_h3_pins[] = {
  24         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
  25                   SUNXI_FUNCTION(0x0, "gpio_in"),
  26                   SUNXI_FUNCTION(0x1, "gpio_out"),
  27                   SUNXI_FUNCTION(0x2, "uart2"),         /* TX */
  28                   SUNXI_FUNCTION(0x3, "jtag"),          /* MS */
  29                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),  /* PA_EINT0 */
  30         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
  31                   SUNXI_FUNCTION(0x0, "gpio_in"),
  32                   SUNXI_FUNCTION(0x1, "gpio_out"),
  33                   SUNXI_FUNCTION(0x2, "uart2"),         /* RX */
  34                   SUNXI_FUNCTION(0x3, "jtag"),          /* CK */
  35                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),  /* PA_EINT1 */
  36         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
  37                   SUNXI_FUNCTION(0x0, "gpio_in"),
  38                   SUNXI_FUNCTION(0x1, "gpio_out"),
  39                   SUNXI_FUNCTION(0x2, "uart2"),         /* RTS */
  40                   SUNXI_FUNCTION(0x3, "jtag"),          /* DO */
  41                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),  /* PA_EINT2 */
  42         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
  43                   SUNXI_FUNCTION(0x0, "gpio_in"),
  44                   SUNXI_FUNCTION(0x1, "gpio_out"),
  45                   SUNXI_FUNCTION(0x2, "uart2"),         /* CTS */
  46                   SUNXI_FUNCTION(0x3, "jtag"),          /* DI */
  47                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),  /* PA_EINT3 */
  48         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
  49                   SUNXI_FUNCTION(0x0, "gpio_in"),
  50                   SUNXI_FUNCTION(0x1, "gpio_out"),
  51                   SUNXI_FUNCTION(0x2, "uart0"),         /* TX */
  52                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),  /* PA_EINT4 */
  53         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
  54                   SUNXI_FUNCTION(0x0, "gpio_in"),
  55                   SUNXI_FUNCTION(0x1, "gpio_out"),
  56                   SUNXI_FUNCTION(0x2, "uart0"),         /* RX */
  57                   SUNXI_FUNCTION(0x3, "pwm0"),
  58                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),  /* PA_EINT5 */
  59         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
  60                   SUNXI_FUNCTION(0x0, "gpio_in"),
  61                   SUNXI_FUNCTION(0x1, "gpio_out"),
  62                   SUNXI_FUNCTION(0x2, "sim"),           /* PWREN */
  63                   SUNXI_FUNCTION(0x3, "pwm1"),
  64                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),  /* PA_EINT6 */
  65         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
  66                   SUNXI_FUNCTION(0x0, "gpio_in"),
  67                   SUNXI_FUNCTION(0x1, "gpio_out"),
  68                   SUNXI_FUNCTION(0x2, "sim"),           /* CLK */
  69                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),  /* PA_EINT7 */
  70         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
  71                   SUNXI_FUNCTION(0x0, "gpio_in"),
  72                   SUNXI_FUNCTION(0x1, "gpio_out"),
  73                   SUNXI_FUNCTION(0x2, "sim"),           /* DATA */
  74                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),  /* PA_EINT8 */
  75         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
  76                   SUNXI_FUNCTION(0x0, "gpio_in"),
  77                   SUNXI_FUNCTION(0x1, "gpio_out"),
  78                   SUNXI_FUNCTION(0x2, "sim"),           /* RST */
  79                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),  /* PA_EINT9 */
  80         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
  81                   SUNXI_FUNCTION(0x0, "gpio_in"),
  82                   SUNXI_FUNCTION(0x1, "gpio_out"),
  83                   SUNXI_FUNCTION(0x2, "sim"),           /* DET */
  84                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PA_EINT10 */
  85         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
  86                   SUNXI_FUNCTION(0x0, "gpio_in"),
  87                   SUNXI_FUNCTION(0x1, "gpio_out"),
  88                   SUNXI_FUNCTION(0x2, "i2c0"),          /* SCK */
  89                   SUNXI_FUNCTION(0x3, "di"),            /* TX */
  90                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PA_EINT11 */
  91         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
  92                   SUNXI_FUNCTION(0x0, "gpio_in"),
  93                   SUNXI_FUNCTION(0x1, "gpio_out"),
  94                   SUNXI_FUNCTION(0x2, "i2c0"),          /* SDA */
  95                   SUNXI_FUNCTION(0x3, "di"),            /* RX */
  96                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PA_EINT12 */
  97         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
  98                   SUNXI_FUNCTION(0x0, "gpio_in"),
  99                   SUNXI_FUNCTION(0x1, "gpio_out"),
 100                   SUNXI_FUNCTION(0x2, "spi1"),          /* CS */
 101                   SUNXI_FUNCTION(0x3, "uart3"),         /* TX */
 102                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)), /* PA_EINT13 */
 103         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
 104                   SUNXI_FUNCTION(0x0, "gpio_in"),
 105                   SUNXI_FUNCTION(0x1, "gpio_out"),
 106                   SUNXI_FUNCTION(0x2, "spi1"),          /* CLK */
 107                   SUNXI_FUNCTION(0x3, "uart3"),         /* RX */
 108                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 14)), /* PA_EINT14 */
 109         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
 110                   SUNXI_FUNCTION(0x0, "gpio_in"),
 111                   SUNXI_FUNCTION(0x1, "gpio_out"),
 112                   SUNXI_FUNCTION(0x2, "spi1"),          /* MOSI */
 113                   SUNXI_FUNCTION(0x3, "uart3"),         /* RTS */
 114                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)), /* PA_EINT15 */
 115         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
 116                   SUNXI_FUNCTION(0x0, "gpio_in"),
 117                   SUNXI_FUNCTION(0x1, "gpio_out"),
 118                   SUNXI_FUNCTION(0x2, "spi1"),          /* MISO */
 119                   SUNXI_FUNCTION(0x3, "uart3"),         /* CTS */
 120                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)), /* PA_EINT16 */
 121         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
 122                   SUNXI_FUNCTION(0x0, "gpio_in"),
 123                   SUNXI_FUNCTION(0x1, "gpio_out"),
 124                   SUNXI_FUNCTION(0x2, "spdif"),         /* OUT */
 125                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)), /* PA_EINT17 */
 126         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18),
 127                   SUNXI_FUNCTION(0x0, "gpio_in"),
 128                   SUNXI_FUNCTION(0x1, "gpio_out"),
 129                   SUNXI_FUNCTION(0x2, "i2s0"),          /* SYNC */
 130                   SUNXI_FUNCTION(0x3, "i2c1"),          /* SCK */
 131                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)), /* PA_EINT18 */
 132         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19),
 133                   SUNXI_FUNCTION(0x0, "gpio_in"),
 134                   SUNXI_FUNCTION(0x1, "gpio_out"),
 135                   SUNXI_FUNCTION(0x2, "i2s0"),          /* CLK */
 136                   SUNXI_FUNCTION(0x3, "i2c1"),          /* SDA */
 137                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 19)), /* PA_EINT19 */
 138         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 20),
 139                   SUNXI_FUNCTION(0x0, "gpio_in"),
 140                   SUNXI_FUNCTION(0x1, "gpio_out"),
 141                   SUNXI_FUNCTION(0x2, "i2s0"),          /* DOUT */
 142                   SUNXI_FUNCTION(0x3, "sim"),           /* VPPEN */
 143                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 20)), /* PA_EINT20 */
 144         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 21),
 145                   SUNXI_FUNCTION(0x0, "gpio_in"),
 146                   SUNXI_FUNCTION(0x1, "gpio_out"),
 147                   SUNXI_FUNCTION(0x2, "i2s0"),          /* DIN */
 148                   SUNXI_FUNCTION(0x3, "sim"),           /* VPPPP */
 149                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 21)), /* PA_EINT21 */
 150         /* Hole */
 151         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
 152                   SUNXI_FUNCTION(0x0, "gpio_in"),
 153                   SUNXI_FUNCTION(0x1, "gpio_out"),
 154                   SUNXI_FUNCTION(0x2, "nand0"),         /* WE */
 155                   SUNXI_FUNCTION(0x3, "spi0")),         /* MOSI */
 156         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
 157                   SUNXI_FUNCTION(0x0, "gpio_in"),
 158                   SUNXI_FUNCTION(0x1, "gpio_out"),
 159                   SUNXI_FUNCTION(0x2, "nand0"),         /* ALE */
 160                   SUNXI_FUNCTION(0x3, "spi0")),         /* MISO */
 161         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
 162                   SUNXI_FUNCTION(0x0, "gpio_in"),
 163                   SUNXI_FUNCTION(0x1, "gpio_out"),
 164                   SUNXI_FUNCTION(0x2, "nand0"),         /* CLE */
 165                   SUNXI_FUNCTION(0x3, "spi0")),         /* CLK */
 166         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
 167                   SUNXI_FUNCTION(0x0, "gpio_in"),
 168                   SUNXI_FUNCTION(0x1, "gpio_out"),
 169                   SUNXI_FUNCTION(0x2, "nand0"),         /* CE1 */
 170                   SUNXI_FUNCTION(0x3, "spi0")),         /* CS */
 171         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
 172                   SUNXI_FUNCTION(0x0, "gpio_in"),
 173                   SUNXI_FUNCTION(0x1, "gpio_out"),
 174                   SUNXI_FUNCTION(0x2, "nand0")),        /* CE0 */
 175         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
 176                   SUNXI_FUNCTION(0x0, "gpio_in"),
 177                   SUNXI_FUNCTION(0x1, "gpio_out"),
 178                   SUNXI_FUNCTION(0x2, "nand0"),         /* RE */
 179                   SUNXI_FUNCTION(0x3, "mmc2")),         /* CLK */
 180         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
 181                   SUNXI_FUNCTION(0x0, "gpio_in"),
 182                   SUNXI_FUNCTION(0x1, "gpio_out"),
 183                   SUNXI_FUNCTION(0x2, "nand0"),         /* RB0 */
 184                   SUNXI_FUNCTION(0x3, "mmc2")),         /* CMD */
 185         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
 186                   SUNXI_FUNCTION(0x0, "gpio_in"),
 187                   SUNXI_FUNCTION(0x1, "gpio_out"),
 188                   SUNXI_FUNCTION(0x2, "nand0")),        /* RB1 */
 189         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
 190                   SUNXI_FUNCTION(0x0, "gpio_in"),
 191                   SUNXI_FUNCTION(0x1, "gpio_out"),
 192                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ0 */
 193                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D0 */
 194         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
 195                   SUNXI_FUNCTION(0x0, "gpio_in"),
 196                   SUNXI_FUNCTION(0x1, "gpio_out"),
 197                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ1 */
 198                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D1 */
 199         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
 200                   SUNXI_FUNCTION(0x0, "gpio_in"),
 201                   SUNXI_FUNCTION(0x1, "gpio_out"),
 202                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ2 */
 203                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D2 */
 204         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
 205                   SUNXI_FUNCTION(0x0, "gpio_in"),
 206                   SUNXI_FUNCTION(0x1, "gpio_out"),
 207                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ3 */
 208                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D3 */
 209         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
 210                   SUNXI_FUNCTION(0x0, "gpio_in"),
 211                   SUNXI_FUNCTION(0x1, "gpio_out"),
 212                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ4 */
 213                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D4 */
 214         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
 215                   SUNXI_FUNCTION(0x0, "gpio_in"),
 216                   SUNXI_FUNCTION(0x1, "gpio_out"),
 217                   SUNXI_FUNCTION(0x2, "nand0"),         /* DQ5 */
 218                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D5 */
 219         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
 220                   SUNXI_FUNCTION(0x0, "gpio_in"),
 221                   SUNXI_FUNCTION(0x1, "gpio_out"),
 222                   SUNXI_FUNCTION(0x2, "nand"),          /* DQ6 */
 223                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D6 */
 224         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
 225                   SUNXI_FUNCTION(0x0, "gpio_in"),
 226                   SUNXI_FUNCTION(0x1, "gpio_out"),
 227                   SUNXI_FUNCTION(0x2, "nand"),          /* DQ7 */
 228                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D7 */
 229         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
 230                   SUNXI_FUNCTION(0x0, "gpio_in"),
 231                   SUNXI_FUNCTION(0x1, "gpio_out"),
 232                   SUNXI_FUNCTION(0x2, "nand"),          /* DQS */
 233                   SUNXI_FUNCTION(0x3, "mmc2")),         /* RST */
 234         /* Hole */
 235         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
 236                   SUNXI_FUNCTION(0x0, "gpio_in"),
 237                   SUNXI_FUNCTION(0x1, "gpio_out"),
 238                   SUNXI_FUNCTION(0x2, "emac")),         /* RXD3 */
 239         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
 240                   SUNXI_FUNCTION(0x0, "gpio_in"),
 241                   SUNXI_FUNCTION(0x1, "gpio_out"),
 242                   SUNXI_FUNCTION(0x2, "emac")),         /* RXD2 */
 243         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
 244                   SUNXI_FUNCTION(0x0, "gpio_in"),
 245                   SUNXI_FUNCTION(0x1, "gpio_out"),
 246                   SUNXI_FUNCTION(0x2, "emac")),         /* RXD1 */
 247         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
 248                   SUNXI_FUNCTION(0x0, "gpio_in"),
 249                   SUNXI_FUNCTION(0x1, "gpio_out"),
 250                   SUNXI_FUNCTION(0x2, "emac")),         /* RXD0 */
 251         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
 252                   SUNXI_FUNCTION(0x0, "gpio_in"),
 253                   SUNXI_FUNCTION(0x1, "gpio_out"),
 254                   SUNXI_FUNCTION(0x2, "emac")),         /* RXCK */
 255         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
 256                   SUNXI_FUNCTION(0x0, "gpio_in"),
 257                   SUNXI_FUNCTION(0x1, "gpio_out"),
 258                   SUNXI_FUNCTION(0x2, "emac")),         /* RXCTL/RXDV */
 259         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
 260                   SUNXI_FUNCTION(0x0, "gpio_in"),
 261                   SUNXI_FUNCTION(0x1, "gpio_out"),
 262                   SUNXI_FUNCTION(0x2, "emac")),         /* RXERR */
 263         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
 264                   SUNXI_FUNCTION(0x0, "gpio_in"),
 265                   SUNXI_FUNCTION(0x1, "gpio_out"),
 266                   SUNXI_FUNCTION(0x2, "emac")),         /* TXD3 */
 267         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
 268                   SUNXI_FUNCTION(0x0, "gpio_in"),
 269                   SUNXI_FUNCTION(0x1, "gpio_out"),
 270                   SUNXI_FUNCTION(0x2, "emac")),         /* TXD2 */
 271         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
 272                   SUNXI_FUNCTION(0x0, "gpio_in"),
 273                   SUNXI_FUNCTION(0x1, "gpio_out"),
 274                   SUNXI_FUNCTION(0x2, "emac")),         /* TXD1 */
 275         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
 276                   SUNXI_FUNCTION(0x0, "gpio_in"),
 277                   SUNXI_FUNCTION(0x1, "gpio_out"),
 278                   SUNXI_FUNCTION(0x2, "emac")),         /* TXD0 */
 279         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
 280                   SUNXI_FUNCTION(0x0, "gpio_in"),
 281                   SUNXI_FUNCTION(0x1, "gpio_out"),
 282                   SUNXI_FUNCTION(0x2, "emac")),         /* CRS */
 283         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
 284                   SUNXI_FUNCTION(0x0, "gpio_in"),
 285                   SUNXI_FUNCTION(0x1, "gpio_out"),
 286                   SUNXI_FUNCTION(0x2, "emac")),         /* TXCK */
 287         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
 288                   SUNXI_FUNCTION(0x0, "gpio_in"),
 289                   SUNXI_FUNCTION(0x1, "gpio_out"),
 290                   SUNXI_FUNCTION(0x2, "emac")),         /* TXCTL/TXEN */
 291         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
 292                   SUNXI_FUNCTION(0x0, "gpio_in"),
 293                   SUNXI_FUNCTION(0x1, "gpio_out"),
 294                   SUNXI_FUNCTION(0x2, "emac")),         /* TXERR */
 295         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
 296                   SUNXI_FUNCTION(0x0, "gpio_in"),
 297                   SUNXI_FUNCTION(0x1, "gpio_out"),
 298                   SUNXI_FUNCTION(0x2, "emac")),         /* CLKIN/COL */
 299         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
 300                   SUNXI_FUNCTION(0x0, "gpio_in"),
 301                   SUNXI_FUNCTION(0x1, "gpio_out"),
 302                   SUNXI_FUNCTION(0x2, "emac")),         /* MDC */
 303         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
 304                   SUNXI_FUNCTION(0x0, "gpio_in"),
 305                   SUNXI_FUNCTION(0x1, "gpio_out"),
 306                   SUNXI_FUNCTION(0x2, "emac")),         /* MDIO */
 307         /* Hole */
 308         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
 309                   SUNXI_FUNCTION(0x0, "gpio_in"),
 310                   SUNXI_FUNCTION(0x1, "gpio_out"),
 311                   SUNXI_FUNCTION(0x2, "csi"),           /* PCLK */
 312                   SUNXI_FUNCTION(0x3, "ts")),           /* CLK */
 313         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
 314                   SUNXI_FUNCTION(0x0, "gpio_in"),
 315                   SUNXI_FUNCTION(0x1, "gpio_out"),
 316                   SUNXI_FUNCTION(0x2, "csi"),           /* MCLK */
 317                   SUNXI_FUNCTION(0x3, "ts")),           /* ERR */
 318         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
 319                   SUNXI_FUNCTION(0x0, "gpio_in"),
 320                   SUNXI_FUNCTION(0x1, "gpio_out"),
 321                   SUNXI_FUNCTION(0x2, "csi"),           /* HSYNC */
 322                   SUNXI_FUNCTION(0x3, "ts")),           /* SYNC */
 323         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
 324                   SUNXI_FUNCTION(0x0, "gpio_in"),
 325                   SUNXI_FUNCTION(0x1, "gpio_out"),
 326                   SUNXI_FUNCTION(0x2, "csi"),           /* VSYNC */
 327                   SUNXI_FUNCTION(0x3, "ts")),           /* DVLD */
 328         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
 329                   SUNXI_FUNCTION(0x0, "gpio_in"),
 330                   SUNXI_FUNCTION(0x1, "gpio_out"),
 331                   SUNXI_FUNCTION(0x2, "csi"),           /* D0 */
 332                   SUNXI_FUNCTION(0x3, "ts")),           /* D0 */
 333         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
 334                   SUNXI_FUNCTION(0x0, "gpio_in"),
 335                   SUNXI_FUNCTION(0x1, "gpio_out"),
 336                   SUNXI_FUNCTION(0x2, "csi"),           /* D1 */
 337                   SUNXI_FUNCTION(0x3, "ts")),           /* D1 */
 338         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
 339                   SUNXI_FUNCTION(0x0, "gpio_in"),
 340                   SUNXI_FUNCTION(0x1, "gpio_out"),
 341                   SUNXI_FUNCTION(0x2, "csi"),           /* D2 */
 342                   SUNXI_FUNCTION(0x3, "ts")),           /* D2 */
 343         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
 344                   SUNXI_FUNCTION(0x0, "gpio_in"),
 345                   SUNXI_FUNCTION(0x1, "gpio_out"),
 346                   SUNXI_FUNCTION(0x2, "csi"),           /* D3 */
 347                   SUNXI_FUNCTION(0x3, "ts")),           /* D3 */
 348         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
 349                   SUNXI_FUNCTION(0x0, "gpio_in"),
 350                   SUNXI_FUNCTION(0x1, "gpio_out"),
 351                   SUNXI_FUNCTION(0x2, "csi"),           /* D4 */
 352                   SUNXI_FUNCTION(0x3, "ts")),           /* D4 */
 353         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
 354                   SUNXI_FUNCTION(0x0, "gpio_in"),
 355                   SUNXI_FUNCTION(0x1, "gpio_out"),
 356                   SUNXI_FUNCTION(0x2, "csi"),           /* D5 */
 357                   SUNXI_FUNCTION(0x3, "ts")),           /* D5 */
 358         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
 359                   SUNXI_FUNCTION(0x0, "gpio_in"),
 360                   SUNXI_FUNCTION(0x1, "gpio_out"),
 361                   SUNXI_FUNCTION(0x2, "csi"),           /* D6 */
 362                   SUNXI_FUNCTION(0x3, "ts")),           /* D6 */
 363         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
 364                   SUNXI_FUNCTION(0x0, "gpio_in"),
 365                   SUNXI_FUNCTION(0x1, "gpio_out"),
 366                   SUNXI_FUNCTION(0x2, "csi"),           /* D7 */
 367                   SUNXI_FUNCTION(0x3, "ts")),           /* D7 */
 368         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
 369                   SUNXI_FUNCTION(0x0, "gpio_in"),
 370                   SUNXI_FUNCTION(0x1, "gpio_out"),
 371                   SUNXI_FUNCTION(0x2, "csi"),           /* SCK */
 372                   SUNXI_FUNCTION(0x3, "i2c2")),         /* SCK */
 373         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
 374                   SUNXI_FUNCTION(0x0, "gpio_in"),
 375                   SUNXI_FUNCTION(0x1, "gpio_out"),
 376                   SUNXI_FUNCTION(0x2, "csi"),           /* SDA */
 377                   SUNXI_FUNCTION(0x3, "i2c2")),         /* SDA */
 378         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
 379                   SUNXI_FUNCTION(0x0, "gpio_in"),
 380                   SUNXI_FUNCTION(0x1, "gpio_out")),
 381         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
 382                   SUNXI_FUNCTION(0x0, "gpio_in"),
 383                   SUNXI_FUNCTION(0x1, "gpio_out")),
 384         /* Hole */
 385         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
 386                   SUNXI_FUNCTION(0x0, "gpio_in"),
 387                   SUNXI_FUNCTION(0x1, "gpio_out"),
 388                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D1 */
 389                   SUNXI_FUNCTION(0x3, "jtag")),         /* MS */
 390         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
 391                   SUNXI_FUNCTION(0x0, "gpio_in"),
 392                   SUNXI_FUNCTION(0x1, "gpio_out"),
 393                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D0 */
 394                   SUNXI_FUNCTION(0x3, "jtag")),         /* DI */
 395         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
 396                   SUNXI_FUNCTION(0x0, "gpio_in"),
 397                   SUNXI_FUNCTION(0x1, "gpio_out"),
 398                   SUNXI_FUNCTION(0x2, "mmc0"),          /* CLK */
 399                   SUNXI_FUNCTION(0x3, "uart0")),        /* TX */
 400         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
 401                   SUNXI_FUNCTION(0x0, "gpio_in"),
 402                   SUNXI_FUNCTION(0x1, "gpio_out"),
 403                   SUNXI_FUNCTION(0x2, "mmc0"),          /* CMD */
 404                   SUNXI_FUNCTION(0x3, "jtag")),         /* DO */
 405         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
 406                   SUNXI_FUNCTION(0x0, "gpio_in"),
 407                   SUNXI_FUNCTION(0x1, "gpio_out"),
 408                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D3 */
 409                   SUNXI_FUNCTION(0x3, "uart0")),        /* RX */
 410         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
 411                   SUNXI_FUNCTION(0x0, "gpio_in"),
 412                   SUNXI_FUNCTION(0x1, "gpio_out"),
 413                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D2 */
 414                   SUNXI_FUNCTION(0x3, "jtag")),         /* CK */
 415         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
 416                   SUNXI_FUNCTION(0x0, "gpio_in"),
 417                   SUNXI_FUNCTION(0x1, "gpio_out")),
 418         /* Hole */
 419         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
 420                   SUNXI_FUNCTION(0x0, "gpio_in"),
 421                   SUNXI_FUNCTION(0x1, "gpio_out"),
 422                   SUNXI_FUNCTION(0x2, "mmc1"),          /* CLK */
 423                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)),  /* PG_EINT0 */
 424         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
 425                   SUNXI_FUNCTION(0x0, "gpio_in"),
 426                   SUNXI_FUNCTION(0x1, "gpio_out"),
 427                   SUNXI_FUNCTION(0x2, "mmc1"),          /* CMD */
 428                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)),  /* PG_EINT1 */
 429         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
 430                   SUNXI_FUNCTION(0x0, "gpio_in"),
 431                   SUNXI_FUNCTION(0x1, "gpio_out"),
 432                   SUNXI_FUNCTION(0x2, "mmc1"),          /* D0 */
 433                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)),  /* PG_EINT2 */
 434         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
 435                   SUNXI_FUNCTION(0x0, "gpio_in"),
 436                   SUNXI_FUNCTION(0x1, "gpio_out"),
 437                   SUNXI_FUNCTION(0x2, "mmc1"),          /* D1 */
 438                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)),  /* PG_EINT3 */
 439         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
 440                   SUNXI_FUNCTION(0x0, "gpio_in"),
 441                   SUNXI_FUNCTION(0x1, "gpio_out"),
 442                   SUNXI_FUNCTION(0x2, "mmc1"),          /* D2 */
 443                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),  /* PG_EINT4 */
 444         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
 445                   SUNXI_FUNCTION(0x0, "gpio_in"),
 446                   SUNXI_FUNCTION(0x1, "gpio_out"),
 447                   SUNXI_FUNCTION(0x2, "mmc1"),          /* D3 */
 448                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)),  /* PG_EINT5 */
 449         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
 450                   SUNXI_FUNCTION(0x0, "gpio_in"),
 451                   SUNXI_FUNCTION(0x1, "gpio_out"),
 452                   SUNXI_FUNCTION(0x2, "uart1"),         /* TX */
 453                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)),  /* PG_EINT6 */
 454         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
 455                   SUNXI_FUNCTION(0x0, "gpio_in"),
 456                   SUNXI_FUNCTION(0x1, "gpio_out"),
 457                   SUNXI_FUNCTION(0x2, "uart1"),         /* RX */
 458                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)),  /* PG_EINT7 */
 459         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
 460                   SUNXI_FUNCTION(0x0, "gpio_in"),
 461                   SUNXI_FUNCTION(0x1, "gpio_out"),
 462                   SUNXI_FUNCTION(0x2, "uart1"),         /* RTS */
 463                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)),  /* PG_EINT8 */
 464         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
 465                   SUNXI_FUNCTION(0x0, "gpio_in"),
 466                   SUNXI_FUNCTION(0x1, "gpio_out"),
 467                   SUNXI_FUNCTION(0x2, "uart1"),         /* CTS */
 468                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)),  /* PG_EINT9 */
 469         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
 470                   SUNXI_FUNCTION(0x0, "gpio_in"),
 471                   SUNXI_FUNCTION(0x1, "gpio_out"),
 472                   SUNXI_FUNCTION(0x2, "i2s1"),          /* SYNC */
 473                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)), /* PG_EINT10 */
 474         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
 475                   SUNXI_FUNCTION(0x0, "gpio_in"),
 476                   SUNXI_FUNCTION(0x1, "gpio_out"),
 477                   SUNXI_FUNCTION(0x2, "i2s1"),          /* CLK */
 478                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)), /* PG_EINT11 */
 479         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
 480                   SUNXI_FUNCTION(0x0, "gpio_in"),
 481                   SUNXI_FUNCTION(0x1, "gpio_out"),
 482                   SUNXI_FUNCTION(0x2, "i2s1"),          /* DOUT */
 483                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)), /* PG_EINT12 */
 484         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
 485                   SUNXI_FUNCTION(0x0, "gpio_in"),
 486                   SUNXI_FUNCTION(0x1, "gpio_out"),
 487                   SUNXI_FUNCTION(0x2, "i2s1"),          /* DIN */
 488                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)), /* PG_EINT13 */
 489 };
 490
 491 static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_data = {
 492         .pins = sun8i_h3_pins,
 493         .npins = ARRAY_SIZE(sun8i_h3_pins),
 494         .irq_banks = 2,
 495         .irq_read_needs_mux = true
 496 };
 497
 498 static int sun8i_h3_pinctrl_probe(struct platform_device *pdev)
 499 {
 500         return sunxi_pinctrl_init(pdev,
 501                                   &sun8i_h3_pinctrl_data);
 502 }
 503
 504 static const struct of_device_id sun8i_h3_pinctrl_match[] = {
 505         { .compatible = "allwinner,sun8i-h3-pinctrl", },
 506         {}
 507 };
 508
 509 static struct platform_driver sun8i_h3_pinctrl_driver = {
 510         .probe  = sun8i_h3_pinctrl_probe,
 511         .driver = {
 512                 .name           = "sun8i-h3-pinctrl",
 513                 .of_match_table = sun8i_h3_pinctrl_match,
 514         },
 515 };
 516 builtin_platform_driver(sun8i_h3_pinctrl_driver);