1 // SPDX-License-Identifier: GPL-2.0
3 * Allwinner D1 SoC pinctrl driver.
5 * Copyright (c) 2020 wuyan@allwinnertech.com
6 * Copyright (c) 2021-2022 Samuel Holland <samuel@sholland.org>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
12 #include <linux/of_device.h>
13 #include <linux/pinctrl/pinctrl.h>
15 #include "pinctrl-sunxi.h"
17 static const struct sunxi_desc_pin d1_pins[] = {
19 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
20 SUNXI_FUNCTION(0x0, "gpio_in"),
21 SUNXI_FUNCTION(0x1, "gpio_out"),
22 SUNXI_FUNCTION(0x2, "pwm3"),
23 SUNXI_FUNCTION(0x3, "ir"), /* TX */
24 SUNXI_FUNCTION(0x4, "i2c2"), /* SCK */
25 SUNXI_FUNCTION(0x5, "spi1"), /* WP */
26 SUNXI_FUNCTION(0x6, "uart0"), /* TX */
27 SUNXI_FUNCTION(0x7, "uart2"), /* TX */
28 SUNXI_FUNCTION(0x8, "spdif"), /* OUT */
29 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 0)),
30 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
31 SUNXI_FUNCTION(0x0, "gpio_in"),
32 SUNXI_FUNCTION(0x1, "gpio_out"),
33 SUNXI_FUNCTION(0x2, "pwm4"),
34 SUNXI_FUNCTION(0x3, "i2s2_dout"), /* DOUT3 */
35 SUNXI_FUNCTION(0x4, "i2c2"), /* SDA */
36 SUNXI_FUNCTION(0x5, "i2s2_din"), /* DIN3 */
37 SUNXI_FUNCTION(0x6, "uart0"), /* RX */
38 SUNXI_FUNCTION(0x7, "uart2"), /* RX */
39 SUNXI_FUNCTION(0x8, "ir"), /* RX */
40 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 1)),
41 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
42 SUNXI_FUNCTION(0x0, "gpio_in"),
43 SUNXI_FUNCTION(0x1, "gpio_out"),
44 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
45 SUNXI_FUNCTION(0x3, "i2s2_dout"), /* DOUT2 */
46 SUNXI_FUNCTION(0x4, "i2c0"), /* SDA */
47 SUNXI_FUNCTION(0x5, "i2s2_din"), /* DIN2 */
48 SUNXI_FUNCTION(0x6, "lcd0"), /* D18 */
49 SUNXI_FUNCTION(0x7, "uart4"), /* TX */
50 SUNXI_FUNCTION(0x8, "can0"), /* TX */
51 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 2)),
52 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
53 SUNXI_FUNCTION(0x0, "gpio_in"),
54 SUNXI_FUNCTION(0x1, "gpio_out"),
55 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
56 SUNXI_FUNCTION(0x3, "i2s2_dout"), /* DOUT1 */
57 SUNXI_FUNCTION(0x4, "i2c0"), /* SCK */
58 SUNXI_FUNCTION(0x5, "i2s2_din"), /* DIN0 */
59 SUNXI_FUNCTION(0x6, "lcd0"), /* D19 */
60 SUNXI_FUNCTION(0x7, "uart4"), /* RX */
61 SUNXI_FUNCTION(0x8, "can0"), /* RX */
62 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 3)),
63 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
64 SUNXI_FUNCTION(0x0, "gpio_in"),
65 SUNXI_FUNCTION(0x1, "gpio_out"),
66 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
67 SUNXI_FUNCTION(0x3, "i2s2_dout"), /* DOUT0 */
68 SUNXI_FUNCTION(0x4, "i2c1"), /* SCK */
69 SUNXI_FUNCTION(0x5, "i2s2_din"), /* DIN1 */
70 SUNXI_FUNCTION(0x6, "lcd0"), /* D20 */
71 SUNXI_FUNCTION(0x7, "uart5"), /* TX */
72 SUNXI_FUNCTION(0x8, "can1"), /* TX */
73 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 4)),
74 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
75 SUNXI_FUNCTION(0x0, "gpio_in"),
76 SUNXI_FUNCTION(0x1, "gpio_out"),
77 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
78 SUNXI_FUNCTION(0x3, "i2s2"), /* BCLK */
79 SUNXI_FUNCTION(0x4, "i2c1"), /* SDA */
80 SUNXI_FUNCTION(0x5, "pwm0"),
81 SUNXI_FUNCTION(0x6, "lcd0"), /* D21 */
82 SUNXI_FUNCTION(0x7, "uart5"), /* RX */
83 SUNXI_FUNCTION(0x8, "can1"), /* RX */
84 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 5)),
85 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
86 SUNXI_FUNCTION(0x0, "gpio_in"),
87 SUNXI_FUNCTION(0x1, "gpio_out"),
88 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
89 SUNXI_FUNCTION(0x3, "i2s2"), /* LRCK */
90 SUNXI_FUNCTION(0x4, "i2c3"), /* SCK */
91 SUNXI_FUNCTION(0x5, "pwm1"),
92 SUNXI_FUNCTION(0x6, "lcd0"), /* D22 */
93 SUNXI_FUNCTION(0x7, "uart3"), /* TX */
94 SUNXI_FUNCTION(0x8, "bist0"), /* BIST_RESULT0 */
95 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 6)),
96 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
97 SUNXI_FUNCTION(0x0, "gpio_in"),
98 SUNXI_FUNCTION(0x1, "gpio_out"),
99 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
100 SUNXI_FUNCTION(0x3, "i2s2"), /* MCLK */
101 SUNXI_FUNCTION(0x4, "i2c3"), /* SDA */
102 SUNXI_FUNCTION(0x5, "ir"), /* RX */
103 SUNXI_FUNCTION(0x6, "lcd0"), /* D23 */
104 SUNXI_FUNCTION(0x7, "uart3"), /* RX */
105 SUNXI_FUNCTION(0x8, "bist1"), /* BIST_RESULT1 */
106 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 7)),
107 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
108 SUNXI_FUNCTION(0x0, "gpio_in"),
109 SUNXI_FUNCTION(0x1, "gpio_out"),
110 SUNXI_FUNCTION(0x2, "dmic"), /* DATA3 */
111 SUNXI_FUNCTION(0x3, "pwm5"),
112 SUNXI_FUNCTION(0x4, "i2c2"), /* SCK */
113 SUNXI_FUNCTION(0x5, "spi1"), /* HOLD */
114 SUNXI_FUNCTION(0x6, "uart0"), /* TX */
115 SUNXI_FUNCTION(0x7, "uart1"), /* TX */
116 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 8)),
117 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
118 SUNXI_FUNCTION(0x0, "gpio_in"),
119 SUNXI_FUNCTION(0x1, "gpio_out"),
120 SUNXI_FUNCTION(0x2, "dmic"), /* DATA2 */
121 SUNXI_FUNCTION(0x3, "pwm6"),
122 SUNXI_FUNCTION(0x4, "i2c2"), /* SDA */
123 SUNXI_FUNCTION(0x5, "spi1"), /* MISO */
124 SUNXI_FUNCTION(0x6, "uart0"), /* RX */
125 SUNXI_FUNCTION(0x7, "uart1"), /* RX */
126 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 9)),
127 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
128 SUNXI_FUNCTION(0x0, "gpio_in"),
129 SUNXI_FUNCTION(0x1, "gpio_out"),
130 SUNXI_FUNCTION(0x2, "dmic"), /* DATA1 */
131 SUNXI_FUNCTION(0x3, "pwm7"),
132 SUNXI_FUNCTION(0x4, "i2c0"), /* SCK */
133 SUNXI_FUNCTION(0x5, "spi1"), /* MOSI */
134 SUNXI_FUNCTION(0x6, "clk"), /* FANOUT0 */
135 SUNXI_FUNCTION(0x7, "uart1"), /* RTS */
136 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 10)),
137 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
138 SUNXI_FUNCTION(0x0, "gpio_in"),
139 SUNXI_FUNCTION(0x1, "gpio_out"),
140 SUNXI_FUNCTION(0x2, "dmic"), /* DATA0 */
141 SUNXI_FUNCTION(0x3, "pwm2"),
142 SUNXI_FUNCTION(0x4, "i2c0"), /* SDA */
143 SUNXI_FUNCTION(0x5, "spi1"), /* CLK */
144 SUNXI_FUNCTION(0x6, "clk"), /* FANOUT1 */
145 SUNXI_FUNCTION(0x7, "uart1"), /* CTS */
146 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 11)),
147 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
148 SUNXI_FUNCTION(0x0, "gpio_in"),
149 SUNXI_FUNCTION(0x1, "gpio_out"),
150 SUNXI_FUNCTION(0x2, "dmic"), /* CLK */
151 SUNXI_FUNCTION(0x3, "pwm0"),
152 SUNXI_FUNCTION(0x4, "spdif"), /* IN */
153 SUNXI_FUNCTION(0x5, "spi1"), /* CS0 */
154 SUNXI_FUNCTION(0x6, "clk"), /* FANOUT2 */
155 SUNXI_FUNCTION(0x7, "ir"), /* RX */
156 SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 12)),
158 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
159 SUNXI_FUNCTION(0x0, "gpio_in"),
160 SUNXI_FUNCTION(0x1, "gpio_out"),
161 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
162 SUNXI_FUNCTION(0x3, "i2c2"), /* SCK */
163 SUNXI_FUNCTION(0x4, "ledc"),
164 SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 0)),
165 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
166 SUNXI_FUNCTION(0x0, "gpio_in"),
167 SUNXI_FUNCTION(0x1, "gpio_out"),
168 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
169 SUNXI_FUNCTION(0x3, "i2c2"), /* SDA */
170 SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 1)),
171 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
172 SUNXI_FUNCTION(0x0, "gpio_in"),
173 SUNXI_FUNCTION(0x1, "gpio_out"),
174 SUNXI_FUNCTION(0x2, "spi0"), /* CLK */
175 SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
176 SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 2)),
177 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
178 SUNXI_FUNCTION(0x0, "gpio_in"),
179 SUNXI_FUNCTION(0x1, "gpio_out"),
180 SUNXI_FUNCTION(0x2, "spi0"), /* CS0 */
181 SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */
182 SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 3)),
183 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
184 SUNXI_FUNCTION(0x0, "gpio_in"),
185 SUNXI_FUNCTION(0x1, "gpio_out"),
186 SUNXI_FUNCTION(0x2, "spi0"), /* MOSI */
187 SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */
188 SUNXI_FUNCTION(0x4, "boot"), /* SEL0 */
189 SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 4)),
190 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
191 SUNXI_FUNCTION(0x0, "gpio_in"),
192 SUNXI_FUNCTION(0x1, "gpio_out"),
193 SUNXI_FUNCTION(0x2, "spi0"), /* MISO */
194 SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */
195 SUNXI_FUNCTION(0x4, "boot"), /* SEL1 */
196 SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 5)),
197 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
198 SUNXI_FUNCTION(0x0, "gpio_in"),
199 SUNXI_FUNCTION(0x1, "gpio_out"),
200 SUNXI_FUNCTION(0x2, "spi0"), /* WP */
201 SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */
202 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
203 SUNXI_FUNCTION(0x5, "i2c3"), /* SCK */
204 SUNXI_FUNCTION(0x6, "pll"), /* DBG-CLK */
205 SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 6)),
206 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
207 SUNXI_FUNCTION(0x0, "gpio_in"),
208 SUNXI_FUNCTION(0x1, "gpio_out"),
209 SUNXI_FUNCTION(0x2, "spi0"), /* HOLD */
210 SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */
211 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
212 SUNXI_FUNCTION(0x5, "i2c3"), /* SDA */
213 SUNXI_FUNCTION(0x6, "tcon"), /* TRIG0 */
214 SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 7)),
216 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
217 SUNXI_FUNCTION(0x0, "gpio_in"),
218 SUNXI_FUNCTION(0x1, "gpio_out"),
219 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
220 SUNXI_FUNCTION(0x3, "lvds0"), /* V0P */
221 SUNXI_FUNCTION(0x4, "dsi"), /* D0P */
222 SUNXI_FUNCTION(0x5, "i2c0"), /* SCK */
223 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 0)),
224 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
225 SUNXI_FUNCTION(0x0, "gpio_in"),
226 SUNXI_FUNCTION(0x1, "gpio_out"),
227 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
228 SUNXI_FUNCTION(0x3, "lvds0"), /* V0N */
229 SUNXI_FUNCTION(0x4, "dsi"), /* D0N */
230 SUNXI_FUNCTION(0x5, "uart2"), /* TX */
231 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 1)),
232 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
233 SUNXI_FUNCTION(0x0, "gpio_in"),
234 SUNXI_FUNCTION(0x1, "gpio_out"),
235 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
236 SUNXI_FUNCTION(0x3, "lvds0"), /* V1P */
237 SUNXI_FUNCTION(0x4, "dsi"), /* D1P */
238 SUNXI_FUNCTION(0x5, "uart2"), /* RX */
239 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 2)),
240 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
241 SUNXI_FUNCTION(0x0, "gpio_in"),
242 SUNXI_FUNCTION(0x1, "gpio_out"),
243 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
244 SUNXI_FUNCTION(0x3, "lvds0"), /* V1N */
245 SUNXI_FUNCTION(0x4, "dsi"), /* D1N */
246 SUNXI_FUNCTION(0x5, "uart2"), /* RTS */
247 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 3)),
248 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
249 SUNXI_FUNCTION(0x0, "gpio_in"),
250 SUNXI_FUNCTION(0x1, "gpio_out"),
251 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
252 SUNXI_FUNCTION(0x3, "lvds0"), /* V2P */
253 SUNXI_FUNCTION(0x4, "dsi"), /* CKP */
254 SUNXI_FUNCTION(0x5, "uart2"), /* CTS */
255 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 4)),
256 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
257 SUNXI_FUNCTION(0x0, "gpio_in"),
258 SUNXI_FUNCTION(0x1, "gpio_out"),
259 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
260 SUNXI_FUNCTION(0x3, "lvds0"), /* V2N */
261 SUNXI_FUNCTION(0x4, "dsi"), /* CKN */
262 SUNXI_FUNCTION(0x5, "uart5"), /* TX */
263 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 5)),
264 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
265 SUNXI_FUNCTION(0x0, "gpio_in"),
266 SUNXI_FUNCTION(0x1, "gpio_out"),
267 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
268 SUNXI_FUNCTION(0x3, "lvds0"), /* CKP */
269 SUNXI_FUNCTION(0x4, "dsi"), /* D2P */
270 SUNXI_FUNCTION(0x5, "uart5"), /* RX */
271 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 6)),
272 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
273 SUNXI_FUNCTION(0x0, "gpio_in"),
274 SUNXI_FUNCTION(0x1, "gpio_out"),
275 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
276 SUNXI_FUNCTION(0x3, "lvds0"), /* CKN */
277 SUNXI_FUNCTION(0x4, "dsi"), /* D2N */
278 SUNXI_FUNCTION(0x5, "uart4"), /* TX */
279 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 7)),
280 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
281 SUNXI_FUNCTION(0x0, "gpio_in"),
282 SUNXI_FUNCTION(0x1, "gpio_out"),
283 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
284 SUNXI_FUNCTION(0x3, "lvds0"), /* V3P */
285 SUNXI_FUNCTION(0x4, "dsi"), /* D3P */
286 SUNXI_FUNCTION(0x5, "uart4"), /* RX */
287 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 8)),
288 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
289 SUNXI_FUNCTION(0x0, "gpio_in"),
290 SUNXI_FUNCTION(0x1, "gpio_out"),
291 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
292 SUNXI_FUNCTION(0x3, "lvds0"), /* V3N */
293 SUNXI_FUNCTION(0x4, "dsi"), /* D3N */
294 SUNXI_FUNCTION(0x5, "pwm6"),
295 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 9)),
296 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
297 SUNXI_FUNCTION(0x0, "gpio_in"),
298 SUNXI_FUNCTION(0x1, "gpio_out"),
299 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
300 SUNXI_FUNCTION(0x3, "lvds1"), /* V0P */
301 SUNXI_FUNCTION(0x4, "spi1"), /* CS0 */
302 SUNXI_FUNCTION(0x5, "uart3"), /* TX */
303 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 10)),
304 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
305 SUNXI_FUNCTION(0x0, "gpio_in"),
306 SUNXI_FUNCTION(0x1, "gpio_out"),
307 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
308 SUNXI_FUNCTION(0x3, "lvds1"), /* V0N */
309 SUNXI_FUNCTION(0x4, "spi1"), /* CLK */
310 SUNXI_FUNCTION(0x5, "uart3"), /* RX */
311 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 11)),
312 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
313 SUNXI_FUNCTION(0x0, "gpio_in"),
314 SUNXI_FUNCTION(0x1, "gpio_out"),
315 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
316 SUNXI_FUNCTION(0x3, "lvds1"), /* V1P */
317 SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */
318 SUNXI_FUNCTION(0x5, "i2c0"), /* SDA */
319 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 12)),
320 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
321 SUNXI_FUNCTION(0x0, "gpio_in"),
322 SUNXI_FUNCTION(0x1, "gpio_out"),
323 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
324 SUNXI_FUNCTION(0x3, "lvds1"), /* V1N */
325 SUNXI_FUNCTION(0x4, "spi1"), /* MISO */
326 SUNXI_FUNCTION(0x5, "uart3"), /* RTS */
327 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 13)),
328 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
329 SUNXI_FUNCTION(0x0, "gpio_in"),
330 SUNXI_FUNCTION(0x1, "gpio_out"),
331 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
332 SUNXI_FUNCTION(0x3, "lvds1"), /* V2P */
333 SUNXI_FUNCTION(0x4, "spi1"), /* HOLD */
334 SUNXI_FUNCTION(0x5, "uart3"), /* CTS */
335 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 14)),
336 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
337 SUNXI_FUNCTION(0x0, "gpio_in"),
338 SUNXI_FUNCTION(0x1, "gpio_out"),
339 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
340 SUNXI_FUNCTION(0x3, "lvds1"), /* V2N */
341 SUNXI_FUNCTION(0x4, "spi1"), /* WP */
342 SUNXI_FUNCTION(0x5, "ir"), /* RX */
343 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 15)),
344 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
345 SUNXI_FUNCTION(0x0, "gpio_in"),
346 SUNXI_FUNCTION(0x1, "gpio_out"),
347 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
348 SUNXI_FUNCTION(0x3, "lvds1"), /* CKP */
349 SUNXI_FUNCTION(0x4, "dmic"), /* DATA3 */
350 SUNXI_FUNCTION(0x5, "pwm0"),
351 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 16)),
352 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
353 SUNXI_FUNCTION(0x0, "gpio_in"),
354 SUNXI_FUNCTION(0x1, "gpio_out"),
355 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
356 SUNXI_FUNCTION(0x3, "lvds1"), /* CKN */
357 SUNXI_FUNCTION(0x4, "dmic"), /* DATA2 */
358 SUNXI_FUNCTION(0x5, "pwm1"),
359 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 17)),
360 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
361 SUNXI_FUNCTION(0x0, "gpio_in"),
362 SUNXI_FUNCTION(0x1, "gpio_out"),
363 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
364 SUNXI_FUNCTION(0x3, "lvds1"), /* V3P */
365 SUNXI_FUNCTION(0x4, "dmic"), /* DATA1 */
366 SUNXI_FUNCTION(0x5, "pwm2"),
367 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 18)),
368 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
369 SUNXI_FUNCTION(0x0, "gpio_in"),
370 SUNXI_FUNCTION(0x1, "gpio_out"),
371 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
372 SUNXI_FUNCTION(0x3, "lvds1"), /* V3N */
373 SUNXI_FUNCTION(0x4, "dmic"), /* DATA0 */
374 SUNXI_FUNCTION(0x5, "pwm3"),
375 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 19)),
376 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
377 SUNXI_FUNCTION(0x0, "gpio_in"),
378 SUNXI_FUNCTION(0x1, "gpio_out"),
379 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
380 SUNXI_FUNCTION(0x3, "i2c2"), /* SCK */
381 SUNXI_FUNCTION(0x4, "dmic"), /* CLK */
382 SUNXI_FUNCTION(0x5, "pwm4"),
383 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 20)),
384 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
385 SUNXI_FUNCTION(0x0, "gpio_in"),
386 SUNXI_FUNCTION(0x1, "gpio_out"),
387 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
388 SUNXI_FUNCTION(0x3, "i2c2"), /* SDA */
389 SUNXI_FUNCTION(0x4, "uart1"), /* TX */
390 SUNXI_FUNCTION(0x5, "pwm5"),
391 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 21)),
392 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
393 SUNXI_FUNCTION(0x0, "gpio_in"),
394 SUNXI_FUNCTION(0x1, "gpio_out"),
395 SUNXI_FUNCTION(0x2, "spdif"), /* OUT */
396 SUNXI_FUNCTION(0x3, "ir"), /* RX */
397 SUNXI_FUNCTION(0x4, "uart1"), /* RX */
398 SUNXI_FUNCTION(0x5, "pwm7"),
399 SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 22)),
401 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
402 SUNXI_FUNCTION(0x0, "gpio_in"),
403 SUNXI_FUNCTION(0x1, "gpio_out"),
404 SUNXI_FUNCTION(0x2, "ncsi0"), /* HSYNC */
405 SUNXI_FUNCTION(0x3, "uart2"), /* RTS */
406 SUNXI_FUNCTION(0x4, "i2c1"), /* SCK */
407 SUNXI_FUNCTION(0x5, "lcd0"), /* HSYNC */
408 SUNXI_FUNCTION(0x8, "emac"), /* RXCTL/CRS_DV */
409 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 0)),
410 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
411 SUNXI_FUNCTION(0x0, "gpio_in"),
412 SUNXI_FUNCTION(0x1, "gpio_out"),
413 SUNXI_FUNCTION(0x2, "ncsi0"), /* VSYNC */
414 SUNXI_FUNCTION(0x3, "uart2"), /* CTS */
415 SUNXI_FUNCTION(0x4, "i2c1"), /* SDA */
416 SUNXI_FUNCTION(0x5, "lcd0"), /* VSYNC */
417 SUNXI_FUNCTION(0x8, "emac"), /* RXD0 */
418 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 1)),
419 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
420 SUNXI_FUNCTION(0x0, "gpio_in"),
421 SUNXI_FUNCTION(0x1, "gpio_out"),
422 SUNXI_FUNCTION(0x2, "ncsi0"), /* PCLK */
423 SUNXI_FUNCTION(0x3, "uart2"), /* TX */
424 SUNXI_FUNCTION(0x4, "i2c0"), /* SCK */
425 SUNXI_FUNCTION(0x5, "clk"), /* FANOUT0 */
426 SUNXI_FUNCTION(0x6, "uart0"), /* TX */
427 SUNXI_FUNCTION(0x8, "emac"), /* RXD1 */
428 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 2)),
429 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
430 SUNXI_FUNCTION(0x0, "gpio_in"),
431 SUNXI_FUNCTION(0x1, "gpio_out"),
432 SUNXI_FUNCTION(0x2, "ncsi0"), /* MCLK */
433 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
434 SUNXI_FUNCTION(0x4, "i2c0"), /* SDA */
435 SUNXI_FUNCTION(0x5, "clk"), /* FANOUT1 */
436 SUNXI_FUNCTION(0x6, "uart0"), /* RX */
437 SUNXI_FUNCTION(0x8, "emac"), /* TXCK */
438 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 3)),
439 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
440 SUNXI_FUNCTION(0x0, "gpio_in"),
441 SUNXI_FUNCTION(0x1, "gpio_out"),
442 SUNXI_FUNCTION(0x2, "ncsi0"), /* D0 */
443 SUNXI_FUNCTION(0x3, "uart4"), /* TX */
444 SUNXI_FUNCTION(0x4, "i2c2"), /* SCK */
445 SUNXI_FUNCTION(0x5, "clk"), /* FANOUT2 */
446 SUNXI_FUNCTION(0x6, "d_jtag"), /* MS */
447 SUNXI_FUNCTION(0x7, "r_jtag"), /* MS */
448 SUNXI_FUNCTION(0x8, "emac"), /* TXD0 */
449 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 4)),
450 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
451 SUNXI_FUNCTION(0x0, "gpio_in"),
452 SUNXI_FUNCTION(0x1, "gpio_out"),
453 SUNXI_FUNCTION(0x2, "ncsi0"), /* D1 */
454 SUNXI_FUNCTION(0x3, "uart4"), /* RX */
455 SUNXI_FUNCTION(0x4, "i2c2"), /* SDA */
456 SUNXI_FUNCTION(0x5, "ledc"),
457 SUNXI_FUNCTION(0x6, "d_jtag"), /* DI */
458 SUNXI_FUNCTION(0x7, "r_jtag"), /* DI */
459 SUNXI_FUNCTION(0x8, "emac"), /* TXD1 */
460 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 5)),
461 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
462 SUNXI_FUNCTION(0x0, "gpio_in"),
463 SUNXI_FUNCTION(0x1, "gpio_out"),
464 SUNXI_FUNCTION(0x2, "ncsi0"), /* D2 */
465 SUNXI_FUNCTION(0x3, "uart5"), /* TX */
466 SUNXI_FUNCTION(0x4, "i2c3"), /* SCK */
467 SUNXI_FUNCTION(0x5, "spdif"), /* IN */
468 SUNXI_FUNCTION(0x6, "d_jtag"), /* DO */
469 SUNXI_FUNCTION(0x7, "r_jtag"), /* DO */
470 SUNXI_FUNCTION(0x8, "emac"), /* TXCTL/TXEN */
471 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 6)),
472 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
473 SUNXI_FUNCTION(0x0, "gpio_in"),
474 SUNXI_FUNCTION(0x1, "gpio_out"),
475 SUNXI_FUNCTION(0x2, "ncsi0"), /* D3 */
476 SUNXI_FUNCTION(0x3, "uart5"), /* RX */
477 SUNXI_FUNCTION(0x4, "i2c3"), /* SDA */
478 SUNXI_FUNCTION(0x5, "spdif"), /* OUT */
479 SUNXI_FUNCTION(0x6, "d_jtag"), /* CK */
480 SUNXI_FUNCTION(0x7, "r_jtag"), /* CK */
481 SUNXI_FUNCTION(0x8, "emac"), /* CK */
482 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 7)),
483 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
484 SUNXI_FUNCTION(0x0, "gpio_in"),
485 SUNXI_FUNCTION(0x1, "gpio_out"),
486 SUNXI_FUNCTION(0x2, "ncsi0"), /* D4 */
487 SUNXI_FUNCTION(0x3, "uart1"), /* RTS */
488 SUNXI_FUNCTION(0x4, "pwm2"),
489 SUNXI_FUNCTION(0x5, "uart3"), /* TX */
490 SUNXI_FUNCTION(0x6, "jtag"), /* MS */
491 SUNXI_FUNCTION(0x8, "emac"), /* MDC */
492 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 8)),
493 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
494 SUNXI_FUNCTION(0x0, "gpio_in"),
495 SUNXI_FUNCTION(0x1, "gpio_out"),
496 SUNXI_FUNCTION(0x2, "ncsi0"), /* D5 */
497 SUNXI_FUNCTION(0x3, "uart1"), /* CTS */
498 SUNXI_FUNCTION(0x4, "pwm3"),
499 SUNXI_FUNCTION(0x5, "uart3"), /* RX */
500 SUNXI_FUNCTION(0x6, "jtag"), /* DI */
501 SUNXI_FUNCTION(0x8, "emac"), /* MDIO */
502 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 9)),
503 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
504 SUNXI_FUNCTION(0x0, "gpio_in"),
505 SUNXI_FUNCTION(0x1, "gpio_out"),
506 SUNXI_FUNCTION(0x2, "ncsi0"), /* D6 */
507 SUNXI_FUNCTION(0x3, "uart1"), /* TX */
508 SUNXI_FUNCTION(0x4, "pwm4"),
509 SUNXI_FUNCTION(0x5, "ir"), /* RX */
510 SUNXI_FUNCTION(0x6, "jtag"), /* DO */
511 SUNXI_FUNCTION(0x8, "emac"), /* EPHY-25M */
512 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 10)),
513 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
514 SUNXI_FUNCTION(0x0, "gpio_in"),
515 SUNXI_FUNCTION(0x1, "gpio_out"),
516 SUNXI_FUNCTION(0x2, "ncsi0"), /* D7 */
517 SUNXI_FUNCTION(0x3, "uart1"), /* RX */
518 SUNXI_FUNCTION(0x4, "i2s0_dout"), /* DOUT3 */
519 SUNXI_FUNCTION(0x5, "i2s0_din"), /* DIN3 */
520 SUNXI_FUNCTION(0x6, "jtag"), /* CK */
521 SUNXI_FUNCTION(0x8, "emac"), /* TXD2 */
522 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 11)),
523 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
524 SUNXI_FUNCTION(0x0, "gpio_in"),
525 SUNXI_FUNCTION(0x1, "gpio_out"),
526 SUNXI_FUNCTION(0x2, "i2c2"), /* SCK */
527 SUNXI_FUNCTION(0x3, "ncsi0"), /* FIELD */
528 SUNXI_FUNCTION(0x4, "i2s0_dout"), /* DOUT2 */
529 SUNXI_FUNCTION(0x5, "i2s0_din"), /* DIN2 */
530 SUNXI_FUNCTION(0x8, "emac"), /* TXD3 */
531 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 12)),
532 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
533 SUNXI_FUNCTION(0x0, "gpio_in"),
534 SUNXI_FUNCTION(0x1, "gpio_out"),
535 SUNXI_FUNCTION(0x2, "i2c2"), /* SDA */
536 SUNXI_FUNCTION(0x3, "pwm5"),
537 SUNXI_FUNCTION(0x4, "i2s0_dout"), /* DOUT0 */
538 SUNXI_FUNCTION(0x5, "i2s0_din"), /* DIN1 */
539 SUNXI_FUNCTION(0x6, "dmic"), /* DATA3 */
540 SUNXI_FUNCTION(0x8, "emac"), /* RXD2 */
541 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 13)),
542 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
543 SUNXI_FUNCTION(0x0, "gpio_in"),
544 SUNXI_FUNCTION(0x1, "gpio_out"),
545 SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
546 SUNXI_FUNCTION(0x3, "d_jtag"), /* MS */
547 SUNXI_FUNCTION(0x4, "i2s0_dout"), /* DOUT1 */
548 SUNXI_FUNCTION(0x5, "i2s0_din"), /* DIN0 */
549 SUNXI_FUNCTION(0x6, "dmic"), /* DATA2 */
550 SUNXI_FUNCTION(0x8, "emac"), /* RXD3 */
551 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 14)),
552 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
553 SUNXI_FUNCTION(0x0, "gpio_in"),
554 SUNXI_FUNCTION(0x1, "gpio_out"),
555 SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
556 SUNXI_FUNCTION(0x3, "d_jtag"), /* DI */
557 SUNXI_FUNCTION(0x4, "pwm6"),
558 SUNXI_FUNCTION(0x5, "i2s0"), /* LRCK */
559 SUNXI_FUNCTION(0x6, "dmic"), /* DATA1 */
560 SUNXI_FUNCTION(0x8, "emac"), /* RXCK */
561 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 15)),
562 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
563 SUNXI_FUNCTION(0x0, "gpio_in"),
564 SUNXI_FUNCTION(0x1, "gpio_out"),
565 SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
566 SUNXI_FUNCTION(0x3, "d_jtag"), /* DO */
567 SUNXI_FUNCTION(0x4, "pwm7"),
568 SUNXI_FUNCTION(0x5, "i2s0"), /* BCLK */
569 SUNXI_FUNCTION(0x6, "dmic"), /* DATA0 */
570 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 16)),
571 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
572 SUNXI_FUNCTION(0x0, "gpio_in"),
573 SUNXI_FUNCTION(0x1, "gpio_out"),
574 SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
575 SUNXI_FUNCTION(0x3, "d_jtag"), /* CK */
576 SUNXI_FUNCTION(0x4, "ir"), /* TX */
577 SUNXI_FUNCTION(0x5, "i2s0"), /* MCLK */
578 SUNXI_FUNCTION(0x6, "dmic"), /* CLK */
579 SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 17)),
581 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
582 SUNXI_FUNCTION(0x0, "gpio_in"),
583 SUNXI_FUNCTION(0x1, "gpio_out"),
584 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
585 SUNXI_FUNCTION(0x3, "jtag"), /* MS */
586 SUNXI_FUNCTION(0x4, "r_jtag"), /* MS */
587 SUNXI_FUNCTION(0x5, "i2s2_dout"), /* DOUT1 */
588 SUNXI_FUNCTION(0x6, "i2s2_din"), /* DIN0 */
589 SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 0)),
590 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
591 SUNXI_FUNCTION(0x0, "gpio_in"),
592 SUNXI_FUNCTION(0x1, "gpio_out"),
593 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
594 SUNXI_FUNCTION(0x3, "jtag"), /* DI */
595 SUNXI_FUNCTION(0x4, "r_jtag"), /* DI */
596 SUNXI_FUNCTION(0x5, "i2s2_dout"), /* DOUT0 */
597 SUNXI_FUNCTION(0x6, "i2s2_din"), /* DIN1 */
598 SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 1)),
599 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
600 SUNXI_FUNCTION(0x0, "gpio_in"),
601 SUNXI_FUNCTION(0x1, "gpio_out"),
602 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
603 SUNXI_FUNCTION(0x3, "uart0"), /* TX */
604 SUNXI_FUNCTION(0x4, "i2c0"), /* SCK */
605 SUNXI_FUNCTION(0x5, "ledc"),
606 SUNXI_FUNCTION(0x6, "spdif"), /* IN */
607 SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 2)),
608 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
609 SUNXI_FUNCTION(0x0, "gpio_in"),
610 SUNXI_FUNCTION(0x1, "gpio_out"),
611 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
612 SUNXI_FUNCTION(0x3, "jtag"), /* DO */
613 SUNXI_FUNCTION(0x4, "r_jtag"), /* DO */
614 SUNXI_FUNCTION(0x5, "i2s2"), /* BCLK */
615 SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 3)),
616 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
617 SUNXI_FUNCTION(0x0, "gpio_in"),
618 SUNXI_FUNCTION(0x1, "gpio_out"),
619 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
620 SUNXI_FUNCTION(0x3, "uart0"), /* RX */
621 SUNXI_FUNCTION(0x4, "i2c0"), /* SDA */
622 SUNXI_FUNCTION(0x5, "pwm6"),
623 SUNXI_FUNCTION(0x6, "ir"), /* TX */
624 SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 4)),
625 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
626 SUNXI_FUNCTION(0x0, "gpio_in"),
627 SUNXI_FUNCTION(0x1, "gpio_out"),
628 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
629 SUNXI_FUNCTION(0x3, "jtag"), /* CK */
630 SUNXI_FUNCTION(0x4, "r_jtag"), /* CK */
631 SUNXI_FUNCTION(0x5, "i2s2"), /* LRCK */
632 SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 5)),
633 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
634 SUNXI_FUNCTION(0x0, "gpio_in"),
635 SUNXI_FUNCTION(0x1, "gpio_out"),
636 SUNXI_FUNCTION(0x3, "spdif"), /* OUT */
637 SUNXI_FUNCTION(0x4, "ir"), /* RX */
638 SUNXI_FUNCTION(0x5, "i2s2"), /* MCLK */
639 SUNXI_FUNCTION(0x6, "pwm5"),
640 SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 6)),
642 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
643 SUNXI_FUNCTION(0x0, "gpio_in"),
644 SUNXI_FUNCTION(0x1, "gpio_out"),
645 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
646 SUNXI_FUNCTION(0x3, "uart3"), /* TX */
647 SUNXI_FUNCTION(0x4, "emac"), /* RXCTRL/CRS_DV */
648 SUNXI_FUNCTION(0x5, "pwm7"),
649 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 0)),
650 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
651 SUNXI_FUNCTION(0x0, "gpio_in"),
652 SUNXI_FUNCTION(0x1, "gpio_out"),
653 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
654 SUNXI_FUNCTION(0x3, "uart3"), /* RX */
655 SUNXI_FUNCTION(0x4, "emac"), /* RXD0 */
656 SUNXI_FUNCTION(0x5, "pwm6"),
657 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 1)),
658 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
659 SUNXI_FUNCTION(0x0, "gpio_in"),
660 SUNXI_FUNCTION(0x1, "gpio_out"),
661 SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
662 SUNXI_FUNCTION(0x3, "uart3"), /* RTS */
663 SUNXI_FUNCTION(0x4, "emac"), /* RXD1 */
664 SUNXI_FUNCTION(0x5, "uart4"), /* TX */
665 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 2)),
666 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
667 SUNXI_FUNCTION(0x0, "gpio_in"),
668 SUNXI_FUNCTION(0x1, "gpio_out"),
669 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
670 SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
671 SUNXI_FUNCTION(0x4, "emac"), /* TXCK */
672 SUNXI_FUNCTION(0x5, "uart4"), /* RX */
673 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 3)),
674 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
675 SUNXI_FUNCTION(0x0, "gpio_in"),
676 SUNXI_FUNCTION(0x1, "gpio_out"),
677 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
678 SUNXI_FUNCTION(0x3, "uart5"), /* TX */
679 SUNXI_FUNCTION(0x4, "emac"), /* TXD0 */
680 SUNXI_FUNCTION(0x5, "pwm5"),
681 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 4)),
682 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
683 SUNXI_FUNCTION(0x0, "gpio_in"),
684 SUNXI_FUNCTION(0x1, "gpio_out"),
685 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
686 SUNXI_FUNCTION(0x3, "uart5"), /* RX */
687 SUNXI_FUNCTION(0x4, "emac"), /* TXD1 */
688 SUNXI_FUNCTION(0x5, "pwm4"),
689 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 5)),
690 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
691 SUNXI_FUNCTION(0x0, "gpio_in"),
692 SUNXI_FUNCTION(0x1, "gpio_out"),
693 SUNXI_FUNCTION(0x2, "uart1"), /* TX */
694 SUNXI_FUNCTION(0x3, "i2c2"), /* SCK */
695 SUNXI_FUNCTION(0x4, "emac"), /* TXD2 */
696 SUNXI_FUNCTION(0x5, "pwm1"),
697 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 6)),
698 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
699 SUNXI_FUNCTION(0x0, "gpio_in"),
700 SUNXI_FUNCTION(0x1, "gpio_out"),
701 SUNXI_FUNCTION(0x2, "uart1"), /* RX */
702 SUNXI_FUNCTION(0x3, "i2c2"), /* SDA */
703 SUNXI_FUNCTION(0x4, "emac"), /* TXD3 */
704 SUNXI_FUNCTION(0x5, "spdif"), /* IN */
705 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 7)),
706 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
707 SUNXI_FUNCTION(0x0, "gpio_in"),
708 SUNXI_FUNCTION(0x1, "gpio_out"),
709 SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
710 SUNXI_FUNCTION(0x3, "i2c1"), /* SCK */
711 SUNXI_FUNCTION(0x4, "emac"), /* RXD2 */
712 SUNXI_FUNCTION(0x5, "uart3"), /* TX */
713 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 8)),
714 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
715 SUNXI_FUNCTION(0x0, "gpio_in"),
716 SUNXI_FUNCTION(0x1, "gpio_out"),
717 SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
718 SUNXI_FUNCTION(0x3, "i2c1"), /* SDA */
719 SUNXI_FUNCTION(0x4, "emac"), /* RXD3 */
720 SUNXI_FUNCTION(0x5, "uart3"), /* RX */
721 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 9)),
722 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
723 SUNXI_FUNCTION(0x0, "gpio_in"),
724 SUNXI_FUNCTION(0x1, "gpio_out"),
725 SUNXI_FUNCTION(0x2, "pwm3"),
726 SUNXI_FUNCTION(0x3, "i2c3"), /* SCK */
727 SUNXI_FUNCTION(0x4, "emac"), /* RXCK */
728 SUNXI_FUNCTION(0x5, "clk"), /* FANOUT0 */
729 SUNXI_FUNCTION(0x6, "ir"), /* RX */
730 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 10)),
731 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
732 SUNXI_FUNCTION(0x0, "gpio_in"),
733 SUNXI_FUNCTION(0x1, "gpio_out"),
734 SUNXI_FUNCTION(0x2, "i2s1"), /* MCLK */
735 SUNXI_FUNCTION(0x3, "i2c3"), /* SDA */
736 SUNXI_FUNCTION(0x4, "emac"), /* EPHY-25M */
737 SUNXI_FUNCTION(0x5, "clk"), /* FANOUT1 */
738 SUNXI_FUNCTION(0x6, "tcon"), /* TRIG0 */
739 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 11)),
740 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
741 SUNXI_FUNCTION(0x0, "gpio_in"),
742 SUNXI_FUNCTION(0x1, "gpio_out"),
743 SUNXI_FUNCTION(0x2, "i2s1"), /* LRCK */
744 SUNXI_FUNCTION(0x3, "i2c0"), /* SCK */
745 SUNXI_FUNCTION(0x4, "emac"), /* TXCTL/TXEN */
746 SUNXI_FUNCTION(0x5, "clk"), /* FANOUT2 */
747 SUNXI_FUNCTION(0x6, "pwm0"),
748 SUNXI_FUNCTION(0x7, "uart1"), /* TX */
749 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 12)),
750 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
751 SUNXI_FUNCTION(0x0, "gpio_in"),
752 SUNXI_FUNCTION(0x1, "gpio_out"),
753 SUNXI_FUNCTION(0x2, "i2s1"), /* BCLK */
754 SUNXI_FUNCTION(0x3, "i2c0"), /* SDA */
755 SUNXI_FUNCTION(0x4, "emac"), /* CLKIN/RXER */
756 SUNXI_FUNCTION(0x5, "pwm2"),
757 SUNXI_FUNCTION(0x6, "ledc"),
758 SUNXI_FUNCTION(0x7, "uart1"), /* RX */
759 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 13)),
760 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 14),
761 SUNXI_FUNCTION(0x0, "gpio_in"),
762 SUNXI_FUNCTION(0x1, "gpio_out"),
763 SUNXI_FUNCTION(0x2, "i2s1_din"), /* DIN0 */
764 SUNXI_FUNCTION(0x3, "i2c2"), /* SCK */
765 SUNXI_FUNCTION(0x4, "emac"), /* MDC */
766 SUNXI_FUNCTION(0x5, "i2s1_dout"), /* DOUT1 */
767 SUNXI_FUNCTION(0x6, "spi0"), /* WP */
768 SUNXI_FUNCTION(0x7, "uart1"), /* RTS */
769 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 14)),
770 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 15),
771 SUNXI_FUNCTION(0x0, "gpio_in"),
772 SUNXI_FUNCTION(0x1, "gpio_out"),
773 SUNXI_FUNCTION(0x2, "i2s1_dout"), /* DOUT0 */
774 SUNXI_FUNCTION(0x3, "i2c2"), /* SDA */
775 SUNXI_FUNCTION(0x4, "emac"), /* MDIO */
776 SUNXI_FUNCTION(0x5, "i2s1_din"), /* DIN1 */
777 SUNXI_FUNCTION(0x6, "spi0"), /* HOLD */
778 SUNXI_FUNCTION(0x7, "uart1"), /* CTS */
779 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 15)),
780 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 16),
781 SUNXI_FUNCTION(0x0, "gpio_in"),
782 SUNXI_FUNCTION(0x1, "gpio_out"),
783 SUNXI_FUNCTION(0x2, "ir"), /* RX */
784 SUNXI_FUNCTION(0x3, "tcon"), /* TRIG0 */
785 SUNXI_FUNCTION(0x4, "pwm5"),
786 SUNXI_FUNCTION(0x5, "clk"), /* FANOUT2 */
787 SUNXI_FUNCTION(0x6, "spdif"), /* IN */
788 SUNXI_FUNCTION(0x7, "ledc"),
789 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 16)),
790 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 17),
791 SUNXI_FUNCTION(0x0, "gpio_in"),
792 SUNXI_FUNCTION(0x1, "gpio_out"),
793 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
794 SUNXI_FUNCTION(0x3, "i2c3"), /* SCK */
795 SUNXI_FUNCTION(0x4, "pwm7"),
796 SUNXI_FUNCTION(0x5, "clk"), /* FANOUT0 */
797 SUNXI_FUNCTION(0x6, "ir"), /* TX */
798 SUNXI_FUNCTION(0x7, "uart0"), /* TX */
799 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 17)),
800 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 18),
801 SUNXI_FUNCTION(0x0, "gpio_in"),
802 SUNXI_FUNCTION(0x1, "gpio_out"),
803 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
804 SUNXI_FUNCTION(0x3, "i2c3"), /* SDA */
805 SUNXI_FUNCTION(0x4, "pwm6"),
806 SUNXI_FUNCTION(0x5, "clk"), /* FANOUT1 */
807 SUNXI_FUNCTION(0x6, "spdif"), /* OUT */
808 SUNXI_FUNCTION(0x7, "uart0"), /* RX */
809 SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 18)),
812 static const unsigned int d1_irq_bank_map[] = { 1, 2, 3, 4, 5, 6 };
814 static const struct sunxi_pinctrl_desc d1_pinctrl_data = {
816 .npins = ARRAY_SIZE(d1_pins),
817 .irq_banks = ARRAY_SIZE(d1_irq_bank_map),
818 .irq_bank_map = d1_irq_bank_map,
819 .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_CTL,
822 static int d1_pinctrl_probe(struct platform_device *pdev)
824 unsigned long variant = (unsigned long)of_device_get_match_data(&pdev->dev);
826 return sunxi_pinctrl_init_with_variant(pdev, &d1_pinctrl_data, variant);
829 static const struct of_device_id d1_pinctrl_match[] = {
831 .compatible = "allwinner,sun20i-d1-pinctrl",
832 .data = (void *)PINCTRL_SUN20I_D1
837 static struct platform_driver d1_pinctrl_driver = {
838 .probe = d1_pinctrl_probe,
840 .name = "sun20i-d1-pinctrl",
841 .of_match_table = d1_pinctrl_match,
844 builtin_platform_driver(d1_pinctrl_driver);