2 * SuperH Pin Function Controller GPIO driver.
4 * Copyright (C) 2008 Magnus Damm
5 * Copyright (C) 2009 - 2012 Paul Mundt
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
12 #include <linux/device.h>
13 #include <linux/gpio.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/pinctrl/consumer.h>
17 #include <linux/slab.h>
18 #include <linux/spinlock.h>
22 struct sh_pfc_gpio_data_reg {
23 const struct pinmux_data_reg *info;
27 struct sh_pfc_gpio_pin {
34 struct gpio_chip gpio_chip;
36 struct sh_pfc_window *mem;
37 struct sh_pfc_gpio_data_reg *regs;
38 struct sh_pfc_gpio_pin *pins;
41 static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
43 return container_of(gc, struct sh_pfc_chip, gpio_chip);
46 static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
48 return gpio_to_pfc_chip(gc)->pfc;
51 static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int offset,
52 struct sh_pfc_gpio_data_reg **reg,
55 int idx = sh_pfc_get_pin_index(chip->pfc, offset);
56 struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
58 *reg = &chip->regs[gpio_pin->dreg];
59 *bit = gpio_pin->dbit;
62 static u32 gpio_read_data_reg(struct sh_pfc_chip *chip,
63 const struct pinmux_data_reg *dreg)
65 void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
67 return sh_pfc_read_raw_reg(mem, dreg->reg_width);
70 static void gpio_write_data_reg(struct sh_pfc_chip *chip,
71 const struct pinmux_data_reg *dreg, u32 value)
73 void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
75 sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
78 static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned idx)
80 struct sh_pfc *pfc = chip->pfc;
81 struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
82 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
83 const struct pinmux_data_reg *dreg;
87 for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) {
88 for (bit = 0; bit < dreg->reg_width; bit++) {
89 if (dreg->enum_ids[bit] == pin->enum_id) {
100 static int gpio_setup_data_regs(struct sh_pfc_chip *chip)
102 struct sh_pfc *pfc = chip->pfc;
103 const struct pinmux_data_reg *dreg;
106 /* Count the number of data registers, allocate memory and initialize
109 for (i = 0; pfc->info->data_regs[i].reg_width; ++i)
112 chip->regs = devm_kzalloc(pfc->dev, i * sizeof(*chip->regs),
114 if (chip->regs == NULL)
117 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
118 chip->regs[i].info = dreg;
119 chip->regs[i].shadow = gpio_read_data_reg(chip, dreg);
122 for (i = 0; i < pfc->info->nr_pins; i++) {
123 if (pfc->info->pins[i].enum_id == 0)
126 gpio_setup_data_reg(chip, i);
132 /* -----------------------------------------------------------------------------
136 static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
138 struct sh_pfc *pfc = gpio_to_pfc(gc);
139 int idx = sh_pfc_get_pin_index(pfc, offset);
141 if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
144 return pinctrl_request_gpio(offset);
147 static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
149 return pinctrl_free_gpio(offset);
152 static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
155 struct sh_pfc_gpio_data_reg *reg;
159 gpio_get_data_reg(chip, offset, ®, &bit);
161 pos = reg->info->reg_width - (bit + 1);
164 reg->shadow |= BIT(pos);
166 reg->shadow &= ~BIT(pos);
168 gpio_write_data_reg(chip, reg->info, reg->shadow);
171 static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
173 return pinctrl_gpio_direction_input(offset);
176 static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
179 gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
181 return pinctrl_gpio_direction_output(offset);
184 static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
186 struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc);
187 struct sh_pfc_gpio_data_reg *reg;
191 gpio_get_data_reg(chip, offset, ®, &bit);
193 pos = reg->info->reg_width - (bit + 1);
195 return (gpio_read_data_reg(chip, reg->info) >> pos) & 1;
198 static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
200 gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
203 static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
205 struct sh_pfc *pfc = gpio_to_pfc(gc);
208 for (i = 0; i < pfc->info->gpio_irq_size; i++) {
209 const short *gpios = pfc->info->gpio_irq[i].gpios;
211 for (k = 0; gpios[k] >= 0; k++) {
212 if (gpios[k] == offset)
223 return pfc->info->gpio_irq[i].irq;
226 static int gpio_pin_setup(struct sh_pfc_chip *chip)
228 struct sh_pfc *pfc = chip->pfc;
229 struct gpio_chip *gc = &chip->gpio_chip;
232 chip->pins = devm_kzalloc(pfc->dev, pfc->info->nr_pins *
233 sizeof(*chip->pins), GFP_KERNEL);
234 if (chip->pins == NULL)
237 ret = gpio_setup_data_regs(chip);
241 gc->request = gpio_pin_request;
242 gc->free = gpio_pin_free;
243 gc->direction_input = gpio_pin_direction_input;
244 gc->get = gpio_pin_get;
245 gc->direction_output = gpio_pin_direction_output;
246 gc->set = gpio_pin_set;
247 gc->to_irq = gpio_pin_to_irq;
249 gc->label = pfc->info->name;
251 gc->owner = THIS_MODULE;
253 gc->ngpio = pfc->nr_gpio_pins;
258 /* -----------------------------------------------------------------------------
262 static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
264 static bool __print_once;
265 struct sh_pfc *pfc = gpio_to_pfc(gc);
266 unsigned int mark = pfc->info->func_gpios[offset].enum_id;
272 "Use of GPIO API for function requests is deprecated."
273 " Convert to pinctrl\n");
280 spin_lock_irqsave(&pfc->lock, flags);
281 ret = sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION);
282 spin_unlock_irqrestore(&pfc->lock, flags);
287 static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
291 static int gpio_function_setup(struct sh_pfc_chip *chip)
293 struct sh_pfc *pfc = chip->pfc;
294 struct gpio_chip *gc = &chip->gpio_chip;
296 gc->request = gpio_function_request;
297 gc->free = gpio_function_free;
299 gc->label = pfc->info->name;
300 gc->owner = THIS_MODULE;
301 gc->base = pfc->nr_gpio_pins;
302 gc->ngpio = pfc->info->nr_func_gpios;
307 /* -----------------------------------------------------------------------------
308 * Register/unregister
311 static struct sh_pfc_chip *
312 sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *),
313 struct sh_pfc_window *mem)
315 struct sh_pfc_chip *chip;
318 chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
320 return ERR_PTR(-ENOMEM);
329 ret = gpiochip_add(&chip->gpio_chip);
330 if (unlikely(ret < 0))
333 dev_info(pfc->dev, "%s handling gpio %u -> %u\n",
334 chip->gpio_chip.label, chip->gpio_chip.base,
335 chip->gpio_chip.base + chip->gpio_chip.ngpio - 1);
340 int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
342 struct sh_pfc_chip *chip;
346 if (pfc->info->data_regs == NULL)
349 /* Find the memory window that contain the GPIO registers. Boards that
350 * register a separate GPIO device will not supply a memory resource
351 * that covers the data registers. In that case don't try to handle
354 for (i = 0; i < pfc->num_windows; ++i) {
355 struct sh_pfc_window *window = &pfc->windows[i];
357 if (pfc->info->data_regs[0].reg >= window->phys &&
358 pfc->info->data_regs[0].reg < window->phys + window->size)
362 if (i == pfc->num_windows)
365 /* If we have IRQ resources make sure their number is correct. */
366 if (pfc->num_irqs && pfc->num_irqs != pfc->info->gpio_irq_size) {
367 dev_err(pfc->dev, "invalid number of IRQ resources\n");
371 /* Register the real GPIOs chip. */
372 chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->windows[i]);
374 return PTR_ERR(chip);
378 /* Register the GPIO to pin mappings. As pins with GPIO ports must come
379 * first in the ranges, skip the pins without GPIO ports by stopping at
380 * the first range that contains such a pin.
382 for (i = 0; i < pfc->nr_ranges; ++i) {
383 const struct sh_pfc_pin_range *range = &pfc->ranges[i];
385 if (range->start >= pfc->nr_gpio_pins)
388 ret = gpiochip_add_pin_range(&chip->gpio_chip,
390 range->start, range->start,
391 range->end - range->start + 1);
396 /* Register the function GPIOs chip. */
397 if (pfc->info->nr_func_gpios == 0)
400 chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup, NULL);
402 return PTR_ERR(chip);
409 int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
411 gpiochip_remove(&pfc->gpio->gpio_chip);
412 gpiochip_remove(&pfc->func->gpio_chip);