drivers/pinctrl/pinctrl-rk805.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Pinctrl driver for Rockchip RK805/RK806 PMIC
   4  *
   5  * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
   6  * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
   7  *
   8  * Author: Joseph Chen <chenjh@rock-chips.com>
   9  * Author: Xu Shengfei <xsf@rock-chips.com>
  10  *
  11  * Based on the pinctrl-as3722 driver
  12  */
  13
  14 #include <linux/gpio/driver.h>
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/mfd/rk808.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/pm.h>
  20 #include <linux/property.h>
  21 #include <linux/slab.h>
  22
  23 #include <linux/pinctrl/consumer.h>
  24 #include <linux/pinctrl/machine.h>
  25 #include <linux/pinctrl/pinctrl.h>
  26 #include <linux/pinctrl/pinconf-generic.h>
  27 #include <linux/pinctrl/pinconf.h>
  28 #include <linux/pinctrl/pinmux.h>
  29
  30 #include "core.h"
  31 #include "pinconf.h"
  32 #include "pinctrl-utils.h"
  33
  34 struct rk805_pin_function {
  35         const char *name;
  36         const char *const *groups;
  37         unsigned int ngroups;
  38         int mux_option;
  39 };
  40
  41 struct rk805_pin_group {
  42         const char *name;
  43         const unsigned int pins[1];
  44         unsigned int npins;
  45 };
  46
  47 /*
  48  * @reg: gpio setting register;
  49  * @fun_reg: functions select register;
  50  * @fun_mask: functions select mask value, when set is gpio;
  51  * @dir_mask: input or output mask value, when set is output, otherwise input;
  52  * @val_mask: gpio set value, when set is level high, otherwise low;
  53  *
  54  * Different PMIC has different pin features, belowing 3 mask members are not
  55  * all necessary for every PMIC. For example, RK805 has 2 pins that can be used
  56  * as output only GPIOs, so func_mask and dir_mask are not needed. RK816 has 1
  57  * pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all
  58  * necessary.
  59  */
  60 struct rk805_pin_config {
  61         u8 reg;
  62         u8 fun_reg;
  63         u8 fun_msk;
  64         u8 dir_msk;
  65         u8 val_msk;
  66 };
  67
  68 struct rk805_pctrl_info {
  69         struct rk808 *rk808;
  70         struct device *dev;
  71         struct pinctrl_dev *pctl;
  72         struct gpio_chip gpio_chip;
  73         struct pinctrl_desc pinctrl_desc;
  74         const struct rk805_pin_function *functions;
  75         unsigned int num_functions;
  76         const struct rk805_pin_group *groups;
  77         int num_pin_groups;
  78         const struct pinctrl_pin_desc *pins;
  79         unsigned int num_pins;
  80         const struct rk805_pin_config *pin_cfg;
  81 };
  82
  83 enum rk805_pinmux_option {
  84         RK805_PINMUX_GPIO,
  85 };
  86
  87 enum rk806_pinmux_option {
  88         RK806_PINMUX_FUN0 = 0,
  89         RK806_PINMUX_FUN1,
  90         RK806_PINMUX_FUN2,
  91         RK806_PINMUX_FUN3,
  92         RK806_PINMUX_FUN4,
  93         RK806_PINMUX_FUN5,
  94 };
  95
  96 enum {
  97         RK805_GPIO0,
  98         RK805_GPIO1,
  99 };
 100
 101 enum {
 102         RK806_GPIO_DVS1,
 103         RK806_GPIO_DVS2,
 104         RK806_GPIO_DVS3
 105 };
 106
 107 static const char *const rk805_gpio_groups[] = {
 108         "gpio0",
 109         "gpio1",
 110 };
 111
 112 static const char *const rk806_gpio_groups[] = {
 113         "gpio_pwrctrl1",
 114         "gpio_pwrctrl2",
 115         "gpio_pwrctrl3",
 116 };
 117
 118 /* RK805: 2 output only GPIOs */
 119 static const struct pinctrl_pin_desc rk805_pins_desc[] = {
 120         PINCTRL_PIN(RK805_GPIO0, "gpio0"),
 121         PINCTRL_PIN(RK805_GPIO1, "gpio1"),
 122 };
 123
 124 /* RK806 */
 125 static const struct pinctrl_pin_desc rk806_pins_desc[] = {
 126         PINCTRL_PIN(RK806_GPIO_DVS1, "gpio_pwrctrl1"),
 127         PINCTRL_PIN(RK806_GPIO_DVS2, "gpio_pwrctrl2"),
 128         PINCTRL_PIN(RK806_GPIO_DVS3, "gpio_pwrctrl3"),
 129 };
 130
 131 static const struct rk805_pin_function rk805_pin_functions[] = {
 132         {
 133                 .name = "gpio",
 134                 .groups = rk805_gpio_groups,
 135                 .ngroups = ARRAY_SIZE(rk805_gpio_groups),
 136                 .mux_option = RK805_PINMUX_GPIO,
 137         },
 138 };
 139
 140 static const struct rk805_pin_function rk806_pin_functions[] = {
 141         {
 142                 .name = "pin_fun0",
 143                 .groups = rk806_gpio_groups,
 144                 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
 145                 .mux_option = RK806_PINMUX_FUN0,
 146         },
 147         {
 148                 .name = "pin_fun1",
 149                 .groups = rk806_gpio_groups,
 150                 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
 151                 .mux_option = RK806_PINMUX_FUN1,
 152         },
 153         {
 154                 .name = "pin_fun2",
 155                 .groups = rk806_gpio_groups,
 156                 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
 157                 .mux_option = RK806_PINMUX_FUN2,
 158         },
 159         {
 160                 .name = "pin_fun3",
 161                 .groups = rk806_gpio_groups,
 162                 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
 163                 .mux_option = RK806_PINMUX_FUN3,
 164         },
 165         {
 166                 .name = "pin_fun4",
 167                 .groups = rk806_gpio_groups,
 168                 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
 169                 .mux_option = RK806_PINMUX_FUN4,
 170         },
 171         {
 172                 .name = "pin_fun5",
 173                 .groups = rk806_gpio_groups,
 174                 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
 175                 .mux_option = RK806_PINMUX_FUN5,
 176         },
 177 };
 178
 179 static const struct rk805_pin_group rk805_pin_groups[] = {
 180         {
 181                 .name = "gpio0",
 182                 .pins = { RK805_GPIO0 },
 183                 .npins = 1,
 184         },
 185         {
 186                 .name = "gpio1",
 187                 .pins = { RK805_GPIO1 },
 188                 .npins = 1,
 189         },
 190 };
 191
 192 static const struct rk805_pin_group rk806_pin_groups[] = {
 193         {
 194                 .name = "gpio_pwrctrl1",
 195                 .pins = { RK806_GPIO_DVS1 },
 196                 .npins = 1,
 197         },
 198         {
 199                 .name = "gpio_pwrctrl2",
 200                 .pins = { RK806_GPIO_DVS2 },
 201                 .npins = 1,
 202         },
 203         {
 204                 .name = "gpio_pwrctrl3",
 205                 .pins = { RK806_GPIO_DVS3 },
 206                 .npins = 1,
 207         }
 208 };
 209
 210 #define RK805_GPIO0_VAL_MSK     BIT(0)
 211 #define RK805_GPIO1_VAL_MSK     BIT(1)
 212
 213 static const struct rk805_pin_config rk805_gpio_cfgs[] = {
 214         {
 215                 .reg = RK805_OUT_REG,
 216                 .val_msk = RK805_GPIO0_VAL_MSK,
 217         },
 218         {
 219                 .reg = RK805_OUT_REG,
 220                 .val_msk = RK805_GPIO1_VAL_MSK,
 221         },
 222 };
 223
 224 #define RK806_PWRCTRL1_DR       BIT(0)
 225 #define RK806_PWRCTRL2_DR       BIT(1)
 226 #define RK806_PWRCTRL3_DR       BIT(2)
 227 #define RK806_PWRCTRL1_DATA     BIT(4)
 228 #define RK806_PWRCTRL2_DATA     BIT(5)
 229 #define RK806_PWRCTRL3_DATA     BIT(6)
 230 #define RK806_PWRCTRL1_FUN      GENMASK(2, 0)
 231 #define RK806_PWRCTRL2_FUN      GENMASK(6, 4)
 232 #define RK806_PWRCTRL3_FUN      GENMASK(2, 0)
 233
 234 static struct rk805_pin_config rk806_gpio_cfgs[] = {
 235         {
 236                 .fun_reg = RK806_SLEEP_CONFIG0,
 237                 .fun_msk = RK806_PWRCTRL1_FUN,
 238                 .reg = RK806_SLEEP_GPIO,
 239                 .val_msk = RK806_PWRCTRL1_DATA,
 240                 .dir_msk = RK806_PWRCTRL1_DR,
 241         },
 242         {
 243                 .fun_reg = RK806_SLEEP_CONFIG0,
 244                 .fun_msk = RK806_PWRCTRL2_FUN,
 245                 .reg = RK806_SLEEP_GPIO,
 246                 .val_msk = RK806_PWRCTRL2_DATA,
 247                 .dir_msk = RK806_PWRCTRL2_DR,
 248         },
 249         {
 250                 .fun_reg = RK806_SLEEP_CONFIG1,
 251                 .fun_msk = RK806_PWRCTRL3_FUN,
 252                 .reg = RK806_SLEEP_GPIO,
 253                 .val_msk = RK806_PWRCTRL3_DATA,
 254                 .dir_msk = RK806_PWRCTRL3_DR,
 255         }
 256 };
 257
 258 /* generic gpio chip */
 259 static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset)
 260 {
 261         struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
 262         int ret, val;
 263
 264         ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val);
 265         if (ret) {
 266                 dev_err(pci->dev, "get gpio%d value failed\n", offset);
 267                 return ret;
 268         }
 269
 270         return !!(val & pci->pin_cfg[offset].val_msk);
 271 }
 272
 273 static void rk805_gpio_set(struct gpio_chip *chip,
 274                            unsigned int offset,
 275                            int value)
 276 {
 277         struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
 278         int ret;
 279
 280         ret = regmap_update_bits(pci->rk808->regmap,
 281                                  pci->pin_cfg[offset].reg,
 282                                  pci->pin_cfg[offset].val_msk,
 283                                  value ? pci->pin_cfg[offset].val_msk : 0);
 284         if (ret)
 285                 dev_err(pci->dev, "set gpio%d value %d failed\n",
 286                         offset, value);
 287 }
 288
 289 static int rk805_gpio_direction_input(struct gpio_chip *chip,
 290                                       unsigned int offset)
 291 {
 292         return pinctrl_gpio_direction_input(chip, offset);
 293 }
 294
 295 static int rk805_gpio_direction_output(struct gpio_chip *chip,
 296                                        unsigned int offset, int value)
 297 {
 298         rk805_gpio_set(chip, offset, value);
 299         return pinctrl_gpio_direction_output(chip, offset);
 300 }
 301
 302 static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
 303 {
 304         struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
 305         unsigned int val;
 306         int ret;
 307
 308         /* default output*/
 309         if (!pci->pin_cfg[offset].dir_msk)
 310                 return GPIO_LINE_DIRECTION_OUT;
 311
 312         ret = regmap_read(pci->rk808->regmap,
 313                           pci->pin_cfg[offset].reg,
 314                           &val);
 315         if (ret) {
 316                 dev_err(pci->dev, "get gpio%d direction failed\n", offset);
 317                 return ret;
 318         }
 319
 320         if (val & pci->pin_cfg[offset].dir_msk)
 321                 return GPIO_LINE_DIRECTION_OUT;
 322
 323         return GPIO_LINE_DIRECTION_IN;
 324 }
 325
 326 static const struct gpio_chip rk805_gpio_chip = {
 327         .label                  = "rk805-gpio",
 328         .request                = gpiochip_generic_request,
 329         .free                   = gpiochip_generic_free,
 330         .get_direction          = rk805_gpio_get_direction,
 331         .get                    = rk805_gpio_get,
 332         .set                    = rk805_gpio_set,
 333         .direction_input        = rk805_gpio_direction_input,
 334         .direction_output       = rk805_gpio_direction_output,
 335         .can_sleep              = true,
 336         .base                   = -1,
 337         .owner                  = THIS_MODULE,
 338 };
 339
 340 /* generic pinctrl */
 341 static int rk805_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
 342 {
 343         struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
 344
 345         return pci->num_pin_groups;
 346 }
 347
 348 static const char *rk805_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
 349                                                 unsigned int group)
 350 {
 351         struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
 352
 353         return pci->groups[group].name;
 354 }
 355
 356 static int rk805_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
 357                                         unsigned int group,
 358                                         const unsigned int **pins,
 359                                         unsigned int *num_pins)
 360 {
 361         struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
 362
 363         *pins = pci->groups[group].pins;
 364         *num_pins = pci->groups[group].npins;
 365
 366         return 0;
 367 }
 368
 369 static const struct pinctrl_ops rk805_pinctrl_ops = {
 370         .get_groups_count = rk805_pinctrl_get_groups_count,
 371         .get_group_name = rk805_pinctrl_get_group_name,
 372         .get_group_pins = rk805_pinctrl_get_group_pins,
 373         .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
 374         .dt_free_map = pinctrl_utils_free_map,
 375 };
 376
 377 static int rk805_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
 378 {
 379         struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
 380
 381         return pci->num_functions;
 382 }
 383
 384 static const char *rk805_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
 385                                                unsigned int function)
 386 {
 387         struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
 388
 389         return pci->functions[function].name;
 390 }
 391
 392 static int rk805_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
 393                                          unsigned int function,
 394                                          const char *const **groups,
 395                                          unsigned int *const num_groups)
 396 {
 397         struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
 398
 399         *groups = pci->functions[function].groups;
 400         *num_groups = pci->functions[function].ngroups;
 401
 402         return 0;
 403 }
 404
 405 static int _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 406                                   unsigned int offset,
 407                                   int mux)
 408 {
 409         struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
 410         int ret;
 411
 412         if (!pci->pin_cfg[offset].fun_msk)
 413                 return 0;
 414
 415         mux <<= ffs(pci->pin_cfg[offset].fun_msk) - 1;
 416         ret = regmap_update_bits(pci->rk808->regmap,
 417                                  pci->pin_cfg[offset].fun_reg,
 418                                  pci->pin_cfg[offset].fun_msk, mux);
 419
 420         if (ret)
 421                 dev_err(pci->dev, "set gpio%d func%d failed\n", offset, mux);
 422
 423         return 0;
 424 }
 425
 426 static int rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 427                                  unsigned int function,
 428                                  unsigned int group)
 429 {
 430         struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
 431         int mux = pci->functions[function].mux_option;
 432         int offset = group;
 433
 434         return _rk805_pinctrl_set_mux(pctldev, offset, mux);
 435 }
 436
 437 static int rk805_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev,
 438                                              struct pinctrl_gpio_range *range,
 439                                              unsigned int offset)
 440 {
 441         struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
 442
 443         switch (pci->rk808->variant) {
 444         case RK805_ID:
 445                 return _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO);
 446         case RK806_ID:
 447                 return _rk805_pinctrl_set_mux(pctldev, offset, RK806_PINMUX_FUN5);
 448         }
 449
 450         return -ENOTSUPP;
 451 }
 452
 453 static int rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
 454                                         struct pinctrl_gpio_range *range,
 455                                         unsigned int offset, bool input)
 456 {
 457         struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
 458         int ret;
 459
 460         /* set direction */
 461         if (!pci->pin_cfg[offset].dir_msk)
 462                 return 0;
 463
 464         ret = regmap_update_bits(pci->rk808->regmap,
 465                                  pci->pin_cfg[offset].reg,
 466                                  pci->pin_cfg[offset].dir_msk,
 467                                  input ? 0 : pci->pin_cfg[offset].dir_msk);
 468         if (ret) {
 469                 dev_err(pci->dev, "set gpio%d direction failed\n", offset);
 470                 return ret;
 471         }
 472
 473         return ret;
 474 }
 475
 476 static const struct pinmux_ops rk805_pinmux_ops = {
 477         .get_functions_count    = rk805_pinctrl_get_funcs_count,
 478         .get_function_name      = rk805_pinctrl_get_func_name,
 479         .get_function_groups    = rk805_pinctrl_get_func_groups,
 480         .set_mux                = rk805_pinctrl_set_mux,
 481         .gpio_request_enable    = rk805_pinctrl_gpio_request_enable,
 482         .gpio_set_direction     = rk805_pmx_gpio_set_direction,
 483 };
 484
 485 static int rk805_pinconf_get(struct pinctrl_dev *pctldev,
 486                              unsigned int pin, unsigned long *config)
 487 {
 488         struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
 489         enum pin_config_param param = pinconf_to_config_param(*config);
 490         u32 arg = 0;
 491
 492         switch (param) {
 493         case PIN_CONFIG_OUTPUT:
 494         case PIN_CONFIG_INPUT_ENABLE:
 495                 arg = rk805_gpio_get(&pci->gpio_chip, pin);
 496                 break;
 497         default:
 498                 dev_err(pci->dev, "Properties not supported\n");
 499                 return -ENOTSUPP;
 500         }
 501
 502         *config = pinconf_to_config_packed(param, (u16)arg);
 503
 504         return 0;
 505 }
 506
 507 static int rk805_pinconf_set(struct pinctrl_dev *pctldev,
 508                              unsigned int pin, unsigned long *configs,
 509                              unsigned int num_configs)
 510 {
 511         struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
 512         enum pin_config_param param;
 513         u32 i, arg = 0;
 514
 515         for (i = 0; i < num_configs; i++) {
 516                 param = pinconf_to_config_param(configs[i]);
 517                 arg = pinconf_to_config_argument(configs[i]);
 518
 519                 switch (param) {
 520                 case PIN_CONFIG_OUTPUT:
 521                         rk805_gpio_set(&pci->gpio_chip, pin, arg);
 522                         rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false);
 523                         break;
 524                 case PIN_CONFIG_INPUT_ENABLE:
 525                         if (pci->rk808->variant != RK805_ID && arg) {
 526                                 rk805_pmx_gpio_set_direction(pctldev, NULL, pin, true);
 527                                 break;
 528                         }
 529                         fallthrough;
 530                 default:
 531                         dev_err(pci->dev, "Properties not supported\n");
 532                         return -ENOTSUPP;
 533                 }
 534         }
 535
 536         return 0;
 537 }
 538
 539 static const struct pinconf_ops rk805_pinconf_ops = {
 540         .pin_config_get = rk805_pinconf_get,
 541         .pin_config_set = rk805_pinconf_set,
 542 };
 543
 544 static const struct pinctrl_desc rk805_pinctrl_desc = {
 545         .name = "rk805-pinctrl",
 546         .pctlops = &rk805_pinctrl_ops,
 547         .pmxops = &rk805_pinmux_ops,
 548         .confops = &rk805_pinconf_ops,
 549         .owner = THIS_MODULE,
 550 };
 551
 552 static int rk805_pinctrl_probe(struct platform_device *pdev)
 553 {
 554         struct rk805_pctrl_info *pci;
 555         int ret;
 556
 557         device_set_node(&pdev->dev, dev_fwnode(pdev->dev.parent));
 558
 559         pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL);
 560         if (!pci)
 561                 return -ENOMEM;
 562
 563         pci->dev = &pdev->dev;
 564         pci->rk808 = dev_get_drvdata(pdev->dev.parent);
 565
 566         pci->pinctrl_desc = rk805_pinctrl_desc;
 567         pci->gpio_chip = rk805_gpio_chip;
 568         pci->gpio_chip.parent = &pdev->dev;
 569
 570         platform_set_drvdata(pdev, pci);
 571
 572         switch (pci->rk808->variant) {
 573         case RK805_ID:
 574                 pci->pins = rk805_pins_desc;
 575                 pci->num_pins = ARRAY_SIZE(rk805_pins_desc);
 576                 pci->functions = rk805_pin_functions;
 577                 pci->num_functions = ARRAY_SIZE(rk805_pin_functions);
 578                 pci->groups = rk805_pin_groups;
 579                 pci->num_pin_groups = ARRAY_SIZE(rk805_pin_groups);
 580                 pci->pinctrl_desc.pins = rk805_pins_desc;
 581                 pci->pinctrl_desc.npins = ARRAY_SIZE(rk805_pins_desc);
 582                 pci->pin_cfg = rk805_gpio_cfgs;
 583                 pci->gpio_chip.ngpio = ARRAY_SIZE(rk805_gpio_cfgs);
 584                 break;
 585         case RK806_ID:
 586                 pci->pins = rk806_pins_desc;
 587                 pci->num_pins = ARRAY_SIZE(rk806_pins_desc);
 588                 pci->functions = rk806_pin_functions;
 589                 pci->num_functions = ARRAY_SIZE(rk806_pin_functions);
 590                 pci->groups = rk806_pin_groups;
 591                 pci->num_pin_groups = ARRAY_SIZE(rk806_pin_groups);
 592                 pci->pinctrl_desc.pins = rk806_pins_desc;
 593                 pci->pinctrl_desc.npins = ARRAY_SIZE(rk806_pins_desc);
 594                 pci->pin_cfg = rk806_gpio_cfgs;
 595                 pci->gpio_chip.ngpio = ARRAY_SIZE(rk806_gpio_cfgs);
 596                 break;
 597         default:
 598                 dev_err(&pdev->dev, "unsupported RK805 ID %lu\n",
 599                         pci->rk808->variant);
 600                 return -EINVAL;
 601         }
 602
 603         /* Add gpio chip */
 604         ret = devm_gpiochip_add_data(&pdev->dev, &pci->gpio_chip, pci);
 605         if (ret < 0) {
 606                 dev_err(&pdev->dev, "Couldn't add gpiochip\n");
 607                 return ret;
 608         }
 609
 610         /* Add pinctrl */
 611         pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci);
 612         if (IS_ERR(pci->pctl)) {
 613                 dev_err(&pdev->dev, "Couldn't add pinctrl\n");
 614                 return PTR_ERR(pci->pctl);
 615         }
 616
 617         /* Add pin range */
 618         ret = gpiochip_add_pin_range(&pci->gpio_chip, dev_name(&pdev->dev),
 619                                      0, 0, pci->gpio_chip.ngpio);
 620         if (ret < 0) {
 621                 dev_err(&pdev->dev, "Couldn't add gpiochip pin range\n");
 622                 return ret;
 623         }
 624
 625         return 0;
 626 }
 627
 628 static struct platform_driver rk805_pinctrl_driver = {
 629         .probe = rk805_pinctrl_probe,
 630         .driver = {
 631                 .name = "rk805-pinctrl",
 632         },
 633 };
 634 module_platform_driver(rk805_pinctrl_driver);
 635
 636 MODULE_DESCRIPTION("RK805 pin control and GPIO driver");
 637 MODULE_AUTHOR("Xu Shengfei <xsf@rock-chips.com>");
 638 MODULE_AUTHOR("Joseph Chen <chenjh@rock-chips.com>");
 639 MODULE_LICENSE("GPL v2");