2 * MCP23S08 SPI/I2C GPIO gpio expander driver
4 * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
6 * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
7 * interrupts is also supported.
8 * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
9 * also capable of generating interrupts, but the linux driver does not
13 #include <linux/kernel.h>
14 #include <linux/device.h>
15 #include <linux/mutex.h>
16 #include <linux/module.h>
17 #include <linux/gpio.h>
18 #include <linux/i2c.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/mcp23s08.h>
21 #include <linux/slab.h>
22 #include <asm/byteorder.h>
23 #include <linux/interrupt.h>
24 #include <linux/of_irq.h>
25 #include <linux/of_device.h>
26 #include <linux/regmap.h>
27 #include <linux/pinctrl/pinctrl.h>
28 #include <linux/pinctrl/pinconf.h>
29 #include <linux/pinctrl/pinconf-generic.h>
32 * MCP types supported by driver
34 #define MCP_TYPE_S08 0
35 #define MCP_TYPE_S17 1
36 #define MCP_TYPE_008 2
37 #define MCP_TYPE_017 3
38 #define MCP_TYPE_S18 4
40 /* Registers are all 8 bits wide.
42 * The mcp23s17 has twice as many bits, and can be configured to work
43 * with either 16 bit registers or with two adjacent 8 bit banks.
45 #define MCP_IODIR 0x00 /* init/reset: all ones */
47 #define MCP_GPINTEN 0x02
48 #define MCP_DEFVAL 0x03
49 #define MCP_INTCON 0x04
50 #define MCP_IOCON 0x05
51 # define IOCON_MIRROR (1 << 6)
52 # define IOCON_SEQOP (1 << 5)
53 # define IOCON_HAEN (1 << 3)
54 # define IOCON_ODR (1 << 2)
55 # define IOCON_INTPOL (1 << 1)
56 # define IOCON_INTCC (1)
59 #define MCP_INTCAP 0x08
75 /* lock protects the cached values */
77 struct mutex irq_lock;
79 struct gpio_chip chip;
81 struct regmap *regmap;
84 struct pinctrl_dev *pctldev;
85 struct pinctrl_desc pinctrl_desc;
88 static const struct regmap_config mcp23x08_regmap = {
93 .max_register = MCP_OLAT,
96 static const struct regmap_config mcp23x17_regmap = {
101 .max_register = MCP_OLAT << 1,
102 .val_format_endian = REGMAP_ENDIAN_LITTLE,
105 static int mcp_read(struct mcp23s08 *mcp, unsigned int reg, unsigned int *val)
107 return regmap_read(mcp->regmap, reg << mcp->reg_shift, val);
110 static int mcp_write(struct mcp23s08 *mcp, unsigned int reg, unsigned int val)
112 return regmap_write(mcp->regmap, reg << mcp->reg_shift, val);
115 static int mcp_set_bit(struct mcp23s08 *mcp, unsigned int reg,
116 unsigned int pin, bool enabled)
118 u16 val = enabled ? 0xffff : 0x0000;
120 return regmap_update_bits(mcp->regmap, reg << mcp->reg_shift,
124 static int mcp_update_cache(struct mcp23s08 *mcp)
128 for (i = 0; i < ARRAY_SIZE(mcp->cache); i++) {
129 ret = mcp_read(mcp, i, ®);
138 static const struct pinctrl_pin_desc mcp23x08_pins[] = {
139 PINCTRL_PIN(0, "gpio0"),
140 PINCTRL_PIN(1, "gpio1"),
141 PINCTRL_PIN(2, "gpio2"),
142 PINCTRL_PIN(3, "gpio3"),
143 PINCTRL_PIN(4, "gpio4"),
144 PINCTRL_PIN(5, "gpio5"),
145 PINCTRL_PIN(6, "gpio6"),
146 PINCTRL_PIN(7, "gpio7"),
149 static const struct pinctrl_pin_desc mcp23x17_pins[] = {
150 PINCTRL_PIN(0, "gpio0"),
151 PINCTRL_PIN(1, "gpio1"),
152 PINCTRL_PIN(2, "gpio2"),
153 PINCTRL_PIN(3, "gpio3"),
154 PINCTRL_PIN(4, "gpio4"),
155 PINCTRL_PIN(5, "gpio5"),
156 PINCTRL_PIN(6, "gpio6"),
157 PINCTRL_PIN(7, "gpio7"),
158 PINCTRL_PIN(8, "gpio8"),
159 PINCTRL_PIN(9, "gpio9"),
160 PINCTRL_PIN(10, "gpio10"),
161 PINCTRL_PIN(11, "gpio11"),
162 PINCTRL_PIN(12, "gpio12"),
163 PINCTRL_PIN(13, "gpio13"),
164 PINCTRL_PIN(14, "gpio14"),
165 PINCTRL_PIN(15, "gpio15"),
168 static int mcp_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
173 static const char *mcp_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
179 static int mcp_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
181 const unsigned int **pins,
182 unsigned int *num_pins)
187 static const struct pinctrl_ops mcp_pinctrl_ops = {
188 .get_groups_count = mcp_pinctrl_get_groups_count,
189 .get_group_name = mcp_pinctrl_get_group_name,
190 .get_group_pins = mcp_pinctrl_get_group_pins,
192 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
193 .dt_free_map = pinconf_generic_dt_free_map,
197 static int mcp_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
198 unsigned long *config)
200 struct mcp23s08 *mcp = pinctrl_dev_get_drvdata(pctldev);
201 enum pin_config_param param = pinconf_to_config_param(*config);
202 unsigned int data, status;
206 case PIN_CONFIG_BIAS_PULL_UP:
207 ret = mcp_read(mcp, MCP_GPPU, &data);
210 status = (data & BIT(pin)) ? 1 : 0;
213 dev_err(mcp->dev, "Invalid config param %04x\n", param);
219 return status ? 0 : -EINVAL;
222 static int mcp_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
223 unsigned long *configs, unsigned int num_configs)
225 struct mcp23s08 *mcp = pinctrl_dev_get_drvdata(pctldev);
226 enum pin_config_param param;
232 for (i = 0; i < num_configs; i++) {
233 param = pinconf_to_config_param(configs[i]);
234 arg = pinconf_to_config_argument(configs[i]);
237 case PIN_CONFIG_BIAS_PULL_UP:
238 val = arg ? 0xFFFF : 0x0000;
240 ret = mcp_set_bit(mcp, MCP_GPPU, pin, arg);
243 dev_err(mcp->dev, "Invalid config param %04x\n", param);
251 static const struct pinconf_ops mcp_pinconf_ops = {
252 .pin_config_get = mcp_pinconf_get,
253 .pin_config_set = mcp_pinconf_set,
257 /*----------------------------------------------------------------------*/
259 #ifdef CONFIG_SPI_MASTER
261 static int mcp23sxx_spi_write(void *context, const void *data, size_t count)
263 struct mcp23s08 *mcp = context;
264 struct spi_device *spi = to_spi_device(mcp->dev);
265 struct spi_message m;
266 struct spi_transfer t[2] = { { .tx_buf = &mcp->addr, .len = 1, },
267 { .tx_buf = data, .len = count, }, };
269 spi_message_init(&m);
270 spi_message_add_tail(&t[0], &m);
271 spi_message_add_tail(&t[1], &m);
273 return spi_sync(spi, &m);
276 static int mcp23sxx_spi_gather_write(void *context,
277 const void *reg, size_t reg_size,
278 const void *val, size_t val_size)
280 struct mcp23s08 *mcp = context;
281 struct spi_device *spi = to_spi_device(mcp->dev);
282 struct spi_message m;
283 struct spi_transfer t[3] = { { .tx_buf = &mcp->addr, .len = 1, },
284 { .tx_buf = reg, .len = reg_size, },
285 { .tx_buf = val, .len = val_size, }, };
287 spi_message_init(&m);
288 spi_message_add_tail(&t[0], &m);
289 spi_message_add_tail(&t[1], &m);
290 spi_message_add_tail(&t[2], &m);
292 return spi_sync(spi, &m);
295 static int mcp23sxx_spi_read(void *context, const void *reg, size_t reg_size,
296 void *val, size_t val_size)
298 struct mcp23s08 *mcp = context;
299 struct spi_device *spi = to_spi_device(mcp->dev);
305 tx[0] = mcp->addr | 0x01;
306 tx[1] = *((u8 *) reg);
308 return spi_write_then_read(spi, tx, sizeof(tx), val, val_size);
311 static const struct regmap_bus mcp23sxx_spi_regmap = {
312 .write = mcp23sxx_spi_write,
313 .gather_write = mcp23sxx_spi_gather_write,
314 .read = mcp23sxx_spi_read,
317 #endif /* CONFIG_SPI_MASTER */
319 /*----------------------------------------------------------------------*/
321 /* A given spi_device can represent up to eight mcp23sxx chips
322 * sharing the same chipselect but using different addresses
323 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
324 * Driver data holds all the per-chip data.
326 struct mcp23s08_driver_data {
328 struct mcp23s08 *mcp[8];
329 struct mcp23s08 chip[];
333 static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
335 struct mcp23s08 *mcp = gpiochip_get_data(chip);
338 mutex_lock(&mcp->lock);
339 mcp->cache[MCP_IODIR] |= (1 << offset);
340 status = mcp_write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
341 mutex_unlock(&mcp->lock);
345 static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
347 struct mcp23s08 *mcp = gpiochip_get_data(chip);
350 mutex_lock(&mcp->lock);
352 /* REVISIT reading this clears any IRQ ... */
353 ret = mcp_read(mcp, MCP_GPIO, &status);
357 mcp->cache[MCP_GPIO] = status;
358 status = !!(status & (1 << offset));
360 mutex_unlock(&mcp->lock);
364 static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
366 unsigned olat = mcp->cache[MCP_OLAT];
372 mcp->cache[MCP_OLAT] = olat;
373 return mcp_write(mcp, MCP_OLAT, olat);
376 static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
378 struct mcp23s08 *mcp = gpiochip_get_data(chip);
379 unsigned mask = 1 << offset;
381 mutex_lock(&mcp->lock);
382 __mcp23s08_set(mcp, mask, value);
383 mutex_unlock(&mcp->lock);
387 mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
389 struct mcp23s08 *mcp = gpiochip_get_data(chip);
390 unsigned mask = 1 << offset;
393 mutex_lock(&mcp->lock);
394 status = __mcp23s08_set(mcp, mask, value);
396 mcp->cache[MCP_IODIR] &= ~mask;
397 status = mcp_write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
399 mutex_unlock(&mcp->lock);
403 /*----------------------------------------------------------------------*/
404 static irqreturn_t mcp23s08_irq(int irq, void *data)
406 struct mcp23s08 *mcp = data;
407 int intcap, intf, i, gpio, gpio_orig, intcap_mask;
408 unsigned int child_irq;
409 bool intf_set, intcap_changed, gpio_bit_changed,
410 defval_changed, gpio_set;
412 mutex_lock(&mcp->lock);
413 if (mcp_read(mcp, MCP_INTF, &intf) < 0) {
414 mutex_unlock(&mcp->lock);
418 mcp->cache[MCP_INTF] = intf;
420 if (mcp_read(mcp, MCP_INTCAP, &intcap) < 0) {
421 mutex_unlock(&mcp->lock);
425 mcp->cache[MCP_INTCAP] = intcap;
427 /* This clears the interrupt(configurable on S18) */
428 if (mcp_read(mcp, MCP_GPIO, &gpio) < 0) {
429 mutex_unlock(&mcp->lock);
432 gpio_orig = mcp->cache[MCP_GPIO];
433 mcp->cache[MCP_GPIO] = gpio;
434 mutex_unlock(&mcp->lock);
436 if (mcp->cache[MCP_INTF] == 0) {
437 /* There is no interrupt pending */
441 dev_dbg(mcp->chip.parent,
442 "intcap 0x%04X intf 0x%04X gpio_orig 0x%04X gpio 0x%04X\n",
443 intcap, intf, gpio_orig, gpio);
445 for (i = 0; i < mcp->chip.ngpio; i++) {
446 /* We must check all of the inputs on the chip,
447 * otherwise we may not notice a change on >=2 pins.
449 * On at least the mcp23s17, INTCAP is only updated
450 * one byte at a time(INTCAPA and INTCAPB are
451 * not written to at the same time - only on a per-bank
454 * INTF only contains the single bit that caused the
455 * interrupt per-bank. On the mcp23s17, there is
456 * INTFA and INTFB. If two pins are changed on the A
457 * side at the same time, INTF will only have one bit
458 * set. If one pin on the A side and one pin on the B
459 * side are changed at the same time, INTF will have
460 * two bits set. Thus, INTF can't be the only check
461 * to see if the input has changed.
464 intf_set = BIT(i) & mcp->cache[MCP_INTF];
465 if (i < 8 && intf_set)
466 intcap_mask = 0x00FF;
467 else if (i >= 8 && intf_set)
468 intcap_mask = 0xFF00;
472 intcap_changed = (intcap_mask &
473 (BIT(i) & mcp->cache[MCP_INTCAP])) !=
474 (intcap_mask & (BIT(i) & gpio_orig));
475 gpio_set = BIT(i) & mcp->cache[MCP_GPIO];
476 gpio_bit_changed = (BIT(i) & gpio_orig) !=
477 (BIT(i) & mcp->cache[MCP_GPIO]);
478 defval_changed = (BIT(i) & mcp->cache[MCP_INTCON]) &&
479 ((BIT(i) & mcp->cache[MCP_GPIO]) !=
480 (BIT(i) & mcp->cache[MCP_DEFVAL]));
482 if (((gpio_bit_changed || intcap_changed) &&
483 (BIT(i) & mcp->irq_rise) && gpio_set) ||
484 ((gpio_bit_changed || intcap_changed) &&
485 (BIT(i) & mcp->irq_fall) && !gpio_set) ||
487 child_irq = irq_find_mapping(mcp->chip.irqdomain, i);
488 handle_nested_irq(child_irq);
495 static void mcp23s08_irq_mask(struct irq_data *data)
497 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
498 struct mcp23s08 *mcp = gpiochip_get_data(gc);
499 unsigned int pos = data->hwirq;
501 mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
504 static void mcp23s08_irq_unmask(struct irq_data *data)
506 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
507 struct mcp23s08 *mcp = gpiochip_get_data(gc);
508 unsigned int pos = data->hwirq;
510 mcp->cache[MCP_GPINTEN] |= BIT(pos);
513 static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
515 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
516 struct mcp23s08 *mcp = gpiochip_get_data(gc);
517 unsigned int pos = data->hwirq;
520 if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
521 mcp->cache[MCP_INTCON] &= ~BIT(pos);
522 mcp->irq_rise |= BIT(pos);
523 mcp->irq_fall |= BIT(pos);
524 } else if (type & IRQ_TYPE_EDGE_RISING) {
525 mcp->cache[MCP_INTCON] &= ~BIT(pos);
526 mcp->irq_rise |= BIT(pos);
527 mcp->irq_fall &= ~BIT(pos);
528 } else if (type & IRQ_TYPE_EDGE_FALLING) {
529 mcp->cache[MCP_INTCON] &= ~BIT(pos);
530 mcp->irq_rise &= ~BIT(pos);
531 mcp->irq_fall |= BIT(pos);
532 } else if (type & IRQ_TYPE_LEVEL_HIGH) {
533 mcp->cache[MCP_INTCON] |= BIT(pos);
534 mcp->cache[MCP_DEFVAL] &= ~BIT(pos);
535 } else if (type & IRQ_TYPE_LEVEL_LOW) {
536 mcp->cache[MCP_INTCON] |= BIT(pos);
537 mcp->cache[MCP_DEFVAL] |= BIT(pos);
544 static void mcp23s08_irq_bus_lock(struct irq_data *data)
546 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
547 struct mcp23s08 *mcp = gpiochip_get_data(gc);
549 mutex_lock(&mcp->irq_lock);
552 static void mcp23s08_irq_bus_unlock(struct irq_data *data)
554 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
555 struct mcp23s08 *mcp = gpiochip_get_data(gc);
557 mutex_lock(&mcp->lock);
558 mcp_write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
559 mcp_write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
560 mcp_write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
561 mutex_unlock(&mcp->lock);
562 mutex_unlock(&mcp->irq_lock);
565 static struct irq_chip mcp23s08_irq_chip = {
566 .name = "gpio-mcp23xxx",
567 .irq_mask = mcp23s08_irq_mask,
568 .irq_unmask = mcp23s08_irq_unmask,
569 .irq_set_type = mcp23s08_irq_set_type,
570 .irq_bus_lock = mcp23s08_irq_bus_lock,
571 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
574 static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
576 struct gpio_chip *chip = &mcp->chip;
578 unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
580 mutex_init(&mcp->irq_lock);
582 if (mcp->irq_active_high)
583 irqflags |= IRQF_TRIGGER_HIGH;
585 irqflags |= IRQF_TRIGGER_LOW;
587 err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
589 irqflags, dev_name(chip->parent), mcp);
591 dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
596 err = gpiochip_irqchip_add_nested(chip,
602 dev_err(chip->parent,
603 "could not connect irqchip to gpiochip: %d\n", err);
607 gpiochip_set_nested_irqchip(chip,
614 /*----------------------------------------------------------------------*/
616 #ifdef CONFIG_DEBUG_FS
618 #include <linux/seq_file.h>
621 * This shows more info than the generic gpio dump code:
622 * pullups, deglitching, open drain drive.
624 static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
626 struct mcp23s08 *mcp;
631 mcp = gpiochip_get_data(chip);
633 /* NOTE: we only handle one bank for now ... */
634 bank = '0' + ((mcp->addr >> 1) & 0x7);
636 mutex_lock(&mcp->lock);
637 t = mcp_update_cache(mcp);
639 seq_printf(s, " I/O ERROR %d\n", t);
643 for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
646 label = gpiochip_is_requested(chip, t);
650 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
651 chip->base + t, bank, t, label,
652 (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
653 (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
654 (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
655 /* NOTE: ignoring the irq-related registers */
659 mutex_unlock(&mcp->lock);
663 #define mcp23s08_dbg_show NULL
666 /*----------------------------------------------------------------------*/
668 static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
669 void *data, unsigned addr, unsigned type,
670 struct mcp23s08_platform_data *pdata, int cs)
675 mutex_init(&mcp->lock);
679 mcp->irq_active_high = false;
681 mcp->chip.direction_input = mcp23s08_direction_input;
682 mcp->chip.get = mcp23s08_get;
683 mcp->chip.direction_output = mcp23s08_direction_output;
684 mcp->chip.set = mcp23s08_set;
685 mcp->chip.dbg_show = mcp23s08_dbg_show;
686 #ifdef CONFIG_OF_GPIO
687 mcp->chip.of_gpio_n_cells = 2;
688 mcp->chip.of_node = dev->of_node;
692 #ifdef CONFIG_SPI_MASTER
694 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
698 mcp->chip.label = "mcp23s08";
702 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
705 mcp->chip.ngpio = 16;
706 mcp->chip.label = "mcp23s17";
710 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
713 mcp->chip.ngpio = 16;
714 mcp->chip.label = "mcp23s18";
716 #endif /* CONFIG_SPI_MASTER */
718 #if IS_ENABLED(CONFIG_I2C)
720 mcp->regmap = devm_regmap_init_i2c(data, &mcp23x08_regmap);
723 mcp->chip.label = "mcp23008";
727 mcp->regmap = devm_regmap_init_i2c(data, &mcp23x17_regmap);
729 mcp->chip.ngpio = 16;
730 mcp->chip.label = "mcp23017";
732 #endif /* CONFIG_I2C */
735 dev_err(dev, "invalid device type (%d)\n", type);
739 if (IS_ERR(mcp->regmap))
740 return PTR_ERR(mcp->regmap);
742 mcp->chip.base = pdata->base;
743 mcp->chip.can_sleep = true;
744 mcp->chip.parent = dev;
745 mcp->chip.owner = THIS_MODULE;
747 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
748 * and MCP_IOCON.HAEN = 1, so we work with all chips.
751 ret = mcp_read(mcp, MCP_IOCON, &status);
755 mcp->irq_controller = pdata->irq_controller;
756 if (mcp->irq && mcp->irq_controller) {
757 mcp->irq_active_high =
758 of_property_read_bool(mcp->chip.parent->of_node,
759 "microchip,irq-active-high");
761 mirror = pdata->mirror;
764 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
765 mcp->irq_active_high) {
766 /* mcp23s17 has IOCON twice, make sure they are in sync */
767 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
768 status |= IOCON_HAEN | (IOCON_HAEN << 8);
769 if (mcp->irq_active_high)
770 status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
772 status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
775 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
777 if (type == MCP_TYPE_S18)
778 status |= IOCON_INTCC | (IOCON_INTCC << 8);
780 ret = mcp_write(mcp, MCP_IOCON, status);
785 /* configure ~100K pullups */
786 ret = mcp_write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
790 ret = mcp_update_cache(mcp);
794 /* disable inverter on input */
795 if (mcp->cache[MCP_IPOL] != 0) {
796 mcp->cache[MCP_IPOL] = 0;
797 ret = mcp_write(mcp, MCP_IPOL, 0);
803 if (mcp->cache[MCP_GPINTEN] != 0) {
804 mcp->cache[MCP_GPINTEN] = 0;
805 ret = mcp_write(mcp, MCP_GPINTEN, 0);
810 ret = gpiochip_add_data(&mcp->chip, mcp);
814 if (mcp->irq && mcp->irq_controller) {
815 ret = mcp23s08_irq_setup(mcp);
820 mcp->pinctrl_desc.name = "mcp23xxx-pinctrl";
821 mcp->pinctrl_desc.pctlops = &mcp_pinctrl_ops;
822 mcp->pinctrl_desc.confops = &mcp_pinconf_ops;
823 mcp->pinctrl_desc.npins = mcp->chip.ngpio;
824 if (mcp->pinctrl_desc.npins == 8)
825 mcp->pinctrl_desc.pins = mcp23x08_pins;
826 else if (mcp->pinctrl_desc.npins == 16)
827 mcp->pinctrl_desc.pins = mcp23x17_pins;
828 mcp->pinctrl_desc.owner = THIS_MODULE;
830 mcp->pctldev = devm_pinctrl_register(dev, &mcp->pinctrl_desc, mcp);
831 if (IS_ERR(mcp->pctldev)) {
832 ret = PTR_ERR(mcp->pctldev);
838 dev_dbg(dev, "can't setup chip %d, --> %d\n", addr, ret);
842 /*----------------------------------------------------------------------*/
845 #ifdef CONFIG_SPI_MASTER
846 static const struct of_device_id mcp23s08_spi_of_match[] = {
848 .compatible = "microchip,mcp23s08",
849 .data = (void *) MCP_TYPE_S08,
852 .compatible = "microchip,mcp23s17",
853 .data = (void *) MCP_TYPE_S17,
856 .compatible = "microchip,mcp23s18",
857 .data = (void *) MCP_TYPE_S18,
859 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
861 .compatible = "mcp,mcp23s08",
862 .data = (void *) MCP_TYPE_S08,
865 .compatible = "mcp,mcp23s17",
866 .data = (void *) MCP_TYPE_S17,
870 MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
873 #if IS_ENABLED(CONFIG_I2C)
874 static const struct of_device_id mcp23s08_i2c_of_match[] = {
876 .compatible = "microchip,mcp23008",
877 .data = (void *) MCP_TYPE_008,
880 .compatible = "microchip,mcp23017",
881 .data = (void *) MCP_TYPE_017,
883 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
885 .compatible = "mcp,mcp23008",
886 .data = (void *) MCP_TYPE_008,
889 .compatible = "mcp,mcp23017",
890 .data = (void *) MCP_TYPE_017,
894 MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
896 #endif /* CONFIG_OF */
899 #if IS_ENABLED(CONFIG_I2C)
901 static int mcp230xx_probe(struct i2c_client *client,
902 const struct i2c_device_id *id)
904 struct mcp23s08_platform_data *pdata, local_pdata;
905 struct mcp23s08 *mcp;
907 const struct of_device_id *match;
909 match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
912 pdata = &local_pdata;
914 pdata->chip[0].pullups = 0;
915 pdata->irq_controller = of_property_read_bool(
917 "interrupt-controller");
918 pdata->mirror = of_property_read_bool(client->dev.of_node,
919 "microchip,irq-mirror");
920 client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
922 pdata = dev_get_platdata(&client->dev);
924 pdata = devm_kzalloc(&client->dev,
925 sizeof(struct mcp23s08_platform_data),
933 mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
937 mcp->irq = client->irq;
938 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
939 id->driver_data, pdata, 0);
943 i2c_set_clientdata(client, mcp);
953 static int mcp230xx_remove(struct i2c_client *client)
955 struct mcp23s08 *mcp = i2c_get_clientdata(client);
957 gpiochip_remove(&mcp->chip);
963 static const struct i2c_device_id mcp230xx_id[] = {
964 { "mcp23008", MCP_TYPE_008 },
965 { "mcp23017", MCP_TYPE_017 },
968 MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
970 static struct i2c_driver mcp230xx_driver = {
973 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
975 .probe = mcp230xx_probe,
976 .remove = mcp230xx_remove,
977 .id_table = mcp230xx_id,
980 static int __init mcp23s08_i2c_init(void)
982 return i2c_add_driver(&mcp230xx_driver);
985 static void mcp23s08_i2c_exit(void)
987 i2c_del_driver(&mcp230xx_driver);
992 static int __init mcp23s08_i2c_init(void) { return 0; }
993 static void mcp23s08_i2c_exit(void) { }
995 #endif /* CONFIG_I2C */
997 /*----------------------------------------------------------------------*/
999 #ifdef CONFIG_SPI_MASTER
1001 static int mcp23s08_probe(struct spi_device *spi)
1003 struct mcp23s08_platform_data *pdata, local_pdata;
1006 struct mcp23s08_driver_data *data;
1009 const struct of_device_id *match;
1010 u32 spi_present_mask = 0;
1012 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
1014 type = (int)(uintptr_t)match->data;
1015 status = of_property_read_u32(spi->dev.of_node,
1016 "microchip,spi-present-mask", &spi_present_mask);
1018 status = of_property_read_u32(spi->dev.of_node,
1019 "mcp,spi-present-mask", &spi_present_mask);
1022 "DT has no spi-present-mask\n");
1026 if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
1027 dev_err(&spi->dev, "invalid spi-present-mask\n");
1031 pdata = &local_pdata;
1033 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
1034 pdata->chip[addr].pullups = 0;
1035 if (spi_present_mask & (1 << addr))
1038 pdata->irq_controller = of_property_read_bool(
1040 "interrupt-controller");
1041 pdata->mirror = of_property_read_bool(spi->dev.of_node,
1042 "microchip,irq-mirror");
1044 type = spi_get_device_id(spi)->driver_data;
1045 pdata = dev_get_platdata(&spi->dev);
1047 pdata = devm_kzalloc(&spi->dev,
1048 sizeof(struct mcp23s08_platform_data),
1053 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
1054 if (!pdata->chip[addr].is_present)
1057 if ((type == MCP_TYPE_S08) && (addr > 3)) {
1059 "mcp23s08 only supports address 0..3\n");
1062 spi_present_mask |= 1 << addr;
1069 data = devm_kzalloc(&spi->dev,
1070 sizeof(*data) + chips * sizeof(struct mcp23s08),
1075 spi_set_drvdata(spi, data);
1077 spi->irq = irq_of_parse_and_map(spi->dev.of_node, 0);
1079 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
1080 if (!(spi_present_mask & (1 << addr)))
1083 data->mcp[addr] = &data->chip[chips];
1084 data->mcp[addr]->irq = spi->irq;
1085 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
1086 0x40 | (addr << 1), type, pdata,
1091 if (pdata->base != -1)
1092 pdata->base += data->mcp[addr]->chip.ngpio;
1093 ngpio += data->mcp[addr]->chip.ngpio;
1095 data->ngpio = ngpio;
1097 /* NOTE: these chips have a relatively sane IRQ framework, with
1098 * per-signal masking and level/edge triggering. It's not yet
1105 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
1107 if (!data->mcp[addr])
1109 gpiochip_remove(&data->mcp[addr]->chip);
1114 static int mcp23s08_remove(struct spi_device *spi)
1116 struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
1119 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
1121 if (!data->mcp[addr])
1124 gpiochip_remove(&data->mcp[addr]->chip);
1130 static const struct spi_device_id mcp23s08_ids[] = {
1131 { "mcp23s08", MCP_TYPE_S08 },
1132 { "mcp23s17", MCP_TYPE_S17 },
1133 { "mcp23s18", MCP_TYPE_S18 },
1136 MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
1138 static struct spi_driver mcp23s08_driver = {
1139 .probe = mcp23s08_probe,
1140 .remove = mcp23s08_remove,
1141 .id_table = mcp23s08_ids,
1144 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
1148 static int __init mcp23s08_spi_init(void)
1150 return spi_register_driver(&mcp23s08_driver);
1153 static void mcp23s08_spi_exit(void)
1155 spi_unregister_driver(&mcp23s08_driver);
1160 static int __init mcp23s08_spi_init(void) { return 0; }
1161 static void mcp23s08_spi_exit(void) { }
1163 #endif /* CONFIG_SPI_MASTER */
1165 /*----------------------------------------------------------------------*/
1167 static int __init mcp23s08_init(void)
1171 ret = mcp23s08_spi_init();
1175 ret = mcp23s08_i2c_init();
1182 mcp23s08_spi_exit();
1186 /* register after spi/i2c postcore initcall and before
1187 * subsys initcalls that may rely on these GPIOs
1189 subsys_initcall(mcp23s08_init);
1191 static void __exit mcp23s08_exit(void)
1193 mcp23s08_spi_exit();
1194 mcp23s08_i2c_exit();
1196 module_exit(mcp23s08_exit);
1198 MODULE_LICENSE("GPL");