1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef PINCTRL_PINCTRL_ABx500_H
3 #define PINCTRL_PINCTRL_ABx500_H
5 #include <linux/types.h>
7 struct pinctrl_pin_desc;
9 /* Package definitions */
10 #define PINCTRL_AB8500 0
11 #define PINCTRL_AB8505 1
13 /* pins alternate function */
14 enum abx500_pin_func {
21 enum abx500_gpio_pull_updown {
22 ABX500_GPIO_PULL_DOWN = 0x0,
23 ABX500_GPIO_PULL_NONE = 0x1,
24 ABX500_GPIO_PULL_UP = 0x3,
27 enum abx500_gpio_vinsel {
28 ABX500_GPIO_VINSEL_VBAT = 0x0,
29 ABX500_GPIO_VINSEL_VIN_1V8 = 0x1,
30 ABX500_GPIO_VINSEL_VDD_BIF = 0x2,
34 * struct abx500_function - ABx500 pinctrl mux function
35 * @name: The name of the function, exported to pinctrl core.
36 * @groups: An array of pin groups that may select this function.
37 * @ngroups: The number of entries in @groups.
39 struct abx500_function {
41 const char * const *groups;
46 * struct abx500_pingroup - describes a ABx500 pin group
47 * @name: the name of this specific pin group
48 * @pins: an array of discrete physical pins used in this group, taken
49 * from the driver-local pin enumeration space
50 * @num_pins: the number of pins in this group array, i.e. the number of
51 * elements in .pins so we can iterate over that array
52 * @altsetting: the altsetting to apply to all pins in this group to
53 * configure them to be used by a function
55 struct abx500_pingroup {
57 const unsigned int *pins;
62 #define ALTERNATE_FUNCTIONS(pin, sel_bit, alt1, alt2, alta, altb, altc) \
65 .gpiosel_bit = sel_bit, \
75 * struct alternate_functions
76 * @pin_number: The pin number
77 * @gpiosel_bit: Control bit in GPIOSEL register,
78 * @alt_bit1: First AlternateFunction bit used to select the
80 * @alt_bit2: Second AlternateFunction bit used to select the
83 * these 3 following fields are necessary due to none
84 * coherency on how to select the altA, altB and altC
85 * function between the ABx500 SOC family when using
86 * alternatfunc register.
87 * @alta_val: value to write in alternatfunc to select altA function
88 * @altb_val: value to write in alternatfunc to select altB function
89 * @altc_val: value to write in alternatfunc to select altC function
91 struct alternate_functions {
101 #define GPIO_IRQ_CLUSTER(a, b, c) \
109 * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
111 * @start: The pin number of the first pin interrupt capable
112 * @end: The pin number of the last pin interrupt capable
113 * @to_irq: The ABx500 GPIO's associated IRQs are clustered
114 * together throughout the interrupt numbers at irregular
115 * intervals. To solve this quandary, we will place the
116 * read-in values into the cluster information table
119 struct abx500_gpio_irq_cluster {
126 * struct abx500_pinrange - map pin numbers to GPIO offsets
127 * @offset: offset into the GPIO local numberspace, incidentally
128 * identical to the offset into the local pin numberspace
129 * @npins: number of pins to map from both offsets
130 * @altfunc: altfunc setting to be used to enable GPIO on a pin in
131 * this range (may vary)
133 struct abx500_pinrange {
139 #define ABX500_PINRANGE(a, b, c) { .offset = a, .npins = b, .altfunc = c }
142 * struct abx500_pinctrl_soc_data - ABx500 pin controller per-SoC configuration
143 * @gpio_ranges: An array of GPIO ranges for this SoC
144 * @gpio_num_ranges: The number of GPIO ranges for this SoC
145 * @pins: An array describing all pins the pin controller affects.
146 * All pins which are also GPIOs must be listed first within the
147 * array, and be numbered identically to the GPIO controller's
149 * @npins: The number of entries in @pins.
150 * @functions: The functions supported on this SoC.
151 * @nfunction: The number of entries in @functions.
152 * @groups: An array describing all pin groups the pin SoC supports.
153 * @ngroups: The number of entries in @groups.
154 * @alternate_functions: array describing pins which supports alternate and
156 * @gpio_irq_cluster: An array of GPIO interrupt capable for this SoC
157 * @ngpio_irq_cluster: The number of GPIO inetrrupt capable for this SoC
158 * @irq_gpio_rising_offset: Interrupt offset used as base to compute specific
159 * setting strategy of the rising interrupt line
160 * @irq_gpio_falling_offset: Interrupt offset used as base to compute specific
161 * setting strategy of the falling interrupt line
162 * @irq_gpio_factor: Factor used to compute specific setting strategy of
166 struct abx500_pinctrl_soc_data {
167 const struct abx500_pinrange *gpio_ranges;
168 unsigned gpio_num_ranges;
169 const struct pinctrl_pin_desc *pins;
171 const struct abx500_function *functions;
173 const struct abx500_pingroup *groups;
175 struct alternate_functions *alternate_functions;
176 struct abx500_gpio_irq_cluster *gpio_irq_cluster;
177 unsigned ngpio_irq_cluster;
178 int irq_gpio_rising_offset;
179 int irq_gpio_falling_offset;
183 #ifdef CONFIG_PINCTRL_AB8500
185 void abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc);
190 abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc)
196 #ifdef CONFIG_PINCTRL_AB8505
198 void abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc);
203 abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc)
209 #endif /* PINCTRL_PINCTRL_ABx500_H */