1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Pin controller and GPIO driver for Amlogic Meson SoCs
5 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
8 #include <linux/gpio/driver.h>
9 #include <linux/pinctrl/pinctrl.h>
10 #include <linux/platform_device.h>
11 #include <linux/regmap.h>
12 #include <linux/types.h>
15 * struct meson_pmx_group - a pinmux group
18 * @pins: pins in the group
19 * @num_pins: number of pins in the group
20 * @is_gpio: whether the group is a single GPIO group
21 * @reg: register offset for the group in the domain mux registers
22 * @bit bit index enabling the group
23 * @domain: index of the domain this group belongs to
25 struct meson_pmx_group {
27 const unsigned int *pins;
28 unsigned int num_pins;
33 * struct meson_pmx_func - a pinmux function
35 * @name: function name
36 * @groups: groups in the function
37 * @num_groups: number of groups in the function
39 struct meson_pmx_func {
41 const char * const *groups;
42 unsigned int num_groups;
46 * struct meson_reg_desc - a register descriptor
48 * @reg: register offset in the regmap
49 * @bit: bit index in register
51 * The structure describes the information needed to control pull,
52 * pull-enable, direction, etc. for a single pin
54 struct meson_reg_desc {
60 * enum meson_reg_type - type of registers encoded in @meson_reg_desc
75 * @first: first pin of the bank
76 * @last: last pin of the bank
77 * @irq: hwirq base number of the bank
78 * @regs: array of register descriptors
80 * A bank represents a set of pins controlled by a contiguous set of
81 * bits in the domain registers. The structure specifies which bits in
82 * the regmap control the different functionalities. Each member of
83 * the @regs array refers to the first pin of the bank.
91 struct meson_reg_desc regs[NUM_REG];
94 struct meson_pinctrl_data {
96 const struct pinctrl_pin_desc *pins;
97 struct meson_pmx_group *groups;
98 struct meson_pmx_func *funcs;
99 unsigned int num_pins;
100 unsigned int num_groups;
101 unsigned int num_funcs;
102 struct meson_bank *banks;
103 unsigned int num_banks;
104 const struct pinmux_ops *pmx_ops;
108 struct meson_pinctrl {
110 struct pinctrl_dev *pcdev;
111 struct pinctrl_desc desc;
112 struct meson_pinctrl_data *data;
113 struct regmap *reg_mux;
114 struct regmap *reg_pullen;
115 struct regmap *reg_pull;
116 struct regmap *reg_gpio;
117 struct regmap *reg_ds;
118 struct gpio_chip chip;
119 struct device_node *of_node;
122 #define FUNCTION(fn) \
125 .groups = fn ## _groups, \
126 .num_groups = ARRAY_SIZE(fn ## _groups), \
129 #define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
137 [REG_PULLEN] = { per, peb }, \
138 [REG_PULL] = { pr, pb }, \
139 [REG_DIR] = { dr, db }, \
140 [REG_OUT] = { or, ob }, \
141 [REG_IN] = { ir, ib }, \
145 #define MESON_PIN(x) PINCTRL_PIN(x, #x)
147 /* Common pmx functions */
148 int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev);
149 const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev,
151 int meson_pmx_get_groups(struct pinctrl_dev *pcdev,
153 const char * const **groups,
154 unsigned * const num_groups);
156 /* Common probe function */
157 int meson_pinctrl_probe(struct platform_device *pdev);