1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Pin controller and GPIO driver for Amlogic Meson SoCs
5 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
8 #include <linux/gpio/driver.h>
9 #include <linux/pinctrl/pinctrl.h>
10 #include <linux/platform_device.h>
11 #include <linux/regmap.h>
12 #include <linux/types.h>
15 * struct meson_pmx_group - a pinmux group
18 * @pins: pins in the group
19 * @num_pins: number of pins in the group
20 * @is_gpio: whether the group is a single GPIO group
21 * @reg: register offset for the group in the domain mux registers
22 * @bit bit index enabling the group
23 * @domain: index of the domain this group belongs to
25 struct meson_pmx_group {
27 const unsigned int *pins;
28 unsigned int num_pins;
33 * struct meson_pmx_func - a pinmux function
35 * @name: function name
36 * @groups: groups in the function
37 * @num_groups: number of groups in the function
39 struct meson_pmx_func {
41 const char * const *groups;
42 unsigned int num_groups;
46 * struct meson_reg_desc - a register descriptor
48 * @reg: register offset in the regmap
49 * @bit: bit index in register
51 * The structure describes the information needed to control pull,
52 * pull-enable, direction, etc. for a single pin
54 struct meson_reg_desc {
60 * enum meson_reg_type - type of registers encoded in @meson_reg_desc
73 * enum meson_pinconf_drv - value of drive-strength supported
75 enum meson_pinconf_drv {
76 MESON_PINCONF_DRV_500UA,
77 MESON_PINCONF_DRV_2500UA,
78 MESON_PINCONF_DRV_3000UA,
79 MESON_PINCONF_DRV_4000UA,
86 * @first: first pin of the bank
87 * @last: last pin of the bank
88 * @irq: hwirq base number of the bank
89 * @regs: array of register descriptors
91 * A bank represents a set of pins controlled by a contiguous set of
92 * bits in the domain registers. The structure specifies which bits in
93 * the regmap control the different functionalities. Each member of
94 * the @regs array refers to the first pin of the bank.
102 struct meson_reg_desc regs[NUM_REG];
105 struct meson_pinctrl_data {
107 const struct pinctrl_pin_desc *pins;
108 struct meson_pmx_group *groups;
109 struct meson_pmx_func *funcs;
110 unsigned int num_pins;
111 unsigned int num_groups;
112 unsigned int num_funcs;
113 struct meson_bank *banks;
114 unsigned int num_banks;
115 const struct pinmux_ops *pmx_ops;
119 struct meson_pinctrl {
121 struct pinctrl_dev *pcdev;
122 struct pinctrl_desc desc;
123 struct meson_pinctrl_data *data;
124 struct regmap *reg_mux;
125 struct regmap *reg_pullen;
126 struct regmap *reg_pull;
127 struct regmap *reg_gpio;
128 struct regmap *reg_ds;
129 struct gpio_chip chip;
130 struct device_node *of_node;
133 #define FUNCTION(fn) \
136 .groups = fn ## _groups, \
137 .num_groups = ARRAY_SIZE(fn ## _groups), \
140 #define BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, \
149 [REG_PULLEN] = { per, peb }, \
150 [REG_PULL] = { pr, pb }, \
151 [REG_DIR] = { dr, db }, \
152 [REG_OUT] = { or, ob }, \
153 [REG_IN] = { ir, ib }, \
154 [REG_DS] = { dsr, dsb }, \
158 #define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
159 BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, 0, 0)
161 #define MESON_PIN(x) PINCTRL_PIN(x, #x)
163 /* Common pmx functions */
164 int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev);
165 const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev,
167 int meson_pmx_get_groups(struct pinctrl_dev *pcdev,
169 const char * const **groups,
170 unsigned * const num_groups);
172 /* Common probe function */
173 int meson_pinctrl_probe(struct platform_device *pdev);