2 * Copyright (C) 2016 IBM Corp.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 #include <linux/bitops.h>
10 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/mutex.h>
15 #include <linux/platform_device.h>
16 #include <linux/pinctrl/pinctrl.h>
17 #include <linux/pinctrl/pinmux.h>
18 #include <linux/pinctrl/pinconf.h>
19 #include <linux/pinctrl/pinconf-generic.h>
20 #include <linux/string.h>
21 #include <linux/types.h>
24 #include "../pinctrl-utils.h"
25 #include "pinmux-aspeed.h"
26 #include "pinctrl-aspeed.h"
29 * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
30 * references registers by the device/offset mnemonic. The register macros
31 * below are named the same way to ease transcription and verification (as
32 * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
33 * reference registers beyond those dedicated to pinmux, such as the system
34 * reset control and MAC clock configuration registers.
36 #define SCU2C 0x2C /* Misc. Control Register */
37 #define SCU3C 0x3C /* System Reset Control/Status Register */
38 #define SCU48 0x48 /* MAC Interface Clock Delay Setting */
39 #define HW_STRAP1 0x70 /* AST2400 strapping is 33 bits, is split */
40 #define HW_REVISION_ID 0x7C /* Silicon revision ID register */
41 #define SCU80 0x80 /* Multi-function Pin Control #1 */
42 #define SCU84 0x84 /* Multi-function Pin Control #2 */
43 #define SCU88 0x88 /* Multi-function Pin Control #3 */
44 #define SCU8C 0x8C /* Multi-function Pin Control #4 */
45 #define SCU90 0x90 /* Multi-function Pin Control #5 */
46 #define SCU94 0x94 /* Multi-function Pin Control #6 */
47 #define SCUA0 0xA0 /* Multi-function Pin Control #7 */
48 #define SCUA4 0xA4 /* Multi-function Pin Control #8 */
49 #define SCUA8 0xA8 /* Multi-function Pin Control #9 */
50 #define SCUAC 0xAC /* Multi-function Pin Control #10 */
51 #define HW_STRAP2 0xD0 /* Strapping */
54 * Uses undefined macros for symbol naming and references, eg GPIOA0, MAC1LINK,
57 * Pins are defined in GPIO bank order:
69 * Not all pins have their signals defined (yet).
73 SSSF_PIN_DECL(D6, GPIOA0, MAC1LINK, SIG_DESC_SET(SCU80, 0));
76 SSSF_PIN_DECL(B5, GPIOA1, MAC2LINK, SIG_DESC_SET(SCU80, 1));
79 SSSF_PIN_DECL(A4, GPIOA2, TIMER3, SIG_DESC_SET(SCU80, 2));
82 SSSF_PIN_DECL(E6, GPIOA3, TIMER4, SIG_DESC_SET(SCU80, 3));
84 #define I2C9_DESC SIG_DESC_SET(SCU90, 22)
87 SIG_EXPR_LIST_DECL_SINGLE(SCL9, I2C9, I2C9_DESC);
88 SIG_EXPR_LIST_DECL_SINGLE(TIMER5, TIMER5, SIG_DESC_SET(SCU80, 4));
89 MS_PIN_DECL(C5, GPIOA4, SCL9, TIMER5);
91 FUNC_GROUP_DECL(TIMER5, C5);
94 SIG_EXPR_LIST_DECL_SINGLE(SDA9, I2C9, I2C9_DESC);
95 SIG_EXPR_LIST_DECL_SINGLE(TIMER6, TIMER6, SIG_DESC_SET(SCU80, 5));
96 MS_PIN_DECL(B4, GPIOA5, SDA9, TIMER6);
98 FUNC_GROUP_DECL(TIMER6, B4);
99 FUNC_GROUP_DECL(I2C9, C5, B4);
101 #define MDIO2_DESC SIG_DESC_SET(SCU90, 2)
104 SIG_EXPR_LIST_DECL_SINGLE(MDC2, MDIO2, MDIO2_DESC);
105 SIG_EXPR_LIST_DECL_SINGLE(TIMER7, TIMER7, SIG_DESC_SET(SCU80, 6));
106 MS_PIN_DECL(A3, GPIOA6, MDC2, TIMER7);
108 FUNC_GROUP_DECL(TIMER7, A3);
111 SIG_EXPR_LIST_DECL_SINGLE(MDIO2, MDIO2, MDIO2_DESC);
112 SIG_EXPR_LIST_DECL_SINGLE(TIMER8, TIMER8, SIG_DESC_SET(SCU80, 7));
113 MS_PIN_DECL(D5, GPIOA7, MDIO2, TIMER8);
115 FUNC_GROUP_DECL(TIMER8, D5);
116 FUNC_GROUP_DECL(MDIO2, A3, D5);
119 SSSF_PIN_DECL(J21, GPIOB0, SALT1, SIG_DESC_SET(SCU80, 8));
122 SSSF_PIN_DECL(J20, GPIOB1, SALT2, SIG_DESC_SET(SCU80, 9));
125 SSSF_PIN_DECL(H18, GPIOB2, SALT3, SIG_DESC_SET(SCU80, 10));
128 SSSF_PIN_DECL(F18, GPIOB3, SALT4, SIG_DESC_SET(SCU80, 11));
131 SIG_EXPR_DECL(LPCRST, LPCRST, SIG_DESC_SET(SCU80, 12));
132 SIG_EXPR_DECL(LPCRST, LPCRSTS, SIG_DESC_SET(HW_STRAP1, 14));
133 SIG_EXPR_LIST_DECL_DUAL(LPCRST, LPCRST, LPCRSTS);
134 SS_PIN_DECL(E19, GPIOB4, LPCRST);
136 FUNC_GROUP_DECL(LPCRST, E19);
139 #define H19_DESC SIG_DESC_SET(SCU80, 13)
140 SIG_EXPR_LIST_DECL_SINGLE(LPCPD, LPCPD, H19_DESC);
141 SIG_EXPR_LIST_DECL_SINGLE(LPCSMI, LPCSMI, H19_DESC);
142 MS_PIN_DECL(H19, GPIOB5, LPCPD, LPCSMI);
144 FUNC_GROUP_DECL(LPCPD, H19);
145 FUNC_GROUP_DECL(LPCSMI, H19);
148 SSSF_PIN_DECL(H20, GPIOB6, LPCPME, SIG_DESC_SET(SCU80, 14));
151 SIG_EXPR_LIST_DECL_SINGLE(EXTRST, EXTRST,
152 SIG_DESC_SET(SCU80, 15),
153 SIG_DESC_BIT(SCU90, 31, 0),
154 SIG_DESC_SET(SCU3C, 3));
155 SIG_EXPR_LIST_DECL_SINGLE(SPICS1, SPICS1,
156 SIG_DESC_SET(SCU80, 15),
157 SIG_DESC_SET(SCU90, 31));
158 MS_PIN_DECL(E18, GPIOB7, EXTRST, SPICS1);
160 FUNC_GROUP_DECL(EXTRST, E18);
161 FUNC_GROUP_DECL(SPICS1, E18);
163 #define SD1_DESC SIG_DESC_SET(SCU90, 0)
164 #define I2C10_DESC SIG_DESC_SET(SCU90, 23)
167 SIG_EXPR_LIST_DECL_SINGLE(SD1CLK, SD1, SD1_DESC);
168 SIG_EXPR_LIST_DECL_SINGLE(SCL10, I2C10, I2C10_DESC);
169 MS_PIN_DECL(C4, GPIOC0, SD1CLK, SCL10);
172 SIG_EXPR_LIST_DECL_SINGLE(SD1CMD, SD1, SD1_DESC);
173 SIG_EXPR_LIST_DECL_SINGLE(SDA10, I2C10, I2C10_DESC);
174 MS_PIN_DECL(B3, GPIOC1, SD1CMD, SDA10);
176 FUNC_GROUP_DECL(I2C10, C4, B3);
178 #define I2C11_DESC SIG_DESC_SET(SCU90, 24)
181 SIG_EXPR_LIST_DECL_SINGLE(SD1DAT0, SD1, SD1_DESC);
182 SIG_EXPR_LIST_DECL_SINGLE(SCL11, I2C11, I2C11_DESC);
183 MS_PIN_DECL(A2, GPIOC2, SD1DAT0, SCL11);
186 SIG_EXPR_LIST_DECL_SINGLE(SD1DAT1, SD1, SD1_DESC);
187 SIG_EXPR_LIST_DECL_SINGLE(SDA11, I2C11, I2C11_DESC);
188 MS_PIN_DECL(E5, GPIOC3, SD1DAT1, SDA11);
190 FUNC_GROUP_DECL(I2C11, A2, E5);
192 #define I2C12_DESC SIG_DESC_SET(SCU90, 25)
195 SIG_EXPR_LIST_DECL_SINGLE(SD1DAT2, SD1, SD1_DESC);
196 SIG_EXPR_LIST_DECL_SINGLE(SCL12, I2C12, I2C12_DESC);
197 MS_PIN_DECL(D4, GPIOC4, SD1DAT2, SCL12);
200 SIG_EXPR_LIST_DECL_SINGLE(SD1DAT3, SD1, SD1_DESC);
201 SIG_EXPR_LIST_DECL_SINGLE(SDA12, I2C12, I2C12_DESC);
202 MS_PIN_DECL(C3, GPIOC5, SD1DAT3, SDA12);
204 FUNC_GROUP_DECL(I2C12, D4, C3);
206 #define I2C13_DESC SIG_DESC_SET(SCU90, 26)
209 SIG_EXPR_LIST_DECL_SINGLE(SD1CD, SD1, SD1_DESC);
210 SIG_EXPR_LIST_DECL_SINGLE(SCL13, I2C13, I2C13_DESC);
211 MS_PIN_DECL(B2, GPIOC6, SD1CD, SCL13);
214 SIG_EXPR_LIST_DECL_SINGLE(SD1WP, SD1, SD1_DESC);
215 SIG_EXPR_LIST_DECL_SINGLE(SDA13, I2C13, I2C13_DESC);
216 MS_PIN_DECL(A1, GPIOC7, SD1WP, SDA13);
218 FUNC_GROUP_DECL(I2C13, B2, A1);
219 FUNC_GROUP_DECL(SD1, C4, B3, A2, E5, D4, C3, B2, A1);
221 #define SD2_DESC SIG_DESC_SET(SCU90, 1)
222 #define GPID_DESC SIG_DESC_SET(HW_STRAP1, 21)
223 #define GPID0_DESC SIG_DESC_SET(SCU8C, 8)
226 SIG_EXPR_LIST_DECL_SINGLE(SD2CLK, SD2, SD2_DESC);
227 SIG_EXPR_DECL(GPID0IN, GPID0, GPID0_DESC);
228 SIG_EXPR_DECL(GPID0IN, GPID, GPID_DESC);
229 SIG_EXPR_LIST_DECL_DUAL(GPID0IN, GPID0, GPID);
230 MS_PIN_DECL(A18, GPIOD0, SD2CLK, GPID0IN);
233 SIG_EXPR_LIST_DECL_SINGLE(SD2CMD, SD2, SD2_DESC);
234 SIG_EXPR_DECL(GPID0OUT, GPID0, GPID0_DESC);
235 SIG_EXPR_DECL(GPID0OUT, GPID, GPID_DESC);
236 SIG_EXPR_LIST_DECL_DUAL(GPID0OUT, GPID0, GPID);
237 MS_PIN_DECL(D16, GPIOD1, SD2CMD, GPID0OUT);
239 FUNC_GROUP_DECL(GPID0, A18, D16);
241 #define GPID2_DESC SIG_DESC_SET(SCU8C, 9)
244 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT0, SD2, SD2_DESC);
245 SIG_EXPR_DECL(GPID2IN, GPID2, GPID2_DESC);
246 SIG_EXPR_DECL(GPID2IN, GPID, GPID_DESC);
247 SIG_EXPR_LIST_DECL_DUAL(GPID2IN, GPID2, GPID);
248 MS_PIN_DECL(B17, GPIOD2, SD2DAT0, GPID2IN);
251 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT1, SD2, SD2_DESC);
252 SIG_EXPR_DECL(GPID2OUT, GPID2, GPID2_DESC);
253 SIG_EXPR_DECL(GPID2OUT, GPID, GPID_DESC);
254 SIG_EXPR_LIST_DECL_DUAL(GPID2OUT, GPID2, GPID);
255 MS_PIN_DECL(A17, GPIOD3, SD2DAT1, GPID2OUT);
257 FUNC_GROUP_DECL(GPID2, B17, A17);
259 #define GPID4_DESC SIG_DESC_SET(SCU8C, 10)
262 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT2, SD2, SD2_DESC);
263 SIG_EXPR_DECL(GPID4IN, GPID4, GPID4_DESC);
264 SIG_EXPR_DECL(GPID4IN, GPID, GPID_DESC);
265 SIG_EXPR_LIST_DECL_DUAL(GPID4IN, GPID4, GPID);
266 MS_PIN_DECL(C16, GPIOD4, SD2DAT2, GPID4IN);
269 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT3, SD2, SD2_DESC);
270 SIG_EXPR_DECL(GPID4OUT, GPID4, GPID4_DESC);
271 SIG_EXPR_DECL(GPID4OUT, GPID, GPID_DESC);
272 SIG_EXPR_LIST_DECL_DUAL(GPID4OUT, GPID4, GPID);
273 MS_PIN_DECL(B16, GPIOD5, SD2DAT3, GPID4OUT);
275 FUNC_GROUP_DECL(GPID4, C16, B16);
277 #define GPID6_DESC SIG_DESC_SET(SCU8C, 11)
280 SIG_EXPR_LIST_DECL_SINGLE(SD2CD, SD2, SD2_DESC);
281 SIG_EXPR_DECL(GPID6IN, GPID6, GPID6_DESC);
282 SIG_EXPR_DECL(GPID6IN, GPID, GPID_DESC);
283 SIG_EXPR_LIST_DECL_DUAL(GPID6IN, GPID6, GPID);
284 MS_PIN_DECL(A16, GPIOD6, SD2CD, GPID6IN);
287 SIG_EXPR_LIST_DECL_SINGLE(SD2WP, SD2, SD2_DESC);
288 SIG_EXPR_DECL(GPID6OUT, GPID6, GPID6_DESC);
289 SIG_EXPR_DECL(GPID6OUT, GPID, GPID_DESC);
290 SIG_EXPR_LIST_DECL_DUAL(GPID6OUT, GPID6, GPID);
291 MS_PIN_DECL(E15, GPIOD7, SD2WP, GPID6OUT);
293 FUNC_GROUP_DECL(GPID6, A16, E15);
294 FUNC_GROUP_DECL(SD2, A18, D16, B17, A17, C16, B16, A16, E15);
295 FUNC_GROUP_DECL(GPID, A18, D16, B17, A17, C16, B16, A16, E15);
297 #define GPIE_DESC SIG_DESC_SET(HW_STRAP1, 22)
298 #define GPIE0_DESC SIG_DESC_SET(SCU8C, 12)
299 #define GPIE2_DESC SIG_DESC_SET(SCU8C, 13)
300 #define GPIE4_DESC SIG_DESC_SET(SCU8C, 14)
301 #define GPIE6_DESC SIG_DESC_SET(SCU8C, 15)
304 SIG_EXPR_LIST_DECL_SINGLE(NCTS3, NCTS3, SIG_DESC_SET(SCU80, 16));
305 SIG_EXPR_DECL(GPIE0IN, GPIE0, GPIE0_DESC);
306 SIG_EXPR_DECL(GPIE0IN, GPIE, GPIE_DESC);
307 SIG_EXPR_LIST_DECL_DUAL(GPIE0IN, GPIE0, GPIE);
308 MS_PIN_DECL(D15, GPIOE0, NCTS3, GPIE0IN);
310 FUNC_GROUP_DECL(NCTS3, D15);
313 SIG_EXPR_LIST_DECL_SINGLE(NDCD3, NDCD3, SIG_DESC_SET(SCU80, 17));
314 SIG_EXPR_DECL(GPIE0OUT, GPIE0, GPIE0_DESC);
315 SIG_EXPR_DECL(GPIE0OUT, GPIE, GPIE_DESC);
316 SIG_EXPR_LIST_DECL_DUAL(GPIE0OUT, GPIE0, GPIE);
317 MS_PIN_DECL(C15, GPIOE1, NDCD3, GPIE0OUT);
319 FUNC_GROUP_DECL(NDCD3, C15);
320 FUNC_GROUP_DECL(GPIE0, D15, C15);
323 SIG_EXPR_LIST_DECL_SINGLE(NDSR3, NDSR3, SIG_DESC_SET(SCU80, 18));
324 SIG_EXPR_DECL(GPIE2IN, GPIE2, GPIE2_DESC);
325 SIG_EXPR_DECL(GPIE2IN, GPIE, GPIE_DESC);
326 SIG_EXPR_LIST_DECL_DUAL(GPIE2IN, GPIE2, GPIE);
327 MS_PIN_DECL(B15, GPIOE2, NDSR3, GPIE2IN);
329 FUNC_GROUP_DECL(NDSR3, B15);
332 SIG_EXPR_LIST_DECL_SINGLE(NRI3, NRI3, SIG_DESC_SET(SCU80, 19));
333 SIG_EXPR_DECL(GPIE2OUT, GPIE2, GPIE2_DESC);
334 SIG_EXPR_DECL(GPIE2OUT, GPIE, GPIE_DESC);
335 SIG_EXPR_LIST_DECL_DUAL(GPIE2OUT, GPIE2, GPIE);
336 MS_PIN_DECL(A15, GPIOE3, NRI3, GPIE2OUT);
338 FUNC_GROUP_DECL(NRI3, A15);
339 FUNC_GROUP_DECL(GPIE2, B15, A15);
342 SIG_EXPR_LIST_DECL_SINGLE(NDTR3, NDTR3, SIG_DESC_SET(SCU80, 20));
343 SIG_EXPR_DECL(GPIE4IN, GPIE4, GPIE4_DESC);
344 SIG_EXPR_DECL(GPIE4IN, GPIE, GPIE_DESC);
345 SIG_EXPR_LIST_DECL_DUAL(GPIE4IN, GPIE4, GPIE);
346 MS_PIN_DECL(E14, GPIOE4, NDTR3, GPIE4IN);
348 FUNC_GROUP_DECL(NDTR3, E14);
351 SIG_EXPR_LIST_DECL_SINGLE(NRTS3, NRTS3, SIG_DESC_SET(SCU80, 21));
352 SIG_EXPR_DECL(GPIE4OUT, GPIE4, GPIE4_DESC);
353 SIG_EXPR_DECL(GPIE4OUT, GPIE, GPIE_DESC);
354 SIG_EXPR_LIST_DECL_DUAL(GPIE4OUT, GPIE4, GPIE);
355 MS_PIN_DECL(D14, GPIOE5, NRTS3, GPIE4OUT);
357 FUNC_GROUP_DECL(NRTS3, D14);
358 FUNC_GROUP_DECL(GPIE4, E14, D14);
361 SIG_EXPR_LIST_DECL_SINGLE(TXD3, TXD3, SIG_DESC_SET(SCU80, 22));
362 SIG_EXPR_DECL(GPIE6IN, GPIE6, GPIE6_DESC);
363 SIG_EXPR_DECL(GPIE6IN, GPIE, GPIE_DESC);
364 SIG_EXPR_LIST_DECL_DUAL(GPIE6IN, GPIE6, GPIE);
365 MS_PIN_DECL(C14, GPIOE6, TXD3, GPIE6IN);
367 FUNC_GROUP_DECL(TXD3, C14);
370 SIG_EXPR_LIST_DECL_SINGLE(RXD3, RXD3, SIG_DESC_SET(SCU80, 23));
371 SIG_EXPR_DECL(GPIE6OUT, GPIE6, GPIE6_DESC);
372 SIG_EXPR_DECL(GPIE6OUT, GPIE, GPIE_DESC);
373 SIG_EXPR_LIST_DECL_DUAL(GPIE6OUT, GPIE6, GPIE);
374 MS_PIN_DECL(B14, GPIOE7, RXD3, GPIE6OUT);
376 FUNC_GROUP_DECL(RXD3, B14);
377 FUNC_GROUP_DECL(GPIE6, C14, B14);
380 SSSF_PIN_DECL(D18, GPIOF0, NCTS4, SIG_DESC_SET(SCU80, 24));
382 #define ACPI_DESC SIG_DESC_BIT(HW_STRAP1, 19, 0)
385 SIG_EXPR_LIST_DECL_SINGLE(NDCD4, NDCD4, SIG_DESC_SET(SCU80, 25));
386 SIG_EXPR_DECL(SIOPBI, SIOPBI, SIG_DESC_SET(SCUA4, 12));
387 SIG_EXPR_DECL(SIOPBI, ACPI, ACPI_DESC);
388 SIG_EXPR_LIST_DECL_DUAL(SIOPBI, SIOPBI, ACPI);
389 MS_PIN_DECL(B19, GPIOF1, NDCD4, SIOPBI);
390 FUNC_GROUP_DECL(NDCD4, B19);
391 FUNC_GROUP_DECL(SIOPBI, B19);
394 SIG_EXPR_LIST_DECL_SINGLE(NDSR4, NDSR4, SIG_DESC_SET(SCU80, 26));
395 SIG_EXPR_DECL(SIOPWRGD, SIOPWRGD, SIG_DESC_SET(SCUA4, 12));
396 SIG_EXPR_DECL(SIOPWRGD, ACPI, ACPI_DESC);
397 SIG_EXPR_LIST_DECL_DUAL(SIOPWRGD, SIOPWRGD, ACPI);
398 MS_PIN_DECL(A20, GPIOF2, NDSR4, SIOPWRGD);
399 FUNC_GROUP_DECL(NDSR4, A20);
400 FUNC_GROUP_DECL(SIOPWRGD, A20);
403 SIG_EXPR_LIST_DECL_SINGLE(NRI4, NRI4, SIG_DESC_SET(SCU80, 27));
404 SIG_EXPR_DECL(SIOPBO, SIOPBO, SIG_DESC_SET(SCUA4, 14));
405 SIG_EXPR_DECL(SIOPBO, ACPI, ACPI_DESC);
406 SIG_EXPR_LIST_DECL_DUAL(SIOPBO, SIOPBO, ACPI);
407 MS_PIN_DECL(D17, GPIOF3, NRI4, SIOPBO);
408 FUNC_GROUP_DECL(NRI4, D17);
409 FUNC_GROUP_DECL(SIOPBO, D17);
412 SSSF_PIN_DECL(B18, GPIOF4, NDTR4, SIG_DESC_SET(SCU80, 28));
415 SIG_EXPR_LIST_DECL_SINGLE(NDTS4, NDTS4, SIG_DESC_SET(SCU80, 29));
416 SIG_EXPR_DECL(SIOSCI, SIOSCI, SIG_DESC_SET(SCUA4, 15));
417 SIG_EXPR_DECL(SIOSCI, ACPI, ACPI_DESC);
418 SIG_EXPR_LIST_DECL_DUAL(SIOSCI, SIOSCI, ACPI);
419 MS_PIN_DECL(A19, GPIOF5, NDTS4, SIOSCI);
420 FUNC_GROUP_DECL(NDTS4, A19);
421 FUNC_GROUP_DECL(SIOSCI, A19);
424 SSSF_PIN_DECL(E16, GPIOF6, TXD4, SIG_DESC_SET(SCU80, 30));
427 SSSF_PIN_DECL(C17, GPIOF7, RXD4, SIG_DESC_SET(SCU80, 31));
430 SSSF_PIN_DECL(A14, GPIOG0, SGPSCK, SIG_DESC_SET(SCU84, 0));
433 SSSF_PIN_DECL(E13, GPIOG1, SGPSLD, SIG_DESC_SET(SCU84, 1));
436 SSSF_PIN_DECL(D13, GPIOG2, SGPSI0, SIG_DESC_SET(SCU84, 2));
439 SSSF_PIN_DECL(C13, GPIOG3, SGPSI1, SIG_DESC_SET(SCU84, 3));
442 SIG_EXPR_LIST_DECL_SINGLE(OSCCLK, OSCCLK, SIG_DESC_SET(SCU2C, 1));
443 SIG_EXPR_LIST_DECL_SINGLE(WDTRST1, WDTRST1, SIG_DESC_SET(SCU84, 4));
444 MS_PIN_DECL(B13, GPIOG4, OSCCLK, WDTRST1);
446 FUNC_GROUP_DECL(OSCCLK, B13);
447 FUNC_GROUP_DECL(WDTRST1, B13);
450 SIG_EXPR_LIST_DECL_SINGLE(USBCKI, USBCKI, SIG_DESC_SET(HW_STRAP1, 23));
451 SIG_EXPR_LIST_DECL_SINGLE(WDTRST2, WDTRST2, SIG_DESC_SET(SCU84, 5));
452 MS_PIN_DECL(Y21, GPIOG5, USBCKI, WDTRST2);
454 FUNC_GROUP_DECL(USBCKI, Y21);
455 FUNC_GROUP_DECL(WDTRST2, Y21);
458 SSSF_PIN_DECL(AA22, GPIOG6, FLBUSY, SIG_DESC_SET(SCU84, 6));
461 SSSF_PIN_DECL(U18, GPIOG7, FLWP, SIG_DESC_SET(SCU84, 7));
463 #define UART6_DESC SIG_DESC_SET(SCU90, 7)
464 #define ROM16_DESC SIG_DESC_SET(SCU90, 6)
465 #define FLASH_WIDE SIG_DESC_SET(HW_STRAP1, 4)
466 #define BOOT_SRC_NOR { ASPEED_IP_SCU, HW_STRAP1, GENMASK(1, 0), 0, 0 }
469 SIG_EXPR_DECL(ROMD8, ROM16, ROM16_DESC);
470 SIG_EXPR_DECL(ROMD8, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
471 SIG_EXPR_LIST_DECL_DUAL(ROMD8, ROM16, ROM16S);
472 SIG_EXPR_LIST_DECL_SINGLE(NCTS6, NCTS6, UART6_DESC);
473 MS_PIN_DECL(A8, GPIOH0, ROMD8, NCTS6);
476 SIG_EXPR_DECL(ROMD9, ROM16, ROM16_DESC);
477 SIG_EXPR_DECL(ROMD9, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
478 SIG_EXPR_LIST_DECL_DUAL(ROMD9, ROM16, ROM16S);
479 SIG_EXPR_LIST_DECL_SINGLE(NDCD6, NDCD6, UART6_DESC);
480 MS_PIN_DECL(C7, GPIOH1, ROMD9, NDCD6);
483 SIG_EXPR_DECL(ROMD10, ROM16, ROM16_DESC);
484 SIG_EXPR_DECL(ROMD10, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
485 SIG_EXPR_LIST_DECL_DUAL(ROMD10, ROM16, ROM16S);
486 SIG_EXPR_LIST_DECL_SINGLE(NDSR6, NDSR6, UART6_DESC);
487 MS_PIN_DECL(B7, GPIOH2, ROMD10, NDSR6);
490 SIG_EXPR_DECL(ROMD11, ROM16, ROM16_DESC);
491 SIG_EXPR_DECL(ROMD11, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
492 SIG_EXPR_LIST_DECL_DUAL(ROMD11, ROM16, ROM16S);
493 SIG_EXPR_LIST_DECL_SINGLE(NRI6, NRI6, UART6_DESC);
494 MS_PIN_DECL(A7, GPIOH3, ROMD11, NRI6);
497 SIG_EXPR_DECL(ROMD12, ROM16, ROM16_DESC);
498 SIG_EXPR_DECL(ROMD12, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
499 SIG_EXPR_LIST_DECL_DUAL(ROMD12, ROM16, ROM16S);
500 SIG_EXPR_LIST_DECL_SINGLE(NDTR6, NDTR6, UART6_DESC);
501 MS_PIN_DECL(D7, GPIOH4, ROMD12, NDTR6);
504 SIG_EXPR_DECL(ROMD13, ROM16, ROM16_DESC);
505 SIG_EXPR_DECL(ROMD13, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
506 SIG_EXPR_LIST_DECL_DUAL(ROMD13, ROM16, ROM16S);
507 SIG_EXPR_LIST_DECL_SINGLE(NRTS6, NRTS6, UART6_DESC);
508 MS_PIN_DECL(B6, GPIOH5, ROMD13, NRTS6);
511 SIG_EXPR_DECL(ROMD14, ROM16, ROM16_DESC);
512 SIG_EXPR_DECL(ROMD14, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
513 SIG_EXPR_LIST_DECL_DUAL(ROMD14, ROM16, ROM16S);
514 SIG_EXPR_LIST_DECL_SINGLE(TXD6, TXD6, UART6_DESC);
515 MS_PIN_DECL(A6, GPIOH6, ROMD14, TXD6);
518 SIG_EXPR_DECL(ROMD15, ROM16, ROM16_DESC);
519 SIG_EXPR_DECL(ROMD15, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
520 SIG_EXPR_LIST_DECL_DUAL(ROMD15, ROM16, ROM16S);
521 SIG_EXPR_LIST_DECL_SINGLE(RXD6, RXD6, UART6_DESC);
522 MS_PIN_DECL(E7, GPIOH7, ROMD15, RXD6);
524 FUNC_GROUP_DECL(UART6, A8, C7, B7, A7, D7, B6, A6, E7);
527 { ASPEED_IP_SCU, HW_STRAP1, GENMASK(13, 12), 1, 0 }
528 #define SPI1DEBUG_DESC \
529 { ASPEED_IP_SCU, HW_STRAP1, GENMASK(13, 12), 2, 0 }
530 #define SPI1PASSTHRU_DESC \
531 { ASPEED_IP_SCU, HW_STRAP1, GENMASK(13, 12), 3, 0 }
534 SIG_EXPR_DECL(SYSCS, SPI1DEBUG, SPI1DEBUG_DESC);
535 SIG_EXPR_DECL(SYSCS, SPI1PASSTHRU, SPI1PASSTHRU_DESC);
536 SIG_EXPR_LIST_DECL_DUAL(SYSCS, SPI1DEBUG, SPI1PASSTHRU);
537 SS_PIN_DECL(C22, GPIOI0, SYSCS);
540 SIG_EXPR_DECL(SYSCK, SPI1DEBUG, SPI1DEBUG_DESC);
541 SIG_EXPR_DECL(SYSCK, SPI1PASSTHRU, SPI1PASSTHRU_DESC);
542 SIG_EXPR_LIST_DECL_DUAL(SYSCK, SPI1DEBUG, SPI1PASSTHRU);
543 SS_PIN_DECL(G18, GPIOI1, SYSCK);
546 SIG_EXPR_DECL(SYSDO, SPI1DEBUG, SPI1DEBUG_DESC);
547 SIG_EXPR_DECL(SYSDO, SPI1PASSTHRU, SPI1PASSTHRU_DESC);
548 SIG_EXPR_LIST_DECL_DUAL(SYSDO, SPI1DEBUG, SPI1PASSTHRU);
549 SS_PIN_DECL(D19, GPIOI2, SYSDO);
552 SIG_EXPR_DECL(SYSDI, SPI1DEBUG, SPI1DEBUG_DESC);
553 SIG_EXPR_DECL(SYSDI, SPI1PASSTHRU, SPI1PASSTHRU_DESC);
554 SIG_EXPR_LIST_DECL_DUAL(SYSDI, SPI1DEBUG, SPI1PASSTHRU);
555 SS_PIN_DECL(C20, GPIOI3, SYSDI);
557 #define VB_DESC SIG_DESC_SET(HW_STRAP1, 5)
560 SIG_EXPR_DECL(SPI1CS0, SPI1, SPI1_DESC);
561 SIG_EXPR_DECL(SPI1CS0, SPI1DEBUG, SPI1DEBUG_DESC);
562 SIG_EXPR_DECL(SPI1CS0, SPI1PASSTHRU, SPI1PASSTHRU_DESC);
563 SIG_EXPR_LIST_DECL(SPI1CS0, SIG_EXPR_PTR(SPI1CS0, SPI1),
564 SIG_EXPR_PTR(SPI1CS0, SPI1DEBUG),
565 SIG_EXPR_PTR(SPI1CS0, SPI1PASSTHRU));
566 SIG_EXPR_LIST_DECL_SINGLE(VBCS, VGABIOS_ROM, VB_DESC);
567 MS_PIN_DECL(B22, GPIOI4, SPI1CS0, VBCS);
570 SIG_EXPR_DECL(SPI1CK, SPI1, SPI1_DESC);
571 SIG_EXPR_DECL(SPI1CK, SPI1DEBUG, SPI1DEBUG_DESC);
572 SIG_EXPR_DECL(SPI1CK, SPI1PASSTHRU, SPI1PASSTHRU_DESC);
573 SIG_EXPR_LIST_DECL(SPI1CK, SIG_EXPR_PTR(SPI1CK, SPI1),
574 SIG_EXPR_PTR(SPI1CK, SPI1DEBUG),
575 SIG_EXPR_PTR(SPI1CK, SPI1PASSTHRU));
576 SIG_EXPR_LIST_DECL_SINGLE(VBCK, VGABIOS_ROM, VB_DESC);
577 MS_PIN_DECL(G19, GPIOI5, SPI1CK, VBCK);
580 SIG_EXPR_DECL(SPI1DO, SPI1, SPI1_DESC);
581 SIG_EXPR_DECL(SPI1DO, SPI1DEBUG, SPI1DEBUG_DESC);
582 SIG_EXPR_DECL(SPI1DO, SPI1PASSTHRU, SPI1PASSTHRU_DESC);
583 SIG_EXPR_LIST_DECL(SPI1DO, SIG_EXPR_PTR(SPI1DO, SPI1),
584 SIG_EXPR_PTR(SPI1DO, SPI1DEBUG),
585 SIG_EXPR_PTR(SPI1DO, SPI1PASSTHRU));
586 SIG_EXPR_LIST_DECL_SINGLE(VBDO, VGABIOS_ROM, VB_DESC);
587 MS_PIN_DECL(C18, GPIOI6, SPI1DO, VBDO);
590 SIG_EXPR_DECL(SPI1DI, SPI1, SPI1_DESC);
591 SIG_EXPR_DECL(SPI1DI, SPI1DEBUG, SPI1DEBUG_DESC);
592 SIG_EXPR_DECL(SPI1DI, SPI1PASSTHRU, SPI1PASSTHRU_DESC);
593 SIG_EXPR_LIST_DECL(SPI1DI, SIG_EXPR_PTR(SPI1DI, SPI1),
594 SIG_EXPR_PTR(SPI1DI, SPI1DEBUG),
595 SIG_EXPR_PTR(SPI1DI, SPI1PASSTHRU));
596 SIG_EXPR_LIST_DECL_SINGLE(VBDI, VGABIOS_ROM, VB_DESC);
597 MS_PIN_DECL(E20, GPIOI7, SPI1DI, VBDI);
599 FUNC_GROUP_DECL(SPI1, B22, G19, C18, E20);
600 FUNC_GROUP_DECL(SPI1DEBUG, C22, G18, D19, C20, B22, G19, C18, E20);
601 FUNC_GROUP_DECL(SPI1PASSTHRU, C22, G18, D19, C20, B22, G19, C18, E20);
602 FUNC_GROUP_DECL(VGABIOS_ROM, B22, G19, C18, E20);
605 SSSF_PIN_DECL(J5, GPIOJ0, SGPMCK, SIG_DESC_SET(SCU84, 8));
608 SSSF_PIN_DECL(J4, GPIOJ1, SGPMLD, SIG_DESC_SET(SCU84, 9));
611 SSSF_PIN_DECL(K5, GPIOJ2, SGPMO, SIG_DESC_SET(SCU84, 10));
614 SSSF_PIN_DECL(J3, GPIOJ3, SGPMI, SIG_DESC_SET(SCU84, 11));
617 SSSF_PIN_DECL(T4, GPIOJ4, VGAHS, SIG_DESC_SET(SCU84, 12));
620 SSSF_PIN_DECL(U2, GPIOJ5, VGAVS, SIG_DESC_SET(SCU84, 13));
623 SSSF_PIN_DECL(T2, GPIOJ6, DDCCLK, SIG_DESC_SET(SCU84, 14));
626 SSSF_PIN_DECL(T1, GPIOJ7, DDCDAT, SIG_DESC_SET(SCU84, 15));
628 #define I2C5_DESC SIG_DESC_SET(SCU90, 18)
631 SIG_EXPR_LIST_DECL_SINGLE(SCL5, I2C5, I2C5_DESC);
632 SS_PIN_DECL(E3, GPIOK0, SCL5);
635 SIG_EXPR_LIST_DECL_SINGLE(SDA5, I2C5, I2C5_DESC);
636 SS_PIN_DECL(D2, GPIOK1, SDA5);
638 FUNC_GROUP_DECL(I2C5, E3, D2);
640 #define I2C6_DESC SIG_DESC_SET(SCU90, 19)
643 SIG_EXPR_LIST_DECL_SINGLE(SCL6, I2C6, I2C6_DESC);
644 SS_PIN_DECL(C1, GPIOK2, SCL6);
647 SIG_EXPR_LIST_DECL_SINGLE(SDA6, I2C6, I2C6_DESC);
648 SS_PIN_DECL(F4, GPIOK3, SDA6);
650 FUNC_GROUP_DECL(I2C6, C1, F4);
652 #define I2C7_DESC SIG_DESC_SET(SCU90, 20)
655 SIG_EXPR_LIST_DECL_SINGLE(SCL7, I2C7, I2C7_DESC);
656 SS_PIN_DECL(E2, GPIOK4, SCL7);
659 SIG_EXPR_LIST_DECL_SINGLE(SDA7, I2C7, I2C7_DESC);
660 SS_PIN_DECL(D1, GPIOK5, SDA7);
662 FUNC_GROUP_DECL(I2C7, E2, D1);
664 #define I2C8_DESC SIG_DESC_SET(SCU90, 21)
667 SIG_EXPR_LIST_DECL_SINGLE(SCL8, I2C8, I2C8_DESC);
668 SS_PIN_DECL(G5, GPIOK6, SCL8);
671 SIG_EXPR_LIST_DECL_SINGLE(SDA8, I2C8, I2C8_DESC);
672 SS_PIN_DECL(F3, GPIOK7, SDA8);
674 FUNC_GROUP_DECL(I2C8, G5, F3);
677 SSSF_PIN_DECL(U1, GPIOL0, NCTS1, SIG_DESC_SET(SCU84, 16));
679 #define VPI18_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 1, 0 }
680 #define VPI24_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 2, 0 }
681 #define VPI30_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 3, 0 }
684 #define T5_DESC SIG_DESC_SET(SCU84, 17)
685 SIG_EXPR_DECL(VPIDE, VPI18, VPI18_DESC, T5_DESC);
686 SIG_EXPR_DECL(VPIDE, VPI24, VPI24_DESC, T5_DESC);
687 SIG_EXPR_DECL(VPIDE, VPI30, VPI30_DESC, T5_DESC);
688 SIG_EXPR_LIST_DECL(VPIDE, SIG_EXPR_PTR(VPIDE, VPI18),
689 SIG_EXPR_PTR(VPIDE, VPI24),
690 SIG_EXPR_PTR(VPIDE, VPI30));
691 SIG_EXPR_LIST_DECL_SINGLE(NDCD1, NDCD1, T5_DESC);
692 MS_PIN_DECL(T5, GPIOL1, VPIDE, NDCD1);
693 FUNC_GROUP_DECL(NDCD1, T5);
696 #define U3_DESC SIG_DESC_SET(SCU84, 18)
697 SIG_EXPR_DECL(VPIODD, VPI18, VPI18_DESC, U3_DESC);
698 SIG_EXPR_DECL(VPIODD, VPI24, VPI24_DESC, U3_DESC);
699 SIG_EXPR_DECL(VPIODD, VPI30, VPI30_DESC, U3_DESC);
700 SIG_EXPR_LIST_DECL(VPIODD, SIG_EXPR_PTR(VPIODD, VPI18),
701 SIG_EXPR_PTR(VPIODD, VPI24),
702 SIG_EXPR_PTR(VPIODD, VPI30));
703 SIG_EXPR_LIST_DECL_SINGLE(NDSR1, NDSR1, U3_DESC);
704 MS_PIN_DECL(U3, GPIOL2, VPIODD, NDSR1);
705 FUNC_GROUP_DECL(NDSR1, U3);
708 #define V1_DESC SIG_DESC_SET(SCU84, 19)
709 SIG_EXPR_DECL(VPIHS, VPI18, VPI18_DESC, V1_DESC);
710 SIG_EXPR_DECL(VPIHS, VPI24, VPI24_DESC, V1_DESC);
711 SIG_EXPR_DECL(VPIHS, VPI30, VPI30_DESC, V1_DESC);
712 SIG_EXPR_LIST_DECL(VPIHS, SIG_EXPR_PTR(VPIHS, VPI18),
713 SIG_EXPR_PTR(VPIHS, VPI24),
714 SIG_EXPR_PTR(VPIHS, VPI30));
715 SIG_EXPR_LIST_DECL_SINGLE(NRI1, NRI1, V1_DESC);
716 MS_PIN_DECL(V1, GPIOL3, VPIHS, NRI1);
717 FUNC_GROUP_DECL(NRI1, V1);
720 #define U4_DESC SIG_DESC_SET(SCU84, 20)
721 SIG_EXPR_DECL(VPIVS, VPI18, VPI18_DESC, U4_DESC);
722 SIG_EXPR_DECL(VPIVS, VPI24, VPI24_DESC, U4_DESC);
723 SIG_EXPR_DECL(VPIVS, VPI30, VPI30_DESC, U4_DESC);
724 SIG_EXPR_LIST_DECL(VPIVS, SIG_EXPR_PTR(VPIVS, VPI18),
725 SIG_EXPR_PTR(VPIVS, VPI24),
726 SIG_EXPR_PTR(VPIVS, VPI30));
727 SIG_EXPR_LIST_DECL_SINGLE(NDTR1, NDTR1, U4_DESC);
728 MS_PIN_DECL(U4, GPIOL4, VPIVS, NDTR1);
729 FUNC_GROUP_DECL(NDTR1, U4);
732 #define V2_DESC SIG_DESC_SET(SCU84, 21)
733 SIG_EXPR_DECL(VPICLK, VPI18, VPI18_DESC, V2_DESC);
734 SIG_EXPR_DECL(VPICLK, VPI24, VPI24_DESC, V2_DESC);
735 SIG_EXPR_DECL(VPICLK, VPI30, VPI30_DESC, V2_DESC);
736 SIG_EXPR_LIST_DECL(VPICLK, SIG_EXPR_PTR(VPICLK, VPI18),
737 SIG_EXPR_PTR(VPICLK, VPI24),
738 SIG_EXPR_PTR(VPICLK, VPI30));
739 SIG_EXPR_LIST_DECL_SINGLE(NRTS1, NRTS1, V2_DESC);
740 MS_PIN_DECL(V2, GPIOL5, VPICLK, NRTS1);
741 FUNC_GROUP_DECL(NRTS1, V2);
744 #define W1_DESC SIG_DESC_SET(SCU84, 22)
745 SIG_EXPR_LIST_DECL_SINGLE(VPIB0, VPI30, VPI30_DESC, W1_DESC);
746 SIG_EXPR_LIST_DECL_SINGLE(TXD1, TXD1, W1_DESC);
747 MS_PIN_DECL(W1, GPIOL6, VPIB0, TXD1);
748 FUNC_GROUP_DECL(TXD1, W1);
751 #define U5_DESC SIG_DESC_SET(SCU84, 23)
752 SIG_EXPR_LIST_DECL_SINGLE(VPIB1, VPI30, VPI30_DESC, U5_DESC);
753 SIG_EXPR_LIST_DECL_SINGLE(RXD1, RXD1, U5_DESC);
754 MS_PIN_DECL(U5, GPIOL7, VPIB1, RXD1);
755 FUNC_GROUP_DECL(RXD1, U5);
758 #define V3_DESC SIG_DESC_SET(SCU84, 24)
759 SIG_EXPR_DECL(VPIOB2, VPI18, VPI18_DESC, V3_DESC);
760 SIG_EXPR_DECL(VPIOB2, VPI24, VPI24_DESC, V3_DESC);
761 SIG_EXPR_DECL(VPIOB2, VPI30, VPI30_DESC, V3_DESC);
762 SIG_EXPR_LIST_DECL(VPIOB2, SIG_EXPR_PTR(VPIOB2, VPI18),
763 SIG_EXPR_PTR(VPIOB2, VPI24),
764 SIG_EXPR_PTR(VPIOB2, VPI30));
765 SIG_EXPR_LIST_DECL_SINGLE(NCTS2, NCTS2, V3_DESC);
766 MS_PIN_DECL(V3, GPIOM0, VPIOB2, NCTS2);
767 FUNC_GROUP_DECL(NCTS2, V3);
770 #define W2_DESC SIG_DESC_SET(SCU84, 25)
771 SIG_EXPR_DECL(VPIOB3, VPI18, VPI18_DESC, W2_DESC);
772 SIG_EXPR_DECL(VPIOB3, VPI24, VPI24_DESC, W2_DESC);
773 SIG_EXPR_DECL(VPIOB3, VPI30, VPI30_DESC, W2_DESC);
774 SIG_EXPR_LIST_DECL(VPIOB3, SIG_EXPR_PTR(VPIOB3, VPI18),
775 SIG_EXPR_PTR(VPIOB3, VPI24),
776 SIG_EXPR_PTR(VPIOB3, VPI30));
777 SIG_EXPR_LIST_DECL_SINGLE(NDCD2, NDCD2, W2_DESC);
778 MS_PIN_DECL(W2, GPIOM1, VPIOB3, NDCD2);
779 FUNC_GROUP_DECL(NDCD2, W2);
782 #define Y1_DESC SIG_DESC_SET(SCU84, 26)
783 SIG_EXPR_DECL(VPIOB4, VPI18, VPI18_DESC, Y1_DESC);
784 SIG_EXPR_DECL(VPIOB4, VPI24, VPI24_DESC, Y1_DESC);
785 SIG_EXPR_DECL(VPIOB4, VPI30, VPI30_DESC, Y1_DESC);
786 SIG_EXPR_LIST_DECL(VPIOB4, SIG_EXPR_PTR(VPIOB4, VPI18),
787 SIG_EXPR_PTR(VPIOB4, VPI24),
788 SIG_EXPR_PTR(VPIOB4, VPI30));
789 SIG_EXPR_LIST_DECL_SINGLE(NDSR2, NDSR2, Y1_DESC);
790 MS_PIN_DECL(Y1, GPIOM2, VPIOB4, NDSR2);
791 FUNC_GROUP_DECL(NDSR2, Y1);
794 #define V4_DESC SIG_DESC_SET(SCU84, 27)
795 SIG_EXPR_DECL(VPIOB5, VPI18, VPI18_DESC, V4_DESC);
796 SIG_EXPR_DECL(VPIOB5, VPI24, VPI24_DESC, V4_DESC);
797 SIG_EXPR_DECL(VPIOB5, VPI30, VPI30_DESC, V4_DESC);
798 SIG_EXPR_LIST_DECL(VPIOB5, SIG_EXPR_PTR(VPIOB5, VPI18),
799 SIG_EXPR_PTR(VPIOB5, VPI24),
800 SIG_EXPR_PTR(VPIOB5, VPI30));
801 SIG_EXPR_LIST_DECL_SINGLE(NRI2, NRI2, V4_DESC);
802 MS_PIN_DECL(V4, GPIOM3, VPIOB5, NRI2);
803 FUNC_GROUP_DECL(NRI2, V4);
806 #define W3_DESC SIG_DESC_SET(SCU84, 28)
807 SIG_EXPR_DECL(VPIOB6, VPI18, VPI18_DESC, W3_DESC);
808 SIG_EXPR_DECL(VPIOB6, VPI24, VPI24_DESC, W3_DESC);
809 SIG_EXPR_DECL(VPIOB6, VPI30, VPI30_DESC, W3_DESC);
810 SIG_EXPR_LIST_DECL(VPIOB6, SIG_EXPR_PTR(VPIOB6, VPI18),
811 SIG_EXPR_PTR(VPIOB6, VPI24),
812 SIG_EXPR_PTR(VPIOB6, VPI30));
813 SIG_EXPR_LIST_DECL_SINGLE(NDTR2, NDTR2, W3_DESC);
814 MS_PIN_DECL(W3, GPIOM4, VPIOB6, NDTR2);
815 FUNC_GROUP_DECL(NDTR2, W3);
818 #define Y2_DESC SIG_DESC_SET(SCU84, 29)
819 SIG_EXPR_DECL(VPIOB7, VPI18, VPI18_DESC, Y2_DESC);
820 SIG_EXPR_DECL(VPIOB7, VPI24, VPI24_DESC, Y2_DESC);
821 SIG_EXPR_DECL(VPIOB7, VPI30, VPI30_DESC, Y2_DESC);
822 SIG_EXPR_LIST_DECL(VPIOB7, SIG_EXPR_PTR(VPIOB7, VPI18),
823 SIG_EXPR_PTR(VPIOB7, VPI24),
824 SIG_EXPR_PTR(VPIOB7, VPI30));
825 SIG_EXPR_LIST_DECL_SINGLE(NRTS2, NRTS2, Y2_DESC);
826 MS_PIN_DECL(Y2, GPIOM5, VPIOB7, NRTS2);
827 FUNC_GROUP_DECL(NRTS2, Y2);
830 #define AA1_DESC SIG_DESC_SET(SCU84, 30)
831 SIG_EXPR_DECL(VPIOB8, VPI18, VPI18_DESC, AA1_DESC);
832 SIG_EXPR_DECL(VPIOB8, VPI24, VPI24_DESC, AA1_DESC);
833 SIG_EXPR_DECL(VPIOB8, VPI30, VPI30_DESC, AA1_DESC);
834 SIG_EXPR_LIST_DECL(VPIOB8, SIG_EXPR_PTR(VPIOB8, VPI18),
835 SIG_EXPR_PTR(VPIOB8, VPI24),
836 SIG_EXPR_PTR(VPIOB8, VPI30));
837 SIG_EXPR_LIST_DECL_SINGLE(TXD2, TXD2, AA1_DESC);
838 MS_PIN_DECL(AA1, GPIOM6, VPIOB8, TXD2);
839 FUNC_GROUP_DECL(TXD2, AA1);
842 #define V5_DESC SIG_DESC_SET(SCU84, 31)
843 SIG_EXPR_DECL(VPIOB9, VPI18, VPI18_DESC, V5_DESC);
844 SIG_EXPR_DECL(VPIOB9, VPI24, VPI24_DESC, V5_DESC);
845 SIG_EXPR_DECL(VPIOB9, VPI30, VPI30_DESC, V5_DESC);
846 SIG_EXPR_LIST_DECL(VPIOB9, SIG_EXPR_PTR(VPIOB9, VPI18),
847 SIG_EXPR_PTR(VPIOB9, VPI24),
848 SIG_EXPR_PTR(VPIOB9, VPI30));
849 SIG_EXPR_LIST_DECL_SINGLE(RXD2, RXD2, V5_DESC);
850 MS_PIN_DECL(V5, GPIOM7, VPIOB9, RXD2);
851 FUNC_GROUP_DECL(RXD2, V5);
854 #define W4_DESC SIG_DESC_SET(SCU88, 0)
855 SIG_EXPR_LIST_DECL_SINGLE(VPIG0, VPI30, VPI30_DESC, W4_DESC);
856 SIG_EXPR_LIST_DECL_SINGLE(PWM0, PWM0, W4_DESC);
857 MS_PIN_DECL(W4, GPION0, VPIG0, PWM0);
858 FUNC_GROUP_DECL(PWM0, W4);
861 #define Y3_DESC SIG_DESC_SET(SCU88, 1)
862 SIG_EXPR_LIST_DECL_SINGLE(VPIG1, VPI30, VPI30_DESC, Y3_DESC);
863 SIG_EXPR_LIST_DECL_SINGLE(PWM1, PWM1, Y3_DESC);
864 MS_PIN_DECL(Y3, GPION1, VPIG1, PWM1);
865 FUNC_GROUP_DECL(PWM1, Y3);
868 #define AA2_DESC SIG_DESC_SET(SCU88, 2)
869 SIG_EXPR_DECL(VPIG2, VPI18, VPI18_DESC, AA2_DESC);
870 SIG_EXPR_DECL(VPIG2, VPI24, VPI24_DESC, AA2_DESC);
871 SIG_EXPR_DECL(VPIG2, VPI30, VPI30_DESC, AA2_DESC);
872 SIG_EXPR_LIST_DECL(VPIG2, SIG_EXPR_PTR(VPIG2, VPI18),
873 SIG_EXPR_PTR(VPIG2, VPI24),
874 SIG_EXPR_PTR(VPIG2, VPI30));
875 SIG_EXPR_LIST_DECL_SINGLE(PWM2, PWM2, AA2_DESC);
876 MS_PIN_DECL(AA2, GPION2, VPIG2, PWM2);
877 FUNC_GROUP_DECL(PWM2, AA2);
880 #define AB1_DESC SIG_DESC_SET(SCU88, 3)
881 SIG_EXPR_DECL(VPIG3, VPI18, VPI18_DESC, AB1_DESC);
882 SIG_EXPR_DECL(VPIG3, VPI24, VPI24_DESC, AB1_DESC);
883 SIG_EXPR_DECL(VPIG3, VPI30, VPI30_DESC, AB1_DESC);
884 SIG_EXPR_LIST_DECL(VPIG3, SIG_EXPR_PTR(VPIG3, VPI18),
885 SIG_EXPR_PTR(VPIG3, VPI24),
886 SIG_EXPR_PTR(VPIG3, VPI30));
887 SIG_EXPR_LIST_DECL_SINGLE(PWM3, PWM3, AB1_DESC);
888 MS_PIN_DECL(AB1, GPION3, VPIG3, PWM3);
889 FUNC_GROUP_DECL(PWM3, AB1);
892 #define W5_DESC SIG_DESC_SET(SCU88, 4)
893 SIG_EXPR_DECL(VPIG4, VPI18, VPI18_DESC, W5_DESC);
894 SIG_EXPR_DECL(VPIG4, VPI24, VPI24_DESC, W5_DESC);
895 SIG_EXPR_DECL(VPIG4, VPI30, VPI30_DESC, W5_DESC);
896 SIG_EXPR_LIST_DECL(VPIG4, SIG_EXPR_PTR(VPIG4, VPI18),
897 SIG_EXPR_PTR(VPIG4, VPI24),
898 SIG_EXPR_PTR(VPIG4, VPI30));
899 SIG_EXPR_LIST_DECL_SINGLE(PWM4, PWM4, W5_DESC);
900 MS_PIN_DECL(W5, GPION4, VPIG4, PWM4);
901 FUNC_GROUP_DECL(PWM4, W5);
904 #define Y4_DESC SIG_DESC_SET(SCU88, 5)
905 SIG_EXPR_DECL(VPIG5, VPI18, VPI18_DESC, Y4_DESC);
906 SIG_EXPR_DECL(VPIG5, VPI24, VPI24_DESC, Y4_DESC);
907 SIG_EXPR_DECL(VPIG5, VPI30, VPI30_DESC, Y4_DESC);
908 SIG_EXPR_LIST_DECL(VPIG5, SIG_EXPR_PTR(VPIG5, VPI18),
909 SIG_EXPR_PTR(VPIG5, VPI24),
910 SIG_EXPR_PTR(VPIG5, VPI30));
911 SIG_EXPR_LIST_DECL_SINGLE(PWM5, PWM5, Y4_DESC);
912 MS_PIN_DECL(Y4, GPION5, VPIG5, PWM5);
913 FUNC_GROUP_DECL(PWM5, Y4);
916 #define AA3_DESC SIG_DESC_SET(SCU88, 6)
917 SIG_EXPR_LIST_DECL_SINGLE(VPIG6, VPI30, VPI30_DESC, AA3_DESC);
918 SIG_EXPR_LIST_DECL_SINGLE(PWM6, PWM6, AA3_DESC);
919 MS_PIN_DECL(AA3, GPION6, VPIG6, PWM6);
920 FUNC_GROUP_DECL(PWM6, AA3);
923 #define AB2_DESC SIG_DESC_SET(SCU88, 7)
924 SIG_EXPR_LIST_DECL_SINGLE(VPIG7, VPI30, VPI30_DESC, AB2_DESC);
925 SIG_EXPR_LIST_DECL_SINGLE(PWM7, PWM7, AB2_DESC);
926 MS_PIN_DECL(AB2, GPION7, VPIG7, PWM7);
927 FUNC_GROUP_DECL(PWM7, AB2);
930 SIG_EXPR_LIST_DECL_SINGLE(VPIG8, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 8));
931 SS_PIN_DECL(V6, GPIOO0, VPIG8);
934 SIG_EXPR_LIST_DECL_SINGLE(VPIG9, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 9));
935 SS_PIN_DECL(Y5, GPIOO1, VPIG9);
938 SIG_EXPR_LIST_DECL_SINGLE(VPIR0, VPI30, VPI30_DESC, SIG_DESC_SET(SCU88, 10));
939 SS_PIN_DECL(AA4, GPIOO2, VPIR0);
942 SIG_EXPR_LIST_DECL_SINGLE(VPIR1, VPI30, VPI30_DESC, SIG_DESC_SET(SCU88, 11));
943 SS_PIN_DECL(AB3, GPIOO3, VPIR1);
946 SIG_EXPR_LIST_DECL_SINGLE(VPIR2, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 12));
947 SS_PIN_DECL(W6, GPIOO4, VPIR2);
950 SIG_EXPR_LIST_DECL_SINGLE(VPIR3, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 13));
951 SS_PIN_DECL(AA5, GPIOO5, VPIR3);
954 SIG_EXPR_LIST_DECL_SINGLE(VPIR4, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 14));
955 SS_PIN_DECL(AB4, GPIOO6, VPIR4);
958 SIG_EXPR_LIST_DECL_SINGLE(VPIR5, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 15));
959 SS_PIN_DECL(V7, GPIOO7, VPIR5);
962 SIG_EXPR_LIST_DECL_SINGLE(VPIR6, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 16));
963 SS_PIN_DECL(Y6, GPIOP0, VPIR6);
966 SIG_EXPR_LIST_DECL_SINGLE(VPIR7, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 17));
967 SS_PIN_DECL(AB5, GPIOP1, VPIR7);
970 SIG_EXPR_LIST_DECL_SINGLE(VPIR8, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 18));
971 SS_PIN_DECL(W7, GPIOP2, VPIR8);
974 SIG_EXPR_LIST_DECL_SINGLE(VPIR9, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 19));
975 SS_PIN_DECL(AA6, GPIOP3, VPIR9);
977 FUNC_GROUP_DECL(VPI18, T5, U3, V1, U4, V2, V3, W2, Y1, V4, W3, Y2, AA1, V5,
978 AA22, W5, Y4, AA3, AB2);
979 FUNC_GROUP_DECL(VPI24, T5, U3, V1, U4, V2, V3, W2, Y1, V4, W3, Y2, AA1, V5,
980 AA22, W5, Y4, AA3, AB2, V6, Y5, W6, AA5, AB4, V7, Y6, AB5, W7,
982 FUNC_GROUP_DECL(VPI30, T5, U3, V1, U4, V2, W1, U5, V3, W2, Y1, V4, W3, Y2, AA1,
983 V5, W4, Y3, AA22, W5, Y4, AA3, AB2, AA4, AB3);
986 SIG_EXPR_LIST_DECL_SINGLE(GPIOP4, GPIOP4);
987 MS_PIN_DECL_(AB6, SIG_EXPR_LIST_PTR(GPIOP4));
990 SIG_EXPR_LIST_DECL_SINGLE(GPIOP5, GPIOP5);
991 MS_PIN_DECL_(Y7, SIG_EXPR_LIST_PTR(GPIOP5));
994 SSSF_PIN_DECL(AA7, GPIOP6, BMCINT, SIG_DESC_SET(SCU88, 22));
997 SSSF_PIN_DECL(AB7, GPIOP7, FLACK, SIG_DESC_SET(SCU88, 23));
999 #define I2C3_DESC SIG_DESC_SET(SCU90, 16)
1002 SIG_EXPR_LIST_DECL_SINGLE(SCL3, I2C3, I2C3_DESC);
1003 SS_PIN_DECL(D3, GPIOQ0, SCL3);
1006 SIG_EXPR_LIST_DECL_SINGLE(SDA3, I2C3, I2C3_DESC);
1007 SS_PIN_DECL(C2, GPIOQ1, SDA3);
1009 FUNC_GROUP_DECL(I2C3, D3, C2);
1011 #define I2C4_DESC SIG_DESC_SET(SCU90, 17)
1014 SIG_EXPR_LIST_DECL_SINGLE(SCL4, I2C4, I2C4_DESC);
1015 SS_PIN_DECL(B1, GPIOQ2, SCL4);
1018 SIG_EXPR_LIST_DECL_SINGLE(SDA4, I2C4, I2C4_DESC);
1019 SS_PIN_DECL(F5, GPIOQ3, SDA4);
1021 FUNC_GROUP_DECL(I2C4, B1, F5);
1023 #define I2C14_DESC SIG_DESC_SET(SCU90, 27)
1026 SIG_EXPR_LIST_DECL_SINGLE(SCL14, I2C14, I2C14_DESC);
1027 SS_PIN_DECL(H4, GPIOQ4, SCL14);
1030 SIG_EXPR_LIST_DECL_SINGLE(SDA14, I2C14, I2C14_DESC);
1031 SS_PIN_DECL(H3, GPIOQ5, SDA14);
1033 FUNC_GROUP_DECL(I2C14, H4, H3);
1036 * There are several opportunities to document USB port 4 in the datasheet, but
1037 * it is only mentioned in one location. Particularly, the Multi-function Pins
1038 * Mapping and Control table in the datasheet elides the signal names,
1039 * suggesting that port 4 may not actually be functional. As such we define the
1040 * signal names and control bit, but don't export the capability's function or
1043 #define USB11H3_DESC SIG_DESC_SET(SCU90, 28)
1046 SIG_EXPR_LIST_DECL_SINGLE(USB11HDP3, USB11H3, USB11H3_DESC);
1047 SS_PIN_DECL(H2, GPIOQ6, USB11HDP3);
1050 SIG_EXPR_LIST_DECL_SINGLE(USB11HDN3, USB11H3, USB11H3_DESC);
1051 SS_PIN_DECL(H1, GPIOQ7, USB11HDN3);
1054 SSSF_PIN_DECL(V20, GPIOR0, ROMCS1, SIG_DESC_SET(SCU88, 24));
1057 SSSF_PIN_DECL(W21, GPIOR1, ROMCS2, SIG_DESC_SET(SCU88, 25));
1060 SSSF_PIN_DECL(Y22, GPIOR2, ROMCS3, SIG_DESC_SET(SCU88, 26));
1063 SSSF_PIN_DECL(U19, GPIOR3, ROMCS4, SIG_DESC_SET(SCU88, 27));
1065 #define VPOOFF0_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 }
1066 #define VPO12_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 1, 0 }
1067 #define VPO24_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 2, 0 }
1068 #define VPOOFF1_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 3, 0 }
1069 #define VPO_OFF_12 { ASPEED_IP_SCU, SCU94, 0x2, 0, 0 }
1070 #define VPO_24_OFF SIG_DESC_SET(SCU94, 1)
1073 #define V21_DESC SIG_DESC_SET(SCU88, 28)
1074 SIG_EXPR_DECL(ROMA24, ROM8, V21_DESC, VPO_OFF_12);
1075 SIG_EXPR_DECL(ROMA24, ROM16, V21_DESC, VPO_OFF_12);
1076 SIG_EXPR_DECL(ROMA24, ROM16S, V21_DESC, VPO_OFF_12);
1077 SIG_EXPR_LIST_DECL(ROMA24, SIG_EXPR_PTR(ROMA24, ROM8),
1078 SIG_EXPR_PTR(ROMA24, ROM16),
1079 SIG_EXPR_PTR(ROMA24, ROM16S));
1080 SIG_EXPR_LIST_DECL_SINGLE(VPOR6, VPO24, V21_DESC, VPO_24_OFF);
1081 MS_PIN_DECL(V21, GPIOR4, ROMA24, VPOR6);
1084 #define W22_DESC SIG_DESC_SET(SCU88, 29)
1085 SIG_EXPR_DECL(ROMA25, ROM8, W22_DESC, VPO_OFF_12);
1086 SIG_EXPR_DECL(ROMA25, ROM16, W22_DESC, VPO_OFF_12);
1087 SIG_EXPR_DECL(ROMA25, ROM16S, W22_DESC, VPO_OFF_12);
1088 SIG_EXPR_LIST_DECL(ROMA25, SIG_EXPR_PTR(ROMA25, ROM8),
1089 SIG_EXPR_PTR(ROMA25, ROM16),
1090 SIG_EXPR_PTR(ROMA25, ROM16S));
1091 SIG_EXPR_LIST_DECL_SINGLE(VPOR7, VPO24, W22_DESC, VPO_24_OFF);
1092 MS_PIN_DECL(W22, GPIOR5, ROMA25, VPOR7);
1095 SIG_EXPR_LIST_DECL_SINGLE(MDC1, MDIO1, SIG_DESC_SET(SCU88, 30));
1096 SS_PIN_DECL(C6, GPIOR6, MDC1);
1099 SIG_EXPR_LIST_DECL_SINGLE(MDIO1, MDIO1, SIG_DESC_SET(SCU88, 31));
1100 SS_PIN_DECL(A5, GPIOR7, MDIO1);
1102 FUNC_GROUP_DECL(MDIO1, C6, A5);
1105 #define U21_DESC SIG_DESC_SET(SCU8C, 0)
1106 SIG_EXPR_DECL(ROMD4, ROM8, U21_DESC, VPOOFF0_DESC);
1107 SIG_EXPR_DECL(ROMD4, ROM16, U21_DESC, VPOOFF0_DESC);
1108 SIG_EXPR_DECL(ROMD4, ROM16S, U21_DESC, VPOOFF0_DESC);
1109 SIG_EXPR_LIST_DECL(ROMD4, SIG_EXPR_PTR(ROMD4, ROM8),
1110 SIG_EXPR_PTR(ROMD4, ROM16),
1111 SIG_EXPR_PTR(ROMD4, ROM16S));
1112 SIG_EXPR_DECL(VPODE, VPO12, U21_DESC, VPO12_DESC);
1113 SIG_EXPR_DECL(VPODE, VPO24, U21_DESC, VPO12_DESC);
1114 SIG_EXPR_LIST_DECL_DUAL(VPODE, VPO12, VPO24);
1115 MS_PIN_DECL(U21, GPIOS0, ROMD4, VPODE);
1118 #define T19_DESC SIG_DESC_SET(SCU8C, 1)
1119 SIG_EXPR_DECL(ROMD5, ROM8, T19_DESC, VPOOFF0_DESC);
1120 SIG_EXPR_DECL(ROMD5, ROM16, T19_DESC, VPOOFF0_DESC);
1121 SIG_EXPR_DECL(ROMD5, ROM16S, T19_DESC, VPOOFF0_DESC);
1122 SIG_EXPR_LIST_DECL(ROMD5, SIG_EXPR_PTR(ROMD5, ROM8),
1123 SIG_EXPR_PTR(ROMD5, ROM16),
1124 SIG_EXPR_PTR(ROMD5, ROM16S));
1125 SIG_EXPR_DECL(VPOHS, VPO12, T19_DESC, VPO12_DESC);
1126 SIG_EXPR_DECL(VPOHS, VPO24, T19_DESC, VPO24_DESC);
1127 SIG_EXPR_LIST_DECL_DUAL(VPOHS, VPO12, VPO24);
1128 MS_PIN_DECL(T19, GPIOS1, ROMD5, VPOHS);
1131 #define V22_DESC SIG_DESC_SET(SCU8C, 2)
1132 SIG_EXPR_DECL(ROMD6, ROM8, V22_DESC, VPOOFF0_DESC);
1133 SIG_EXPR_DECL(ROMD6, ROM16, V22_DESC, VPOOFF0_DESC);
1134 SIG_EXPR_DECL(ROMD6, ROM16S, V22_DESC, VPOOFF0_DESC);
1135 SIG_EXPR_LIST_DECL(ROMD6, SIG_EXPR_PTR(ROMD6, ROM8),
1136 SIG_EXPR_PTR(ROMD6, ROM16),
1137 SIG_EXPR_PTR(ROMD6, ROM16S));
1138 SIG_EXPR_DECL(VPOVS, VPO12, V22_DESC, VPO12_DESC);
1139 SIG_EXPR_DECL(VPOVS, VPO24, V22_DESC, VPO24_DESC);
1140 SIG_EXPR_LIST_DECL_DUAL(VPOVS, VPO12, VPO24);
1141 MS_PIN_DECL(V22, GPIOS2, ROMD6, VPOVS);
1144 #define U20_DESC SIG_DESC_SET(SCU8C, 3)
1145 SIG_EXPR_DECL(ROMD7, ROM8, U20_DESC, VPOOFF0_DESC);
1146 SIG_EXPR_DECL(ROMD7, ROM16, U20_DESC, VPOOFF0_DESC);
1147 SIG_EXPR_DECL(ROMD7, ROM16S, U20_DESC, VPOOFF0_DESC);
1148 SIG_EXPR_LIST_DECL(ROMD7, SIG_EXPR_PTR(ROMD7, ROM8),
1149 SIG_EXPR_PTR(ROMD7, ROM16),
1150 SIG_EXPR_PTR(ROMD7, ROM16S));
1151 SIG_EXPR_DECL(VPOCLK, VPO12, U20_DESC, VPO12_DESC);
1152 SIG_EXPR_DECL(VPOCLK, VPO24, U20_DESC, VPO24_DESC);
1153 SIG_EXPR_LIST_DECL_DUAL(VPOCLK, VPO12, VPO24);
1154 MS_PIN_DECL(U20, GPIOS3, ROMD7, VPOCLK);
1157 #define ROMOE_DESC SIG_DESC_SET(SCU8C, 4)
1158 SIG_EXPR_LIST_DECL_SINGLE(GPIOS4, GPIOS4);
1159 SIG_EXPR_DECL(ROMOE, ROM8, ROMOE_DESC);
1160 SIG_EXPR_DECL(ROMOE, ROM16, ROMOE_DESC);
1161 SIG_EXPR_DECL(ROMOE, ROM16S, ROMOE_DESC);
1162 SIG_EXPR_LIST_DECL(ROMOE, SIG_EXPR_PTR(ROMOE, ROM8),
1163 SIG_EXPR_PTR(ROMOE, ROM16),
1164 SIG_EXPR_PTR(ROMOE, ROM16S));
1165 MS_PIN_DECL_(R18, SIG_EXPR_LIST_PTR(ROMOE), SIG_EXPR_LIST_PTR(GPIOS4));
1168 #define ROMWE_DESC SIG_DESC_SET(SCU8C, 5)
1169 SIG_EXPR_LIST_DECL_SINGLE(GPIOS5, GPIOS5);
1170 SIG_EXPR_DECL(ROMWE, ROM8, ROMWE_DESC);
1171 SIG_EXPR_DECL(ROMWE, ROM16, ROMWE_DESC);
1172 SIG_EXPR_DECL(ROMWE, ROM16S, ROMWE_DESC);
1173 SIG_EXPR_LIST_DECL(ROMWE, SIG_EXPR_PTR(ROMWE, ROM8),
1174 SIG_EXPR_PTR(ROMWE, ROM16),
1175 SIG_EXPR_PTR(ROMWE, ROM16S));
1176 MS_PIN_DECL_(N21, SIG_EXPR_LIST_PTR(ROMWE), SIG_EXPR_LIST_PTR(GPIOS5));
1179 #define L22_DESC SIG_DESC_SET(SCU8C, 6)
1180 SIG_EXPR_DECL(ROMA22, ROM8, L22_DESC, VPO_OFF_12);
1181 SIG_EXPR_DECL(ROMA22, ROM16, L22_DESC, VPO_OFF_12);
1182 SIG_EXPR_DECL(ROMA22, ROM16S, L22_DESC, VPO_OFF_12);
1183 SIG_EXPR_LIST_DECL(ROMA22, SIG_EXPR_PTR(ROMA22, ROM8),
1184 SIG_EXPR_PTR(ROMA22, ROM16),
1185 SIG_EXPR_PTR(ROMA22, ROM16S));
1186 SIG_EXPR_LIST_DECL_SINGLE(VPOR4, VPO24, L22_DESC, VPO_24_OFF);
1187 MS_PIN_DECL(L22, GPIOS6, ROMA22, VPOR4);
1190 #define K18_DESC SIG_DESC_SET(SCU8C, 7)
1191 SIG_EXPR_DECL(ROMA23, ROM8, K18_DESC, VPO_OFF_12);
1192 SIG_EXPR_DECL(ROMA23, ROM16, K18_DESC, VPO_OFF_12);
1193 SIG_EXPR_DECL(ROMA23, ROM16S, K18_DESC, VPO_OFF_12);
1194 SIG_EXPR_LIST_DECL(ROMA23, SIG_EXPR_PTR(ROMA23, ROM8),
1195 SIG_EXPR_PTR(ROMA23, ROM16),
1196 SIG_EXPR_PTR(ROMA23, ROM16S));
1197 SIG_EXPR_LIST_DECL_SINGLE(VPOR5, VPO24, K18_DESC, VPO_24_OFF);
1198 MS_PIN_DECL(K18, GPIOS7, ROMA23, VPOR5);
1200 #define RMII1_DESC SIG_DESC_BIT(HW_STRAP1, 6, 0)
1203 SIG_EXPR_LIST_DECL_SINGLE(GPIOT0, GPIOT0, SIG_DESC_SET(SCUA0, 0));
1204 SIG_EXPR_LIST_DECL_SINGLE(RMII1TXEN, RMII1, RMII1_DESC);
1205 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXCK, RGMII1);
1206 MS_PIN_DECL_(A12, SIG_EXPR_LIST_PTR(GPIOT0), SIG_EXPR_LIST_PTR(RMII1TXEN),
1207 SIG_EXPR_LIST_PTR(RGMII1TXCK));
1210 SIG_EXPR_LIST_DECL_SINGLE(GPIOT1, GPIOT1, SIG_DESC_SET(SCUA0, 1));
1211 SIG_EXPR_LIST_DECL_SINGLE(DASHB12, RMII1, RMII1_DESC);
1212 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXCTL, RGMII1);
1213 MS_PIN_DECL_(B12, SIG_EXPR_LIST_PTR(GPIOT1), SIG_EXPR_LIST_PTR(DASHB12),
1214 SIG_EXPR_LIST_PTR(RGMII1TXCTL));
1217 SIG_EXPR_LIST_DECL_SINGLE(GPIOT2, GPIOT2, SIG_DESC_SET(SCUA0, 2));
1218 SIG_EXPR_LIST_DECL_SINGLE(RMII1TXD0, RMII1, RMII1_DESC);
1219 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD0, RGMII1);
1220 MS_PIN_DECL_(C12, SIG_EXPR_LIST_PTR(GPIOT2), SIG_EXPR_LIST_PTR(RMII1TXD0),
1221 SIG_EXPR_LIST_PTR(RGMII1TXD0));
1224 SIG_EXPR_LIST_DECL_SINGLE(GPIOT3, GPIOT3, SIG_DESC_SET(SCUA0, 3));
1225 SIG_EXPR_LIST_DECL_SINGLE(RMII1TXD1, RMII1, RMII1_DESC);
1226 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD1, RGMII1);
1227 MS_PIN_DECL_(D12, SIG_EXPR_LIST_PTR(GPIOT3), SIG_EXPR_LIST_PTR(RMII1TXD1),
1228 SIG_EXPR_LIST_PTR(RGMII1TXD1));
1231 SIG_EXPR_LIST_DECL_SINGLE(GPIOT4, GPIOT4, SIG_DESC_SET(SCUA0, 4));
1232 SIG_EXPR_LIST_DECL_SINGLE(DASHE12, RMII1, RMII1_DESC);
1233 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD2, RGMII1);
1234 MS_PIN_DECL_(E12, SIG_EXPR_LIST_PTR(GPIOT4), SIG_EXPR_LIST_PTR(DASHE12),
1235 SIG_EXPR_LIST_PTR(RGMII1TXD2));
1238 SIG_EXPR_LIST_DECL_SINGLE(GPIOT5, GPIOT5, SIG_DESC_SET(SCUA0, 5));
1239 SIG_EXPR_LIST_DECL_SINGLE(DASHA13, RMII1, RMII1_DESC);
1240 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD3, RGMII1);
1241 MS_PIN_DECL_(A13, SIG_EXPR_LIST_PTR(GPIOT5), SIG_EXPR_LIST_PTR(DASHA13),
1242 SIG_EXPR_LIST_PTR(RGMII1TXD3));
1244 #define RMII2_DESC SIG_DESC_BIT(HW_STRAP1, 7, 0)
1247 SIG_EXPR_LIST_DECL_SINGLE(GPIOT6, GPIOT6, SIG_DESC_SET(SCUA0, 6));
1248 SIG_EXPR_LIST_DECL_SINGLE(RMII2TXEN, RMII2, RMII2_DESC);
1249 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXCK, RGMII2);
1250 MS_PIN_DECL_(D9, SIG_EXPR_LIST_PTR(GPIOT6), SIG_EXPR_LIST_PTR(RMII2TXEN),
1251 SIG_EXPR_LIST_PTR(RGMII2TXCK));
1254 SIG_EXPR_LIST_DECL_SINGLE(GPIOT7, GPIOT7, SIG_DESC_SET(SCUA0, 7));
1255 SIG_EXPR_LIST_DECL_SINGLE(DASHE9, RMII2, RMII2_DESC);
1256 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXCTL, RGMII2);
1257 MS_PIN_DECL_(E9, SIG_EXPR_LIST_PTR(GPIOT7), SIG_EXPR_LIST_PTR(DASHE9),
1258 SIG_EXPR_LIST_PTR(RGMII2TXCTL));
1261 SIG_EXPR_LIST_DECL_SINGLE(GPIOU0, GPIOU0, SIG_DESC_SET(SCUA0, 8));
1262 SIG_EXPR_LIST_DECL_SINGLE(RMII2TXD0, RMII2, RMII2_DESC);
1263 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD0, RGMII2);
1264 MS_PIN_DECL_(A10, SIG_EXPR_LIST_PTR(GPIOU0), SIG_EXPR_LIST_PTR(RMII2TXD0),
1265 SIG_EXPR_LIST_PTR(RGMII2TXD0));
1268 SIG_EXPR_LIST_DECL_SINGLE(GPIOU1, GPIOU1, SIG_DESC_SET(SCUA0, 9));
1269 SIG_EXPR_LIST_DECL_SINGLE(RMII2TXD1, RMII2, RMII2_DESC);
1270 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD1, RGMII2);
1271 MS_PIN_DECL_(B10, SIG_EXPR_LIST_PTR(GPIOU1), SIG_EXPR_LIST_PTR(RMII2TXD1),
1272 SIG_EXPR_LIST_PTR(RGMII2TXD1));
1275 SIG_EXPR_LIST_DECL_SINGLE(GPIOU2, GPIOU2, SIG_DESC_SET(SCUA0, 10));
1276 SIG_EXPR_LIST_DECL_SINGLE(DASHC10, RMII2, RMII2_DESC);
1277 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD2, RGMII2);
1278 MS_PIN_DECL_(C10, SIG_EXPR_LIST_PTR(GPIOU2), SIG_EXPR_LIST_PTR(DASHC10),
1279 SIG_EXPR_LIST_PTR(RGMII2TXD2));
1282 SIG_EXPR_LIST_DECL_SINGLE(GPIOU3, GPIOU3, SIG_DESC_SET(SCUA0, 11));
1283 SIG_EXPR_LIST_DECL_SINGLE(DASHD10, RMII2, RMII2_DESC);
1284 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD3, RGMII2);
1285 MS_PIN_DECL_(D10, SIG_EXPR_LIST_PTR(GPIOU3), SIG_EXPR_LIST_PTR(DASHD10),
1286 SIG_EXPR_LIST_PTR(RGMII2TXD3));
1289 SIG_EXPR_LIST_DECL_SINGLE(GPIOU4, GPIOU4, SIG_DESC_SET(SCUA0, 12));
1290 SIG_EXPR_LIST_DECL_SINGLE(RMII1RCLK, RMII1, RMII1_DESC);
1291 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXCK, RGMII1);
1292 MS_PIN_DECL_(E11, SIG_EXPR_LIST_PTR(GPIOU4), SIG_EXPR_LIST_PTR(RMII1RCLK),
1293 SIG_EXPR_LIST_PTR(RGMII1RXCK));
1296 SIG_EXPR_LIST_DECL_SINGLE(GPIOU5, GPIOU5, SIG_DESC_SET(SCUA0, 13));
1297 SIG_EXPR_LIST_DECL_SINGLE(DASHD11, RMII1, RMII1_DESC);
1298 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXCTL, RGMII1);
1299 MS_PIN_DECL_(D11, SIG_EXPR_LIST_PTR(GPIOU5), SIG_EXPR_LIST_PTR(DASHD11),
1300 SIG_EXPR_LIST_PTR(RGMII1RXCTL));
1303 SIG_EXPR_LIST_DECL_SINGLE(GPIOU6, GPIOU6, SIG_DESC_SET(SCUA0, 14));
1304 SIG_EXPR_LIST_DECL_SINGLE(RMII1RXD0, RMII1, RMII1_DESC);
1305 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD0, RGMII1);
1306 MS_PIN_DECL_(C11, SIG_EXPR_LIST_PTR(GPIOU6), SIG_EXPR_LIST_PTR(RMII1RXD0),
1307 SIG_EXPR_LIST_PTR(RGMII1RXD0));
1310 SIG_EXPR_LIST_DECL_SINGLE(GPIOU7, GPIOU7, SIG_DESC_SET(SCUA0, 15));
1311 SIG_EXPR_LIST_DECL_SINGLE(RMII1RXD1, RMII1, RMII1_DESC);
1312 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD1, RGMII1);
1313 MS_PIN_DECL_(B11, SIG_EXPR_LIST_PTR(GPIOU7), SIG_EXPR_LIST_PTR(RMII1RXD1),
1314 SIG_EXPR_LIST_PTR(RGMII1RXD1));
1317 SIG_EXPR_LIST_DECL_SINGLE(GPIOV0, GPIOV0, SIG_DESC_SET(SCUA0, 16));
1318 SIG_EXPR_LIST_DECL_SINGLE(RMII1CRSDV, RMII1, RMII1_DESC);
1319 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD2, RGMII1);
1320 MS_PIN_DECL_(A11, SIG_EXPR_LIST_PTR(GPIOV0), SIG_EXPR_LIST_PTR(RMII1CRSDV),
1321 SIG_EXPR_LIST_PTR(RGMII1RXD2));
1324 SIG_EXPR_LIST_DECL_SINGLE(GPIOV1, GPIOV1, SIG_DESC_SET(SCUA0, 17));
1325 SIG_EXPR_LIST_DECL_SINGLE(RMII1RXER, RMII1, RMII1_DESC);
1326 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD3, RGMII1);
1327 MS_PIN_DECL_(E10, SIG_EXPR_LIST_PTR(GPIOV1), SIG_EXPR_LIST_PTR(RMII1RXER),
1328 SIG_EXPR_LIST_PTR(RGMII1RXD3));
1331 SIG_EXPR_LIST_DECL_SINGLE(GPIOV2, GPIOV2, SIG_DESC_SET(SCUA0, 18));
1332 SIG_EXPR_LIST_DECL_SINGLE(RMII2RCLK, RMII2, RMII2_DESC);
1333 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXCK, RGMII2);
1334 MS_PIN_DECL_(C9, SIG_EXPR_LIST_PTR(GPIOV2), SIG_EXPR_LIST_PTR(RMII2RCLK),
1335 SIG_EXPR_LIST_PTR(RGMII2RXCK));
1338 SIG_EXPR_LIST_DECL_SINGLE(GPIOV3, GPIOV3, SIG_DESC_SET(SCUA0, 19));
1339 SIG_EXPR_LIST_DECL_SINGLE(DASHB9, RMII2, RMII2_DESC);
1340 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXCTL, RGMII2);
1341 MS_PIN_DECL_(B9, SIG_EXPR_LIST_PTR(GPIOV3), SIG_EXPR_LIST_PTR(DASHB9),
1342 SIG_EXPR_LIST_PTR(RGMII2RXCTL));
1345 SIG_EXPR_LIST_DECL_SINGLE(GPIOV4, GPIOV4, SIG_DESC_SET(SCUA0, 20));
1346 SIG_EXPR_LIST_DECL_SINGLE(RMII2RXD0, RMII2, RMII2_DESC);
1347 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD0, RGMII2);
1348 MS_PIN_DECL_(A9, SIG_EXPR_LIST_PTR(GPIOV4), SIG_EXPR_LIST_PTR(RMII2RXD0),
1349 SIG_EXPR_LIST_PTR(RGMII2RXD0));
1352 SIG_EXPR_LIST_DECL_SINGLE(GPIOV5, GPIOV5, SIG_DESC_SET(SCUA0, 21));
1353 SIG_EXPR_LIST_DECL_SINGLE(RMII2RXD1, RMII2, RMII2_DESC);
1354 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD1, RGMII2);
1355 MS_PIN_DECL_(E8, SIG_EXPR_LIST_PTR(GPIOV5), SIG_EXPR_LIST_PTR(RMII2RXD1),
1356 SIG_EXPR_LIST_PTR(RGMII2RXD1));
1359 SIG_EXPR_LIST_DECL_SINGLE(GPIOV6, GPIOV6, SIG_DESC_SET(SCUA0, 22));
1360 SIG_EXPR_LIST_DECL_SINGLE(RMII2CRSDV, RMII2, RMII2_DESC);
1361 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD2, RGMII2);
1362 MS_PIN_DECL_(D8, SIG_EXPR_LIST_PTR(GPIOV6), SIG_EXPR_LIST_PTR(RMII2CRSDV),
1363 SIG_EXPR_LIST_PTR(RGMII2RXD2));
1366 SIG_EXPR_LIST_DECL_SINGLE(GPIOV7, GPIOV7, SIG_DESC_SET(SCUA0, 23));
1367 SIG_EXPR_LIST_DECL_SINGLE(RMII2RXER, RMII2, RMII2_DESC);
1368 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD3, RGMII2);
1369 MS_PIN_DECL_(C8, SIG_EXPR_LIST_PTR(GPIOV7), SIG_EXPR_LIST_PTR(RMII2RXER),
1370 SIG_EXPR_LIST_PTR(RGMII2RXD3));
1372 FUNC_GROUP_DECL(RMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11,
1374 FUNC_GROUP_DECL(RGMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11,
1377 FUNC_GROUP_DECL(RMII2, D9, E9, A10, B10, C10, D10, C9, B9, A9, E8, D8, C8);
1378 FUNC_GROUP_DECL(RGMII2, D9, E9, A10, B10, C10, D10, C9, B9, A9, E8, D8, C8);
1381 SIG_EXPR_LIST_DECL_SINGLE(GPIOW0, GPIOW0, SIG_DESC_SET(SCUA0, 24));
1382 SIG_EXPR_LIST_DECL_SINGLE(ADC0, ADC0);
1383 MS_PIN_DECL_(L5, SIG_EXPR_LIST_PTR(GPIOW0), SIG_EXPR_LIST_PTR(ADC0));
1384 FUNC_GROUP_DECL(ADC0, L5);
1387 SIG_EXPR_LIST_DECL_SINGLE(GPIOW1, GPIOW1, SIG_DESC_SET(SCUA0, 25));
1388 SIG_EXPR_LIST_DECL_SINGLE(ADC1, ADC1);
1389 MS_PIN_DECL_(L4, SIG_EXPR_LIST_PTR(GPIOW1), SIG_EXPR_LIST_PTR(ADC1));
1390 FUNC_GROUP_DECL(ADC1, L4);
1393 SIG_EXPR_LIST_DECL_SINGLE(GPIOW2, GPIOW2, SIG_DESC_SET(SCUA0, 26));
1394 SIG_EXPR_LIST_DECL_SINGLE(ADC2, ADC2);
1395 MS_PIN_DECL_(L3, SIG_EXPR_LIST_PTR(GPIOW2), SIG_EXPR_LIST_PTR(ADC2));
1396 FUNC_GROUP_DECL(ADC2, L3);
1399 SIG_EXPR_LIST_DECL_SINGLE(GPIOW3, GPIOW3, SIG_DESC_SET(SCUA0, 27));
1400 SIG_EXPR_LIST_DECL_SINGLE(ADC3, ADC3);
1401 MS_PIN_DECL_(L2, SIG_EXPR_LIST_PTR(GPIOW3), SIG_EXPR_LIST_PTR(ADC3));
1402 FUNC_GROUP_DECL(ADC3, L2);
1405 SIG_EXPR_LIST_DECL_SINGLE(GPIOW4, GPIOW4, SIG_DESC_SET(SCUA0, 28));
1406 SIG_EXPR_LIST_DECL_SINGLE(ADC4, ADC4);
1407 MS_PIN_DECL_(L1, SIG_EXPR_LIST_PTR(GPIOW4), SIG_EXPR_LIST_PTR(ADC4));
1408 FUNC_GROUP_DECL(ADC4, L1);
1411 SIG_EXPR_LIST_DECL_SINGLE(GPIOW5, GPIOW5, SIG_DESC_SET(SCUA0, 29));
1412 SIG_EXPR_LIST_DECL_SINGLE(ADC5, ADC5);
1413 MS_PIN_DECL_(M5, SIG_EXPR_LIST_PTR(GPIOW5), SIG_EXPR_LIST_PTR(ADC5));
1414 FUNC_GROUP_DECL(ADC5, M5);
1417 SIG_EXPR_LIST_DECL_SINGLE(GPIOW6, GPIOW6, SIG_DESC_SET(SCUA0, 30));
1418 SIG_EXPR_LIST_DECL_SINGLE(ADC6, ADC6);
1419 MS_PIN_DECL_(M4, SIG_EXPR_LIST_PTR(GPIOW6), SIG_EXPR_LIST_PTR(ADC6));
1420 FUNC_GROUP_DECL(ADC6, M4);
1423 SIG_EXPR_LIST_DECL_SINGLE(GPIOW7, GPIOW7, SIG_DESC_SET(SCUA0, 31));
1424 SIG_EXPR_LIST_DECL_SINGLE(ADC7, ADC7);
1425 MS_PIN_DECL_(M3, SIG_EXPR_LIST_PTR(GPIOW7), SIG_EXPR_LIST_PTR(ADC7));
1426 FUNC_GROUP_DECL(ADC7, M3);
1429 SIG_EXPR_LIST_DECL_SINGLE(GPIOX0, GPIOX0, SIG_DESC_SET(SCUA4, 0));
1430 SIG_EXPR_LIST_DECL_SINGLE(ADC8, ADC8);
1431 MS_PIN_DECL_(M2, SIG_EXPR_LIST_PTR(GPIOX0), SIG_EXPR_LIST_PTR(ADC8));
1432 FUNC_GROUP_DECL(ADC8, M2);
1435 SIG_EXPR_LIST_DECL_SINGLE(GPIOX1, GPIOX1, SIG_DESC_SET(SCUA4, 1));
1436 SIG_EXPR_LIST_DECL_SINGLE(ADC9, ADC9);
1437 MS_PIN_DECL_(M1, SIG_EXPR_LIST_PTR(GPIOX1), SIG_EXPR_LIST_PTR(ADC9));
1438 FUNC_GROUP_DECL(ADC9, M1);
1441 SIG_EXPR_LIST_DECL_SINGLE(GPIOX2, GPIOX2, SIG_DESC_SET(SCUA4, 2));
1442 SIG_EXPR_LIST_DECL_SINGLE(ADC10, ADC10);
1443 MS_PIN_DECL_(N5, SIG_EXPR_LIST_PTR(GPIOX2), SIG_EXPR_LIST_PTR(ADC10));
1444 FUNC_GROUP_DECL(ADC10, N5);
1447 SIG_EXPR_LIST_DECL_SINGLE(GPIOX3, GPIOX3, SIG_DESC_SET(SCUA4, 3));
1448 SIG_EXPR_LIST_DECL_SINGLE(ADC11, ADC11);
1449 MS_PIN_DECL_(N4, SIG_EXPR_LIST_PTR(GPIOX3), SIG_EXPR_LIST_PTR(ADC11));
1450 FUNC_GROUP_DECL(ADC11, N4);
1453 SIG_EXPR_LIST_DECL_SINGLE(GPIOX4, GPIOX4, SIG_DESC_SET(SCUA4, 4));
1454 SIG_EXPR_LIST_DECL_SINGLE(ADC12, ADC12);
1455 MS_PIN_DECL_(N3, SIG_EXPR_LIST_PTR(GPIOX4), SIG_EXPR_LIST_PTR(ADC12));
1456 FUNC_GROUP_DECL(ADC12, N3);
1459 SIG_EXPR_LIST_DECL_SINGLE(GPIOX5, GPIOX5, SIG_DESC_SET(SCUA4, 5));
1460 SIG_EXPR_LIST_DECL_SINGLE(ADC13, ADC13);
1461 MS_PIN_DECL_(N2, SIG_EXPR_LIST_PTR(GPIOX5), SIG_EXPR_LIST_PTR(ADC13));
1462 FUNC_GROUP_DECL(ADC13, N2);
1465 SIG_EXPR_LIST_DECL_SINGLE(GPIOX6, GPIOX6, SIG_DESC_SET(SCUA4, 6));
1466 SIG_EXPR_LIST_DECL_SINGLE(ADC14, ADC14);
1467 MS_PIN_DECL_(N1, SIG_EXPR_LIST_PTR(GPIOX6), SIG_EXPR_LIST_PTR(ADC14));
1468 FUNC_GROUP_DECL(ADC14, N1);
1471 SIG_EXPR_LIST_DECL_SINGLE(GPIOX7, GPIOX7, SIG_DESC_SET(SCUA4, 7));
1472 SIG_EXPR_LIST_DECL_SINGLE(ADC15, ADC15);
1473 MS_PIN_DECL_(P5, SIG_EXPR_LIST_PTR(GPIOX7), SIG_EXPR_LIST_PTR(ADC15));
1474 FUNC_GROUP_DECL(ADC15, P5);
1477 SIG_EXPR_DECL(SIOS3, SIOS3, SIG_DESC_SET(SCUA4, 8));
1478 SIG_EXPR_DECL(SIOS3, ACPI, ACPI_DESC);
1479 SIG_EXPR_LIST_DECL_DUAL(SIOS3, SIOS3, ACPI);
1480 SS_PIN_DECL(C21, GPIOY0, SIOS3);
1481 FUNC_GROUP_DECL(SIOS3, C21);
1484 SIG_EXPR_DECL(SIOS5, SIOS5, SIG_DESC_SET(SCUA4, 9));
1485 SIG_EXPR_DECL(SIOS5, ACPI, ACPI_DESC);
1486 SIG_EXPR_LIST_DECL_DUAL(SIOS5, SIOS5, ACPI);
1487 SS_PIN_DECL(F20, GPIOY1, SIOS5);
1488 FUNC_GROUP_DECL(SIOS5, F20);
1491 SIG_EXPR_DECL(SIOPWREQ, SIOPWREQ, SIG_DESC_SET(SCUA4, 10));
1492 SIG_EXPR_DECL(SIOPWREQ, ACPI, ACPI_DESC);
1493 SIG_EXPR_LIST_DECL_DUAL(SIOPWREQ, SIOPWREQ, ACPI);
1494 SS_PIN_DECL(G20, GPIOY2, SIOPWREQ);
1495 FUNC_GROUP_DECL(SIOPWREQ, G20);
1498 SIG_EXPR_DECL(SIOONCTRL, SIOONCTRL, SIG_DESC_SET(SCUA4, 11));
1499 SIG_EXPR_DECL(SIOONCTRL, ACPI, ACPI_DESC);
1500 SIG_EXPR_LIST_DECL_DUAL(SIOONCTRL, SIOONCTRL, ACPI);
1501 SS_PIN_DECL(K20, GPIOY3, SIOONCTRL);
1502 FUNC_GROUP_DECL(SIOONCTRL, K20);
1504 FUNC_GROUP_DECL(ACPI, B19, A20, D17, A19, C21, F20, G20, K20);
1507 #define R22_DESC SIG_DESC_SET(SCUA4, 16)
1508 SIG_EXPR_DECL(ROMA2, ROM8, R22_DESC, VPOOFF0_DESC);
1509 SIG_EXPR_DECL(ROMA2, ROM16, R22_DESC, VPOOFF0_DESC);
1510 SIG_EXPR_LIST_DECL_DUAL(ROMA2, ROM8, ROM16);
1511 SIG_EXPR_DECL(VPOB0, VPO12, R22_DESC, VPO12_DESC);
1512 SIG_EXPR_DECL(VPOB0, VPO24, R22_DESC, VPO24_DESC);
1513 SIG_EXPR_DECL(VPOB0, VPOOFF1, R22_DESC, VPOOFF1_DESC);
1514 SIG_EXPR_LIST_DECL(VPOB0, SIG_EXPR_PTR(VPOB0, VPO12),
1515 SIG_EXPR_PTR(VPOB0, VPO24), SIG_EXPR_PTR(VPOB0, VPOOFF1));
1516 MS_PIN_DECL(R22, GPIOZ0, ROMA2, VPOB0);
1519 #define P18_DESC SIG_DESC_SET(SCUA4, 17)
1520 SIG_EXPR_DECL(ROMA3, ROM8, P18_DESC, VPOOFF0_DESC);
1521 SIG_EXPR_DECL(ROMA3, ROM16, P18_DESC, VPOOFF0_DESC);
1522 SIG_EXPR_LIST_DECL_DUAL(ROMA3, ROM8, ROM16);
1523 SIG_EXPR_DECL(VPOB1, VPO12, P18_DESC, VPO12_DESC);
1524 SIG_EXPR_DECL(VPOB1, VPO24, P18_DESC, VPO24_DESC);
1525 SIG_EXPR_DECL(VPOB1, VPOOFF1, P18_DESC, VPOOFF1_DESC);
1526 SIG_EXPR_LIST_DECL(VPOB1, SIG_EXPR_PTR(VPOB1, VPO12),
1527 SIG_EXPR_PTR(VPOB1, VPO24), SIG_EXPR_PTR(VPOB1, VPOOFF1));
1528 MS_PIN_DECL(P18, GPIOZ1, ROMA3, VPOB1);
1531 #define P19_DESC SIG_DESC_SET(SCUA4, 18)
1532 SIG_EXPR_DECL(ROMA4, ROM8, P19_DESC, VPOOFF0_DESC);
1533 SIG_EXPR_DECL(ROMA4, ROM16, P19_DESC, VPOOFF0_DESC);
1534 SIG_EXPR_LIST_DECL_DUAL(ROMA4, ROM8, ROM16);
1535 SIG_EXPR_DECL(VPOB2, VPO12, P19_DESC, VPO12_DESC);
1536 SIG_EXPR_DECL(VPOB2, VPO24, P19_DESC, VPO24_DESC);
1537 SIG_EXPR_DECL(VPOB2, VPOOFF1, P19_DESC, VPOOFF1_DESC);
1538 SIG_EXPR_LIST_DECL(VPOB2, SIG_EXPR_PTR(VPOB2, VPO12),
1539 SIG_EXPR_PTR(VPOB2, VPO24), SIG_EXPR_PTR(VPOB2, VPOOFF1));
1540 MS_PIN_DECL(P19, GPIOZ2, ROMA4, VPOB2);
1543 #define P20_DESC SIG_DESC_SET(SCUA4, 19)
1544 SIG_EXPR_DECL(ROMA5, ROM8, P20_DESC, VPOOFF0_DESC);
1545 SIG_EXPR_DECL(ROMA5, ROM16, P20_DESC, VPOOFF0_DESC);
1546 SIG_EXPR_LIST_DECL_DUAL(ROMA5, ROM8, ROM16);
1547 SIG_EXPR_DECL(VPOB3, VPO12, P20_DESC, VPO12_DESC);
1548 SIG_EXPR_DECL(VPOB3, VPO24, P20_DESC, VPO24_DESC);
1549 SIG_EXPR_DECL(VPOB3, VPOOFF1, P20_DESC, VPOOFF1_DESC);
1550 SIG_EXPR_LIST_DECL(VPOB3, SIG_EXPR_PTR(VPOB3, VPO12),
1551 SIG_EXPR_PTR(VPOB3, VPO24), SIG_EXPR_PTR(VPOB3, VPOOFF1));
1552 MS_PIN_DECL(P20, GPIOZ3, ROMA5, VPOB3);
1555 #define P21_DESC SIG_DESC_SET(SCUA4, 20)
1556 SIG_EXPR_DECL(ROMA6, ROM8, P21_DESC, VPOOFF0_DESC);
1557 SIG_EXPR_DECL(ROMA6, ROM16, P21_DESC, VPOOFF0_DESC);
1558 SIG_EXPR_LIST_DECL_DUAL(ROMA6, ROM8, ROM16);
1559 SIG_EXPR_DECL(VPOB4, VPO12, P21_DESC, VPO12_DESC);
1560 SIG_EXPR_DECL(VPOB4, VPO24, P21_DESC, VPO24_DESC);
1561 SIG_EXPR_DECL(VPOB4, VPOOFF1, P21_DESC, VPOOFF1_DESC);
1562 SIG_EXPR_LIST_DECL(VPOB4, SIG_EXPR_PTR(VPOB4, VPO12),
1563 SIG_EXPR_PTR(VPOB4, VPO24), SIG_EXPR_PTR(VPOB4, VPOOFF1));
1564 MS_PIN_DECL(P21, GPIOZ4, ROMA6, VPOB4);
1567 #define P22_DESC SIG_DESC_SET(SCUA4, 21)
1568 SIG_EXPR_DECL(ROMA7, ROM8, P22_DESC, VPOOFF0_DESC);
1569 SIG_EXPR_DECL(ROMA7, ROM16, P22_DESC, VPOOFF0_DESC);
1570 SIG_EXPR_LIST_DECL_DUAL(ROMA7, ROM8, ROM16);
1571 SIG_EXPR_DECL(VPOB5, VPO12, P22_DESC, VPO12_DESC);
1572 SIG_EXPR_DECL(VPOB5, VPO24, P22_DESC, VPO24_DESC);
1573 SIG_EXPR_DECL(VPOB5, VPOOFF1, P22_DESC, VPOOFF1_DESC);
1574 SIG_EXPR_LIST_DECL(VPOB5, SIG_EXPR_PTR(VPOB5, VPO12),
1575 SIG_EXPR_PTR(VPOB5, VPO24), SIG_EXPR_PTR(VPOB5, VPOOFF1));
1576 MS_PIN_DECL(P22, GPIOZ5, ROMA7, VPOB5);
1579 #define M19_DESC SIG_DESC_SET(SCUA4, 22)
1580 SIG_EXPR_DECL(ROMA8, ROM8, M19_DESC, VPOOFF0_DESC);
1581 SIG_EXPR_DECL(ROMA8, ROM16, M19_DESC, VPOOFF0_DESC);
1582 SIG_EXPR_LIST_DECL_DUAL(ROMA8, ROM8, ROM16);
1583 SIG_EXPR_DECL(VPOB6, VPO12, M19_DESC, VPO12_DESC);
1584 SIG_EXPR_DECL(VPOB6, VPO24, M19_DESC, VPO24_DESC);
1585 SIG_EXPR_DECL(VPOB6, VPOOFF1, M19_DESC, VPOOFF1_DESC);
1586 SIG_EXPR_LIST_DECL(VPOB6, SIG_EXPR_PTR(VPOB6, VPO12),
1587 SIG_EXPR_PTR(VPOB6, VPO24), SIG_EXPR_PTR(VPOB6, VPOOFF1));
1588 MS_PIN_DECL(M19, GPIOZ6, ROMA8, VPOB6);
1591 #define M20_DESC SIG_DESC_SET(SCUA4, 23)
1592 SIG_EXPR_DECL(ROMA9, ROM8, M20_DESC, VPOOFF0_DESC);
1593 SIG_EXPR_DECL(ROMA9, ROM16, M20_DESC, VPOOFF0_DESC);
1594 SIG_EXPR_LIST_DECL_DUAL(ROMA9, ROM8, ROM16);
1595 SIG_EXPR_DECL(VPOB7, VPO12, M20_DESC, VPO12_DESC);
1596 SIG_EXPR_DECL(VPOB7, VPO24, M20_DESC, VPO24_DESC);
1597 SIG_EXPR_DECL(VPOB7, VPOOFF1, M20_DESC, VPOOFF1_DESC);
1598 SIG_EXPR_LIST_DECL(VPOB7, SIG_EXPR_PTR(VPOB7, VPO12),
1599 SIG_EXPR_PTR(VPOB7, VPO24), SIG_EXPR_PTR(VPOB7, VPOOFF1));
1600 MS_PIN_DECL(M20, GPIOZ7, ROMA9, VPOB7);
1603 #define M21_DESC SIG_DESC_SET(SCUA4, 24)
1604 SIG_EXPR_DECL(ROMA10, ROM8, M21_DESC, VPOOFF0_DESC);
1605 SIG_EXPR_DECL(ROMA10, ROM16, M21_DESC, VPOOFF0_DESC);
1606 SIG_EXPR_LIST_DECL_DUAL(ROMA10, ROM8, ROM16);
1607 SIG_EXPR_DECL(VPOG0, VPO12, M21_DESC, VPO12_DESC);
1608 SIG_EXPR_DECL(VPOG0, VPO24, M21_DESC, VPO24_DESC);
1609 SIG_EXPR_DECL(VPOG0, VPOOFF1, M21_DESC, VPOOFF1_DESC);
1610 SIG_EXPR_LIST_DECL(VPOG0, SIG_EXPR_PTR(VPOG0, VPO12),
1611 SIG_EXPR_PTR(VPOG0, VPO24), SIG_EXPR_PTR(VPOG0, VPOOFF1));
1612 MS_PIN_DECL(M21, GPIOAA0, ROMA10, VPOG0);
1615 #define M22_DESC SIG_DESC_SET(SCUA4, 25)
1616 SIG_EXPR_DECL(ROMA11, ROM8, M22_DESC, VPOOFF0_DESC);
1617 SIG_EXPR_DECL(ROMA11, ROM16, M22_DESC, VPOOFF0_DESC);
1618 SIG_EXPR_LIST_DECL_DUAL(ROMA11, ROM8, ROM16);
1619 SIG_EXPR_DECL(VPOG1, VPO12, M22_DESC, VPO12_DESC);
1620 SIG_EXPR_DECL(VPOG1, VPO24, M22_DESC, VPO24_DESC);
1621 SIG_EXPR_DECL(VPOG1, VPOOFF1, M22_DESC, VPOOFF1_DESC);
1622 SIG_EXPR_LIST_DECL(VPOG1, SIG_EXPR_PTR(VPOG1, VPO12),
1623 SIG_EXPR_PTR(VPOG1, VPO24), SIG_EXPR_PTR(VPOG1, VPOOFF1));
1624 MS_PIN_DECL(M22, GPIOAA1, ROMA11, VPOG1);
1627 #define L18_DESC SIG_DESC_SET(SCUA4, 26)
1628 SIG_EXPR_DECL(ROMA12, ROM8, L18_DESC, VPOOFF0_DESC);
1629 SIG_EXPR_DECL(ROMA12, ROM16, L18_DESC, VPOOFF0_DESC);
1630 SIG_EXPR_LIST_DECL_DUAL(ROMA12, ROM8, ROM16);
1631 SIG_EXPR_DECL(VPOG2, VPO12, L18_DESC, VPO12_DESC);
1632 SIG_EXPR_DECL(VPOG2, VPO24, L18_DESC, VPO24_DESC);
1633 SIG_EXPR_DECL(VPOG2, VPOOFF1, L18_DESC, VPOOFF1_DESC);
1634 SIG_EXPR_LIST_DECL(VPOG2, SIG_EXPR_PTR(VPOG2, VPO12),
1635 SIG_EXPR_PTR(VPOG2, VPO24), SIG_EXPR_PTR(VPOG2, VPOOFF1));
1636 MS_PIN_DECL(L18, GPIOAA2, ROMA12, VPOG2);
1639 #define L19_DESC SIG_DESC_SET(SCUA4, 27)
1640 SIG_EXPR_DECL(ROMA13, ROM8, L19_DESC, VPOOFF0_DESC);
1641 SIG_EXPR_DECL(ROMA13, ROM16, L19_DESC, VPOOFF0_DESC);
1642 SIG_EXPR_LIST_DECL_DUAL(ROMA13, ROM8, ROM16);
1643 SIG_EXPR_DECL(VPOG3, VPO12, L19_DESC, VPO12_DESC);
1644 SIG_EXPR_DECL(VPOG3, VPO24, L19_DESC, VPO24_DESC);
1645 SIG_EXPR_DECL(VPOG3, VPOOFF1, L19_DESC, VPOOFF1_DESC);
1646 SIG_EXPR_LIST_DECL(VPOG3, SIG_EXPR_PTR(VPOG3, VPO12),
1647 SIG_EXPR_PTR(VPOG3, VPO24), SIG_EXPR_PTR(VPOG3, VPOOFF1));
1648 MS_PIN_DECL(L19, GPIOAA3, ROMA13, VPOG3);
1651 #define L20_DESC SIG_DESC_SET(SCUA4, 28)
1652 SIG_EXPR_DECL(ROMA14, ROM8, L20_DESC, VPO_OFF_12);
1653 SIG_EXPR_DECL(ROMA14, ROM16, L20_DESC, VPO_OFF_12);
1654 SIG_EXPR_LIST_DECL_DUAL(ROMA14, ROM8, ROM16);
1655 SIG_EXPR_DECL(VPOG4, VPO24, L20_DESC, VPO24_DESC);
1656 SIG_EXPR_DECL(VPOG4, VPOOFF1, L20_DESC, VPOOFF1_DESC);
1657 SIG_EXPR_LIST_DECL_DUAL(VPOG4, VPO24, VPOOFF1);
1658 MS_PIN_DECL(L20, GPIOAA4, ROMA14, VPOG4);
1661 #define L21_DESC SIG_DESC_SET(SCUA4, 29)
1662 SIG_EXPR_DECL(ROMA15, ROM8, L21_DESC, VPO_OFF_12);
1663 SIG_EXPR_DECL(ROMA15, ROM16, L21_DESC, VPO_OFF_12);
1664 SIG_EXPR_LIST_DECL_DUAL(ROMA15, ROM8, ROM16);
1665 SIG_EXPR_DECL(VPOG5, VPO24, L21_DESC, VPO24_DESC);
1666 SIG_EXPR_DECL(VPOG5, VPOOFF1, L21_DESC, VPOOFF1_DESC);
1667 SIG_EXPR_LIST_DECL_DUAL(VPOG5, VPO24, VPOOFF1);
1668 MS_PIN_DECL(L21, GPIOAA5, ROMA15, VPOG5);
1671 #define T18_DESC SIG_DESC_SET(SCUA4, 30)
1672 SIG_EXPR_DECL(ROMA16, ROM8, T18_DESC, VPO_OFF_12);
1673 SIG_EXPR_DECL(ROMA16, ROM16, T18_DESC, VPO_OFF_12);
1674 SIG_EXPR_LIST_DECL_DUAL(ROMA16, ROM8, ROM16);
1675 SIG_EXPR_DECL(VPOG6, VPO24, T18_DESC, VPO24_DESC);
1676 SIG_EXPR_DECL(VPOG6, VPOOFF1, T18_DESC, VPOOFF1_DESC);
1677 SIG_EXPR_LIST_DECL_DUAL(VPOG6, VPO24, VPOOFF1);
1678 MS_PIN_DECL(T18, GPIOAA6, ROMA16, VPOG6);
1681 #define N18_DESC SIG_DESC_SET(SCUA4, 31)
1682 SIG_EXPR_DECL(ROMA17, ROM8, N18_DESC, VPO_OFF_12);
1683 SIG_EXPR_DECL(ROMA17, ROM16, N18_DESC, VPO_OFF_12);
1684 SIG_EXPR_LIST_DECL_DUAL(ROMA17, ROM8, ROM16);
1685 SIG_EXPR_DECL(VPOG7, VPO24, N18_DESC, VPO24_DESC);
1686 SIG_EXPR_DECL(VPOG7, VPOOFF1, N18_DESC, VPOOFF1_DESC);
1687 SIG_EXPR_LIST_DECL_DUAL(VPOG7, VPO24, VPOOFF1);
1688 MS_PIN_DECL(N18, GPIOAA7, ROMA17, VPOG7);
1691 #define N19_DESC SIG_DESC_SET(SCUA8, 0)
1692 SIG_EXPR_DECL(ROMA18, ROM8, N19_DESC, VPO_OFF_12);
1693 SIG_EXPR_DECL(ROMA18, ROM16, N19_DESC, VPO_OFF_12);
1694 SIG_EXPR_LIST_DECL_DUAL(ROMA18, ROM8, ROM16);
1695 SIG_EXPR_DECL(VPOR0, VPO24, N19_DESC, VPO24_DESC);
1696 SIG_EXPR_DECL(VPOR0, VPOOFF1, N19_DESC, VPOOFF1_DESC);
1697 SIG_EXPR_LIST_DECL_DUAL(VPOR0, VPO24, VPOOFF1);
1698 MS_PIN_DECL(N19, GPIOAB0, ROMA18, VPOR0);
1701 #define M18_DESC SIG_DESC_SET(SCUA8, 1)
1702 SIG_EXPR_DECL(ROMA19, ROM8, M18_DESC, VPO_OFF_12);
1703 SIG_EXPR_DECL(ROMA19, ROM16, M18_DESC, VPO_OFF_12);
1704 SIG_EXPR_LIST_DECL_DUAL(ROMA19, ROM8, ROM16);
1705 SIG_EXPR_DECL(VPOR1, VPO24, M18_DESC, VPO24_DESC);
1706 SIG_EXPR_DECL(VPOR1, VPOOFF1, M18_DESC, VPOOFF1_DESC);
1707 SIG_EXPR_LIST_DECL_DUAL(VPOR1, VPO24, VPOOFF1);
1708 MS_PIN_DECL(M18, GPIOAB1, ROMA19, VPOR1);
1711 #define N22_DESC SIG_DESC_SET(SCUA8, 2)
1712 SIG_EXPR_DECL(ROMA20, ROM8, N22_DESC, VPO_OFF_12);
1713 SIG_EXPR_DECL(ROMA20, ROM16, N22_DESC, VPO_OFF_12);
1714 SIG_EXPR_LIST_DECL_DUAL(ROMA20, ROM8, ROM16);
1715 SIG_EXPR_DECL(VPOR2, VPO24, N22_DESC, VPO24_DESC);
1716 SIG_EXPR_DECL(VPOR2, VPOOFF1, N22_DESC, VPOOFF1_DESC);
1717 SIG_EXPR_LIST_DECL_DUAL(VPOR2, VPO24, VPOOFF1);
1718 MS_PIN_DECL(N22, GPIOAB2, ROMA20, VPOR2);
1721 #define N20_DESC SIG_DESC_SET(SCUA8, 3)
1722 SIG_EXPR_DECL(ROMA21, ROM8, N20_DESC, VPO_OFF_12);
1723 SIG_EXPR_DECL(ROMA21, ROM16, N20_DESC, VPO_OFF_12);
1724 SIG_EXPR_LIST_DECL_DUAL(ROMA21, ROM8, ROM16);
1725 SIG_EXPR_DECL(VPOR3, VPO24, N20_DESC, VPO24_DESC);
1726 SIG_EXPR_DECL(VPOR3, VPOOFF1, N20_DESC, VPOOFF1_DESC);
1727 SIG_EXPR_LIST_DECL_DUAL(VPOR3, VPO24, VPOOFF1);
1728 MS_PIN_DECL(N20, GPIOAB3, ROMA21, VPOR3);
1730 FUNC_GROUP_DECL(ROM8, V20, U21, T19, V22, U20, R18, N21, L22, K18, W21, Y22,
1731 U19, R22, P18, P19, P20, P21, P22, M19, M20, M21, M22, L18,
1732 L19, L20, L21, T18, N18, N19, M18, N22, N20);
1733 FUNC_GROUP_DECL(ROM16, V20, U21, T19, V22, U20, R18, N21, L22, K18,
1734 A8, C7, B7, A7, D7, B6, A6, E7, W21, Y22, U19, R22, P18, P19,
1735 P20, P21, P22, M19, M20, M21, M22, L18, L19, L20, L21, T18,
1736 N18, N19, M18, N22, N20);
1737 FUNC_GROUP_DECL(VPO12, U21, T19, V22, U20, R22, P18, P19, P20, P21, P22, M19,
1738 M20, M21, M22, L18, L19, L20, L21, T18, N18, N19, M18, N22,
1740 FUNC_GROUP_DECL(VPO24, U21, T19, V22, U20, L22, K18, V21, W22, R22, P18, P19,
1741 P20, P21, P22, M19, M20, M21, M22, L18, L19);
1743 #define USB11H2_DESC SIG_DESC_SET(SCU90, 3)
1744 #define USB11D1_DESC SIG_DESC_BIT(SCU90, 3, 0)
1747 SIG_EXPR_LIST_DECL_SINGLE(USB11HDP2, USB11H2, USB11H2_DESC);
1748 SIG_EXPR_LIST_DECL_SINGLE(USB11DP1, USB11D1, USB11D1_DESC);
1749 MS_PIN_DECL_(K4, SIG_EXPR_LIST_PTR(USB11HDP2), SIG_EXPR_LIST_PTR(USB11DP1));
1752 SIG_EXPR_LIST_DECL_SINGLE(USB11HDN1, USB11H2, USB11H2_DESC);
1753 SIG_EXPR_LIST_DECL_SINGLE(USB11DDN1, USB11D1, USB11D1_DESC);
1754 MS_PIN_DECL_(K3, SIG_EXPR_LIST_PTR(USB11HDN1), SIG_EXPR_LIST_PTR(USB11DDN1));
1756 FUNC_GROUP_DECL(USB11H2, K4, K3);
1757 FUNC_GROUP_DECL(USB11D1, K4, K3);
1759 #define USB2H1_DESC SIG_DESC_SET(SCU90, 29)
1760 #define USB2D1_DESC SIG_DESC_BIT(SCU90, 29, 0)
1763 SIG_EXPR_LIST_DECL_SINGLE(USB2HDP1, USB2H1, USB2H1_DESC);
1764 SIG_EXPR_LIST_DECL_SINGLE(USB2DDP1, USB2D1, USB2D1_DESC);
1765 MS_PIN_DECL_(AB21, SIG_EXPR_LIST_PTR(USB2HDP1), SIG_EXPR_LIST_PTR(USB2DDP1));
1768 SIG_EXPR_LIST_DECL_SINGLE(USB2HDN1, USB2H1, USB2H1_DESC);
1769 SIG_EXPR_LIST_DECL_SINGLE(USB2DDN1, USB2D1, USB2D1_DESC);
1770 MS_PIN_DECL_(AB20, SIG_EXPR_LIST_PTR(USB2HDN1), SIG_EXPR_LIST_PTR(USB2DDN1));
1772 FUNC_GROUP_DECL(USB2H1, AB21, AB20);
1773 FUNC_GROUP_DECL(USB2D1, AB21, AB20);
1775 /* Note we account for GPIOY4-GPIOY7 even though they're not valid, thus 216
1776 * pins becomes 220. Four additional non-GPIO-capable pins are present for USB.
1778 #define ASPEED_G4_NR_PINS 224
1780 /* Pins, groups and functions are sort(1):ed alphabetically for sanity */
1782 static struct pinctrl_pin_desc aspeed_g4_pins[ASPEED_G4_NR_PINS] = {
1783 ASPEED_PINCTRL_PIN(A1),
1784 ASPEED_PINCTRL_PIN(A10),
1785 ASPEED_PINCTRL_PIN(A11),
1786 ASPEED_PINCTRL_PIN(A12),
1787 ASPEED_PINCTRL_PIN(A13),
1788 ASPEED_PINCTRL_PIN(A14),
1789 ASPEED_PINCTRL_PIN(A15),
1790 ASPEED_PINCTRL_PIN(A16),
1791 ASPEED_PINCTRL_PIN(A17),
1792 ASPEED_PINCTRL_PIN(A18),
1793 ASPEED_PINCTRL_PIN(A19),
1794 ASPEED_PINCTRL_PIN(A2),
1795 ASPEED_PINCTRL_PIN(A20),
1796 ASPEED_PINCTRL_PIN(A3),
1797 ASPEED_PINCTRL_PIN(A4),
1798 ASPEED_PINCTRL_PIN(A5),
1799 ASPEED_PINCTRL_PIN(A6),
1800 ASPEED_PINCTRL_PIN(A7),
1801 ASPEED_PINCTRL_PIN(A8),
1802 ASPEED_PINCTRL_PIN(A9),
1803 ASPEED_PINCTRL_PIN(AA1),
1804 ASPEED_PINCTRL_PIN(AA2),
1805 ASPEED_PINCTRL_PIN(AA22),
1806 ASPEED_PINCTRL_PIN(AA3),
1807 ASPEED_PINCTRL_PIN(AA4),
1808 ASPEED_PINCTRL_PIN(AA5),
1809 ASPEED_PINCTRL_PIN(AA6),
1810 ASPEED_PINCTRL_PIN(AA7),
1811 ASPEED_PINCTRL_PIN(AB1),
1812 ASPEED_PINCTRL_PIN(AB2),
1813 ASPEED_PINCTRL_PIN(AB3),
1814 ASPEED_PINCTRL_PIN(AB4),
1815 ASPEED_PINCTRL_PIN(AB5),
1816 ASPEED_PINCTRL_PIN(AB6),
1817 ASPEED_PINCTRL_PIN(AB7),
1818 ASPEED_PINCTRL_PIN(AB20),
1819 ASPEED_PINCTRL_PIN(AB21),
1820 ASPEED_PINCTRL_PIN(B1),
1821 ASPEED_PINCTRL_PIN(B10),
1822 ASPEED_PINCTRL_PIN(B11),
1823 ASPEED_PINCTRL_PIN(B12),
1824 ASPEED_PINCTRL_PIN(B13),
1825 ASPEED_PINCTRL_PIN(B14),
1826 ASPEED_PINCTRL_PIN(B15),
1827 ASPEED_PINCTRL_PIN(B16),
1828 ASPEED_PINCTRL_PIN(B17),
1829 ASPEED_PINCTRL_PIN(B18),
1830 ASPEED_PINCTRL_PIN(B19),
1831 ASPEED_PINCTRL_PIN(B2),
1832 ASPEED_PINCTRL_PIN(B22),
1833 ASPEED_PINCTRL_PIN(B3),
1834 ASPEED_PINCTRL_PIN(B4),
1835 ASPEED_PINCTRL_PIN(B5),
1836 ASPEED_PINCTRL_PIN(B6),
1837 ASPEED_PINCTRL_PIN(B7),
1838 ASPEED_PINCTRL_PIN(B9),
1839 ASPEED_PINCTRL_PIN(C1),
1840 ASPEED_PINCTRL_PIN(C10),
1841 ASPEED_PINCTRL_PIN(C11),
1842 ASPEED_PINCTRL_PIN(C12),
1843 ASPEED_PINCTRL_PIN(C13),
1844 ASPEED_PINCTRL_PIN(C14),
1845 ASPEED_PINCTRL_PIN(C15),
1846 ASPEED_PINCTRL_PIN(C16),
1847 ASPEED_PINCTRL_PIN(C17),
1848 ASPEED_PINCTRL_PIN(C18),
1849 ASPEED_PINCTRL_PIN(C2),
1850 ASPEED_PINCTRL_PIN(C20),
1851 ASPEED_PINCTRL_PIN(C21),
1852 ASPEED_PINCTRL_PIN(C22),
1853 ASPEED_PINCTRL_PIN(C3),
1854 ASPEED_PINCTRL_PIN(C4),
1855 ASPEED_PINCTRL_PIN(C5),
1856 ASPEED_PINCTRL_PIN(C6),
1857 ASPEED_PINCTRL_PIN(C7),
1858 ASPEED_PINCTRL_PIN(C8),
1859 ASPEED_PINCTRL_PIN(C9),
1860 ASPEED_PINCTRL_PIN(D1),
1861 ASPEED_PINCTRL_PIN(D10),
1862 ASPEED_PINCTRL_PIN(D11),
1863 ASPEED_PINCTRL_PIN(D12),
1864 ASPEED_PINCTRL_PIN(D13),
1865 ASPEED_PINCTRL_PIN(D14),
1866 ASPEED_PINCTRL_PIN(D15),
1867 ASPEED_PINCTRL_PIN(D16),
1868 ASPEED_PINCTRL_PIN(D17),
1869 ASPEED_PINCTRL_PIN(D18),
1870 ASPEED_PINCTRL_PIN(D19),
1871 ASPEED_PINCTRL_PIN(D2),
1872 ASPEED_PINCTRL_PIN(D3),
1873 ASPEED_PINCTRL_PIN(D4),
1874 ASPEED_PINCTRL_PIN(D5),
1875 ASPEED_PINCTRL_PIN(D6),
1876 ASPEED_PINCTRL_PIN(D7),
1877 ASPEED_PINCTRL_PIN(D8),
1878 ASPEED_PINCTRL_PIN(D9),
1879 ASPEED_PINCTRL_PIN(E10),
1880 ASPEED_PINCTRL_PIN(E11),
1881 ASPEED_PINCTRL_PIN(E12),
1882 ASPEED_PINCTRL_PIN(E13),
1883 ASPEED_PINCTRL_PIN(E14),
1884 ASPEED_PINCTRL_PIN(E15),
1885 ASPEED_PINCTRL_PIN(E16),
1886 ASPEED_PINCTRL_PIN(E18),
1887 ASPEED_PINCTRL_PIN(E19),
1888 ASPEED_PINCTRL_PIN(E2),
1889 ASPEED_PINCTRL_PIN(E20),
1890 ASPEED_PINCTRL_PIN(E3),
1891 ASPEED_PINCTRL_PIN(E5),
1892 ASPEED_PINCTRL_PIN(E6),
1893 ASPEED_PINCTRL_PIN(E7),
1894 ASPEED_PINCTRL_PIN(E8),
1895 ASPEED_PINCTRL_PIN(E9),
1896 ASPEED_PINCTRL_PIN(F18),
1897 ASPEED_PINCTRL_PIN(F20),
1898 ASPEED_PINCTRL_PIN(F3),
1899 ASPEED_PINCTRL_PIN(F4),
1900 ASPEED_PINCTRL_PIN(F5),
1901 ASPEED_PINCTRL_PIN(G18),
1902 ASPEED_PINCTRL_PIN(G19),
1903 ASPEED_PINCTRL_PIN(G20),
1904 ASPEED_PINCTRL_PIN(G5),
1905 ASPEED_PINCTRL_PIN(H1),
1906 ASPEED_PINCTRL_PIN(H18),
1907 ASPEED_PINCTRL_PIN(H19),
1908 ASPEED_PINCTRL_PIN(H2),
1909 ASPEED_PINCTRL_PIN(H20),
1910 ASPEED_PINCTRL_PIN(H3),
1911 ASPEED_PINCTRL_PIN(H4),
1912 ASPEED_PINCTRL_PIN(J20),
1913 ASPEED_PINCTRL_PIN(J21),
1914 ASPEED_PINCTRL_PIN(J3),
1915 ASPEED_PINCTRL_PIN(J4),
1916 ASPEED_PINCTRL_PIN(J5),
1917 ASPEED_PINCTRL_PIN(K18),
1918 ASPEED_PINCTRL_PIN(K20),
1919 ASPEED_PINCTRL_PIN(K3),
1920 ASPEED_PINCTRL_PIN(K4),
1921 ASPEED_PINCTRL_PIN(K5),
1922 ASPEED_PINCTRL_PIN(L1),
1923 ASPEED_PINCTRL_PIN(L18),
1924 ASPEED_PINCTRL_PIN(L19),
1925 ASPEED_PINCTRL_PIN(L2),
1926 ASPEED_PINCTRL_PIN(L20),
1927 ASPEED_PINCTRL_PIN(L21),
1928 ASPEED_PINCTRL_PIN(L22),
1929 ASPEED_PINCTRL_PIN(L3),
1930 ASPEED_PINCTRL_PIN(L4),
1931 ASPEED_PINCTRL_PIN(L5),
1932 ASPEED_PINCTRL_PIN(M1),
1933 ASPEED_PINCTRL_PIN(M18),
1934 ASPEED_PINCTRL_PIN(M19),
1935 ASPEED_PINCTRL_PIN(M2),
1936 ASPEED_PINCTRL_PIN(M20),
1937 ASPEED_PINCTRL_PIN(M21),
1938 ASPEED_PINCTRL_PIN(M22),
1939 ASPEED_PINCTRL_PIN(M3),
1940 ASPEED_PINCTRL_PIN(M4),
1941 ASPEED_PINCTRL_PIN(M5),
1942 ASPEED_PINCTRL_PIN(N1),
1943 ASPEED_PINCTRL_PIN(N18),
1944 ASPEED_PINCTRL_PIN(N19),
1945 ASPEED_PINCTRL_PIN(N2),
1946 ASPEED_PINCTRL_PIN(N20),
1947 ASPEED_PINCTRL_PIN(N21),
1948 ASPEED_PINCTRL_PIN(N22),
1949 ASPEED_PINCTRL_PIN(N3),
1950 ASPEED_PINCTRL_PIN(N4),
1951 ASPEED_PINCTRL_PIN(N5),
1952 ASPEED_PINCTRL_PIN(P18),
1953 ASPEED_PINCTRL_PIN(P19),
1954 ASPEED_PINCTRL_PIN(P20),
1955 ASPEED_PINCTRL_PIN(P21),
1956 ASPEED_PINCTRL_PIN(P22),
1957 ASPEED_PINCTRL_PIN(P5),
1958 ASPEED_PINCTRL_PIN(R18),
1959 ASPEED_PINCTRL_PIN(R22),
1960 ASPEED_PINCTRL_PIN(T1),
1961 ASPEED_PINCTRL_PIN(T18),
1962 ASPEED_PINCTRL_PIN(T19),
1963 ASPEED_PINCTRL_PIN(T2),
1964 ASPEED_PINCTRL_PIN(T4),
1965 ASPEED_PINCTRL_PIN(T5),
1966 ASPEED_PINCTRL_PIN(U1),
1967 ASPEED_PINCTRL_PIN(U18),
1968 ASPEED_PINCTRL_PIN(U19),
1969 ASPEED_PINCTRL_PIN(U2),
1970 ASPEED_PINCTRL_PIN(U20),
1971 ASPEED_PINCTRL_PIN(U21),
1972 ASPEED_PINCTRL_PIN(U3),
1973 ASPEED_PINCTRL_PIN(U4),
1974 ASPEED_PINCTRL_PIN(U5),
1975 ASPEED_PINCTRL_PIN(V1),
1976 ASPEED_PINCTRL_PIN(V2),
1977 ASPEED_PINCTRL_PIN(V20),
1978 ASPEED_PINCTRL_PIN(V21),
1979 ASPEED_PINCTRL_PIN(V22),
1980 ASPEED_PINCTRL_PIN(V3),
1981 ASPEED_PINCTRL_PIN(V4),
1982 ASPEED_PINCTRL_PIN(V5),
1983 ASPEED_PINCTRL_PIN(V6),
1984 ASPEED_PINCTRL_PIN(V7),
1985 ASPEED_PINCTRL_PIN(W1),
1986 ASPEED_PINCTRL_PIN(W2),
1987 ASPEED_PINCTRL_PIN(W21),
1988 ASPEED_PINCTRL_PIN(W22),
1989 ASPEED_PINCTRL_PIN(W3),
1990 ASPEED_PINCTRL_PIN(W4),
1991 ASPEED_PINCTRL_PIN(W5),
1992 ASPEED_PINCTRL_PIN(W6),
1993 ASPEED_PINCTRL_PIN(W7),
1994 ASPEED_PINCTRL_PIN(Y1),
1995 ASPEED_PINCTRL_PIN(Y2),
1996 ASPEED_PINCTRL_PIN(Y21),
1997 ASPEED_PINCTRL_PIN(Y22),
1998 ASPEED_PINCTRL_PIN(Y3),
1999 ASPEED_PINCTRL_PIN(Y4),
2000 ASPEED_PINCTRL_PIN(Y5),
2001 ASPEED_PINCTRL_PIN(Y6),
2002 ASPEED_PINCTRL_PIN(Y7),
2005 static const struct aspeed_pin_group aspeed_g4_groups[] = {
2006 ASPEED_PINCTRL_GROUP(ACPI),
2007 ASPEED_PINCTRL_GROUP(ADC0),
2008 ASPEED_PINCTRL_GROUP(ADC1),
2009 ASPEED_PINCTRL_GROUP(ADC10),
2010 ASPEED_PINCTRL_GROUP(ADC11),
2011 ASPEED_PINCTRL_GROUP(ADC12),
2012 ASPEED_PINCTRL_GROUP(ADC13),
2013 ASPEED_PINCTRL_GROUP(ADC14),
2014 ASPEED_PINCTRL_GROUP(ADC15),
2015 ASPEED_PINCTRL_GROUP(ADC2),
2016 ASPEED_PINCTRL_GROUP(ADC3),
2017 ASPEED_PINCTRL_GROUP(ADC4),
2018 ASPEED_PINCTRL_GROUP(ADC5),
2019 ASPEED_PINCTRL_GROUP(ADC6),
2020 ASPEED_PINCTRL_GROUP(ADC7),
2021 ASPEED_PINCTRL_GROUP(ADC8),
2022 ASPEED_PINCTRL_GROUP(ADC9),
2023 ASPEED_PINCTRL_GROUP(BMCINT),
2024 ASPEED_PINCTRL_GROUP(DDCCLK),
2025 ASPEED_PINCTRL_GROUP(DDCDAT),
2026 ASPEED_PINCTRL_GROUP(EXTRST),
2027 ASPEED_PINCTRL_GROUP(FLACK),
2028 ASPEED_PINCTRL_GROUP(FLBUSY),
2029 ASPEED_PINCTRL_GROUP(FLWP),
2030 ASPEED_PINCTRL_GROUP(GPID),
2031 ASPEED_PINCTRL_GROUP(GPID0),
2032 ASPEED_PINCTRL_GROUP(GPID2),
2033 ASPEED_PINCTRL_GROUP(GPID4),
2034 ASPEED_PINCTRL_GROUP(GPID6),
2035 ASPEED_PINCTRL_GROUP(GPIE0),
2036 ASPEED_PINCTRL_GROUP(GPIE2),
2037 ASPEED_PINCTRL_GROUP(GPIE4),
2038 ASPEED_PINCTRL_GROUP(GPIE6),
2039 ASPEED_PINCTRL_GROUP(I2C10),
2040 ASPEED_PINCTRL_GROUP(I2C11),
2041 ASPEED_PINCTRL_GROUP(I2C12),
2042 ASPEED_PINCTRL_GROUP(I2C13),
2043 ASPEED_PINCTRL_GROUP(I2C14),
2044 ASPEED_PINCTRL_GROUP(I2C3),
2045 ASPEED_PINCTRL_GROUP(I2C4),
2046 ASPEED_PINCTRL_GROUP(I2C5),
2047 ASPEED_PINCTRL_GROUP(I2C6),
2048 ASPEED_PINCTRL_GROUP(I2C7),
2049 ASPEED_PINCTRL_GROUP(I2C8),
2050 ASPEED_PINCTRL_GROUP(I2C9),
2051 ASPEED_PINCTRL_GROUP(LPCPD),
2052 ASPEED_PINCTRL_GROUP(LPCPME),
2053 ASPEED_PINCTRL_GROUP(LPCRST),
2054 ASPEED_PINCTRL_GROUP(LPCSMI),
2055 ASPEED_PINCTRL_GROUP(MAC1LINK),
2056 ASPEED_PINCTRL_GROUP(MAC2LINK),
2057 ASPEED_PINCTRL_GROUP(MDIO1),
2058 ASPEED_PINCTRL_GROUP(MDIO2),
2059 ASPEED_PINCTRL_GROUP(NCTS1),
2060 ASPEED_PINCTRL_GROUP(NCTS2),
2061 ASPEED_PINCTRL_GROUP(NCTS3),
2062 ASPEED_PINCTRL_GROUP(NCTS4),
2063 ASPEED_PINCTRL_GROUP(NDCD1),
2064 ASPEED_PINCTRL_GROUP(NDCD2),
2065 ASPEED_PINCTRL_GROUP(NDCD3),
2066 ASPEED_PINCTRL_GROUP(NDCD4),
2067 ASPEED_PINCTRL_GROUP(NDSR1),
2068 ASPEED_PINCTRL_GROUP(NDSR2),
2069 ASPEED_PINCTRL_GROUP(NDSR3),
2070 ASPEED_PINCTRL_GROUP(NDSR4),
2071 ASPEED_PINCTRL_GROUP(NDTR1),
2072 ASPEED_PINCTRL_GROUP(NDTR2),
2073 ASPEED_PINCTRL_GROUP(NDTR3),
2074 ASPEED_PINCTRL_GROUP(NDTR4),
2075 ASPEED_PINCTRL_GROUP(NDTS4),
2076 ASPEED_PINCTRL_GROUP(NRI1),
2077 ASPEED_PINCTRL_GROUP(NRI2),
2078 ASPEED_PINCTRL_GROUP(NRI3),
2079 ASPEED_PINCTRL_GROUP(NRI4),
2080 ASPEED_PINCTRL_GROUP(NRTS1),
2081 ASPEED_PINCTRL_GROUP(NRTS2),
2082 ASPEED_PINCTRL_GROUP(NRTS3),
2083 ASPEED_PINCTRL_GROUP(OSCCLK),
2084 ASPEED_PINCTRL_GROUP(PWM0),
2085 ASPEED_PINCTRL_GROUP(PWM1),
2086 ASPEED_PINCTRL_GROUP(PWM2),
2087 ASPEED_PINCTRL_GROUP(PWM3),
2088 ASPEED_PINCTRL_GROUP(PWM4),
2089 ASPEED_PINCTRL_GROUP(PWM5),
2090 ASPEED_PINCTRL_GROUP(PWM6),
2091 ASPEED_PINCTRL_GROUP(PWM7),
2092 ASPEED_PINCTRL_GROUP(RGMII1),
2093 ASPEED_PINCTRL_GROUP(RGMII2),
2094 ASPEED_PINCTRL_GROUP(RMII1),
2095 ASPEED_PINCTRL_GROUP(RMII2),
2096 ASPEED_PINCTRL_GROUP(ROM16),
2097 ASPEED_PINCTRL_GROUP(ROM8),
2098 ASPEED_PINCTRL_GROUP(ROMCS1),
2099 ASPEED_PINCTRL_GROUP(ROMCS2),
2100 ASPEED_PINCTRL_GROUP(ROMCS3),
2101 ASPEED_PINCTRL_GROUP(ROMCS4),
2102 ASPEED_PINCTRL_GROUP(RXD1),
2103 ASPEED_PINCTRL_GROUP(RXD2),
2104 ASPEED_PINCTRL_GROUP(RXD3),
2105 ASPEED_PINCTRL_GROUP(RXD4),
2106 ASPEED_PINCTRL_GROUP(SALT1),
2107 ASPEED_PINCTRL_GROUP(SALT2),
2108 ASPEED_PINCTRL_GROUP(SALT3),
2109 ASPEED_PINCTRL_GROUP(SALT4),
2110 ASPEED_PINCTRL_GROUP(SD1),
2111 ASPEED_PINCTRL_GROUP(SD2),
2112 ASPEED_PINCTRL_GROUP(SGPMCK),
2113 ASPEED_PINCTRL_GROUP(SGPMI),
2114 ASPEED_PINCTRL_GROUP(SGPMLD),
2115 ASPEED_PINCTRL_GROUP(SGPMO),
2116 ASPEED_PINCTRL_GROUP(SGPSCK),
2117 ASPEED_PINCTRL_GROUP(SGPSI0),
2118 ASPEED_PINCTRL_GROUP(SGPSI1),
2119 ASPEED_PINCTRL_GROUP(SGPSLD),
2120 ASPEED_PINCTRL_GROUP(SIOONCTRL),
2121 ASPEED_PINCTRL_GROUP(SIOPBI),
2122 ASPEED_PINCTRL_GROUP(SIOPBO),
2123 ASPEED_PINCTRL_GROUP(SIOPWREQ),
2124 ASPEED_PINCTRL_GROUP(SIOPWRGD),
2125 ASPEED_PINCTRL_GROUP(SIOS3),
2126 ASPEED_PINCTRL_GROUP(SIOS5),
2127 ASPEED_PINCTRL_GROUP(SIOSCI),
2128 ASPEED_PINCTRL_GROUP(SPI1),
2129 ASPEED_PINCTRL_GROUP(SPI1DEBUG),
2130 ASPEED_PINCTRL_GROUP(SPI1PASSTHRU),
2131 ASPEED_PINCTRL_GROUP(SPICS1),
2132 ASPEED_PINCTRL_GROUP(TIMER3),
2133 ASPEED_PINCTRL_GROUP(TIMER4),
2134 ASPEED_PINCTRL_GROUP(TIMER5),
2135 ASPEED_PINCTRL_GROUP(TIMER6),
2136 ASPEED_PINCTRL_GROUP(TIMER7),
2137 ASPEED_PINCTRL_GROUP(TIMER8),
2138 ASPEED_PINCTRL_GROUP(TXD1),
2139 ASPEED_PINCTRL_GROUP(TXD2),
2140 ASPEED_PINCTRL_GROUP(TXD3),
2141 ASPEED_PINCTRL_GROUP(TXD4),
2142 ASPEED_PINCTRL_GROUP(UART6),
2143 ASPEED_PINCTRL_GROUP(USB11D1),
2144 ASPEED_PINCTRL_GROUP(USB11H2),
2145 ASPEED_PINCTRL_GROUP(USB2D1),
2146 ASPEED_PINCTRL_GROUP(USB2H1),
2147 ASPEED_PINCTRL_GROUP(USBCKI),
2148 ASPEED_PINCTRL_GROUP(VGABIOS_ROM),
2149 ASPEED_PINCTRL_GROUP(VGAHS),
2150 ASPEED_PINCTRL_GROUP(VGAVS),
2151 ASPEED_PINCTRL_GROUP(VPI18),
2152 ASPEED_PINCTRL_GROUP(VPI24),
2153 ASPEED_PINCTRL_GROUP(VPI30),
2154 ASPEED_PINCTRL_GROUP(VPO12),
2155 ASPEED_PINCTRL_GROUP(VPO24),
2156 ASPEED_PINCTRL_GROUP(WDTRST1),
2157 ASPEED_PINCTRL_GROUP(WDTRST2),
2160 static const struct aspeed_pin_function aspeed_g4_functions[] = {
2161 ASPEED_PINCTRL_FUNC(ACPI),
2162 ASPEED_PINCTRL_FUNC(ADC0),
2163 ASPEED_PINCTRL_FUNC(ADC1),
2164 ASPEED_PINCTRL_FUNC(ADC10),
2165 ASPEED_PINCTRL_FUNC(ADC11),
2166 ASPEED_PINCTRL_FUNC(ADC12),
2167 ASPEED_PINCTRL_FUNC(ADC13),
2168 ASPEED_PINCTRL_FUNC(ADC14),
2169 ASPEED_PINCTRL_FUNC(ADC15),
2170 ASPEED_PINCTRL_FUNC(ADC2),
2171 ASPEED_PINCTRL_FUNC(ADC3),
2172 ASPEED_PINCTRL_FUNC(ADC4),
2173 ASPEED_PINCTRL_FUNC(ADC5),
2174 ASPEED_PINCTRL_FUNC(ADC6),
2175 ASPEED_PINCTRL_FUNC(ADC7),
2176 ASPEED_PINCTRL_FUNC(ADC8),
2177 ASPEED_PINCTRL_FUNC(ADC9),
2178 ASPEED_PINCTRL_FUNC(BMCINT),
2179 ASPEED_PINCTRL_FUNC(DDCCLK),
2180 ASPEED_PINCTRL_FUNC(DDCDAT),
2181 ASPEED_PINCTRL_FUNC(EXTRST),
2182 ASPEED_PINCTRL_FUNC(FLACK),
2183 ASPEED_PINCTRL_FUNC(FLBUSY),
2184 ASPEED_PINCTRL_FUNC(FLWP),
2185 ASPEED_PINCTRL_FUNC(GPID),
2186 ASPEED_PINCTRL_FUNC(GPID0),
2187 ASPEED_PINCTRL_FUNC(GPID2),
2188 ASPEED_PINCTRL_FUNC(GPID4),
2189 ASPEED_PINCTRL_FUNC(GPID6),
2190 ASPEED_PINCTRL_FUNC(GPIE0),
2191 ASPEED_PINCTRL_FUNC(GPIE2),
2192 ASPEED_PINCTRL_FUNC(GPIE4),
2193 ASPEED_PINCTRL_FUNC(GPIE6),
2194 ASPEED_PINCTRL_FUNC(I2C10),
2195 ASPEED_PINCTRL_FUNC(I2C11),
2196 ASPEED_PINCTRL_FUNC(I2C12),
2197 ASPEED_PINCTRL_FUNC(I2C13),
2198 ASPEED_PINCTRL_FUNC(I2C14),
2199 ASPEED_PINCTRL_FUNC(I2C3),
2200 ASPEED_PINCTRL_FUNC(I2C4),
2201 ASPEED_PINCTRL_FUNC(I2C5),
2202 ASPEED_PINCTRL_FUNC(I2C6),
2203 ASPEED_PINCTRL_FUNC(I2C7),
2204 ASPEED_PINCTRL_FUNC(I2C8),
2205 ASPEED_PINCTRL_FUNC(I2C9),
2206 ASPEED_PINCTRL_FUNC(LPCPD),
2207 ASPEED_PINCTRL_FUNC(LPCPME),
2208 ASPEED_PINCTRL_FUNC(LPCRST),
2209 ASPEED_PINCTRL_FUNC(LPCSMI),
2210 ASPEED_PINCTRL_FUNC(MAC1LINK),
2211 ASPEED_PINCTRL_FUNC(MAC2LINK),
2212 ASPEED_PINCTRL_FUNC(MDIO1),
2213 ASPEED_PINCTRL_FUNC(MDIO2),
2214 ASPEED_PINCTRL_FUNC(NCTS1),
2215 ASPEED_PINCTRL_FUNC(NCTS2),
2216 ASPEED_PINCTRL_FUNC(NCTS3),
2217 ASPEED_PINCTRL_FUNC(NCTS4),
2218 ASPEED_PINCTRL_FUNC(NDCD1),
2219 ASPEED_PINCTRL_FUNC(NDCD2),
2220 ASPEED_PINCTRL_FUNC(NDCD3),
2221 ASPEED_PINCTRL_FUNC(NDCD4),
2222 ASPEED_PINCTRL_FUNC(NDSR1),
2223 ASPEED_PINCTRL_FUNC(NDSR2),
2224 ASPEED_PINCTRL_FUNC(NDSR3),
2225 ASPEED_PINCTRL_FUNC(NDSR4),
2226 ASPEED_PINCTRL_FUNC(NDTR1),
2227 ASPEED_PINCTRL_FUNC(NDTR2),
2228 ASPEED_PINCTRL_FUNC(NDTR3),
2229 ASPEED_PINCTRL_FUNC(NDTR4),
2230 ASPEED_PINCTRL_FUNC(NDTS4),
2231 ASPEED_PINCTRL_FUNC(NRI1),
2232 ASPEED_PINCTRL_FUNC(NRI2),
2233 ASPEED_PINCTRL_FUNC(NRI3),
2234 ASPEED_PINCTRL_FUNC(NRI4),
2235 ASPEED_PINCTRL_FUNC(NRTS1),
2236 ASPEED_PINCTRL_FUNC(NRTS2),
2237 ASPEED_PINCTRL_FUNC(NRTS3),
2238 ASPEED_PINCTRL_FUNC(OSCCLK),
2239 ASPEED_PINCTRL_FUNC(PWM0),
2240 ASPEED_PINCTRL_FUNC(PWM1),
2241 ASPEED_PINCTRL_FUNC(PWM2),
2242 ASPEED_PINCTRL_FUNC(PWM3),
2243 ASPEED_PINCTRL_FUNC(PWM4),
2244 ASPEED_PINCTRL_FUNC(PWM5),
2245 ASPEED_PINCTRL_FUNC(PWM6),
2246 ASPEED_PINCTRL_FUNC(PWM7),
2247 ASPEED_PINCTRL_FUNC(RGMII1),
2248 ASPEED_PINCTRL_FUNC(RGMII2),
2249 ASPEED_PINCTRL_FUNC(RMII1),
2250 ASPEED_PINCTRL_FUNC(RMII2),
2251 ASPEED_PINCTRL_FUNC(ROM16),
2252 ASPEED_PINCTRL_FUNC(ROM8),
2253 ASPEED_PINCTRL_FUNC(ROMCS1),
2254 ASPEED_PINCTRL_FUNC(ROMCS2),
2255 ASPEED_PINCTRL_FUNC(ROMCS3),
2256 ASPEED_PINCTRL_FUNC(ROMCS4),
2257 ASPEED_PINCTRL_FUNC(RXD1),
2258 ASPEED_PINCTRL_FUNC(RXD2),
2259 ASPEED_PINCTRL_FUNC(RXD3),
2260 ASPEED_PINCTRL_FUNC(RXD4),
2261 ASPEED_PINCTRL_FUNC(SALT1),
2262 ASPEED_PINCTRL_FUNC(SALT2),
2263 ASPEED_PINCTRL_FUNC(SALT3),
2264 ASPEED_PINCTRL_FUNC(SALT4),
2265 ASPEED_PINCTRL_FUNC(SD1),
2266 ASPEED_PINCTRL_FUNC(SD2),
2267 ASPEED_PINCTRL_FUNC(SGPMCK),
2268 ASPEED_PINCTRL_FUNC(SGPMI),
2269 ASPEED_PINCTRL_FUNC(SGPMLD),
2270 ASPEED_PINCTRL_FUNC(SGPMO),
2271 ASPEED_PINCTRL_FUNC(SGPSCK),
2272 ASPEED_PINCTRL_FUNC(SGPSI0),
2273 ASPEED_PINCTRL_FUNC(SGPSI1),
2274 ASPEED_PINCTRL_FUNC(SGPSLD),
2275 ASPEED_PINCTRL_FUNC(SIOONCTRL),
2276 ASPEED_PINCTRL_FUNC(SIOPBI),
2277 ASPEED_PINCTRL_FUNC(SIOPBO),
2278 ASPEED_PINCTRL_FUNC(SIOPWREQ),
2279 ASPEED_PINCTRL_FUNC(SIOPWRGD),
2280 ASPEED_PINCTRL_FUNC(SIOS3),
2281 ASPEED_PINCTRL_FUNC(SIOS5),
2282 ASPEED_PINCTRL_FUNC(SIOSCI),
2283 ASPEED_PINCTRL_FUNC(SPI1),
2284 ASPEED_PINCTRL_FUNC(SPI1DEBUG),
2285 ASPEED_PINCTRL_FUNC(SPI1PASSTHRU),
2286 ASPEED_PINCTRL_FUNC(SPICS1),
2287 ASPEED_PINCTRL_FUNC(TIMER3),
2288 ASPEED_PINCTRL_FUNC(TIMER4),
2289 ASPEED_PINCTRL_FUNC(TIMER5),
2290 ASPEED_PINCTRL_FUNC(TIMER6),
2291 ASPEED_PINCTRL_FUNC(TIMER7),
2292 ASPEED_PINCTRL_FUNC(TIMER8),
2293 ASPEED_PINCTRL_FUNC(TXD1),
2294 ASPEED_PINCTRL_FUNC(TXD2),
2295 ASPEED_PINCTRL_FUNC(TXD3),
2296 ASPEED_PINCTRL_FUNC(TXD4),
2297 ASPEED_PINCTRL_FUNC(UART6),
2298 ASPEED_PINCTRL_FUNC(USB11D1),
2299 ASPEED_PINCTRL_FUNC(USB11H2),
2300 ASPEED_PINCTRL_FUNC(USB2D1),
2301 ASPEED_PINCTRL_FUNC(USB2H1),
2302 ASPEED_PINCTRL_FUNC(USBCKI),
2303 ASPEED_PINCTRL_FUNC(VGABIOS_ROM),
2304 ASPEED_PINCTRL_FUNC(VGAHS),
2305 ASPEED_PINCTRL_FUNC(VGAVS),
2306 ASPEED_PINCTRL_FUNC(VPI18),
2307 ASPEED_PINCTRL_FUNC(VPI24),
2308 ASPEED_PINCTRL_FUNC(VPI30),
2309 ASPEED_PINCTRL_FUNC(VPO12),
2310 ASPEED_PINCTRL_FUNC(VPO24),
2311 ASPEED_PINCTRL_FUNC(WDTRST1),
2312 ASPEED_PINCTRL_FUNC(WDTRST2),
2315 static const struct aspeed_pin_config aspeed_g4_configs[] = {
2316 /* GPIO banks ranges [A, B], [D, J], [M, R] */
2317 { PIN_CONFIG_BIAS_PULL_DOWN, { D6, D5 }, SCU8C, 16 },
2318 { PIN_CONFIG_BIAS_DISABLE, { D6, D5 }, SCU8C, 16 },
2319 { PIN_CONFIG_BIAS_PULL_DOWN, { J21, E18 }, SCU8C, 17 },
2320 { PIN_CONFIG_BIAS_DISABLE, { J21, E18 }, SCU8C, 17 },
2321 { PIN_CONFIG_BIAS_PULL_DOWN, { A18, E15 }, SCU8C, 19 },
2322 { PIN_CONFIG_BIAS_DISABLE, { A18, E15 }, SCU8C, 19 },
2323 { PIN_CONFIG_BIAS_PULL_DOWN, { D15, B14 }, SCU8C, 20 },
2324 { PIN_CONFIG_BIAS_DISABLE, { D15, B14 }, SCU8C, 20 },
2325 { PIN_CONFIG_BIAS_PULL_DOWN, { D18, C17 }, SCU8C, 21 },
2326 { PIN_CONFIG_BIAS_DISABLE, { D18, C17 }, SCU8C, 21 },
2327 { PIN_CONFIG_BIAS_PULL_DOWN, { A14, U18 }, SCU8C, 22 },
2328 { PIN_CONFIG_BIAS_DISABLE, { A14, U18 }, SCU8C, 22 },
2329 { PIN_CONFIG_BIAS_PULL_DOWN, { A8, E7 }, SCU8C, 23 },
2330 { PIN_CONFIG_BIAS_DISABLE, { A8, E7 }, SCU8C, 23 },
2331 { PIN_CONFIG_BIAS_PULL_DOWN, { C22, E20 }, SCU8C, 24 },
2332 { PIN_CONFIG_BIAS_DISABLE, { C22, E20 }, SCU8C, 24 },
2333 { PIN_CONFIG_BIAS_PULL_DOWN, { J5, T1 }, SCU8C, 25 },
2334 { PIN_CONFIG_BIAS_DISABLE, { J5, T1 }, SCU8C, 25 },
2335 { PIN_CONFIG_BIAS_PULL_DOWN, { U1, U5 }, SCU8C, 26 },
2336 { PIN_CONFIG_BIAS_DISABLE, { U1, U5 }, SCU8C, 26 },
2337 { PIN_CONFIG_BIAS_PULL_DOWN, { V3, V5 }, SCU8C, 27 },
2338 { PIN_CONFIG_BIAS_DISABLE, { V3, V5 }, SCU8C, 27 },
2339 { PIN_CONFIG_BIAS_PULL_DOWN, { W4, AB2 }, SCU8C, 28 },
2340 { PIN_CONFIG_BIAS_DISABLE, { W4, AB2 }, SCU8C, 28 },
2341 { PIN_CONFIG_BIAS_PULL_DOWN, { V6, V7 }, SCU8C, 29 },
2342 { PIN_CONFIG_BIAS_DISABLE, { V6, V7 }, SCU8C, 29 },
2343 { PIN_CONFIG_BIAS_PULL_DOWN, { Y6, AB7 }, SCU8C, 30 },
2344 { PIN_CONFIG_BIAS_DISABLE, { Y6, AB7 }, SCU8C, 30 },
2345 { PIN_CONFIG_BIAS_PULL_DOWN, { V20, A5 }, SCU8C, 31 },
2346 { PIN_CONFIG_BIAS_DISABLE, { V20, A5 }, SCU8C, 31 },
2348 /* GPIOs T[0-5] (RGMII1 Tx pins) */
2349 { PIN_CONFIG_DRIVE_STRENGTH, { A12, A13 }, SCU90, 9 },
2350 { PIN_CONFIG_BIAS_PULL_DOWN, { A12, A13 }, SCU90, 12 },
2351 { PIN_CONFIG_BIAS_DISABLE, { A12, A13 }, SCU90, 12 },
2353 /* GPIOs T[6-7], U[0-3] (RGMII2 TX pins) */
2354 { PIN_CONFIG_DRIVE_STRENGTH, { D9, D10 }, SCU90, 11 },
2355 { PIN_CONFIG_BIAS_PULL_DOWN, { D9, D10 }, SCU90, 14 },
2356 { PIN_CONFIG_BIAS_DISABLE, { D9, D10 }, SCU90, 14 },
2358 /* GPIOs U[4-7], V[0-1] (RGMII1 Rx pins) */
2359 { PIN_CONFIG_BIAS_PULL_DOWN, { E11, E10 }, SCU90, 13 },
2360 { PIN_CONFIG_BIAS_DISABLE, { E11, E10 }, SCU90, 13 },
2362 /* GPIOs V[2-7] (RGMII2 Rx pins) */
2363 { PIN_CONFIG_BIAS_PULL_DOWN, { C9, C8 }, SCU90, 15 },
2364 { PIN_CONFIG_BIAS_DISABLE, { C9, C8 }, SCU90, 15 },
2366 /* ADC pull-downs (SCUA8[19:4]) */
2367 { PIN_CONFIG_BIAS_PULL_DOWN, { L5, L5 }, SCUA8, 4 },
2368 { PIN_CONFIG_BIAS_DISABLE, { L5, L5 }, SCUA8, 4 },
2369 { PIN_CONFIG_BIAS_PULL_DOWN, { L4, L4 }, SCUA8, 5 },
2370 { PIN_CONFIG_BIAS_DISABLE, { L4, L4 }, SCUA8, 5 },
2371 { PIN_CONFIG_BIAS_PULL_DOWN, { L3, L3 }, SCUA8, 6 },
2372 { PIN_CONFIG_BIAS_DISABLE, { L3, L3 }, SCUA8, 6 },
2373 { PIN_CONFIG_BIAS_PULL_DOWN, { L2, L2 }, SCUA8, 7 },
2374 { PIN_CONFIG_BIAS_DISABLE, { L2, L2 }, SCUA8, 7 },
2375 { PIN_CONFIG_BIAS_PULL_DOWN, { L1, L1 }, SCUA8, 8 },
2376 { PIN_CONFIG_BIAS_DISABLE, { L1, L1 }, SCUA8, 8 },
2377 { PIN_CONFIG_BIAS_PULL_DOWN, { M5, M5 }, SCUA8, 9 },
2378 { PIN_CONFIG_BIAS_DISABLE, { M5, M5 }, SCUA8, 9 },
2379 { PIN_CONFIG_BIAS_PULL_DOWN, { M4, M4 }, SCUA8, 10 },
2380 { PIN_CONFIG_BIAS_DISABLE, { M4, M4 }, SCUA8, 10 },
2381 { PIN_CONFIG_BIAS_PULL_DOWN, { M3, M3 }, SCUA8, 11 },
2382 { PIN_CONFIG_BIAS_DISABLE, { M3, M3 }, SCUA8, 11 },
2383 { PIN_CONFIG_BIAS_PULL_DOWN, { M2, M2 }, SCUA8, 12 },
2384 { PIN_CONFIG_BIAS_DISABLE, { M2, M2 }, SCUA8, 12 },
2385 { PIN_CONFIG_BIAS_PULL_DOWN, { M1, M1 }, SCUA8, 13 },
2386 { PIN_CONFIG_BIAS_DISABLE, { M1, M1 }, SCUA8, 13 },
2387 { PIN_CONFIG_BIAS_PULL_DOWN, { N5, N5 }, SCUA8, 14 },
2388 { PIN_CONFIG_BIAS_DISABLE, { N5, N5 }, SCUA8, 14 },
2389 { PIN_CONFIG_BIAS_PULL_DOWN, { N4, N4 }, SCUA8, 15 },
2390 { PIN_CONFIG_BIAS_DISABLE, { N4, N4 }, SCUA8, 15 },
2391 { PIN_CONFIG_BIAS_PULL_DOWN, { N3, N3 }, SCUA8, 16 },
2392 { PIN_CONFIG_BIAS_DISABLE, { N3, N3 }, SCUA8, 16 },
2393 { PIN_CONFIG_BIAS_PULL_DOWN, { N2, N2 }, SCUA8, 17 },
2394 { PIN_CONFIG_BIAS_DISABLE, { N2, N2 }, SCUA8, 17 },
2395 { PIN_CONFIG_BIAS_PULL_DOWN, { N1, N1 }, SCUA8, 18 },
2396 { PIN_CONFIG_BIAS_DISABLE, { N1, N1 }, SCUA8, 18 },
2397 { PIN_CONFIG_BIAS_PULL_DOWN, { P5, P5 }, SCUA8, 19 },
2398 { PIN_CONFIG_BIAS_DISABLE, { P5, P5 }, SCUA8, 19 },
2401 * Debounce settings for GPIOs D and E passthrough mode are in
2402 * SCUA8[27:20] and so are managed by pinctrl. Normal GPIO debounce for
2403 * banks D and E is handled by the GPIO driver - GPIO passthrough is
2404 * treated like any other non-GPIO mux function. There is a catch
2405 * however, in that the debounce period is configured in the GPIO
2406 * controller. Due to this tangle between GPIO and pinctrl we don't yet
2407 * fully support pass-through debounce.
2409 { PIN_CONFIG_INPUT_DEBOUNCE, { A18, D16 }, SCUA8, 20 },
2410 { PIN_CONFIG_INPUT_DEBOUNCE, { B17, A17 }, SCUA8, 21 },
2411 { PIN_CONFIG_INPUT_DEBOUNCE, { C16, B16 }, SCUA8, 22 },
2412 { PIN_CONFIG_INPUT_DEBOUNCE, { A16, E15 }, SCUA8, 23 },
2413 { PIN_CONFIG_INPUT_DEBOUNCE, { D15, C15 }, SCUA8, 24 },
2414 { PIN_CONFIG_INPUT_DEBOUNCE, { B15, A15 }, SCUA8, 25 },
2415 { PIN_CONFIG_INPUT_DEBOUNCE, { E14, D14 }, SCUA8, 26 },
2416 { PIN_CONFIG_INPUT_DEBOUNCE, { C14, B14 }, SCUA8, 27 },
2419 static int aspeed_g4_sig_expr_set(const struct aspeed_pinmux_data *ctx,
2420 const struct aspeed_sig_expr *expr,
2426 for (i = 0; i < expr->ndescs; i++) {
2427 const struct aspeed_sig_desc *desc = &expr->descs[i];
2428 u32 pattern = enable ? desc->enable : desc->disable;
2429 u32 val = (pattern << __ffs(desc->mask));
2431 if (!ctx->maps[desc->ip])
2435 * Strap registers are configured in hardware or by early-boot
2436 * firmware. Treat them as read-only despite that we can write
2437 * them. This may mean that certain functions cannot be
2438 * deconfigured and is the reason we re-evaluate after writing
2439 * all descriptor bits.
2441 * Port D and port E GPIO loopback modes are the only exception
2442 * as those are commonly used with front-panel buttons to allow
2443 * normal operation of the host when the BMC is powered off or
2444 * fails to boot. Once the BMC has booted, the loopback mode
2445 * must be disabled for the BMC to control host power-on and
2448 if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1 &&
2449 !(desc->mask & (BIT(21) | BIT(22))))
2452 if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2)
2455 ret = regmap_update_bits(ctx->maps[desc->ip], desc->reg,
2462 ret = aspeed_sig_expr_eval(ctx, expr, enable);
2472 static const struct aspeed_pinmux_ops aspeed_g4_ops = {
2473 .set = aspeed_g4_sig_expr_set,
2476 static struct aspeed_pinctrl_data aspeed_g4_pinctrl_data = {
2477 .pins = aspeed_g4_pins,
2478 .npins = ARRAY_SIZE(aspeed_g4_pins),
2480 .ops = &aspeed_g4_ops,
2481 .groups = aspeed_g4_groups,
2482 .ngroups = ARRAY_SIZE(aspeed_g4_groups),
2483 .functions = aspeed_g4_functions,
2484 .nfunctions = ARRAY_SIZE(aspeed_g4_functions),
2486 .configs = aspeed_g4_configs,
2487 .nconfigs = ARRAY_SIZE(aspeed_g4_configs),
2490 static const struct pinmux_ops aspeed_g4_pinmux_ops = {
2491 .get_functions_count = aspeed_pinmux_get_fn_count,
2492 .get_function_name = aspeed_pinmux_get_fn_name,
2493 .get_function_groups = aspeed_pinmux_get_fn_groups,
2494 .set_mux = aspeed_pinmux_set_mux,
2495 .gpio_request_enable = aspeed_gpio_request_enable,
2499 static const struct pinctrl_ops aspeed_g4_pinctrl_ops = {
2500 .get_groups_count = aspeed_pinctrl_get_groups_count,
2501 .get_group_name = aspeed_pinctrl_get_group_name,
2502 .get_group_pins = aspeed_pinctrl_get_group_pins,
2503 .pin_dbg_show = aspeed_pinctrl_pin_dbg_show,
2504 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
2505 .dt_free_map = pinctrl_utils_free_map,
2508 static const struct pinconf_ops aspeed_g4_conf_ops = {
2510 .pin_config_get = aspeed_pin_config_get,
2511 .pin_config_set = aspeed_pin_config_set,
2512 .pin_config_group_get = aspeed_pin_config_group_get,
2513 .pin_config_group_set = aspeed_pin_config_group_set,
2516 static struct pinctrl_desc aspeed_g4_pinctrl_desc = {
2517 .name = "aspeed-g4-pinctrl",
2518 .pins = aspeed_g4_pins,
2519 .npins = ARRAY_SIZE(aspeed_g4_pins),
2520 .pctlops = &aspeed_g4_pinctrl_ops,
2521 .pmxops = &aspeed_g4_pinmux_ops,
2522 .confops = &aspeed_g4_conf_ops,
2525 static int aspeed_g4_pinctrl_probe(struct platform_device *pdev)
2529 for (i = 0; i < ARRAY_SIZE(aspeed_g4_pins); i++)
2530 aspeed_g4_pins[i].number = i;
2532 return aspeed_pinctrl_probe(pdev, &aspeed_g4_pinctrl_desc,
2533 &aspeed_g4_pinctrl_data);
2536 static const struct of_device_id aspeed_g4_pinctrl_of_match[] = {
2537 { .compatible = "aspeed,ast2400-pinctrl", },
2538 { .compatible = "aspeed,g4-pinctrl", },
2542 static struct platform_driver aspeed_g4_pinctrl_driver = {
2543 .probe = aspeed_g4_pinctrl_probe,
2545 .name = "aspeed-g4-pinctrl",
2546 .of_match_table = aspeed_g4_pinctrl_of_match,
2550 static int aspeed_g4_pinctrl_init(void)
2552 return platform_driver_register(&aspeed_g4_pinctrl_driver);
2555 arch_initcall(aspeed_g4_pinctrl_init);