2 * PCIe AER software error injection support.
4 * Debuging PCIe AER code is quite difficult because it is hard to
5 * trigger various real hardware errors. Software based error
6 * injection can fake almost all kinds of errors with the help of a
7 * user space helper tool aer-inject, which can be gotten from:
8 * http://www.kernel.org/pub/linux/utils/pci/aer-inject/
10 * Copyright 2009 Intel Corporation.
11 * Huang Ying <ying.huang@intel.com>
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; version 2
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/miscdevice.h>
23 #include <linux/pci.h>
24 #include <linux/slab.h>
26 #include <linux/uaccess.h>
27 #include <linux/stddef.h>
28 #include <linux/device.h>
31 /* Override the existing corrected and uncorrected error masks */
32 static bool aer_mask_override;
33 module_param(aer_mask_override, bool, 0);
35 struct aer_error_inj {
49 struct list_head list;
66 struct list_head list;
71 static LIST_HEAD(einjected);
73 static LIST_HEAD(pci_bus_ops_list);
75 /* Protect einjected and pci_bus_ops_list */
76 static DEFINE_SPINLOCK(inject_lock);
78 static void aer_error_init(struct aer_error *err, u32 domain,
79 unsigned int bus, unsigned int devfn,
82 INIT_LIST_HEAD(&err->list);
86 err->pos_cap_err = pos_cap_err;
89 /* inject_lock must be held before calling */
90 static struct aer_error *__find_aer_error(u32 domain, unsigned int bus,
93 struct aer_error *err;
95 list_for_each_entry(err, &einjected, list) {
96 if (domain == err->domain &&
104 /* inject_lock must be held before calling */
105 static struct aer_error *__find_aer_error_by_dev(struct pci_dev *dev)
107 int domain = pci_domain_nr(dev->bus);
110 return __find_aer_error(domain, dev->bus->number, dev->devfn);
113 /* inject_lock must be held before calling */
114 static struct pci_ops *__find_pci_bus_ops(struct pci_bus *bus)
116 struct pci_bus_ops *bus_ops;
118 list_for_each_entry(bus_ops, &pci_bus_ops_list, list) {
119 if (bus_ops->bus == bus)
125 static struct pci_bus_ops *pci_bus_ops_pop(void)
128 struct pci_bus_ops *bus_ops;
130 spin_lock_irqsave(&inject_lock, flags);
131 bus_ops = list_first_entry_or_null(&pci_bus_ops_list,
132 struct pci_bus_ops, list);
134 list_del(&bus_ops->list);
135 spin_unlock_irqrestore(&inject_lock, flags);
139 static u32 *find_pci_config_dword(struct aer_error *err, int where,
145 if (err->pos_cap_err == -1)
148 switch (where - err->pos_cap_err) {
149 case PCI_ERR_UNCOR_STATUS:
150 target = &err->uncor_status;
153 case PCI_ERR_COR_STATUS:
154 target = &err->cor_status;
157 case PCI_ERR_HEADER_LOG:
158 target = &err->header_log0;
160 case PCI_ERR_HEADER_LOG+4:
161 target = &err->header_log1;
163 case PCI_ERR_HEADER_LOG+8:
164 target = &err->header_log2;
166 case PCI_ERR_HEADER_LOG+12:
167 target = &err->header_log3;
169 case PCI_ERR_ROOT_STATUS:
170 target = &err->root_status;
173 case PCI_ERR_ROOT_ERR_SRC:
174 target = &err->source_id;
182 static int aer_inj_read_config(struct pci_bus *bus, unsigned int devfn,
183 int where, int size, u32 *val)
186 struct aer_error *err;
189 struct pci_ops *my_ops;
193 spin_lock_irqsave(&inject_lock, flags);
194 if (size != sizeof(u32))
196 domain = pci_domain_nr(bus);
199 err = __find_aer_error(domain, bus->number, devfn);
203 sim = find_pci_config_dword(err, where, NULL);
206 spin_unlock_irqrestore(&inject_lock, flags);
210 ops = __find_pci_bus_ops(bus);
212 * pci_lock must already be held, so we can directly
213 * manipulate bus->ops. Many config access functions,
214 * including pci_generic_config_read() require the original
215 * bus->ops be installed to function, so temporarily put them
220 rv = ops->read(bus, devfn, where, size, val);
222 spin_unlock_irqrestore(&inject_lock, flags);
226 static int aer_inj_write_config(struct pci_bus *bus, unsigned int devfn,
227 int where, int size, u32 val)
230 struct aer_error *err;
234 struct pci_ops *my_ops;
238 spin_lock_irqsave(&inject_lock, flags);
239 if (size != sizeof(u32))
241 domain = pci_domain_nr(bus);
244 err = __find_aer_error(domain, bus->number, devfn);
248 sim = find_pci_config_dword(err, where, &rw1cs);
254 spin_unlock_irqrestore(&inject_lock, flags);
258 ops = __find_pci_bus_ops(bus);
260 * pci_lock must already be held, so we can directly
261 * manipulate bus->ops. Many config access functions,
262 * including pci_generic_config_write() require the original
263 * bus->ops be installed to function, so temporarily put them
268 rv = ops->write(bus, devfn, where, size, val);
270 spin_unlock_irqrestore(&inject_lock, flags);
274 static struct pci_ops aer_inj_pci_ops = {
275 .read = aer_inj_read_config,
276 .write = aer_inj_write_config,
279 static void pci_bus_ops_init(struct pci_bus_ops *bus_ops,
283 INIT_LIST_HEAD(&bus_ops->list);
288 static int pci_bus_set_aer_ops(struct pci_bus *bus)
291 struct pci_bus_ops *bus_ops;
294 bus_ops = kmalloc(sizeof(*bus_ops), GFP_KERNEL);
297 ops = pci_bus_set_ops(bus, &aer_inj_pci_ops);
298 spin_lock_irqsave(&inject_lock, flags);
299 if (ops == &aer_inj_pci_ops)
301 pci_bus_ops_init(bus_ops, bus, ops);
302 list_add(&bus_ops->list, &pci_bus_ops_list);
305 spin_unlock_irqrestore(&inject_lock, flags);
310 static struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
313 if (!pci_is_pcie(dev))
315 if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
319 dev = dev->bus->self;
324 static int find_aer_device_iter(struct device *device, void *data)
326 struct pcie_device **result = data;
327 struct pcie_device *pcie_dev;
329 if (device->bus == &pcie_port_bus_type) {
330 pcie_dev = to_pcie_device(device);
331 if (pcie_dev->service & PCIE_PORT_SERVICE_AER) {
339 static int find_aer_device(struct pci_dev *dev, struct pcie_device **result)
341 return device_for_each_child(&dev->dev, result, find_aer_device_iter);
344 static int aer_inject(struct aer_error_inj *einj)
346 struct aer_error *err, *rperr;
347 struct aer_error *err_alloc = NULL, *rperr_alloc = NULL;
348 struct pci_dev *dev, *rpdev;
349 struct pcie_device *edev;
351 unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
352 int pos_cap_err, rp_pos_cap_err;
353 u32 sever, cor_mask, uncor_mask, cor_mask_orig = 0, uncor_mask_orig = 0;
356 dev = pci_get_domain_bus_and_slot(einj->domain, einj->bus, devfn);
359 rpdev = pcie_find_root_port(dev);
361 dev_err(&dev->dev, "aer_inject: Root port not found\n");
366 pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
368 dev_err(&dev->dev, "aer_inject: Device doesn't support AER\n");
369 ret = -EPROTONOSUPPORT;
372 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
373 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, &cor_mask);
374 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
377 rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
378 if (!rp_pos_cap_err) {
380 "aer_inject: Root port doesn't support AER\n");
381 ret = -EPROTONOSUPPORT;
385 err_alloc = kzalloc(sizeof(struct aer_error), GFP_KERNEL);
390 rperr_alloc = kzalloc(sizeof(struct aer_error), GFP_KERNEL);
396 if (aer_mask_override) {
397 cor_mask_orig = cor_mask;
398 cor_mask &= !(einj->cor_status);
399 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK,
402 uncor_mask_orig = uncor_mask;
403 uncor_mask &= !(einj->uncor_status);
404 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
408 spin_lock_irqsave(&inject_lock, flags);
410 err = __find_aer_error_by_dev(dev);
414 aer_error_init(err, einj->domain, einj->bus, devfn,
416 list_add(&err->list, &einjected);
418 err->uncor_status |= einj->uncor_status;
419 err->cor_status |= einj->cor_status;
420 err->header_log0 = einj->header_log0;
421 err->header_log1 = einj->header_log1;
422 err->header_log2 = einj->header_log2;
423 err->header_log3 = einj->header_log3;
425 if (!aer_mask_override && einj->cor_status &&
426 !(einj->cor_status & ~cor_mask)) {
429 "aer_inject: The correctable error(s) is masked by device\n");
430 spin_unlock_irqrestore(&inject_lock, flags);
433 if (!aer_mask_override && einj->uncor_status &&
434 !(einj->uncor_status & ~uncor_mask)) {
437 "aer_inject: The uncorrectable error(s) is masked by device\n");
438 spin_unlock_irqrestore(&inject_lock, flags);
442 rperr = __find_aer_error_by_dev(rpdev);
446 aer_error_init(rperr, pci_domain_nr(rpdev->bus),
447 rpdev->bus->number, rpdev->devfn,
449 list_add(&rperr->list, &einjected);
451 if (einj->cor_status) {
452 if (rperr->root_status & PCI_ERR_ROOT_COR_RCV)
453 rperr->root_status |= PCI_ERR_ROOT_MULTI_COR_RCV;
455 rperr->root_status |= PCI_ERR_ROOT_COR_RCV;
456 rperr->source_id &= 0xffff0000;
457 rperr->source_id |= (einj->bus << 8) | devfn;
459 if (einj->uncor_status) {
460 if (rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV)
461 rperr->root_status |= PCI_ERR_ROOT_MULTI_UNCOR_RCV;
462 if (sever & einj->uncor_status) {
463 rperr->root_status |= PCI_ERR_ROOT_FATAL_RCV;
464 if (!(rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV))
465 rperr->root_status |= PCI_ERR_ROOT_FIRST_FATAL;
467 rperr->root_status |= PCI_ERR_ROOT_NONFATAL_RCV;
468 rperr->root_status |= PCI_ERR_ROOT_UNCOR_RCV;
469 rperr->source_id &= 0x0000ffff;
470 rperr->source_id |= ((einj->bus << 8) | devfn) << 16;
472 spin_unlock_irqrestore(&inject_lock, flags);
474 if (aer_mask_override) {
475 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK,
477 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
481 ret = pci_bus_set_aer_ops(dev->bus);
484 ret = pci_bus_set_aer_ops(rpdev->bus);
488 if (find_aer_device(rpdev, &edev)) {
489 if (!get_service_data(edev)) {
490 dev_warn(&edev->device,
491 "aer_inject: AER service is not initialized\n");
492 ret = -EPROTONOSUPPORT;
495 dev_info(&edev->device,
496 "aer_inject: Injecting errors %08x/%08x into device %s\n",
497 einj->cor_status, einj->uncor_status, pci_name(dev));
500 dev_err(&rpdev->dev, "aer_inject: AER device not found\n");
510 static ssize_t aer_inject_write(struct file *filp, const char __user *ubuf,
511 size_t usize, loff_t *off)
513 struct aer_error_inj einj;
516 if (!capable(CAP_SYS_ADMIN))
518 if (usize < offsetof(struct aer_error_inj, domain) ||
519 usize > sizeof(einj))
522 memset(&einj, 0, sizeof(einj));
523 if (copy_from_user(&einj, ubuf, usize))
526 ret = aer_inject(&einj);
527 return ret ? ret : usize;
530 static const struct file_operations aer_inject_fops = {
531 .write = aer_inject_write,
532 .owner = THIS_MODULE,
533 .llseek = noop_llseek,
536 static struct miscdevice aer_inject_device = {
537 .minor = MISC_DYNAMIC_MINOR,
538 .name = "aer_inject",
539 .fops = &aer_inject_fops,
542 static int __init aer_inject_init(void)
544 return misc_register(&aer_inject_device);
547 static void __exit aer_inject_exit(void)
549 struct aer_error *err, *err_next;
551 struct pci_bus_ops *bus_ops;
553 misc_deregister(&aer_inject_device);
555 while ((bus_ops = pci_bus_ops_pop())) {
556 pci_bus_set_ops(bus_ops->bus, bus_ops->ops);
560 spin_lock_irqsave(&inject_lock, flags);
561 list_for_each_entry_safe(err, err_next, &einjected, list) {
562 list_del(&err->list);
565 spin_unlock_irqrestore(&inject_lock, flags);
568 module_init(aer_inject_init);
569 module_exit(aer_inject_exit);
571 MODULE_DESCRIPTION("PCIe AER software error injector");
572 MODULE_LICENSE("GPL");