3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
11 #include <linux/irq.h>
12 #include <linux/interrupt.h>
13 #include <linux/init.h>
14 #include <linux/ioport.h>
15 #include <linux/smp_lock.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
18 #include <linux/msi.h>
20 #include <asm/errno.h>
27 static struct kmem_cache* msi_cachep;
29 static int pci_msi_enable = 1;
31 static int msi_cache_init(void)
33 msi_cachep = kmem_cache_create("msi_cache", sizeof(struct msi_desc),
34 0, SLAB_HWCACHE_ALIGN, NULL, NULL);
41 static void msi_set_enable(struct pci_dev *dev, int enable)
46 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
48 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
49 control &= ~PCI_MSI_FLAGS_ENABLE;
51 control |= PCI_MSI_FLAGS_ENABLE;
52 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
56 static void msix_set_enable(struct pci_dev *dev, int enable)
61 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
63 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
64 control &= ~PCI_MSIX_FLAGS_ENABLE;
66 control |= PCI_MSIX_FLAGS_ENABLE;
67 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
71 static void msi_set_mask_bit(unsigned int irq, int flag)
73 struct msi_desc *entry;
75 entry = get_irq_msi(irq);
76 BUG_ON(!entry || !entry->dev);
77 switch (entry->msi_attrib.type) {
79 if (entry->msi_attrib.maskbit) {
83 pos = (long)entry->mask_base;
84 pci_read_config_dword(entry->dev, pos, &mask_bits);
87 pci_write_config_dword(entry->dev, pos, mask_bits);
92 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
93 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
94 writel(flag, entry->mask_base + offset);
103 void read_msi_msg(unsigned int irq, struct msi_msg *msg)
105 struct msi_desc *entry = get_irq_msi(irq);
106 switch(entry->msi_attrib.type) {
109 struct pci_dev *dev = entry->dev;
110 int pos = entry->msi_attrib.pos;
113 pci_read_config_dword(dev, msi_lower_address_reg(pos),
115 if (entry->msi_attrib.is_64) {
116 pci_read_config_dword(dev, msi_upper_address_reg(pos),
118 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
121 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
126 case PCI_CAP_ID_MSIX:
129 base = entry->mask_base +
130 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
132 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
133 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
134 msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
142 void write_msi_msg(unsigned int irq, struct msi_msg *msg)
144 struct msi_desc *entry = get_irq_msi(irq);
145 switch (entry->msi_attrib.type) {
148 struct pci_dev *dev = entry->dev;
149 int pos = entry->msi_attrib.pos;
151 pci_write_config_dword(dev, msi_lower_address_reg(pos),
153 if (entry->msi_attrib.is_64) {
154 pci_write_config_dword(dev, msi_upper_address_reg(pos),
156 pci_write_config_word(dev, msi_data_reg(pos, 1),
159 pci_write_config_word(dev, msi_data_reg(pos, 0),
164 case PCI_CAP_ID_MSIX:
167 base = entry->mask_base +
168 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
170 writel(msg->address_lo,
171 base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
172 writel(msg->address_hi,
173 base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
174 writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
182 void mask_msi_irq(unsigned int irq)
184 msi_set_mask_bit(irq, 1);
187 void unmask_msi_irq(unsigned int irq)
189 msi_set_mask_bit(irq, 0);
192 static int msi_free_irq(struct pci_dev* dev, int irq);
194 static int msi_init(void)
196 static int status = -ENOMEM;
201 status = msi_cache_init();
204 printk(KERN_WARNING "PCI: MSI cache init failed\n");
211 static struct msi_desc* alloc_msi_entry(void)
213 struct msi_desc *entry;
215 entry = kmem_cache_zalloc(msi_cachep, GFP_KERNEL);
219 entry->link.tail = entry->link.head = 0; /* single message */
226 static int __pci_save_msi_state(struct pci_dev *dev)
230 struct pci_cap_saved_state *save_state;
233 if (!dev->msi_enabled)
236 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
240 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u32) * 5,
243 printk(KERN_ERR "Out of memory in pci_save_msi_state\n");
246 cap = &save_state->data[0];
248 pci_read_config_dword(dev, pos, &cap[i++]);
249 control = cap[0] >> 16;
250 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, &cap[i++]);
251 if (control & PCI_MSI_FLAGS_64BIT) {
252 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, &cap[i++]);
253 pci_read_config_dword(dev, pos + PCI_MSI_DATA_64, &cap[i++]);
255 pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
256 if (control & PCI_MSI_FLAGS_MASKBIT)
257 pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
258 save_state->cap_nr = PCI_CAP_ID_MSI;
259 pci_add_saved_cap(dev, save_state);
263 static void __pci_restore_msi_state(struct pci_dev *dev)
267 struct pci_cap_saved_state *save_state;
270 if (!dev->msi_enabled)
273 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSI);
274 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
275 if (!save_state || pos <= 0)
277 cap = &save_state->data[0];
279 pci_intx(dev, 0); /* disable intx */
280 control = cap[i++] >> 16;
281 msi_set_enable(dev, 0);
282 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, cap[i++]);
283 if (control & PCI_MSI_FLAGS_64BIT) {
284 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, cap[i++]);
285 pci_write_config_dword(dev, pos + PCI_MSI_DATA_64, cap[i++]);
287 pci_write_config_dword(dev, pos + PCI_MSI_DATA_32, cap[i++]);
288 if (control & PCI_MSI_FLAGS_MASKBIT)
289 pci_write_config_dword(dev, pos + PCI_MSI_MASK_BIT, cap[i++]);
290 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
291 pci_remove_saved_cap(save_state);
295 static int __pci_save_msix_state(struct pci_dev *dev)
298 int irq, head, tail = 0;
300 struct pci_cap_saved_state *save_state;
302 if (!dev->msix_enabled)
305 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
309 /* save the capability */
310 pci_read_config_word(dev, msi_control_reg(pos), &control);
311 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u16),
314 printk(KERN_ERR "Out of memory in pci_save_msix_state\n");
317 *((u16 *)&save_state->data[0]) = control;
320 irq = head = dev->first_msi_irq;
321 while (head != tail) {
322 struct msi_desc *entry;
324 entry = get_irq_msi(irq);
325 read_msi_msg(irq, &entry->msg_save);
327 tail = entry->link.tail;
331 save_state->cap_nr = PCI_CAP_ID_MSIX;
332 pci_add_saved_cap(dev, save_state);
336 int pci_save_msi_state(struct pci_dev *dev)
340 rc = __pci_save_msi_state(dev);
344 rc = __pci_save_msix_state(dev);
349 static void __pci_restore_msix_state(struct pci_dev *dev)
353 int irq, head, tail = 0;
354 struct msi_desc *entry;
355 struct pci_cap_saved_state *save_state;
357 if (!dev->msix_enabled)
360 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSIX);
363 save = *((u16 *)&save_state->data[0]);
364 pci_remove_saved_cap(save_state);
367 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
371 /* route the table */
372 pci_intx(dev, 0); /* disable intx */
373 msix_set_enable(dev, 0);
374 irq = head = dev->first_msi_irq;
375 while (head != tail) {
376 entry = get_irq_msi(irq);
377 write_msi_msg(irq, &entry->msg_save);
379 tail = entry->link.tail;
383 pci_write_config_word(dev, msi_control_reg(pos), save);
386 void pci_restore_msi_state(struct pci_dev *dev)
388 __pci_restore_msi_state(dev);
389 __pci_restore_msix_state(dev);
391 #endif /* CONFIG_PM */
394 * msi_capability_init - configure device's MSI capability structure
395 * @dev: pointer to the pci_dev data structure of MSI device function
397 * Setup the MSI capability structure of device function with a single
398 * MSI irq, regardless of device function is capable of handling
399 * multiple messages. A return of zero indicates the successful setup
400 * of an entry zero with the new MSI irq or non-zero for otherwise.
402 static int msi_capability_init(struct pci_dev *dev)
404 struct msi_desc *entry;
408 msi_set_enable(dev, 0); /* Ensure msi is disabled as I set it up */
410 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
411 pci_read_config_word(dev, msi_control_reg(pos), &control);
412 /* MSI Entry Initialization */
413 entry = alloc_msi_entry();
417 entry->msi_attrib.type = PCI_CAP_ID_MSI;
418 entry->msi_attrib.is_64 = is_64bit_address(control);
419 entry->msi_attrib.entry_nr = 0;
420 entry->msi_attrib.maskbit = is_mask_bit_support(control);
421 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
422 entry->msi_attrib.pos = pos;
423 if (is_mask_bit_support(control)) {
424 entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos,
425 is_64bit_address(control));
428 if (entry->msi_attrib.maskbit) {
429 unsigned int maskbits, temp;
430 /* All MSIs are unmasked by default, Mask them all */
431 pci_read_config_dword(dev,
432 msi_mask_bits_reg(pos, is_64bit_address(control)),
434 temp = (1 << multi_msi_capable(control));
435 temp = ((temp - 1) & ~temp);
437 pci_write_config_dword(dev,
438 msi_mask_bits_reg(pos, is_64bit_address(control)),
441 /* Configure MSI capability structure */
442 irq = arch_setup_msi_irq(dev, entry);
444 kmem_cache_free(msi_cachep, entry);
447 entry->link.head = irq;
448 entry->link.tail = irq;
449 dev->first_msi_irq = irq;
450 set_irq_msi(irq, entry);
452 /* Set MSI enabled bits */
453 pci_intx(dev, 0); /* disable intx */
454 msi_set_enable(dev, 1);
455 dev->msi_enabled = 1;
462 * msix_capability_init - configure device's MSI-X capability
463 * @dev: pointer to the pci_dev data structure of MSI-X device function
464 * @entries: pointer to an array of struct msix_entry entries
465 * @nvec: number of @entries
467 * Setup the MSI-X capability structure of device function with a
468 * single MSI-X irq. A return of zero indicates the successful setup of
469 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
471 static int msix_capability_init(struct pci_dev *dev,
472 struct msix_entry *entries, int nvec)
474 struct msi_desc *head = NULL, *tail = NULL, *entry = NULL;
475 int irq, pos, i, j, nr_entries, temp = 0;
476 unsigned long phys_addr;
482 msix_set_enable(dev, 0);/* Ensure msix is disabled as I set it up */
484 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
485 /* Request & Map MSI-X table region */
486 pci_read_config_word(dev, msi_control_reg(pos), &control);
487 nr_entries = multi_msix_capable(control);
489 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
490 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
491 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
492 phys_addr = pci_resource_start (dev, bir) + table_offset;
493 base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
497 /* MSI-X Table Initialization */
498 for (i = 0; i < nvec; i++) {
499 entry = alloc_msi_entry();
503 j = entries[i].entry;
504 entry->msi_attrib.type = PCI_CAP_ID_MSIX;
505 entry->msi_attrib.is_64 = 1;
506 entry->msi_attrib.entry_nr = j;
507 entry->msi_attrib.maskbit = 1;
508 entry->msi_attrib.default_irq = dev->irq;
509 entry->msi_attrib.pos = pos;
511 entry->mask_base = base;
513 /* Configure MSI-X capability structure */
514 irq = arch_setup_msi_irq(dev, entry);
516 kmem_cache_free(msi_cachep, entry);
519 entries[i].vector = irq;
521 entry->link.head = irq;
522 entry->link.tail = irq;
525 entry->link.head = temp;
526 entry->link.tail = tail->link.tail;
527 tail->link.tail = irq;
528 head->link.head = irq;
533 set_irq_msi(irq, entry);
538 for (; i >= 0; i--) {
539 irq = (entries + i)->vector;
540 msi_free_irq(dev, irq);
541 (entries + i)->vector = 0;
543 /* If we had some success report the number of irqs
544 * we succeeded in setting up.
550 dev->first_msi_irq = entries[0].vector;
551 /* Set MSI-X enabled bits */
552 pci_intx(dev, 0); /* disable intx */
553 msix_set_enable(dev, 1);
554 dev->msix_enabled = 1;
560 * pci_msi_supported - check whether MSI may be enabled on device
561 * @dev: pointer to the pci_dev data structure of MSI device function
563 * Look at global flags, the device itself, and its parent busses
564 * to return 0 if MSI are supported for the device.
567 int pci_msi_supported(struct pci_dev * dev)
571 /* MSI must be globally enabled and supported by the device */
572 if (!pci_msi_enable || !dev || dev->no_msi)
575 /* Any bridge which does NOT route MSI transactions from it's
576 * secondary bus to it's primary bus must set NO_MSI flag on
577 * the secondary pci_bus.
578 * We expect only arch-specific PCI host bus controller driver
579 * or quirks for specific PCI bridges to be setting NO_MSI.
581 for (bus = dev->bus; bus; bus = bus->parent)
582 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
589 * pci_enable_msi - configure device's MSI capability structure
590 * @dev: pointer to the pci_dev data structure of MSI device function
592 * Setup the MSI capability structure of device function with
593 * a single MSI irq upon its software driver call to request for
594 * MSI mode enabled on its hardware device function. A return of zero
595 * indicates the successful setup of an entry zero with the new MSI
596 * irq or non-zero for otherwise.
598 int pci_enable_msi(struct pci_dev* dev)
602 if (pci_msi_supported(dev) < 0)
609 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
613 WARN_ON(!!dev->msi_enabled);
615 /* Check whether driver already requested for MSI-X irqs */
616 if (dev->msix_enabled) {
617 printk(KERN_INFO "PCI: %s: Can't enable MSI. "
618 "Device already has MSI-X enabled\n",
622 status = msi_capability_init(dev);
626 void pci_disable_msi(struct pci_dev* dev)
628 struct msi_desc *entry;
636 if (!dev->msi_enabled)
639 msi_set_enable(dev, 0);
640 pci_intx(dev, 1); /* enable intx */
641 dev->msi_enabled = 0;
643 entry = get_irq_msi(dev->first_msi_irq);
644 if (!entry || !entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI) {
647 if (irq_has_action(dev->first_msi_irq)) {
648 printk(KERN_WARNING "PCI: %s: pci_disable_msi() called without "
649 "free_irq() on MSI irq %d\n",
650 pci_name(dev), dev->first_msi_irq);
651 BUG_ON(irq_has_action(dev->first_msi_irq));
653 default_irq = entry->msi_attrib.default_irq;
654 msi_free_irq(dev, dev->first_msi_irq);
656 /* Restore dev->irq to its default pin-assertion irq */
657 dev->irq = default_irq;
659 dev->first_msi_irq = 0;
662 static int msi_free_irq(struct pci_dev* dev, int irq)
664 struct msi_desc *entry;
665 int head, entry_nr, type;
668 entry = get_irq_msi(irq);
669 if (!entry || entry->dev != dev) {
672 type = entry->msi_attrib.type;
673 entry_nr = entry->msi_attrib.entry_nr;
674 head = entry->link.head;
675 base = entry->mask_base;
676 get_irq_msi(entry->link.head)->link.tail = entry->link.tail;
677 get_irq_msi(entry->link.tail)->link.head = entry->link.head;
679 arch_teardown_msi_irq(irq);
680 kmem_cache_free(msi_cachep, entry);
682 if (type == PCI_CAP_ID_MSIX) {
683 writel(1, base + entry_nr * PCI_MSIX_ENTRY_SIZE +
684 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
694 * pci_enable_msix - configure device's MSI-X capability structure
695 * @dev: pointer to the pci_dev data structure of MSI-X device function
696 * @entries: pointer to an array of MSI-X entries
697 * @nvec: number of MSI-X irqs requested for allocation by device driver
699 * Setup the MSI-X capability structure of device function with the number
700 * of requested irqs upon its software driver call to request for
701 * MSI-X mode enabled on its hardware device function. A return of zero
702 * indicates the successful configuration of MSI-X capability structure
703 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
704 * Or a return of > 0 indicates that driver request is exceeding the number
705 * of irqs available. Driver should use the returned value to re-send
708 int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
710 int status, pos, nr_entries;
714 if (!entries || pci_msi_supported(dev) < 0)
721 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
725 pci_read_config_word(dev, msi_control_reg(pos), &control);
726 nr_entries = multi_msix_capable(control);
727 if (nvec > nr_entries)
730 /* Check for any invalid entries */
731 for (i = 0; i < nvec; i++) {
732 if (entries[i].entry >= nr_entries)
733 return -EINVAL; /* invalid entry */
734 for (j = i + 1; j < nvec; j++) {
735 if (entries[i].entry == entries[j].entry)
736 return -EINVAL; /* duplicate entry */
739 WARN_ON(!!dev->msix_enabled);
741 /* Check whether driver already requested for MSI irq */
742 if (dev->msi_enabled) {
743 printk(KERN_INFO "PCI: %s: Can't enable MSI-X. "
744 "Device already has an MSI irq assigned\n",
748 status = msix_capability_init(dev, entries, nvec);
752 void pci_disable_msix(struct pci_dev* dev)
754 int irq, head, tail = 0, warning = 0;
761 if (!dev->msix_enabled)
764 msix_set_enable(dev, 0);
765 pci_intx(dev, 1); /* enable intx */
766 dev->msix_enabled = 0;
768 irq = head = dev->first_msi_irq;
769 while (head != tail) {
770 tail = get_irq_msi(irq)->link.tail;
771 if (irq_has_action(irq))
773 else if (irq != head) /* Release MSI-X irq */
774 msi_free_irq(dev, irq);
777 msi_free_irq(dev, irq);
779 printk(KERN_WARNING "PCI: %s: pci_disable_msix() called without "
780 "free_irq() on all MSI-X irqs\n",
784 dev->first_msi_irq = 0;
788 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
789 * @dev: pointer to the pci_dev data structure of MSI(X) device function
791 * Being called during hotplug remove, from which the device function
792 * is hot-removed. All previous assigned MSI/MSI-X irqs, if
793 * allocated for this device function, are reclaimed to unused state,
794 * which may be used later on.
796 void msi_remove_pci_irq_vectors(struct pci_dev* dev)
798 if (!pci_msi_enable || !dev)
801 if (dev->msi_enabled) {
802 if (irq_has_action(dev->first_msi_irq)) {
803 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
804 "called without free_irq() on MSI irq %d\n",
805 pci_name(dev), dev->first_msi_irq);
806 BUG_ON(irq_has_action(dev->first_msi_irq));
807 } else /* Release MSI irq assigned to this device */
808 msi_free_irq(dev, dev->first_msi_irq);
810 if (dev->msix_enabled) {
811 int irq, head, tail = 0, warning = 0;
812 void __iomem *base = NULL;
814 irq = head = dev->first_msi_irq;
815 while (head != tail) {
816 tail = get_irq_msi(irq)->link.tail;
817 base = get_irq_msi(irq)->mask_base;
818 if (irq_has_action(irq))
820 else if (irq != head) /* Release MSI-X irq */
821 msi_free_irq(dev, irq);
824 msi_free_irq(dev, irq);
827 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
828 "called without free_irq() on all MSI-X irqs\n",
835 void pci_no_msi(void)
840 EXPORT_SYMBOL(pci_enable_msi);
841 EXPORT_SYMBOL(pci_disable_msi);
842 EXPORT_SYMBOL(pci_enable_msix);
843 EXPORT_SYMBOL(pci_disable_msix);