drivers/nvme/host/nvme.h

   1 /*
   2  * Copyright (c) 2011-2014, Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  */
  13
  14 #ifndef _NVME_H
  15 #define _NVME_H
  16
  17 #include <linux/nvme.h>
  18 #include <linux/pci.h>
  19 #include <linux/kref.h>
  20 #include <linux/blk-mq.h>
  21
  22 struct nvme_passthru_cmd;
  23
  24 extern unsigned char nvme_io_timeout;
  25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  26
  27 extern unsigned char admin_timeout;
  28 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
  29
  30 enum {
  31         NVME_NS_LBA             = 0,
  32         NVME_NS_LIGHTNVM        = 1,
  33 };
  34
  35 /*
  36  * List of workarounds for devices that required behavior not specified in
  37  * the standard.
  38  */
  39 enum nvme_quirks {
  40         /*
  41          * Prefers I/O aligned to a stripe size specified in a vendor
  42          * specific Identify field.
  43          */
  44         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
  45 };
  46
  47 struct nvme_ctrl {
  48         const struct nvme_ctrl_ops *ops;
  49         struct request_queue *admin_q;
  50         struct device *dev;
  51         struct kref kref;
  52         int instance;
  53
  54         char name[12];
  55         char serial[20];
  56         char model[40];
  57         char firmware_rev[8];
  58         u16 oncs;
  59         u16 abort_limit;
  60         u8 event_limit;
  61         u8 vwc;
  62         unsigned long quirks;
  63 };
  64
  65 /*
  66  * An NVM Express namespace is equivalent to a SCSI LUN
  67  */
  68 struct nvme_ns {
  69         struct list_head list;
  70
  71         struct nvme_ctrl *ctrl;
  72         struct request_queue *queue;
  73         struct gendisk *disk;
  74         struct kref kref;
  75
  76         unsigned ns_id;
  77         int lba_shift;
  78         u16 ms;
  79         bool ext;
  80         u8 pi_type;
  81         int type;
  82         u64 mode_select_num_blocks;
  83         u32 mode_select_block_len;
  84 };
  85
  86 struct nvme_ctrl_ops {
  87         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
  88         void (*free_ctrl)(struct nvme_ctrl *ctrl);
  89 };
  90
  91 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
  92 {
  93         u32 val = 0;
  94
  95         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
  96                 return false;
  97         return val & NVME_CSTS_RDY;
  98 }
  99
 100 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
 101 {
 102         return (sector >> (ns->lba_shift - 9));
 103 }
 104
 105 static inline void nvme_setup_flush(struct nvme_ns *ns,
 106                 struct nvme_command *cmnd)
 107 {
 108         memset(cmnd, 0, sizeof(*cmnd));
 109         cmnd->common.opcode = nvme_cmd_flush;
 110         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
 111 }
 112
 113 static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
 114                 struct nvme_command *cmnd)
 115 {
 116         u16 control = 0;
 117         u32 dsmgmt = 0;
 118
 119         if (req->cmd_flags & REQ_FUA)
 120                 control |= NVME_RW_FUA;
 121         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 122                 control |= NVME_RW_LR;
 123
 124         if (req->cmd_flags & REQ_RAHEAD)
 125                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 126
 127         memset(cmnd, 0, sizeof(*cmnd));
 128         cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 129         cmnd->rw.command_id = req->tag;
 130         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
 131         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 132         cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 133
 134         if (ns->ms) {
 135                 switch (ns->pi_type) {
 136                 case NVME_NS_DPS_PI_TYPE3:
 137                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
 138                         break;
 139                 case NVME_NS_DPS_PI_TYPE1:
 140                 case NVME_NS_DPS_PI_TYPE2:
 141                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
 142                                         NVME_RW_PRINFO_PRCHK_REF;
 143                         cmnd->rw.reftag = cpu_to_le32(
 144                                         nvme_block_nr(ns, blk_rq_pos(req)));
 145                         break;
 146                 }
 147                 if (!blk_integrity_rq(req))
 148                         control |= NVME_RW_PRINFO_PRACT;
 149         }
 150
 151         cmnd->rw.control = cpu_to_le16(control);
 152         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
 153 }
 154
 155
 156 static inline int nvme_error_status(u16 status)
 157 {
 158         switch (status & 0x7ff) {
 159         case NVME_SC_SUCCESS:
 160                 return 0;
 161         case NVME_SC_CAP_EXCEEDED:
 162                 return -ENOSPC;
 163         default:
 164                 return -EIO;
 165         }
 166 }
 167
 168 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
 169 void nvme_put_ns(struct nvme_ns *ns);
 170
 171 struct request *nvme_alloc_request(struct request_queue *q,
 172                 struct nvme_command *cmd, unsigned int flags);
 173 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 174                 void *buf, unsigned bufflen);
 175 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 176                 void *buffer, unsigned bufflen,  u32 *result, unsigned timeout);
 177 int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
 178                 void __user *ubuffer, unsigned bufflen, u32 *result,
 179                 unsigned timeout);
 180 int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
 181                 void __user *ubuffer, unsigned bufflen,
 182                 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
 183                 u32 *result, unsigned timeout);
 184 int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id);
 185 int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
 186                 struct nvme_id_ns **id);
 187 int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log);
 188 int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
 189                         dma_addr_t dma_addr, u32 *result);
 190 int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
 191                         dma_addr_t dma_addr, u32 *result);
 192
 193 extern const struct block_device_operations nvme_fops;
 194 extern spinlock_t dev_list_lock;
 195
 196 int nvme_revalidate_disk(struct gendisk *disk);
 197 int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
 198                         struct nvme_passthru_cmd __user *ucmd);
 199
 200 struct sg_io_hdr;
 201
 202 int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
 203 int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
 204 int nvme_sg_get_version_num(int __user *ip);
 205
 206 int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
 207 int nvme_nvm_register(struct request_queue *q, char *disk_name);
 208 void nvme_nvm_unregister(struct request_queue *q, char *disk_name);
 209
 210 #endif /* _NVME_H */