drivers/nvme/host/nvme.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  */
   5
   6 #ifndef _NVME_H
   7 #define _NVME_H
   8
   9 #include <linux/nvme.h>
  10 #include <linux/cdev.h>
  11 #include <linux/pci.h>
  12 #include <linux/kref.h>
  13 #include <linux/blk-mq.h>
  14 #include <linux/sed-opal.h>
  15 #include <linux/fault-inject.h>
  16 #include <linux/rcupdate.h>
  17 #include <linux/wait.h>
  18 #include <linux/t10-pi.h>
  19
  20 #include <trace/events/block.h>
  21
  22 extern const struct pr_ops nvme_pr_ops;
  23
  24 extern unsigned int nvme_io_timeout;
  25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  26
  27 extern unsigned int admin_timeout;
  28 #define NVME_ADMIN_TIMEOUT      (admin_timeout * HZ)
  29
  30 #define NVME_DEFAULT_KATO       5
  31
  32 #ifdef CONFIG_ARCH_NO_SG_CHAIN
  33 #define  NVME_INLINE_SG_CNT  0
  34 #define  NVME_INLINE_METADATA_SG_CNT  0
  35 #else
  36 #define  NVME_INLINE_SG_CNT  2
  37 #define  NVME_INLINE_METADATA_SG_CNT  1
  38 #endif
  39
  40 /*
  41  * Default to a 4K page size, with the intention to update this
  42  * path in the future to accommodate architectures with differing
  43  * kernel and IO page sizes.
  44  */
  45 #define NVME_CTRL_PAGE_SHIFT    12
  46 #define NVME_CTRL_PAGE_SIZE     (1 << NVME_CTRL_PAGE_SHIFT)
  47
  48 extern struct workqueue_struct *nvme_wq;
  49 extern struct workqueue_struct *nvme_reset_wq;
  50 extern struct workqueue_struct *nvme_delete_wq;
  51
  52 /*
  53  * List of workarounds for devices that required behavior not specified in
  54  * the standard.
  55  */
  56 enum nvme_quirks {
  57         /*
  58          * Prefers I/O aligned to a stripe size specified in a vendor
  59          * specific Identify field.
  60          */
  61         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
  62
  63         /*
  64          * The controller doesn't handle Identify value others than 0 or 1
  65          * correctly.
  66          */
  67         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
  68
  69         /*
  70          * The controller deterministically returns O's on reads to
  71          * logical blocks that deallocate was called on.
  72          */
  73         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
  74
  75         /*
  76          * The controller needs a delay before starts checking the device
  77          * readiness, which is done by reading the NVME_CSTS_RDY bit.
  78          */
  79         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
  80
  81         /*
  82          * APST should not be used.
  83          */
  84         NVME_QUIRK_NO_APST                      = (1 << 4),
  85
  86         /*
  87          * The deepest sleep state should not be used.
  88          */
  89         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
  90
  91         /*
  92          * Set MEDIUM priority on SQ creation
  93          */
  94         NVME_QUIRK_MEDIUM_PRIO_SQ               = (1 << 7),
  95
  96         /*
  97          * Ignore device provided subnqn.
  98          */
  99         NVME_QUIRK_IGNORE_DEV_SUBNQN            = (1 << 8),
 100
 101         /*
 102          * Broken Write Zeroes.
 103          */
 104         NVME_QUIRK_DISABLE_WRITE_ZEROES         = (1 << 9),
 105
 106         /*
 107          * Force simple suspend/resume path.
 108          */
 109         NVME_QUIRK_SIMPLE_SUSPEND               = (1 << 10),
 110
 111         /*
 112          * Use only one interrupt vector for all queues
 113          */
 114         NVME_QUIRK_SINGLE_VECTOR                = (1 << 11),
 115
 116         /*
 117          * Use non-standard 128 bytes SQEs.
 118          */
 119         NVME_QUIRK_128_BYTES_SQES               = (1 << 12),
 120
 121         /*
 122          * Prevent tag overlap between queues
 123          */
 124         NVME_QUIRK_SHARED_TAGS                  = (1 << 13),
 125
 126         /*
 127          * Don't change the value of the temperature threshold feature
 128          */
 129         NVME_QUIRK_NO_TEMP_THRESH_CHANGE        = (1 << 14),
 130
 131         /*
 132          * The controller doesn't handle the Identify Namespace
 133          * Identification Descriptor list subcommand despite claiming
 134          * NVMe 1.3 compliance.
 135          */
 136         NVME_QUIRK_NO_NS_DESC_LIST              = (1 << 15),
 137
 138         /*
 139          * The controller does not properly handle DMA addresses over
 140          * 48 bits.
 141          */
 142         NVME_QUIRK_DMA_ADDRESS_BITS_48          = (1 << 16),
 143
 144         /*
 145          * The controller requires the command_id value be limited, so skip
 146          * encoding the generation sequence number.
 147          */
 148         NVME_QUIRK_SKIP_CID_GEN                 = (1 << 17),
 149
 150         /*
 151          * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
 152          */
 153         NVME_QUIRK_BOGUS_NID                    = (1 << 18),
 154
 155         /*
 156          * No temperature thresholds for channels other than 0 (Composite).
 157          */
 158         NVME_QUIRK_NO_SECONDARY_TEMP_THRESH     = (1 << 19),
 159 };
 160
 161 /*
 162  * Common request structure for NVMe passthrough.  All drivers must have
 163  * this structure as the first member of their request-private data.
 164  */
 165 struct nvme_request {
 166         struct nvme_command     *cmd;
 167         union nvme_result       result;
 168         u8                      genctr;
 169         u8                      retries;
 170         u8                      flags;
 171         u16                     status;
 172 #ifdef CONFIG_NVME_MULTIPATH
 173         unsigned long           start_time;
 174 #endif
 175         struct nvme_ctrl        *ctrl;
 176 };
 177
 178 /*
 179  * Mark a bio as coming in through the mpath node.
 180  */
 181 #define REQ_NVME_MPATH          REQ_DRV
 182
 183 enum {
 184         NVME_REQ_CANCELLED              = (1 << 0),
 185         NVME_REQ_USERCMD                = (1 << 1),
 186         NVME_MPATH_IO_STATS             = (1 << 2),
 187 };
 188
 189 static inline struct nvme_request *nvme_req(struct request *req)
 190 {
 191         return blk_mq_rq_to_pdu(req);
 192 }
 193
 194 static inline u16 nvme_req_qid(struct request *req)
 195 {
 196         if (!req->q->queuedata)
 197                 return 0;
 198
 199         return req->mq_hctx->queue_num + 1;
 200 }
 201
 202 /* The below value is the specific amount of delay needed before checking
 203  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
 204  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
 205  * found empirically.
 206  */
 207 #define NVME_QUIRK_DELAY_AMOUNT         2300
 208
 209 /*
 210  * enum nvme_ctrl_state: Controller state
 211  *
 212  * @NVME_CTRL_NEW:              New controller just allocated, initial state
 213  * @NVME_CTRL_LIVE:             Controller is connected and I/O capable
 214  * @NVME_CTRL_RESETTING:        Controller is resetting (or scheduled reset)
 215  * @NVME_CTRL_CONNECTING:       Controller is disconnected, now connecting the
 216  *                              transport
 217  * @NVME_CTRL_DELETING:         Controller is deleting (or scheduled deletion)
 218  * @NVME_CTRL_DELETING_NOIO:    Controller is deleting and I/O is not
 219  *                              disabled/failed immediately. This state comes
 220  *                              after all async event processing took place and
 221  *                              before ns removal and the controller deletion
 222  *                              progress
 223  * @NVME_CTRL_DEAD:             Controller is non-present/unresponsive during
 224  *                              shutdown or removal. In this case we forcibly
 225  *                              kill all inflight I/O as they have no chance to
 226  *                              complete
 227  */
 228 enum nvme_ctrl_state {
 229         NVME_CTRL_NEW,
 230         NVME_CTRL_LIVE,
 231         NVME_CTRL_RESETTING,
 232         NVME_CTRL_CONNECTING,
 233         NVME_CTRL_DELETING,
 234         NVME_CTRL_DELETING_NOIO,
 235         NVME_CTRL_DEAD,
 236 };
 237
 238 struct nvme_fault_inject {
 239 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 240         struct fault_attr attr;
 241         struct dentry *parent;
 242         bool dont_retry;        /* DNR, do not retry */
 243         u16 status;             /* status code */
 244 #endif
 245 };
 246
 247 enum nvme_ctrl_flags {
 248         NVME_CTRL_FAILFAST_EXPIRED      = 0,
 249         NVME_CTRL_ADMIN_Q_STOPPED       = 1,
 250         NVME_CTRL_STARTED_ONCE          = 2,
 251         NVME_CTRL_STOPPED               = 3,
 252         NVME_CTRL_SKIP_ID_CNS_CS        = 4,
 253         NVME_CTRL_DIRTY_CAPABILITY      = 5,
 254 };
 255
 256 struct nvme_ctrl {
 257         bool comp_seen;
 258         bool identified;
 259         enum nvme_ctrl_state state;
 260         spinlock_t lock;
 261         struct mutex scan_lock;
 262         const struct nvme_ctrl_ops *ops;
 263         struct request_queue *admin_q;
 264         struct request_queue *connect_q;
 265         struct request_queue *fabrics_q;
 266         struct device *dev;
 267         int instance;
 268         int numa_node;
 269         struct blk_mq_tag_set *tagset;
 270         struct blk_mq_tag_set *admin_tagset;
 271         struct list_head namespaces;
 272         struct rw_semaphore namespaces_rwsem;
 273         struct device ctrl_device;
 274         struct device *device;  /* char device */
 275 #ifdef CONFIG_NVME_HWMON
 276         struct device *hwmon_device;
 277 #endif
 278         struct cdev cdev;
 279         struct work_struct reset_work;
 280         struct work_struct delete_work;
 281         wait_queue_head_t state_wq;
 282
 283         struct nvme_subsystem *subsys;
 284         struct list_head subsys_entry;
 285
 286         struct opal_dev *opal_dev;
 287
 288         char name[12];
 289         u16 cntlid;
 290
 291         u16 mtfa;
 292         u32 ctrl_config;
 293         u32 queue_count;
 294
 295         u64 cap;
 296         u32 max_hw_sectors;
 297         u32 max_segments;
 298         u32 max_integrity_segments;
 299         u32 max_discard_sectors;
 300         u32 max_discard_segments;
 301         u32 max_zeroes_sectors;
 302 #ifdef CONFIG_BLK_DEV_ZONED
 303         u32 max_zone_append;
 304 #endif
 305         u16 crdt[3];
 306         u16 oncs;
 307         u32 dmrsl;
 308         u16 oacs;
 309         u16 sqsize;
 310         u32 max_namespaces;
 311         atomic_t abort_limit;
 312         u8 vwc;
 313         u32 vs;
 314         u32 sgls;
 315         u16 kas;
 316         u8 npss;
 317         u8 apsta;
 318         u16 wctemp;
 319         u16 cctemp;
 320         u32 oaes;
 321         u32 aen_result;
 322         u32 ctratt;
 323         unsigned int shutdown_timeout;
 324         unsigned int kato;
 325         bool subsystem;
 326         unsigned long quirks;
 327         struct nvme_id_power_state psd[32];
 328         struct nvme_effects_log *effects;
 329         struct xarray cels;
 330         struct work_struct scan_work;
 331         struct work_struct async_event_work;
 332         struct delayed_work ka_work;
 333         struct delayed_work failfast_work;
 334         struct nvme_command ka_cmd;
 335         unsigned long ka_last_check_time;
 336         struct work_struct fw_act_work;
 337         unsigned long events;
 338
 339 #ifdef CONFIG_NVME_MULTIPATH
 340         /* asymmetric namespace access: */
 341         u8 anacap;
 342         u8 anatt;
 343         u32 anagrpmax;
 344         u32 nanagrpid;
 345         struct mutex ana_lock;
 346         struct nvme_ana_rsp_hdr *ana_log_buf;
 347         size_t ana_log_size;
 348         struct timer_list anatt_timer;
 349         struct work_struct ana_work;
 350 #endif
 351
 352 #ifdef CONFIG_NVME_HOST_AUTH
 353         struct work_struct dhchap_auth_work;
 354         struct mutex dhchap_auth_mutex;
 355         struct nvme_dhchap_queue_context *dhchap_ctxs;
 356         struct nvme_dhchap_key *host_key;
 357         struct nvme_dhchap_key *ctrl_key;
 358         u16 transaction;
 359 #endif
 360         struct key *tls_key;
 361
 362         /* Power saving configuration */
 363         u64 ps_max_latency_us;
 364         bool apst_enabled;
 365
 366         /* PCIe only: */
 367         u16 hmmaxd;
 368         u32 hmpre;
 369         u32 hmmin;
 370         u32 hmminds;
 371
 372         /* Fabrics only */
 373         u32 ioccsz;
 374         u32 iorcsz;
 375         u16 icdoff;
 376         u16 maxcmd;
 377         int nr_reconnects;
 378         unsigned long flags;
 379         struct nvmf_ctrl_options *opts;
 380
 381         struct page *discard_page;
 382         unsigned long discard_page_busy;
 383
 384         struct nvme_fault_inject fault_inject;
 385
 386         enum nvme_ctrl_type cntrltype;
 387         enum nvme_dctype dctype;
 388 };
 389
 390 enum nvme_iopolicy {
 391         NVME_IOPOLICY_NUMA,
 392         NVME_IOPOLICY_RR,
 393 };
 394
 395 struct nvme_subsystem {
 396         int                     instance;
 397         struct device           dev;
 398         /*
 399          * Because we unregister the device on the last put we need
 400          * a separate refcount.
 401          */
 402         struct kref             ref;
 403         struct list_head        entry;
 404         struct mutex            lock;
 405         struct list_head        ctrls;
 406         struct list_head        nsheads;
 407         char                    subnqn[NVMF_NQN_SIZE];
 408         char                    serial[20];
 409         char                    model[40];
 410         char                    firmware_rev[8];
 411         u8                      cmic;
 412         enum nvme_subsys_type   subtype;
 413         u16                     vendor_id;
 414         u16                     awupf;  /* 0's based awupf value. */
 415         struct ida              ns_ida;
 416 #ifdef CONFIG_NVME_MULTIPATH
 417         enum nvme_iopolicy      iopolicy;
 418 #endif
 419 };
 420
 421 /*
 422  * Container structure for uniqueue namespace identifiers.
 423  */
 424 struct nvme_ns_ids {
 425         u8      eui64[8];
 426         u8      nguid[16];
 427         uuid_t  uuid;
 428         u8      csi;
 429 };
 430
 431 /*
 432  * Anchor structure for namespaces.  There is one for each namespace in a
 433  * NVMe subsystem that any of our controllers can see, and the namespace
 434  * structure for each controller is chained of it.  For private namespaces
 435  * there is a 1:1 relation to our namespace structures, that is ->list
 436  * only ever has a single entry for private namespaces.
 437  */
 438 struct nvme_ns_head {
 439         struct list_head        list;
 440         struct srcu_struct      srcu;
 441         struct nvme_subsystem   *subsys;
 442         unsigned                ns_id;
 443         struct nvme_ns_ids      ids;
 444         struct list_head        entry;
 445         struct kref             ref;
 446         bool                    shared;
 447         int                     instance;
 448         struct nvme_effects_log *effects;
 449
 450         struct cdev             cdev;
 451         struct device           cdev_device;
 452
 453         struct gendisk          *disk;
 454 #ifdef CONFIG_NVME_MULTIPATH
 455         struct bio_list         requeue_list;
 456         spinlock_t              requeue_lock;
 457         struct work_struct      requeue_work;
 458         struct mutex            lock;
 459         unsigned long           flags;
 460 #define NVME_NSHEAD_DISK_LIVE   0
 461         struct nvme_ns __rcu    *current_path[];
 462 #endif
 463 };
 464
 465 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
 466 {
 467         return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
 468 }
 469
 470 enum nvme_ns_features {
 471         NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
 472         NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
 473         NVME_NS_DEAC,           /* DEAC bit in Write Zeores supported */
 474 };
 475
 476 struct nvme_ns {
 477         struct list_head list;
 478
 479         struct nvme_ctrl *ctrl;
 480         struct request_queue *queue;
 481         struct gendisk *disk;
 482 #ifdef CONFIG_NVME_MULTIPATH
 483         enum nvme_ana_state ana_state;
 484         u32 ana_grpid;
 485 #endif
 486         struct list_head siblings;
 487         struct kref kref;
 488         struct nvme_ns_head *head;
 489
 490         int lba_shift;
 491         u16 ms;
 492         u16 pi_size;
 493         u16 sgs;
 494         u32 sws;
 495         u8 pi_type;
 496         u8 guard_type;
 497 #ifdef CONFIG_BLK_DEV_ZONED
 498         u64 zsze;
 499 #endif
 500         unsigned long features;
 501         unsigned long flags;
 502 #define NVME_NS_REMOVING        0
 503 #define NVME_NS_ANA_PENDING     2
 504 #define NVME_NS_FORCE_RO        3
 505 #define NVME_NS_READY           4
 506
 507         struct cdev             cdev;
 508         struct device           cdev_device;
 509
 510         struct nvme_fault_inject fault_inject;
 511
 512 };
 513
 514 /* NVMe ns supports metadata actions by the controller (generate/strip) */
 515 static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
 516 {
 517         return ns->pi_type && ns->ms == ns->pi_size;
 518 }
 519
 520 struct nvme_ctrl_ops {
 521         const char *name;
 522         struct module *module;
 523         unsigned int flags;
 524 #define NVME_F_FABRICS                  (1 << 0)
 525 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
 526 #define NVME_F_BLOCKING                 (1 << 2)
 527
 528         const struct attribute_group **dev_attr_groups;
 529         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
 530         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
 531         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
 532         void (*free_ctrl)(struct nvme_ctrl *ctrl);
 533         void (*submit_async_event)(struct nvme_ctrl *ctrl);
 534         void (*delete_ctrl)(struct nvme_ctrl *ctrl);
 535         void (*stop_ctrl)(struct nvme_ctrl *ctrl);
 536         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
 537         void (*print_device_info)(struct nvme_ctrl *ctrl);
 538         bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl);
 539 };
 540
 541 /*
 542  * nvme command_id is constructed as such:
 543  * | xxxx | xxxxxxxxxxxx |
 544  *   gen    request tag
 545  */
 546 #define nvme_genctr_mask(gen)                   (gen & 0xf)
 547 #define nvme_cid_install_genctr(gen)            (nvme_genctr_mask(gen) << 12)
 548 #define nvme_genctr_from_cid(cid)               ((cid & 0xf000) >> 12)
 549 #define nvme_tag_from_cid(cid)                  (cid & 0xfff)
 550
 551 static inline u16 nvme_cid(struct request *rq)
 552 {
 553         return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
 554 }
 555
 556 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
 557                 u16 command_id)
 558 {
 559         u8 genctr = nvme_genctr_from_cid(command_id);
 560         u16 tag = nvme_tag_from_cid(command_id);
 561         struct request *rq;
 562
 563         rq = blk_mq_tag_to_rq(tags, tag);
 564         if (unlikely(!rq)) {
 565                 pr_err("could not locate request for tag %#x\n",
 566                         tag);
 567                 return NULL;
 568         }
 569         if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
 570                 dev_err(nvme_req(rq)->ctrl->device,
 571                         "request %#x genctr mismatch (got %#x expected %#x)\n",
 572                         tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
 573                 return NULL;
 574         }
 575         return rq;
 576 }
 577
 578 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
 579                 u16 command_id)
 580 {
 581         return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
 582 }
 583
 584 /*
 585  * Return the length of the string without the space padding
 586  */
 587 static inline int nvme_strlen(char *s, int len)
 588 {
 589         while (s[len - 1] == ' ')
 590                 len--;
 591         return len;
 592 }
 593
 594 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl)
 595 {
 596         struct nvme_subsystem *subsys = ctrl->subsys;
 597
 598         if (ctrl->ops->print_device_info) {
 599                 ctrl->ops->print_device_info(ctrl);
 600                 return;
 601         }
 602
 603         dev_err(ctrl->device,
 604                 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id,
 605                 nvme_strlen(subsys->model, sizeof(subsys->model)),
 606                 subsys->model, nvme_strlen(subsys->firmware_rev,
 607                                            sizeof(subsys->firmware_rev)),
 608                 subsys->firmware_rev);
 609 }
 610
 611 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
 612 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
 613                             const char *dev_name);
 614 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
 615 void nvme_should_fail(struct request *req);
 616 #else
 617 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
 618                                           const char *dev_name)
 619 {
 620 }
 621 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
 622 {
 623 }
 624 static inline void nvme_should_fail(struct request *req) {}
 625 #endif
 626
 627 bool nvme_wait_reset(struct nvme_ctrl *ctrl);
 628 int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
 629
 630 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
 631 {
 632         int ret;
 633
 634         if (!ctrl->subsystem)
 635                 return -ENOTTY;
 636         if (!nvme_wait_reset(ctrl))
 637                 return -EBUSY;
 638
 639         ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
 640         if (ret)
 641                 return ret;
 642
 643         return nvme_try_sched_reset(ctrl);
 644 }
 645
 646 /*
 647  * Convert a 512B sector number to a device logical block number.
 648  */
 649 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
 650 {
 651         return sector >> (ns->lba_shift - SECTOR_SHIFT);
 652 }
 653
 654 /*
 655  * Convert a device logical block number to a 512B sector number.
 656  */
 657 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
 658 {
 659         return lba << (ns->lba_shift - SECTOR_SHIFT);
 660 }
 661
 662 /*
 663  * Convert byte length to nvme's 0-based num dwords
 664  */
 665 static inline u32 nvme_bytes_to_numd(size_t len)
 666 {
 667         return (len >> 2) - 1;
 668 }
 669
 670 static inline bool nvme_is_ana_error(u16 status)
 671 {
 672         switch (status & 0x7ff) {
 673         case NVME_SC_ANA_TRANSITION:
 674         case NVME_SC_ANA_INACCESSIBLE:
 675         case NVME_SC_ANA_PERSISTENT_LOSS:
 676                 return true;
 677         default:
 678                 return false;
 679         }
 680 }
 681
 682 static inline bool nvme_is_path_error(u16 status)
 683 {
 684         /* check for a status code type of 'path related status' */
 685         return (status & 0x700) == 0x300;
 686 }
 687
 688 /*
 689  * Fill in the status and result information from the CQE, and then figure out
 690  * if blk-mq will need to use IPI magic to complete the request, and if yes do
 691  * so.  If not let the caller complete the request without an indirect function
 692  * call.
 693  */
 694 static inline bool nvme_try_complete_req(struct request *req, __le16 status,
 695                 union nvme_result result)
 696 {
 697         struct nvme_request *rq = nvme_req(req);
 698         struct nvme_ctrl *ctrl = rq->ctrl;
 699
 700         if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
 701                 rq->genctr++;
 702
 703         rq->status = le16_to_cpu(status) >> 1;
 704         rq->result = result;
 705         /* inject error when permitted by fault injection framework */
 706         nvme_should_fail(req);
 707         if (unlikely(blk_should_fake_timeout(req->q)))
 708                 return true;
 709         return blk_mq_complete_request_remote(req);
 710 }
 711
 712 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
 713 {
 714         get_device(ctrl->device);
 715 }
 716
 717 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
 718 {
 719         put_device(ctrl->device);
 720 }
 721
 722 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
 723 {
 724         return !qid &&
 725                 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
 726 }
 727
 728 void nvme_complete_rq(struct request *req);
 729 void nvme_complete_batch_req(struct request *req);
 730
 731 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
 732                                                 void (*fn)(struct request *rq))
 733 {
 734         struct request *req;
 735
 736         rq_list_for_each(&iob->req_list, req) {
 737                 fn(req);
 738                 nvme_complete_batch_req(req);
 739         }
 740         blk_mq_end_request_batch(iob);
 741 }
 742
 743 blk_status_t nvme_host_path_error(struct request *req);
 744 bool nvme_cancel_request(struct request *req, void *data);
 745 void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
 746 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
 747 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 748                 enum nvme_ctrl_state new_state);
 749 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown);
 750 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
 751 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
 752                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
 753 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
 754 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
 755 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
 756 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended);
 757 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
 758                 const struct blk_mq_ops *ops, unsigned int cmd_size);
 759 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl);
 760 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
 761                 const struct blk_mq_ops *ops, unsigned int nr_maps,
 762                 unsigned int cmd_size);
 763 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl);
 764
 765 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
 766
 767 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
 768                 volatile union nvme_result *res);
 769
 770 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl);
 771 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl);
 772 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl);
 773 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl);
 774 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl);
 775 void nvme_sync_queues(struct nvme_ctrl *ctrl);
 776 void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
 777 void nvme_unfreeze(struct nvme_ctrl *ctrl);
 778 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
 779 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
 780 void nvme_start_freeze(struct nvme_ctrl *ctrl);
 781
 782 static inline enum req_op nvme_req_op(struct nvme_command *cmd)
 783 {
 784         return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
 785 }
 786
 787 #define NVME_QID_ANY -1
 788 void nvme_init_request(struct request *req, struct nvme_command *cmd);
 789 void nvme_cleanup_cmd(struct request *req);
 790 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
 791 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
 792                 struct request *req);
 793 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
 794                 bool queue_live);
 795
 796 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
 797                 bool queue_live)
 798 {
 799         if (likely(ctrl->state == NVME_CTRL_LIVE))
 800                 return true;
 801         if (ctrl->ops->flags & NVME_F_FABRICS &&
 802             ctrl->state == NVME_CTRL_DELETING)
 803                 return queue_live;
 804         return __nvme_check_ready(ctrl, rq, queue_live);
 805 }
 806
 807 /*
 808  * NSID shall be unique for all shared namespaces, or if at least one of the
 809  * following conditions is met:
 810  *   1. Namespace Management is supported by the controller
 811  *   2. ANA is supported by the controller
 812  *   3. NVM Set are supported by the controller
 813  *
 814  * In other case, private namespace are not required to report a unique NSID.
 815  */
 816 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
 817                 struct nvme_ns_head *head)
 818 {
 819         return head->shared ||
 820                 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
 821                 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
 822                 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
 823 }
 824
 825 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 826                 void *buf, unsigned bufflen);
 827 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 828                 union nvme_result *result, void *buffer, unsigned bufflen,
 829                 int qid, int at_head,
 830                 blk_mq_req_flags_t flags);
 831 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
 832                       unsigned int dword11, void *buffer, size_t buflen,
 833                       u32 *result);
 834 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
 835                       unsigned int dword11, void *buffer, size_t buflen,
 836                       u32 *result);
 837 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
 838 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
 839 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
 840 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
 841 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
 842 void nvme_queue_scan(struct nvme_ctrl *ctrl);
 843 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
 844                 void *log, size_t size, u64 offset);
 845 bool nvme_tryget_ns_head(struct nvme_ns_head *head);
 846 void nvme_put_ns_head(struct nvme_ns_head *head);
 847 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
 848                 const struct file_operations *fops, struct module *owner);
 849 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
 850 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode,
 851                 unsigned int cmd, unsigned long arg);
 852 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
 853 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode,
 854                 unsigned int cmd, unsigned long arg);
 855 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
 856                 unsigned long arg);
 857 long nvme_dev_ioctl(struct file *file, unsigned int cmd,
 858                 unsigned long arg);
 859 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
 860                 struct io_comp_batch *iob, unsigned int poll_flags);
 861 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd,
 862                 unsigned int issue_flags);
 863 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd,
 864                 unsigned int issue_flags);
 865 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
 866 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags);
 867
 868 extern const struct attribute_group *nvme_ns_id_attr_groups[];
 869 extern const struct pr_ops nvme_pr_ops;
 870 extern const struct block_device_operations nvme_ns_head_ops;
 871 extern const struct attribute_group nvme_dev_attrs_group;
 872 extern const struct attribute_group *nvme_subsys_attrs_groups[];
 873 extern const struct attribute_group *nvme_dev_attr_groups[];
 874 extern const struct block_device_operations nvme_bdev_ops;
 875
 876 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
 877 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
 878 #ifdef CONFIG_NVME_MULTIPATH
 879 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 880 {
 881         return ctrl->ana_log_buf != NULL;
 882 }
 883
 884 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
 885 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
 886 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
 887 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
 888 void nvme_failover_req(struct request *req);
 889 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
 890 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
 891 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid);
 892 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
 893 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
 894 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
 895 void nvme_mpath_update(struct nvme_ctrl *ctrl);
 896 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
 897 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
 898 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
 899 void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
 900 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
 901 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
 902 void nvme_mpath_start_request(struct request *rq);
 903 void nvme_mpath_end_request(struct request *rq);
 904
 905 static inline void nvme_trace_bio_complete(struct request *req)
 906 {
 907         struct nvme_ns *ns = req->q->queuedata;
 908
 909         if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio)
 910                 trace_block_bio_complete(ns->head->disk->queue, req->bio);
 911 }
 912
 913 extern bool multipath;
 914 extern struct device_attribute dev_attr_ana_grpid;
 915 extern struct device_attribute dev_attr_ana_state;
 916 extern struct device_attribute subsys_attr_iopolicy;
 917
 918 #else
 919 #define multipath false
 920 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
 921 {
 922         return false;
 923 }
 924 static inline void nvme_failover_req(struct request *req)
 925 {
 926 }
 927 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
 928 {
 929 }
 930 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
 931                 struct nvme_ns_head *head)
 932 {
 933         return 0;
 934 }
 935 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid)
 936 {
 937 }
 938 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
 939 {
 940 }
 941 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
 942 {
 943         return false;
 944 }
 945 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
 946 {
 947 }
 948 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
 949 {
 950 }
 951 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
 952 {
 953 }
 954 static inline void nvme_trace_bio_complete(struct request *req)
 955 {
 956 }
 957 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
 958 {
 959 }
 960 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
 961                 struct nvme_id_ctrl *id)
 962 {
 963         if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
 964                 dev_warn(ctrl->device,
 965 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
 966         return 0;
 967 }
 968 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
 969 {
 970 }
 971 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
 972 {
 973 }
 974 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
 975 {
 976 }
 977 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
 978 {
 979 }
 980 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
 981 {
 982 }
 983 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
 984 {
 985 }
 986 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
 987 {
 988 }
 989 static inline void nvme_mpath_start_request(struct request *rq)
 990 {
 991 }
 992 static inline void nvme_mpath_end_request(struct request *rq)
 993 {
 994 }
 995 #endif /* CONFIG_NVME_MULTIPATH */
 996
 997 int nvme_revalidate_zones(struct nvme_ns *ns);
 998 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
 999                 unsigned int nr_zones, report_zones_cb cb, void *data);
1000 #ifdef CONFIG_BLK_DEV_ZONED
1001 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
1002 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
1003                                        struct nvme_command *cmnd,
1004                                        enum nvme_zone_mgmt_action action);
1005 #else
1006 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
1007                 struct request *req, struct nvme_command *cmnd,
1008                 enum nvme_zone_mgmt_action action)
1009 {
1010         return BLK_STS_NOTSUPP;
1011 }
1012
1013 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
1014 {
1015         dev_warn(ns->ctrl->device,
1016                  "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
1017         return -EPROTONOSUPPORT;
1018 }
1019 #endif
1020
1021 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
1022 {
1023         return dev_to_disk(dev)->private_data;
1024 }
1025
1026 #ifdef CONFIG_NVME_HWMON
1027 int nvme_hwmon_init(struct nvme_ctrl *ctrl);
1028 void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
1029 #else
1030 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
1031 {
1032         return 0;
1033 }
1034
1035 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
1036 {
1037 }
1038 #endif
1039
1040 static inline void nvme_start_request(struct request *rq)
1041 {
1042         if (rq->cmd_flags & REQ_NVME_MPATH)
1043                 nvme_mpath_start_request(rq);
1044         blk_mq_start_request(rq);
1045 }
1046
1047 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
1048 {
1049         return ctrl->sgls & ((1 << 0) | (1 << 1));
1050 }
1051
1052 #ifdef CONFIG_NVME_HOST_AUTH
1053 int __init nvme_init_auth(void);
1054 void __exit nvme_exit_auth(void);
1055 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl);
1056 void nvme_auth_stop(struct nvme_ctrl *ctrl);
1057 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid);
1058 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid);
1059 void nvme_auth_free(struct nvme_ctrl *ctrl);
1060 #else
1061 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl)
1062 {
1063         return 0;
1064 }
1065 static inline int __init nvme_init_auth(void)
1066 {
1067         return 0;
1068 }
1069 static inline void __exit nvme_exit_auth(void)
1070 {
1071 }
1072 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {};
1073 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid)
1074 {
1075         return -EPROTONOSUPPORT;
1076 }
1077 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid)
1078 {
1079         return NVME_SC_AUTH_REQUIRED;
1080 }
1081 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {};
1082 #endif
1083
1084 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1085                          u8 opcode);
1086 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode);
1087 int nvme_execute_rq(struct request *rq, bool at_head);
1088 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1089                        struct nvme_command *cmd, int status);
1090 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
1091 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
1092 void nvme_put_ns(struct nvme_ns *ns);
1093
1094 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
1095 {
1096         return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
1097 }
1098
1099 #ifdef CONFIG_NVME_VERBOSE_ERRORS
1100 const unsigned char *nvme_get_error_status_str(u16 status);
1101 const unsigned char *nvme_get_opcode_str(u8 opcode);
1102 const unsigned char *nvme_get_admin_opcode_str(u8 opcode);
1103 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode);
1104 #else /* CONFIG_NVME_VERBOSE_ERRORS */
1105 static inline const unsigned char *nvme_get_error_status_str(u16 status)
1106 {
1107         return "I/O Error";
1108 }
1109 static inline const unsigned char *nvme_get_opcode_str(u8 opcode)
1110 {
1111         return "I/O Cmd";
1112 }
1113 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
1114 {
1115         return "Admin Cmd";
1116 }
1117
1118 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode)
1119 {
1120         return "Fabrics Cmd";
1121 }
1122 #endif /* CONFIG_NVME_VERBOSE_ERRORS */
1123
1124 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype)
1125 {
1126         if (opcode == nvme_fabrics_command)
1127                 return nvme_get_fabrics_opcode_str(fctype);
1128         return qid ? nvme_get_opcode_str(opcode) :
1129                 nvme_get_admin_opcode_str(opcode);
1130 }
1131 #endif /* _NVME_H */