1 /******************************************************************************
3 * Copyright(c) 2009-2014 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 * Larry Finger <Larry.Finger@lwfinger.net>
23 *****************************************************************************/
25 #ifndef __RTL8723BE__FW__H__
26 #define __RTL8723BE__FW__H__
28 #define FW_8192C_SIZE 0x8000
29 #define FW_8192C_START_ADDRESS 0x1000
30 #define FW_8192C_END_ADDRESS 0x5FFF
31 #define FW_8192C_PAGE_SIZE 4096
32 #define FW_8192C_POLLING_DELAY 5
33 #define FW_8192C_POLLING_TIMEOUT_COUNT 6000
35 #define IS_FW_HEADER_EXIST(_pfwhdr) \
36 ((_pfwhdr->signature&0xFFF0) == 0x5300)
37 #define USE_OLD_WOWLAN_DEBUG_FW 0
39 #define H2C_8723BE_RSVDPAGE_LOC_LEN 5
40 #define H2C_8723BE_PWEMODE_LENGTH 5
41 #define H2C_8723BE_JOINBSSRPT_LENGTH 1
42 #define H2C_8723BE_AP_OFFLOAD_LENGTH 3
43 #define H2C_8723BE_WOWLAN_LENGTH 3
44 #define H2C_8723BE_KEEP_ALIVE_CTRL_LENGTH 3
45 #if (USE_OLD_WOWLAN_DEBUG_FW == 0)
46 #define H2C_8723BE_REMOTE_WAKE_CTRL_LEN 1
48 #define H2C_8723BE_REMOTE_WAKE_CTRL_LEN 3
50 #define H2C_8723BE_AOAC_GLOBAL_INFO_LEN 2
51 #define H2C_8723BE_AOAC_RSVDPAGE_LOC_LEN 7
54 /* Fw PS state for RPWM.
56 *BIT[3] = Protocol PS state, 1: register active state , 0: register sleep state
59 #define FW_PS_GO_ON BIT(0)
60 #define FW_PS_TX_NULL BIT(1)
61 #define FW_PS_RF_ON BIT(2)
62 #define FW_PS_REGISTER_ACTIVE BIT(3)
64 #define FW_PS_DPS BIT(0)
65 #define FW_PS_LCLK (FW_PS_DPS)
66 #define FW_PS_RF_OFF BIT(1)
67 #define FW_PS_ALL_ON BIT(2)
68 #define FW_PS_ST_ACTIVE BIT(3)
69 #define FW_PS_ISR_ENABLE BIT(4)
70 #define FW_PS_IMR_ENABLE BIT(5)
73 #define FW_PS_ACK BIT(6)
74 #define FW_PS_TOGGLE BIT(7)
77 /* BIT[0] = 1: 32k, 0: 40M*/
78 #define FW_PS_CLOCK_OFF BIT(0) /* 32k*/
79 #define FW_PS_CLOCK_ON 0 /*40M*/
81 #define FW_PS_STATE_MASK (0x0F)
82 #define FW_PS_STATE_HW_MASK (0x07)
83 /*ISR_ENABLE, IMR_ENABLE, and PS mode should be inherited.*/
84 #define FW_PS_STATE_INT_MASK (0x3F)
86 #define FW_PS_STATE(x) (FW_PS_STATE_MASK & (x))
87 #define FW_PS_STATE_HW(x) (FW_PS_STATE_HW_MASK & (x))
88 #define FW_PS_STATE_INT(x) (FW_PS_STATE_INT_MASK & (x))
89 #define FW_PS_ISR_VAL(x) ((x) & 0x70)
90 #define FW_PS_IMR_MASK(x) ((x) & 0xDF)
91 #define FW_PS_KEEP_IMR(x) ((x) & 0x20)
94 #define FW_PS_STATE_S0 (FW_PS_DPS)
95 #define FW_PS_STATE_S1 (FW_PS_LCLK)
96 #define FW_PS_STATE_S2 (FW_PS_RF_OFF)
97 #define FW_PS_STATE_S3 (FW_PS_ALL_ON)
98 #define FW_PS_STATE_S4 ((FW_PS_ST_ACTIVE) | (FW_PS_ALL_ON))
100 /* ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))*/
101 #define FW_PS_STATE_ALL_ON_88E (FW_PS_CLOCK_ON)
103 #define FW_PS_STATE_RF_ON_88E (FW_PS_CLOCK_ON)
105 #define FW_PS_STATE_RF_OFF_88E (FW_PS_CLOCK_ON)
106 /* (FW_PS_STATE_RF_OFF)*/
107 #define FW_PS_STATE_RF_OFF_LOW_PWR_88E (FW_PS_CLOCK_OFF)
109 #define FW_PS_STATE_ALL_ON_92C (FW_PS_STATE_S4)
110 #define FW_PS_STATE_RF_ON_92C (FW_PS_STATE_S3)
111 #define FW_PS_STATE_RF_OFF_92C (FW_PS_STATE_S2)
112 #define FW_PS_STATE_RF_OFF_LOW_PWR_92C (FW_PS_STATE_S1)
115 /* For 88E H2C PwrMode Cmd ID 5.*/
116 #define FW_PWR_STATE_ACTIVE ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
117 #define FW_PWR_STATE_RF_OFF 0
119 #define FW_PS_IS_ACK(x) ((x) & FW_PS_ACK)
120 #define FW_PS_IS_CLK_ON(x) ((x) & (FW_PS_RF_OFF | FW_PS_ALL_ON))
121 #define FW_PS_IS_RF_ON(x) ((x) & (FW_PS_ALL_ON))
122 #define FW_PS_IS_ACTIVE(x) ((x) & (FW_PS_ST_ACTIVE))
123 #define FW_PS_IS_CPWM_INT(x) ((x) & 0x40)
125 #define FW_CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
127 #define IS_IN_LOW_POWER_STATE_88E(fwpsstate) \
128 (FW_PS_STATE(fwpsstate) == FW_PS_CLOCK_OFF)
130 #define FW_PWR_STATE_ACTIVE ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
131 #define FW_PWR_STATE_RF_OFF 0
133 #define pagenum_128(_len) (u32)(((_len)>>7) + ((_len)&0x7F ? 1 : 0))
135 #define SET_88E_H2CCMD_WOWLAN_FUNC_ENABLE(__ph2ccmd, __val) \
136 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 1, __val)
137 #define SET_88E_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(__ph2ccmd, __val) \
138 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 1, 1, __val)
139 #define SET_88E_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(__ph2ccmd, __val) \
140 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 2, 1, __val)
141 #define SET_88E_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(__ph2ccmd, __val) \
142 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 3, 1, __val)
143 #define SET_88E_H2CCMD_WOWLAN_ALL_PKT_DROP(__ph2ccmd, __val) \
144 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 4, 1, __val)
145 #define SET_88E_H2CCMD_WOWLAN_GPIO_ACTIVE(__ph2ccmd, __val) \
146 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 5, 1, __val)
147 #define SET_88E_H2CCMD_WOWLAN_REKEY_WAKE_UP(__ph2ccmd, __val) \
148 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 6, 1, __val)
149 #define SET_88E_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(__ph2ccmd, __val) \
150 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 7, 1, __val)
151 #define SET_88E_H2CCMD_WOWLAN_GPIONUM(__ph2ccmd, __val) \
152 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
153 #define SET_88E_H2CCMD_WOWLAN_GPIO_DURATION(__ph2ccmd, __val) \
154 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
157 #define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val) \
158 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
159 #define SET_H2CCMD_PWRMODE_PARM_RLBM(__ph2ccmd, __val) \
160 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 4, __val)
161 #define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__ph2ccmd, __val) \
162 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 4, 4, __val)
163 #define SET_H2CCMD_PWRMODE_PARM_AWAKE_INTERVAL(__ph2ccmd, __val) \
164 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
165 #define SET_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__ph2ccmd, __val) \
166 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+3, 0, 8, __val)
167 #define SET_H2CCMD_PWRMODE_PARM_PWR_STATE(__ph2ccmd, __val) \
168 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+4, 0, 8, __val)
169 #define GET_88E_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd) \
170 LE_BITS_TO_1BYTE(__ph2ccmd, 0, 8)
172 #define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__ph2ccmd, __val) \
173 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
174 #define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val) \
175 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
176 #define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val) \
177 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
178 #define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val) \
179 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
182 #define SET_H2CCMD_AP_OFFLOAD_ON(__ph2ccmd, __val) \
183 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
184 #define SET_H2CCMD_AP_OFFLOAD_HIDDEN(__ph2ccmd, __val) \
185 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
186 #define SET_H2CCMD_AP_OFFLOAD_DENYANY(__ph2ccmd, __val) \
187 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
188 #define SET_H2CCMD_AP_OFFLOAD_WAKEUP_EVT_RPT(__ph2ccmd, __val) \
189 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+3, 0, 8, __val)
191 /* Keep Alive Control*/
192 #define SET_88E_H2CCMD_KEEP_ALIVE_ENABLE(__ph2ccmd, __val) \
193 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 1, __val)
194 #define SET_88E_H2CCMD_KEEP_ALIVE_ACCPEPT_USER_DEFINED(__ph2ccmd, __val)\
195 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 1, 1, __val)
196 #define SET_88E_H2CCMD_KEEP_ALIVE_PERIOD(__ph2ccmd, __val) \
197 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
199 /*REMOTE_WAKE_CTRL */
200 #define SET_88E_H2CCMD_REMOTE_WAKE_CTRL_EN(__ph2ccmd, __val) \
201 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 1, __val)
202 #if (USE_OLD_WOWLAN_DEBUG_FW == 0)
203 #define SET_88E_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(__ph2ccmd, __val)\
204 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 1, 1, __val)
205 #define SET_88E_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(__ph2ccmd, __val)\
206 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 2, 1, __val)
207 #define SET_88E_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(__ph2ccmd, __val)\
208 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 3, 1, __val)
210 #define SET_88E_H2CCMD_REMOTE_WAKE_CTRL_PAIRWISE_ENC_ALG(__ph2ccmd, __val)\
211 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
212 #define SET_88E_H2CCMD_REMOTE_WAKE_CTRL_GROUP_ENC_ALG(__ph2ccmd, __val) \
213 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
217 #define SET_88E_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(__ph2ccmd, __val)\
218 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
219 #define SET_88E_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(__ph2ccmd, __val) \
220 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
222 /* AOAC_RSVDPAGE_LOC */
223 #define SET_88E_H2CCMD_AOAC_RSVDPAGE_LOC_REM_WAKE_CTRL_INFO(__ph2ccmd, __val)\
224 SET_BITS_TO_LE_1BYTE((__ph2ccmd), 0, 8, __val)
225 #define SET_88E_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(__ph2ccmd, __val) \
226 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
227 #define SET_88E_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(__ph2ccmd, __val) \
228 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
229 #define SET_88E_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(__ph2ccmd, __val) \
230 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+3, 0, 8, __val)
231 #define SET_88E_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(__ph2ccmd, __val) \
232 SET_BITS_TO_LE_1BYTE((__ph2ccmd)+4, 0, 8, __val)
234 void rtl8723be_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
235 void rtl8723be_set_fw_ap_off_load_cmd(struct ieee80211_hw *hw,
236 u8 ap_offload_enable);
237 void rtl8723be_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
238 u32 cmd_len, u8 *p_cmdbuffer);
239 void rtl8723be_firmware_selfreset(struct ieee80211_hw *hw);
240 void rtl8723be_set_fw_rsvdpagepkt(struct ieee80211_hw *hw,
242 void rtl8723be_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus);
243 int rtl8723be_download_fw(struct ieee80211_hw *hw,
244 bool buse_wake_on_wlan_fw);
245 void rtl8723be_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw,