drivers/net/wireless/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2010  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include "core.h"
  31 #include "wifi.h"
  32 #include "pci.h"
  33 #include "base.h"
  34 #include "ps.h"
  35 #include "efuse.h"
  36
  37 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  38         INTEL_VENDOR_ID,
  39         ATI_VENDOR_ID,
  40         AMD_VENDOR_ID,
  41         SIS_VENDOR_ID
  42 };
  43
  44 static const u8 ac_to_hwq[] = {
  45         VO_QUEUE,
  46         VI_QUEUE,
  47         BE_QUEUE,
  48         BK_QUEUE
  49 };
  50
  51 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  52                        struct sk_buff *skb)
  53 {
  54         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  55         __le16 fc = rtl_get_fc(skb);
  56         u8 queue_index = skb_get_queue_mapping(skb);
  57
  58         if (unlikely(ieee80211_is_beacon(fc)))
  59                 return BEACON_QUEUE;
  60         if (ieee80211_is_mgmt(fc))
  61                 return MGNT_QUEUE;
  62         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  63                 if (ieee80211_is_nullfunc(fc))
  64                         return HIGH_QUEUE;
  65
  66         return ac_to_hwq[queue_index];
  67 }
  68
  69 /* Update PCI dependent default settings*/
  70 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  71 {
  72         struct rtl_priv *rtlpriv = rtl_priv(hw);
  73         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  74         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  75         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  76         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  77         u8 init_aspm;
  78
  79         ppsc->reg_rfps_level = 0;
  80         ppsc->support_aspm = 0;
  81
  82         /*Update PCI ASPM setting */
  83         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  84         switch (rtlpci->const_pci_aspm) {
  85         case 0:
  86                 /*No ASPM */
  87                 break;
  88
  89         case 1:
  90                 /*ASPM dynamically enabled/disable. */
  91                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  92                 break;
  93
  94         case 2:
  95                 /*ASPM with Clock Req dynamically enabled/disable. */
  96                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
  97                                          RT_RF_OFF_LEVL_CLK_REQ);
  98                 break;
  99
 100         case 3:
 101                 /*
 102                  * Always enable ASPM and Clock Req
 103                  * from initialization to halt.
 104                  * */
 105                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 106                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 107                                          RT_RF_OFF_LEVL_CLK_REQ);
 108                 break;
 109
 110         case 4:
 111                 /*
 112                  * Always enable ASPM without Clock Req
 113                  * from initialization to halt.
 114                  * */
 115                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 116                                           RT_RF_OFF_LEVL_CLK_REQ);
 117                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 118                 break;
 119         }
 120
 121         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 122
 123         /*Update Radio OFF setting */
 124         switch (rtlpci->const_hwsw_rfoff_d3) {
 125         case 1:
 126                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 127                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 128                 break;
 129
 130         case 2:
 131                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 132                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 133                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 134                 break;
 135
 136         case 3:
 137                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 138                 break;
 139         }
 140
 141         /*Set HW definition to determine if it supports ASPM. */
 142         switch (rtlpci->const_support_pciaspm) {
 143         case 0:{
 144                         /*Not support ASPM. */
 145                         bool support_aspm = false;
 146                         ppsc->support_aspm = support_aspm;
 147                         break;
 148                 }
 149         case 1:{
 150                         /*Support ASPM. */
 151                         bool support_aspm = true;
 152                         bool support_backdoor = true;
 153                         ppsc->support_aspm = support_aspm;
 154
 155                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 156                            !priv->ndis_adapter.amd_l1_patch)
 157                            support_backdoor = false; */
 158
 159                         ppsc->support_backdoor = support_backdoor;
 160
 161                         break;
 162                 }
 163         case 2:
 164                 /*ASPM value set by chipset. */
 165                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 166                         bool support_aspm = true;
 167                         ppsc->support_aspm = support_aspm;
 168                 }
 169                 break;
 170         default:
 171                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 172                          ("switch case not process\n"));
 173                 break;
 174         }
 175
 176         /* toshiba aspm issue, toshiba will set aspm selfly
 177          * so we should not set aspm in driver */
 178         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 179         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 180                 init_aspm == 0x43)
 181                 ppsc->support_aspm = false;
 182 }
 183
 184 static bool _rtl_pci_platform_switch_device_pci_aspm(
 185                         struct ieee80211_hw *hw,
 186                         u8 value)
 187 {
 188         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 189         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 190
 191         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 192                 value |= 0x40;
 193
 194         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 195
 196         return false;
 197 }
 198
 199 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 200 static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 201 {
 202         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 203         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 204
 205         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 206
 207         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 208                 udelay(100);
 209
 210         return true;
 211 }
 212
 213 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 214 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 215 {
 216         struct rtl_priv *rtlpriv = rtl_priv(hw);
 217         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 218         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 219         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 220         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 221         u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
 222         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 223         /*Retrieve original configuration settings. */
 224         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 225         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 226                                 pcibridge_linkctrlreg;
 227         u16 aspmlevel = 0;
 228         u8 tmp_u1b = 0;
 229
 230         if (!ppsc->support_aspm)
 231                 return;
 232
 233         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 234                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 235                          ("PCI(Bridge) UNKNOWN.\n"));
 236
 237                 return;
 238         }
 239
 240         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 241                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 242                 _rtl_pci_switch_clk_req(hw, 0x0);
 243         }
 244
 245         /*for promising device will in L0 state after an I/O. */
 246         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 247
 248         /*Set corresponding value. */
 249         aspmlevel |= BIT(0) | BIT(1);
 250         linkctrl_reg &= ~aspmlevel;
 251         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 252
 253         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 254         udelay(50);
 255
 256         /*4 Disable Pci Bridge ASPM */
 257         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 258                                      pcicfg_addrport + (num4bytes << 2));
 259         rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, pcibridge_linkctrlreg);
 260
 261         udelay(50);
 262 }
 263
 264 /*
 265  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 266  *power saving We should follow the sequence to enable
 267  *RTL8192SE first then enable Pci Bridge ASPM
 268  *or the system will show bluescreen.
 269  */
 270 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 271 {
 272         struct rtl_priv *rtlpriv = rtl_priv(hw);
 273         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 274         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 275         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 276         u8 pcibridge_busnum = pcipriv->ndis_adapter.pcibridge_busnum;
 277         u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum;
 278         u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum;
 279         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 280         u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
 281         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 282         u16 aspmlevel;
 283         u8 u_pcibridge_aspmsetting;
 284         u8 u_device_aspmsetting;
 285
 286         if (!ppsc->support_aspm)
 287                 return;
 288
 289         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 290                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 291                          ("PCI(Bridge) UNKNOWN.\n"));
 292                 return;
 293         }
 294
 295         /*4 Enable Pci Bridge ASPM */
 296         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 297                                      pcicfg_addrport + (num4bytes << 2));
 298
 299         u_pcibridge_aspmsetting =
 300             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 301             rtlpci->const_hostpci_aspm_setting;
 302
 303         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 304                 u_pcibridge_aspmsetting &= ~BIT(0);
 305
 306         rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, u_pcibridge_aspmsetting);
 307
 308         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 309                  ("PlatformEnableASPM():PciBridge busnumber[%x], "
 310                   "DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
 311                   pcibridge_busnum, pcibridge_devnum, pcibridge_funcnum,
 312                   (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 313                   u_pcibridge_aspmsetting));
 314
 315         udelay(50);
 316
 317         /*Get ASPM level (with/without Clock Req) */
 318         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 319         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 320
 321         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 322         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 323
 324         u_device_aspmsetting |= aspmlevel;
 325
 326         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 327
 328         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 329                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 330                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 331                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 332         }
 333         udelay(100);
 334 }
 335
 336 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 337 {
 338         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 339         u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
 340
 341         bool status = false;
 342         u8 offset_e0;
 343         unsigned offset_e4;
 344
 345         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 346                         pcicfg_addrport + 0xE0);
 347         rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, 0xA0);
 348
 349         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 350                         pcicfg_addrport + 0xE0);
 351         rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &offset_e0);
 352
 353         if (offset_e0 == 0xA0) {
 354                 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 355                                              pcicfg_addrport + 0xE4);
 356                 rtl_pci_raw_read_port_ulong(PCI_CONF_DATA, &offset_e4);
 357                 if (offset_e4 & BIT(23))
 358                         status = true;
 359         }
 360
 361         return status;
 362 }
 363
 364 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 365 {
 366         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 367         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 368         u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
 369         u8 linkctrl_reg;
 370         u8 num4bbytes;
 371
 372         num4bbytes = (capabilityoffset + 0x10) / 4;
 373
 374         /*Read  Link Control Register */
 375         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 376                                      pcicfg_addrport + (num4bbytes << 2));
 377         rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &linkctrl_reg);
 378
 379         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 380 }
 381
 382 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 383                 struct ieee80211_hw *hw)
 384 {
 385         struct rtl_priv *rtlpriv = rtl_priv(hw);
 386         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 387
 388         u8 tmp;
 389         int pos;
 390         u8 linkctrl_reg;
 391
 392         /*Link Control Register */
 393         pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
 394         pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg);
 395         pcipriv->ndis_adapter.linkctrl_reg = linkctrl_reg;
 396
 397         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
 398                  ("Link Control Register =%x\n",
 399                   pcipriv->ndis_adapter.linkctrl_reg));
 400
 401         pci_read_config_byte(pdev, 0x98, &tmp);
 402         tmp |= BIT(4);
 403         pci_write_config_byte(pdev, 0x98, tmp);
 404
 405         tmp = 0x17;
 406         pci_write_config_byte(pdev, 0x70f, tmp);
 407 }
 408
 409 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 410 {
 411         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 412
 413         _rtl_pci_update_default_setting(hw);
 414
 415         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 416                 /*Always enable ASPM & Clock Req. */
 417                 rtl_pci_enable_aspm(hw);
 418                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 419         }
 420
 421 }
 422
 423 static void _rtl_pci_io_handler_init(struct device *dev,
 424                                      struct ieee80211_hw *hw)
 425 {
 426         struct rtl_priv *rtlpriv = rtl_priv(hw);
 427
 428         rtlpriv->io.dev = dev;
 429
 430         rtlpriv->io.write8_async = pci_write8_async;
 431         rtlpriv->io.write16_async = pci_write16_async;
 432         rtlpriv->io.write32_async = pci_write32_async;
 433
 434         rtlpriv->io.read8_sync = pci_read8_sync;
 435         rtlpriv->io.read16_sync = pci_read16_sync;
 436         rtlpriv->io.read32_sync = pci_read32_sync;
 437
 438 }
 439
 440 static void _rtl_pci_io_handler_release(struct ieee80211_hw *hw)
 441 {
 442 }
 443
 444 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 445                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 446 {
 447         struct rtl_priv *rtlpriv = rtl_priv(hw);
 448         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 449         u8 additionlen = FCS_LEN;
 450         struct sk_buff *next_skb;
 451
 452         /* here open is 4, wep/tkip is 8, aes is 12*/
 453         if (info->control.hw_key)
 454                 additionlen += info->control.hw_key->icv_len;
 455
 456         /* The most skb num is 6 */
 457         tcb_desc->empkt_num = 0;
 458         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 459         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 460                 struct ieee80211_tx_info *next_info;
 461
 462                 next_info = IEEE80211_SKB_CB(next_skb);
 463                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 464                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 465                                 next_skb->len + additionlen;
 466                         tcb_desc->empkt_num++;
 467                 } else {
 468                         break;
 469                 }
 470
 471                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 472                                       next_skb))
 473                         break;
 474
 475                 if (tcb_desc->empkt_num >= 5)
 476                         break;
 477         }
 478         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 479
 480         return true;
 481 }
 482
 483 /* just for early mode now */
 484 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 485 {
 486         struct rtl_priv *rtlpriv = rtl_priv(hw);
 487         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 488         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 489         struct sk_buff *skb = NULL;
 490         struct ieee80211_tx_info *info = NULL;
 491         int tid; /* should be int */
 492
 493         if (!rtlpriv->rtlhal.earlymode_enable)
 494                 return;
 495
 496         /* we juse use em for BE/BK/VI/VO */
 497         for (tid = 7; tid >= 0; tid--) {
 498                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(hw, tid)];
 499                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 500                 while (!mac->act_scanning &&
 501                        rtlpriv->psc.rfpwr_state == ERFON) {
 502                         struct rtl_tcb_desc tcb_desc;
 503                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 504
 505                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 506                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 507                            (ring->entries - skb_queue_len(&ring->queue) > 5)) {
 508                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 509                         } else {
 510                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 511                                 break;
 512                         }
 513                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 514
 515                         /* Some macaddr can't do early mode. like
 516                          * multicast/broadcast/no_qos data */
 517                         info = IEEE80211_SKB_CB(skb);
 518                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 519                                 _rtl_update_earlymode_info(hw, skb,
 520                                                            &tcb_desc, tid);
 521
 522                         rtlpriv->intf_ops->adapter_tx(hw, skb, &tcb_desc);
 523                 }
 524         }
 525 }
 526
 527
 528 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 529 {
 530         struct rtl_priv *rtlpriv = rtl_priv(hw);
 531         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 532
 533         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 534
 535         while (skb_queue_len(&ring->queue)) {
 536                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
 537                 struct sk_buff *skb;
 538                 struct ieee80211_tx_info *info;
 539                 __le16 fc;
 540                 u8 tid;
 541
 542                 u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true,
 543                                                           HW_DESC_OWN);
 544
 545                 /*
 546                  *beacon packet will only use the first
 547                  *descriptor defautly,and the own may not
 548                  *be cleared by the hardware
 549                  */
 550                 if (own)
 551                         return;
 552                 ring->idx = (ring->idx + 1) % ring->entries;
 553
 554                 skb = __skb_dequeue(&ring->queue);
 555                 pci_unmap_single(rtlpci->pdev,
 556                                  rtlpriv->cfg->ops->
 557                                              get_desc((u8 *) entry, true,
 558                                                       HW_DESC_TXBUFF_ADDR),
 559                                  skb->len, PCI_DMA_TODEVICE);
 560
 561                 /* remove early mode header */
 562                 if (rtlpriv->rtlhal.earlymode_enable)
 563                         skb_pull(skb, EM_HDR_LEN);
 564
 565                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 566                          ("new ring->idx:%d, "
 567                           "free: skb_queue_len:%d, free: seq:%x\n",
 568                           ring->idx,
 569                           skb_queue_len(&ring->queue),
 570                           *(u16 *) (skb->data + 22)));
 571
 572                 if (prio == TXCMD_QUEUE) {
 573                         dev_kfree_skb(skb);
 574                         goto tx_status_ok;
 575
 576                 }
 577
 578                 /* for sw LPS, just after NULL skb send out, we can
 579                  * sure AP kown we are sleeped, our we should not let
 580                  * rf to sleep*/
 581                 fc = rtl_get_fc(skb);
 582                 if (ieee80211_is_nullfunc(fc)) {
 583                         if (ieee80211_has_pm(fc)) {
 584                                 rtlpriv->mac80211.offchan_deley = true;
 585                                 rtlpriv->psc.state_inap = 1;
 586                         } else {
 587                                 rtlpriv->psc.state_inap = 0;
 588                         }
 589                 }
 590
 591                 /* update tid tx pkt num */
 592                 tid = rtl_get_tid(skb);
 593                 if (tid <= 7)
 594                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 595
 596                 info = IEEE80211_SKB_CB(skb);
 597                 ieee80211_tx_info_clear_status(info);
 598
 599                 info->flags |= IEEE80211_TX_STAT_ACK;
 600                 /*info->status.rates[0].count = 1; */
 601
 602                 ieee80211_tx_status_irqsafe(hw, skb);
 603
 604                 if ((ring->entries - skb_queue_len(&ring->queue))
 605                                 == 2) {
 606
 607                         RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
 608                                         ("more desc left, wake"
 609                                          "skb_queue@%d,ring->idx = %d,"
 610                                          "skb_queue_len = 0x%d\n",
 611                                          prio, ring->idx,
 612                                          skb_queue_len(&ring->queue)));
 613
 614                         ieee80211_wake_queue(hw,
 615                                         skb_get_queue_mapping
 616                                         (skb));
 617                 }
 618 tx_status_ok:
 619                 skb = NULL;
 620         }
 621
 622         if (((rtlpriv->link_info.num_rx_inperiod +
 623                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 624                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 625                 tasklet_schedule(&rtlpriv->works.ips_leave_tasklet);
 626         }
 627 }
 628
 629 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 630 {
 631         struct rtl_priv *rtlpriv = rtl_priv(hw);
 632         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 633         int rx_queue_idx = RTL_PCI_RX_MPDU_QUEUE;
 634
 635         struct ieee80211_rx_status rx_status = { 0 };
 636         unsigned int count = rtlpci->rxringcount;
 637         u8 own;
 638         u8 tmp_one;
 639         u32 bufferaddress;
 640         bool unicast = false;
 641
 642         struct rtl_stats stats = {
 643                 .signal = 0,
 644                 .noise = -98,
 645                 .rate = 0,
 646         };
 647         int index = rtlpci->rx_ring[rx_queue_idx].idx;
 648
 649         /*RX NORMAL PKT */
 650         while (count--) {
 651                 /*rx descriptor */
 652                 struct rtl_rx_desc *pdesc = &rtlpci->rx_ring[rx_queue_idx].desc[
 653                                 index];
 654                 /*rx pkt */
 655                 struct sk_buff *skb = rtlpci->rx_ring[rx_queue_idx].rx_buf[
 656                                 index];
 657
 658                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
 659                                                        false, HW_DESC_OWN);
 660
 661                 if (own) {
 662                         /*wait data to be filled by hardware */
 663                         break;
 664                 } else {
 665                         struct ieee80211_hdr *hdr;
 666                         __le16 fc;
 667                         struct sk_buff *new_skb = NULL;
 668
 669                         rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 670                                                          &rx_status,
 671                                                          (u8 *) pdesc, skb);
 672
 673                         skb_put(skb, rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
 674                                                          false,
 675                                                          HW_DESC_RXPKT_LEN));
 676                         skb_reserve(skb,
 677                                     stats.rx_drvinfo_size + stats.rx_bufshift);
 678
 679                         /*
 680                          *NOTICE This can not be use for mac80211,
 681                          *this is done in mac80211 code,
 682                          *if you done here sec DHCP will fail
 683                          *skb_trim(skb, skb->len - 4);
 684                          */
 685
 686                         hdr = rtl_get_hdr(skb);
 687                         fc = rtl_get_fc(skb);
 688
 689                         /* try for new buffer - if allocation fails, drop
 690                          * frame and reuse old buffer
 691                          */
 692                         new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 693                         if (unlikely(!new_skb)) {
 694                                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV),
 695                                          DBG_DMESG,
 696                                          ("can't alloc skb for rx\n"));
 697                                 goto done;
 698                         }
 699                         pci_unmap_single(rtlpci->pdev,
 700                                          *((dma_addr_t *) skb->cb),
 701                                          rtlpci->rxbuffersize,
 702                                          PCI_DMA_FROMDEVICE);
 703
 704                         if (!stats.crc && !stats.hwerror) {
 705                                 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 706                                        sizeof(rx_status));
 707
 708                                 if (is_broadcast_ether_addr(hdr->addr1)) {
 709                                         ;/*TODO*/
 710                                 } else if (is_multicast_ether_addr(hdr->addr1)) {
 711                                         ;/*TODO*/
 712                                 } else {
 713                                         unicast = true;
 714                                         rtlpriv->stats.rxbytesunicast +=
 715                                             skb->len;
 716                                 }
 717
 718                                 rtl_is_special_data(hw, skb, false);
 719
 720                                 if (ieee80211_is_data(fc)) {
 721                                         rtlpriv->cfg->ops->led_control(hw,
 722                                                                LED_CTL_RX);
 723
 724                                         if (unicast)
 725                                                 rtlpriv->link_info.
 726                                                     num_rx_inperiod++;
 727                                 }
 728
 729                                 /* for sw lps */
 730                                 rtl_swlps_beacon(hw, (void *)skb->data,
 731                                                  skb->len);
 732                                 rtl_recognize_peer(hw, (void *)skb->data,
 733                                                    skb->len);
 734                                 if ((rtlpriv->mac80211.opmode ==
 735                                      NL80211_IFTYPE_AP) &&
 736                                     (rtlpriv->rtlhal.current_bandtype ==
 737                                      BAND_ON_2_4G) &&
 738                                      (ieee80211_is_beacon(fc) ||
 739                                      ieee80211_is_probe_resp(fc))) {
 740                                         dev_kfree_skb_any(skb);
 741                                 } else {
 742                                         if (unlikely(!rtl_action_proc(hw, skb,
 743                                             false))) {
 744                                                 dev_kfree_skb_any(skb);
 745                                         } else {
 746                                                 struct sk_buff *uskb = NULL;
 747                                                 u8 *pdata;
 748                                                 uskb = dev_alloc_skb(skb->len
 749                                                                      + 128);
 750                                                 memcpy(IEEE80211_SKB_RXCB(uskb),
 751                                                        &rx_status,
 752                                                        sizeof(rx_status));
 753                                                 pdata = (u8 *)skb_put(uskb,
 754                                                         skb->len);
 755                                                 memcpy(pdata, skb->data,
 756                                                        skb->len);
 757                                                 dev_kfree_skb_any(skb);
 758
 759                                                 ieee80211_rx_irqsafe(hw, uskb);
 760                                         }
 761                                 }
 762                         } else {
 763                                 dev_kfree_skb_any(skb);
 764                         }
 765
 766                         if (((rtlpriv->link_info.num_rx_inperiod +
 767                                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 768                                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 769                                 tasklet_schedule(&rtlpriv->works.ips_leave_tasklet);
 770                         }
 771
 772                         skb = new_skb;
 773
 774                         rtlpci->rx_ring[rx_queue_idx].rx_buf[index] = skb;
 775                         *((dma_addr_t *) skb->cb) =
 776                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 777                                            rtlpci->rxbuffersize,
 778                                            PCI_DMA_FROMDEVICE);
 779
 780                 }
 781 done:
 782                 bufferaddress = (*((dma_addr_t *)skb->cb));
 783                 tmp_one = 1;
 784                 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
 785                                             HW_DESC_RXBUFF_ADDR,
 786                                             (u8 *)&bufferaddress);
 787                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 788                                             HW_DESC_RXPKT_LEN,
 789                                             (u8 *)&rtlpci->rxbuffersize);
 790
 791                 if (index == rtlpci->rxringcount - 1)
 792                         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 793                                                     HW_DESC_RXERO,
 794                                                     (u8 *)&tmp_one);
 795
 796                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false, HW_DESC_RXOWN,
 797                                             (u8 *)&tmp_one);
 798
 799                 index = (index + 1) % rtlpci->rxringcount;
 800         }
 801
 802         rtlpci->rx_ring[rx_queue_idx].idx = index;
 803 }
 804
 805 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 806 {
 807         struct ieee80211_hw *hw = dev_id;
 808         struct rtl_priv *rtlpriv = rtl_priv(hw);
 809         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 810         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 811         unsigned long flags;
 812         u32 inta = 0;
 813         u32 intb = 0;
 814
 815         if (rtlpci->irq_enabled == 0)
 816                 return IRQ_HANDLED;
 817
 818         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
 819
 820         /*read ISR: 4/8bytes */
 821         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 822
 823         /*Shared IRQ or HW disappared */
 824         if (!inta || inta == 0xffff)
 825                 goto done;
 826
 827         /*<1> beacon related */
 828         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 829                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 830                          ("beacon ok interrupt!\n"));
 831         }
 832
 833         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 834                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 835                          ("beacon err interrupt!\n"));
 836         }
 837
 838         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 839                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 840                          ("beacon interrupt!\n"));
 841         }
 842
 843         if (inta & rtlpriv->cfg->maps[RTL_IMR_BcnInt]) {
 844                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 845                          ("prepare beacon for interrupt!\n"));
 846                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 847         }
 848
 849         /*<3> Tx related */
 850         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 851                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("IMR_TXFOVW!\n"));
 852
 853         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 854                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 855                          ("Manage ok interrupt!\n"));
 856                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 857         }
 858
 859         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 860                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 861                          ("HIGH_QUEUE ok interrupt!\n"));
 862                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 863         }
 864
 865         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
 866                 rtlpriv->link_info.num_tx_inperiod++;
 867
 868                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 869                          ("BK Tx OK interrupt!\n"));
 870                 _rtl_pci_tx_isr(hw, BK_QUEUE);
 871         }
 872
 873         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
 874                 rtlpriv->link_info.num_tx_inperiod++;
 875
 876                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 877                          ("BE TX OK interrupt!\n"));
 878                 _rtl_pci_tx_isr(hw, BE_QUEUE);
 879         }
 880
 881         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
 882                 rtlpriv->link_info.num_tx_inperiod++;
 883
 884                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 885                          ("VI TX OK interrupt!\n"));
 886                 _rtl_pci_tx_isr(hw, VI_QUEUE);
 887         }
 888
 889         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
 890                 rtlpriv->link_info.num_tx_inperiod++;
 891
 892                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 893                          ("Vo TX OK interrupt!\n"));
 894                 _rtl_pci_tx_isr(hw, VO_QUEUE);
 895         }
 896
 897         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
 898                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
 899                         rtlpriv->link_info.num_tx_inperiod++;
 900
 901                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 902                                         ("CMD TX OK interrupt!\n"));
 903                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
 904                 }
 905         }
 906
 907         /*<2> Rx related */
 908         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
 909                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, ("Rx ok interrupt!\n"));
 910                 _rtl_pci_rx_interrupt(hw);
 911         }
 912
 913         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
 914                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 915                          ("rx descriptor unavailable!\n"));
 916                 _rtl_pci_rx_interrupt(hw);
 917         }
 918
 919         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
 920                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("rx overflow !\n"));
 921                 _rtl_pci_rx_interrupt(hw);
 922         }
 923
 924         if (rtlpriv->rtlhal.earlymode_enable)
 925                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
 926
 927         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
 928         return IRQ_HANDLED;
 929
 930 done:
 931         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
 932         return IRQ_HANDLED;
 933 }
 934
 935 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
 936 {
 937         _rtl_pci_tx_chk_waitq(hw);
 938 }
 939
 940 static void _rtl_pci_ips_leave_tasklet(struct ieee80211_hw *hw)
 941 {
 942         rtl_lps_leave(hw);
 943 }
 944
 945 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
 946 {
 947         struct rtl_priv *rtlpriv = rtl_priv(hw);
 948         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 949         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 950         struct rtl8192_tx_ring *ring = NULL;
 951         struct ieee80211_hdr *hdr = NULL;
 952         struct ieee80211_tx_info *info = NULL;
 953         struct sk_buff *pskb = NULL;
 954         struct rtl_tx_desc *pdesc = NULL;
 955         struct rtl_tcb_desc tcb_desc;
 956         u8 temp_one = 1;
 957
 958         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 959         ring = &rtlpci->tx_ring[BEACON_QUEUE];
 960         pskb = __skb_dequeue(&ring->queue);
 961         if (pskb)
 962                 kfree_skb(pskb);
 963
 964         /*NB: the beacon data buffer must be 32-bit aligned. */
 965         pskb = ieee80211_beacon_get(hw, mac->vif);
 966         if (pskb == NULL)
 967                 return;
 968         hdr = rtl_get_hdr(pskb);
 969         info = IEEE80211_SKB_CB(pskb);
 970         pdesc = &ring->desc[0];
 971         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
 972                 info, pskb, BEACON_QUEUE, &tcb_desc);
 973
 974         __skb_queue_tail(&ring->queue, pskb);
 975
 976         rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, HW_DESC_OWN,
 977                                     (u8 *)&temp_one);
 978
 979         return;
 980 }
 981
 982 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
 983 {
 984         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 985         u8 i;
 986
 987         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
 988                 rtlpci->txringcount[i] = RT_TXDESC_NUM;
 989
 990         /*
 991          *we just alloc 2 desc for beacon queue,
 992          *because we just need first desc in hw beacon.
 993          */
 994         rtlpci->txringcount[BEACON_QUEUE] = 2;
 995
 996         /*
 997          *BE queue need more descriptor for performance
 998          *consideration or, No more tx desc will happen,
 999          *and may cause mac80211 mem leakage.
1000          */
1001         rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1002
1003         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1004         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1005 }
1006
1007 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1008                 struct pci_dev *pdev)
1009 {
1010         struct rtl_priv *rtlpriv = rtl_priv(hw);
1011         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1012         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1013         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1014
1015         rtlpci->up_first_time = true;
1016         rtlpci->being_init_adapter = false;
1017
1018         rtlhal->hw = hw;
1019         rtlpci->pdev = pdev;
1020
1021         /*Tx/Rx related var */
1022         _rtl_pci_init_trx_var(hw);
1023
1024         /*IBSS*/ mac->beacon_interval = 100;
1025
1026         /*AMPDU*/
1027         mac->min_space_cfg = 0;
1028         mac->max_mss_density = 0;
1029         /*set sane AMPDU defaults */
1030         mac->current_ampdu_density = 7;
1031         mac->current_ampdu_factor = 3;
1032
1033         /*QOS*/
1034         rtlpci->acm_method = eAcmWay2_SW;
1035
1036         /*task */
1037         tasklet_init(&rtlpriv->works.irq_tasklet,
1038                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1039                      (unsigned long)hw);
1040         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1041                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1042                      (unsigned long)hw);
1043         tasklet_init(&rtlpriv->works.ips_leave_tasklet,
1044                      (void (*)(unsigned long))_rtl_pci_ips_leave_tasklet,
1045                      (unsigned long)hw);
1046 }
1047
1048 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1049                                  unsigned int prio, unsigned int entries)
1050 {
1051         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1052         struct rtl_priv *rtlpriv = rtl_priv(hw);
1053         struct rtl_tx_desc *ring;
1054         dma_addr_t dma;
1055         u32 nextdescaddress;
1056         int i;
1057
1058         ring = pci_alloc_consistent(rtlpci->pdev,
1059                                     sizeof(*ring) * entries, &dma);
1060
1061         if (!ring || (unsigned long)ring & 0xFF) {
1062                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1063                          ("Cannot allocate TX ring (prio = %d)\n", prio));
1064                 return -ENOMEM;
1065         }
1066
1067         memset(ring, 0, sizeof(*ring) * entries);
1068         rtlpci->tx_ring[prio].desc = ring;
1069         rtlpci->tx_ring[prio].dma = dma;
1070         rtlpci->tx_ring[prio].idx = 0;
1071         rtlpci->tx_ring[prio].entries = entries;
1072         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1073
1074         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1075                  ("queue:%d, ring_addr:%p\n", prio, ring));
1076
1077         for (i = 0; i < entries; i++) {
1078                 nextdescaddress = (u32) dma +
1079                                               ((i + 1) % entries) *
1080                                               sizeof(*ring);
1081
1082                 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
1083                                             true, HW_DESC_TX_NEXTDESC_ADDR,
1084                                             (u8 *)&nextdescaddress);
1085         }
1086
1087         return 0;
1088 }
1089
1090 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
1091 {
1092         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1093         struct rtl_priv *rtlpriv = rtl_priv(hw);
1094         struct rtl_rx_desc *entry = NULL;
1095         int i, rx_queue_idx;
1096         u8 tmp_one = 1;
1097
1098         /*
1099          *rx_queue_idx 0:RX_MPDU_QUEUE
1100          *rx_queue_idx 1:RX_CMD_QUEUE
1101          */
1102         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1103              rx_queue_idx++) {
1104                 rtlpci->rx_ring[rx_queue_idx].desc =
1105                     pci_alloc_consistent(rtlpci->pdev,
1106                                          sizeof(*rtlpci->rx_ring[rx_queue_idx].
1107                                                 desc) * rtlpci->rxringcount,
1108                                          &rtlpci->rx_ring[rx_queue_idx].dma);
1109
1110                 if (!rtlpci->rx_ring[rx_queue_idx].desc ||
1111                     (unsigned long)rtlpci->rx_ring[rx_queue_idx].desc & 0xFF) {
1112                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1113                                  ("Cannot allocate RX ring\n"));
1114                         return -ENOMEM;
1115                 }
1116
1117                 memset(rtlpci->rx_ring[rx_queue_idx].desc, 0,
1118                        sizeof(*rtlpci->rx_ring[rx_queue_idx].desc) *
1119                        rtlpci->rxringcount);
1120
1121                 rtlpci->rx_ring[rx_queue_idx].idx = 0;
1122
1123                 /* If amsdu_8k is disabled, set buffersize to 4096. This
1124                  * change will reduce memory fragmentation.
1125                  */
1126                 if (rtlpci->rxbuffersize > 4096 &&
1127                     rtlpriv->rtlhal.disable_amsdu_8k)
1128                         rtlpci->rxbuffersize = 4096;
1129
1130                 for (i = 0; i < rtlpci->rxringcount; i++) {
1131                         struct sk_buff *skb =
1132                             dev_alloc_skb(rtlpci->rxbuffersize);
1133                         u32 bufferaddress;
1134                         if (!skb)
1135                                 return 0;
1136                         entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1137
1138                         /*skb->dev = dev; */
1139
1140                         rtlpci->rx_ring[rx_queue_idx].rx_buf[i] = skb;
1141
1142                         /*
1143                          *just set skb->cb to mapping addr
1144                          *for pci_unmap_single use
1145                          */
1146                         *((dma_addr_t *) skb->cb) =
1147                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
1148                                            rtlpci->rxbuffersize,
1149                                            PCI_DMA_FROMDEVICE);
1150
1151                         bufferaddress = (*((dma_addr_t *)skb->cb));
1152                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1153                                                     HW_DESC_RXBUFF_ADDR,
1154                                                     (u8 *)&bufferaddress);
1155                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1156                                                     HW_DESC_RXPKT_LEN,
1157                                                     (u8 *)&rtlpci->
1158                                                     rxbuffersize);
1159                         rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1160                                                     HW_DESC_RXOWN,
1161                                                     (u8 *)&tmp_one);
1162                 }
1163
1164                 rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1165                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1166         }
1167         return 0;
1168 }
1169
1170 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1171                 unsigned int prio)
1172 {
1173         struct rtl_priv *rtlpriv = rtl_priv(hw);
1174         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1175         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1176
1177         while (skb_queue_len(&ring->queue)) {
1178                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
1179                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1180
1181                 pci_unmap_single(rtlpci->pdev,
1182                                  rtlpriv->cfg->
1183                                              ops->get_desc((u8 *) entry, true,
1184                                                    HW_DESC_TXBUFF_ADDR),
1185                                  skb->len, PCI_DMA_TODEVICE);
1186                 kfree_skb(skb);
1187                 ring->idx = (ring->idx + 1) % ring->entries;
1188         }
1189
1190         pci_free_consistent(rtlpci->pdev,
1191                             sizeof(*ring->desc) * ring->entries,
1192                             ring->desc, ring->dma);
1193         ring->desc = NULL;
1194 }
1195
1196 static void _rtl_pci_free_rx_ring(struct rtl_pci *rtlpci)
1197 {
1198         int i, rx_queue_idx;
1199
1200         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1201         /*rx_queue_idx 1:RX_CMD_QUEUE */
1202         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1203              rx_queue_idx++) {
1204                 for (i = 0; i < rtlpci->rxringcount; i++) {
1205                         struct sk_buff *skb =
1206                             rtlpci->rx_ring[rx_queue_idx].rx_buf[i];
1207                         if (!skb)
1208                                 continue;
1209
1210                         pci_unmap_single(rtlpci->pdev,
1211                                          *((dma_addr_t *) skb->cb),
1212                                          rtlpci->rxbuffersize,
1213                                          PCI_DMA_FROMDEVICE);
1214                         kfree_skb(skb);
1215                 }
1216
1217                 pci_free_consistent(rtlpci->pdev,
1218                                     sizeof(*rtlpci->rx_ring[rx_queue_idx].
1219                                            desc) * rtlpci->rxringcount,
1220                                     rtlpci->rx_ring[rx_queue_idx].desc,
1221                                     rtlpci->rx_ring[rx_queue_idx].dma);
1222                 rtlpci->rx_ring[rx_queue_idx].desc = NULL;
1223         }
1224 }
1225
1226 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1227 {
1228         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1229         int ret;
1230         int i;
1231
1232         ret = _rtl_pci_init_rx_ring(hw);
1233         if (ret)
1234                 return ret;
1235
1236         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1237                 ret = _rtl_pci_init_tx_ring(hw, i,
1238                                  rtlpci->txringcount[i]);
1239                 if (ret)
1240                         goto err_free_rings;
1241         }
1242
1243         return 0;
1244
1245 err_free_rings:
1246         _rtl_pci_free_rx_ring(rtlpci);
1247
1248         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1249                 if (rtlpci->tx_ring[i].desc)
1250                         _rtl_pci_free_tx_ring(hw, i);
1251
1252         return 1;
1253 }
1254
1255 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1256 {
1257         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1258         u32 i;
1259
1260         /*free rx rings */
1261         _rtl_pci_free_rx_ring(rtlpci);
1262
1263         /*free tx rings */
1264         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1265                 _rtl_pci_free_tx_ring(hw, i);
1266
1267         return 0;
1268 }
1269
1270 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1271 {
1272         struct rtl_priv *rtlpriv = rtl_priv(hw);
1273         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1274         int i, rx_queue_idx;
1275         unsigned long flags;
1276         u8 tmp_one = 1;
1277
1278         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1279         /*rx_queue_idx 1:RX_CMD_QUEUE */
1280         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1281              rx_queue_idx++) {
1282                 /*
1283                  *force the rx_ring[RX_MPDU_QUEUE/
1284                  *RX_CMD_QUEUE].idx to the first one
1285                  */
1286                 if (rtlpci->rx_ring[rx_queue_idx].desc) {
1287                         struct rtl_rx_desc *entry = NULL;
1288
1289                         for (i = 0; i < rtlpci->rxringcount; i++) {
1290                                 entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1291                                 rtlpriv->cfg->ops->set_desc((u8 *) entry,
1292                                                             false,
1293                                                             HW_DESC_RXOWN,
1294                                                             (u8 *)&tmp_one);
1295                         }
1296                         rtlpci->rx_ring[rx_queue_idx].idx = 0;
1297                 }
1298         }
1299
1300         /*
1301          *after reset, release previous pending packet,
1302          *and force the  tx idx to the first one
1303          */
1304         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1305         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1306                 if (rtlpci->tx_ring[i].desc) {
1307                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1308
1309                         while (skb_queue_len(&ring->queue)) {
1310                                 struct rtl_tx_desc *entry =
1311                                     &ring->desc[ring->idx];
1312                                 struct sk_buff *skb =
1313                                     __skb_dequeue(&ring->queue);
1314
1315                                 pci_unmap_single(rtlpci->pdev,
1316                                                  rtlpriv->cfg->ops->
1317                                                          get_desc((u8 *)
1318                                                          entry,
1319                                                          true,
1320                                                          HW_DESC_TXBUFF_ADDR),
1321                                                  skb->len, PCI_DMA_TODEVICE);
1322                                 kfree_skb(skb);
1323                                 ring->idx = (ring->idx + 1) % ring->entries;
1324                         }
1325                         ring->idx = 0;
1326                 }
1327         }
1328
1329         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1330
1331         return 0;
1332 }
1333
1334 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1335                                         struct sk_buff *skb)
1336 {
1337         struct rtl_priv *rtlpriv = rtl_priv(hw);
1338         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1339         struct ieee80211_sta *sta = info->control.sta;
1340         struct rtl_sta_info *sta_entry = NULL;
1341         u8 tid = rtl_get_tid(skb);
1342
1343         if (!sta)
1344                 return false;
1345         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1346
1347         if (!rtlpriv->rtlhal.earlymode_enable)
1348                 return false;
1349         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1350                 return false;
1351         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1352                 return false;
1353         if (tid > 7)
1354                 return false;
1355
1356         /* maybe every tid should be checked */
1357         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1358                 return false;
1359
1360         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1361         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1362         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1363
1364         return true;
1365 }
1366
1367 static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
1368                 struct rtl_tcb_desc *ptcb_desc)
1369 {
1370         struct rtl_priv *rtlpriv = rtl_priv(hw);
1371         struct rtl_sta_info *sta_entry = NULL;
1372         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1373         struct ieee80211_sta *sta = info->control.sta;
1374         struct rtl8192_tx_ring *ring;
1375         struct rtl_tx_desc *pdesc;
1376         u8 idx;
1377         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1378         unsigned long flags;
1379         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1380         __le16 fc = rtl_get_fc(skb);
1381         u8 *pda_addr = hdr->addr1;
1382         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1383         /*ssn */
1384         u8 tid = 0;
1385         u16 seq_number = 0;
1386         u8 own;
1387         u8 temp_one = 1;
1388
1389         if (ieee80211_is_auth(fc)) {
1390                 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n"));
1391                 rtl_ips_nic_on(hw);
1392         }
1393
1394         if (rtlpriv->psc.sw_ps_enabled) {
1395                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1396                         !ieee80211_has_pm(fc))
1397                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1398         }
1399
1400         rtl_action_proc(hw, skb, true);
1401
1402         if (is_multicast_ether_addr(pda_addr))
1403                 rtlpriv->stats.txbytesmulticast += skb->len;
1404         else if (is_broadcast_ether_addr(pda_addr))
1405                 rtlpriv->stats.txbytesbroadcast += skb->len;
1406         else
1407                 rtlpriv->stats.txbytesunicast += skb->len;
1408
1409         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1410         ring = &rtlpci->tx_ring[hw_queue];
1411         if (hw_queue != BEACON_QUEUE)
1412                 idx = (ring->idx + skb_queue_len(&ring->queue)) %
1413                                 ring->entries;
1414         else
1415                 idx = 0;
1416
1417         pdesc = &ring->desc[idx];
1418         own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
1419                         true, HW_DESC_OWN);
1420
1421         if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1422                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1423                          ("No more TX desc@%d, ring->idx = %d,"
1424                           "idx = %d, skb_queue_len = 0x%d\n",
1425                           hw_queue, ring->idx, idx,
1426                           skb_queue_len(&ring->queue)));
1427
1428                 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1429                 return skb->len;
1430         }
1431
1432         if (ieee80211_is_data_qos(fc)) {
1433                 tid = rtl_get_tid(skb);
1434                 if (sta) {
1435                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1436                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1437                                       IEEE80211_SCTL_SEQ) >> 4;
1438                         seq_number += 1;
1439
1440                         if (!ieee80211_has_morefrags(hdr->frame_control))
1441                                 sta_entry->tids[tid].seq_number = seq_number;
1442                 }
1443         }
1444
1445         if (ieee80211_is_data(fc))
1446                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1447
1448         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1449                         info, skb, hw_queue, ptcb_desc);
1450
1451         __skb_queue_tail(&ring->queue, skb);
1452
1453         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, true,
1454                                     HW_DESC_OWN, (u8 *)&temp_one);
1455
1456
1457         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1458             hw_queue != BEACON_QUEUE) {
1459
1460                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1461                          ("less desc left, stop skb_queue@%d, "
1462                           "ring->idx = %d,"
1463                           "idx = %d, skb_queue_len = 0x%d\n",
1464                           hw_queue, ring->idx, idx,
1465                           skb_queue_len(&ring->queue)));
1466
1467                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1468         }
1469
1470         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1471
1472         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1473
1474         return 0;
1475 }
1476
1477 static void rtl_pci_flush(struct ieee80211_hw *hw, bool drop)
1478 {
1479         struct rtl_priv *rtlpriv = rtl_priv(hw);
1480         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1481         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1482         u16 i = 0;
1483         int queue_id;
1484         struct rtl8192_tx_ring *ring;
1485
1486         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1487                 u32 queue_len;
1488                 ring = &pcipriv->dev.tx_ring[queue_id];
1489                 queue_len = skb_queue_len(&ring->queue);
1490                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1491                         queue_id == TXCMD_QUEUE) {
1492                         queue_id--;
1493                         continue;
1494                 } else {
1495                         msleep(20);
1496                         i++;
1497                 }
1498
1499                 /* we just wait 1s for all queues */
1500                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1501                         is_hal_stop(rtlhal) || i >= 200)
1502                         return;
1503         }
1504 }
1505
1506 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1507 {
1508         struct rtl_priv *rtlpriv = rtl_priv(hw);
1509         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1510
1511         _rtl_pci_deinit_trx_ring(hw);
1512
1513         synchronize_irq(rtlpci->pdev->irq);
1514         tasklet_kill(&rtlpriv->works.irq_tasklet);
1515         tasklet_kill(&rtlpriv->works.ips_leave_tasklet);
1516
1517         flush_workqueue(rtlpriv->works.rtl_wq);
1518         destroy_workqueue(rtlpriv->works.rtl_wq);
1519
1520 }
1521
1522 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1523 {
1524         struct rtl_priv *rtlpriv = rtl_priv(hw);
1525         int err;
1526
1527         _rtl_pci_init_struct(hw, pdev);
1528
1529         err = _rtl_pci_init_trx_ring(hw);
1530         if (err) {
1531                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1532                          ("tx ring initialization failed"));
1533                 return err;
1534         }
1535
1536         return 1;
1537 }
1538
1539 static int rtl_pci_start(struct ieee80211_hw *hw)
1540 {
1541         struct rtl_priv *rtlpriv = rtl_priv(hw);
1542         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1543         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1544         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1545
1546         int err;
1547
1548         rtl_pci_reset_trx_ring(hw);
1549
1550         rtlpci->driver_is_goingto_unload = false;
1551         err = rtlpriv->cfg->ops->hw_init(hw);
1552         if (err) {
1553                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1554                          ("Failed to config hardware!\n"));
1555                 return err;
1556         }
1557
1558         rtlpriv->cfg->ops->enable_interrupt(hw);
1559         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("enable_interrupt OK\n"));
1560
1561         rtl_init_rx_config(hw);
1562
1563         /*should after adapter start and interrupt enable. */
1564         set_hal_start(rtlhal);
1565
1566         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1567
1568         rtlpci->up_first_time = false;
1569
1570         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("OK\n"));
1571         return 0;
1572 }
1573
1574 static void rtl_pci_stop(struct ieee80211_hw *hw)
1575 {
1576         struct rtl_priv *rtlpriv = rtl_priv(hw);
1577         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1578         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1579         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1580         unsigned long flags;
1581         u8 RFInProgressTimeOut = 0;
1582
1583         /*
1584          *should before disable interrrupt&adapter
1585          *and will do it immediately.
1586          */
1587         set_hal_stop(rtlhal);
1588
1589         rtlpriv->cfg->ops->disable_interrupt(hw);
1590         tasklet_kill(&rtlpriv->works.ips_leave_tasklet);
1591
1592         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1593         while (ppsc->rfchange_inprogress) {
1594                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1595                 if (RFInProgressTimeOut > 100) {
1596                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1597                         break;
1598                 }
1599                 mdelay(1);
1600                 RFInProgressTimeOut++;
1601                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1602         }
1603         ppsc->rfchange_inprogress = true;
1604         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1605
1606         rtlpci->driver_is_goingto_unload = true;
1607         rtlpriv->cfg->ops->hw_disable(hw);
1608         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1609
1610         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1611         ppsc->rfchange_inprogress = false;
1612         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1613
1614         rtl_pci_enable_aspm(hw);
1615 }
1616
1617 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1618                 struct ieee80211_hw *hw)
1619 {
1620         struct rtl_priv *rtlpriv = rtl_priv(hw);
1621         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1622         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1623         struct pci_dev *bridge_pdev = pdev->bus->self;
1624         u16 venderid;
1625         u16 deviceid;
1626         u8 revisionid;
1627         u16 irqline;
1628         u8 tmp;
1629
1630         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1631         venderid = pdev->vendor;
1632         deviceid = pdev->device;
1633         pci_read_config_byte(pdev, 0x8, &revisionid);
1634         pci_read_config_word(pdev, 0x3C, &irqline);
1635
1636         if (deviceid == RTL_PCI_8192_DID ||
1637             deviceid == RTL_PCI_0044_DID ||
1638             deviceid == RTL_PCI_0047_DID ||
1639             deviceid == RTL_PCI_8192SE_DID ||
1640             deviceid == RTL_PCI_8174_DID ||
1641             deviceid == RTL_PCI_8173_DID ||
1642             deviceid == RTL_PCI_8172_DID ||
1643             deviceid == RTL_PCI_8171_DID) {
1644                 switch (revisionid) {
1645                 case RTL_PCI_REVISION_ID_8192PCIE:
1646                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1647                                  ("8192 PCI-E is found - "
1648                                   "vid/did=%x/%x\n", venderid, deviceid));
1649                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1650                         break;
1651                 case RTL_PCI_REVISION_ID_8192SE:
1652                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1653                                  ("8192SE is found - "
1654                                   "vid/did=%x/%x\n", venderid, deviceid));
1655                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1656                         break;
1657                 default:
1658                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1659                                  ("Err: Unknown device - "
1660                                   "vid/did=%x/%x\n", venderid, deviceid));
1661                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1662                         break;
1663
1664                 }
1665         } else if (deviceid == RTL_PCI_8192CET_DID ||
1666                    deviceid == RTL_PCI_8192CE_DID ||
1667                    deviceid == RTL_PCI_8191CE_DID ||
1668                    deviceid == RTL_PCI_8188CE_DID) {
1669                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1670                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1671                          ("8192C PCI-E is found - "
1672                           "vid/did=%x/%x\n", venderid, deviceid));
1673         } else if (deviceid == RTL_PCI_8192DE_DID ||
1674                    deviceid == RTL_PCI_8192DE_DID2) {
1675                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1676                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1677                          ("8192D PCI-E is found - "
1678                           "vid/did=%x/%x\n", venderid, deviceid));
1679         } else {
1680                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1681                          ("Err: Unknown device -"
1682                           " vid/did=%x/%x\n", venderid, deviceid));
1683
1684                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1685         }
1686
1687         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1688                 if (revisionid == 0 || revisionid == 1) {
1689                         if (revisionid == 0) {
1690                                 RT_TRACE(rtlpriv, COMP_INIT,
1691                                          DBG_LOUD, ("Find 92DE MAC0.\n"));
1692                                 rtlhal->interfaceindex = 0;
1693                         } else if (revisionid == 1) {
1694                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1695                                         ("Find 92DE MAC1.\n"));
1696                                 rtlhal->interfaceindex = 1;
1697                         }
1698                 } else {
1699                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1700                                 ("Unknown device - "
1701                                 "VendorID/DeviceID=%x/%x, Revision=%x\n",
1702                                 venderid, deviceid, revisionid));
1703                         rtlhal->interfaceindex = 0;
1704                 }
1705         }
1706         /*find bus info */
1707         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
1708         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
1709         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
1710
1711         /*find bridge info */
1712         pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
1713         for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
1714                 if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
1715                         pcipriv->ndis_adapter.pcibridge_vendor = tmp;
1716                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1717                                  ("Pci Bridge Vendor is found index: %d\n",
1718                                   tmp));
1719                         break;
1720                 }
1721         }
1722
1723         if (pcipriv->ndis_adapter.pcibridge_vendor !=
1724                 PCI_BRIDGE_VENDOR_UNKNOWN) {
1725                 pcipriv->ndis_adapter.pcibridge_busnum =
1726                     bridge_pdev->bus->number;
1727                 pcipriv->ndis_adapter.pcibridge_devnum =
1728                     PCI_SLOT(bridge_pdev->devfn);
1729                 pcipriv->ndis_adapter.pcibridge_funcnum =
1730                     PCI_FUNC(bridge_pdev->devfn);
1731                 pcipriv->ndis_adapter.pcicfg_addrport =
1732                     (pcipriv->ndis_adapter.pcibridge_busnum << 16) |
1733                     (pcipriv->ndis_adapter.pcibridge_devnum << 11) |
1734                     (pcipriv->ndis_adapter.pcibridge_funcnum << 8) | (1 << 31);
1735                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
1736                     pci_pcie_cap(bridge_pdev);
1737                 pcipriv->ndis_adapter.num4bytes =
1738                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
1739
1740                 rtl_pci_get_linkcontrol_field(hw);
1741
1742                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
1743                     PCI_BRIDGE_VENDOR_AMD) {
1744                         pcipriv->ndis_adapter.amd_l1_patch =
1745                             rtl_pci_get_amd_l1_patch(hw);
1746                 }
1747         }
1748
1749         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1750                  ("pcidev busnumber:devnumber:funcnumber:"
1751                   "vendor:link_ctl %d:%d:%d:%x:%x\n",
1752                   pcipriv->ndis_adapter.busnumber,
1753                   pcipriv->ndis_adapter.devnumber,
1754                   pcipriv->ndis_adapter.funcnumber,
1755                   pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg));
1756
1757         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1758                  ("pci_bridge busnumber:devnumber:funcnumber:vendor:"
1759                   "pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
1760                   pcipriv->ndis_adapter.pcibridge_busnum,
1761                   pcipriv->ndis_adapter.pcibridge_devnum,
1762                   pcipriv->ndis_adapter.pcibridge_funcnum,
1763                   pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
1764                   pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
1765                   pcipriv->ndis_adapter.pcibridge_linkctrlreg,
1766                   pcipriv->ndis_adapter.amd_l1_patch));
1767
1768         rtl_pci_parse_configuration(pdev, hw);
1769
1770         return true;
1771 }
1772
1773 int __devinit rtl_pci_probe(struct pci_dev *pdev,
1774                             const struct pci_device_id *id)
1775 {
1776         struct ieee80211_hw *hw = NULL;
1777
1778         struct rtl_priv *rtlpriv = NULL;
1779         struct rtl_pci_priv *pcipriv = NULL;
1780         struct rtl_pci *rtlpci;
1781         unsigned long pmem_start, pmem_len, pmem_flags;
1782         int err;
1783
1784         err = pci_enable_device(pdev);
1785         if (err) {
1786                 RT_ASSERT(false,
1787                           ("%s : Cannot enable new PCI device\n",
1788                            pci_name(pdev)));
1789                 return err;
1790         }
1791
1792         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1793                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1794                         RT_ASSERT(false, ("Unable to obtain 32bit DMA "
1795                                           "for consistent allocations\n"));
1796                         pci_disable_device(pdev);
1797                         return -ENOMEM;
1798                 }
1799         }
1800
1801         pci_set_master(pdev);
1802
1803         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
1804                                 sizeof(struct rtl_priv), &rtl_ops);
1805         if (!hw) {
1806                 RT_ASSERT(false,
1807                           ("%s : ieee80211 alloc failed\n", pci_name(pdev)));
1808                 err = -ENOMEM;
1809                 goto fail1;
1810         }
1811
1812         SET_IEEE80211_DEV(hw, &pdev->dev);
1813         pci_set_drvdata(pdev, hw);
1814
1815         rtlpriv = hw->priv;
1816         pcipriv = (void *)rtlpriv->priv;
1817         pcipriv->dev.pdev = pdev;
1818
1819         /* init cfg & intf_ops */
1820         rtlpriv->rtlhal.interface = INTF_PCI;
1821         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
1822         rtlpriv->intf_ops = &rtl_pci_ops;
1823
1824         /*
1825          *init dbgp flags before all
1826          *other functions, because we will
1827          *use it in other funtions like
1828          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
1829          *you can not use these macro
1830          *before this
1831          */
1832         rtl_dbgp_flag_init(hw);
1833
1834         /* MEM map */
1835         err = pci_request_regions(pdev, KBUILD_MODNAME);
1836         if (err) {
1837                 RT_ASSERT(false, ("Can't obtain PCI resources\n"));
1838                 return err;
1839         }
1840
1841         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
1842         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
1843         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
1844
1845         /*shared mem start */
1846         rtlpriv->io.pci_mem_start =
1847                         (unsigned long)pci_iomap(pdev,
1848                         rtlpriv->cfg->bar_id, pmem_len);
1849         if (rtlpriv->io.pci_mem_start == 0) {
1850                 RT_ASSERT(false, ("Can't map PCI mem\n"));
1851                 goto fail2;
1852         }
1853
1854         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1855                  ("mem mapped space: start: 0x%08lx len:%08lx "
1856                   "flags:%08lx, after map:0x%08lx\n",
1857                   pmem_start, pmem_len, pmem_flags,
1858                   rtlpriv->io.pci_mem_start));
1859
1860         /* Disable Clk Request */
1861         pci_write_config_byte(pdev, 0x81, 0);
1862         /* leave D3 mode */
1863         pci_write_config_byte(pdev, 0x44, 0);
1864         pci_write_config_byte(pdev, 0x04, 0x06);
1865         pci_write_config_byte(pdev, 0x04, 0x07);
1866
1867         /* find adapter */
1868         _rtl_pci_find_adapter(pdev, hw);
1869
1870         /* Init IO handler */
1871         _rtl_pci_io_handler_init(&pdev->dev, hw);
1872
1873         /*like read eeprom and so on */
1874         rtlpriv->cfg->ops->read_eeprom_info(hw);
1875
1876         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
1877                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1878                          ("Can't init_sw_vars.\n"));
1879                 goto fail3;
1880         }
1881
1882         rtlpriv->cfg->ops->init_sw_leds(hw);
1883
1884         /*aspm */
1885         rtl_pci_init_aspm(hw);
1886
1887         /* Init mac80211 sw */
1888         err = rtl_init_core(hw);
1889         if (err) {
1890                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1891                          ("Can't allocate sw for mac80211.\n"));
1892                 goto fail3;
1893         }
1894
1895         /* Init PCI sw */
1896         err = !rtl_pci_init(hw, pdev);
1897         if (err) {
1898                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1899                          ("Failed to init PCI.\n"));
1900                 goto fail3;
1901         }
1902
1903         err = ieee80211_register_hw(hw);
1904         if (err) {
1905                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1906                          ("Can't register mac80211 hw.\n"));
1907                 goto fail3;
1908         } else {
1909                 rtlpriv->mac80211.mac80211_registered = 1;
1910         }
1911
1912         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
1913         if (err) {
1914                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1915                          ("failed to create sysfs device attributes\n"));
1916                 goto fail3;
1917         }
1918
1919         /*init rfkill */
1920         rtl_init_rfkill(hw);
1921
1922         rtlpci = rtl_pcidev(pcipriv);
1923         err = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
1924                           IRQF_SHARED, KBUILD_MODNAME, hw);
1925         if (err) {
1926                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1927                          ("%s: failed to register IRQ handler\n",
1928                           wiphy_name(hw->wiphy)));
1929                 goto fail3;
1930         } else {
1931                 rtlpci->irq_alloc = 1;
1932         }
1933
1934         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1935         return 0;
1936
1937 fail3:
1938         pci_set_drvdata(pdev, NULL);
1939         rtl_deinit_core(hw);
1940         _rtl_pci_io_handler_release(hw);
1941         ieee80211_free_hw(hw);
1942
1943         if (rtlpriv->io.pci_mem_start != 0)
1944                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1945
1946 fail2:
1947         pci_release_regions(pdev);
1948
1949 fail1:
1950
1951         pci_disable_device(pdev);
1952
1953         return -ENODEV;
1954
1955 }
1956 EXPORT_SYMBOL(rtl_pci_probe);
1957
1958 void rtl_pci_disconnect(struct pci_dev *pdev)
1959 {
1960         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1961         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1962         struct rtl_priv *rtlpriv = rtl_priv(hw);
1963         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
1964         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
1965
1966         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1967
1968         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
1969
1970         /*ieee80211_unregister_hw will call ops_stop */
1971         if (rtlmac->mac80211_registered == 1) {
1972                 ieee80211_unregister_hw(hw);
1973                 rtlmac->mac80211_registered = 0;
1974         } else {
1975                 rtl_deinit_deferred_work(hw);
1976                 rtlpriv->intf_ops->adapter_stop(hw);
1977         }
1978
1979         /*deinit rfkill */
1980         rtl_deinit_rfkill(hw);
1981
1982         rtl_pci_deinit(hw);
1983         rtl_deinit_core(hw);
1984         _rtl_pci_io_handler_release(hw);
1985         rtlpriv->cfg->ops->deinit_sw_vars(hw);
1986
1987         if (rtlpci->irq_alloc) {
1988                 free_irq(rtlpci->pdev->irq, hw);
1989                 rtlpci->irq_alloc = 0;
1990         }
1991
1992         if (rtlpriv->io.pci_mem_start != 0) {
1993                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1994                 pci_release_regions(pdev);
1995         }
1996
1997         pci_disable_device(pdev);
1998
1999         rtl_pci_disable_aspm(hw);
2000
2001         pci_set_drvdata(pdev, NULL);
2002
2003         ieee80211_free_hw(hw);
2004 }
2005 EXPORT_SYMBOL(rtl_pci_disconnect);
2006
2007 /***************************************
2008 kernel pci power state define:
2009 PCI_D0         ((pci_power_t __force) 0)
2010 PCI_D1         ((pci_power_t __force) 1)
2011 PCI_D2         ((pci_power_t __force) 2)
2012 PCI_D3hot      ((pci_power_t __force) 3)
2013 PCI_D3cold     ((pci_power_t __force) 4)
2014 PCI_UNKNOWN    ((pci_power_t __force) 5)
2015
2016 This function is called when system
2017 goes into suspend state mac80211 will
2018 call rtl_mac_stop() from the mac80211
2019 suspend function first, So there is
2020 no need to call hw_disable here.
2021 ****************************************/
2022 int rtl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2023 {
2024         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2025         struct rtl_priv *rtlpriv = rtl_priv(hw);
2026
2027         rtlpriv->cfg->ops->hw_suspend(hw);
2028         rtl_deinit_rfkill(hw);
2029
2030         pci_save_state(pdev);
2031         pci_disable_device(pdev);
2032         pci_set_power_state(pdev, PCI_D3hot);
2033         return 0;
2034 }
2035 EXPORT_SYMBOL(rtl_pci_suspend);
2036
2037 int rtl_pci_resume(struct pci_dev *pdev)
2038 {
2039         int ret;
2040         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2041         struct rtl_priv *rtlpriv = rtl_priv(hw);
2042
2043         pci_set_power_state(pdev, PCI_D0);
2044         ret = pci_enable_device(pdev);
2045         if (ret) {
2046                 RT_ASSERT(false, ("ERR: <======\n"));
2047                 return ret;
2048         }
2049
2050         pci_restore_state(pdev);
2051
2052         rtlpriv->cfg->ops->hw_resume(hw);
2053         rtl_init_rfkill(hw);
2054         return 0;
2055 }
2056 EXPORT_SYMBOL(rtl_pci_resume);
2057
2058 struct rtl_intf_ops rtl_pci_ops = {
2059         .read_efuse_byte = read_efuse_byte,
2060         .adapter_start = rtl_pci_start,
2061         .adapter_stop = rtl_pci_stop,
2062         .adapter_tx = rtl_pci_tx,
2063         .flush = rtl_pci_flush,
2064         .reset_trx_ring = rtl_pci_reset_trx_ring,
2065         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2066
2067         .disable_aspm = rtl_pci_disable_aspm,
2068         .enable_aspm = rtl_pci_enable_aspm,
2069 };