drivers/net/wireless/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include "wifi.h"
  31 #include "core.h"
  32 #include "pci.h"
  33 #include "base.h"
  34 #include "ps.h"
  35 #include "efuse.h"
  36 #include <linux/interrupt.h>
  37 #include <linux/export.h>
  38 #include <linux/kmemleak.h>
  39 #include <linux/module.h>
  40
  41 MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
  42 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
  43 MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
  44 MODULE_LICENSE("GPL");
  45 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  46
  47 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  48         INTEL_VENDOR_ID,
  49         ATI_VENDOR_ID,
  50         AMD_VENDOR_ID,
  51         SIS_VENDOR_ID
  52 };
  53
  54 static const u8 ac_to_hwq[] = {
  55         VO_QUEUE,
  56         VI_QUEUE,
  57         BE_QUEUE,
  58         BK_QUEUE
  59 };
  60
  61 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  62                        struct sk_buff *skb)
  63 {
  64         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  65         __le16 fc = rtl_get_fc(skb);
  66         u8 queue_index = skb_get_queue_mapping(skb);
  67
  68         if (unlikely(ieee80211_is_beacon(fc)))
  69                 return BEACON_QUEUE;
  70         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  71                 return MGNT_QUEUE;
  72         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  73                 if (ieee80211_is_nullfunc(fc))
  74                         return HIGH_QUEUE;
  75
  76         return ac_to_hwq[queue_index];
  77 }
  78
  79 /* Update PCI dependent default settings*/
  80 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  81 {
  82         struct rtl_priv *rtlpriv = rtl_priv(hw);
  83         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  84         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  85         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  86         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  87         u8 init_aspm;
  88
  89         ppsc->reg_rfps_level = 0;
  90         ppsc->support_aspm = false;
  91
  92         /*Update PCI ASPM setting */
  93         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  94         switch (rtlpci->const_pci_aspm) {
  95         case 0:
  96                 /*No ASPM */
  97                 break;
  98
  99         case 1:
 100                 /*ASPM dynamically enabled/disable. */
 101                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
 102                 break;
 103
 104         case 2:
 105                 /*ASPM with Clock Req dynamically enabled/disable. */
 106                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
 107                                          RT_RF_OFF_LEVL_CLK_REQ);
 108                 break;
 109
 110         case 3:
 111                 /*
 112                  * Always enable ASPM and Clock Req
 113                  * from initialization to halt.
 114                  * */
 115                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 116                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 117                                          RT_RF_OFF_LEVL_CLK_REQ);
 118                 break;
 119
 120         case 4:
 121                 /*
 122                  * Always enable ASPM without Clock Req
 123                  * from initialization to halt.
 124                  * */
 125                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 126                                           RT_RF_OFF_LEVL_CLK_REQ);
 127                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 128                 break;
 129         }
 130
 131         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 132
 133         /*Update Radio OFF setting */
 134         switch (rtlpci->const_hwsw_rfoff_d3) {
 135         case 1:
 136                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 137                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 138                 break;
 139
 140         case 2:
 141                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 142                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 143                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 144                 break;
 145
 146         case 3:
 147                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 148                 break;
 149         }
 150
 151         /*Set HW definition to determine if it supports ASPM. */
 152         switch (rtlpci->const_support_pciaspm) {
 153         case 0:{
 154                         /*Not support ASPM. */
 155                         bool support_aspm = false;
 156                         ppsc->support_aspm = support_aspm;
 157                         break;
 158                 }
 159         case 1:{
 160                         /*Support ASPM. */
 161                         bool support_aspm = true;
 162                         bool support_backdoor = true;
 163                         ppsc->support_aspm = support_aspm;
 164
 165                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 166                            !priv->ndis_adapter.amd_l1_patch)
 167                            support_backdoor = false; */
 168
 169                         ppsc->support_backdoor = support_backdoor;
 170
 171                         break;
 172                 }
 173         case 2:
 174                 /*ASPM value set by chipset. */
 175                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 176                         bool support_aspm = true;
 177                         ppsc->support_aspm = support_aspm;
 178                 }
 179                 break;
 180         default:
 181                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 182                          "switch case not processed\n");
 183                 break;
 184         }
 185
 186         /* toshiba aspm issue, toshiba will set aspm selfly
 187          * so we should not set aspm in driver */
 188         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 189         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 190                 init_aspm == 0x43)
 191                 ppsc->support_aspm = false;
 192 }
 193
 194 static bool _rtl_pci_platform_switch_device_pci_aspm(
 195                         struct ieee80211_hw *hw,
 196                         u8 value)
 197 {
 198         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 199         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 200
 201         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 202                 value |= 0x40;
 203
 204         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 205
 206         return false;
 207 }
 208
 209 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 210 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 211 {
 212         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 213         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 214
 215         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 216
 217         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 218                 udelay(100);
 219 }
 220
 221 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 222 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 223 {
 224         struct rtl_priv *rtlpriv = rtl_priv(hw);
 225         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 226         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 227         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 228         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 229         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 230         /*Retrieve original configuration settings. */
 231         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 232         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 233                                 pcibridge_linkctrlreg;
 234         u16 aspmlevel = 0;
 235         u8 tmp_u1b = 0;
 236
 237         if (!ppsc->support_aspm)
 238                 return;
 239
 240         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 241                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 242                          "PCI(Bridge) UNKNOWN\n");
 243
 244                 return;
 245         }
 246
 247         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 248                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 249                 _rtl_pci_switch_clk_req(hw, 0x0);
 250         }
 251
 252         /*for promising device will in L0 state after an I/O. */
 253         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 254
 255         /*Set corresponding value. */
 256         aspmlevel |= BIT(0) | BIT(1);
 257         linkctrl_reg &= ~aspmlevel;
 258         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 259
 260         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 261         udelay(50);
 262
 263         /*4 Disable Pci Bridge ASPM */
 264         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 265                               pcibridge_linkctrlreg);
 266
 267         udelay(50);
 268 }
 269
 270 /*
 271  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 272  *power saving We should follow the sequence to enable
 273  *RTL8192SE first then enable Pci Bridge ASPM
 274  *or the system will show bluescreen.
 275  */
 276 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 277 {
 278         struct rtl_priv *rtlpriv = rtl_priv(hw);
 279         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 280         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 281         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 282         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 283         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 284         u16 aspmlevel;
 285         u8 u_pcibridge_aspmsetting;
 286         u8 u_device_aspmsetting;
 287
 288         if (!ppsc->support_aspm)
 289                 return;
 290
 291         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 292                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 293                          "PCI(Bridge) UNKNOWN\n");
 294                 return;
 295         }
 296
 297         /*4 Enable Pci Bridge ASPM */
 298
 299         u_pcibridge_aspmsetting =
 300             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 301             rtlpci->const_hostpci_aspm_setting;
 302
 303         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 304                 u_pcibridge_aspmsetting &= ~BIT(0);
 305
 306         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 307                               u_pcibridge_aspmsetting);
 308
 309         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 310                  "PlatformEnableASPM(): Write reg[%x] = %x\n",
 311                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 312                  u_pcibridge_aspmsetting);
 313
 314         udelay(50);
 315
 316         /*Get ASPM level (with/without Clock Req) */
 317         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 318         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 319
 320         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 321         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 322
 323         u_device_aspmsetting |= aspmlevel;
 324
 325         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 326
 327         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 328                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 329                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 330                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 331         }
 332         udelay(100);
 333 }
 334
 335 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 336 {
 337         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 338
 339         bool status = false;
 340         u8 offset_e0;
 341         unsigned offset_e4;
 342
 343         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 344
 345         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 346
 347         if (offset_e0 == 0xA0) {
 348                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 349                 if (offset_e4 & BIT(23))
 350                         status = true;
 351         }
 352
 353         return status;
 354 }
 355
 356 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 357                                      struct rtl_priv **buddy_priv)
 358 {
 359         struct rtl_priv *rtlpriv = rtl_priv(hw);
 360         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 361         bool find_buddy_priv = false;
 362         struct rtl_priv *tpriv = NULL;
 363         struct rtl_pci_priv *tpcipriv = NULL;
 364
 365         if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 366                 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
 367                                     list) {
 368                         if (tpriv) {
 369                                 tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
 370                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 371                                          "pcipriv->ndis_adapter.funcnumber %x\n",
 372                                         pcipriv->ndis_adapter.funcnumber);
 373                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 374                                          "tpcipriv->ndis_adapter.funcnumber %x\n",
 375                                         tpcipriv->ndis_adapter.funcnumber);
 376
 377                                 if ((pcipriv->ndis_adapter.busnumber ==
 378                                      tpcipriv->ndis_adapter.busnumber) &&
 379                                     (pcipriv->ndis_adapter.devnumber ==
 380                                     tpcipriv->ndis_adapter.devnumber) &&
 381                                     (pcipriv->ndis_adapter.funcnumber !=
 382                                     tpcipriv->ndis_adapter.funcnumber)) {
 383                                         find_buddy_priv = true;
 384                                         break;
 385                                 }
 386                         }
 387                 }
 388         }
 389
 390         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 391                  "find_buddy_priv %d\n", find_buddy_priv);
 392
 393         if (find_buddy_priv)
 394                 *buddy_priv = tpriv;
 395
 396         return find_buddy_priv;
 397 }
 398
 399 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 400 {
 401         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 402         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 403         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 404         u8 linkctrl_reg;
 405         u8 num4bbytes;
 406
 407         num4bbytes = (capabilityoffset + 0x10) / 4;
 408
 409         /*Read  Link Control Register */
 410         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 411
 412         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 413 }
 414
 415 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 416                 struct ieee80211_hw *hw)
 417 {
 418         struct rtl_priv *rtlpriv = rtl_priv(hw);
 419         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 420
 421         u8 tmp;
 422         u16 linkctrl_reg;
 423
 424         /*Link Control Register */
 425         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 426         pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 427
 428         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 429                  pcipriv->ndis_adapter.linkctrl_reg);
 430
 431         pci_read_config_byte(pdev, 0x98, &tmp);
 432         tmp |= BIT(4);
 433         pci_write_config_byte(pdev, 0x98, tmp);
 434
 435         tmp = 0x17;
 436         pci_write_config_byte(pdev, 0x70f, tmp);
 437 }
 438
 439 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 440 {
 441         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 442
 443         _rtl_pci_update_default_setting(hw);
 444
 445         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 446                 /*Always enable ASPM & Clock Req. */
 447                 rtl_pci_enable_aspm(hw);
 448                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 449         }
 450
 451 }
 452
 453 static void _rtl_pci_io_handler_init(struct device *dev,
 454                                      struct ieee80211_hw *hw)
 455 {
 456         struct rtl_priv *rtlpriv = rtl_priv(hw);
 457
 458         rtlpriv->io.dev = dev;
 459
 460         rtlpriv->io.write8_async = pci_write8_async;
 461         rtlpriv->io.write16_async = pci_write16_async;
 462         rtlpriv->io.write32_async = pci_write32_async;
 463
 464         rtlpriv->io.read8_sync = pci_read8_sync;
 465         rtlpriv->io.read16_sync = pci_read16_sync;
 466         rtlpriv->io.read32_sync = pci_read32_sync;
 467
 468 }
 469
 470 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 471                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 472 {
 473         struct rtl_priv *rtlpriv = rtl_priv(hw);
 474         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 475         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 476         struct sk_buff *next_skb;
 477         u8 additionlen = FCS_LEN;
 478
 479         /* here open is 4, wep/tkip is 8, aes is 12*/
 480         if (info->control.hw_key)
 481                 additionlen += info->control.hw_key->icv_len;
 482
 483         /* The most skb num is 6 */
 484         tcb_desc->empkt_num = 0;
 485         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 486         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 487                 struct ieee80211_tx_info *next_info;
 488
 489                 next_info = IEEE80211_SKB_CB(next_skb);
 490                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 491                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 492                                 next_skb->len + additionlen;
 493                         tcb_desc->empkt_num++;
 494                 } else {
 495                         break;
 496                 }
 497
 498                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 499                                       next_skb))
 500                         break;
 501
 502                 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 503                         break;
 504         }
 505         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 506
 507         return true;
 508 }
 509
 510 /* just for early mode now */
 511 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 512 {
 513         struct rtl_priv *rtlpriv = rtl_priv(hw);
 514         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 515         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 516         struct sk_buff *skb = NULL;
 517         struct ieee80211_tx_info *info = NULL;
 518         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 519         int tid;
 520
 521         if (!rtlpriv->rtlhal.earlymode_enable)
 522                 return;
 523
 524         if (rtlpriv->dm.supp_phymode_switch &&
 525             (rtlpriv->easy_concurrent_ctl.switch_in_process ||
 526             (rtlpriv->buddy_priv &&
 527             rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
 528                 return;
 529         /* we juse use em for BE/BK/VI/VO */
 530         for (tid = 7; tid >= 0; tid--) {
 531                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 532                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 533                 while (!mac->act_scanning &&
 534                        rtlpriv->psc.rfpwr_state == ERFON) {
 535                         struct rtl_tcb_desc tcb_desc;
 536                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 537
 538                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 539                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 540                             (ring->entries - skb_queue_len(&ring->queue) >
 541                              rtlhal->max_earlymode_num)) {
 542                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 543                         } else {
 544                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 545                                 break;
 546                         }
 547                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 548
 549                         /* Some macaddr can't do early mode. like
 550                          * multicast/broadcast/no_qos data */
 551                         info = IEEE80211_SKB_CB(skb);
 552                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 553                                 _rtl_update_earlymode_info(hw, skb,
 554                                                            &tcb_desc, tid);
 555
 556                         rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 557                 }
 558         }
 559 }
 560
 561
 562 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 563 {
 564         struct rtl_priv *rtlpriv = rtl_priv(hw);
 565         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 566
 567         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 568
 569         while (skb_queue_len(&ring->queue)) {
 570                 struct sk_buff *skb;
 571                 struct ieee80211_tx_info *info;
 572                 __le16 fc;
 573                 u8 tid;
 574                 u8 *entry;
 575
 576                 if (rtlpriv->use_new_trx_flow)
 577                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 578                 else
 579                         entry = (u8 *)(&ring->desc[ring->idx]);
 580
 581                 if (rtlpriv->cfg->ops->get_available_desc &&
 582                     rtlpriv->cfg->ops->get_available_desc(hw, prio) <= 1) {
 583                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_DMESG,
 584                                  "no available desc!\n");
 585                         return;
 586                 }
 587
 588                 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 589                         return;
 590                 ring->idx = (ring->idx + 1) % ring->entries;
 591
 592                 skb = __skb_dequeue(&ring->queue);
 593                 pci_unmap_single(rtlpci->pdev,
 594                                  rtlpriv->cfg->ops->
 595                                              get_desc((u8 *)entry, true,
 596                                                       HW_DESC_TXBUFF_ADDR),
 597                                  skb->len, PCI_DMA_TODEVICE);
 598
 599                 /* remove early mode header */
 600                 if (rtlpriv->rtlhal.earlymode_enable)
 601                         skb_pull(skb, EM_HDR_LEN);
 602
 603                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 604                          "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 605                          ring->idx,
 606                          skb_queue_len(&ring->queue),
 607                          *(u16 *)(skb->data + 22));
 608
 609                 if (prio == TXCMD_QUEUE) {
 610                         dev_kfree_skb(skb);
 611                         goto tx_status_ok;
 612
 613                 }
 614
 615                 /* for sw LPS, just after NULL skb send out, we can
 616                  * sure AP knows we are sleeping, we should not let
 617                  * rf sleep
 618                  */
 619                 fc = rtl_get_fc(skb);
 620                 if (ieee80211_is_nullfunc(fc)) {
 621                         if (ieee80211_has_pm(fc)) {
 622                                 rtlpriv->mac80211.offchan_delay = true;
 623                                 rtlpriv->psc.state_inap = true;
 624                         } else {
 625                                 rtlpriv->psc.state_inap = false;
 626                         }
 627                 }
 628                 if (ieee80211_is_action(fc)) {
 629                         struct ieee80211_mgmt *action_frame =
 630                                 (struct ieee80211_mgmt *)skb->data;
 631                         if (action_frame->u.action.u.ht_smps.action ==
 632                             WLAN_HT_ACTION_SMPS) {
 633                                 dev_kfree_skb(skb);
 634                                 goto tx_status_ok;
 635                         }
 636                 }
 637
 638                 /* update tid tx pkt num */
 639                 tid = rtl_get_tid(skb);
 640                 if (tid <= 7)
 641                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 642
 643                 info = IEEE80211_SKB_CB(skb);
 644                 ieee80211_tx_info_clear_status(info);
 645
 646                 info->flags |= IEEE80211_TX_STAT_ACK;
 647                 /*info->status.rates[0].count = 1; */
 648
 649                 ieee80211_tx_status_irqsafe(hw, skb);
 650
 651                 if ((ring->entries - skb_queue_len(&ring->queue)) <= 4) {
 652
 653                         RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG,
 654                                  "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 655                                  prio, ring->idx,
 656                                  skb_queue_len(&ring->queue));
 657
 658                         ieee80211_wake_queue(hw,
 659                                         skb_get_queue_mapping
 660                                         (skb));
 661                 }
 662 tx_status_ok:
 663                 skb = NULL;
 664         }
 665
 666         if (((rtlpriv->link_info.num_rx_inperiod +
 667                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 668                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 669                 rtlpriv->enter_ps = false;
 670                 schedule_work(&rtlpriv->works.lps_change_work);
 671         }
 672 }
 673
 674 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 675                                     struct sk_buff *new_skb, u8 *entry,
 676                                     int rxring_idx, int desc_idx)
 677 {
 678         struct rtl_priv *rtlpriv = rtl_priv(hw);
 679         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 680         u32 bufferaddress;
 681         u8 tmp_one = 1;
 682         struct sk_buff *skb;
 683
 684         if (likely(new_skb)) {
 685                 skb = new_skb;
 686                 goto remap;
 687         }
 688         skb = dev_alloc_skb(rtlpci->rxbuffersize);
 689         if (!skb)
 690                 return 0;
 691
 692 remap:
 693         /* just set skb->cb to mapping addr for pci_unmap_single use */
 694         *((dma_addr_t *)skb->cb) =
 695                 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 696                                rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 697         bufferaddress = *((dma_addr_t *)skb->cb);
 698         if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
 699                 return 0;
 700         rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 701         if (rtlpriv->use_new_trx_flow) {
 702                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 703                                             HW_DESC_RX_PREPARE,
 704                                             (u8 *)&bufferaddress);
 705         } else {
 706                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 707                                             HW_DESC_RXBUFF_ADDR,
 708                                             (u8 *)&bufferaddress);
 709                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 710                                             HW_DESC_RXPKT_LEN,
 711                                             (u8 *)&rtlpci->rxbuffersize);
 712                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 713                                             HW_DESC_RXOWN,
 714                                             (u8 *)&tmp_one);
 715         }
 716         return 1;
 717 }
 718
 719 /* inorder to receive 8K AMSDU we have set skb to
 720  * 9100bytes in init rx ring, but if this packet is
 721  * not a AMSDU, this large packet will be sent to
 722  * TCP/IP directly, this cause big packet ping fail
 723  * like: "ping -s 65507", so here we will realloc skb
 724  * based on the true size of packet, Mac80211
 725  * Probably will do it better, but does not yet.
 726  *
 727  * Some platform will fail when alloc skb sometimes.
 728  * in this condition, we will send the old skb to
 729  * mac80211 directly, this will not cause any other
 730  * issues, but only this packet will be lost by TCP/IP
 731  */
 732 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 733                                     struct sk_buff *skb,
 734                                     struct ieee80211_rx_status rx_status)
 735 {
 736         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 737                 dev_kfree_skb_any(skb);
 738         } else {
 739                 struct sk_buff *uskb = NULL;
 740                 u8 *pdata;
 741
 742                 uskb = dev_alloc_skb(skb->len + 128);
 743                 if (likely(uskb)) {
 744                         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 745                                sizeof(rx_status));
 746                         pdata = (u8 *)skb_put(uskb, skb->len);
 747                         memcpy(pdata, skb->data, skb->len);
 748                         dev_kfree_skb_any(skb);
 749                         ieee80211_rx_irqsafe(hw, uskb);
 750                 } else {
 751                         ieee80211_rx_irqsafe(hw, skb);
 752                 }
 753         }
 754 }
 755
 756 /*hsisr interrupt handler*/
 757 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 758 {
 759         struct rtl_priv *rtlpriv = rtl_priv(hw);
 760         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 761
 762         rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 763                        rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 764                        rtlpci->sys_irq_mask);
 765 }
 766
 767 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 768 {
 769         struct rtl_priv *rtlpriv = rtl_priv(hw);
 770         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 771         int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 772         struct ieee80211_rx_status rx_status = { 0 };
 773         unsigned int count = rtlpci->rxringcount;
 774         u8 own;
 775         u8 tmp_one;
 776         bool unicast = false;
 777         u8 hw_queue = 0;
 778         unsigned int rx_remained_cnt;
 779         struct rtl_stats stats = {
 780                 .signal = 0,
 781                 .rate = 0,
 782         };
 783
 784         /*RX NORMAL PKT */
 785         while (count--) {
 786                 struct ieee80211_hdr *hdr;
 787                 __le16 fc;
 788                 u16 len;
 789                 /*rx buffer descriptor */
 790                 struct rtl_rx_buffer_desc *buffer_desc = NULL;
 791                 /*if use new trx flow, it means wifi info */
 792                 struct rtl_rx_desc *pdesc = NULL;
 793                 /*rx pkt */
 794                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 795                                       rtlpci->rx_ring[rxring_idx].idx];
 796                 struct sk_buff *new_skb;
 797
 798                 if (rtlpriv->use_new_trx_flow) {
 799                         rx_remained_cnt =
 800                                 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 801                                                                       hw_queue);
 802                         if (rx_remained_cnt == 0)
 803                                 return;
 804
 805                 } else {        /* rx descriptor */
 806                         pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 807                                 rtlpci->rx_ring[rxring_idx].idx];
 808
 809                         own = (u8)rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
 810                                                               false,
 811                                                               HW_DESC_OWN);
 812                         if (own) /* wait data to be filled by hardware */
 813                                 return;
 814                 }
 815
 816                 /* Reaching this point means: data is filled already
 817                  * AAAAAAttention !!!
 818                  * We can NOT access 'skb' before 'pci_unmap_single'
 819                  */
 820                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
 821                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 822
 823                 /* get a new skb - if fail, old one will be reused */
 824                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 825                 if (unlikely(!new_skb)) {
 826                         pr_err("Allocation of new skb failed in %s\n",
 827                                __func__);
 828                         goto no_new;
 829                 }
 830                 if (rtlpriv->use_new_trx_flow) {
 831                         buffer_desc =
 832                           &rtlpci->rx_ring[rxring_idx].buffer_desc
 833                                 [rtlpci->rx_ring[rxring_idx].idx];
 834                         /*means rx wifi info*/
 835                         pdesc = (struct rtl_rx_desc *)skb->data;
 836                 }
 837                 memset(&rx_status , 0 , sizeof(rx_status));
 838                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 839                                                  &rx_status, (u8 *)pdesc, skb);
 840
 841                 if (rtlpriv->use_new_trx_flow)
 842                         rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 843                                                            (u8 *)buffer_desc,
 844                                                            hw_queue);
 845
 846                 len = rtlpriv->cfg->ops->get_desc((u8 *)pdesc, false,
 847                                                   HW_DESC_RXPKT_LEN);
 848
 849                 if (skb->end - skb->tail > len) {
 850                         skb_put(skb, len);
 851                         if (rtlpriv->use_new_trx_flow)
 852                                 skb_reserve(skb, stats.rx_drvinfo_size +
 853                                             stats.rx_bufshift + 24);
 854                         else
 855                                 skb_reserve(skb, stats.rx_drvinfo_size +
 856                                             stats.rx_bufshift);
 857                 } else {
 858                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 859                                  "skb->end - skb->tail = %d, len is %d\n",
 860                                  skb->end - skb->tail, len);
 861                         dev_kfree_skb_any(skb);
 862                         goto new_trx_end;
 863                 }
 864                 /* handle command packet here */
 865                 if (rtlpriv->cfg->ops->rx_command_packet &&
 866                     rtlpriv->cfg->ops->rx_command_packet(hw, stats, skb)) {
 867                                 dev_kfree_skb_any(skb);
 868                                 goto new_trx_end;
 869                 }
 870
 871                 /*
 872                  * NOTICE This can not be use for mac80211,
 873                  * this is done in mac80211 code,
 874                  * if done here sec DHCP will fail
 875                  * skb_trim(skb, skb->len - 4);
 876                  */
 877
 878                 hdr = rtl_get_hdr(skb);
 879                 fc = rtl_get_fc(skb);
 880
 881                 if (!stats.crc && !stats.hwerror) {
 882                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 883                                sizeof(rx_status));
 884
 885                         if (is_broadcast_ether_addr(hdr->addr1)) {
 886                                 ;/*TODO*/
 887                         } else if (is_multicast_ether_addr(hdr->addr1)) {
 888                                 ;/*TODO*/
 889                         } else {
 890                                 unicast = true;
 891                                 rtlpriv->stats.rxbytesunicast += skb->len;
 892                         }
 893                         rtl_is_special_data(hw, skb, false);
 894
 895                         if (ieee80211_is_data(fc)) {
 896                                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 897                                 if (unicast)
 898                                         rtlpriv->link_info.num_rx_inperiod++;
 899                         }
 900                         /* static bcn for roaming */
 901                         rtl_beacon_statistic(hw, skb);
 902                         rtl_p2p_info(hw, (void *)skb->data, skb->len);
 903                         /* for sw lps */
 904                         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 905                         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 906                         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 907                             (rtlpriv->rtlhal.current_bandtype ==
 908                              BAND_ON_2_4G) &&
 909                             (ieee80211_is_beacon(fc) ||
 910                              ieee80211_is_probe_resp(fc))) {
 911                                 dev_kfree_skb_any(skb);
 912                         } else {
 913                                 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 914                         }
 915                 } else {
 916                         dev_kfree_skb_any(skb);
 917                 }
 918 new_trx_end:
 919                 if (rtlpriv->use_new_trx_flow) {
 920                         rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 921                         rtlpci->rx_ring[hw_queue].next_rx_rp %=
 922                                         RTL_PCI_MAX_RX_COUNT;
 923
 924                         rx_remained_cnt--;
 925                         rtl_write_word(rtlpriv, 0x3B4,
 926                                        rtlpci->rx_ring[hw_queue].next_rx_rp);
 927                 }
 928                 if (((rtlpriv->link_info.num_rx_inperiod +
 929                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
 930                       (rtlpriv->link_info.num_rx_inperiod > 2)) {
 931                         rtlpriv->enter_ps = false;
 932                         schedule_work(&rtlpriv->works.lps_change_work);
 933                 }
 934                 skb = new_skb;
 935 no_new:
 936                 if (rtlpriv->use_new_trx_flow) {
 937                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 938                                                  rxring_idx,
 939                                                  rtlpci->rx_ring[rxring_idx].idx);
 940                 } else {
 941                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 942                                                  rxring_idx,
 943                                                  rtlpci->rx_ring[rxring_idx].idx);
 944                         if (rtlpci->rx_ring[rxring_idx].idx ==
 945                             rtlpci->rxringcount - 1)
 946                                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 947                                                             false,
 948                                                             HW_DESC_RXERO,
 949                                                             (u8 *)&tmp_one);
 950                 }
 951                 rtlpci->rx_ring[rxring_idx].idx =
 952                                 (rtlpci->rx_ring[rxring_idx].idx + 1) %
 953                                 rtlpci->rxringcount;
 954         }
 955 }
 956
 957 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 958 {
 959         struct ieee80211_hw *hw = dev_id;
 960         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 961         struct rtl_priv *rtlpriv = rtl_priv(hw);
 962         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 963         unsigned long flags;
 964         u32 inta = 0;
 965         u32 intb = 0;
 966         irqreturn_t ret = IRQ_HANDLED;
 967
 968         if (rtlpci->irq_enabled == 0)
 969                 return ret;
 970
 971         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock , flags);
 972         rtlpriv->cfg->ops->disable_interrupt(hw);
 973
 974         /*read ISR: 4/8bytes */
 975         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 976
 977         /*Shared IRQ or HW disappared */
 978         if (!inta || inta == 0xffff)
 979                 goto done;
 980
 981         /*<1> beacon related */
 982         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 983                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 984                          "beacon ok interrupt!\n");
 985         }
 986
 987         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 988                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 989                          "beacon err interrupt!\n");
 990         }
 991
 992         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 993                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 994         }
 995
 996         if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 997                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 998                          "prepare beacon for interrupt!\n");
 999                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
1000         }
1001
1002         /*<2> Tx related */
1003         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
1004                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
1005
1006         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
1007                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1008                          "Manage ok interrupt!\n");
1009                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
1010         }
1011
1012         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
1013                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1014                          "HIGH_QUEUE ok interrupt!\n");
1015                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
1016         }
1017
1018         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
1019                 rtlpriv->link_info.num_tx_inperiod++;
1020
1021                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1022                          "BK Tx OK interrupt!\n");
1023                 _rtl_pci_tx_isr(hw, BK_QUEUE);
1024         }
1025
1026         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
1027                 rtlpriv->link_info.num_tx_inperiod++;
1028
1029                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1030                          "BE TX OK interrupt!\n");
1031                 _rtl_pci_tx_isr(hw, BE_QUEUE);
1032         }
1033
1034         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
1035                 rtlpriv->link_info.num_tx_inperiod++;
1036
1037                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1038                          "VI TX OK interrupt!\n");
1039                 _rtl_pci_tx_isr(hw, VI_QUEUE);
1040         }
1041
1042         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
1043                 rtlpriv->link_info.num_tx_inperiod++;
1044
1045                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1046                          "Vo TX OK interrupt!\n");
1047                 _rtl_pci_tx_isr(hw, VO_QUEUE);
1048         }
1049
1050         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1051                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1052                         rtlpriv->link_info.num_tx_inperiod++;
1053
1054                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1055                                  "CMD TX OK interrupt!\n");
1056                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1057                 }
1058         }
1059
1060         /*<3> Rx related */
1061         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1062                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1063                 _rtl_pci_rx_interrupt(hw);
1064         }
1065
1066         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1067                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1068                          "rx descriptor unavailable!\n");
1069                 _rtl_pci_rx_interrupt(hw);
1070         }
1071
1072         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1073                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1074                 _rtl_pci_rx_interrupt(hw);
1075         }
1076
1077         /*<4> fw related*/
1078         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1079                 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1080                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1081                                  "firmware interrupt!\n");
1082                         queue_delayed_work(rtlpriv->works.rtl_wq,
1083                                            &rtlpriv->works.fwevt_wq, 0);
1084                 }
1085         }
1086
1087         /*<5> hsisr related*/
1088         /* Only 8188EE & 8723BE Supported.
1089          * If Other ICs Come in, System will corrupt,
1090          * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1091          * are not initialized
1092          */
1093         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1094             rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1095                 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1096                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1097                                  "hsisr interrupt!\n");
1098                         _rtl_pci_hs_interrupt(hw);
1099                 }
1100         }
1101
1102         if (rtlpriv->rtlhal.earlymode_enable)
1103                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1104
1105 done:
1106         rtlpriv->cfg->ops->enable_interrupt(hw);
1107         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1108         return ret;
1109 }
1110
1111 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
1112 {
1113         _rtl_pci_tx_chk_waitq(hw);
1114 }
1115
1116 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
1117 {
1118         struct rtl_priv *rtlpriv = rtl_priv(hw);
1119         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1120         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1121         struct rtl8192_tx_ring *ring = NULL;
1122         struct ieee80211_hdr *hdr = NULL;
1123         struct ieee80211_tx_info *info = NULL;
1124         struct sk_buff *pskb = NULL;
1125         struct rtl_tx_desc *pdesc = NULL;
1126         struct rtl_tcb_desc tcb_desc;
1127         /*This is for new trx flow*/
1128         struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1129         u8 temp_one = 1;
1130
1131         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1132         ring = &rtlpci->tx_ring[BEACON_QUEUE];
1133         pskb = __skb_dequeue(&ring->queue);
1134         if (pskb)
1135                 kfree_skb(pskb);
1136
1137         /*NB: the beacon data buffer must be 32-bit aligned. */
1138         pskb = ieee80211_beacon_get(hw, mac->vif);
1139         if (pskb == NULL)
1140                 return;
1141         hdr = rtl_get_hdr(pskb);
1142         info = IEEE80211_SKB_CB(pskb);
1143         pdesc = &ring->desc[0];
1144         if (rtlpriv->use_new_trx_flow)
1145                 pbuffer_desc = &ring->buffer_desc[0];
1146
1147         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1148                                         (u8 *)pbuffer_desc, info, NULL, pskb,
1149                                         BEACON_QUEUE, &tcb_desc);
1150
1151         __skb_queue_tail(&ring->queue, pskb);
1152
1153         if (rtlpriv->use_new_trx_flow) {
1154                 temp_one = 4;
1155                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1156                                             HW_DESC_OWN, (u8 *)&temp_one);
1157         } else {
1158                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1159                                             &temp_one);
1160         }
1161         return;
1162 }
1163
1164 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1165 {
1166         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1167         struct rtl_priv *rtlpriv = rtl_priv(hw);
1168         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1169         u8 i;
1170         u16 desc_num;
1171
1172         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1173                 desc_num = TX_DESC_NUM_92E;
1174         else
1175                 desc_num = RT_TXDESC_NUM;
1176
1177         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1178                 rtlpci->txringcount[i] = desc_num;
1179
1180         /*
1181          *we just alloc 2 desc for beacon queue,
1182          *because we just need first desc in hw beacon.
1183          */
1184         rtlpci->txringcount[BEACON_QUEUE] = 2;
1185
1186         /*BE queue need more descriptor for performance
1187          *consideration or, No more tx desc will happen,
1188          *and may cause mac80211 mem leakage.
1189          */
1190         if (!rtl_priv(hw)->use_new_trx_flow)
1191                 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1192
1193         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1194         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1195 }
1196
1197 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1198                 struct pci_dev *pdev)
1199 {
1200         struct rtl_priv *rtlpriv = rtl_priv(hw);
1201         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1202         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1203         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1204
1205         rtlpci->up_first_time = true;
1206         rtlpci->being_init_adapter = false;
1207
1208         rtlhal->hw = hw;
1209         rtlpci->pdev = pdev;
1210
1211         /*Tx/Rx related var */
1212         _rtl_pci_init_trx_var(hw);
1213
1214         /*IBSS*/ mac->beacon_interval = 100;
1215
1216         /*AMPDU*/
1217         mac->min_space_cfg = 0;
1218         mac->max_mss_density = 0;
1219         /*set sane AMPDU defaults */
1220         mac->current_ampdu_density = 7;
1221         mac->current_ampdu_factor = 3;
1222
1223         /*QOS*/
1224         rtlpci->acm_method = EACMWAY2_SW;
1225
1226         /*task */
1227         tasklet_init(&rtlpriv->works.irq_tasklet,
1228                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1229                      (unsigned long)hw);
1230         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1231                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1232                      (unsigned long)hw);
1233         INIT_WORK(&rtlpriv->works.lps_change_work,
1234                   rtl_lps_change_work_callback);
1235 }
1236
1237 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1238                                  unsigned int prio, unsigned int entries)
1239 {
1240         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1241         struct rtl_priv *rtlpriv = rtl_priv(hw);
1242         struct rtl_tx_buffer_desc *buffer_desc;
1243         struct rtl_tx_desc *desc;
1244         dma_addr_t buffer_desc_dma, desc_dma;
1245         u32 nextdescaddress;
1246         int i;
1247
1248         /* alloc tx buffer desc for new trx flow*/
1249         if (rtlpriv->use_new_trx_flow) {
1250                 buffer_desc =
1251                    pci_zalloc_consistent(rtlpci->pdev,
1252                                          sizeof(*buffer_desc) * entries,
1253                                          &buffer_desc_dma);
1254
1255                 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1256                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1257                                  "Cannot allocate TX ring (prio = %d)\n",
1258                                  prio);
1259                         return -ENOMEM;
1260                 }
1261
1262                 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1263                 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1264
1265                 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1266                 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1267                 rtlpci->tx_ring[prio].avl_desc = entries;
1268         }
1269
1270         /* alloc dma for this ring */
1271         desc = pci_zalloc_consistent(rtlpci->pdev,
1272                                      sizeof(*desc) * entries, &desc_dma);
1273
1274         if (!desc || (unsigned long)desc & 0xFF) {
1275                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1276                          "Cannot allocate TX ring (prio = %d)\n", prio);
1277                 return -ENOMEM;
1278         }
1279
1280         rtlpci->tx_ring[prio].desc = desc;
1281         rtlpci->tx_ring[prio].dma = desc_dma;
1282
1283         rtlpci->tx_ring[prio].idx = 0;
1284         rtlpci->tx_ring[prio].entries = entries;
1285         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1286
1287         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1288                  prio, desc);
1289
1290         /* init every desc in this ring */
1291         if (!rtlpriv->use_new_trx_flow) {
1292                 for (i = 0; i < entries; i++) {
1293                         nextdescaddress = (u32)desc_dma +
1294                                           ((i + 1) % entries) *
1295                                           sizeof(*desc);
1296
1297                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1298                                                     true,
1299                                                     HW_DESC_TX_NEXTDESC_ADDR,
1300                                                     (u8 *)&nextdescaddress);
1301                 }
1302         }
1303         return 0;
1304 }
1305
1306 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1307 {
1308         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1309         struct rtl_priv *rtlpriv = rtl_priv(hw);
1310         int i;
1311
1312         if (rtlpriv->use_new_trx_flow) {
1313                 struct rtl_rx_buffer_desc *entry = NULL;
1314                 /* alloc dma for this ring */
1315                 rtlpci->rx_ring[rxring_idx].buffer_desc =
1316                     pci_zalloc_consistent(rtlpci->pdev,
1317                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1318                                                  buffer_desc) *
1319                                                  rtlpci->rxringcount,
1320                                           &rtlpci->rx_ring[rxring_idx].dma);
1321                 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1322                     (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1323                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1324                                  "Cannot allocate RX ring\n");
1325                         return -ENOMEM;
1326                 }
1327
1328                 /* init every desc in this ring */
1329                 rtlpci->rx_ring[rxring_idx].idx = 0;
1330                 for (i = 0; i < rtlpci->rxringcount; i++) {
1331                         entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1332                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1333                                                       rxring_idx, i))
1334                                 return -ENOMEM;
1335                 }
1336         } else {
1337                 struct rtl_rx_desc *entry = NULL;
1338                 u8 tmp_one = 1;
1339                 /* alloc dma for this ring */
1340                 rtlpci->rx_ring[rxring_idx].desc =
1341                     pci_zalloc_consistent(rtlpci->pdev,
1342                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1343                                           desc) * rtlpci->rxringcount,
1344                                           &rtlpci->rx_ring[rxring_idx].dma);
1345                 if (!rtlpci->rx_ring[rxring_idx].desc ||
1346                     (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1347                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1348                                  "Cannot allocate RX ring\n");
1349                         return -ENOMEM;
1350                 }
1351
1352                 /* init every desc in this ring */
1353                 rtlpci->rx_ring[rxring_idx].idx = 0;
1354
1355                 for (i = 0; i < rtlpci->rxringcount; i++) {
1356                         entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1357                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1358                                                       rxring_idx, i))
1359                                 return -ENOMEM;
1360                 }
1361
1362                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1363                                             HW_DESC_RXERO, &tmp_one);
1364         }
1365         return 0;
1366 }
1367
1368 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1369                 unsigned int prio)
1370 {
1371         struct rtl_priv *rtlpriv = rtl_priv(hw);
1372         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1373         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1374
1375         /* free every desc in this ring */
1376         while (skb_queue_len(&ring->queue)) {
1377                 u8 *entry;
1378                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1379
1380                 if (rtlpriv->use_new_trx_flow)
1381                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1382                 else
1383                         entry = (u8 *)(&ring->desc[ring->idx]);
1384
1385                 pci_unmap_single(rtlpci->pdev,
1386                                  rtlpriv->cfg->
1387                                              ops->get_desc((u8 *)entry, true,
1388                                                    HW_DESC_TXBUFF_ADDR),
1389                                  skb->len, PCI_DMA_TODEVICE);
1390                 kfree_skb(skb);
1391                 ring->idx = (ring->idx + 1) % ring->entries;
1392         }
1393
1394         /* free dma of this ring */
1395         pci_free_consistent(rtlpci->pdev,
1396                             sizeof(*ring->desc) * ring->entries,
1397                             ring->desc, ring->dma);
1398         ring->desc = NULL;
1399         if (rtlpriv->use_new_trx_flow) {
1400                 pci_free_consistent(rtlpci->pdev,
1401                                     sizeof(*ring->buffer_desc) * ring->entries,
1402                                     ring->buffer_desc, ring->buffer_desc_dma);
1403                 ring->buffer_desc = NULL;
1404         }
1405 }
1406
1407 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1408 {
1409         struct rtl_priv *rtlpriv = rtl_priv(hw);
1410         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1411         int i;
1412
1413         /* free every desc in this ring */
1414         for (i = 0; i < rtlpci->rxringcount; i++) {
1415                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1416
1417                 if (!skb)
1418                         continue;
1419                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1420                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1421                 kfree_skb(skb);
1422         }
1423
1424         /* free dma of this ring */
1425         if (rtlpriv->use_new_trx_flow) {
1426                 pci_free_consistent(rtlpci->pdev,
1427                                     sizeof(*rtlpci->rx_ring[rxring_idx].
1428                                     buffer_desc) * rtlpci->rxringcount,
1429                                     rtlpci->rx_ring[rxring_idx].buffer_desc,
1430                                     rtlpci->rx_ring[rxring_idx].dma);
1431                 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1432         } else {
1433                 pci_free_consistent(rtlpci->pdev,
1434                                     sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1435                                     rtlpci->rxringcount,
1436                                     rtlpci->rx_ring[rxring_idx].desc,
1437                                     rtlpci->rx_ring[rxring_idx].dma);
1438                 rtlpci->rx_ring[rxring_idx].desc = NULL;
1439         }
1440 }
1441
1442 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1443 {
1444         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1445         int ret;
1446         int i, rxring_idx;
1447
1448         /* rxring_idx 0:RX_MPDU_QUEUE
1449          * rxring_idx 1:RX_CMD_QUEUE
1450          */
1451         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1452                 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1453                 if (ret)
1454                         return ret;
1455         }
1456
1457         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1458                 ret = _rtl_pci_init_tx_ring(hw, i,
1459                                  rtlpci->txringcount[i]);
1460                 if (ret)
1461                         goto err_free_rings;
1462         }
1463
1464         return 0;
1465
1466 err_free_rings:
1467         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1468                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1469
1470         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1471                 if (rtlpci->tx_ring[i].desc ||
1472                     rtlpci->tx_ring[i].buffer_desc)
1473                         _rtl_pci_free_tx_ring(hw, i);
1474
1475         return 1;
1476 }
1477
1478 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1479 {
1480         u32 i, rxring_idx;
1481
1482         /*free rx rings */
1483         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1484                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1485
1486         /*free tx rings */
1487         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1488                 _rtl_pci_free_tx_ring(hw, i);
1489
1490         return 0;
1491 }
1492
1493 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1494 {
1495         struct rtl_priv *rtlpriv = rtl_priv(hw);
1496         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1497         int i, rxring_idx;
1498         unsigned long flags;
1499         u8 tmp_one = 1;
1500         u32 bufferaddress;
1501         /* rxring_idx 0:RX_MPDU_QUEUE */
1502         /* rxring_idx 1:RX_CMD_QUEUE */
1503         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1504                 /* force the rx_ring[RX_MPDU_QUEUE/
1505                  * RX_CMD_QUEUE].idx to the first one
1506                  *new trx flow, do nothing
1507                 */
1508                 if (!rtlpriv->use_new_trx_flow &&
1509                     rtlpci->rx_ring[rxring_idx].desc) {
1510                         struct rtl_rx_desc *entry = NULL;
1511
1512                         rtlpci->rx_ring[rxring_idx].idx = 0;
1513                         for (i = 0; i < rtlpci->rxringcount; i++) {
1514                                 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1515                                 bufferaddress =
1516                                   rtlpriv->cfg->ops->get_desc((u8 *)entry,
1517                                   false , HW_DESC_RXBUFF_ADDR);
1518                                 memset((u8 *)entry , 0 ,
1519                                        sizeof(*rtlpci->rx_ring
1520                                        [rxring_idx].desc));/*clear one entry*/
1521                                 if (rtlpriv->use_new_trx_flow) {
1522                                         rtlpriv->cfg->ops->set_desc(hw,
1523                                             (u8 *)entry, false,
1524                                             HW_DESC_RX_PREPARE,
1525                                             (u8 *)&bufferaddress);
1526                                 } else {
1527                                         rtlpriv->cfg->ops->set_desc(hw,
1528                                             (u8 *)entry, false,
1529                                             HW_DESC_RXBUFF_ADDR,
1530                                             (u8 *)&bufferaddress);
1531                                         rtlpriv->cfg->ops->set_desc(hw,
1532                                             (u8 *)entry, false,
1533                                             HW_DESC_RXPKT_LEN,
1534                                             (u8 *)&rtlpci->rxbuffersize);
1535                                         rtlpriv->cfg->ops->set_desc(hw,
1536                                             (u8 *)entry, false,
1537                                             HW_DESC_RXOWN,
1538                                             (u8 *)&tmp_one);
1539                                 }
1540                         }
1541                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1542                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1543                 }
1544                 rtlpci->rx_ring[rxring_idx].idx = 0;
1545         }
1546
1547         /*
1548          *after reset, release previous pending packet,
1549          *and force the  tx idx to the first one
1550          */
1551         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1552         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1553                 if (rtlpci->tx_ring[i].desc ||
1554                     rtlpci->tx_ring[i].buffer_desc) {
1555                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1556
1557                         while (skb_queue_len(&ring->queue)) {
1558                                 u8 *entry;
1559                                 struct sk_buff *skb =
1560                                         __skb_dequeue(&ring->queue);
1561                                 if (rtlpriv->use_new_trx_flow)
1562                                         entry = (u8 *)(&ring->buffer_desc
1563                                                                 [ring->idx]);
1564                                 else
1565                                         entry = (u8 *)(&ring->desc[ring->idx]);
1566
1567                                 pci_unmap_single(rtlpci->pdev,
1568                                                  rtlpriv->cfg->ops->
1569                                                          get_desc((u8 *)
1570                                                          entry,
1571                                                          true,
1572                                                          HW_DESC_TXBUFF_ADDR),
1573                                                  skb->len, PCI_DMA_TODEVICE);
1574                                 kfree_skb(skb);
1575                                 ring->idx = (ring->idx + 1) % ring->entries;
1576                         }
1577                         ring->idx = 0;
1578                 }
1579         }
1580         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1581
1582         return 0;
1583 }
1584
1585 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1586                                         struct ieee80211_sta *sta,
1587                                         struct sk_buff *skb)
1588 {
1589         struct rtl_priv *rtlpriv = rtl_priv(hw);
1590         struct rtl_sta_info *sta_entry = NULL;
1591         u8 tid = rtl_get_tid(skb);
1592         __le16 fc = rtl_get_fc(skb);
1593
1594         if (!sta)
1595                 return false;
1596         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1597
1598         if (!rtlpriv->rtlhal.earlymode_enable)
1599                 return false;
1600         if (ieee80211_is_nullfunc(fc))
1601                 return false;
1602         if (ieee80211_is_qos_nullfunc(fc))
1603                 return false;
1604         if (ieee80211_is_pspoll(fc))
1605                 return false;
1606         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1607                 return false;
1608         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1609                 return false;
1610         if (tid > 7)
1611                 return false;
1612
1613         /* maybe every tid should be checked */
1614         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1615                 return false;
1616
1617         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1618         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1619         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1620
1621         return true;
1622 }
1623
1624 static int rtl_pci_tx(struct ieee80211_hw *hw,
1625                       struct ieee80211_sta *sta,
1626                       struct sk_buff *skb,
1627                       struct rtl_tcb_desc *ptcb_desc)
1628 {
1629         struct rtl_priv *rtlpriv = rtl_priv(hw);
1630         struct rtl_sta_info *sta_entry = NULL;
1631         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1632         struct rtl8192_tx_ring *ring;
1633         struct rtl_tx_desc *pdesc;
1634         struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1635         u16 idx;
1636         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1637         unsigned long flags;
1638         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1639         __le16 fc = rtl_get_fc(skb);
1640         u8 *pda_addr = hdr->addr1;
1641         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1642         /*ssn */
1643         u8 tid = 0;
1644         u16 seq_number = 0;
1645         u8 own;
1646         u8 temp_one = 1;
1647
1648         if (ieee80211_is_mgmt(fc))
1649                 rtl_tx_mgmt_proc(hw, skb);
1650
1651         if (rtlpriv->psc.sw_ps_enabled) {
1652                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1653                         !ieee80211_has_pm(fc))
1654                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1655         }
1656
1657         rtl_action_proc(hw, skb, true);
1658
1659         if (is_multicast_ether_addr(pda_addr))
1660                 rtlpriv->stats.txbytesmulticast += skb->len;
1661         else if (is_broadcast_ether_addr(pda_addr))
1662                 rtlpriv->stats.txbytesbroadcast += skb->len;
1663         else
1664                 rtlpriv->stats.txbytesunicast += skb->len;
1665
1666         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1667         ring = &rtlpci->tx_ring[hw_queue];
1668         if (hw_queue != BEACON_QUEUE) {
1669                 if (rtlpriv->use_new_trx_flow)
1670                         idx = ring->cur_tx_wp;
1671                 else
1672                         idx = (ring->idx + skb_queue_len(&ring->queue)) %
1673                               ring->entries;
1674         } else {
1675                 idx = 0;
1676         }
1677
1678         pdesc = &ring->desc[idx];
1679         if (rtlpriv->use_new_trx_flow) {
1680                 ptx_bd_desc = &ring->buffer_desc[idx];
1681         } else {
1682                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
1683                                 true, HW_DESC_OWN);
1684
1685                 if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1686                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1687                                  "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1688                                  hw_queue, ring->idx, idx,
1689                                  skb_queue_len(&ring->queue));
1690
1691                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1692                                                flags);
1693                         return skb->len;
1694                 }
1695         }
1696
1697         if (rtlpriv->cfg->ops->get_available_desc &&
1698             rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) {
1699                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1700                                  "get_available_desc fail\n");
1701                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1702                                                flags);
1703                         return skb->len;
1704         }
1705
1706         if (ieee80211_is_data_qos(fc)) {
1707                 tid = rtl_get_tid(skb);
1708                 if (sta) {
1709                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1710                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1711                                       IEEE80211_SCTL_SEQ) >> 4;
1712                         seq_number += 1;
1713
1714                         if (!ieee80211_has_morefrags(hdr->frame_control))
1715                                 sta_entry->tids[tid].seq_number = seq_number;
1716                 }
1717         }
1718
1719         if (ieee80211_is_data(fc))
1720                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1721
1722         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1723                         (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1724
1725         __skb_queue_tail(&ring->queue, skb);
1726
1727         if (rtlpriv->use_new_trx_flow) {
1728                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1729                                             HW_DESC_OWN, &hw_queue);
1730         } else {
1731                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1732                                             HW_DESC_OWN, &temp_one);
1733         }
1734
1735         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1736             hw_queue != BEACON_QUEUE) {
1737                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1738                          "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1739                          hw_queue, ring->idx, idx,
1740                          skb_queue_len(&ring->queue));
1741
1742                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1743         }
1744
1745         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1746
1747         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1748
1749         return 0;
1750 }
1751
1752 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1753 {
1754         struct rtl_priv *rtlpriv = rtl_priv(hw);
1755         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1756         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1757         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1758         u16 i = 0;
1759         int queue_id;
1760         struct rtl8192_tx_ring *ring;
1761
1762         if (mac->skip_scan)
1763                 return;
1764
1765         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1766                 u32 queue_len;
1767
1768                 if (((queues >> queue_id) & 0x1) == 0) {
1769                         queue_id--;
1770                         continue;
1771                 }
1772                 ring = &pcipriv->dev.tx_ring[queue_id];
1773                 queue_len = skb_queue_len(&ring->queue);
1774                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1775                         queue_id == TXCMD_QUEUE) {
1776                         queue_id--;
1777                         continue;
1778                 } else {
1779                         msleep(20);
1780                         i++;
1781                 }
1782
1783                 /* we just wait 1s for all queues */
1784                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1785                         is_hal_stop(rtlhal) || i >= 200)
1786                         return;
1787         }
1788 }
1789
1790 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1791 {
1792         struct rtl_priv *rtlpriv = rtl_priv(hw);
1793         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1794
1795         _rtl_pci_deinit_trx_ring(hw);
1796
1797         synchronize_irq(rtlpci->pdev->irq);
1798         tasklet_kill(&rtlpriv->works.irq_tasklet);
1799         cancel_work_sync(&rtlpriv->works.lps_change_work);
1800
1801         flush_workqueue(rtlpriv->works.rtl_wq);
1802         destroy_workqueue(rtlpriv->works.rtl_wq);
1803
1804 }
1805
1806 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1807 {
1808         struct rtl_priv *rtlpriv = rtl_priv(hw);
1809         int err;
1810
1811         _rtl_pci_init_struct(hw, pdev);
1812
1813         err = _rtl_pci_init_trx_ring(hw);
1814         if (err) {
1815                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1816                          "tx ring initialization failed\n");
1817                 return err;
1818         }
1819
1820         return 0;
1821 }
1822
1823 static int rtl_pci_start(struct ieee80211_hw *hw)
1824 {
1825         struct rtl_priv *rtlpriv = rtl_priv(hw);
1826         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1827         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1828         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1829
1830         int err;
1831
1832         rtl_pci_reset_trx_ring(hw);
1833
1834         rtlpci->driver_is_goingto_unload = false;
1835         if (rtlpriv->cfg->ops->get_btc_status &&
1836             rtlpriv->cfg->ops->get_btc_status()) {
1837                 rtlpriv->btcoexist.btc_ops->btc_init_variables(rtlpriv);
1838                 rtlpriv->btcoexist.btc_ops->btc_init_hal_vars(rtlpriv);
1839         }
1840         err = rtlpriv->cfg->ops->hw_init(hw);
1841         if (err) {
1842                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1843                          "Failed to config hardware!\n");
1844                 return err;
1845         }
1846
1847         rtlpriv->cfg->ops->enable_interrupt(hw);
1848         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1849
1850         rtl_init_rx_config(hw);
1851
1852         /*should be after adapter start and interrupt enable. */
1853         set_hal_start(rtlhal);
1854
1855         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1856
1857         rtlpci->up_first_time = false;
1858
1859         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "rtl_pci_start OK\n");
1860         return 0;
1861 }
1862
1863 static void rtl_pci_stop(struct ieee80211_hw *hw)
1864 {
1865         struct rtl_priv *rtlpriv = rtl_priv(hw);
1866         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1867         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1868         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1869         unsigned long flags;
1870         u8 RFInProgressTimeOut = 0;
1871
1872         if (rtlpriv->cfg->ops->get_btc_status())
1873                 rtlpriv->btcoexist.btc_ops->btc_halt_notify();
1874
1875         /*
1876          *should be before disable interrupt&adapter
1877          *and will do it immediately.
1878          */
1879         set_hal_stop(rtlhal);
1880
1881         rtlpci->driver_is_goingto_unload = true;
1882         rtlpriv->cfg->ops->disable_interrupt(hw);
1883         cancel_work_sync(&rtlpriv->works.lps_change_work);
1884
1885         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1886         while (ppsc->rfchange_inprogress) {
1887                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1888                 if (RFInProgressTimeOut > 100) {
1889                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1890                         break;
1891                 }
1892                 mdelay(1);
1893                 RFInProgressTimeOut++;
1894                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1895         }
1896         ppsc->rfchange_inprogress = true;
1897         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1898
1899         rtlpriv->cfg->ops->hw_disable(hw);
1900         /* some things are not needed if firmware not available */
1901         if (!rtlpriv->max_fw_size)
1902                 return;
1903         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1904
1905         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1906         ppsc->rfchange_inprogress = false;
1907         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1908
1909         rtl_pci_enable_aspm(hw);
1910 }
1911
1912 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1913                 struct ieee80211_hw *hw)
1914 {
1915         struct rtl_priv *rtlpriv = rtl_priv(hw);
1916         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1917         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1918         struct pci_dev *bridge_pdev = pdev->bus->self;
1919         u16 venderid;
1920         u16 deviceid;
1921         u8 revisionid;
1922         u16 irqline;
1923         u8 tmp;
1924
1925         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1926         venderid = pdev->vendor;
1927         deviceid = pdev->device;
1928         pci_read_config_byte(pdev, 0x8, &revisionid);
1929         pci_read_config_word(pdev, 0x3C, &irqline);
1930
1931         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1932          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1933          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1934          * the correct driver is r8192e_pci, thus this routine should
1935          * return false.
1936          */
1937         if (deviceid == RTL_PCI_8192SE_DID &&
1938             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1939                 return false;
1940
1941         if (deviceid == RTL_PCI_8192_DID ||
1942             deviceid == RTL_PCI_0044_DID ||
1943             deviceid == RTL_PCI_0047_DID ||
1944             deviceid == RTL_PCI_8192SE_DID ||
1945             deviceid == RTL_PCI_8174_DID ||
1946             deviceid == RTL_PCI_8173_DID ||
1947             deviceid == RTL_PCI_8172_DID ||
1948             deviceid == RTL_PCI_8171_DID) {
1949                 switch (revisionid) {
1950                 case RTL_PCI_REVISION_ID_8192PCIE:
1951                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1952                                  "8192 PCI-E is found - vid/did=%x/%x\n",
1953                                  venderid, deviceid);
1954                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1955                         return false;
1956                 case RTL_PCI_REVISION_ID_8192SE:
1957                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1958                                  "8192SE is found - vid/did=%x/%x\n",
1959                                  venderid, deviceid);
1960                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1961                         break;
1962                 default:
1963                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1964                                  "Err: Unknown device - vid/did=%x/%x\n",
1965                                  venderid, deviceid);
1966                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1967                         break;
1968
1969                 }
1970         } else if (deviceid == RTL_PCI_8723AE_DID) {
1971                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1972                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1973                          "8723AE PCI-E is found - "
1974                          "vid/did=%x/%x\n", venderid, deviceid);
1975         } else if (deviceid == RTL_PCI_8192CET_DID ||
1976                    deviceid == RTL_PCI_8192CE_DID ||
1977                    deviceid == RTL_PCI_8191CE_DID ||
1978                    deviceid == RTL_PCI_8188CE_DID) {
1979                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1980                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1981                          "8192C PCI-E is found - vid/did=%x/%x\n",
1982                          venderid, deviceid);
1983         } else if (deviceid == RTL_PCI_8192DE_DID ||
1984                    deviceid == RTL_PCI_8192DE_DID2) {
1985                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1986                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1987                          "8192D PCI-E is found - vid/did=%x/%x\n",
1988                          venderid, deviceid);
1989         } else if (deviceid == RTL_PCI_8188EE_DID) {
1990                 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1991                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1992                          "Find adapter, Hardware type is 8188EE\n");
1993         } else if (deviceid == RTL_PCI_8723BE_DID) {
1994                         rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
1995                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1996                                  "Find adapter, Hardware type is 8723BE\n");
1997         } else if (deviceid == RTL_PCI_8192EE_DID) {
1998                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
1999                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2000                                  "Find adapter, Hardware type is 8192EE\n");
2001         } else if (deviceid == RTL_PCI_8821AE_DID) {
2002                         rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
2003                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2004                                  "Find adapter, Hardware type is 8821AE\n");
2005         } else if (deviceid == RTL_PCI_8812AE_DID) {
2006                         rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
2007                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2008                                  "Find adapter, Hardware type is 8812AE\n");
2009         } else {
2010                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
2011                          "Err: Unknown device - vid/did=%x/%x\n",
2012                          venderid, deviceid);
2013
2014                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
2015         }
2016
2017         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
2018                 if (revisionid == 0 || revisionid == 1) {
2019                         if (revisionid == 0) {
2020                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2021                                          "Find 92DE MAC0\n");
2022                                 rtlhal->interfaceindex = 0;
2023                         } else if (revisionid == 1) {
2024                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2025                                          "Find 92DE MAC1\n");
2026                                 rtlhal->interfaceindex = 1;
2027                         }
2028                 } else {
2029                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2030                                  "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
2031                                  venderid, deviceid, revisionid);
2032                         rtlhal->interfaceindex = 0;
2033                 }
2034         }
2035
2036         /* 92ee use new trx flow */
2037         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
2038                 rtlpriv->use_new_trx_flow = true;
2039         else
2040                 rtlpriv->use_new_trx_flow = false;
2041
2042         /*find bus info */
2043         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2044         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2045         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2046
2047         /*find bridge info */
2048         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2049         /* some ARM have no bridge_pdev and will crash here
2050          * so we should check if bridge_pdev is NULL
2051          */
2052         if (bridge_pdev) {
2053                 /*find bridge info if available */
2054                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2055                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2056                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2057                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2058                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2059                                          "Pci Bridge Vendor is found index: %d\n",
2060                                          tmp);
2061                                 break;
2062                         }
2063                 }
2064         }
2065
2066         if (pcipriv->ndis_adapter.pcibridge_vendor !=
2067                 PCI_BRIDGE_VENDOR_UNKNOWN) {
2068                 pcipriv->ndis_adapter.pcibridge_busnum =
2069                     bridge_pdev->bus->number;
2070                 pcipriv->ndis_adapter.pcibridge_devnum =
2071                     PCI_SLOT(bridge_pdev->devfn);
2072                 pcipriv->ndis_adapter.pcibridge_funcnum =
2073                     PCI_FUNC(bridge_pdev->devfn);
2074                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2075                     pci_pcie_cap(bridge_pdev);
2076                 pcipriv->ndis_adapter.num4bytes =
2077                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2078
2079                 rtl_pci_get_linkcontrol_field(hw);
2080
2081                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2082                     PCI_BRIDGE_VENDOR_AMD) {
2083                         pcipriv->ndis_adapter.amd_l1_patch =
2084                             rtl_pci_get_amd_l1_patch(hw);
2085                 }
2086         }
2087
2088         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2089                  "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2090                  pcipriv->ndis_adapter.busnumber,
2091                  pcipriv->ndis_adapter.devnumber,
2092                  pcipriv->ndis_adapter.funcnumber,
2093                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2094
2095         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2096                  "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2097                  pcipriv->ndis_adapter.pcibridge_busnum,
2098                  pcipriv->ndis_adapter.pcibridge_devnum,
2099                  pcipriv->ndis_adapter.pcibridge_funcnum,
2100                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2101                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2102                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2103                  pcipriv->ndis_adapter.amd_l1_patch);
2104
2105         rtl_pci_parse_configuration(pdev, hw);
2106         list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2107
2108         return true;
2109 }
2110
2111 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2112 {
2113         struct rtl_priv *rtlpriv = rtl_priv(hw);
2114         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2115         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2116         int ret;
2117
2118         ret = pci_enable_msi(rtlpci->pdev);
2119         if (ret < 0)
2120                 return ret;
2121
2122         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2123                           IRQF_SHARED, KBUILD_MODNAME, hw);
2124         if (ret < 0) {
2125                 pci_disable_msi(rtlpci->pdev);
2126                 return ret;
2127         }
2128
2129         rtlpci->using_msi = true;
2130
2131         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2132                  "MSI Interrupt Mode!\n");
2133         return 0;
2134 }
2135
2136 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2137 {
2138         struct rtl_priv *rtlpriv = rtl_priv(hw);
2139         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2140         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2141         int ret;
2142
2143         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2144                           IRQF_SHARED, KBUILD_MODNAME, hw);
2145         if (ret < 0)
2146                 return ret;
2147
2148         rtlpci->using_msi = false;
2149         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2150                  "Pin-based Interrupt Mode!\n");
2151         return 0;
2152 }
2153
2154 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2155 {
2156         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2157         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2158         int ret;
2159
2160         if (rtlpci->msi_support) {
2161                 ret = rtl_pci_intr_mode_msi(hw);
2162                 if (ret < 0)
2163                         ret = rtl_pci_intr_mode_legacy(hw);
2164         } else {
2165                 ret = rtl_pci_intr_mode_legacy(hw);
2166         }
2167         return ret;
2168 }
2169
2170 int rtl_pci_probe(struct pci_dev *pdev,
2171                             const struct pci_device_id *id)
2172 {
2173         struct ieee80211_hw *hw = NULL;
2174
2175         struct rtl_priv *rtlpriv = NULL;
2176         struct rtl_pci_priv *pcipriv = NULL;
2177         struct rtl_pci *rtlpci;
2178         unsigned long pmem_start, pmem_len, pmem_flags;
2179         int err;
2180
2181         err = pci_enable_device(pdev);
2182         if (err) {
2183                 RT_ASSERT(false, "%s : Cannot enable new PCI device\n",
2184                           pci_name(pdev));
2185                 return err;
2186         }
2187
2188         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2189                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2190                         RT_ASSERT(false,
2191                                   "Unable to obtain 32bit DMA for consistent allocations\n");
2192                         err = -ENOMEM;
2193                         goto fail1;
2194                 }
2195         }
2196
2197         pci_set_master(pdev);
2198
2199         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2200                                 sizeof(struct rtl_priv), &rtl_ops);
2201         if (!hw) {
2202                 RT_ASSERT(false,
2203                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
2204                 err = -ENOMEM;
2205                 goto fail1;
2206         }
2207
2208         SET_IEEE80211_DEV(hw, &pdev->dev);
2209         pci_set_drvdata(pdev, hw);
2210
2211         rtlpriv = hw->priv;
2212         rtlpriv->hw = hw;
2213         pcipriv = (void *)rtlpriv->priv;
2214         pcipriv->dev.pdev = pdev;
2215         init_completion(&rtlpriv->firmware_loading_complete);
2216         /*proximity init here*/
2217         rtlpriv->proximity.proxim_on = false;
2218
2219         pcipriv = (void *)rtlpriv->priv;
2220         pcipriv->dev.pdev = pdev;
2221
2222         /* init cfg & intf_ops */
2223         rtlpriv->rtlhal.interface = INTF_PCI;
2224         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2225         rtlpriv->intf_ops = &rtl_pci_ops;
2226         rtlpriv->glb_var = &rtl_global_var;
2227
2228         /*
2229          *init dbgp flags before all
2230          *other functions, because we will
2231          *use it in other funtions like
2232          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
2233          *you can not use these macro
2234          *before this
2235          */
2236         rtl_dbgp_flag_init(hw);
2237
2238         /* MEM map */
2239         err = pci_request_regions(pdev, KBUILD_MODNAME);
2240         if (err) {
2241                 RT_ASSERT(false, "Can't obtain PCI resources\n");
2242                 goto fail1;
2243         }
2244
2245         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2246         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2247         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2248
2249         /*shared mem start */
2250         rtlpriv->io.pci_mem_start =
2251                         (unsigned long)pci_iomap(pdev,
2252                         rtlpriv->cfg->bar_id, pmem_len);
2253         if (rtlpriv->io.pci_mem_start == 0) {
2254                 RT_ASSERT(false, "Can't map PCI mem\n");
2255                 err = -ENOMEM;
2256                 goto fail2;
2257         }
2258
2259         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2260                  "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2261                  pmem_start, pmem_len, pmem_flags,
2262                  rtlpriv->io.pci_mem_start);
2263
2264         /* Disable Clk Request */
2265         pci_write_config_byte(pdev, 0x81, 0);
2266         /* leave D3 mode */
2267         pci_write_config_byte(pdev, 0x44, 0);
2268         pci_write_config_byte(pdev, 0x04, 0x06);
2269         pci_write_config_byte(pdev, 0x04, 0x07);
2270
2271         /* find adapter */
2272         if (!_rtl_pci_find_adapter(pdev, hw)) {
2273                 err = -ENODEV;
2274                 goto fail3;
2275         }
2276
2277         /* Init IO handler */
2278         _rtl_pci_io_handler_init(&pdev->dev, hw);
2279
2280         /*like read eeprom and so on */
2281         rtlpriv->cfg->ops->read_eeprom_info(hw);
2282
2283         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2284                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");
2285                 err = -ENODEV;
2286                 goto fail3;
2287         }
2288         rtlpriv->cfg->ops->init_sw_leds(hw);
2289
2290         /*aspm */
2291         rtl_pci_init_aspm(hw);
2292
2293         /* Init mac80211 sw */
2294         err = rtl_init_core(hw);
2295         if (err) {
2296                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2297                          "Can't allocate sw for mac80211\n");
2298                 goto fail3;
2299         }
2300
2301         /* Init PCI sw */
2302         err = rtl_pci_init(hw, pdev);
2303         if (err) {
2304                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Failed to init PCI\n");
2305                 goto fail3;
2306         }
2307
2308         err = ieee80211_register_hw(hw);
2309         if (err) {
2310                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2311                          "Can't register mac80211 hw.\n");
2312                 err = -ENODEV;
2313                 goto fail3;
2314         }
2315         rtlpriv->mac80211.mac80211_registered = 1;
2316
2317         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
2318         if (err) {
2319                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2320                          "failed to create sysfs device attributes\n");
2321                 goto fail3;
2322         }
2323
2324         /*init rfkill */
2325         rtl_init_rfkill(hw);    /* Init PCI sw */
2326
2327         rtlpci = rtl_pcidev(pcipriv);
2328         err = rtl_pci_intr_mode_decide(hw);
2329         if (err) {
2330                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2331                          "%s: failed to register IRQ handler\n",
2332                          wiphy_name(hw->wiphy));
2333                 goto fail3;
2334         }
2335         rtlpci->irq_alloc = 1;
2336
2337         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2338         return 0;
2339
2340 fail3:
2341         pci_set_drvdata(pdev, NULL);
2342         rtl_deinit_core(hw);
2343
2344         if (rtlpriv->io.pci_mem_start != 0)
2345                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2346
2347 fail2:
2348         pci_release_regions(pdev);
2349         complete(&rtlpriv->firmware_loading_complete);
2350
2351 fail1:
2352         if (hw)
2353                 ieee80211_free_hw(hw);
2354         pci_disable_device(pdev);
2355
2356         return err;
2357
2358 }
2359 EXPORT_SYMBOL(rtl_pci_probe);
2360
2361 void rtl_pci_disconnect(struct pci_dev *pdev)
2362 {
2363         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2364         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2365         struct rtl_priv *rtlpriv = rtl_priv(hw);
2366         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2367         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2368
2369         /* just in case driver is removed before firmware callback */
2370         wait_for_completion(&rtlpriv->firmware_loading_complete);
2371         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2372
2373         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
2374
2375         /*ieee80211_unregister_hw will call ops_stop */
2376         if (rtlmac->mac80211_registered == 1) {
2377                 ieee80211_unregister_hw(hw);
2378                 rtlmac->mac80211_registered = 0;
2379         } else {
2380                 rtl_deinit_deferred_work(hw);
2381                 rtlpriv->intf_ops->adapter_stop(hw);
2382         }
2383         rtlpriv->cfg->ops->disable_interrupt(hw);
2384
2385         /*deinit rfkill */
2386         rtl_deinit_rfkill(hw);
2387
2388         rtl_pci_deinit(hw);
2389         rtl_deinit_core(hw);
2390         rtlpriv->cfg->ops->deinit_sw_vars(hw);
2391
2392         if (rtlpci->irq_alloc) {
2393                 synchronize_irq(rtlpci->pdev->irq);
2394                 free_irq(rtlpci->pdev->irq, hw);
2395                 rtlpci->irq_alloc = 0;
2396         }
2397
2398         if (rtlpci->using_msi)
2399                 pci_disable_msi(rtlpci->pdev);
2400
2401         list_del(&rtlpriv->list);
2402         if (rtlpriv->io.pci_mem_start != 0) {
2403                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2404                 pci_release_regions(pdev);
2405         }
2406
2407         pci_disable_device(pdev);
2408
2409         rtl_pci_disable_aspm(hw);
2410
2411         pci_set_drvdata(pdev, NULL);
2412
2413         ieee80211_free_hw(hw);
2414 }
2415 EXPORT_SYMBOL(rtl_pci_disconnect);
2416
2417 #ifdef CONFIG_PM_SLEEP
2418 /***************************************
2419 kernel pci power state define:
2420 PCI_D0         ((pci_power_t __force) 0)
2421 PCI_D1         ((pci_power_t __force) 1)
2422 PCI_D2         ((pci_power_t __force) 2)
2423 PCI_D3hot      ((pci_power_t __force) 3)
2424 PCI_D3cold     ((pci_power_t __force) 4)
2425 PCI_UNKNOWN    ((pci_power_t __force) 5)
2426
2427 This function is called when system
2428 goes into suspend state mac80211 will
2429 call rtl_mac_stop() from the mac80211
2430 suspend function first, So there is
2431 no need to call hw_disable here.
2432 ****************************************/
2433 int rtl_pci_suspend(struct device *dev)
2434 {
2435         struct pci_dev *pdev = to_pci_dev(dev);
2436         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2437         struct rtl_priv *rtlpriv = rtl_priv(hw);
2438
2439         rtlpriv->cfg->ops->hw_suspend(hw);
2440         rtl_deinit_rfkill(hw);
2441
2442         return 0;
2443 }
2444 EXPORT_SYMBOL(rtl_pci_suspend);
2445
2446 int rtl_pci_resume(struct device *dev)
2447 {
2448         struct pci_dev *pdev = to_pci_dev(dev);
2449         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2450         struct rtl_priv *rtlpriv = rtl_priv(hw);
2451
2452         rtlpriv->cfg->ops->hw_resume(hw);
2453         rtl_init_rfkill(hw);
2454         return 0;
2455 }
2456 EXPORT_SYMBOL(rtl_pci_resume);
2457 #endif /* CONFIG_PM_SLEEP */
2458
2459 struct rtl_intf_ops rtl_pci_ops = {
2460         .read_efuse_byte = read_efuse_byte,
2461         .adapter_start = rtl_pci_start,
2462         .adapter_stop = rtl_pci_stop,
2463         .check_buddy_priv = rtl_pci_check_buddy_priv,
2464         .adapter_tx = rtl_pci_tx,
2465         .flush = rtl_pci_flush,
2466         .reset_trx_ring = rtl_pci_reset_trx_ring,
2467         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2468
2469         .disable_aspm = rtl_pci_disable_aspm,
2470         .enable_aspm = rtl_pci_enable_aspm,
2471 };