drivers/net/wireless/rt2x00/rt73usb.c

   1 /*
   2         Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 /*
  28  * Set enviroment defines for rt2x00.h
  29  */
  30 #define DRV_NAME "rt73usb"
  31
  32 #include <linux/delay.h>
  33 #include <linux/etherdevice.h>
  34 #include <linux/init.h>
  35 #include <linux/kernel.h>
  36 #include <linux/module.h>
  37 #include <linux/usb.h>
  38
  39 #include "rt2x00.h"
  40 #include "rt2x00usb.h"
  41 #include "rt73usb.h"
  42
  43 /*
  44  * Register access.
  45  * All access to the CSR registers will go through the methods
  46  * rt73usb_register_read and rt73usb_register_write.
  47  * BBP and RF register require indirect register access,
  48  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  49  * These indirect registers work with busy bits,
  50  * and we will try maximal REGISTER_BUSY_COUNT times to access
  51  * the register while taking a REGISTER_BUSY_DELAY us delay
  52  * between each attampt. When the busy bit is still set at that time,
  53  * the access attempt is considered to have failed,
  54  * and we will print an error.
  55  */
  56 static inline void rt73usb_register_read(const struct rt2x00_dev *rt2x00dev,
  57                                          const unsigned int offset, u32 *value)
  58 {
  59         __le32 reg;
  60         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  61                                       USB_VENDOR_REQUEST_IN, offset,
  62                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  63         *value = le32_to_cpu(reg);
  64 }
  65
  66 static inline void rt73usb_register_multiread(const struct rt2x00_dev
  67                                               *rt2x00dev,
  68                                               const unsigned int offset,
  69                                               void *value, const u32 length)
  70 {
  71         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  72         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  73                                       USB_VENDOR_REQUEST_IN, offset,
  74                                       value, length, timeout);
  75 }
  76
  77 static inline void rt73usb_register_write(const struct rt2x00_dev *rt2x00dev,
  78                                           const unsigned int offset, u32 value)
  79 {
  80         __le32 reg = cpu_to_le32(value);
  81         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  82                                       USB_VENDOR_REQUEST_OUT, offset,
  83                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  84 }
  85
  86 static inline void rt73usb_register_multiwrite(const struct rt2x00_dev
  87                                                *rt2x00dev,
  88                                                const unsigned int offset,
  89                                                void *value, const u32 length)
  90 {
  91         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  92         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  93                                       USB_VENDOR_REQUEST_OUT, offset,
  94                                       value, length, timeout);
  95 }
  96
  97 static u32 rt73usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
  98 {
  99         u32 reg;
 100         unsigned int i;
 101
 102         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 103                 rt73usb_register_read(rt2x00dev, PHY_CSR3, &reg);
 104                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 105                         break;
 106                 udelay(REGISTER_BUSY_DELAY);
 107         }
 108
 109         return reg;
 110 }
 111
 112 static void rt73usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
 113                               const unsigned int word, const u8 value)
 114 {
 115         u32 reg;
 116
 117         /*
 118          * Wait until the BBP becomes ready.
 119          */
 120         reg = rt73usb_bbp_check(rt2x00dev);
 121         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 122                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 123                 return;
 124         }
 125
 126         /*
 127          * Write the data into the BBP.
 128          */
 129         reg = 0;
 130         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 131         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 132         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 133         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 134
 135         rt73usb_register_write(rt2x00dev, PHY_CSR3, reg);
 136 }
 137
 138 static void rt73usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
 139                              const unsigned int word, u8 *value)
 140 {
 141         u32 reg;
 142
 143         /*
 144          * Wait until the BBP becomes ready.
 145          */
 146         reg = rt73usb_bbp_check(rt2x00dev);
 147         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 148                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 149                 return;
 150         }
 151
 152         /*
 153          * Write the request into the BBP.
 154          */
 155         reg = 0;
 156         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 157         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 158         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 159
 160         rt73usb_register_write(rt2x00dev, PHY_CSR3, reg);
 161
 162         /*
 163          * Wait until the BBP becomes ready.
 164          */
 165         reg = rt73usb_bbp_check(rt2x00dev);
 166         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 167                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 168                 *value = 0xff;
 169                 return;
 170         }
 171
 172         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 173 }
 174
 175 static void rt73usb_rf_write(const struct rt2x00_dev *rt2x00dev,
 176                              const unsigned int word, const u32 value)
 177 {
 178         u32 reg;
 179         unsigned int i;
 180
 181         if (!word)
 182                 return;
 183
 184         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 185                 rt73usb_register_read(rt2x00dev, PHY_CSR4, &reg);
 186                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 187                         goto rf_write;
 188                 udelay(REGISTER_BUSY_DELAY);
 189         }
 190
 191         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 192         return;
 193
 194 rf_write:
 195         reg = 0;
 196         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 197
 198         /*
 199          * RF5225 and RF2527 contain 21 bits per RF register value,
 200          * all others contain 20 bits.
 201          */
 202         rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
 203                            20 + !!(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 204                                    rt2x00_rf(&rt2x00dev->chip, RF2527)));
 205         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 206         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 207
 208         rt73usb_register_write(rt2x00dev, PHY_CSR4, reg);
 209         rt2x00_rf_write(rt2x00dev, word, value);
 210 }
 211
 212 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 213 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 214
 215 static void rt73usb_read_csr(const struct rt2x00_dev *rt2x00dev,
 216                              const unsigned int word, u32 *data)
 217 {
 218         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 219 }
 220
 221 static void rt73usb_write_csr(const struct rt2x00_dev *rt2x00dev,
 222                               const unsigned int word, u32 data)
 223 {
 224         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
 225 }
 226
 227 static const struct rt2x00debug rt73usb_rt2x00debug = {
 228         .owner  = THIS_MODULE,
 229         .csr    = {
 230                 .read           = rt73usb_read_csr,
 231                 .write          = rt73usb_write_csr,
 232                 .word_size      = sizeof(u32),
 233                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 234         },
 235         .eeprom = {
 236                 .read           = rt2x00_eeprom_read,
 237                 .write          = rt2x00_eeprom_write,
 238                 .word_size      = sizeof(u16),
 239                 .word_count     = EEPROM_SIZE / sizeof(u16),
 240         },
 241         .bbp    = {
 242                 .read           = rt73usb_bbp_read,
 243                 .write          = rt73usb_bbp_write,
 244                 .word_size      = sizeof(u8),
 245                 .word_count     = BBP_SIZE / sizeof(u8),
 246         },
 247         .rf     = {
 248                 .read           = rt2x00_rf_read,
 249                 .write          = rt73usb_rf_write,
 250                 .word_size      = sizeof(u32),
 251                 .word_count     = RF_SIZE / sizeof(u32),
 252         },
 253 };
 254 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 255
 256 /*
 257  * Configuration handlers.
 258  */
 259 static void rt73usb_config_mac_addr(struct rt2x00_dev *rt2x00dev, __le32 *mac)
 260 {
 261         u32 tmp;
 262
 263         tmp = le32_to_cpu(mac[1]);
 264         rt2x00_set_field32(&tmp, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 265         mac[1] = cpu_to_le32(tmp);
 266
 267         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2, mac,
 268                                     (2 * sizeof(__le32)));
 269 }
 270
 271 static void rt73usb_config_bssid(struct rt2x00_dev *rt2x00dev, __le32 *bssid)
 272 {
 273         u32 tmp;
 274
 275         tmp = le32_to_cpu(bssid[1]);
 276         rt2x00_set_field32(&tmp, MAC_CSR5_BSS_ID_MASK, 3);
 277         bssid[1] = cpu_to_le32(tmp);
 278
 279         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4, bssid,
 280                                     (2 * sizeof(__le32)));
 281 }
 282
 283 static void rt73usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
 284                                 const int tsf_sync)
 285 {
 286         u32 reg;
 287
 288         /*
 289          * Clear current synchronisation setup.
 290          * For the Beacon base registers we only need to clear
 291          * the first byte since that byte contains the VALID and OWNER
 292          * bits which (when set to 0) will invalidate the entire beacon.
 293          */
 294         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
 295         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
 296         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
 297         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
 298         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
 299
 300         /*
 301          * Enable synchronisation.
 302          */
 303         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 304         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 305         rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
 306         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
 307         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, tsf_sync);
 308         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 309 }
 310
 311 static void rt73usb_config_preamble(struct rt2x00_dev *rt2x00dev,
 312                                       const int short_preamble,
 313                                       const int ack_timeout,
 314                                       const int ack_consume_time)
 315 {
 316         u32 reg;
 317
 318         /*
 319          * When in atomic context, reschedule and let rt2x00lib
 320          * call this function again.
 321          */
 322         if (in_atomic()) {
 323                 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->config_work);
 324                 return;
 325         }
 326
 327         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 328         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, ack_timeout);
 329         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 330
 331         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 332         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
 333                            !!short_preamble);
 334         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 335 }
 336
 337 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 338                                    const int basic_rate_mask)
 339 {
 340         rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
 341 }
 342
 343 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 344                                    struct rf_channel *rf, const int txpower)
 345 {
 346         u8 r3;
 347         u8 r94;
 348         u8 smart;
 349
 350         rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 351         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 352
 353         smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 354                   rt2x00_rf(&rt2x00dev->chip, RF2527));
 355
 356         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 357         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
 358         rt73usb_bbp_write(rt2x00dev, 3, r3);
 359
 360         r94 = 6;
 361         if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
 362                 r94 += txpower - MAX_TXPOWER;
 363         else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
 364                 r94 += txpower;
 365         rt73usb_bbp_write(rt2x00dev, 94, r94);
 366
 367         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 368         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 369         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 370         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 371
 372         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 373         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 374         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
 375         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 376
 377         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 378         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 379         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 380         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 381
 382         udelay(10);
 383 }
 384
 385 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 386                                    const int txpower)
 387 {
 388         struct rf_channel rf;
 389
 390         rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
 391         rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
 392         rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
 393         rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
 394
 395         rt73usb_config_channel(rt2x00dev, &rf, txpower);
 396 }
 397
 398 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
 399                                       struct antenna_setup *ant)
 400 {
 401         u8 r3;
 402         u8 r4;
 403         u8 r77;
 404
 405         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 406         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 407         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 408
 409         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 410
 411         switch (ant->rx) {
 412         case ANTENNA_SW_DIVERSITY:
 413         case ANTENNA_HW_DIVERSITY:
 414                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
 415                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 416                                   !!(rt2x00dev->curr_hwmode != HWMODE_A));
 417                 break;
 418         case ANTENNA_A:
 419                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 420                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 421
 422                 if (rt2x00dev->curr_hwmode == HWMODE_A)
 423                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 424                 else
 425                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 426                 break;
 427         case ANTENNA_B:
 428                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 429                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 430
 431                 if (rt2x00dev->curr_hwmode == HWMODE_A)
 432                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 433                 else
 434                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 435                 break;
 436         }
 437
 438         rt73usb_bbp_write(rt2x00dev, 77, r77);
 439         rt73usb_bbp_write(rt2x00dev, 3, r3);
 440         rt73usb_bbp_write(rt2x00dev, 4, r4);
 441 }
 442
 443 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
 444                                       struct antenna_setup *ant)
 445 {
 446         u8 r3;
 447         u8 r4;
 448         u8 r77;
 449
 450         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 451         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 452         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 453
 454         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 455         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 456                           !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 457
 458         switch (ant->rx) {
 459         case ANTENNA_SW_DIVERSITY:
 460         case ANTENNA_HW_DIVERSITY:
 461                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
 462                 break;
 463         case ANTENNA_A:
 464                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 465                 rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 466                 break;
 467         case ANTENNA_B:
 468                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 469                 rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 470                 break;
 471         }
 472
 473         rt73usb_bbp_write(rt2x00dev, 77, r77);
 474         rt73usb_bbp_write(rt2x00dev, 3, r3);
 475         rt73usb_bbp_write(rt2x00dev, 4, r4);
 476 }
 477
 478 struct antenna_sel {
 479         u8 word;
 480         /*
 481          * value[0] -> non-LNA
 482          * value[1] -> LNA
 483          */
 484         u8 value[2];
 485 };
 486
 487 static const struct antenna_sel antenna_sel_a[] = {
 488         { 96,  { 0x58, 0x78 } },
 489         { 104, { 0x38, 0x48 } },
 490         { 75,  { 0xfe, 0x80 } },
 491         { 86,  { 0xfe, 0x80 } },
 492         { 88,  { 0xfe, 0x80 } },
 493         { 35,  { 0x60, 0x60 } },
 494         { 97,  { 0x58, 0x58 } },
 495         { 98,  { 0x58, 0x58 } },
 496 };
 497
 498 static const struct antenna_sel antenna_sel_bg[] = {
 499         { 96,  { 0x48, 0x68 } },
 500         { 104, { 0x2c, 0x3c } },
 501         { 75,  { 0xfe, 0x80 } },
 502         { 86,  { 0xfe, 0x80 } },
 503         { 88,  { 0xfe, 0x80 } },
 504         { 35,  { 0x50, 0x50 } },
 505         { 97,  { 0x48, 0x48 } },
 506         { 98,  { 0x48, 0x48 } },
 507 };
 508
 509 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 510                                    struct antenna_setup *ant)
 511 {
 512         const struct antenna_sel *sel;
 513         unsigned int lna;
 514         unsigned int i;
 515         u32 reg;
 516
 517         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 518
 519         if (rt2x00dev->curr_hwmode == HWMODE_A) {
 520                 sel = antenna_sel_a;
 521                 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
 522
 523                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG, 0);
 524                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A, 1);
 525         } else {
 526                 sel = antenna_sel_bg;
 527                 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 528
 529                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG, 1);
 530                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A, 0);
 531         }
 532
 533         for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
 534                 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
 535
 536         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 537
 538         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 539             rt2x00_rf(&rt2x00dev->chip, RF5225))
 540                 rt73usb_config_antenna_5x(rt2x00dev, ant);
 541         else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 542                  rt2x00_rf(&rt2x00dev->chip, RF2527))
 543                 rt73usb_config_antenna_2x(rt2x00dev, ant);
 544 }
 545
 546 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 547                                     struct rt2x00lib_conf *libconf)
 548 {
 549         u32 reg;
 550
 551         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 552         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
 553         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 554
 555         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 556         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
 557         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 558         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
 559         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 560
 561         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 562         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 563         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 564
 565         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 566         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 567         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 568
 569         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 570         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
 571                            libconf->conf->beacon_int * 16);
 572         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 573 }
 574
 575 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
 576                            const unsigned int flags,
 577                            struct rt2x00lib_conf *libconf)
 578 {
 579         if (flags & CONFIG_UPDATE_PHYMODE)
 580                 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
 581         if (flags & CONFIG_UPDATE_CHANNEL)
 582                 rt73usb_config_channel(rt2x00dev, &libconf->rf,
 583                                        libconf->conf->power_level);
 584         if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
 585                 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
 586         if (flags & CONFIG_UPDATE_ANTENNA)
 587                 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
 588         if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
 589                 rt73usb_config_duration(rt2x00dev, libconf);
 590 }
 591
 592 /*
 593  * LED functions.
 594  */
 595 static void rt73usb_enable_led(struct rt2x00_dev *rt2x00dev)
 596 {
 597         u32 reg;
 598
 599         rt73usb_register_read(rt2x00dev, MAC_CSR14, &reg);
 600         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, 70);
 601         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, 30);
 602         rt73usb_register_write(rt2x00dev, MAC_CSR14, reg);
 603
 604         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 1);
 605         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A)
 606                 rt2x00_set_field16(&rt2x00dev->led_reg,
 607                                    MCU_LEDCS_LINK_A_STATUS, 1);
 608         else
 609                 rt2x00_set_field16(&rt2x00dev->led_reg,
 610                                    MCU_LEDCS_LINK_BG_STATUS, 1);
 611
 612         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 613                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 614 }
 615
 616 static void rt73usb_disable_led(struct rt2x00_dev *rt2x00dev)
 617 {
 618         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 0);
 619         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS, 0);
 620         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS, 0);
 621
 622         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 623                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 624 }
 625
 626 static void rt73usb_activity_led(struct rt2x00_dev *rt2x00dev, int rssi)
 627 {
 628         u32 led;
 629
 630         if (rt2x00dev->led_mode != LED_MODE_SIGNAL_STRENGTH)
 631                 return;
 632
 633         /*
 634          * Led handling requires a positive value for the rssi,
 635          * to do that correctly we need to add the correction.
 636          */
 637         rssi += rt2x00dev->rssi_offset;
 638
 639         if (rssi <= 30)
 640                 led = 0;
 641         else if (rssi <= 39)
 642                 led = 1;
 643         else if (rssi <= 49)
 644                 led = 2;
 645         else if (rssi <= 53)
 646                 led = 3;
 647         else if (rssi <= 63)
 648                 led = 4;
 649         else
 650                 led = 5;
 651
 652         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, led,
 653                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 654 }
 655
 656 /*
 657  * Link tuning
 658  */
 659 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
 660                                struct link_qual *qual)
 661 {
 662         u32 reg;
 663
 664         /*
 665          * Update FCS error count from register.
 666          */
 667         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 668         qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
 669
 670         /*
 671          * Update False CCA count from register.
 672          */
 673         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 674         qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 675 }
 676
 677 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
 678 {
 679         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 680         rt2x00dev->link.vgc_level = 0x20;
 681 }
 682
 683 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
 684 {
 685         int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
 686         u8 r17;
 687         u8 up_bound;
 688         u8 low_bound;
 689
 690         /*
 691          * Update Led strength
 692          */
 693         rt73usb_activity_led(rt2x00dev, rssi);
 694
 695         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 696
 697         /*
 698          * Determine r17 bounds.
 699          */
 700         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
 701                 low_bound = 0x28;
 702                 up_bound = 0x48;
 703
 704                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
 705                         low_bound += 0x10;
 706                         up_bound += 0x10;
 707                 }
 708         } else {
 709                 if (rssi > -82) {
 710                         low_bound = 0x1c;
 711                         up_bound = 0x40;
 712                 } else if (rssi > -84) {
 713                         low_bound = 0x1c;
 714                         up_bound = 0x20;
 715                 } else {
 716                         low_bound = 0x1c;
 717                         up_bound = 0x1c;
 718                 }
 719
 720                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
 721                         low_bound += 0x14;
 722                         up_bound += 0x10;
 723                 }
 724         }
 725
 726         /*
 727          * Special big-R17 for very short distance
 728          */
 729         if (rssi > -35) {
 730                 if (r17 != 0x60)
 731                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 732                 return;
 733         }
 734
 735         /*
 736          * Special big-R17 for short distance
 737          */
 738         if (rssi >= -58) {
 739                 if (r17 != up_bound)
 740                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 741                 return;
 742         }
 743
 744         /*
 745          * Special big-R17 for middle-short distance
 746          */
 747         if (rssi >= -66) {
 748                 low_bound += 0x10;
 749                 if (r17 != low_bound)
 750                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 751                 return;
 752         }
 753
 754         /*
 755          * Special mid-R17 for middle distance
 756          */
 757         if (rssi >= -74) {
 758                 if (r17 != (low_bound + 0x10))
 759                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 760                 return;
 761         }
 762
 763         /*
 764          * Special case: Change up_bound based on the rssi.
 765          * Lower up_bound when rssi is weaker then -74 dBm.
 766          */
 767         up_bound -= 2 * (-74 - rssi);
 768         if (low_bound > up_bound)
 769                 up_bound = low_bound;
 770
 771         if (r17 > up_bound) {
 772                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 773                 return;
 774         }
 775
 776         /*
 777          * r17 does not yet exceed upper limit, continue and base
 778          * the r17 tuning on the false CCA count.
 779          */
 780         if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
 781                 r17 += 4;
 782                 if (r17 > up_bound)
 783                         r17 = up_bound;
 784                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 785         } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
 786                 r17 -= 4;
 787                 if (r17 < low_bound)
 788                         r17 = low_bound;
 789                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 790         }
 791 }
 792
 793 /*
 794  * Firmware name function.
 795  */
 796 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 797 {
 798         return FIRMWARE_RT2571;
 799 }
 800
 801 /*
 802  * Initialization functions.
 803  */
 804 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 805                                  const size_t len)
 806 {
 807         unsigned int i;
 808         int status;
 809         u32 reg;
 810         char *ptr = data;
 811         char *cache;
 812         int buflen;
 813         int timeout;
 814
 815         /*
 816          * Wait for stable hardware.
 817          */
 818         for (i = 0; i < 100; i++) {
 819                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 820                 if (reg)
 821                         break;
 822                 msleep(1);
 823         }
 824
 825         if (!reg) {
 826                 ERROR(rt2x00dev, "Unstable hardware.\n");
 827                 return -EBUSY;
 828         }
 829
 830         /*
 831          * Write firmware to device.
 832          * We setup a seperate cache for this action,
 833          * since we are going to write larger chunks of data
 834          * then normally used cache size.
 835          */
 836         cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
 837         if (!cache) {
 838                 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
 839                 return -ENOMEM;
 840         }
 841
 842         for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
 843                 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
 844                 timeout = REGISTER_TIMEOUT * (buflen / sizeof(u32));
 845
 846                 memcpy(cache, ptr, buflen);
 847
 848                 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
 849                                          USB_VENDOR_REQUEST_OUT,
 850                                          FIRMWARE_IMAGE_BASE + i, 0x0000,
 851                                          cache, buflen, timeout);
 852
 853                 ptr += buflen;
 854         }
 855
 856         kfree(cache);
 857
 858         /*
 859          * Send firmware request to device to load firmware,
 860          * we need to specify a long timeout time.
 861          */
 862         status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
 863                                              0x0000, USB_MODE_FIRMWARE,
 864                                              REGISTER_TIMEOUT_FIRMWARE);
 865         if (status < 0) {
 866                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 867                 return status;
 868         }
 869
 870         rt73usb_disable_led(rt2x00dev);
 871
 872         return 0;
 873 }
 874
 875 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
 876 {
 877         u32 reg;
 878
 879         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 880         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
 881         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
 882         rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
 883         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 884
 885         rt73usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
 886         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
 887         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
 888         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
 889         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
 890         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
 891         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
 892         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
 893         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
 894         rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
 895
 896         /*
 897          * CCK TXD BBP registers
 898          */
 899         rt73usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
 900         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
 901         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
 902         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
 903         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
 904         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
 905         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
 906         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
 907         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
 908         rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
 909
 910         /*
 911          * OFDM TXD BBP registers
 912          */
 913         rt73usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
 914         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
 915         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
 916         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
 917         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
 918         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
 919         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
 920         rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
 921
 922         rt73usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
 923         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
 924         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
 925         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
 926         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
 927         rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
 928
 929         rt73usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
 930         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
 931         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
 932         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
 933         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
 934         rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
 935
 936         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
 937
 938         rt73usb_register_read(rt2x00dev, MAC_CSR6, &reg);
 939         rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
 940         rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
 941
 942         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
 943
 944         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
 945                 return -EBUSY;
 946
 947         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
 948
 949         /*
 950          * Invalidate all Shared Keys (SEC_CSR0),
 951          * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
 952          */
 953         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
 954         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
 955         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
 956
 957         reg = 0x000023b0;
 958         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 959             rt2x00_rf(&rt2x00dev->chip, RF2527))
 960                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
 961         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
 962
 963         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
 964         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
 965         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
 966
 967         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
 968         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
 969         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
 970         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
 971
 972         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
 973         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
 974         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
 975         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
 976
 977         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 978         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
 979         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 980
 981         /*
 982          * We must clear the error counters.
 983          * These registers are cleared on read,
 984          * so we may pass a useless variable to store the value.
 985          */
 986         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 987         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 988         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
 989
 990         /*
 991          * Reset MAC and BBP registers.
 992          */
 993         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
 994         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
 995         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
 996         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
 997
 998         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
 999         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1000         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1001         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1002
1003         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1004         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1005         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1006
1007         return 0;
1008 }
1009
1010 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1011 {
1012         unsigned int i;
1013         u16 eeprom;
1014         u8 reg_id;
1015         u8 value;
1016
1017         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1018                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1019                 if ((value != 0xff) && (value != 0x00))
1020                         goto continue_csr_init;
1021                 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
1022                 udelay(REGISTER_BUSY_DELAY);
1023         }
1024
1025         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1026         return -EACCES;
1027
1028 continue_csr_init:
1029         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1030         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1031         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1032         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1033         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1034         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1035         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1036         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1037         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1038         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1039         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1040         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1041         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1042         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1043         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1044         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1045         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1046         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1047         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1048         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1049         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1050         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1051         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1052         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1053         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1054
1055         DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
1056         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1057                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1058
1059                 if (eeprom != 0xffff && eeprom != 0x0000) {
1060                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1061                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1062                         DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
1063                               reg_id, value);
1064                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1065                 }
1066         }
1067         DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
1068
1069         return 0;
1070 }
1071
1072 /*
1073  * Device state switch handlers.
1074  */
1075 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1076                               enum dev_state state)
1077 {
1078         u32 reg;
1079
1080         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1081         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1082                            state == STATE_RADIO_RX_OFF);
1083         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1084 }
1085
1086 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1087 {
1088         /*
1089          * Initialize all registers.
1090          */
1091         if (rt73usb_init_registers(rt2x00dev) ||
1092             rt73usb_init_bbp(rt2x00dev)) {
1093                 ERROR(rt2x00dev, "Register initialization failed.\n");
1094                 return -EIO;
1095         }
1096
1097         rt2x00usb_enable_radio(rt2x00dev);
1098
1099         /*
1100          * Enable LED
1101          */
1102         rt73usb_enable_led(rt2x00dev);
1103
1104         return 0;
1105 }
1106
1107 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1108 {
1109         /*
1110          * Disable LED
1111          */
1112         rt73usb_disable_led(rt2x00dev);
1113
1114         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1115
1116         /*
1117          * Disable synchronisation.
1118          */
1119         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1120
1121         rt2x00usb_disable_radio(rt2x00dev);
1122 }
1123
1124 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1125 {
1126         u32 reg;
1127         unsigned int i;
1128         char put_to_sleep;
1129         char current_state;
1130
1131         put_to_sleep = (state != STATE_AWAKE);
1132
1133         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1134         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1135         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1136         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1137
1138         /*
1139          * Device is not guaranteed to be in the requested state yet.
1140          * We must wait until the register indicates that the
1141          * device has entered the correct state.
1142          */
1143         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1144                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1145                 current_state =
1146                     rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1147                 if (current_state == !put_to_sleep)
1148                         return 0;
1149                 msleep(10);
1150         }
1151
1152         NOTICE(rt2x00dev, "Device failed to enter state %d, "
1153                "current device state %d.\n", !put_to_sleep, current_state);
1154
1155         return -EBUSY;
1156 }
1157
1158 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1159                                     enum dev_state state)
1160 {
1161         int retval = 0;
1162
1163         switch (state) {
1164         case STATE_RADIO_ON:
1165                 retval = rt73usb_enable_radio(rt2x00dev);
1166                 break;
1167         case STATE_RADIO_OFF:
1168                 rt73usb_disable_radio(rt2x00dev);
1169                 break;
1170         case STATE_RADIO_RX_ON:
1171         case STATE_RADIO_RX_OFF:
1172                 rt73usb_toggle_rx(rt2x00dev, state);
1173                 break;
1174         case STATE_DEEP_SLEEP:
1175         case STATE_SLEEP:
1176         case STATE_STANDBY:
1177         case STATE_AWAKE:
1178                 retval = rt73usb_set_state(rt2x00dev, state);
1179                 break;
1180         default:
1181                 retval = -ENOTSUPP;
1182                 break;
1183         }
1184
1185         return retval;
1186 }
1187
1188 /*
1189  * TX descriptor initialization
1190  */
1191 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1192                                   struct data_desc *txd,
1193                                   struct txdata_entry_desc *desc,
1194                                   struct ieee80211_hdr *ieee80211hdr,
1195                                   unsigned int length,
1196                                   struct ieee80211_tx_control *control)
1197 {
1198         u32 word;
1199
1200         /*
1201          * Start writing the descriptor words.
1202          */
1203         rt2x00_desc_read(txd, 1, &word);
1204         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, desc->queue);
1205         rt2x00_set_field32(&word, TXD_W1_AIFSN, desc->aifs);
1206         rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1207         rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1208         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1209         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1210         rt2x00_desc_write(txd, 1, word);
1211
1212         rt2x00_desc_read(txd, 2, &word);
1213         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1214         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1215         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1216         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1217         rt2x00_desc_write(txd, 2, word);
1218
1219         rt2x00_desc_read(txd, 5, &word);
1220         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1221                            TXPOWER_TO_DEV(control->power_level));
1222         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1223         rt2x00_desc_write(txd, 5, word);
1224
1225         rt2x00_desc_read(txd, 0, &word);
1226         rt2x00_set_field32(&word, TXD_W0_BURST,
1227                            test_bit(ENTRY_TXD_BURST, &desc->flags));
1228         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1229         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1230                            test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1231         rt2x00_set_field32(&word, TXD_W0_ACK,
1232                            !(control->flags & IEEE80211_TXCTL_NO_ACK));
1233         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1234                            test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1235         rt2x00_set_field32(&word, TXD_W0_OFDM,
1236                            test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1237         rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1238         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1239                            !!(control->flags &
1240                               IEEE80211_TXCTL_LONG_RETRY_LIMIT));
1241         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1242         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1243         rt2x00_set_field32(&word, TXD_W0_BURST2,
1244                            test_bit(ENTRY_TXD_BURST, &desc->flags));
1245         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1246         rt2x00_desc_write(txd, 0, word);
1247 }
1248
1249 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1250                                    struct sk_buff *skb)
1251 {
1252         int length;
1253
1254         /*
1255          * The length _must_ be a multiple of 4,
1256          * but it must _not_ be a multiple of the USB packet size.
1257          */
1258         length = roundup(skb->len, 4);
1259         length += (4 * !(length % rt2x00dev->usb_maxpacket));
1260
1261         return length;
1262 }
1263
1264 /*
1265  * TX data initialization
1266  */
1267 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1268                                   unsigned int queue)
1269 {
1270         u32 reg;
1271
1272         if (queue != IEEE80211_TX_QUEUE_BEACON)
1273                 return;
1274
1275         /*
1276          * For Wi-Fi faily generated beacons between participating stations.
1277          * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1278          */
1279         rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1280
1281         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1282         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1283                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1284                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1285         }
1286 }
1287
1288 /*
1289  * RX control handlers
1290  */
1291 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1292 {
1293         u16 eeprom;
1294         u8 offset;
1295         u8 lna;
1296
1297         lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1298         switch (lna) {
1299         case 3:
1300                 offset = 90;
1301                 break;
1302         case 2:
1303                 offset = 74;
1304                 break;
1305         case 1:
1306                 offset = 64;
1307                 break;
1308         default:
1309                 return 0;
1310         }
1311
1312         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
1313                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1314                         if (lna == 3 || lna == 2)
1315                                 offset += 10;
1316                 } else {
1317                         if (lna == 3)
1318                                 offset += 6;
1319                         else if (lna == 2)
1320                                 offset += 8;
1321                 }
1322
1323                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1324                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1325         } else {
1326                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1327                         offset += 14;
1328
1329                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1330                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1331         }
1332
1333         return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1334 }
1335
1336 static void rt73usb_fill_rxdone(struct data_entry *entry,
1337                                 struct rxdata_entry_desc *desc)
1338 {
1339         struct data_desc *rxd = (struct data_desc *)entry->skb->data;
1340         u32 word0;
1341         u32 word1;
1342
1343         rt2x00_desc_read(rxd, 0, &word0);
1344         rt2x00_desc_read(rxd, 1, &word1);
1345
1346         desc->flags = 0;
1347         if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1348                 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1349
1350         /*
1351          * Obtain the status about this packet.
1352          */
1353         desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1354         desc->rssi = rt73usb_agc_to_rssi(entry->ring->rt2x00dev, word1);
1355         desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1356         desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1357
1358         /*
1359          * Pull the skb to clear the descriptor area.
1360          */
1361         skb_pull(entry->skb, entry->ring->desc_size);
1362
1363         return;
1364 }
1365
1366 /*
1367  * Device probe functions.
1368  */
1369 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1370 {
1371         u16 word;
1372         u8 *mac;
1373         s8 value;
1374
1375         rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1376
1377         /*
1378          * Start validation of the data that has been read.
1379          */
1380         mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1381         if (!is_valid_ether_addr(mac)) {
1382                 DECLARE_MAC_BUF(macbuf);
1383
1384                 random_ether_addr(mac);
1385                 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1386         }
1387
1388         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1389         if (word == 0xffff) {
1390                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1391                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1392                                    ANTENNA_B);
1393                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1394                                    ANTENNA_B);
1395                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1396                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1397                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1398                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1399                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1400                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1401         }
1402
1403         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1404         if (word == 0xffff) {
1405                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1406                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1407                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1408         }
1409
1410         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1411         if (word == 0xffff) {
1412                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1413                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1414                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1415                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1416                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1417                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1418                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1419                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1420                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1421                                    LED_MODE_DEFAULT);
1422                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1423                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1424         }
1425
1426         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1427         if (word == 0xffff) {
1428                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1429                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1430                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1431                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1432         }
1433
1434         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1435         if (word == 0xffff) {
1436                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1437                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1438                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1439                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1440         } else {
1441                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1442                 if (value < -10 || value > 10)
1443                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1444                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1445                 if (value < -10 || value > 10)
1446                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1447                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1448         }
1449
1450         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1451         if (word == 0xffff) {
1452                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1453                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1454                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1455                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1456         } else {
1457                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1458                 if (value < -10 || value > 10)
1459                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1460                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1461                 if (value < -10 || value > 10)
1462                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1463                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1464         }
1465
1466         return 0;
1467 }
1468
1469 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1470 {
1471         u32 reg;
1472         u16 value;
1473         u16 eeprom;
1474
1475         /*
1476          * Read EEPROM word for configuration.
1477          */
1478         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1479
1480         /*
1481          * Identify RF chipset.
1482          */
1483         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1484         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1485         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1486
1487         if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1488                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1489                 return -ENODEV;
1490         }
1491
1492         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1493             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1494             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1495             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1496                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1497                 return -ENODEV;
1498         }
1499
1500         /*
1501          * Identify default antenna configuration.
1502          */
1503         rt2x00dev->default_ant.tx =
1504             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1505         rt2x00dev->default_ant.rx =
1506             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1507
1508         /*
1509          * Read the Frame type.
1510          */
1511         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1512                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1513
1514         /*
1515          * Read frequency offset.
1516          */
1517         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1518         rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1519
1520         /*
1521          * Read external LNA informations.
1522          */
1523         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1524
1525         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1526                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1527                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1528         }
1529
1530         /*
1531          * Store led settings, for correct led behaviour.
1532          */
1533         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1534
1535         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LED_MODE,
1536                            rt2x00dev->led_mode);
1537         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_0,
1538                            rt2x00_get_field16(eeprom,
1539                                               EEPROM_LED_POLARITY_GPIO_0));
1540         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_1,
1541                            rt2x00_get_field16(eeprom,
1542                                               EEPROM_LED_POLARITY_GPIO_1));
1543         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_2,
1544                            rt2x00_get_field16(eeprom,
1545                                               EEPROM_LED_POLARITY_GPIO_2));
1546         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_3,
1547                            rt2x00_get_field16(eeprom,
1548                                               EEPROM_LED_POLARITY_GPIO_3));
1549         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_4,
1550                            rt2x00_get_field16(eeprom,
1551                                               EEPROM_LED_POLARITY_GPIO_4));
1552         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_ACT,
1553                            rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1554         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_BG,
1555                            rt2x00_get_field16(eeprom,
1556                                               EEPROM_LED_POLARITY_RDY_G));
1557         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_A,
1558                            rt2x00_get_field16(eeprom,
1559                                               EEPROM_LED_POLARITY_RDY_A));
1560
1561         return 0;
1562 }
1563
1564 /*
1565  * RF value list for RF2528
1566  * Supports: 2.4 GHz
1567  */
1568 static const struct rf_channel rf_vals_bg_2528[] = {
1569         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1570         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1571         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1572         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1573         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1574         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1575         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1576         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1577         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1578         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1579         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1580         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1581         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1582         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1583 };
1584
1585 /*
1586  * RF value list for RF5226
1587  * Supports: 2.4 GHz & 5.2 GHz
1588  */
1589 static const struct rf_channel rf_vals_5226[] = {
1590         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1591         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1592         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1593         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1594         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1595         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1596         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1597         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1598         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1599         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1600         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1601         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1602         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1603         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1604
1605         /* 802.11 UNI / HyperLan 2 */
1606         { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1607         { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1608         { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1609         { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1610         { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1611         { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1612         { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1613         { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1614
1615         /* 802.11 HyperLan 2 */
1616         { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1617         { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1618         { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1619         { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1620         { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1621         { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1622         { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1623         { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1624         { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1625         { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1626
1627         /* 802.11 UNII */
1628         { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1629         { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1630         { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1631         { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1632         { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1633         { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1634
1635         /* MMAC(Japan)J52 ch 34,38,42,46 */
1636         { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1637         { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1638         { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1639         { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1640 };
1641
1642 /*
1643  * RF value list for RF5225 & RF2527
1644  * Supports: 2.4 GHz & 5.2 GHz
1645  */
1646 static const struct rf_channel rf_vals_5225_2527[] = {
1647         { 1,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1648         { 2,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1649         { 3,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1650         { 4,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1651         { 5,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1652         { 6,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1653         { 7,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1654         { 8,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1655         { 9,  0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1656         { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1657         { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1658         { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1659         { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1660         { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1661
1662         /* 802.11 UNI / HyperLan 2 */
1663         { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1664         { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1665         { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1666         { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1667         { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1668         { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1669         { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1670         { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1671
1672         /* 802.11 HyperLan 2 */
1673         { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1674         { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1675         { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1676         { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1677         { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1678         { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1679         { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1680         { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1681         { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1682         { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1683
1684         /* 802.11 UNII */
1685         { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1686         { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1687         { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1688         { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1689         { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1690         { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1691
1692         /* MMAC(Japan)J52 ch 34,38,42,46 */
1693         { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1694         { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1695         { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1696         { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1697 };
1698
1699
1700 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1701 {
1702         struct hw_mode_spec *spec = &rt2x00dev->spec;
1703         u8 *txpower;
1704         unsigned int i;
1705
1706         /*
1707          * Initialize all hw fields.
1708          */
1709         rt2x00dev->hw->flags =
1710             IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1711             IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
1712         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1713         rt2x00dev->hw->max_signal = MAX_SIGNAL;
1714         rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1715         rt2x00dev->hw->queues = 5;
1716
1717         SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1718         SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1719                                 rt2x00_eeprom_addr(rt2x00dev,
1720                                                    EEPROM_MAC_ADDR_0));
1721
1722         /*
1723          * Convert tx_power array in eeprom.
1724          */
1725         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1726         for (i = 0; i < 14; i++)
1727                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1728
1729         /*
1730          * Initialize hw_mode information.
1731          */
1732         spec->num_modes = 2;
1733         spec->num_rates = 12;
1734         spec->tx_power_a = NULL;
1735         spec->tx_power_bg = txpower;
1736         spec->tx_power_default = DEFAULT_TXPOWER;
1737
1738         if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1739                 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1740                 spec->channels = rf_vals_bg_2528;
1741         } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1742                 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1743                 spec->channels = rf_vals_5226;
1744         } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1745                 spec->num_channels = 14;
1746                 spec->channels = rf_vals_5225_2527;
1747         } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1748                 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1749                 spec->channels = rf_vals_5225_2527;
1750         }
1751
1752         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1753             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1754                 spec->num_modes = 3;
1755
1756                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1757                 for (i = 0; i < 14; i++)
1758                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1759
1760                 spec->tx_power_a = txpower;
1761         }
1762 }
1763
1764 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1765 {
1766         int retval;
1767
1768         /*
1769          * Allocate eeprom data.
1770          */
1771         retval = rt73usb_validate_eeprom(rt2x00dev);
1772         if (retval)
1773                 return retval;
1774
1775         retval = rt73usb_init_eeprom(rt2x00dev);
1776         if (retval)
1777                 return retval;
1778
1779         /*
1780          * Initialize hw specifications.
1781          */
1782         rt73usb_probe_hw_mode(rt2x00dev);
1783
1784         /*
1785          * This device requires firmware
1786          */
1787         __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1788
1789         /*
1790          * Set the rssi offset.
1791          */
1792         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1793
1794         return 0;
1795 }
1796
1797 /*
1798  * IEEE80211 stack callback functions.
1799  */
1800 static void rt73usb_configure_filter(struct ieee80211_hw *hw,
1801                                      unsigned int changed_flags,
1802                                      unsigned int *total_flags,
1803                                      int mc_count,
1804                                      struct dev_addr_list *mc_list)
1805 {
1806         struct rt2x00_dev *rt2x00dev = hw->priv;
1807         struct interface *intf = &rt2x00dev->interface;
1808         u32 reg;
1809
1810         /*
1811          * Mask off any flags we are going to ignore from
1812          * the total_flags field.
1813          */
1814         *total_flags &=
1815             FIF_ALLMULTI |
1816             FIF_FCSFAIL |
1817             FIF_PLCPFAIL |
1818             FIF_CONTROL |
1819             FIF_OTHER_BSS |
1820             FIF_PROMISC_IN_BSS;
1821
1822         /*
1823          * Apply some rules to the filters:
1824          * - Some filters imply different filters to be set.
1825          * - Some things we can't filter out at all.
1826          * - Some filters are set based on interface type.
1827          */
1828         if (mc_count)
1829                 *total_flags |= FIF_ALLMULTI;
1830         if (*total_flags & FIF_OTHER_BSS ||
1831             *total_flags & FIF_PROMISC_IN_BSS)
1832                 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1833         if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
1834                 *total_flags |= FIF_PROMISC_IN_BSS;
1835
1836         /*
1837          * Check if there is any work left for us.
1838          */
1839         if (intf->filter == *total_flags)
1840                 return;
1841         intf->filter = *total_flags;
1842
1843         /*
1844          * When in atomic context, reschedule and let rt2x00lib
1845          * call this function again.
1846          */
1847         if (in_atomic()) {
1848                 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1849                 return;
1850         }
1851
1852         /*
1853          * Start configuration steps.
1854          * Note that the version error will always be dropped
1855          * and broadcast frames will always be accepted since
1856          * there is no filter for it at this time.
1857          */
1858         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1859         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
1860                            !(*total_flags & FIF_FCSFAIL));
1861         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
1862                            !(*total_flags & FIF_PLCPFAIL));
1863         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
1864                            !(*total_flags & FIF_CONTROL));
1865         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
1866                            !(*total_flags & FIF_PROMISC_IN_BSS));
1867         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
1868                            !(*total_flags & FIF_PROMISC_IN_BSS));
1869         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
1870         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
1871                            !(*total_flags & FIF_ALLMULTI));
1872         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
1873         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS, 1);
1874         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1875 }
1876
1877 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1878                                    u32 short_retry, u32 long_retry)
1879 {
1880         struct rt2x00_dev *rt2x00dev = hw->priv;
1881         u32 reg;
1882
1883         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1884         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1885         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1886         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1887
1888         return 0;
1889 }
1890
1891 #if 0
1892 /*
1893  * Mac80211 demands get_tsf must be atomic.
1894  * This is not possible for rt73usb since all register access
1895  * functions require sleeping. Untill mac80211 no longer needs
1896  * get_tsf to be atomic, this function should be disabled.
1897  */
1898 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1899 {
1900         struct rt2x00_dev *rt2x00dev = hw->priv;
1901         u64 tsf;
1902         u32 reg;
1903
1904         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1905         tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1906         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1907         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1908
1909         return tsf;
1910 }
1911 #else
1912 #define rt73usb_get_tsf NULL
1913 #endif
1914
1915 static void rt73usb_reset_tsf(struct ieee80211_hw *hw)
1916 {
1917         struct rt2x00_dev *rt2x00dev = hw->priv;
1918
1919         rt73usb_register_write(rt2x00dev, TXRX_CSR12, 0);
1920         rt73usb_register_write(rt2x00dev, TXRX_CSR13, 0);
1921 }
1922
1923 static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
1924                           struct ieee80211_tx_control *control)
1925 {
1926         struct rt2x00_dev *rt2x00dev = hw->priv;
1927         int timeout;
1928
1929         /*
1930          * Just in case the ieee80211 doesn't set this,
1931          * but we need this queue set for the descriptor
1932          * initialization.
1933          */
1934         control->queue = IEEE80211_TX_QUEUE_BEACON;
1935
1936         /*
1937          * First we create the beacon.
1938          */
1939         skb_push(skb, TXD_DESC_SIZE);
1940         memset(skb->data, 0, TXD_DESC_SIZE);
1941
1942         rt2x00lib_write_tx_desc(rt2x00dev, (struct data_desc *)skb->data,
1943                                 (struct ieee80211_hdr *)(skb->data +
1944                                                          TXD_DESC_SIZE),
1945                                 skb->len - TXD_DESC_SIZE, control);
1946
1947         /*
1948          * Write entire beacon with descriptor to register,
1949          * and kick the beacon generator.
1950          */
1951         timeout = REGISTER_TIMEOUT * (skb->len / sizeof(u32));
1952         rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
1953                                  USB_VENDOR_REQUEST_OUT,
1954                                  HW_BEACON_BASE0, 0x0000,
1955                                  skb->data, skb->len, timeout);
1956         rt73usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1957
1958         return 0;
1959 }
1960
1961 static const struct ieee80211_ops rt73usb_mac80211_ops = {
1962         .tx                     = rt2x00mac_tx,
1963         .start                  = rt2x00mac_start,
1964         .stop                   = rt2x00mac_stop,
1965         .add_interface          = rt2x00mac_add_interface,
1966         .remove_interface       = rt2x00mac_remove_interface,
1967         .config                 = rt2x00mac_config,
1968         .config_interface       = rt2x00mac_config_interface,
1969         .configure_filter       = rt73usb_configure_filter,
1970         .get_stats              = rt2x00mac_get_stats,
1971         .set_retry_limit        = rt73usb_set_retry_limit,
1972         .erp_ie_changed         = rt2x00mac_erp_ie_changed,
1973         .conf_tx                = rt2x00mac_conf_tx,
1974         .get_tx_stats           = rt2x00mac_get_tx_stats,
1975         .get_tsf                = rt73usb_get_tsf,
1976         .reset_tsf              = rt73usb_reset_tsf,
1977         .beacon_update          = rt73usb_beacon_update,
1978 };
1979
1980 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
1981         .probe_hw               = rt73usb_probe_hw,
1982         .get_firmware_name      = rt73usb_get_firmware_name,
1983         .load_firmware          = rt73usb_load_firmware,
1984         .initialize             = rt2x00usb_initialize,
1985         .uninitialize           = rt2x00usb_uninitialize,
1986         .set_device_state       = rt73usb_set_device_state,
1987         .link_stats             = rt73usb_link_stats,
1988         .reset_tuner            = rt73usb_reset_tuner,
1989         .link_tuner             = rt73usb_link_tuner,
1990         .write_tx_desc          = rt73usb_write_tx_desc,
1991         .write_tx_data          = rt2x00usb_write_tx_data,
1992         .get_tx_data_len        = rt73usb_get_tx_data_len,
1993         .kick_tx_queue          = rt73usb_kick_tx_queue,
1994         .fill_rxdone            = rt73usb_fill_rxdone,
1995         .config_mac_addr        = rt73usb_config_mac_addr,
1996         .config_bssid           = rt73usb_config_bssid,
1997         .config_type            = rt73usb_config_type,
1998         .config_preamble        = rt73usb_config_preamble,
1999         .config                 = rt73usb_config,
2000 };
2001
2002 static const struct rt2x00_ops rt73usb_ops = {
2003         .name           = DRV_NAME,
2004         .rxd_size       = RXD_DESC_SIZE,
2005         .txd_size       = TXD_DESC_SIZE,
2006         .eeprom_size    = EEPROM_SIZE,
2007         .rf_size        = RF_SIZE,
2008         .lib            = &rt73usb_rt2x00_ops,
2009         .hw             = &rt73usb_mac80211_ops,
2010 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2011         .debugfs        = &rt73usb_rt2x00debug,
2012 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2013 };
2014
2015 /*
2016  * rt73usb module information.
2017  */
2018 static struct usb_device_id rt73usb_device_table[] = {
2019         /* AboCom */
2020         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2021         /* Askey */
2022         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2023         /* ASUS */
2024         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2025         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2026         /* Belkin */
2027         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2028         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2029         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2030         { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2031         /* Billionton */
2032         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2033         /* Buffalo */
2034         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2035         /* CNet */
2036         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2037         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2038         /* Conceptronic */
2039         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2040         /* D-Link */
2041         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2042         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2043         /* Gemtek */
2044         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2045         /* Gigabyte */
2046         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2047         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2048         /* Huawei-3Com */
2049         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2050         /* Hercules */
2051         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2052         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2053         /* Linksys */
2054         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2055         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2056         /* MSI */
2057         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2058         { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2059         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2060         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2061         /* Ralink */
2062         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2063         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2064         /* Qcom */
2065         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2066         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2067         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2068         /* Senao */
2069         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2070         /* Sitecom */
2071         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2072         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2073         /* Surecom */
2074         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2075         /* Planex */
2076         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2077         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2078         { 0, }
2079 };
2080
2081 MODULE_AUTHOR(DRV_PROJECT);
2082 MODULE_VERSION(DRV_VERSION);
2083 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2084 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2085 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2086 MODULE_FIRMWARE(FIRMWARE_RT2571);
2087 MODULE_LICENSE("GPL");
2088
2089 static struct usb_driver rt73usb_driver = {
2090         .name           = DRV_NAME,
2091         .id_table       = rt73usb_device_table,
2092         .probe          = rt2x00usb_probe,
2093         .disconnect     = rt2x00usb_disconnect,
2094         .suspend        = rt2x00usb_suspend,
2095         .resume         = rt2x00usb_resume,
2096 };
2097
2098 static int __init rt73usb_init(void)
2099 {
2100         return usb_register(&rt73usb_driver);
2101 }
2102
2103 static void __exit rt73usb_exit(void)
2104 {
2105         usb_deregister(&rt73usb_driver);
2106 }
2107
2108 module_init(rt73usb_init);
2109 module_exit(rt73usb_exit);