2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 Abstract: rt2x00 generic register information.
44 ANTENNA_SW_DIVERSITY = 0,
47 ANTENNA_HW_DIVERSITY = 3,
55 LED_MODE_TXRX_ACTIVITY = 1,
56 LED_MODE_SIGNAL_STRENGTH = 2,
71 * Additional device states, these values are
72 * not strict since they are not directly passed
94 * Cipher types for hardware encryption
103 * The following fields were added by rt61pci and rt73usb.
107 CIPHER_TKIP_NO_MIC = 7,
112 * We store the position of a register field inside a field structure,
113 * This will simplify the process of setting and reading a certain field
114 * inside the register while making sure the process remains byte order safe.
116 struct rt2x00_field8 {
121 struct rt2x00_field16 {
126 struct rt2x00_field32 {
132 * Power of two check, this will check
133 * if the mask that has been given contains
134 * and contiguous set of bits.
136 #define is_power_of_two(x) ( !((x) & ((x)-1)) )
137 #define low_bit_mask(x) ( ((x)-1) & ~(x) )
138 #define is_valid_mask(x) is_power_of_two(1 + (x) + low_bit_mask(x))
140 #define FIELD8(__mask) \
142 BUILD_BUG_ON(!(__mask) || \
143 !is_valid_mask(__mask) || \
144 (__mask) != (u8)(__mask)); \
145 (struct rt2x00_field8) { \
146 __ffs(__mask), (__mask) \
150 #define FIELD16(__mask) \
152 BUILD_BUG_ON(!(__mask) || \
153 !is_valid_mask(__mask) || \
154 (__mask) != (u16)(__mask));\
155 (struct rt2x00_field16) { \
156 __ffs(__mask), (__mask) \
160 #define FIELD32(__mask) \
162 BUILD_BUG_ON(!(__mask) || \
163 !is_valid_mask(__mask) || \
164 (__mask) != (u32)(__mask));\
165 (struct rt2x00_field32) { \
166 __ffs(__mask), (__mask) \
170 static inline void rt2x00_set_field32(u32 *reg,
171 const struct rt2x00_field32 field,
174 *reg &= ~(field.bit_mask);
175 *reg |= (value << field.bit_offset) & field.bit_mask;
178 static inline u32 rt2x00_get_field32(const u32 reg,
179 const struct rt2x00_field32 field)
181 return (reg & field.bit_mask) >> field.bit_offset;
184 static inline void rt2x00_set_field16(u16 *reg,
185 const struct rt2x00_field16 field,
188 *reg &= ~(field.bit_mask);
189 *reg |= (value << field.bit_offset) & field.bit_mask;
192 static inline u16 rt2x00_get_field16(const u16 reg,
193 const struct rt2x00_field16 field)
195 return (reg & field.bit_mask) >> field.bit_offset;
198 static inline void rt2x00_set_field8(u8 *reg,
199 const struct rt2x00_field8 field,
202 *reg &= ~(field.bit_mask);
203 *reg |= (value << field.bit_offset) & field.bit_mask;
206 static inline u8 rt2x00_get_field8(const u8 reg,
207 const struct rt2x00_field8 field)
209 return (reg & field.bit_mask) >> field.bit_offset;
213 * Device specific rate value.
214 * We will have to create the device specific rate value
215 * passed to the ieee80211 kernel. We need to make it a consist of
216 * multiple fields because we want to store more then 1 device specific
217 * values inside the value.
218 * 1 - rate, stored as 100 kbit/s.
219 * 2 - preamble, short_preamble enabled flag.
220 * 3 - MASK_RATE, which rates are enabled in this mode, this mask
221 * corresponds with the TX register format for the current device.
222 * 4 - plcp, 802.11b rates are device specific,
223 * 802.11g rates are set according to the ieee802.11a-1999 p.14.
224 * The bit to enable preamble is set in a seperate define.
226 #define DEV_RATE FIELD32(0x000007ff)
227 #define DEV_PREAMBLE FIELD32(0x00000800)
228 #define DEV_RATEMASK FIELD32(0x00fff000)
229 #define DEV_PLCP FIELD32(0xff000000)
234 #define DEV_RATEBIT_1MB ( 1 << 0 )
235 #define DEV_RATEBIT_2MB ( 1 << 1 )
236 #define DEV_RATEBIT_5_5MB ( 1 << 2 )
237 #define DEV_RATEBIT_11MB ( 1 << 3 )
238 #define DEV_RATEBIT_6MB ( 1 << 4 )
239 #define DEV_RATEBIT_9MB ( 1 << 5 )
240 #define DEV_RATEBIT_12MB ( 1 << 6 )
241 #define DEV_RATEBIT_18MB ( 1 << 7 )
242 #define DEV_RATEBIT_24MB ( 1 << 8 )
243 #define DEV_RATEBIT_36MB ( 1 << 9 )
244 #define DEV_RATEBIT_48MB ( 1 << 10 )
245 #define DEV_RATEBIT_54MB ( 1 << 11 )
248 * Bitmasks for DEV_RATEMASK
250 #define DEV_RATEMASK_1MB ( (DEV_RATEBIT_1MB << 1) -1 )
251 #define DEV_RATEMASK_2MB ( (DEV_RATEBIT_2MB << 1) -1 )
252 #define DEV_RATEMASK_5_5MB ( (DEV_RATEBIT_5_5MB << 1) -1 )
253 #define DEV_RATEMASK_11MB ( (DEV_RATEBIT_11MB << 1) -1 )
254 #define DEV_RATEMASK_6MB ( (DEV_RATEBIT_6MB << 1) -1 )
255 #define DEV_RATEMASK_9MB ( (DEV_RATEBIT_9MB << 1) -1 )
256 #define DEV_RATEMASK_12MB ( (DEV_RATEBIT_12MB << 1) -1 )
257 #define DEV_RATEMASK_18MB ( (DEV_RATEBIT_18MB << 1) -1 )
258 #define DEV_RATEMASK_24MB ( (DEV_RATEBIT_24MB << 1) -1 )
259 #define DEV_RATEMASK_36MB ( (DEV_RATEBIT_36MB << 1) -1 )
260 #define DEV_RATEMASK_48MB ( (DEV_RATEBIT_48MB << 1) -1 )
261 #define DEV_RATEMASK_54MB ( (DEV_RATEBIT_54MB << 1) -1 )
264 * Bitmask groups of bitrates
266 #define DEV_BASIC_RATEMASK \
267 ( DEV_RATEMASK_11MB | \
268 DEV_RATEBIT_6MB | DEV_RATEBIT_12MB | DEV_RATEBIT_24MB )
270 #define DEV_CCK_RATEMASK ( DEV_RATEMASK_11MB )
271 #define DEV_OFDM_RATEMASK ( DEV_RATEMASK_54MB & ~DEV_CCK_RATEMASK )
274 * Macro's to set and get specific fields from the device specific val and val2
275 * fields inside the ieee80211_rate entry.
277 #define DEVICE_SET_RATE_FIELD(__value, __mask) \
278 (int)( ((__value) << DEV_##__mask.bit_offset) & DEV_##__mask.bit_mask )
280 #define DEVICE_GET_RATE_FIELD(__value, __mask) \
281 (int)( ((__value) & DEV_##__mask.bit_mask) >> DEV_##__mask.bit_offset )
283 #endif /* RT2X00REG_H */