1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Realtek Corporation
10 enum rtw89_fw_dl_status {
11 RTW89_FWDL_INITIAL_STATE = 0,
12 RTW89_FWDL_FWDL_ONGOING = 1,
13 RTW89_FWDL_CHECKSUM_FAIL = 2,
14 RTW89_FWDL_SECURITY_FAIL = 3,
15 RTW89_FWDL_CV_NOT_MATCH = 4,
17 RTW89_FWDL_WCPU_FWDL_RDY = 6,
18 RTW89_FWDL_WCPU_FW_INIT_RDY = 7
21 #define RTW89_GET_C2H_HDR_FUNC(info) \
22 u32_get_bits(info, GENMASK(6, 0))
23 #define RTW89_GET_C2H_HDR_LEN(info) \
24 u32_get_bits(info, GENMASK(11, 8))
26 #define RTW89_SET_H2CREG_HDR_FUNC(info, val) \
27 u32p_replace_bits(info, val, GENMASK(6, 0))
28 #define RTW89_SET_H2CREG_HDR_LEN(info, val) \
29 u32p_replace_bits(info, val, GENMASK(11, 8))
31 #define RTW89_H2CREG_MAX 4
32 #define RTW89_C2HREG_MAX 4
33 #define RTW89_C2HREG_HDR_LEN 2
34 #define RTW89_H2CREG_HDR_LEN 2
35 #define RTW89_C2H_TIMEOUT 1000000
36 struct rtw89_mac_c2h_info {
39 u32 c2hreg[RTW89_C2HREG_MAX];
42 struct rtw89_mac_h2c_info {
45 u32 h2creg[RTW89_H2CREG_MAX];
48 enum rtw89_mac_h2c_type {
49 RTW89_FWCMD_H2CREG_FUNC_H2CREG_LB = 0,
50 RTW89_FWCMD_H2CREG_FUNC_CNSL_CMD,
51 RTW89_FWCMD_H2CREG_FUNC_FWERR,
52 RTW89_FWCMD_H2CREG_FUNC_GET_FEATURE,
53 RTW89_FWCMD_H2CREG_FUNC_GETPKT_INFORM,
54 RTW89_FWCMD_H2CREG_FUNC_SCH_TX_EN
57 enum rtw89_mac_c2h_type {
58 RTW89_FWCMD_C2HREG_FUNC_C2HREG_LB = 0,
59 RTW89_FWCMD_C2HREG_FUNC_ERR_RPT,
60 RTW89_FWCMD_C2HREG_FUNC_ERR_MSG,
61 RTW89_FWCMD_C2HREG_FUNC_PHY_CAP,
62 RTW89_FWCMD_C2HREG_FUNC_TX_PAUSE_RPT,
63 RTW89_FWCMD_C2HREG_FUNC_NULL = 0xFF
66 #define RTW89_GET_C2H_PHYCAP_FUNC(info) \
67 u32_get_bits(*((const u32 *)(info)), GENMASK(6, 0))
68 #define RTW89_GET_C2H_PHYCAP_ACK(info) \
69 u32_get_bits(*((const u32 *)(info)), BIT(7))
70 #define RTW89_GET_C2H_PHYCAP_LEN(info) \
71 u32_get_bits(*((const u32 *)(info)), GENMASK(11, 8))
72 #define RTW89_GET_C2H_PHYCAP_SEQ(info) \
73 u32_get_bits(*((const u32 *)(info)), GENMASK(15, 12))
74 #define RTW89_GET_C2H_PHYCAP_RX_NSS(info) \
75 u32_get_bits(*((const u32 *)(info)), GENMASK(23, 16))
76 #define RTW89_GET_C2H_PHYCAP_BW(info) \
77 u32_get_bits(*((const u32 *)(info)), GENMASK(31, 24))
78 #define RTW89_GET_C2H_PHYCAP_TX_NSS(info) \
79 u32_get_bits(*((const u32 *)(info) + 1), GENMASK(7, 0))
80 #define RTW89_GET_C2H_PHYCAP_PROT(info) \
81 u32_get_bits(*((const u32 *)(info) + 1), GENMASK(15, 8))
82 #define RTW89_GET_C2H_PHYCAP_NIC(info) \
83 u32_get_bits(*((const u32 *)(info) + 1), GENMASK(23, 16))
84 #define RTW89_GET_C2H_PHYCAP_WL_FUNC(info) \
85 u32_get_bits(*((const u32 *)(info) + 1), GENMASK(31, 24))
86 #define RTW89_GET_C2H_PHYCAP_HW_TYPE(info) \
87 u32_get_bits(*((const u32 *)(info) + 2), GENMASK(7, 0))
88 #define RTW89_GET_C2H_PHYCAP_ANT_TX_NUM(info) \
89 u32_get_bits(*((const u32 *)(info) + 3), GENMASK(15, 8))
90 #define RTW89_GET_C2H_PHYCAP_ANT_RX_NUM(info) \
91 u32_get_bits(*((const u32 *)(info) + 3), GENMASK(23, 16))
93 enum rtw89_fw_c2h_category {
99 enum rtw89_fw_log_level {
100 RTW89_FW_LOG_LEVEL_OFF,
101 RTW89_FW_LOG_LEVEL_CRT,
102 RTW89_FW_LOG_LEVEL_SER,
103 RTW89_FW_LOG_LEVEL_WARN,
104 RTW89_FW_LOG_LEVEL_LOUD,
105 RTW89_FW_LOG_LEVEL_TR,
108 enum rtw89_fw_log_path {
109 RTW89_FW_LOG_LEVEL_UART,
110 RTW89_FW_LOG_LEVEL_C2H,
111 RTW89_FW_LOG_LEVEL_SNI,
114 enum rtw89_fw_log_comp {
115 RTW89_FW_LOG_COMP_VER,
116 RTW89_FW_LOG_COMP_INIT,
117 RTW89_FW_LOG_COMP_TASK,
118 RTW89_FW_LOG_COMP_CNS,
119 RTW89_FW_LOG_COMP_H2C,
120 RTW89_FW_LOG_COMP_C2H,
121 RTW89_FW_LOG_COMP_TX,
122 RTW89_FW_LOG_COMP_RX,
123 RTW89_FW_LOG_COMP_IPSEC,
124 RTW89_FW_LOG_COMP_TIMER,
125 RTW89_FW_LOG_COMP_DBGPKT,
126 RTW89_FW_LOG_COMP_PS,
127 RTW89_FW_LOG_COMP_ERROR,
128 RTW89_FW_LOG_COMP_WOWLAN,
129 RTW89_FW_LOG_COMP_SECURE_BOOT,
130 RTW89_FW_LOG_COMP_BTC,
131 RTW89_FW_LOG_COMP_BB,
132 RTW89_FW_LOG_COMP_TWT,
133 RTW89_FW_LOG_COMP_RF,
134 RTW89_FW_LOG_COMP_MCC = 20,
137 enum rtw89_pkt_offload_op {
138 RTW89_PKT_OFLD_OP_ADD,
139 RTW89_PKT_OFLD_OP_DEL,
140 RTW89_PKT_OFLD_OP_READ,
143 enum rtw89_scanofld_notify_reason {
144 RTW89_SCAN_DWELL_NOTIFY,
145 RTW89_SCAN_PRE_TX_NOTIFY,
146 RTW89_SCAN_POST_TX_NOTIFY,
147 RTW89_SCAN_ENTER_CH_NOTIFY,
148 RTW89_SCAN_LEAVE_CH_NOTIFY,
149 RTW89_SCAN_END_SCAN_NOTIFY,
152 enum rtw89_chan_type {
153 RTW89_CHAN_OPERATE = 0,
158 enum rtw89_p2pps_action {
159 RTW89_P2P_ACT_INIT = 0,
160 RTW89_P2P_ACT_UPDATE = 1,
161 RTW89_P2P_ACT_REMOVE = 2,
162 RTW89_P2P_ACT_TERMINATE = 3,
165 enum rtw89_bcn_fltr_offload_mode {
166 RTW89_BCN_FLTR_OFFLOAD_MODE_0 = 0,
167 RTW89_BCN_FLTR_OFFLOAD_MODE_1,
168 RTW89_BCN_FLTR_OFFLOAD_MODE_2,
169 RTW89_BCN_FLTR_OFFLOAD_MODE_3,
171 RTW89_BCN_FLTR_OFFLOAD_MODE_DEFAULT = RTW89_BCN_FLTR_OFFLOAD_MODE_0,
174 enum rtw89_bcn_fltr_type {
175 RTW89_BCN_FLTR_BEACON_LOSS,
177 RTW89_BCN_FLTR_NOTIFY,
180 enum rtw89_bcn_fltr_rssi_event {
181 RTW89_BCN_FLTR_RSSI_NOT_CHANGED,
182 RTW89_BCN_FLTR_RSSI_HIGH,
183 RTW89_BCN_FLTR_RSSI_LOW,
186 #define FWDL_SECTION_MAX_NUM 10
187 #define FWDL_SECTION_CHKSUM_LEN 8
188 #define FWDL_SECTION_PER_PKT_LEN 2020
190 struct rtw89_fw_hdr_section_info {
199 struct rtw89_fw_bin_info {
204 struct rtw89_fw_hdr_section_info section_info[FWDL_SECTION_MAX_NUM];
207 struct rtw89_fw_macid_pause_grp {
212 struct rtw89_h2creg_sch_tx_en {
223 #define RTW89_H2C_MAX_SIZE 2048
224 #define RTW89_CHANNEL_TIME 45
225 #define RTW89_CHANNEL_TIME_6G 20
226 #define RTW89_DFS_CHAN_TIME 105
227 #define RTW89_OFF_CHAN_TIME 100
228 #define RTW89_DWELL_TIME 20
229 #define RTW89_DWELL_TIME_6G 10
230 #define RTW89_SCAN_WIDTH 0
231 #define RTW89_SCANOFLD_MAX_SSID 8
232 #define RTW89_SCANOFLD_MAX_IE_LEN 512
233 #define RTW89_SCANOFLD_PKT_NONE 0xFF
234 #define RTW89_SCANOFLD_DEBUG_MASK 0x1F
235 #define RTW89_MAC_CHINFO_SIZE 24
236 #define RTW89_SCAN_LIST_GUARD 4
237 #define RTW89_SCAN_LIST_LIMIT \
238 ((RTW89_H2C_MAX_SIZE / RTW89_MAC_CHINFO_SIZE) - RTW89_SCAN_LIST_GUARD)
240 #define RTW89_BCN_LOSS_CNT 10
242 struct rtw89_mac_chinfo {
259 u8 pkt_id[RTW89_SCANOFLD_MAX_SSID];
262 struct list_head list;
266 struct rtw89_scan_option {
271 struct rtw89_pktofld_info {
272 struct list_head list;
275 /* Below fields are for 6 GHz RNR use only */
276 u8 ssid[IEEE80211_MAX_SSID_LEN];
282 static inline void RTW89_SET_FWCMD_RA_IS_DIS(void *cmd, u32 val)
284 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(0));
287 static inline void RTW89_SET_FWCMD_RA_MODE(void *cmd, u32 val)
289 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(5, 1));
292 static inline void RTW89_SET_FWCMD_RA_BW_CAP(void *cmd, u32 val)
294 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(7, 6));
297 static inline void RTW89_SET_FWCMD_RA_MACID(void *cmd, u32 val)
299 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(15, 8));
302 static inline void RTW89_SET_FWCMD_RA_DCM(void *cmd, u32 val)
304 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(16));
307 static inline void RTW89_SET_FWCMD_RA_ER(void *cmd, u32 val)
309 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(17));
312 static inline void RTW89_SET_FWCMD_RA_INIT_RATE_LV(void *cmd, u32 val)
314 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(19, 18));
317 static inline void RTW89_SET_FWCMD_RA_UPD_ALL(void *cmd, u32 val)
319 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(20));
322 static inline void RTW89_SET_FWCMD_RA_SGI(void *cmd, u32 val)
324 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(21));
327 static inline void RTW89_SET_FWCMD_RA_LDPC(void *cmd, u32 val)
329 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(22));
332 static inline void RTW89_SET_FWCMD_RA_STBC(void *cmd, u32 val)
334 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(23));
337 static inline void RTW89_SET_FWCMD_RA_SS_NUM(void *cmd, u32 val)
339 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(26, 24));
342 static inline void RTW89_SET_FWCMD_RA_GILTF(void *cmd, u32 val)
344 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(29, 27));
347 static inline void RTW89_SET_FWCMD_RA_UPD_BW_NSS_MASK(void *cmd, u32 val)
349 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(30));
352 static inline void RTW89_SET_FWCMD_RA_UPD_MASK(void *cmd, u32 val)
354 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(31));
357 static inline void RTW89_SET_FWCMD_RA_MASK_0(void *cmd, u32 val)
359 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(7, 0));
362 static inline void RTW89_SET_FWCMD_RA_MASK_1(void *cmd, u32 val)
364 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(15, 8));
367 static inline void RTW89_SET_FWCMD_RA_MASK_2(void *cmd, u32 val)
369 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(23, 16));
372 static inline void RTW89_SET_FWCMD_RA_MASK_3(void *cmd, u32 val)
374 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(31, 24));
377 static inline void RTW89_SET_FWCMD_RA_MASK_4(void *cmd, u32 val)
379 le32p_replace_bits((__le32 *)(cmd) + 0x02, val, GENMASK(7, 0));
382 static inline void RTW89_SET_FWCMD_RA_BFEE_CSI_CTL(void *cmd, u32 val)
384 le32p_replace_bits((__le32 *)(cmd) + 0x02, val, BIT(31));
387 static inline void RTW89_SET_FWCMD_RA_BAND_NUM(void *cmd, u32 val)
389 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(7, 0));
392 static inline void RTW89_SET_FWCMD_RA_RA_CSI_RATE_EN(void *cmd, u32 val)
394 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(8));
397 static inline void RTW89_SET_FWCMD_RA_FIXED_CSI_RATE_EN(void *cmd, u32 val)
399 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(9));
402 static inline void RTW89_SET_FWCMD_RA_CR_TBL_SEL(void *cmd, u32 val)
404 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(10));
407 static inline void RTW89_SET_FWCMD_RA_FIX_GILTF_EN(void *cmd, u32 val)
409 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(11));
412 static inline void RTW89_SET_FWCMD_RA_FIX_GILTF(void *cmd, u32 val)
414 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(14, 12));
417 static inline void RTW89_SET_FWCMD_RA_FIXED_CSI_MCS_SS_IDX(void *cmd, u32 val)
419 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(23, 16));
422 static inline void RTW89_SET_FWCMD_RA_FIXED_CSI_MODE(void *cmd, u32 val)
424 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(25, 24));
427 static inline void RTW89_SET_FWCMD_RA_FIXED_CSI_GI_LTF(void *cmd, u32 val)
429 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(28, 26));
432 static inline void RTW89_SET_FWCMD_RA_FIXED_CSI_BW(void *cmd, u32 val)
434 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(31, 29));
437 static inline void RTW89_SET_FWCMD_SEC_IDX(void *cmd, u32 val)
439 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(7, 0));
442 static inline void RTW89_SET_FWCMD_SEC_OFFSET(void *cmd, u32 val)
444 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(15, 8));
447 static inline void RTW89_SET_FWCMD_SEC_LEN(void *cmd, u32 val)
449 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(23, 16));
452 static inline void RTW89_SET_FWCMD_SEC_TYPE(void *cmd, u32 val)
454 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(3, 0));
457 static inline void RTW89_SET_FWCMD_SEC_EXT_KEY(void *cmd, u32 val)
459 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, BIT(4));
462 static inline void RTW89_SET_FWCMD_SEC_SPP_MODE(void *cmd, u32 val)
464 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, BIT(5));
467 static inline void RTW89_SET_FWCMD_SEC_KEY0(void *cmd, u32 val)
469 le32p_replace_bits((__le32 *)(cmd) + 0x02, val, GENMASK(31, 0));
472 static inline void RTW89_SET_FWCMD_SEC_KEY1(void *cmd, u32 val)
474 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(31, 0));
477 static inline void RTW89_SET_FWCMD_SEC_KEY2(void *cmd, u32 val)
479 le32p_replace_bits((__le32 *)(cmd) + 0x04, val, GENMASK(31, 0));
482 static inline void RTW89_SET_FWCMD_SEC_KEY3(void *cmd, u32 val)
484 le32p_replace_bits((__le32 *)(cmd) + 0x05, val, GENMASK(31, 0));
487 static inline void RTW89_SET_EDCA_SEL(void *cmd, u32 val)
489 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(1, 0));
492 static inline void RTW89_SET_EDCA_BAND(void *cmd, u32 val)
494 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(3));
497 static inline void RTW89_SET_EDCA_WMM(void *cmd, u32 val)
499 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(4));
502 static inline void RTW89_SET_EDCA_AC(void *cmd, u32 val)
504 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(6, 5));
507 static inline void RTW89_SET_EDCA_PARAM(void *cmd, u32 val)
509 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(31, 0));
511 #define FW_EDCA_PARAM_TXOPLMT_MSK GENMASK(26, 16)
512 #define FW_EDCA_PARAM_CWMAX_MSK GENMASK(15, 12)
513 #define FW_EDCA_PARAM_CWMIN_MSK GENMASK(11, 8)
514 #define FW_EDCA_PARAM_AIFS_MSK GENMASK(7, 0)
516 #define FWDL_SECURITY_SECTION_TYPE 9
517 #define FWDL_SECURITY_SIGLEN 512
519 #define GET_FWSECTION_HDR_DL_ADDR(fwhdr) \
520 le32_get_bits(*((const __le32 *)(fwhdr)), GENMASK(31, 0))
521 #define GET_FWSECTION_HDR_SECTIONTYPE(fwhdr) \
522 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(27, 24))
523 #define GET_FWSECTION_HDR_SEC_SIZE(fwhdr) \
524 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(23, 0))
525 #define GET_FWSECTION_HDR_CHECKSUM(fwhdr) \
526 le32_get_bits(*((const __le32 *)(fwhdr) + 1), BIT(28))
527 #define GET_FWSECTION_HDR_REDL(fwhdr) \
528 le32_get_bits(*((const __le32 *)(fwhdr) + 1), BIT(29))
529 #define GET_FWSECTION_HDR_MSSC(fwhdr) \
530 le32_get_bits(*((const __le32 *)(fwhdr) + 2), GENMASK(31, 0))
532 #define GET_FW_HDR_MAJOR_VERSION(fwhdr) \
533 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(7, 0))
534 #define GET_FW_HDR_MINOR_VERSION(fwhdr) \
535 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(15, 8))
536 #define GET_FW_HDR_SUBVERSION(fwhdr) \
537 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(23, 16))
538 #define GET_FW_HDR_SUBINDEX(fwhdr) \
539 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(31, 24))
540 #define GET_FW_HDR_LEN(fwhdr) \
541 le32_get_bits(*((const __le32 *)(fwhdr) + 3), GENMASK(23, 16))
542 #define GET_FW_HDR_MONTH(fwhdr) \
543 le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(7, 0))
544 #define GET_FW_HDR_DATE(fwhdr) \
545 le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(15, 8))
546 #define GET_FW_HDR_HOUR(fwhdr) \
547 le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(23, 16))
548 #define GET_FW_HDR_MIN(fwhdr) \
549 le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(31, 24))
550 #define GET_FW_HDR_YEAR(fwhdr) \
551 le32_get_bits(*((const __le32 *)(fwhdr) + 5), GENMASK(31, 0))
552 #define GET_FW_HDR_SEC_NUM(fwhdr) \
553 le32_get_bits(*((const __le32 *)(fwhdr) + 6), GENMASK(15, 8))
554 #define GET_FW_HDR_DYN_HDR(fwhdr) \
555 le32_get_bits(*((const __le32 *)(fwhdr) + 7), BIT(16))
556 #define GET_FW_HDR_CMD_VERSERION(fwhdr) \
557 le32_get_bits(*((const __le32 *)(fwhdr) + 7), GENMASK(31, 24))
559 #define GET_FW_DYNHDR_LEN(fwdynhdr) \
560 le32_get_bits(*((const __le32 *)(fwdynhdr)), GENMASK(31, 0))
561 #define GET_FW_DYNHDR_COUNT(fwdynhdr) \
562 le32_get_bits(*((const __le32 *)(fwdynhdr) + 1), GENMASK(31, 0))
564 static inline void SET_FW_HDR_PART_SIZE(void *fwhdr, u32 val)
566 le32p_replace_bits((__le32 *)fwhdr + 7, val, GENMASK(15, 0));
569 static inline void SET_CTRL_INFO_MACID(void *table, u32 val)
571 le32p_replace_bits((__le32 *)(table) + 0, val, GENMASK(6, 0));
574 static inline void SET_CTRL_INFO_OPERATION(void *table, u32 val)
576 le32p_replace_bits((__le32 *)(table) + 0, val, BIT(7));
578 #define SET_CMC_TBL_MASK_DATARATE GENMASK(8, 0)
579 static inline void SET_CMC_TBL_DATARATE(void *table, u32 val)
581 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(8, 0));
582 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DATARATE,
585 #define SET_CMC_TBL_MASK_FORCE_TXOP BIT(0)
586 static inline void SET_CMC_TBL_FORCE_TXOP(void *table, u32 val)
588 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(9));
589 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_FORCE_TXOP,
592 #define SET_CMC_TBL_MASK_DATA_BW GENMASK(1, 0)
593 static inline void SET_CMC_TBL_DATA_BW(void *table, u32 val)
595 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(11, 10));
596 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DATA_BW,
599 #define SET_CMC_TBL_MASK_DATA_GI_LTF GENMASK(2, 0)
600 static inline void SET_CMC_TBL_DATA_GI_LTF(void *table, u32 val)
602 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(14, 12));
603 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DATA_GI_LTF,
606 #define SET_CMC_TBL_MASK_DARF_TC_INDEX BIT(0)
607 static inline void SET_CMC_TBL_DARF_TC_INDEX(void *table, u32 val)
609 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(15));
610 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DARF_TC_INDEX,
613 #define SET_CMC_TBL_MASK_ARFR_CTRL GENMASK(3, 0)
614 static inline void SET_CMC_TBL_ARFR_CTRL(void *table, u32 val)
616 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(19, 16));
617 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_ARFR_CTRL,
620 #define SET_CMC_TBL_MASK_ACQ_RPT_EN BIT(0)
621 static inline void SET_CMC_TBL_ACQ_RPT_EN(void *table, u32 val)
623 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(20));
624 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_ACQ_RPT_EN,
627 #define SET_CMC_TBL_MASK_MGQ_RPT_EN BIT(0)
628 static inline void SET_CMC_TBL_MGQ_RPT_EN(void *table, u32 val)
630 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(21));
631 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_MGQ_RPT_EN,
634 #define SET_CMC_TBL_MASK_ULQ_RPT_EN BIT(0)
635 static inline void SET_CMC_TBL_ULQ_RPT_EN(void *table, u32 val)
637 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(22));
638 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_ULQ_RPT_EN,
641 #define SET_CMC_TBL_MASK_TWTQ_RPT_EN BIT(0)
642 static inline void SET_CMC_TBL_TWTQ_RPT_EN(void *table, u32 val)
644 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(23));
645 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_TWTQ_RPT_EN,
648 #define SET_CMC_TBL_MASK_DISRTSFB BIT(0)
649 static inline void SET_CMC_TBL_DISRTSFB(void *table, u32 val)
651 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(25));
652 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DISRTSFB,
655 #define SET_CMC_TBL_MASK_DISDATAFB BIT(0)
656 static inline void SET_CMC_TBL_DISDATAFB(void *table, u32 val)
658 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(26));
659 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DISDATAFB,
662 #define SET_CMC_TBL_MASK_TRYRATE BIT(0)
663 static inline void SET_CMC_TBL_TRYRATE(void *table, u32 val)
665 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(27));
666 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_TRYRATE,
669 #define SET_CMC_TBL_MASK_AMPDU_DENSITY GENMASK(3, 0)
670 static inline void SET_CMC_TBL_AMPDU_DENSITY(void *table, u32 val)
672 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(31, 28));
673 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_AMPDU_DENSITY,
676 #define SET_CMC_TBL_MASK_DATA_RTY_LOWEST_RATE GENMASK(8, 0)
677 static inline void SET_CMC_TBL_DATA_RTY_LOWEST_RATE(void *table, u32 val)
679 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(8, 0));
680 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_DATA_RTY_LOWEST_RATE,
683 #define SET_CMC_TBL_MASK_AMPDU_TIME_SEL BIT(0)
684 static inline void SET_CMC_TBL_AMPDU_TIME_SEL(void *table, u32 val)
686 le32p_replace_bits((__le32 *)(table) + 2, val, BIT(9));
687 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_AMPDU_TIME_SEL,
690 #define SET_CMC_TBL_MASK_AMPDU_LEN_SEL BIT(0)
691 static inline void SET_CMC_TBL_AMPDU_LEN_SEL(void *table, u32 val)
693 le32p_replace_bits((__le32 *)(table) + 2, val, BIT(10));
694 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_AMPDU_LEN_SEL,
697 #define SET_CMC_TBL_MASK_RTS_TXCNT_LMT_SEL BIT(0)
698 static inline void SET_CMC_TBL_RTS_TXCNT_LMT_SEL(void *table, u32 val)
700 le32p_replace_bits((__le32 *)(table) + 2, val, BIT(11));
701 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_RTS_TXCNT_LMT_SEL,
704 #define SET_CMC_TBL_MASK_RTS_TXCNT_LMT GENMASK(3, 0)
705 static inline void SET_CMC_TBL_RTS_TXCNT_LMT(void *table, u32 val)
707 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(15, 12));
708 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_RTS_TXCNT_LMT,
711 #define SET_CMC_TBL_MASK_RTSRATE GENMASK(8, 0)
712 static inline void SET_CMC_TBL_RTSRATE(void *table, u32 val)
714 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(24, 16));
715 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_RTSRATE,
718 #define SET_CMC_TBL_MASK_VCS_STBC BIT(0)
719 static inline void SET_CMC_TBL_VCS_STBC(void *table, u32 val)
721 le32p_replace_bits((__le32 *)(table) + 2, val, BIT(27));
722 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_VCS_STBC,
725 #define SET_CMC_TBL_MASK_RTS_RTY_LOWEST_RATE GENMASK(3, 0)
726 static inline void SET_CMC_TBL_RTS_RTY_LOWEST_RATE(void *table, u32 val)
728 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(31, 28));
729 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_RTS_RTY_LOWEST_RATE,
732 #define SET_CMC_TBL_MASK_DATA_TX_CNT_LMT GENMASK(5, 0)
733 static inline void SET_CMC_TBL_DATA_TX_CNT_LMT(void *table, u32 val)
735 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(5, 0));
736 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_DATA_TX_CNT_LMT,
739 #define SET_CMC_TBL_MASK_DATA_TXCNT_LMT_SEL BIT(0)
740 static inline void SET_CMC_TBL_DATA_TXCNT_LMT_SEL(void *table, u32 val)
742 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(6));
743 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_DATA_TXCNT_LMT_SEL,
746 #define SET_CMC_TBL_MASK_MAX_AGG_NUM_SEL BIT(0)
747 static inline void SET_CMC_TBL_MAX_AGG_NUM_SEL(void *table, u32 val)
749 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(7));
750 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_MAX_AGG_NUM_SEL,
753 #define SET_CMC_TBL_MASK_RTS_EN BIT(0)
754 static inline void SET_CMC_TBL_RTS_EN(void *table, u32 val)
756 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(8));
757 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_RTS_EN,
760 #define SET_CMC_TBL_MASK_CTS2SELF_EN BIT(0)
761 static inline void SET_CMC_TBL_CTS2SELF_EN(void *table, u32 val)
763 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(9));
764 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_CTS2SELF_EN,
767 #define SET_CMC_TBL_MASK_CCA_RTS GENMASK(1, 0)
768 static inline void SET_CMC_TBL_CCA_RTS(void *table, u32 val)
770 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(11, 10));
771 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_CCA_RTS,
774 #define SET_CMC_TBL_MASK_HW_RTS_EN BIT(0)
775 static inline void SET_CMC_TBL_HW_RTS_EN(void *table, u32 val)
777 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(12));
778 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_HW_RTS_EN,
781 #define SET_CMC_TBL_MASK_RTS_DROP_DATA_MODE GENMASK(1, 0)
782 static inline void SET_CMC_TBL_RTS_DROP_DATA_MODE(void *table, u32 val)
784 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(14, 13));
785 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_RTS_DROP_DATA_MODE,
788 #define SET_CMC_TBL_MASK_AMPDU_MAX_LEN GENMASK(10, 0)
789 static inline void SET_CMC_TBL_AMPDU_MAX_LEN(void *table, u32 val)
791 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(26, 16));
792 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_AMPDU_MAX_LEN,
795 #define SET_CMC_TBL_MASK_UL_MU_DIS BIT(0)
796 static inline void SET_CMC_TBL_UL_MU_DIS(void *table, u32 val)
798 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(27));
799 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_UL_MU_DIS,
802 #define SET_CMC_TBL_MASK_AMPDU_MAX_TIME GENMASK(3, 0)
803 static inline void SET_CMC_TBL_AMPDU_MAX_TIME(void *table, u32 val)
805 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(31, 28));
806 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_AMPDU_MAX_TIME,
809 #define SET_CMC_TBL_MASK_MAX_AGG_NUM GENMASK(7, 0)
810 static inline void SET_CMC_TBL_MAX_AGG_NUM(void *table, u32 val)
812 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(7, 0));
813 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_MAX_AGG_NUM,
816 #define SET_CMC_TBL_MASK_BA_BMAP GENMASK(1, 0)
817 static inline void SET_CMC_TBL_BA_BMAP(void *table, u32 val)
819 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(9, 8));
820 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_BA_BMAP,
823 #define SET_CMC_TBL_MASK_VO_LFTIME_SEL GENMASK(2, 0)
824 static inline void SET_CMC_TBL_VO_LFTIME_SEL(void *table, u32 val)
826 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(18, 16));
827 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_VO_LFTIME_SEL,
830 #define SET_CMC_TBL_MASK_VI_LFTIME_SEL GENMASK(2, 0)
831 static inline void SET_CMC_TBL_VI_LFTIME_SEL(void *table, u32 val)
833 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(21, 19));
834 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_VI_LFTIME_SEL,
837 #define SET_CMC_TBL_MASK_BE_LFTIME_SEL GENMASK(2, 0)
838 static inline void SET_CMC_TBL_BE_LFTIME_SEL(void *table, u32 val)
840 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(24, 22));
841 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_BE_LFTIME_SEL,
844 #define SET_CMC_TBL_MASK_BK_LFTIME_SEL GENMASK(2, 0)
845 static inline void SET_CMC_TBL_BK_LFTIME_SEL(void *table, u32 val)
847 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(27, 25));
848 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_BK_LFTIME_SEL,
851 #define SET_CMC_TBL_MASK_SECTYPE GENMASK(3, 0)
852 static inline void SET_CMC_TBL_SECTYPE(void *table, u32 val)
854 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(31, 28));
855 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_SECTYPE,
858 #define SET_CMC_TBL_MASK_MULTI_PORT_ID GENMASK(2, 0)
859 static inline void SET_CMC_TBL_MULTI_PORT_ID(void *table, u32 val)
861 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(2, 0));
862 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_MULTI_PORT_ID,
865 #define SET_CMC_TBL_MASK_BMC BIT(0)
866 static inline void SET_CMC_TBL_BMC(void *table, u32 val)
868 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(3));
869 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_BMC,
872 #define SET_CMC_TBL_MASK_MBSSID GENMASK(3, 0)
873 static inline void SET_CMC_TBL_MBSSID(void *table, u32 val)
875 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(7, 4));
876 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_MBSSID,
879 #define SET_CMC_TBL_MASK_NAVUSEHDR BIT(0)
880 static inline void SET_CMC_TBL_NAVUSEHDR(void *table, u32 val)
882 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(8));
883 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_NAVUSEHDR,
886 #define SET_CMC_TBL_MASK_TXPWR_MODE GENMASK(2, 0)
887 static inline void SET_CMC_TBL_TXPWR_MODE(void *table, u32 val)
889 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(11, 9));
890 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_TXPWR_MODE,
893 #define SET_CMC_TBL_MASK_DATA_DCM BIT(0)
894 static inline void SET_CMC_TBL_DATA_DCM(void *table, u32 val)
896 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(12));
897 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_DCM,
900 #define SET_CMC_TBL_MASK_DATA_ER BIT(0)
901 static inline void SET_CMC_TBL_DATA_ER(void *table, u32 val)
903 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(13));
904 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_ER,
907 #define SET_CMC_TBL_MASK_DATA_LDPC BIT(0)
908 static inline void SET_CMC_TBL_DATA_LDPC(void *table, u32 val)
910 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(14));
911 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_LDPC,
914 #define SET_CMC_TBL_MASK_DATA_STBC BIT(0)
915 static inline void SET_CMC_TBL_DATA_STBC(void *table, u32 val)
917 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(15));
918 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_STBC,
921 #define SET_CMC_TBL_MASK_A_CTRL_BQR BIT(0)
922 static inline void SET_CMC_TBL_A_CTRL_BQR(void *table, u32 val)
924 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(16));
925 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_A_CTRL_BQR,
928 #define SET_CMC_TBL_MASK_A_CTRL_UPH BIT(0)
929 static inline void SET_CMC_TBL_A_CTRL_UPH(void *table, u32 val)
931 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(17));
932 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_A_CTRL_UPH,
935 #define SET_CMC_TBL_MASK_A_CTRL_BSR BIT(0)
936 static inline void SET_CMC_TBL_A_CTRL_BSR(void *table, u32 val)
938 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(18));
939 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_A_CTRL_BSR,
942 #define SET_CMC_TBL_MASK_A_CTRL_CAS BIT(0)
943 static inline void SET_CMC_TBL_A_CTRL_CAS(void *table, u32 val)
945 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(19));
946 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_A_CTRL_CAS,
949 #define SET_CMC_TBL_MASK_DATA_BW_ER BIT(0)
950 static inline void SET_CMC_TBL_DATA_BW_ER(void *table, u32 val)
952 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(20));
953 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_BW_ER,
956 #define SET_CMC_TBL_MASK_LSIG_TXOP_EN BIT(0)
957 static inline void SET_CMC_TBL_LSIG_TXOP_EN(void *table, u32 val)
959 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(21));
960 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_LSIG_TXOP_EN,
963 #define SET_CMC_TBL_MASK_CTRL_CNT_VLD BIT(0)
964 static inline void SET_CMC_TBL_CTRL_CNT_VLD(void *table, u32 val)
966 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(27));
967 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_CTRL_CNT_VLD,
970 #define SET_CMC_TBL_MASK_CTRL_CNT GENMASK(3, 0)
971 static inline void SET_CMC_TBL_CTRL_CNT(void *table, u32 val)
973 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(31, 28));
974 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_CTRL_CNT,
977 #define SET_CMC_TBL_MASK_RESP_REF_RATE GENMASK(8, 0)
978 static inline void SET_CMC_TBL_RESP_REF_RATE(void *table, u32 val)
980 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(8, 0));
981 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_RESP_REF_RATE,
984 #define SET_CMC_TBL_MASK_ALL_ACK_SUPPORT BIT(0)
985 static inline void SET_CMC_TBL_ALL_ACK_SUPPORT(void *table, u32 val)
987 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(12));
988 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ALL_ACK_SUPPORT,
991 #define SET_CMC_TBL_MASK_BSR_QUEUE_SIZE_FORMAT BIT(0)
992 static inline void SET_CMC_TBL_BSR_QUEUE_SIZE_FORMAT(void *table, u32 val)
994 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(13));
995 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_BSR_QUEUE_SIZE_FORMAT,
998 #define SET_CMC_TBL_MASK_NTX_PATH_EN GENMASK(3, 0)
999 static inline void SET_CMC_TBL_NTX_PATH_EN(void *table, u32 val)
1001 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(19, 16));
1002 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_NTX_PATH_EN,
1005 #define SET_CMC_TBL_MASK_PATH_MAP_A GENMASK(1, 0)
1006 static inline void SET_CMC_TBL_PATH_MAP_A(void *table, u32 val)
1008 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(21, 20));
1009 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_PATH_MAP_A,
1012 #define SET_CMC_TBL_MASK_PATH_MAP_B GENMASK(1, 0)
1013 static inline void SET_CMC_TBL_PATH_MAP_B(void *table, u32 val)
1015 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(23, 22));
1016 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_PATH_MAP_B,
1019 #define SET_CMC_TBL_MASK_PATH_MAP_C GENMASK(1, 0)
1020 static inline void SET_CMC_TBL_PATH_MAP_C(void *table, u32 val)
1022 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(25, 24));
1023 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_PATH_MAP_C,
1026 #define SET_CMC_TBL_MASK_PATH_MAP_D GENMASK(1, 0)
1027 static inline void SET_CMC_TBL_PATH_MAP_D(void *table, u32 val)
1029 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(27, 26));
1030 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_PATH_MAP_D,
1033 #define SET_CMC_TBL_MASK_ANTSEL_A BIT(0)
1034 static inline void SET_CMC_TBL_ANTSEL_A(void *table, u32 val)
1036 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(28));
1037 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ANTSEL_A,
1040 #define SET_CMC_TBL_MASK_ANTSEL_B BIT(0)
1041 static inline void SET_CMC_TBL_ANTSEL_B(void *table, u32 val)
1043 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(29));
1044 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ANTSEL_B,
1047 #define SET_CMC_TBL_MASK_ANTSEL_C BIT(0)
1048 static inline void SET_CMC_TBL_ANTSEL_C(void *table, u32 val)
1050 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(30));
1051 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ANTSEL_C,
1054 #define SET_CMC_TBL_MASK_ANTSEL_D BIT(0)
1055 static inline void SET_CMC_TBL_ANTSEL_D(void *table, u32 val)
1057 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(31));
1058 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ANTSEL_D,
1062 #define SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING GENMASK(1, 0)
1063 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING_V1(void *table, u32 val)
1065 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(1, 0));
1066 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1070 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING40_V1(void *table, u32 val)
1072 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(3, 2));
1073 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1077 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING80_V1(void *table, u32 val)
1079 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(5, 4));
1080 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1084 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING160_V1(void *table, u32 val)
1086 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(7, 6));
1087 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1091 #define SET_CMC_TBL_MASK_ADDR_CAM_INDEX GENMASK(7, 0)
1092 static inline void SET_CMC_TBL_ADDR_CAM_INDEX(void *table, u32 val)
1094 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(7, 0));
1095 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_ADDR_CAM_INDEX,
1098 #define SET_CMC_TBL_MASK_PAID GENMASK(8, 0)
1099 static inline void SET_CMC_TBL_PAID(void *table, u32 val)
1101 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(16, 8));
1102 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_PAID,
1105 #define SET_CMC_TBL_MASK_ULDL BIT(0)
1106 static inline void SET_CMC_TBL_ULDL(void *table, u32 val)
1108 le32p_replace_bits((__le32 *)(table) + 7, val, BIT(17));
1109 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_ULDL,
1112 #define SET_CMC_TBL_MASK_DOPPLER_CTRL GENMASK(1, 0)
1113 static inline void SET_CMC_TBL_DOPPLER_CTRL(void *table, u32 val)
1115 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(19, 18));
1116 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_DOPPLER_CTRL,
1119 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING(void *table, u32 val)
1121 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(21, 20));
1122 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1126 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING40(void *table, u32 val)
1128 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(23, 22));
1129 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1132 #define SET_CMC_TBL_MASK_TXPWR_TOLERENCE GENMASK(3, 0)
1133 static inline void SET_CMC_TBL_TXPWR_TOLERENCE(void *table, u32 val)
1135 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(27, 24));
1136 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_TXPWR_TOLERENCE,
1140 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING80(void *table, u32 val)
1142 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(31, 30));
1143 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1146 #define SET_CMC_TBL_MASK_NC GENMASK(2, 0)
1147 static inline void SET_CMC_TBL_NC(void *table, u32 val)
1149 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(2, 0));
1150 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_NC,
1153 #define SET_CMC_TBL_MASK_NR GENMASK(2, 0)
1154 static inline void SET_CMC_TBL_NR(void *table, u32 val)
1156 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(5, 3));
1157 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_NR,
1160 #define SET_CMC_TBL_MASK_NG GENMASK(1, 0)
1161 static inline void SET_CMC_TBL_NG(void *table, u32 val)
1163 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(7, 6));
1164 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_NG,
1167 #define SET_CMC_TBL_MASK_CB GENMASK(1, 0)
1168 static inline void SET_CMC_TBL_CB(void *table, u32 val)
1170 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(9, 8));
1171 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CB,
1174 #define SET_CMC_TBL_MASK_CS GENMASK(1, 0)
1175 static inline void SET_CMC_TBL_CS(void *table, u32 val)
1177 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(11, 10));
1178 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CS,
1181 #define SET_CMC_TBL_MASK_CSI_TXBF_EN BIT(0)
1182 static inline void SET_CMC_TBL_CSI_TXBF_EN(void *table, u32 val)
1184 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(12));
1185 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_TXBF_EN,
1188 #define SET_CMC_TBL_MASK_CSI_STBC_EN BIT(0)
1189 static inline void SET_CMC_TBL_CSI_STBC_EN(void *table, u32 val)
1191 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(13));
1192 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_STBC_EN,
1195 #define SET_CMC_TBL_MASK_CSI_LDPC_EN BIT(0)
1196 static inline void SET_CMC_TBL_CSI_LDPC_EN(void *table, u32 val)
1198 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(14));
1199 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_LDPC_EN,
1202 #define SET_CMC_TBL_MASK_CSI_PARA_EN BIT(0)
1203 static inline void SET_CMC_TBL_CSI_PARA_EN(void *table, u32 val)
1205 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(15));
1206 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_PARA_EN,
1209 #define SET_CMC_TBL_MASK_CSI_FIX_RATE GENMASK(8, 0)
1210 static inline void SET_CMC_TBL_CSI_FIX_RATE(void *table, u32 val)
1212 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(24, 16));
1213 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_FIX_RATE,
1216 #define SET_CMC_TBL_MASK_CSI_GI_LTF GENMASK(2, 0)
1217 static inline void SET_CMC_TBL_CSI_GI_LTF(void *table, u32 val)
1219 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(27, 25));
1220 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_GI_LTF,
1224 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING160(void *table, u32 val)
1226 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(29, 28));
1227 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1231 #define SET_CMC_TBL_MASK_CSI_BW GENMASK(1, 0)
1232 static inline void SET_CMC_TBL_CSI_BW(void *table, u32 val)
1234 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(31, 30));
1235 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_BW,
1239 static inline void SET_DCTL_MACID_V1(void *table, u32 val)
1241 le32p_replace_bits((__le32 *)(table) + 0, val, GENMASK(6, 0));
1244 static inline void SET_DCTL_OPERATION_V1(void *table, u32 val)
1246 le32p_replace_bits((__le32 *)(table) + 0, val, BIT(7));
1249 #define SET_DCTL_MASK_QOS_FIELD_V1 GENMASK(7, 0)
1250 static inline void SET_DCTL_QOS_FIELD_V1(void *table, u32 val)
1252 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(7, 0));
1253 le32p_replace_bits((__le32 *)(table) + 9, SET_DCTL_MASK_QOS_FIELD_V1,
1257 #define SET_DCTL_MASK_SET_DCTL_HW_EXSEQ_MACID GENMASK(6, 0)
1258 static inline void SET_DCTL_HW_EXSEQ_MACID_V1(void *table, u32 val)
1260 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(14, 8));
1261 le32p_replace_bits((__le32 *)(table) + 9, SET_DCTL_MASK_SET_DCTL_HW_EXSEQ_MACID,
1265 #define SET_DCTL_MASK_QOS_DATA BIT(0)
1266 static inline void SET_DCTL_QOS_DATA_V1(void *table, u32 val)
1268 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(15));
1269 le32p_replace_bits((__le32 *)(table) + 9, SET_DCTL_MASK_QOS_DATA,
1273 #define SET_DCTL_MASK_AES_IV_L GENMASK(15, 0)
1274 static inline void SET_DCTL_AES_IV_L_V1(void *table, u32 val)
1276 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(31, 16));
1277 le32p_replace_bits((__le32 *)(table) + 9, SET_DCTL_MASK_AES_IV_L,
1281 #define SET_DCTL_MASK_AES_IV_H GENMASK(31, 0)
1282 static inline void SET_DCTL_AES_IV_H_V1(void *table, u32 val)
1284 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(31, 0));
1285 le32p_replace_bits((__le32 *)(table) + 10, SET_DCTL_MASK_AES_IV_H,
1289 #define SET_DCTL_MASK_SEQ0 GENMASK(11, 0)
1290 static inline void SET_DCTL_SEQ0_V1(void *table, u32 val)
1292 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(11, 0));
1293 le32p_replace_bits((__le32 *)(table) + 11, SET_DCTL_MASK_SEQ0,
1297 #define SET_DCTL_MASK_SEQ1 GENMASK(11, 0)
1298 static inline void SET_DCTL_SEQ1_V1(void *table, u32 val)
1300 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(23, 12));
1301 le32p_replace_bits((__le32 *)(table) + 11, SET_DCTL_MASK_SEQ1,
1305 #define SET_DCTL_MASK_AMSDU_MAX_LEN GENMASK(2, 0)
1306 static inline void SET_DCTL_AMSDU_MAX_LEN_V1(void *table, u32 val)
1308 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(26, 24));
1309 le32p_replace_bits((__le32 *)(table) + 11, SET_DCTL_MASK_AMSDU_MAX_LEN,
1313 #define SET_DCTL_MASK_STA_AMSDU_EN BIT(0)
1314 static inline void SET_DCTL_STA_AMSDU_EN_V1(void *table, u32 val)
1316 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(27));
1317 le32p_replace_bits((__le32 *)(table) + 11, SET_DCTL_MASK_STA_AMSDU_EN,
1321 #define SET_DCTL_MASK_CHKSUM_OFLD_EN BIT(0)
1322 static inline void SET_DCTL_CHKSUM_OFLD_EN_V1(void *table, u32 val)
1324 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(28));
1325 le32p_replace_bits((__le32 *)(table) + 11, SET_DCTL_MASK_CHKSUM_OFLD_EN,
1329 #define SET_DCTL_MASK_WITH_LLC BIT(0)
1330 static inline void SET_DCTL_WITH_LLC_V1(void *table, u32 val)
1332 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(29));
1333 le32p_replace_bits((__le32 *)(table) + 11, SET_DCTL_MASK_WITH_LLC,
1337 #define SET_DCTL_MASK_SEQ2 GENMASK(11, 0)
1338 static inline void SET_DCTL_SEQ2_V1(void *table, u32 val)
1340 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(11, 0));
1341 le32p_replace_bits((__le32 *)(table) + 12, SET_DCTL_MASK_SEQ2,
1345 #define SET_DCTL_MASK_SEQ3 GENMASK(11, 0)
1346 static inline void SET_DCTL_SEQ3_V1(void *table, u32 val)
1348 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(23, 12));
1349 le32p_replace_bits((__le32 *)(table) + 12, SET_DCTL_MASK_SEQ3,
1353 #define SET_DCTL_MASK_TGT_IND GENMASK(3, 0)
1354 static inline void SET_DCTL_TGT_IND_V1(void *table, u32 val)
1356 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(27, 24));
1357 le32p_replace_bits((__le32 *)(table) + 12, SET_DCTL_MASK_TGT_IND,
1361 #define SET_DCTL_MASK_TGT_IND_EN BIT(0)
1362 static inline void SET_DCTL_TGT_IND_EN_V1(void *table, u32 val)
1364 le32p_replace_bits((__le32 *)(table) + 4, val, BIT(28));
1365 le32p_replace_bits((__le32 *)(table) + 12, SET_DCTL_MASK_TGT_IND_EN,
1369 #define SET_DCTL_MASK_HTC_LB GENMASK(2, 0)
1370 static inline void SET_DCTL_HTC_LB_V1(void *table, u32 val)
1372 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(31, 29));
1373 le32p_replace_bits((__le32 *)(table) + 12, SET_DCTL_MASK_HTC_LB,
1377 #define SET_DCTL_MASK_MHDR_LEN GENMASK(4, 0)
1378 static inline void SET_DCTL_MHDR_LEN_V1(void *table, u32 val)
1380 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(4, 0));
1381 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_MHDR_LEN,
1385 #define SET_DCTL_MASK_VLAN_TAG_VALID BIT(0)
1386 static inline void SET_DCTL_VLAN_TAG_VALID_V1(void *table, u32 val)
1388 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(5));
1389 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_VLAN_TAG_VALID,
1393 #define SET_DCTL_MASK_VLAN_TAG_SEL GENMASK(1, 0)
1394 static inline void SET_DCTL_VLAN_TAG_SEL_V1(void *table, u32 val)
1396 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(7, 6));
1397 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_VLAN_TAG_SEL,
1401 #define SET_DCTL_MASK_HTC_ORDER BIT(0)
1402 static inline void SET_DCTL_HTC_ORDER_V1(void *table, u32 val)
1404 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(8));
1405 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_HTC_ORDER,
1409 #define SET_DCTL_MASK_SEC_KEY_ID GENMASK(1, 0)
1410 static inline void SET_DCTL_SEC_KEY_ID_V1(void *table, u32 val)
1412 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(10, 9));
1413 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_KEY_ID,
1417 #define SET_DCTL_MASK_WAPI BIT(0)
1418 static inline void SET_DCTL_WAPI_V1(void *table, u32 val)
1420 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(15));
1421 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_WAPI,
1425 #define SET_DCTL_MASK_SEC_ENT_MODE GENMASK(1, 0)
1426 static inline void SET_DCTL_SEC_ENT_MODE_V1(void *table, u32 val)
1428 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(17, 16));
1429 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENT_MODE,
1433 #define SET_DCTL_MASK_SEC_ENTX_KEYID GENMASK(1, 0)
1434 static inline void SET_DCTL_SEC_ENT0_KEYID_V1(void *table, u32 val)
1436 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(19, 18));
1437 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1441 static inline void SET_DCTL_SEC_ENT1_KEYID_V1(void *table, u32 val)
1443 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(21, 20));
1444 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1448 static inline void SET_DCTL_SEC_ENT2_KEYID_V1(void *table, u32 val)
1450 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(23, 22));
1451 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1455 static inline void SET_DCTL_SEC_ENT3_KEYID_V1(void *table, u32 val)
1457 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(25, 24));
1458 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1462 static inline void SET_DCTL_SEC_ENT4_KEYID_V1(void *table, u32 val)
1464 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(27, 26));
1465 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1469 static inline void SET_DCTL_SEC_ENT5_KEYID_V1(void *table, u32 val)
1471 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(29, 28));
1472 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1476 static inline void SET_DCTL_SEC_ENT6_KEYID_V1(void *table, u32 val)
1478 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(31, 30));
1479 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1483 #define SET_DCTL_MASK_SEC_ENT_VALID GENMASK(7, 0)
1484 static inline void SET_DCTL_SEC_ENT_VALID_V1(void *table, u32 val)
1486 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(7, 0));
1487 le32p_replace_bits((__le32 *)(table) + 14, SET_DCTL_MASK_SEC_ENT_VALID,
1491 #define SET_DCTL_MASK_SEC_ENTX GENMASK(7, 0)
1492 static inline void SET_DCTL_SEC_ENT0_V1(void *table, u32 val)
1494 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(15, 8));
1495 le32p_replace_bits((__le32 *)(table) + 14, SET_DCTL_MASK_SEC_ENTX,
1499 static inline void SET_DCTL_SEC_ENT1_V1(void *table, u32 val)
1501 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(23, 16));
1502 le32p_replace_bits((__le32 *)(table) + 14, SET_DCTL_MASK_SEC_ENTX,
1506 static inline void SET_DCTL_SEC_ENT2_V1(void *table, u32 val)
1508 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(31, 24));
1509 le32p_replace_bits((__le32 *)(table) + 14, SET_DCTL_MASK_SEC_ENTX,
1513 static inline void SET_DCTL_SEC_ENT3_V1(void *table, u32 val)
1515 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(7, 0));
1516 le32p_replace_bits((__le32 *)(table) + 15, SET_DCTL_MASK_SEC_ENTX,
1520 static inline void SET_DCTL_SEC_ENT4_V1(void *table, u32 val)
1522 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(15, 8));
1523 le32p_replace_bits((__le32 *)(table) + 15, SET_DCTL_MASK_SEC_ENTX,
1527 static inline void SET_DCTL_SEC_ENT5_V1(void *table, u32 val)
1529 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(23, 16));
1530 le32p_replace_bits((__le32 *)(table) + 15, SET_DCTL_MASK_SEC_ENTX,
1534 static inline void SET_DCTL_SEC_ENT6_V1(void *table, u32 val)
1536 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(31, 24));
1537 le32p_replace_bits((__le32 *)(table) + 15, SET_DCTL_MASK_SEC_ENTX,
1541 static inline void SET_BCN_UPD_PORT(void *h2c, u32 val)
1543 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0));
1546 static inline void SET_BCN_UPD_MBSSID(void *h2c, u32 val)
1548 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
1551 static inline void SET_BCN_UPD_BAND(void *h2c, u32 val)
1553 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16));
1556 static inline void SET_BCN_UPD_GRP_IE_OFST(void *h2c, u32 val)
1558 le32p_replace_bits((__le32 *)h2c, (val - 24) | BIT(7), GENMASK(31, 24));
1561 static inline void SET_BCN_UPD_MACID(void *h2c, u32 val)
1563 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(7, 0));
1566 static inline void SET_BCN_UPD_SSN_SEL(void *h2c, u32 val)
1568 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(9, 8));
1571 static inline void SET_BCN_UPD_SSN_MODE(void *h2c, u32 val)
1573 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(11, 10));
1576 static inline void SET_BCN_UPD_RATE(void *h2c, u32 val)
1578 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(20, 12));
1581 static inline void SET_BCN_UPD_TXPWR(void *h2c, u32 val)
1583 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(23, 21));
1586 static inline void SET_BCN_UPD_TXINFO_CTRL_EN(void *h2c, u32 val)
1588 le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(0));
1591 static inline void SET_BCN_UPD_NTX_PATH_EN(void *h2c, u32 val)
1593 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(4, 1));
1596 static inline void SET_BCN_UPD_PATH_MAP_A(void *h2c, u32 val)
1598 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(6, 5));
1601 static inline void SET_BCN_UPD_PATH_MAP_B(void *h2c, u32 val)
1603 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(8, 7));
1606 static inline void SET_BCN_UPD_PATH_MAP_C(void *h2c, u32 val)
1608 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(10, 9));
1611 static inline void SET_BCN_UPD_PATH_MAP_D(void *h2c, u32 val)
1613 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(12, 11));
1616 static inline void SET_BCN_UPD_PATH_ANTSEL_A(void *h2c, u32 val)
1618 le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(13));
1621 static inline void SET_BCN_UPD_PATH_ANTSEL_B(void *h2c, u32 val)
1623 le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(14));
1626 static inline void SET_BCN_UPD_PATH_ANTSEL_C(void *h2c, u32 val)
1628 le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(15));
1631 static inline void SET_BCN_UPD_PATH_ANTSEL_D(void *h2c, u32 val)
1633 le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(16));
1636 static inline void SET_BCN_UPD_CSA_OFST(void *h2c, u32 val)
1638 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(31, 17));
1641 static inline void SET_FWROLE_MAINTAIN_MACID(void *h2c, u32 val)
1643 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0));
1646 static inline void SET_FWROLE_MAINTAIN_SELF_ROLE(void *h2c, u32 val)
1648 le32p_replace_bits((__le32 *)h2c, val, GENMASK(9, 8));
1651 static inline void SET_FWROLE_MAINTAIN_UPD_MODE(void *h2c, u32 val)
1653 le32p_replace_bits((__le32 *)h2c, val, GENMASK(12, 10));
1656 static inline void SET_FWROLE_MAINTAIN_WIFI_ROLE(void *h2c, u32 val)
1658 le32p_replace_bits((__le32 *)h2c, val, GENMASK(16, 13));
1661 static inline void SET_JOININFO_MACID(void *h2c, u32 val)
1663 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0));
1666 static inline void SET_JOININFO_OP(void *h2c, u32 val)
1668 le32p_replace_bits((__le32 *)h2c, val, BIT(8));
1671 static inline void SET_JOININFO_BAND(void *h2c, u32 val)
1673 le32p_replace_bits((__le32 *)h2c, val, BIT(9));
1676 static inline void SET_JOININFO_WMM(void *h2c, u32 val)
1678 le32p_replace_bits((__le32 *)h2c, val, GENMASK(11, 10));
1681 static inline void SET_JOININFO_TGR(void *h2c, u32 val)
1683 le32p_replace_bits((__le32 *)h2c, val, BIT(12));
1686 static inline void SET_JOININFO_ISHESTA(void *h2c, u32 val)
1688 le32p_replace_bits((__le32 *)h2c, val, BIT(13));
1691 static inline void SET_JOININFO_DLBW(void *h2c, u32 val)
1693 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 14));
1696 static inline void SET_JOININFO_TF_MAC_PAD(void *h2c, u32 val)
1698 le32p_replace_bits((__le32 *)h2c, val, GENMASK(17, 16));
1701 static inline void SET_JOININFO_DL_T_PE(void *h2c, u32 val)
1703 le32p_replace_bits((__le32 *)h2c, val, GENMASK(20, 18));
1706 static inline void SET_JOININFO_PORT_ID(void *h2c, u32 val)
1708 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 21));
1711 static inline void SET_JOININFO_NET_TYPE(void *h2c, u32 val)
1713 le32p_replace_bits((__le32 *)h2c, val, GENMASK(25, 24));
1716 static inline void SET_JOININFO_WIFI_ROLE(void *h2c, u32 val)
1718 le32p_replace_bits((__le32 *)h2c, val, GENMASK(29, 26));
1721 static inline void SET_JOININFO_SELF_ROLE(void *h2c, u32 val)
1723 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 30));
1726 static inline void SET_GENERAL_PKT_MACID(void *h2c, u32 val)
1728 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0));
1731 static inline void SET_GENERAL_PKT_PROBRSP_ID(void *h2c, u32 val)
1733 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
1736 static inline void SET_GENERAL_PKT_PSPOLL_ID(void *h2c, u32 val)
1738 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16));
1741 static inline void SET_GENERAL_PKT_NULL_ID(void *h2c, u32 val)
1743 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24));
1746 static inline void SET_GENERAL_PKT_QOS_NULL_ID(void *h2c, u32 val)
1748 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(7, 0));
1751 static inline void SET_GENERAL_PKT_CTS2SELF_ID(void *h2c, u32 val)
1753 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(15, 8));
1756 static inline void SET_LOG_CFG_LEVEL(void *h2c, u32 val)
1758 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0));
1761 static inline void SET_LOG_CFG_PATH(void *h2c, u32 val)
1763 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
1766 static inline void SET_LOG_CFG_COMP(void *h2c, u32 val)
1768 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(31, 0));
1771 static inline void SET_LOG_CFG_COMP_EXT(void *h2c, u32 val)
1773 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(31, 0));
1776 static inline void SET_BA_CAM_VALID(void *h2c, u32 val)
1778 le32p_replace_bits((__le32 *)h2c, val, BIT(0));
1781 static inline void SET_BA_CAM_INIT_REQ(void *h2c, u32 val)
1783 le32p_replace_bits((__le32 *)h2c, val, BIT(1));
1786 static inline void SET_BA_CAM_ENTRY_IDX(void *h2c, u32 val)
1788 le32p_replace_bits((__le32 *)h2c, val, GENMASK(3, 2));
1791 static inline void SET_BA_CAM_TID(void *h2c, u32 val)
1793 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 4));
1796 static inline void SET_BA_CAM_MACID(void *h2c, u32 val)
1798 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
1801 static inline void SET_BA_CAM_BMAP_SIZE(void *h2c, u32 val)
1803 le32p_replace_bits((__le32 *)h2c, val, GENMASK(19, 16));
1806 static inline void SET_BA_CAM_SSN(void *h2c, u32 val)
1808 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 20));
1811 static inline void SET_BA_CAM_UID(void *h2c, u32 val)
1813 le32p_replace_bits((__le32 *)h2c + 1, val, GENMASK(7, 0));
1816 static inline void SET_BA_CAM_STD_EN(void *h2c, u32 val)
1818 le32p_replace_bits((__le32 *)h2c + 1, val, BIT(8));
1821 static inline void SET_BA_CAM_BAND(void *h2c, u32 val)
1823 le32p_replace_bits((__le32 *)h2c + 1, val, BIT(9));
1826 static inline void SET_BA_CAM_ENTRY_IDX_V1(void *h2c, u32 val)
1828 le32p_replace_bits((__le32 *)h2c + 1, val, GENMASK(31, 28));
1831 static inline void SET_LPS_PARM_MACID(void *h2c, u32 val)
1833 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0));
1836 static inline void SET_LPS_PARM_PSMODE(void *h2c, u32 val)
1838 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
1841 static inline void SET_LPS_PARM_RLBM(void *h2c, u32 val)
1843 le32p_replace_bits((__le32 *)h2c, val, GENMASK(19, 16));
1846 static inline void SET_LPS_PARM_SMARTPS(void *h2c, u32 val)
1848 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 20));
1851 static inline void SET_LPS_PARM_AWAKEINTERVAL(void *h2c, u32 val)
1853 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24));
1856 static inline void SET_LPS_PARM_VOUAPSD(void *h2c, u32 val)
1858 le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(0));
1861 static inline void SET_LPS_PARM_VIUAPSD(void *h2c, u32 val)
1863 le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(1));
1866 static inline void SET_LPS_PARM_BEUAPSD(void *h2c, u32 val)
1868 le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(2));
1871 static inline void SET_LPS_PARM_BKUAPSD(void *h2c, u32 val)
1873 le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(3));
1876 static inline void SET_LPS_PARM_LASTRPWM(void *h2c, u32 val)
1878 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(15, 8));
1881 static inline void RTW89_SET_FWCMD_CPU_EXCEPTION_TYPE(void *cmd, u32 val)
1883 le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 0));
1886 static inline void RTW89_SET_FWCMD_PKT_DROP_SEL(void *cmd, u32 val)
1888 le32p_replace_bits((__le32 *)cmd, val, GENMASK(7, 0));
1891 static inline void RTW89_SET_FWCMD_PKT_DROP_MACID(void *cmd, u32 val)
1893 le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8));
1896 static inline void RTW89_SET_FWCMD_PKT_DROP_BAND(void *cmd, u32 val)
1898 le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16));
1901 static inline void RTW89_SET_FWCMD_PKT_DROP_PORT(void *cmd, u32 val)
1903 le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24));
1906 static inline void RTW89_SET_FWCMD_PKT_DROP_MBSSID(void *cmd, u32 val)
1908 le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(7, 0));
1911 static inline void RTW89_SET_FWCMD_PKT_DROP_ROLE_A_INFO_TF_TRS(void *cmd, u32 val)
1913 le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(15, 8));
1916 static inline void RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_0(void *cmd, u32 val)
1918 le32p_replace_bits((__le32 *)cmd + 2, val, GENMASK(31, 0));
1921 static inline void RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_1(void *cmd, u32 val)
1923 le32p_replace_bits((__le32 *)cmd + 3, val, GENMASK(31, 0));
1926 static inline void RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_2(void *cmd, u32 val)
1928 le32p_replace_bits((__le32 *)cmd + 4, val, GENMASK(31, 0));
1931 static inline void RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_3(void *cmd, u32 val)
1933 le32p_replace_bits((__le32 *)cmd + 5, val, GENMASK(31, 0));
1936 static inline void RTW89_SET_KEEP_ALIVE_ENABLE(void *h2c, u32 val)
1938 le32p_replace_bits((__le32 *)h2c, val, GENMASK(1, 0));
1941 static inline void RTW89_SET_KEEP_ALIVE_PKT_NULL_ID(void *h2c, u32 val)
1943 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
1946 static inline void RTW89_SET_KEEP_ALIVE_PERIOD(void *h2c, u32 val)
1948 le32p_replace_bits((__le32 *)h2c, val, GENMASK(24, 16));
1951 static inline void RTW89_SET_KEEP_ALIVE_MACID(void *h2c, u32 val)
1953 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24));
1956 static inline void RTW89_SET_DISCONNECT_DETECT_ENABLE(void *h2c, u32 val)
1958 le32p_replace_bits((__le32 *)h2c, val, BIT(0));
1961 static inline void RTW89_SET_DISCONNECT_DETECT_TRYOK_BCNFAIL_COUNT_EN(void *h2c, u32 val)
1963 le32p_replace_bits((__le32 *)h2c, val, BIT(1));
1966 static inline void RTW89_SET_DISCONNECT_DETECT_DISCONNECT(void *h2c, u32 val)
1968 le32p_replace_bits((__le32 *)h2c, val, BIT(2));
1971 static inline void RTW89_SET_DISCONNECT_DETECT_MAC_ID(void *h2c, u32 val)
1973 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
1976 static inline void RTW89_SET_DISCONNECT_DETECT_CHECK_PERIOD(void *h2c, u32 val)
1978 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16));
1981 static inline void RTW89_SET_DISCONNECT_DETECT_TRY_PKT_COUNT(void *h2c, u32 val)
1983 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24));
1986 static inline void RTW89_SET_DISCONNECT_DETECT_TRYOK_BCNFAIL_COUNT_LIMIT(void *h2c, u32 val)
1988 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(7, 0));
1991 static inline void RTW89_SET_WOW_GLOBAL_ENABLE(void *h2c, u32 val)
1993 le32p_replace_bits((__le32 *)h2c, val, BIT(0));
1996 static inline void RTW89_SET_WOW_GLOBAL_DROP_ALL_PKT(void *h2c, u32 val)
1998 le32p_replace_bits((__le32 *)h2c, val, BIT(1));
2001 static inline void RTW89_SET_WOW_GLOBAL_RX_PARSE_AFTER_WAKE(void *h2c, u32 val)
2003 le32p_replace_bits((__le32 *)h2c, val, BIT(2));
2006 static inline void RTW89_SET_WOW_GLOBAL_WAKE_BAR_PULLED(void *h2c, u32 val)
2008 le32p_replace_bits((__le32 *)h2c, val, BIT(3));
2011 static inline void RTW89_SET_WOW_GLOBAL_MAC_ID(void *h2c, u32 val)
2013 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
2016 static inline void RTW89_SET_WOW_GLOBAL_PAIRWISE_SEC_ALGO(void *h2c, u32 val)
2018 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16));
2021 static inline void RTW89_SET_WOW_GLOBAL_GROUP_SEC_ALGO(void *h2c, u32 val)
2023 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24));
2026 static inline void RTW89_SET_WOW_GLOBAL_REMOTECTRL_INFO_CONTENT(void *h2c, u32 val)
2028 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(31, 0));
2031 static inline void RTW89_SET_WOW_WAKEUP_CTRL_PATTERN_MATCH_ENABLE(void *h2c, u32 val)
2033 le32p_replace_bits((__le32 *)h2c, val, BIT(0));
2036 static inline void RTW89_SET_WOW_WAKEUP_CTRL_MAGIC_ENABLE(void *h2c, u32 val)
2038 le32p_replace_bits((__le32 *)h2c, val, BIT(1));
2041 static inline void RTW89_SET_WOW_WAKEUP_CTRL_HW_UNICAST_ENABLE(void *h2c, u32 val)
2043 le32p_replace_bits((__le32 *)h2c, val, BIT(2));
2046 static inline void RTW89_SET_WOW_WAKEUP_CTRL_FW_UNICAST_ENABLE(void *h2c, u32 val)
2048 le32p_replace_bits((__le32 *)h2c, val, BIT(3));
2051 static inline void RTW89_SET_WOW_WAKEUP_CTRL_DEAUTH_ENABLE(void *h2c, u32 val)
2053 le32p_replace_bits((__le32 *)h2c, val, BIT(4));
2056 static inline void RTW89_SET_WOW_WAKEUP_CTRL_REKEYP_ENABLE(void *h2c, u32 val)
2058 le32p_replace_bits((__le32 *)h2c, val, BIT(5));
2061 static inline void RTW89_SET_WOW_WAKEUP_CTRL_EAP_ENABLE(void *h2c, u32 val)
2063 le32p_replace_bits((__le32 *)h2c, val, BIT(6));
2066 static inline void RTW89_SET_WOW_WAKEUP_CTRL_ALL_DATA_ENABLE(void *h2c, u32 val)
2068 le32p_replace_bits((__le32 *)h2c, val, BIT(7));
2071 static inline void RTW89_SET_WOW_WAKEUP_CTRL_MAC_ID(void *h2c, u32 val)
2073 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24));
2076 static inline void RTW89_SET_WOW_CAM_UPD_R_W(void *h2c, u32 val)
2078 le32p_replace_bits((__le32 *)h2c, val, BIT(0));
2081 static inline void RTW89_SET_WOW_CAM_UPD_IDX(void *h2c, u32 val)
2083 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 1));
2086 static inline void RTW89_SET_WOW_CAM_UPD_WKFM1(void *h2c, u32 val)
2088 le32p_replace_bits((__le32 *)h2c + 1, val, GENMASK(31, 0));
2091 static inline void RTW89_SET_WOW_CAM_UPD_WKFM2(void *h2c, u32 val)
2093 le32p_replace_bits((__le32 *)h2c + 2, val, GENMASK(31, 0));
2096 static inline void RTW89_SET_WOW_CAM_UPD_WKFM3(void *h2c, u32 val)
2098 le32p_replace_bits((__le32 *)h2c + 3, val, GENMASK(31, 0));
2101 static inline void RTW89_SET_WOW_CAM_UPD_WKFM4(void *h2c, u32 val)
2103 le32p_replace_bits((__le32 *)h2c + 4, val, GENMASK(31, 0));
2106 static inline void RTW89_SET_WOW_CAM_UPD_CRC(void *h2c, u32 val)
2108 le32p_replace_bits((__le32 *)h2c + 5, val, GENMASK(15, 0));
2111 static inline void RTW89_SET_WOW_CAM_UPD_NEGATIVE_PATTERN_MATCH(void *h2c, u32 val)
2113 le32p_replace_bits((__le32 *)h2c + 5, val, BIT(22));
2116 static inline void RTW89_SET_WOW_CAM_UPD_SKIP_MAC_HDR(void *h2c, u32 val)
2118 le32p_replace_bits((__le32 *)h2c + 5, val, BIT(23));
2121 static inline void RTW89_SET_WOW_CAM_UPD_UC(void *h2c, u32 val)
2123 le32p_replace_bits((__le32 *)h2c + 5, val, BIT(24));
2126 static inline void RTW89_SET_WOW_CAM_UPD_MC(void *h2c, u32 val)
2128 le32p_replace_bits((__le32 *)h2c + 5, val, BIT(25));
2131 static inline void RTW89_SET_WOW_CAM_UPD_BC(void *h2c, u32 val)
2133 le32p_replace_bits((__le32 *)h2c + 5, val, BIT(26));
2136 static inline void RTW89_SET_WOW_CAM_UPD_VALID(void *h2c, u32 val)
2138 le32p_replace_bits((__le32 *)h2c + 5, val, BIT(31));
2141 enum rtw89_btc_btf_h2c_class {
2144 BTFC_FW_EVENT = 0x12,
2147 enum rtw89_btc_btf_set {
2148 SET_REPORT_EN = 0x0,
2160 SET_BT_IGNORE_WLAN_ACT,
2162 SET_BT_LNA_CONSTRAIN,
2163 SET_BT_GOLDEN_RX_RANGE,
2169 enum rtw89_btc_cxdrvinfo {
2178 CXDRVINFO_TRX, /* WL traffic to WL fw */
2182 enum rtw89_scan_mode {
2183 RTW89_SCAN_IMMEDIATE,
2186 enum rtw89_scan_type {
2190 static inline void RTW89_SET_FWCMD_CXHDR_TYPE(void *cmd, u8 val)
2192 u8p_replace_bits((u8 *)(cmd) + 0, val, GENMASK(7, 0));
2195 static inline void RTW89_SET_FWCMD_CXHDR_LEN(void *cmd, u8 val)
2197 u8p_replace_bits((u8 *)(cmd) + 1, val, GENMASK(7, 0));
2200 struct rtw89_h2c_cxhdr {
2205 #define H2C_LEN_CXDRVHDR sizeof(struct rtw89_h2c_cxhdr)
2207 struct rtw89_h2c_cxinit {
2208 struct rtw89_h2c_cxhdr hdr;
2223 #define RTW89_H2C_CXINIT_ANT_INFO_POS BIT(0)
2224 #define RTW89_H2C_CXINIT_ANT_INFO_DIVERSITY BIT(1)
2225 #define RTW89_H2C_CXINIT_ANT_INFO_BTG_POS GENMASK(3, 2)
2226 #define RTW89_H2C_CXINIT_ANT_INFO_STREAM_CNT GENMASK(7, 4)
2228 #define RTW89_H2C_CXINIT_MOD_INFO_BT_SOLO BIT(0)
2229 #define RTW89_H2C_CXINIT_MOD_INFO_BT_POS BIT(1)
2230 #define RTW89_H2C_CXINIT_MOD_INFO_SW_TYPE BIT(2)
2231 #define RTW89_H2C_CXINIT_MOD_INFO_WA_TYPE GENMASK(5, 3)
2233 #define RTW89_H2C_CXINIT_INFO_WL_ONLY BIT(0)
2234 #define RTW89_H2C_CXINIT_INFO_WL_INITOK BIT(1)
2235 #define RTW89_H2C_CXINIT_INFO_DBCC_EN BIT(2)
2236 #define RTW89_H2C_CXINIT_INFO_CX_OTHER BIT(3)
2237 #define RTW89_H2C_CXINIT_INFO_BT_ONLY BIT(4)
2239 static inline void RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(void *cmd, u8 val)
2241 u8p_replace_bits((u8 *)(cmd) + 2, val, GENMASK(7, 0));
2244 static inline void RTW89_SET_FWCMD_CXROLE_LINK_MODE(void *cmd, u8 val)
2246 u8p_replace_bits((u8 *)(cmd) + 3, val, GENMASK(7, 0));
2249 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_NONE(void *cmd, u16 val)
2251 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(0));
2254 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_STA(void *cmd, u16 val)
2256 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(1));
2259 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_AP(void *cmd, u16 val)
2261 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(2));
2264 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_VAP(void *cmd, u16 val)
2266 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(3));
2269 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(void *cmd, u16 val)
2271 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(4));
2274 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(void *cmd, u16 val)
2276 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(5));
2279 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_MESH(void *cmd, u16 val)
2281 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(6));
2284 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(void *cmd, u16 val)
2286 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(7));
2289 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(void *cmd, u16 val)
2291 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(8));
2294 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(void *cmd, u16 val)
2296 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(9));
2299 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(void *cmd, u16 val)
2301 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(10));
2304 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_NAN(void *cmd, u16 val)
2306 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(11));
2309 static inline void RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(void *cmd, u8 val, int n, u8 offset)
2311 u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, BIT(0));
2314 static inline void RTW89_SET_FWCMD_CXROLE_ACT_PID(void *cmd, u8 val, int n, u8 offset)
2316 u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, GENMASK(3, 1));
2319 static inline void RTW89_SET_FWCMD_CXROLE_ACT_PHY(void *cmd, u8 val, int n, u8 offset)
2321 u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, BIT(4));
2324 static inline void RTW89_SET_FWCMD_CXROLE_ACT_NOA(void *cmd, u8 val, int n, u8 offset)
2326 u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, BIT(5));
2329 static inline void RTW89_SET_FWCMD_CXROLE_ACT_BAND(void *cmd, u8 val, int n, u8 offset)
2331 u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, GENMASK(7, 6));
2334 static inline void RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(void *cmd, u8 val, int n, u8 offset)
2336 u8p_replace_bits((u8 *)cmd + (7 + (12 + offset) * n), val, BIT(0));
2339 static inline void RTW89_SET_FWCMD_CXROLE_ACT_BW(void *cmd, u8 val, int n, u8 offset)
2341 u8p_replace_bits((u8 *)cmd + (7 + (12 + offset) * n), val, GENMASK(7, 1));
2344 static inline void RTW89_SET_FWCMD_CXROLE_ACT_ROLE(void *cmd, u8 val, int n, u8 offset)
2346 u8p_replace_bits((u8 *)cmd + (8 + (12 + offset) * n), val, GENMASK(7, 0));
2349 static inline void RTW89_SET_FWCMD_CXROLE_ACT_CH(void *cmd, u8 val, int n, u8 offset)
2351 u8p_replace_bits((u8 *)cmd + (9 + (12 + offset) * n), val, GENMASK(7, 0));
2354 static inline void RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(void *cmd, u16 val, int n, u8 offset)
2356 le16p_replace_bits((__le16 *)((u8 *)cmd + (10 + (12 + offset) * n)), val, GENMASK(15, 0));
2359 static inline void RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(void *cmd, u16 val, int n, u8 offset)
2361 le16p_replace_bits((__le16 *)((u8 *)cmd + (12 + (12 + offset) * n)), val, GENMASK(15, 0));
2364 static inline void RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(void *cmd, u16 val, int n, u8 offset)
2366 le16p_replace_bits((__le16 *)((u8 *)cmd + (14 + (12 + offset) * n)), val, GENMASK(15, 0));
2369 static inline void RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(void *cmd, u16 val, int n, u8 offset)
2371 le16p_replace_bits((__le16 *)((u8 *)cmd + (16 + (12 + offset) * n)), val, GENMASK(15, 0));
2374 static inline void RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR(void *cmd, u32 val, int n, u8 offset)
2376 le32p_replace_bits((__le32 *)((u8 *)cmd + (20 + (12 + offset) * n)), val, GENMASK(31, 0));
2379 static inline void RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED_V2(void *cmd, u8 val, int n, u8 offset)
2381 u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, BIT(0));
2384 static inline void RTW89_SET_FWCMD_CXROLE_ACT_PID_V2(void *cmd, u8 val, int n, u8 offset)
2386 u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, GENMASK(3, 1));
2389 static inline void RTW89_SET_FWCMD_CXROLE_ACT_PHY_V2(void *cmd, u8 val, int n, u8 offset)
2391 u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, BIT(4));
2394 static inline void RTW89_SET_FWCMD_CXROLE_ACT_NOA_V2(void *cmd, u8 val, int n, u8 offset)
2396 u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, BIT(5));
2399 static inline void RTW89_SET_FWCMD_CXROLE_ACT_BAND_V2(void *cmd, u8 val, int n, u8 offset)
2401 u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, GENMASK(7, 6));
2404 static inline void RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS_V2(void *cmd, u8 val, int n, u8 offset)
2406 u8p_replace_bits((u8 *)cmd + (7 + (12 + offset) * n), val, BIT(0));
2409 static inline void RTW89_SET_FWCMD_CXROLE_ACT_BW_V2(void *cmd, u8 val, int n, u8 offset)
2411 u8p_replace_bits((u8 *)cmd + (7 + (12 + offset) * n), val, GENMASK(7, 1));
2414 static inline void RTW89_SET_FWCMD_CXROLE_ACT_ROLE_V2(void *cmd, u8 val, int n, u8 offset)
2416 u8p_replace_bits((u8 *)cmd + (8 + (12 + offset) * n), val, GENMASK(7, 0));
2419 static inline void RTW89_SET_FWCMD_CXROLE_ACT_CH_V2(void *cmd, u8 val, int n, u8 offset)
2421 u8p_replace_bits((u8 *)cmd + (9 + (12 + offset) * n), val, GENMASK(7, 0));
2424 static inline void RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR_V2(void *cmd, u32 val, int n, u8 offset)
2426 le32p_replace_bits((__le32 *)((u8 *)cmd + (10 + (12 + offset) * n)), val, GENMASK(31, 0));
2429 static inline void RTW89_SET_FWCMD_CXROLE_MROLE_TYPE(void *cmd, u32 val, u8 offset)
2431 le32p_replace_bits((__le32 *)((u8 *)cmd + offset), val, GENMASK(31, 0));
2434 static inline void RTW89_SET_FWCMD_CXROLE_MROLE_NOA(void *cmd, u32 val, u8 offset)
2436 le32p_replace_bits((__le32 *)((u8 *)cmd + offset + 4), val, GENMASK(31, 0));
2439 static inline void RTW89_SET_FWCMD_CXROLE_DBCC_EN(void *cmd, u32 val, u8 offset)
2441 le32p_replace_bits((__le32 *)((u8 *)cmd + offset + 8), val, BIT(0));
2444 static inline void RTW89_SET_FWCMD_CXROLE_DBCC_CHG(void *cmd, u32 val, u8 offset)
2446 le32p_replace_bits((__le32 *)((u8 *)cmd + offset + 8), val, BIT(1));
2449 static inline void RTW89_SET_FWCMD_CXROLE_DBCC_2G_PHY(void *cmd, u32 val, u8 offset)
2451 le32p_replace_bits((__le32 *)((u8 *)cmd + offset + 8), val, GENMASK(3, 2));
2454 static inline void RTW89_SET_FWCMD_CXROLE_LINK_MODE_CHG(void *cmd, u32 val, u8 offset)
2456 le32p_replace_bits((__le32 *)((u8 *)cmd + offset + 8), val, BIT(4));
2459 static inline void RTW89_SET_FWCMD_CXCTRL_MANUAL(void *cmd, u32 val)
2461 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, BIT(0));
2464 static inline void RTW89_SET_FWCMD_CXCTRL_IGNORE_BT(void *cmd, u32 val)
2466 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, BIT(1));
2469 static inline void RTW89_SET_FWCMD_CXCTRL_ALWAYS_FREERUN(void *cmd, u32 val)
2471 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, BIT(2));
2474 static inline void RTW89_SET_FWCMD_CXCTRL_TRACE_STEP(void *cmd, u32 val)
2476 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(18, 3));
2479 static inline void RTW89_SET_FWCMD_CXTRX_TXLV(void *cmd, u8 val)
2481 u8p_replace_bits((u8 *)cmd + 2, val, GENMASK(7, 0));
2484 static inline void RTW89_SET_FWCMD_CXTRX_RXLV(void *cmd, u8 val)
2486 u8p_replace_bits((u8 *)cmd + 3, val, GENMASK(7, 0));
2489 static inline void RTW89_SET_FWCMD_CXTRX_WLRSSI(void *cmd, u8 val)
2491 u8p_replace_bits((u8 *)cmd + 4, val, GENMASK(7, 0));
2494 static inline void RTW89_SET_FWCMD_CXTRX_BTRSSI(void *cmd, u8 val)
2496 u8p_replace_bits((u8 *)cmd + 5, val, GENMASK(7, 0));
2499 static inline void RTW89_SET_FWCMD_CXTRX_TXPWR(void *cmd, s8 val)
2501 u8p_replace_bits((u8 *)cmd + 6, val, GENMASK(7, 0));
2504 static inline void RTW89_SET_FWCMD_CXTRX_RXGAIN(void *cmd, s8 val)
2506 u8p_replace_bits((u8 *)cmd + 7, val, GENMASK(7, 0));
2509 static inline void RTW89_SET_FWCMD_CXTRX_BTTXPWR(void *cmd, s8 val)
2511 u8p_replace_bits((u8 *)cmd + 8, val, GENMASK(7, 0));
2514 static inline void RTW89_SET_FWCMD_CXTRX_BTRXGAIN(void *cmd, s8 val)
2516 u8p_replace_bits((u8 *)cmd + 9, val, GENMASK(7, 0));
2519 static inline void RTW89_SET_FWCMD_CXTRX_CN(void *cmd, u8 val)
2521 u8p_replace_bits((u8 *)cmd + 10, val, GENMASK(7, 0));
2524 static inline void RTW89_SET_FWCMD_CXTRX_NHM(void *cmd, s8 val)
2526 u8p_replace_bits((u8 *)cmd + 11, val, GENMASK(7, 0));
2529 static inline void RTW89_SET_FWCMD_CXTRX_BTPROFILE(void *cmd, u8 val)
2531 u8p_replace_bits((u8 *)cmd + 12, val, GENMASK(7, 0));
2534 static inline void RTW89_SET_FWCMD_CXTRX_RSVD2(void *cmd, u8 val)
2536 u8p_replace_bits((u8 *)cmd + 13, val, GENMASK(7, 0));
2539 static inline void RTW89_SET_FWCMD_CXTRX_TXRATE(void *cmd, u16 val)
2541 le16p_replace_bits((__le16 *)((u8 *)cmd + 14), val, GENMASK(15, 0));
2544 static inline void RTW89_SET_FWCMD_CXTRX_RXRATE(void *cmd, u16 val)
2546 le16p_replace_bits((__le16 *)((u8 *)cmd + 16), val, GENMASK(15, 0));
2549 static inline void RTW89_SET_FWCMD_CXTRX_TXTP(void *cmd, u32 val)
2551 le32p_replace_bits((__le32 *)((u8 *)cmd + 18), val, GENMASK(31, 0));
2554 static inline void RTW89_SET_FWCMD_CXTRX_RXTP(void *cmd, u32 val)
2556 le32p_replace_bits((__le32 *)((u8 *)cmd + 22), val, GENMASK(31, 0));
2559 static inline void RTW89_SET_FWCMD_CXTRX_RXERRRA(void *cmd, u32 val)
2561 le32p_replace_bits((__le32 *)((u8 *)cmd + 26), val, GENMASK(31, 0));
2564 static inline void RTW89_SET_FWCMD_CXRFK_STATE(void *cmd, u32 val)
2566 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(1, 0));
2569 static inline void RTW89_SET_FWCMD_CXRFK_PATH_MAP(void *cmd, u32 val)
2571 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(5, 2));
2574 static inline void RTW89_SET_FWCMD_CXRFK_PHY_MAP(void *cmd, u32 val)
2576 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(7, 6));
2579 static inline void RTW89_SET_FWCMD_CXRFK_BAND(void *cmd, u32 val)
2581 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(9, 8));
2584 static inline void RTW89_SET_FWCMD_CXRFK_TYPE(void *cmd, u32 val)
2586 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(17, 10));
2589 static inline void RTW89_SET_FWCMD_PACKET_OFLD_PKT_IDX(void *cmd, u32 val)
2591 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0));
2594 static inline void RTW89_SET_FWCMD_PACKET_OFLD_PKT_OP(void *cmd, u32 val)
2596 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(10, 8));
2599 static inline void RTW89_SET_FWCMD_PACKET_OFLD_PKT_LENGTH(void *cmd, u32 val)
2601 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(31, 16));
2604 static inline void RTW89_SET_FWCMD_SCANOFLD_CH_NUM(void *cmd, u32 val)
2606 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0));
2609 static inline void RTW89_SET_FWCMD_SCANOFLD_CH_SIZE(void *cmd, u32 val)
2611 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8));
2614 static inline void RTW89_SET_FWCMD_CHINFO_PERIOD(void *cmd, u32 val)
2616 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0));
2619 static inline void RTW89_SET_FWCMD_CHINFO_DWELL(void *cmd, u32 val)
2621 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8));
2624 static inline void RTW89_SET_FWCMD_CHINFO_CENTER_CH(void *cmd, u32 val)
2626 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(23, 16));
2629 static inline void RTW89_SET_FWCMD_CHINFO_PRI_CH(void *cmd, u32 val)
2631 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(31, 24));
2634 static inline void RTW89_SET_FWCMD_CHINFO_BW(void *cmd, u32 val)
2636 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(2, 0));
2639 static inline void RTW89_SET_FWCMD_CHINFO_ACTION(void *cmd, u32 val)
2641 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(7, 3));
2644 static inline void RTW89_SET_FWCMD_CHINFO_NUM_PKT(void *cmd, u32 val)
2646 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(11, 8));
2649 static inline void RTW89_SET_FWCMD_CHINFO_TX(void *cmd, u32 val)
2651 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(12));
2654 static inline void RTW89_SET_FWCMD_CHINFO_PAUSE_DATA(void *cmd, u32 val)
2656 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(13));
2659 static inline void RTW89_SET_FWCMD_CHINFO_BAND(void *cmd, u32 val)
2661 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(15, 14));
2664 static inline void RTW89_SET_FWCMD_CHINFO_PKT_ID(void *cmd, u32 val)
2666 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(23, 16));
2669 static inline void RTW89_SET_FWCMD_CHINFO_DFS(void *cmd, u32 val)
2671 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(24));
2674 static inline void RTW89_SET_FWCMD_CHINFO_TX_NULL(void *cmd, u32 val)
2676 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(25));
2679 static inline void RTW89_SET_FWCMD_CHINFO_RANDOM(void *cmd, u32 val)
2681 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(26));
2684 static inline void RTW89_SET_FWCMD_CHINFO_CFG_TX(void *cmd, u32 val)
2686 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(27));
2689 static inline void RTW89_SET_FWCMD_CHINFO_PKT0(void *cmd, u32 val)
2691 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(7, 0));
2694 static inline void RTW89_SET_FWCMD_CHINFO_PKT1(void *cmd, u32 val)
2696 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(15, 8));
2699 static inline void RTW89_SET_FWCMD_CHINFO_PKT2(void *cmd, u32 val)
2701 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(23, 16));
2704 static inline void RTW89_SET_FWCMD_CHINFO_PKT3(void *cmd, u32 val)
2706 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(31, 24));
2709 static inline void RTW89_SET_FWCMD_CHINFO_PKT4(void *cmd, u32 val)
2711 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(7, 0));
2714 static inline void RTW89_SET_FWCMD_CHINFO_PKT5(void *cmd, u32 val)
2716 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(15, 8));
2719 static inline void RTW89_SET_FWCMD_CHINFO_PKT6(void *cmd, u32 val)
2721 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(23, 16));
2724 static inline void RTW89_SET_FWCMD_CHINFO_PKT7(void *cmd, u32 val)
2726 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(31, 24));
2729 static inline void RTW89_SET_FWCMD_CHINFO_POWER_IDX(void *cmd, u32 val)
2731 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 16), val, GENMASK(15, 0));
2734 static inline void RTW89_SET_FWCMD_SCANOFLD_MACID(void *cmd, u32 val)
2736 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0));
2739 static inline void RTW89_SET_FWCMD_SCANOFLD_NORM_CY(void *cmd, u32 val)
2741 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8));
2744 static inline void RTW89_SET_FWCMD_SCANOFLD_PORT_ID(void *cmd, u32 val)
2746 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(18, 16));
2749 static inline void RTW89_SET_FWCMD_SCANOFLD_BAND(void *cmd, u32 val)
2751 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, BIT(19));
2754 static inline void RTW89_SET_FWCMD_SCANOFLD_OPERATION(void *cmd, u32 val)
2756 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(21, 20));
2759 static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BAND(void *cmd, u32 val)
2761 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(23, 22));
2764 static inline void RTW89_SET_FWCMD_SCANOFLD_NOTIFY_END(void *cmd, u32 val)
2766 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(0));
2769 static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_MODE(void *cmd, u32 val)
2771 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(1));
2774 static inline void RTW89_SET_FWCMD_SCANOFLD_START_MODE(void *cmd, u32 val)
2776 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(2));
2779 static inline void RTW89_SET_FWCMD_SCANOFLD_SCAN_TYPE(void *cmd, u32 val)
2781 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(4, 3));
2784 static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BW(void *cmd, u32 val)
2786 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(7, 5));
2789 static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_PRI_CH(void *cmd, u32 val)
2791 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(15, 8));
2794 static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CENTRAL_CH(void *cmd,
2797 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(23, 16));
2800 static inline void RTW89_SET_FWCMD_SCANOFLD_PROBE_REQ_PKT_ID(void *cmd, u32 val)
2802 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(31, 24));
2805 static inline void RTW89_SET_FWCMD_SCANOFLD_NORM_PD(void *cmd, u32 val)
2807 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(15, 0));
2810 static inline void RTW89_SET_FWCMD_SCANOFLD_SLOW_PD(void *cmd, u32 val)
2812 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(23, 16));
2815 static inline void RTW89_SET_FWCMD_SCANOFLD_TSF_HIGH(void *cmd, u32 val)
2817 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(31, 0));
2820 static inline void RTW89_SET_FWCMD_SCANOFLD_TSF_SLOW(void *cmd, u32 val)
2822 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 16), val, GENMASK(31, 0));
2825 static inline void RTW89_SET_FWCMD_P2P_MACID(void *cmd, u32 val)
2827 le32p_replace_bits((__le32 *)cmd, val, GENMASK(7, 0));
2830 static inline void RTW89_SET_FWCMD_P2P_P2PID(void *cmd, u32 val)
2832 le32p_replace_bits((__le32 *)cmd, val, GENMASK(11, 8));
2835 static inline void RTW89_SET_FWCMD_P2P_NOAID(void *cmd, u32 val)
2837 le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 12));
2840 static inline void RTW89_SET_FWCMD_P2P_ACT(void *cmd, u32 val)
2842 le32p_replace_bits((__le32 *)cmd, val, GENMASK(19, 16));
2845 static inline void RTW89_SET_FWCMD_P2P_TYPE(void *cmd, u32 val)
2847 le32p_replace_bits((__le32 *)cmd, val, BIT(20));
2850 static inline void RTW89_SET_FWCMD_P2P_ALL_SLEP(void *cmd, u32 val)
2852 le32p_replace_bits((__le32 *)cmd, val, BIT(21));
2855 static inline void RTW89_SET_FWCMD_NOA_START_TIME(void *cmd, __le32 val)
2857 *((__le32 *)cmd + 1) = val;
2860 static inline void RTW89_SET_FWCMD_NOA_INTERVAL(void *cmd, __le32 val)
2862 *((__le32 *)cmd + 2) = val;
2865 static inline void RTW89_SET_FWCMD_NOA_DURATION(void *cmd, __le32 val)
2867 *((__le32 *)cmd + 3) = val;
2870 static inline void RTW89_SET_FWCMD_NOA_COUNT(void *cmd, u32 val)
2872 le32p_replace_bits((__le32 *)(cmd) + 4, val, GENMASK(7, 0));
2875 static inline void RTW89_SET_FWCMD_NOA_CTWINDOW(void *cmd, u32 val)
2879 if (!(val & IEEE80211_P2P_OPPPS_ENABLE_BIT))
2881 ctwnd = FIELD_GET(IEEE80211_P2P_OPPPS_CTWINDOW_MASK, val);
2882 le32p_replace_bits((__le32 *)(cmd) + 4, ctwnd, GENMASK(23, 8));
2885 static inline void RTW89_SET_FWCMD_TSF32_TOGL_BAND(void *cmd, u32 val)
2887 le32p_replace_bits((__le32 *)cmd, val, BIT(0));
2890 static inline void RTW89_SET_FWCMD_TSF32_TOGL_EN(void *cmd, u32 val)
2892 le32p_replace_bits((__le32 *)cmd, val, BIT(1));
2895 static inline void RTW89_SET_FWCMD_TSF32_TOGL_PORT(void *cmd, u32 val)
2897 le32p_replace_bits((__le32 *)cmd, val, GENMASK(4, 2));
2900 static inline void RTW89_SET_FWCMD_TSF32_TOGL_EARLY(void *cmd, u32 val)
2902 le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 16));
2905 enum rtw89_fw_mcc_c2h_rpt_cfg {
2906 RTW89_FW_MCC_C2H_RPT_OFF = 0,
2907 RTW89_FW_MCC_C2H_RPT_FAIL_ONLY = 1,
2908 RTW89_FW_MCC_C2H_RPT_ALL = 2,
2911 struct rtw89_fw_mcc_add_req {
2916 enum rtw89_bandwidth bandwidth: 4;
2920 u32 dis_sw_retry: 1;
2922 u32 sw_retry_count: 3;
2923 u32 tx_null_early: 4;
2927 u32 ch_band_type: 2;
2936 static inline void RTW89_SET_FWCMD_ADD_MCC_MACID(void *cmd, u32 val)
2938 le32p_replace_bits((__le32 *)cmd, val, GENMASK(7, 0));
2941 static inline void RTW89_SET_FWCMD_ADD_MCC_CENTRAL_CH_SEG0(void *cmd, u32 val)
2943 le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8));
2946 static inline void RTW89_SET_FWCMD_ADD_MCC_CENTRAL_CH_SEG1(void *cmd, u32 val)
2948 le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16));
2951 static inline void RTW89_SET_FWCMD_ADD_MCC_PRIMARY_CH(void *cmd, u32 val)
2953 le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24));
2956 static inline void RTW89_SET_FWCMD_ADD_MCC_BANDWIDTH(void *cmd, u32 val)
2958 le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(3, 0));
2961 static inline void RTW89_SET_FWCMD_ADD_MCC_GROUP(void *cmd, u32 val)
2963 le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(5, 4));
2966 static inline void RTW89_SET_FWCMD_ADD_MCC_C2H_RPT(void *cmd, u32 val)
2968 le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(7, 6));
2971 static inline void RTW89_SET_FWCMD_ADD_MCC_DIS_TX_NULL(void *cmd, u32 val)
2973 le32p_replace_bits((__le32 *)cmd + 1, val, BIT(8));
2976 static inline void RTW89_SET_FWCMD_ADD_MCC_DIS_SW_RETRY(void *cmd, u32 val)
2978 le32p_replace_bits((__le32 *)cmd + 1, val, BIT(9));
2981 static inline void RTW89_SET_FWCMD_ADD_MCC_IN_CURR_CH(void *cmd, u32 val)
2983 le32p_replace_bits((__le32 *)cmd + 1, val, BIT(10));
2986 static inline void RTW89_SET_FWCMD_ADD_MCC_SW_RETRY_COUNT(void *cmd, u32 val)
2988 le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(13, 11));
2991 static inline void RTW89_SET_FWCMD_ADD_MCC_TX_NULL_EARLY(void *cmd, u32 val)
2993 le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(17, 14));
2996 static inline void RTW89_SET_FWCMD_ADD_MCC_BTC_IN_2G(void *cmd, u32 val)
2998 le32p_replace_bits((__le32 *)cmd + 1, val, BIT(18));
3001 static inline void RTW89_SET_FWCMD_ADD_MCC_PTA_EN(void *cmd, u32 val)
3003 le32p_replace_bits((__le32 *)cmd + 1, val, BIT(19));
3006 static inline void RTW89_SET_FWCMD_ADD_MCC_RFK_BY_PASS(void *cmd, u32 val)
3008 le32p_replace_bits((__le32 *)cmd + 1, val, BIT(20));
3011 static inline void RTW89_SET_FWCMD_ADD_MCC_CH_BAND_TYPE(void *cmd, u32 val)
3013 le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(22, 21));
3016 static inline void RTW89_SET_FWCMD_ADD_MCC_DURATION(void *cmd, u32 val)
3018 le32p_replace_bits((__le32 *)cmd + 2, val, GENMASK(31, 0));
3021 static inline void RTW89_SET_FWCMD_ADD_MCC_COURTESY_EN(void *cmd, u32 val)
3023 le32p_replace_bits((__le32 *)cmd + 3, val, BIT(0));
3026 static inline void RTW89_SET_FWCMD_ADD_MCC_COURTESY_NUM(void *cmd, u32 val)
3028 le32p_replace_bits((__le32 *)cmd + 3, val, GENMASK(15, 8));
3031 static inline void RTW89_SET_FWCMD_ADD_MCC_COURTESY_TARGET(void *cmd, u32 val)
3033 le32p_replace_bits((__le32 *)cmd + 3, val, GENMASK(23, 16));
3036 struct rtw89_fw_mcc_start_req {
3038 u32 btc_in_group: 1;
3039 u32 old_group_action: 2;
3044 u32 notify_rxdbg_en: 1;
3051 static inline void RTW89_SET_FWCMD_START_MCC_GROUP(void *cmd, u32 val)
3053 le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0));
3056 static inline void RTW89_SET_FWCMD_START_MCC_BTC_IN_GROUP(void *cmd, u32 val)
3058 le32p_replace_bits((__le32 *)cmd, val, BIT(2));
3061 static inline void RTW89_SET_FWCMD_START_MCC_OLD_GROUP_ACTION(void *cmd, u32 val)
3063 le32p_replace_bits((__le32 *)cmd, val, GENMASK(4, 3));
3066 static inline void RTW89_SET_FWCMD_START_MCC_OLD_GROUP(void *cmd, u32 val)
3068 le32p_replace_bits((__le32 *)cmd, val, GENMASK(6, 5));
3071 static inline void RTW89_SET_FWCMD_START_MCC_NOTIFY_CNT(void *cmd, u32 val)
3073 le32p_replace_bits((__le32 *)cmd, val, GENMASK(18, 16));
3076 static inline void RTW89_SET_FWCMD_START_MCC_NOTIFY_RXDBG_EN(void *cmd, u32 val)
3078 le32p_replace_bits((__le32 *)cmd, val, BIT(21));
3081 static inline void RTW89_SET_FWCMD_START_MCC_MACID(void *cmd, u32 val)
3083 le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24));
3086 static inline void RTW89_SET_FWCMD_START_MCC_TSF_LOW(void *cmd, u32 val)
3088 le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(31, 0));
3091 static inline void RTW89_SET_FWCMD_START_MCC_TSF_HIGH(void *cmd, u32 val)
3093 le32p_replace_bits((__le32 *)cmd + 2, val, GENMASK(31, 0));
3096 static inline void RTW89_SET_FWCMD_STOP_MCC_MACID(void *cmd, u32 val)
3098 le32p_replace_bits((__le32 *)cmd, val, GENMASK(7, 0));
3101 static inline void RTW89_SET_FWCMD_STOP_MCC_GROUP(void *cmd, u32 val)
3103 le32p_replace_bits((__le32 *)cmd, val, GENMASK(9, 8));
3106 static inline void RTW89_SET_FWCMD_STOP_MCC_PREV_GROUPS(void *cmd, u32 val)
3108 le32p_replace_bits((__le32 *)cmd, val, BIT(10));
3111 static inline void RTW89_SET_FWCMD_DEL_MCC_GROUP_GROUP(void *cmd, u32 val)
3113 le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0));
3116 static inline void RTW89_SET_FWCMD_DEL_MCC_GROUP_PREV_GROUPS(void *cmd, u32 val)
3118 le32p_replace_bits((__le32 *)cmd, val, BIT(2));
3121 static inline void RTW89_SET_FWCMD_RESET_MCC_GROUP_GROUP(void *cmd, u32 val)
3123 le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0));
3126 struct rtw89_fw_mcc_tsf_req {
3134 static inline void RTW89_SET_FWCMD_MCC_REQ_TSF_GROUP(void *cmd, u32 val)
3136 le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0));
3139 static inline void RTW89_SET_FWCMD_MCC_REQ_TSF_MACID_X(void *cmd, u32 val)
3141 le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8));
3144 static inline void RTW89_SET_FWCMD_MCC_REQ_TSF_MACID_Y(void *cmd, u32 val)
3146 le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16));
3149 static inline void RTW89_SET_FWCMD_MCC_MACID_BITMAP_GROUP(void *cmd, u32 val)
3151 le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0));
3154 static inline void RTW89_SET_FWCMD_MCC_MACID_BITMAP_MACID(void *cmd, u32 val)
3156 le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8));
3159 static inline void RTW89_SET_FWCMD_MCC_MACID_BITMAP_BITMAP_LENGTH(void *cmd, u32 val)
3161 le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16));
3164 static inline void RTW89_SET_FWCMD_MCC_MACID_BITMAP_BITMAP(void *cmd,
3167 memcpy((__le32 *)cmd + 1, bitmap, len);
3170 static inline void RTW89_SET_FWCMD_MCC_SYNC_GROUP(void *cmd, u32 val)
3172 le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0));
3175 static inline void RTW89_SET_FWCMD_MCC_SYNC_MACID_SOURCE(void *cmd, u32 val)
3177 le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8));
3180 static inline void RTW89_SET_FWCMD_MCC_SYNC_MACID_TARGET(void *cmd, u32 val)
3182 le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16));
3185 static inline void RTW89_SET_FWCMD_MCC_SYNC_SYNC_OFFSET(void *cmd, u32 val)
3187 le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24));
3190 struct rtw89_fw_mcc_duration {
3192 u32 btc_in_group: 1;
3203 static inline void RTW89_SET_FWCMD_MCC_SET_DURATION_GROUP(void *cmd, u32 val)
3205 le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0));
3209 inline void RTW89_SET_FWCMD_MCC_SET_DURATION_BTC_IN_GROUP(void *cmd, u32 val)
3211 le32p_replace_bits((__le32 *)cmd, val, BIT(2));
3215 inline void RTW89_SET_FWCMD_MCC_SET_DURATION_START_MACID(void *cmd, u32 val)
3217 le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8));
3220 static inline void RTW89_SET_FWCMD_MCC_SET_DURATION_MACID_X(void *cmd, u32 val)
3222 le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16));
3225 static inline void RTW89_SET_FWCMD_MCC_SET_DURATION_MACID_Y(void *cmd, u32 val)
3227 le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24));
3231 inline void RTW89_SET_FWCMD_MCC_SET_DURATION_START_TSF_LOW(void *cmd, u32 val)
3233 le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(31, 0));
3237 inline void RTW89_SET_FWCMD_MCC_SET_DURATION_START_TSF_HIGH(void *cmd, u32 val)
3239 le32p_replace_bits((__le32 *)cmd + 2, val, GENMASK(31, 0));
3243 inline void RTW89_SET_FWCMD_MCC_SET_DURATION_DURATION_X(void *cmd, u32 val)
3245 le32p_replace_bits((__le32 *)cmd + 3, val, GENMASK(31, 0));
3249 inline void RTW89_SET_FWCMD_MCC_SET_DURATION_DURATION_Y(void *cmd, u32 val)
3251 le32p_replace_bits((__le32 *)cmd + 4, val, GENMASK(31, 0));
3254 #define RTW89_C2H_HEADER_LEN 8
3256 #define RTW89_GET_C2H_CATEGORY(c2h) \
3257 le32_get_bits(*((const __le32 *)c2h), GENMASK(1, 0))
3258 #define RTW89_GET_C2H_CLASS(c2h) \
3259 le32_get_bits(*((const __le32 *)c2h), GENMASK(7, 2))
3260 #define RTW89_GET_C2H_FUNC(c2h) \
3261 le32_get_bits(*((const __le32 *)c2h), GENMASK(15, 8))
3262 #define RTW89_GET_C2H_LEN(c2h) \
3263 le32_get_bits(*((const __le32 *)(c2h) + 1), GENMASK(13, 0))
3265 struct rtw89_fw_c2h_attr {
3272 static inline struct rtw89_fw_c2h_attr *RTW89_SKB_C2H_CB(struct sk_buff *skb)
3274 static_assert(sizeof(skb->cb) >= sizeof(struct rtw89_fw_c2h_attr));
3276 return (struct rtw89_fw_c2h_attr *)skb->cb;
3279 #define RTW89_GET_C2H_LOG_SRT_PRT(c2h) (char *)((__le32 *)(c2h) + 2)
3280 #define RTW89_GET_C2H_LOG_LEN(len) ((len) - RTW89_C2H_HEADER_LEN)
3282 #define RTW89_GET_MAC_C2H_DONE_ACK_CAT(c2h) \
3283 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(1, 0))
3284 #define RTW89_GET_MAC_C2H_DONE_ACK_CLASS(c2h) \
3285 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 2))
3286 #define RTW89_GET_MAC_C2H_DONE_ACK_FUNC(c2h) \
3287 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8))
3288 #define RTW89_GET_MAC_C2H_DONE_ACK_H2C_RETURN(c2h) \
3289 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 16))
3290 #define RTW89_GET_MAC_C2H_DONE_ACK_H2C_SEQ(c2h) \
3291 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 24))
3293 #define RTW89_GET_MAC_C2H_REV_ACK_CAT(c2h) \
3294 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(1, 0))
3295 #define RTW89_GET_MAC_C2H_REV_ACK_CLASS(c2h) \
3296 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 2))
3297 #define RTW89_GET_MAC_C2H_REV_ACK_FUNC(c2h) \
3298 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8))
3299 #define RTW89_GET_MAC_C2H_REV_ACK_H2C_SEQ(c2h) \
3300 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 16))
3302 struct rtw89_c2h_mac_bcnfltr_rpt {
3308 #define RTW89_C2H_MAC_BCNFLTR_RPT_W2_MACID GENMASK(7, 0)
3309 #define RTW89_C2H_MAC_BCNFLTR_RPT_W2_TYPE GENMASK(9, 8)
3310 #define RTW89_C2H_MAC_BCNFLTR_RPT_W2_EVENT GENMASK(11, 10)
3311 #define RTW89_C2H_MAC_BCNFLTR_RPT_W2_MA GENMASK(23, 16)
3313 #define RTW89_GET_PHY_C2H_RA_RPT_MACID(c2h) \
3314 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 0))
3315 #define RTW89_GET_PHY_C2H_RA_RPT_RETRY_RATIO(c2h) \
3316 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 16))
3317 #define RTW89_GET_PHY_C2H_RA_RPT_MCSNSS(c2h) \
3318 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(6, 0))
3319 #define RTW89_GET_PHY_C2H_RA_RPT_MD_SEL(c2h) \
3320 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(9, 8))
3321 #define RTW89_GET_PHY_C2H_RA_RPT_GILTF(c2h) \
3322 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(12, 10))
3323 #define RTW89_GET_PHY_C2H_RA_RPT_BW(c2h) \
3324 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(14, 13))
3326 /* VHT, HE, HT-old: [6:4]: NSS, [3:0]: MCS
3327 * HT-new: [6:5]: NA, [4:0]: MCS
3329 #define RTW89_RA_RATE_MASK_NSS GENMASK(6, 4)
3330 #define RTW89_RA_RATE_MASK_MCS GENMASK(3, 0)
3331 #define RTW89_RA_RATE_MASK_HT_MCS GENMASK(4, 0)
3332 #define RTW89_MK_HT_RATE(nss, mcs) (FIELD_PREP(GENMASK(4, 3), nss) | \
3333 FIELD_PREP(GENMASK(2, 0), mcs))
3335 #define RTW89_GET_MAC_C2H_PKTOFLD_ID(c2h) \
3336 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 0))
3337 #define RTW89_GET_MAC_C2H_PKTOFLD_OP(c2h) \
3338 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(10, 8))
3339 #define RTW89_GET_MAC_C2H_PKTOFLD_LEN(c2h) \
3340 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 16))
3342 #define RTW89_GET_MAC_C2H_SCANOFLD_PRI_CH(c2h) \
3343 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 0))
3344 #define RTW89_GET_MAC_C2H_SCANOFLD_RSP(c2h) \
3345 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(19, 16))
3346 #define RTW89_GET_MAC_C2H_SCANOFLD_STATUS(c2h) \
3347 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 20))
3348 #define RTW89_GET_MAC_C2H_ACTUAL_PERIOD(c2h) \
3349 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 24))
3350 #define RTW89_GET_MAC_C2H_SCANOFLD_TX_FAIL(c2h) \
3351 le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(3, 0))
3352 #define RTW89_GET_MAC_C2H_SCANOFLD_AIR_DENSITY(c2h) \
3353 le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(7, 4))
3354 #define RTW89_GET_MAC_C2H_SCANOFLD_BAND(c2h) \
3355 le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(25, 24))
3357 #define RTW89_GET_MAC_C2H_MCC_RCV_ACK_GROUP(c2h) \
3358 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(1, 0))
3359 #define RTW89_GET_MAC_C2H_MCC_RCV_ACK_H2C_FUNC(c2h) \
3360 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8))
3362 #define RTW89_GET_MAC_C2H_MCC_REQ_ACK_GROUP(c2h) \
3363 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(1, 0))
3364 #define RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_RETURN(c2h) \
3365 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 2))
3366 #define RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_FUNC(c2h) \
3367 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8))
3369 struct rtw89_mac_mcc_tsf_rpt {
3378 static_assert(sizeof(struct rtw89_mac_mcc_tsf_rpt) <= RTW89_COMPLETION_BUF_SIZE);
3380 #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_X(c2h) \
3381 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 0))
3382 #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_Y(c2h) \
3383 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8))
3384 #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_GROUP(c2h) \
3385 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(17, 16))
3386 #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_X(c2h) \
3387 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(31, 0))
3388 #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_X(c2h) \
3389 le32_get_bits(*((const __le32 *)(c2h) + 4), GENMASK(31, 0))
3390 #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_Y(c2h) \
3391 le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(31, 0))
3392 #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_Y(c2h) \
3393 le32_get_bits(*((const __le32 *)(c2h) + 6), GENMASK(31, 0))
3395 #define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_STATUS(c2h) \
3396 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(5, 0))
3397 #define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_GROUP(c2h) \
3398 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 6))
3399 #define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_MACID(c2h) \
3400 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8))
3401 #define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_LOW(c2h) \
3402 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(31, 0))
3403 #define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_HIGH(c2h) \
3404 le32_get_bits(*((const __le32 *)(c2h) + 4), GENMASK(31, 0))
3406 struct rtw89_h2c_bcnfltr {
3410 #define RTW89_H2C_BCNFLTR_W0_MON_RSSI BIT(0)
3411 #define RTW89_H2C_BCNFLTR_W0_MON_BCN BIT(1)
3412 #define RTW89_H2C_BCNFLTR_W0_MON_EN BIT(2)
3413 #define RTW89_H2C_BCNFLTR_W0_MODE GENMASK(4, 3)
3414 #define RTW89_H2C_BCNFLTR_W0_BCN_LOSS_CNT GENMASK(11, 8)
3415 #define RTW89_H2C_BCNFLTR_W0_RSSI_HYST GENMASK(15, 12)
3416 #define RTW89_H2C_BCNFLTR_W0_RSSI_THRESHOLD GENMASK(23, 16)
3417 #define RTW89_H2C_BCNFLTR_W0_MAC_ID GENMASK(31, 24)
3419 struct rtw89_h2c_ofld_rssi {
3424 #define RTW89_H2C_OFLD_RSSI_W0_MACID GENMASK(7, 0)
3425 #define RTW89_H2C_OFLD_RSSI_W0_NUM GENMASK(15, 8)
3426 #define RTW89_H2C_OFLD_RSSI_W1_VAL GENMASK(7, 0)
3428 #define RTW89_FW_HDR_SIZE 32
3429 #define RTW89_FW_SECTION_HDR_SIZE 16
3431 #define RTW89_MFW_SIG 0xFF
3433 struct rtw89_mfw_info {
3435 u8 type; /* enum rtw89_fw_type */
3443 struct rtw89_mfw_hdr {
3444 u8 sig; /* RTW89_MFW_SIG */
3454 struct rtw89_mfw_info info[];
3462 union rtw89_compat_fw_hdr {
3463 struct rtw89_mfw_hdr mfw_hdr;
3464 u8 fw_hdr[RTW89_FW_HDR_SIZE];
3467 static inline u32 rtw89_compat_fw_hdr_ver_code(const void *fw_buf)
3469 const union rtw89_compat_fw_hdr *compat = (typeof(compat))fw_buf;
3471 if (compat->mfw_hdr.sig == RTW89_MFW_SIG)
3472 return RTW89_MFW_HDR_VER_CODE(&compat->mfw_hdr);
3474 return RTW89_FW_HDR_VER_CODE(&compat->fw_hdr);
3477 static inline void rtw89_fw_get_filename(char *buf, size_t size,
3478 const char *fw_basename, int fw_format)
3481 snprintf(buf, size, "%s.bin", fw_basename);
3483 snprintf(buf, size, "%s-%d.bin", fw_basename, fw_format);
3486 #define RTW89_H2C_RF_PAGE_SIZE 500
3487 #define RTW89_H2C_RF_PAGE_NUM 3
3488 struct rtw89_fw_h2c_rf_reg_info {
3489 enum rtw89_rf_path rf_path;
3490 __le32 rtw89_phy_config_rf_h2c[RTW89_H2C_RF_PAGE_NUM][RTW89_H2C_RF_PAGE_SIZE];
3494 #define H2C_SEC_CAM_LEN 24
3496 #define H2C_HEADER_LEN 8
3497 #define H2C_HDR_CAT GENMASK(1, 0)
3498 #define H2C_HDR_CLASS GENMASK(7, 2)
3499 #define H2C_HDR_FUNC GENMASK(15, 8)
3500 #define H2C_HDR_DEL_TYPE GENMASK(19, 16)
3501 #define H2C_HDR_H2C_SEQ GENMASK(31, 24)
3502 #define H2C_HDR_TOTAL_LEN GENMASK(13, 0)
3503 #define H2C_HDR_REC_ACK BIT(14)
3504 #define H2C_HDR_DONE_ACK BIT(15)
3506 #define FWCMD_TYPE_H2C 0
3508 #define H2C_CAT_TEST 0x0
3510 /* CLASS 5 - FW STATUS TEST */
3511 #define H2C_CL_FW_STATUS_TEST 0x5
3512 #define H2C_FUNC_CPU_EXCEPTION 0x1
3514 #define H2C_CAT_MAC 0x1
3516 /* CLASS 0 - FW INFO */
3517 #define H2C_CL_FW_INFO 0x0
3518 #define H2C_FUNC_LOG_CFG 0x0
3519 #define H2C_FUNC_MAC_GENERAL_PKT 0x1
3522 #define H2C_CL_MAC_WOW 0x1
3523 #define H2C_FUNC_KEEP_ALIVE 0x0
3524 #define H2C_FUNC_DISCONNECT_DETECT 0x1
3525 #define H2C_FUNC_WOW_GLOBAL 0x2
3526 #define H2C_FUNC_WAKEUP_CTRL 0x8
3527 #define H2C_FUNC_WOW_CAM_UPD 0xC
3530 #define H2C_CL_MAC_PS 0x2
3531 #define H2C_FUNC_MAC_LPS_PARM 0x0
3532 #define H2C_FUNC_P2P_ACT 0x1
3534 /* CLASS 3 - FW download */
3535 #define H2C_CL_MAC_FWDL 0x3
3536 #define H2C_FUNC_MAC_FWHDR_DL 0x0
3538 /* CLASS 5 - Frame Exchange */
3539 #define H2C_CL_MAC_FR_EXCHG 0x5
3540 #define H2C_FUNC_MAC_CCTLINFO_UD 0x2
3541 #define H2C_FUNC_MAC_BCN_UPD 0x5
3542 #define H2C_FUNC_MAC_DCTLINFO_UD_V1 0x9
3543 #define H2C_FUNC_MAC_CCTLINFO_UD_V1 0xa
3545 /* CLASS 6 - Address CAM */
3546 #define H2C_CL_MAC_ADDR_CAM_UPDATE 0x6
3547 #define H2C_FUNC_MAC_ADDR_CAM_UPD 0x0
3549 /* CLASS 8 - Media Status Report */
3550 #define H2C_CL_MAC_MEDIA_RPT 0x8
3551 #define H2C_FUNC_MAC_JOININFO 0x0
3552 #define H2C_FUNC_MAC_FWROLE_MAINTAIN 0x4
3554 /* CLASS 9 - FW offload */
3555 #define H2C_CL_MAC_FW_OFLD 0x9
3556 #define H2C_FUNC_PACKET_OFLD 0x1
3557 #define H2C_FUNC_MAC_MACID_PAUSE 0x8
3558 #define H2C_FUNC_USR_EDCA 0xF
3559 #define H2C_FUNC_TSF32_TOGL 0x10
3560 #define H2C_FUNC_OFLD_CFG 0x14
3561 #define H2C_FUNC_ADD_SCANOFLD_CH 0x16
3562 #define H2C_FUNC_SCANOFLD 0x17
3563 #define H2C_FUNC_PKT_DROP 0x1b
3564 #define H2C_FUNC_CFG_BCNFLTR 0x1e
3565 #define H2C_FUNC_OFLD_RSSI 0x1f
3567 /* CLASS 10 - Security CAM */
3568 #define H2C_CL_MAC_SEC_CAM 0xa
3569 #define H2C_FUNC_MAC_SEC_UPD 0x1
3571 /* CLASS 12 - BA CAM */
3572 #define H2C_CL_BA_CAM 0xc
3573 #define H2C_FUNC_MAC_BA_CAM 0x0
3575 /* CLASS 14 - MCC */
3576 #define H2C_CL_MCC 0xe
3577 enum rtw89_mcc_h2c_func {
3578 H2C_FUNC_ADD_MCC = 0x0,
3579 H2C_FUNC_START_MCC = 0x1,
3580 H2C_FUNC_STOP_MCC = 0x2,
3581 H2C_FUNC_DEL_MCC_GROUP = 0x3,
3582 H2C_FUNC_RESET_MCC_GROUP = 0x4,
3583 H2C_FUNC_MCC_REQ_TSF = 0x5,
3584 H2C_FUNC_MCC_MACID_BITMAP = 0x6,
3585 H2C_FUNC_MCC_SYNC = 0x7,
3586 H2C_FUNC_MCC_SET_DURATION = 0x8,
3588 NUM_OF_RTW89_MCC_H2C_FUNC,
3591 #define RTW89_MCC_WAIT_COND(group, func) \
3592 ((group) * NUM_OF_RTW89_MCC_H2C_FUNC + (func))
3594 #define H2C_CAT_OUTSRC 0x2
3596 #define H2C_CL_OUTSRC_RA 0x1
3597 #define H2C_FUNC_OUTSRC_RA_MACIDCFG 0x0
3599 #define H2C_CL_OUTSRC_RF_REG_A 0x8
3600 #define H2C_CL_OUTSRC_RF_REG_B 0x9
3601 #define H2C_CL_OUTSRC_RF_FW_NOTIFY 0xa
3602 #define H2C_FUNC_OUTSRC_RF_GET_MCCCH 0x2
3604 struct rtw89_fw_h2c_rf_get_mccch {
3609 __le32 current_channel;
3610 __le32 current_band_type;
3613 #define RTW89_FW_RSVD_PLE_SIZE 0x800
3615 #define RTW89_WCPU_BASE_MASK GENMASK(27, 0)
3617 #define RTW89_FW_BACKTRACE_INFO_SIZE 8
3618 #define RTW89_VALID_FW_BACKTRACE_SIZE(_size) \
3619 ((_size) % RTW89_FW_BACKTRACE_INFO_SIZE == 0)
3621 #define RTW89_FW_BACKTRACE_MAX_SIZE 512 /* 8 * 64 (entries) */
3622 #define RTW89_FW_BACKTRACE_KEY 0xBACEBACE
3624 int rtw89_fw_check_rdy(struct rtw89_dev *rtwdev);
3625 int rtw89_fw_recognize(struct rtw89_dev *rtwdev);
3626 const struct firmware *
3627 rtw89_early_fw_feature_recognize(struct device *device,
3628 const struct rtw89_chip_info *chip,
3629 struct rtw89_fw_info *early_fw,
3630 int *used_fw_format);
3631 int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type);
3632 void rtw89_load_firmware_work(struct work_struct *work);
3633 void rtw89_unload_firmware(struct rtw89_dev *rtwdev);
3634 int rtw89_wait_firmware_completion(struct rtw89_dev *rtwdev);
3635 void rtw89_h2c_pkt_set_hdr(struct rtw89_dev *rtwdev, struct sk_buff *skb,
3636 u8 type, u8 cat, u8 class, u8 func,
3637 bool rack, bool dack, u32 len);
3638 int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev,
3639 struct rtw89_vif *rtwvif);
3640 int rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev *rtwdev,
3641 struct ieee80211_vif *vif,
3642 struct ieee80211_sta *sta);
3643 int rtw89_fw_h2c_txtime_cmac_tbl(struct rtw89_dev *rtwdev,
3644 struct rtw89_sta *rtwsta);
3645 int rtw89_fw_h2c_txpath_cmac_tbl(struct rtw89_dev *rtwdev,
3646 struct rtw89_sta *rtwsta);
3647 int rtw89_fw_h2c_update_beacon(struct rtw89_dev *rtwdev,
3648 struct rtw89_vif *rtwvif);
3649 int rtw89_fw_h2c_cam(struct rtw89_dev *rtwdev, struct rtw89_vif *vif,
3650 struct rtw89_sta *rtwsta, const u8 *scan_mac_addr);
3651 int rtw89_fw_h2c_dctl_sec_cam_v1(struct rtw89_dev *rtwdev,
3652 struct rtw89_vif *rtwvif,
3653 struct rtw89_sta *rtwsta);
3654 void rtw89_fw_c2h_irqsafe(struct rtw89_dev *rtwdev, struct sk_buff *c2h);
3655 void rtw89_fw_c2h_work(struct work_struct *work);
3656 int rtw89_fw_h2c_role_maintain(struct rtw89_dev *rtwdev,
3657 struct rtw89_vif *rtwvif,
3658 struct rtw89_sta *rtwsta,
3659 enum rtw89_upd_mode upd_mode);
3660 int rtw89_fw_h2c_join_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
3661 struct rtw89_sta *rtwsta, bool dis_conn);
3662 int rtw89_fw_h2c_macid_pause(struct rtw89_dev *rtwdev, u8 sh, u8 grp,
3664 int rtw89_fw_h2c_set_edca(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
3666 int rtw89_fw_h2c_set_ofld_cfg(struct rtw89_dev *rtwdev);
3667 int rtw89_fw_h2c_set_bcn_fltr_cfg(struct rtw89_dev *rtwdev,
3668 struct ieee80211_vif *vif,
3670 int rtw89_fw_h2c_rssi_offload(struct rtw89_dev *rtwdev,
3671 struct rtw89_rx_phy_ppdu *phy_ppdu);
3672 int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi);
3673 int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev);
3674 int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev);
3675 int rtw89_fw_h2c_cxdrv_role_v1(struct rtw89_dev *rtwdev);
3676 int rtw89_fw_h2c_cxdrv_role_v2(struct rtw89_dev *rtwdev);
3677 int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev);
3678 int rtw89_fw_h2c_cxdrv_trx(struct rtw89_dev *rtwdev);
3679 int rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev *rtwdev);
3680 int rtw89_fw_h2c_del_pkt_offload(struct rtw89_dev *rtwdev, u8 id);
3681 int rtw89_fw_h2c_add_pkt_offload(struct rtw89_dev *rtwdev, u8 *id,
3682 struct sk_buff *skb_ofld);
3683 int rtw89_fw_h2c_scan_list_offload(struct rtw89_dev *rtwdev, int len,
3684 struct list_head *chan_list);
3685 int rtw89_fw_h2c_scan_offload(struct rtw89_dev *rtwdev,
3686 struct rtw89_scan_option *opt,
3687 struct rtw89_vif *vif);
3688 int rtw89_fw_h2c_rf_reg(struct rtw89_dev *rtwdev,
3689 struct rtw89_fw_h2c_rf_reg_info *info,
3691 int rtw89_fw_h2c_rf_ntfy_mcc(struct rtw89_dev *rtwdev);
3692 int rtw89_fw_h2c_raw_with_hdr(struct rtw89_dev *rtwdev,
3693 u8 h2c_class, u8 h2c_func, u8 *buf, u16 len,
3694 bool rack, bool dack);
3695 int rtw89_fw_h2c_raw(struct rtw89_dev *rtwdev, const u8 *buf, u16 len);
3696 void rtw89_fw_send_all_early_h2c(struct rtw89_dev *rtwdev);
3697 void rtw89_fw_free_all_early_h2c(struct rtw89_dev *rtwdev);
3698 int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
3700 void rtw89_fw_release_general_pkt_list_vif(struct rtw89_dev *rtwdev,
3701 struct rtw89_vif *rtwvif, bool notify_fw);
3702 void rtw89_fw_release_general_pkt_list(struct rtw89_dev *rtwdev, bool notify_fw);
3703 int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta,
3704 bool valid, struct ieee80211_ampdu_params *params);
3705 void rtw89_fw_h2c_init_ba_cam_v1(struct rtw89_dev *rtwdev);
3707 int rtw89_fw_h2c_lps_parm(struct rtw89_dev *rtwdev,
3708 struct rtw89_lps_parm *lps_param);
3709 struct sk_buff *rtw89_fw_h2c_alloc_skb_with_hdr(struct rtw89_dev *rtwdev, u32 len);
3710 struct sk_buff *rtw89_fw_h2c_alloc_skb_no_hdr(struct rtw89_dev *rtwdev, u32 len);
3711 int rtw89_fw_msg_reg(struct rtw89_dev *rtwdev,
3712 struct rtw89_mac_h2c_info *h2c_info,
3713 struct rtw89_mac_c2h_info *c2h_info);
3714 int rtw89_fw_h2c_fw_log(struct rtw89_dev *rtwdev, bool enable);
3715 void rtw89_fw_st_dbg_dump(struct rtw89_dev *rtwdev);
3716 void rtw89_hw_scan_start(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
3717 struct ieee80211_scan_request *req);
3718 void rtw89_hw_scan_complete(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
3720 int rtw89_hw_scan_offload(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
3722 void rtw89_hw_scan_abort(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif);
3723 int rtw89_fw_h2c_trigger_cpu_exception(struct rtw89_dev *rtwdev);
3724 int rtw89_fw_h2c_pkt_drop(struct rtw89_dev *rtwdev,
3725 const struct rtw89_pkt_drop_params *params);
3726 int rtw89_fw_h2c_p2p_act(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
3727 struct ieee80211_p2p_noa_desc *desc,
3729 int rtw89_fw_h2c_tsf32_toggle(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
3731 int rtw89_fw_h2c_wow_global(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
3733 int rtw89_fw_h2c_wow_wakeup_ctrl(struct rtw89_dev *rtwdev,
3734 struct rtw89_vif *rtwvif, bool enable);
3735 int rtw89_fw_h2c_keep_alive(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
3737 int rtw89_fw_h2c_disconnect_detect(struct rtw89_dev *rtwdev,
3738 struct rtw89_vif *rtwvif, bool enable);
3739 int rtw89_fw_h2c_wow_global(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
3741 int rtw89_fw_h2c_wow_wakeup_ctrl(struct rtw89_dev *rtwdev,
3742 struct rtw89_vif *rtwvif, bool enable);
3743 int rtw89_fw_wow_cam_update(struct rtw89_dev *rtwdev,
3744 struct rtw89_wow_cam_info *cam_info);
3745 int rtw89_fw_h2c_add_mcc(struct rtw89_dev *rtwdev,
3746 const struct rtw89_fw_mcc_add_req *p);
3747 int rtw89_fw_h2c_start_mcc(struct rtw89_dev *rtwdev,
3748 const struct rtw89_fw_mcc_start_req *p);
3749 int rtw89_fw_h2c_stop_mcc(struct rtw89_dev *rtwdev, u8 group, u8 macid,
3751 int rtw89_fw_h2c_del_mcc_group(struct rtw89_dev *rtwdev, u8 group,
3753 int rtw89_fw_h2c_reset_mcc_group(struct rtw89_dev *rtwdev, u8 group);
3754 int rtw89_fw_h2c_mcc_req_tsf(struct rtw89_dev *rtwdev,
3755 const struct rtw89_fw_mcc_tsf_req *req,
3756 struct rtw89_mac_mcc_tsf_rpt *rpt);
3757 int rtw89_fw_h2c_mcc_macid_bitamp(struct rtw89_dev *rtwdev, u8 group, u8 macid,
3759 int rtw89_fw_h2c_mcc_sync(struct rtw89_dev *rtwdev, u8 group, u8 source,
3760 u8 target, u8 offset);
3761 int rtw89_fw_h2c_mcc_set_duration(struct rtw89_dev *rtwdev,
3762 const struct rtw89_fw_mcc_duration *p);
3764 static inline void rtw89_fw_h2c_init_ba_cam(struct rtw89_dev *rtwdev)
3766 const struct rtw89_chip_info *chip = rtwdev->chip;
3769 rtw89_fw_h2c_init_ba_cam_v1(rtwdev);