1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
22 static bool rtw89_disable_ps_mode;
23 module_param_named(disable_ps_mode, rtw89_disable_ps_mode, bool, 0644);
24 MODULE_PARM_DESC(disable_ps_mode, "Set Y to disable low power mode");
26 #define RTW89_DEF_CHAN(_freq, _hw_val, _flags, _band) \
27 { .center_freq = _freq, .hw_value = _hw_val, .flags = _flags, .band = _band, }
28 #define RTW89_DEF_CHAN_2G(_freq, _hw_val) \
29 RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_2GHZ)
30 #define RTW89_DEF_CHAN_5G(_freq, _hw_val) \
31 RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_5GHZ)
32 #define RTW89_DEF_CHAN_5G_NO_HT40MINUS(_freq, _hw_val) \
33 RTW89_DEF_CHAN(_freq, _hw_val, IEEE80211_CHAN_NO_HT40MINUS, NL80211_BAND_5GHZ)
34 #define RTW89_DEF_CHAN_6G(_freq, _hw_val) \
35 RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_6GHZ)
37 static struct ieee80211_channel rtw89_channels_2ghz[] = {
38 RTW89_DEF_CHAN_2G(2412, 1),
39 RTW89_DEF_CHAN_2G(2417, 2),
40 RTW89_DEF_CHAN_2G(2422, 3),
41 RTW89_DEF_CHAN_2G(2427, 4),
42 RTW89_DEF_CHAN_2G(2432, 5),
43 RTW89_DEF_CHAN_2G(2437, 6),
44 RTW89_DEF_CHAN_2G(2442, 7),
45 RTW89_DEF_CHAN_2G(2447, 8),
46 RTW89_DEF_CHAN_2G(2452, 9),
47 RTW89_DEF_CHAN_2G(2457, 10),
48 RTW89_DEF_CHAN_2G(2462, 11),
49 RTW89_DEF_CHAN_2G(2467, 12),
50 RTW89_DEF_CHAN_2G(2472, 13),
51 RTW89_DEF_CHAN_2G(2484, 14),
54 static struct ieee80211_channel rtw89_channels_5ghz[] = {
55 RTW89_DEF_CHAN_5G(5180, 36),
56 RTW89_DEF_CHAN_5G(5200, 40),
57 RTW89_DEF_CHAN_5G(5220, 44),
58 RTW89_DEF_CHAN_5G(5240, 48),
59 RTW89_DEF_CHAN_5G(5260, 52),
60 RTW89_DEF_CHAN_5G(5280, 56),
61 RTW89_DEF_CHAN_5G(5300, 60),
62 RTW89_DEF_CHAN_5G(5320, 64),
63 RTW89_DEF_CHAN_5G(5500, 100),
64 RTW89_DEF_CHAN_5G(5520, 104),
65 RTW89_DEF_CHAN_5G(5540, 108),
66 RTW89_DEF_CHAN_5G(5560, 112),
67 RTW89_DEF_CHAN_5G(5580, 116),
68 RTW89_DEF_CHAN_5G(5600, 120),
69 RTW89_DEF_CHAN_5G(5620, 124),
70 RTW89_DEF_CHAN_5G(5640, 128),
71 RTW89_DEF_CHAN_5G(5660, 132),
72 RTW89_DEF_CHAN_5G(5680, 136),
73 RTW89_DEF_CHAN_5G(5700, 140),
74 RTW89_DEF_CHAN_5G(5720, 144),
75 RTW89_DEF_CHAN_5G(5745, 149),
76 RTW89_DEF_CHAN_5G(5765, 153),
77 RTW89_DEF_CHAN_5G(5785, 157),
78 RTW89_DEF_CHAN_5G(5805, 161),
79 RTW89_DEF_CHAN_5G_NO_HT40MINUS(5825, 165),
82 static struct ieee80211_channel rtw89_channels_6ghz[] = {
83 RTW89_DEF_CHAN_6G(5955, 1),
84 RTW89_DEF_CHAN_6G(5975, 5),
85 RTW89_DEF_CHAN_6G(5995, 9),
86 RTW89_DEF_CHAN_6G(6015, 13),
87 RTW89_DEF_CHAN_6G(6035, 17),
88 RTW89_DEF_CHAN_6G(6055, 21),
89 RTW89_DEF_CHAN_6G(6075, 25),
90 RTW89_DEF_CHAN_6G(6095, 29),
91 RTW89_DEF_CHAN_6G(6115, 33),
92 RTW89_DEF_CHAN_6G(6135, 37),
93 RTW89_DEF_CHAN_6G(6155, 41),
94 RTW89_DEF_CHAN_6G(6175, 45),
95 RTW89_DEF_CHAN_6G(6195, 49),
96 RTW89_DEF_CHAN_6G(6215, 53),
97 RTW89_DEF_CHAN_6G(6235, 57),
98 RTW89_DEF_CHAN_6G(6255, 61),
99 RTW89_DEF_CHAN_6G(6275, 65),
100 RTW89_DEF_CHAN_6G(6295, 69),
101 RTW89_DEF_CHAN_6G(6315, 73),
102 RTW89_DEF_CHAN_6G(6335, 77),
103 RTW89_DEF_CHAN_6G(6355, 81),
104 RTW89_DEF_CHAN_6G(6375, 85),
105 RTW89_DEF_CHAN_6G(6395, 89),
106 RTW89_DEF_CHAN_6G(6415, 93),
107 RTW89_DEF_CHAN_6G(6435, 97),
108 RTW89_DEF_CHAN_6G(6455, 101),
109 RTW89_DEF_CHAN_6G(6475, 105),
110 RTW89_DEF_CHAN_6G(6495, 109),
111 RTW89_DEF_CHAN_6G(6515, 113),
112 RTW89_DEF_CHAN_6G(6535, 117),
113 RTW89_DEF_CHAN_6G(6555, 121),
114 RTW89_DEF_CHAN_6G(6575, 125),
115 RTW89_DEF_CHAN_6G(6595, 129),
116 RTW89_DEF_CHAN_6G(6615, 133),
117 RTW89_DEF_CHAN_6G(6635, 137),
118 RTW89_DEF_CHAN_6G(6655, 141),
119 RTW89_DEF_CHAN_6G(6675, 145),
120 RTW89_DEF_CHAN_6G(6695, 149),
121 RTW89_DEF_CHAN_6G(6715, 153),
122 RTW89_DEF_CHAN_6G(6735, 157),
123 RTW89_DEF_CHAN_6G(6755, 161),
124 RTW89_DEF_CHAN_6G(6775, 165),
125 RTW89_DEF_CHAN_6G(6795, 169),
126 RTW89_DEF_CHAN_6G(6815, 173),
127 RTW89_DEF_CHAN_6G(6835, 177),
128 RTW89_DEF_CHAN_6G(6855, 181),
129 RTW89_DEF_CHAN_6G(6875, 185),
130 RTW89_DEF_CHAN_6G(6895, 189),
131 RTW89_DEF_CHAN_6G(6915, 193),
132 RTW89_DEF_CHAN_6G(6935, 197),
133 RTW89_DEF_CHAN_6G(6955, 201),
134 RTW89_DEF_CHAN_6G(6975, 205),
135 RTW89_DEF_CHAN_6G(6995, 209),
136 RTW89_DEF_CHAN_6G(7015, 213),
137 RTW89_DEF_CHAN_6G(7035, 217),
138 RTW89_DEF_CHAN_6G(7055, 221),
139 RTW89_DEF_CHAN_6G(7075, 225),
140 RTW89_DEF_CHAN_6G(7095, 229),
141 RTW89_DEF_CHAN_6G(7115, 233),
144 static struct ieee80211_rate rtw89_bitrates[] = {
145 { .bitrate = 10, .hw_value = 0x00, },
146 { .bitrate = 20, .hw_value = 0x01, },
147 { .bitrate = 55, .hw_value = 0x02, },
148 { .bitrate = 110, .hw_value = 0x03, },
149 { .bitrate = 60, .hw_value = 0x04, },
150 { .bitrate = 90, .hw_value = 0x05, },
151 { .bitrate = 120, .hw_value = 0x06, },
152 { .bitrate = 180, .hw_value = 0x07, },
153 { .bitrate = 240, .hw_value = 0x08, },
154 { .bitrate = 360, .hw_value = 0x09, },
155 { .bitrate = 480, .hw_value = 0x0a, },
156 { .bitrate = 540, .hw_value = 0x0b, },
159 static const struct ieee80211_iface_limit rtw89_iface_limits[] = {
162 .types = BIT(NL80211_IFTYPE_STATION),
166 .types = BIT(NL80211_IFTYPE_P2P_CLIENT) |
167 BIT(NL80211_IFTYPE_P2P_GO) |
168 BIT(NL80211_IFTYPE_AP),
172 static const struct ieee80211_iface_combination rtw89_iface_combs[] = {
174 .limits = rtw89_iface_limits,
175 .n_limits = ARRAY_SIZE(rtw89_iface_limits),
177 .num_different_channels = 1,
181 bool rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate, u16 *bitrate)
183 struct ieee80211_rate rate;
185 if (unlikely(rpt_rate >= ARRAY_SIZE(rtw89_bitrates))) {
186 rtw89_debug(rtwdev, RTW89_DBG_UNEXP, "invalid rpt rate %d\n", rpt_rate);
190 rate = rtw89_bitrates[rpt_rate];
191 *bitrate = rate.bitrate;
196 static const struct ieee80211_supported_band rtw89_sband_2ghz = {
197 .band = NL80211_BAND_2GHZ,
198 .channels = rtw89_channels_2ghz,
199 .n_channels = ARRAY_SIZE(rtw89_channels_2ghz),
200 .bitrates = rtw89_bitrates,
201 .n_bitrates = ARRAY_SIZE(rtw89_bitrates),
206 static const struct ieee80211_supported_band rtw89_sband_5ghz = {
207 .band = NL80211_BAND_5GHZ,
208 .channels = rtw89_channels_5ghz,
209 .n_channels = ARRAY_SIZE(rtw89_channels_5ghz),
211 /* 5G has no CCK rates, 1M/2M/5.5M/11M */
212 .bitrates = rtw89_bitrates + 4,
213 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4,
218 static const struct ieee80211_supported_band rtw89_sband_6ghz = {
219 .band = NL80211_BAND_6GHZ,
220 .channels = rtw89_channels_6ghz,
221 .n_channels = ARRAY_SIZE(rtw89_channels_6ghz),
223 /* 6G has no CCK rates, 1M/2M/5.5M/11M */
224 .bitrates = rtw89_bitrates + 4,
225 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4,
228 static void rtw89_traffic_stats_accu(struct rtw89_dev *rtwdev,
229 struct rtw89_traffic_stats *stats,
230 struct sk_buff *skb, bool tx)
232 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
234 if (!ieee80211_is_data(hdr->frame_control))
237 if (is_broadcast_ether_addr(hdr->addr1) ||
238 is_multicast_ether_addr(hdr->addr1))
243 stats->tx_unicast += skb->len;
246 stats->rx_unicast += skb->len;
250 void rtw89_get_default_chandef(struct cfg80211_chan_def *chandef)
252 cfg80211_chandef_create(chandef, &rtw89_channels_2ghz[0],
256 static void rtw89_get_channel_params(const struct cfg80211_chan_def *chandef,
257 struct rtw89_chan *chan)
259 struct ieee80211_channel *channel = chandef->chan;
260 enum nl80211_chan_width width = chandef->width;
261 u32 primary_freq, center_freq;
263 u8 bandwidth = RTW89_CHANNEL_WIDTH_20;
267 center_chan = channel->hw_value;
268 primary_freq = channel->center_freq;
269 center_freq = chandef->center_freq1;
272 case NL80211_CHAN_WIDTH_20_NOHT:
273 case NL80211_CHAN_WIDTH_20:
274 bandwidth = RTW89_CHANNEL_WIDTH_20;
276 case NL80211_CHAN_WIDTH_40:
277 bandwidth = RTW89_CHANNEL_WIDTH_40;
278 if (primary_freq > center_freq) {
284 case NL80211_CHAN_WIDTH_80:
285 case NL80211_CHAN_WIDTH_160:
286 bandwidth = nl_to_rtw89_bandwidth(width);
287 if (primary_freq > center_freq) {
288 offset = (primary_freq - center_freq - 10) / 20;
289 center_chan -= 2 + offset * 4;
291 offset = (center_freq - primary_freq - 10) / 20;
292 center_chan += 2 + offset * 4;
300 switch (channel->band) {
302 case NL80211_BAND_2GHZ:
303 band = RTW89_BAND_2G;
305 case NL80211_BAND_5GHZ:
306 band = RTW89_BAND_5G;
308 case NL80211_BAND_6GHZ:
309 band = RTW89_BAND_6G;
313 rtw89_chan_create(chan, center_chan, channel->hw_value, band, bandwidth);
316 void rtw89_core_set_chip_txpwr(struct rtw89_dev *rtwdev)
318 const struct rtw89_chip_info *chip = rtwdev->chip;
319 const struct rtw89_chan *chan;
320 enum rtw89_sub_entity_idx sub_entity_idx;
321 enum rtw89_phy_idx phy_idx;
322 enum rtw89_entity_mode mode;
325 entity_active = rtw89_get_entity_state(rtwdev);
329 mode = rtw89_get_entity_mode(rtwdev);
330 if (WARN(mode != RTW89_ENTITY_MODE_SCC, "Invalid ent mode: %d\n", mode))
333 sub_entity_idx = RTW89_SUB_ENTITY_0;
334 phy_idx = RTW89_PHY_0;
335 chan = rtw89_chan_get(rtwdev, sub_entity_idx);
336 if (chip->ops->set_txpwr)
337 chip->ops->set_txpwr(rtwdev, chan, phy_idx);
340 void rtw89_set_channel(struct rtw89_dev *rtwdev)
342 const struct rtw89_chip_info *chip = rtwdev->chip;
343 const struct cfg80211_chan_def *chandef;
344 enum rtw89_sub_entity_idx sub_entity_idx;
345 enum rtw89_mac_idx mac_idx;
346 enum rtw89_phy_idx phy_idx;
347 struct rtw89_chan chan;
348 struct rtw89_channel_help_params bak;
349 enum rtw89_entity_mode mode;
353 entity_active = rtw89_get_entity_state(rtwdev);
355 mode = rtw89_entity_recalc(rtwdev);
356 if (WARN(mode != RTW89_ENTITY_MODE_SCC, "Invalid ent mode: %d\n", mode))
359 sub_entity_idx = RTW89_SUB_ENTITY_0;
360 mac_idx = RTW89_MAC_0;
361 phy_idx = RTW89_PHY_0;
362 chandef = rtw89_chandef_get(rtwdev, sub_entity_idx);
363 rtw89_get_channel_params(chandef, &chan);
364 if (WARN(chan.channel == 0, "Invalid channel\n"))
367 band_changed = rtw89_assign_entity_chan(rtwdev, sub_entity_idx, &chan);
369 rtw89_chip_set_channel_prepare(rtwdev, &bak, &chan, mac_idx, phy_idx);
371 chip->ops->set_channel(rtwdev, &chan, mac_idx, phy_idx);
373 rtw89_core_set_chip_txpwr(rtwdev);
375 rtw89_chip_set_channel_done(rtwdev, &bak, &chan, mac_idx, phy_idx);
377 if (!entity_active || band_changed) {
378 rtw89_btc_ntfy_switch_band(rtwdev, phy_idx, chan.band_type);
379 rtw89_chip_rfk_band_changed(rtwdev, phy_idx);
382 rtw89_set_entity_state(rtwdev, true);
385 void rtw89_get_channel(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
386 struct rtw89_chan *chan)
388 const struct cfg80211_chan_def *chandef;
390 chandef = rtw89_chandef_get(rtwdev, rtwvif->sub_entity_idx);
391 rtw89_get_channel_params(chandef, chan);
394 static enum rtw89_core_tx_type
395 rtw89_core_get_tx_type(struct rtw89_dev *rtwdev,
398 struct ieee80211_hdr *hdr = (void *)skb->data;
399 __le16 fc = hdr->frame_control;
401 if (ieee80211_is_mgmt(fc) || ieee80211_is_nullfunc(fc))
402 return RTW89_CORE_TX_TYPE_MGMT;
404 return RTW89_CORE_TX_TYPE_DATA;
408 rtw89_core_tx_update_ampdu_info(struct rtw89_dev *rtwdev,
409 struct rtw89_core_tx_request *tx_req,
410 enum btc_pkt_type pkt_type)
412 struct ieee80211_sta *sta = tx_req->sta;
413 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
414 struct sk_buff *skb = tx_req->skb;
415 struct rtw89_sta *rtwsta;
419 if (pkt_type == PACKET_EAPOL) {
420 desc_info->bk = true;
424 if (!(IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU))
428 rtw89_warn(rtwdev, "cannot set ampdu info without sta\n");
432 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
433 rtwsta = (struct rtw89_sta *)sta->drv_priv;
435 ampdu_num = (u8)((rtwsta->ampdu_params[tid].agg_num ?
436 rtwsta->ampdu_params[tid].agg_num :
437 4 << sta->deflink.ht_cap.ampdu_factor) - 1);
439 desc_info->agg_en = true;
440 desc_info->ampdu_density = sta->deflink.ht_cap.ampdu_density;
441 desc_info->ampdu_num = ampdu_num;
445 rtw89_core_tx_update_sec_key(struct rtw89_dev *rtwdev,
446 struct rtw89_core_tx_request *tx_req)
448 const struct rtw89_chip_info *chip = rtwdev->chip;
449 struct ieee80211_vif *vif = tx_req->vif;
450 struct ieee80211_sta *sta = tx_req->sta;
451 struct ieee80211_tx_info *info;
452 struct ieee80211_key_conf *key;
453 struct rtw89_vif *rtwvif;
454 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
455 struct rtw89_addr_cam_entry *addr_cam;
456 struct rtw89_sec_cam_entry *sec_cam;
457 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
458 struct sk_buff *skb = tx_req->skb;
459 u8 sec_type = RTW89_SEC_KEY_TYPE_NONE;
463 rtw89_warn(rtwdev, "cannot set sec key without vif\n");
467 rtwvif = (struct rtw89_vif *)vif->drv_priv;
468 addr_cam = rtw89_get_addr_cam_of(rtwvif, rtwsta);
470 info = IEEE80211_SKB_CB(skb);
471 key = info->control.hw_key;
472 sec_cam = addr_cam->sec_entries[key->hw_key_idx];
474 rtw89_warn(rtwdev, "sec cam entry is empty\n");
478 switch (key->cipher) {
479 case WLAN_CIPHER_SUITE_WEP40:
480 sec_type = RTW89_SEC_KEY_TYPE_WEP40;
482 case WLAN_CIPHER_SUITE_WEP104:
483 sec_type = RTW89_SEC_KEY_TYPE_WEP104;
485 case WLAN_CIPHER_SUITE_TKIP:
486 sec_type = RTW89_SEC_KEY_TYPE_TKIP;
488 case WLAN_CIPHER_SUITE_CCMP:
489 sec_type = RTW89_SEC_KEY_TYPE_CCMP128;
491 case WLAN_CIPHER_SUITE_CCMP_256:
492 sec_type = RTW89_SEC_KEY_TYPE_CCMP256;
494 case WLAN_CIPHER_SUITE_GCMP:
495 sec_type = RTW89_SEC_KEY_TYPE_GCMP128;
497 case WLAN_CIPHER_SUITE_GCMP_256:
498 sec_type = RTW89_SEC_KEY_TYPE_GCMP256;
501 rtw89_warn(rtwdev, "key cipher not supported %d\n", key->cipher);
505 desc_info->sec_en = true;
506 desc_info->sec_keyid = key->keyidx;
507 desc_info->sec_type = sec_type;
508 desc_info->sec_cam_idx = sec_cam->sec_cam_idx;
510 if (!chip->hw_sec_hdr)
513 pn64 = atomic64_inc_return(&key->tx_pn);
514 desc_info->sec_seq[0] = pn64;
515 desc_info->sec_seq[1] = pn64 >> 8;
516 desc_info->sec_seq[2] = pn64 >> 16;
517 desc_info->sec_seq[3] = pn64 >> 24;
518 desc_info->sec_seq[4] = pn64 >> 32;
519 desc_info->sec_seq[5] = pn64 >> 40;
520 desc_info->wp_offset = 1; /* in unit of 8 bytes for security header */
523 static u16 rtw89_core_get_mgmt_rate(struct rtw89_dev *rtwdev,
524 struct rtw89_core_tx_request *tx_req)
526 struct sk_buff *skb = tx_req->skb;
527 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
528 struct ieee80211_vif *vif = tx_info->control.vif;
529 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
532 if (tx_info->flags & IEEE80211_TX_CTL_NO_CCK_RATE ||
534 lowest_rate = RTW89_HW_RATE_OFDM6;
535 else if (chan->band_type == RTW89_BAND_2G)
536 lowest_rate = RTW89_HW_RATE_CCK1;
538 lowest_rate = RTW89_HW_RATE_OFDM6;
540 if (!vif || !vif->bss_conf.basic_rates || !tx_req->sta)
543 return __ffs(vif->bss_conf.basic_rates) + lowest_rate;
546 static u8 rtw89_core_tx_get_mac_id(struct rtw89_dev *rtwdev,
547 struct rtw89_core_tx_request *tx_req)
549 struct ieee80211_vif *vif = tx_req->vif;
550 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
551 struct ieee80211_sta *sta = tx_req->sta;
552 struct rtw89_sta *rtwsta;
555 return rtwvif->mac_id;
557 rtwsta = (struct rtw89_sta *)sta->drv_priv;
558 return rtwsta->mac_id;
562 rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev,
563 struct rtw89_core_tx_request *tx_req)
565 struct ieee80211_vif *vif = tx_req->vif;
566 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
567 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
568 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
571 qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : RTW89_TX_QSEL_B0_MGMT;
572 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
574 desc_info->qsel = qsel;
575 desc_info->ch_dma = ch_dma;
576 desc_info->port = desc_info->hiq ? rtwvif->port : 0;
577 desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req);
578 desc_info->hw_ssn_sel = RTW89_MGMT_HW_SSN_SEL;
579 desc_info->hw_seq_mode = RTW89_MGMT_HW_SEQ_MODE;
581 /* fixed data rate for mgmt frames */
582 desc_info->en_wd_info = true;
583 desc_info->use_rate = true;
584 desc_info->dis_data_fb = true;
585 desc_info->data_rate = rtw89_core_get_mgmt_rate(rtwdev, tx_req);
587 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
588 "tx mgmt frame with rate 0x%x on channel %d (band %d, bw %d)\n",
589 desc_info->data_rate, chan->channel, chan->band_type,
594 rtw89_core_tx_update_h2c_info(struct rtw89_dev *rtwdev,
595 struct rtw89_core_tx_request *tx_req)
597 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
599 desc_info->is_bmc = false;
600 desc_info->wd_page = false;
601 desc_info->ch_dma = RTW89_DMA_H2C;
604 static void rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev *rtwdev, __le32 *htc)
606 static const u8 rtw89_bandwidth_to_om[] = {
607 [RTW89_CHANNEL_WIDTH_20] = HTC_OM_CHANNEL_WIDTH_20,
608 [RTW89_CHANNEL_WIDTH_40] = HTC_OM_CHANNEL_WIDTH_40,
609 [RTW89_CHANNEL_WIDTH_80] = HTC_OM_CHANNEL_WIDTH_80,
610 [RTW89_CHANNEL_WIDTH_160] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80,
611 [RTW89_CHANNEL_WIDTH_80_80] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80,
613 const struct rtw89_chip_info *chip = rtwdev->chip;
614 struct rtw89_hal *hal = &rtwdev->hal;
615 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
618 if (!chip->dis_2g_40m_ul_ofdma ||
619 chan->band_type != RTW89_BAND_2G ||
620 chan->band_width != RTW89_CHANNEL_WIDTH_40)
623 om_bandwidth = chan->band_width < ARRAY_SIZE(rtw89_bandwidth_to_om) ?
624 rtw89_bandwidth_to_om[chan->band_width] : 0;
625 *htc = le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) |
626 le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_OM, RTW89_HTC_MASK_CTL_ID) |
627 le32_encode_bits(hal->rx_nss - 1, RTW89_HTC_MASK_HTC_OM_RX_NSS) |
628 le32_encode_bits(om_bandwidth, RTW89_HTC_MASK_HTC_OM_CH_WIDTH) |
629 le32_encode_bits(1, RTW89_HTC_MASK_HTC_OM_UL_MU_DIS) |
630 le32_encode_bits(hal->tx_nss - 1, RTW89_HTC_MASK_HTC_OM_TX_NSTS) |
631 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_ER_SU_DIS) |
632 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_DL_MU_MIMO_RR) |
633 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_UL_MU_DATA_DIS);
637 __rtw89_core_tx_check_he_qos_htc(struct rtw89_dev *rtwdev,
638 struct rtw89_core_tx_request *tx_req,
639 enum btc_pkt_type pkt_type)
641 struct ieee80211_sta *sta = tx_req->sta;
642 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
643 struct sk_buff *skb = tx_req->skb;
644 struct ieee80211_hdr *hdr = (void *)skb->data;
645 __le16 fc = hdr->frame_control;
647 /* AP IOT issue with EAPoL, ARP and DHCP */
648 if (pkt_type < PACKET_MAX)
651 if (!sta || !sta->deflink.he_cap.has_he)
654 if (!ieee80211_is_data_qos(fc))
657 if (skb_headroom(skb) < IEEE80211_HT_CTL_LEN)
660 if (rtwsta && rtwsta->ra_report.might_fallback_legacy)
667 __rtw89_core_tx_adjust_he_qos_htc(struct rtw89_dev *rtwdev,
668 struct rtw89_core_tx_request *tx_req)
670 struct ieee80211_sta *sta = tx_req->sta;
671 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
672 struct sk_buff *skb = tx_req->skb;
673 struct ieee80211_hdr *hdr = (void *)skb->data;
674 __le16 fc = hdr->frame_control;
680 hdr_len = ieee80211_has_a4(fc) ? 32 : 26;
681 data = skb_push(skb, IEEE80211_HT_CTL_LEN);
682 memmove(data, data + IEEE80211_HT_CTL_LEN, hdr_len);
685 htc = data + hdr_len;
686 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_ORDER);
687 *htc = rtwsta->htc_template ? rtwsta->htc_template :
688 le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) |
689 le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_CAS, RTW89_HTC_MASK_CTL_ID);
691 qc = data + hdr_len - IEEE80211_QOS_CTL_LEN;
692 qc[0] |= IEEE80211_QOS_CTL_EOSP;
696 rtw89_core_tx_update_he_qos_htc(struct rtw89_dev *rtwdev,
697 struct rtw89_core_tx_request *tx_req,
698 enum btc_pkt_type pkt_type)
700 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
701 struct ieee80211_vif *vif = tx_req->vif;
702 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
704 if (!__rtw89_core_tx_check_he_qos_htc(rtwdev, tx_req, pkt_type))
707 __rtw89_core_tx_adjust_he_qos_htc(rtwdev, tx_req);
709 desc_info->pkt_size += IEEE80211_HT_CTL_LEN;
710 desc_info->a_ctrl_bsr = true;
713 if (!rtwvif || rtwvif->last_a_ctrl == desc_info->a_ctrl_bsr)
716 rtwvif->last_a_ctrl = desc_info->a_ctrl_bsr;
717 desc_info->bk = true;
720 static u16 rtw89_core_get_data_rate(struct rtw89_dev *rtwdev,
721 struct rtw89_core_tx_request *tx_req)
723 struct ieee80211_vif *vif = tx_req->vif;
724 struct ieee80211_sta *sta = tx_req->sta;
725 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
726 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern;
727 enum rtw89_sub_entity_idx idx = rtwvif->sub_entity_idx;
728 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, idx);
731 if (rate_pattern->enable)
732 return rate_pattern->rate;
735 lowest_rate = RTW89_HW_RATE_OFDM6;
736 else if (chan->band_type == RTW89_BAND_2G)
737 lowest_rate = RTW89_HW_RATE_CCK1;
739 lowest_rate = RTW89_HW_RATE_OFDM6;
741 if (!sta || !sta->deflink.supp_rates[chan->band_type])
744 return __ffs(sta->deflink.supp_rates[chan->band_type]) + lowest_rate;
748 rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev,
749 struct rtw89_core_tx_request *tx_req)
751 struct ieee80211_vif *vif = tx_req->vif;
752 struct ieee80211_sta *sta = tx_req->sta;
753 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
754 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
755 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
756 struct sk_buff *skb = tx_req->skb;
757 u8 tid, tid_indicate;
760 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
761 tid_indicate = rtw89_core_get_tid_indicate(rtwdev, tid);
762 qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : rtw89_core_get_qsel(rtwdev, tid);
763 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
765 desc_info->ch_dma = ch_dma;
766 desc_info->tid_indicate = tid_indicate;
767 desc_info->qsel = qsel;
768 desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req);
769 desc_info->port = desc_info->hiq ? rtwvif->port : 0;
770 desc_info->er_cap = rtwsta ? rtwsta->er_cap : false;
772 /* enable wd_info for AMPDU */
773 desc_info->en_wd_info = true;
775 if (IEEE80211_SKB_CB(skb)->control.hw_key)
776 rtw89_core_tx_update_sec_key(rtwdev, tx_req);
778 desc_info->data_retry_lowest_rate = rtw89_core_get_data_rate(rtwdev, tx_req);
781 static enum btc_pkt_type
782 rtw89_core_tx_btc_spec_pkt_notify(struct rtw89_dev *rtwdev,
783 struct rtw89_core_tx_request *tx_req)
785 struct sk_buff *skb = tx_req->skb;
786 struct udphdr *udphdr;
788 if (IEEE80211_SKB_CB(skb)->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO) {
789 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.eapol_notify_work);
793 if (skb->protocol == htons(ETH_P_ARP)) {
794 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.arp_notify_work);
798 if (skb->protocol == htons(ETH_P_IP) &&
799 ip_hdr(skb)->protocol == IPPROTO_UDP) {
800 udphdr = udp_hdr(skb);
801 if (((udphdr->source == htons(67) && udphdr->dest == htons(68)) ||
802 (udphdr->source == htons(68) && udphdr->dest == htons(67))) &&
804 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.dhcp_notify_work);
809 if (skb->protocol == htons(ETH_P_IP) &&
810 ip_hdr(skb)->protocol == IPPROTO_ICMP) {
811 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.icmp_notify_work);
818 static void rtw89_core_tx_update_llc_hdr(struct rtw89_dev *rtwdev,
819 struct rtw89_tx_desc_info *desc_info,
822 struct ieee80211_hdr *hdr = (void *)skb->data;
823 __le16 fc = hdr->frame_control;
825 desc_info->hdr_llc_len = ieee80211_hdrlen(fc);
826 desc_info->hdr_llc_len >>= 1; /* in unit of 2 bytes */
830 rtw89_core_tx_wake(struct rtw89_dev *rtwdev,
831 struct rtw89_core_tx_request *tx_req)
833 const struct rtw89_chip_info *chip = rtwdev->chip;
835 if (!RTW89_CHK_FW_FEATURE(TX_WAKE, &rtwdev->fw))
838 if (!test_bit(RTW89_FLAG_LOW_POWER_MODE, rtwdev->flags))
841 if (chip->chip_id != RTL8852C &&
842 tx_req->tx_type != RTW89_CORE_TX_TYPE_MGMT)
845 rtw89_mac_notify_wake(rtwdev);
849 rtw89_core_tx_update_desc_info(struct rtw89_dev *rtwdev,
850 struct rtw89_core_tx_request *tx_req)
852 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
853 struct sk_buff *skb = tx_req->skb;
854 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
855 struct ieee80211_hdr *hdr = (void *)skb->data;
856 enum rtw89_core_tx_type tx_type;
857 enum btc_pkt_type pkt_type;
861 seq = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
862 if (tx_req->tx_type != RTW89_CORE_TX_TYPE_FWCMD) {
863 tx_type = rtw89_core_get_tx_type(rtwdev, skb);
864 tx_req->tx_type = tx_type;
866 is_bmc = (is_broadcast_ether_addr(hdr->addr1) ||
867 is_multicast_ether_addr(hdr->addr1));
869 desc_info->seq = seq;
870 desc_info->pkt_size = skb->len;
871 desc_info->is_bmc = is_bmc;
872 desc_info->wd_page = true;
873 desc_info->hiq = info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM;
875 switch (tx_req->tx_type) {
876 case RTW89_CORE_TX_TYPE_MGMT:
877 rtw89_core_tx_update_mgmt_info(rtwdev, tx_req);
879 case RTW89_CORE_TX_TYPE_DATA:
880 rtw89_core_tx_update_data_info(rtwdev, tx_req);
881 pkt_type = rtw89_core_tx_btc_spec_pkt_notify(rtwdev, tx_req);
882 rtw89_core_tx_update_he_qos_htc(rtwdev, tx_req, pkt_type);
883 rtw89_core_tx_update_ampdu_info(rtwdev, tx_req, pkt_type);
884 rtw89_core_tx_update_llc_hdr(rtwdev, desc_info, skb);
886 case RTW89_CORE_TX_TYPE_FWCMD:
887 rtw89_core_tx_update_h2c_info(rtwdev, tx_req);
892 void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel)
896 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
898 rtw89_hci_tx_kick_off(rtwdev, ch_dma);
901 int rtw89_core_tx_kick_off_and_wait(struct rtw89_dev *rtwdev, struct sk_buff *skb,
902 int qsel, unsigned int timeout)
904 struct rtw89_tx_skb_data *skb_data = RTW89_TX_SKB_CB(skb);
905 struct rtw89_tx_wait_info *wait;
906 unsigned long time_left;
909 wait = kzalloc(sizeof(*wait), GFP_KERNEL);
911 rtw89_core_tx_kick_off(rtwdev, qsel);
915 init_completion(&wait->completion);
916 rcu_assign_pointer(skb_data->wait, wait);
918 rtw89_core_tx_kick_off(rtwdev, qsel);
919 time_left = wait_for_completion_timeout(&wait->completion,
920 msecs_to_jiffies(timeout));
923 else if (!wait->tx_done)
926 rcu_assign_pointer(skb_data->wait, NULL);
927 kfree_rcu(wait, rcu_head);
932 int rtw89_h2c_tx(struct rtw89_dev *rtwdev,
933 struct sk_buff *skb, bool fwdl)
935 struct rtw89_core_tx_request tx_req = {0};
939 if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) {
940 rtw89_debug(rtwdev, RTW89_DBG_FW,
941 "ignore h2c due to power is off with firmware state=%d\n",
942 test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags));
948 tx_req.tx_type = RTW89_CORE_TX_TYPE_FWCMD;
950 tx_req.desc_info.fw_dl = true;
952 rtw89_core_tx_update_desc_info(rtwdev, &tx_req);
955 rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "H2C: ", skb->data, skb->len);
957 cnt = rtw89_hci_check_and_reclaim_tx_resource(rtwdev, RTW89_TXCH_CH12);
959 rtw89_err(rtwdev, "no tx fwcmd resource\n");
963 ret = rtw89_hci_tx_write(rtwdev, &tx_req);
965 rtw89_err(rtwdev, "failed to transmit skb to HCI\n");
968 rtw89_hci_tx_kick_off(rtwdev, RTW89_TXCH_CH12);
973 int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
974 struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel)
976 struct rtw89_core_tx_request tx_req = {0};
977 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
984 rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, true);
985 rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, true);
986 rtw89_core_tx_update_desc_info(rtwdev, &tx_req);
987 rtw89_core_tx_wake(rtwdev, &tx_req);
989 ret = rtw89_hci_tx_write(rtwdev, &tx_req);
991 rtw89_err(rtwdev, "failed to transmit skb to HCI\n");
996 *qsel = tx_req.desc_info.qsel;
1001 static __le32 rtw89_build_txwd_body0(struct rtw89_tx_desc_info *desc_info)
1003 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET, desc_info->wp_offset) |
1004 FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
1005 FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
1006 FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
1007 FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
1008 FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl) |
1009 FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_SEL, desc_info->hw_ssn_sel) |
1010 FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_MODE, desc_info->hw_seq_mode);
1012 return cpu_to_le32(dword);
1015 static __le32 rtw89_build_txwd_body0_v1(struct rtw89_tx_desc_info *desc_info)
1017 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET_V1, desc_info->wp_offset) |
1018 FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
1019 FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
1020 FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
1021 FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
1022 FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl);
1024 return cpu_to_le32(dword);
1027 static __le32 rtw89_build_txwd_body1_v1(struct rtw89_tx_desc_info *desc_info)
1029 u32 dword = FIELD_PREP(RTW89_TXWD_BODY1_ADDR_INFO_NUM, desc_info->addr_info_nr) |
1030 FIELD_PREP(RTW89_TXWD_BODY1_SEC_KEYID, desc_info->sec_keyid) |
1031 FIELD_PREP(RTW89_TXWD_BODY1_SEC_TYPE, desc_info->sec_type);
1033 return cpu_to_le32(dword);
1036 static __le32 rtw89_build_txwd_body2(struct rtw89_tx_desc_info *desc_info)
1038 u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) |
1039 FIELD_PREP(RTW89_TXWD_BODY2_QSEL, desc_info->qsel) |
1040 FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size) |
1041 FIELD_PREP(RTW89_TXWD_BODY2_MACID, desc_info->mac_id);
1043 return cpu_to_le32(dword);
1046 static __le32 rtw89_build_txwd_body3(struct rtw89_tx_desc_info *desc_info)
1048 u32 dword = FIELD_PREP(RTW89_TXWD_BODY3_SW_SEQ, desc_info->seq) |
1049 FIELD_PREP(RTW89_TXWD_BODY3_AGG_EN, desc_info->agg_en) |
1050 FIELD_PREP(RTW89_TXWD_BODY3_BK, desc_info->bk);
1052 return cpu_to_le32(dword);
1055 static __le32 rtw89_build_txwd_body4(struct rtw89_tx_desc_info *desc_info)
1057 u32 dword = FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L0, desc_info->sec_seq[0]) |
1058 FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L1, desc_info->sec_seq[1]);
1060 return cpu_to_le32(dword);
1063 static __le32 rtw89_build_txwd_body5(struct rtw89_tx_desc_info *desc_info)
1065 u32 dword = FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H2, desc_info->sec_seq[2]) |
1066 FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H3, desc_info->sec_seq[3]) |
1067 FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H4, desc_info->sec_seq[4]) |
1068 FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H5, desc_info->sec_seq[5]);
1070 return cpu_to_le32(dword);
1073 static __le32 rtw89_build_txwd_body7_v1(struct rtw89_tx_desc_info *desc_info)
1075 u32 dword = FIELD_PREP(RTW89_TXWD_BODY7_USE_RATE_V1, desc_info->use_rate) |
1076 FIELD_PREP(RTW89_TXWD_BODY7_DATA_RATE, desc_info->data_rate);
1078 return cpu_to_le32(dword);
1081 static __le32 rtw89_build_txwd_info0(struct rtw89_tx_desc_info *desc_info)
1083 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) |
1084 FIELD_PREP(RTW89_TXWD_INFO0_DATA_RATE, desc_info->data_rate) |
1085 FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1086 FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port);
1088 return cpu_to_le32(dword);
1091 static __le32 rtw89_build_txwd_info0_v1(struct rtw89_tx_desc_info *desc_info)
1093 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1094 FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port) |
1095 FIELD_PREP(RTW89_TXWD_INFO0_DATA_ER, desc_info->er_cap) |
1096 FIELD_PREP(RTW89_TXWD_INFO0_DATA_BW_ER, 0);
1098 return cpu_to_le32(dword);
1101 static __le32 rtw89_build_txwd_info1(struct rtw89_tx_desc_info *desc_info)
1103 u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) |
1104 FIELD_PREP(RTW89_TXWD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) |
1105 FIELD_PREP(RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE,
1106 desc_info->data_retry_lowest_rate);
1108 return cpu_to_le32(dword);
1111 static __le32 rtw89_build_txwd_info2(struct rtw89_tx_desc_info *desc_info)
1113 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1114 FIELD_PREP(RTW89_TXWD_INFO2_SEC_TYPE, desc_info->sec_type) |
1115 FIELD_PREP(RTW89_TXWD_INFO2_SEC_HW_ENC, desc_info->sec_en) |
1116 FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1118 return cpu_to_le32(dword);
1121 static __le32 rtw89_build_txwd_info2_v1(struct rtw89_tx_desc_info *desc_info)
1123 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1124 FIELD_PREP(RTW89_TXWD_INFO2_FORCE_KEY_EN, desc_info->sec_en) |
1125 FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1127 return cpu_to_le32(dword);
1130 static __le32 rtw89_build_txwd_info4(struct rtw89_tx_desc_info *desc_info)
1132 u32 dword = FIELD_PREP(RTW89_TXWD_INFO4_RTS_EN, 1) |
1133 FIELD_PREP(RTW89_TXWD_INFO4_HW_RTS_EN, 1);
1135 return cpu_to_le32(dword);
1138 void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev,
1139 struct rtw89_tx_desc_info *desc_info,
1142 struct rtw89_txwd_body *txwd_body = (struct rtw89_txwd_body *)txdesc;
1143 struct rtw89_txwd_info *txwd_info;
1145 txwd_body->dword0 = rtw89_build_txwd_body0(desc_info);
1146 txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
1147 txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
1149 if (!desc_info->en_wd_info)
1152 txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1);
1153 txwd_info->dword0 = rtw89_build_txwd_info0(desc_info);
1154 txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
1155 txwd_info->dword2 = rtw89_build_txwd_info2(desc_info);
1156 txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
1159 EXPORT_SYMBOL(rtw89_core_fill_txdesc);
1161 void rtw89_core_fill_txdesc_v1(struct rtw89_dev *rtwdev,
1162 struct rtw89_tx_desc_info *desc_info,
1165 struct rtw89_txwd_body_v1 *txwd_body = (struct rtw89_txwd_body_v1 *)txdesc;
1166 struct rtw89_txwd_info *txwd_info;
1168 txwd_body->dword0 = rtw89_build_txwd_body0_v1(desc_info);
1169 txwd_body->dword1 = rtw89_build_txwd_body1_v1(desc_info);
1170 txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
1171 txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
1172 if (desc_info->sec_en) {
1173 txwd_body->dword4 = rtw89_build_txwd_body4(desc_info);
1174 txwd_body->dword5 = rtw89_build_txwd_body5(desc_info);
1176 txwd_body->dword7 = rtw89_build_txwd_body7_v1(desc_info);
1178 if (!desc_info->en_wd_info)
1181 txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1);
1182 txwd_info->dword0 = rtw89_build_txwd_info0_v1(desc_info);
1183 txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
1184 txwd_info->dword2 = rtw89_build_txwd_info2_v1(desc_info);
1185 txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
1187 EXPORT_SYMBOL(rtw89_core_fill_txdesc_v1);
1189 static __le32 rtw89_build_txwd_fwcmd0_v1(struct rtw89_tx_desc_info *desc_info)
1191 u32 dword = FIELD_PREP(AX_RXD_RPKT_LEN_MASK, desc_info->pkt_size) |
1192 FIELD_PREP(AX_RXD_RPKT_TYPE_MASK, desc_info->fw_dl ?
1193 RTW89_CORE_RX_TYPE_FWDL :
1194 RTW89_CORE_RX_TYPE_H2C);
1196 return cpu_to_le32(dword);
1199 void rtw89_core_fill_txdesc_fwcmd_v1(struct rtw89_dev *rtwdev,
1200 struct rtw89_tx_desc_info *desc_info,
1203 struct rtw89_rxdesc_short *txwd_v1 = (struct rtw89_rxdesc_short *)txdesc;
1205 txwd_v1->dword0 = rtw89_build_txwd_fwcmd0_v1(desc_info);
1207 EXPORT_SYMBOL(rtw89_core_fill_txdesc_fwcmd_v1);
1209 static int rtw89_core_rx_process_mac_ppdu(struct rtw89_dev *rtwdev,
1210 struct sk_buff *skb,
1211 struct rtw89_rx_phy_ppdu *phy_ppdu)
1213 bool rx_cnt_valid = false;
1218 rx_cnt_valid = RTW89_GET_RXINFO_RX_CNT_VLD(skb->data);
1219 plcp_size = RTW89_GET_RXINFO_PLCP_LEN(skb->data) << 3;
1220 usr_num = RTW89_GET_RXINFO_USR_NUM(skb->data);
1221 if (usr_num > RTW89_PPDU_MAX_USR) {
1222 rtw89_warn(rtwdev, "Invalid user number in mac info\n");
1226 phy_sts = skb->data + RTW89_PPDU_MAC_INFO_SIZE;
1227 phy_sts += usr_num * RTW89_PPDU_MAC_INFO_USR_SIZE;
1228 /* 8-byte alignment */
1229 if (usr_num & BIT(0))
1230 phy_sts += RTW89_PPDU_MAC_INFO_USR_SIZE;
1232 phy_sts += RTW89_PPDU_MAC_RX_CNT_SIZE;
1233 phy_sts += plcp_size;
1235 phy_ppdu->buf = phy_sts;
1236 phy_ppdu->len = skb->data + skb->len - phy_sts;
1241 static void rtw89_core_rx_process_phy_ppdu_iter(void *data,
1242 struct ieee80211_sta *sta)
1244 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1245 struct rtw89_rx_phy_ppdu *phy_ppdu = (struct rtw89_rx_phy_ppdu *)data;
1246 struct rtw89_dev *rtwdev = rtwsta->rtwdev;
1249 if (rtwsta->mac_id == phy_ppdu->mac_id && phy_ppdu->to_self) {
1250 ewma_rssi_add(&rtwsta->avg_rssi, phy_ppdu->rssi_avg);
1251 for (i = 0; i < rtwdev->chip->rf_path_num; i++)
1252 ewma_rssi_add(&rtwsta->rssi[i], phy_ppdu->rssi[i]);
1256 #define VAR_LEN 0xff
1257 #define VAR_LEN_UNIT 8
1258 static u16 rtw89_core_get_phy_status_ie_len(struct rtw89_dev *rtwdev, u8 *addr)
1260 static const u8 physts_ie_len_tab[32] = {
1261 16, 32, 24, 24, 8, 8, 8, 8, VAR_LEN, 8, VAR_LEN, 176, VAR_LEN,
1262 VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, 16, 24, VAR_LEN,
1263 VAR_LEN, VAR_LEN, 0, 24, 24, 24, 24, 32, 32, 32, 32
1268 ie = RTW89_GET_PHY_STS_IE_TYPE(addr);
1269 if (physts_ie_len_tab[ie] != VAR_LEN)
1270 ie_len = physts_ie_len_tab[ie];
1272 ie_len = RTW89_GET_PHY_STS_IE_LEN(addr) * VAR_LEN_UNIT;
1277 static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev, u8 *addr,
1278 struct rtw89_rx_phy_ppdu *phy_ppdu)
1282 phy_ppdu->chan_idx = RTW89_GET_PHY_STS_IE01_CH_IDX(addr);
1283 if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6)
1286 if (!phy_ppdu->to_self)
1289 /* sign conversion for S(12,2) */
1290 if (rtwdev->chip->cfo_src_fd)
1291 cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_FD_CFO(addr), 11);
1293 cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_PREMB_CFO(addr), 11);
1295 rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu);
1298 static int rtw89_core_process_phy_status_ie(struct rtw89_dev *rtwdev, u8 *addr,
1299 struct rtw89_rx_phy_ppdu *phy_ppdu)
1303 ie = RTW89_GET_PHY_STS_IE_TYPE(addr);
1305 case RTW89_PHYSTS_IE01_CMN_OFDM:
1306 rtw89_core_parse_phy_status_ie01(rtwdev, addr, phy_ppdu);
1315 static void rtw89_core_update_phy_ppdu(struct rtw89_rx_phy_ppdu *phy_ppdu)
1317 u8 *rssi = phy_ppdu->rssi;
1318 u8 *buf = phy_ppdu->buf;
1320 phy_ppdu->ie = RTW89_GET_PHY_STS_IE_MAP(buf);
1321 phy_ppdu->rssi_avg = RTW89_GET_PHY_STS_RSSI_AVG(buf);
1322 rssi[RF_PATH_A] = RTW89_GET_PHY_STS_RSSI_A(buf);
1323 rssi[RF_PATH_B] = RTW89_GET_PHY_STS_RSSI_B(buf);
1324 rssi[RF_PATH_C] = RTW89_GET_PHY_STS_RSSI_C(buf);
1325 rssi[RF_PATH_D] = RTW89_GET_PHY_STS_RSSI_D(buf);
1328 static int rtw89_core_rx_process_phy_ppdu(struct rtw89_dev *rtwdev,
1329 struct rtw89_rx_phy_ppdu *phy_ppdu)
1331 if (RTW89_GET_PHY_STS_LEN(phy_ppdu->buf) << 3 != phy_ppdu->len) {
1332 rtw89_debug(rtwdev, RTW89_DBG_UNEXP, "phy ppdu len mismatch\n");
1335 rtw89_core_update_phy_ppdu(phy_ppdu);
1336 ieee80211_iterate_stations_atomic(rtwdev->hw,
1337 rtw89_core_rx_process_phy_ppdu_iter,
1343 static int rtw89_core_rx_parse_phy_sts(struct rtw89_dev *rtwdev,
1344 struct rtw89_rx_phy_ppdu *phy_ppdu)
1349 /* mark invalid reports and bypass them */
1350 if (phy_ppdu->ie < RTW89_CCK_PKT)
1353 pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN;
1354 end = (u8 *)phy_ppdu->buf + phy_ppdu->len;
1356 ie_len = rtw89_core_get_phy_status_ie_len(rtwdev, pos);
1357 rtw89_core_process_phy_status_ie(rtwdev, pos, phy_ppdu);
1359 if (pos > end || ie_len == 0) {
1360 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
1361 "phy status parse failed\n");
1369 static void rtw89_core_rx_process_phy_sts(struct rtw89_dev *rtwdev,
1370 struct rtw89_rx_phy_ppdu *phy_ppdu)
1374 ret = rtw89_core_rx_parse_phy_sts(rtwdev, phy_ppdu);
1376 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "parse phy sts failed\n");
1378 phy_ppdu->valid = true;
1381 static u8 rtw89_rxdesc_to_nl_he_gi(struct rtw89_dev *rtwdev,
1382 const struct rtw89_rx_desc_info *desc_info,
1385 switch (desc_info->gi_ltf) {
1386 case RTW89_GILTF_SGI_4XHE08:
1387 case RTW89_GILTF_2XHE08:
1388 case RTW89_GILTF_1XHE08:
1389 return NL80211_RATE_INFO_HE_GI_0_8;
1390 case RTW89_GILTF_2XHE16:
1391 case RTW89_GILTF_1XHE16:
1392 return NL80211_RATE_INFO_HE_GI_1_6;
1393 case RTW89_GILTF_LGI_4XHE32:
1394 return NL80211_RATE_INFO_HE_GI_3_2;
1396 rtw89_warn(rtwdev, "invalid gi_ltf=%d", desc_info->gi_ltf);
1397 return rx_status ? NL80211_RATE_INFO_HE_GI_3_2 : U8_MAX;
1401 static bool rtw89_core_rx_ppdu_match(struct rtw89_dev *rtwdev,
1402 struct rtw89_rx_desc_info *desc_info,
1403 struct ieee80211_rx_status *status)
1405 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1406 u8 data_rate_mode, bw, rate_idx = MASKBYTE0, gi_ltf;
1410 data_rate = desc_info->data_rate;
1411 data_rate_mode = GET_DATA_RATE_MODE(data_rate);
1412 if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
1413 rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate);
1414 /* rate_idx is still hardware value here */
1415 } else if (data_rate_mode == DATA_RATE_MODE_HT) {
1416 rate_idx = GET_DATA_RATE_HT_IDX(data_rate);
1417 } else if (data_rate_mode == DATA_RATE_MODE_VHT) {
1418 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1419 } else if (data_rate_mode == DATA_RATE_MODE_HE) {
1420 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1422 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
1425 bw = rtw89_hw_to_rate_info_bw(desc_info->bw);
1426 gi_ltf = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, false);
1427 ret = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band] == desc_info->ppdu_cnt &&
1428 status->rate_idx == rate_idx &&
1429 status->he_gi == gi_ltf &&
1435 struct rtw89_vif_rx_stats_iter_data {
1436 struct rtw89_dev *rtwdev;
1437 struct rtw89_rx_phy_ppdu *phy_ppdu;
1438 struct rtw89_rx_desc_info *desc_info;
1439 struct sk_buff *skb;
1443 static void rtw89_stats_trigger_frame(struct rtw89_dev *rtwdev,
1444 struct ieee80211_vif *vif,
1445 struct sk_buff *skb)
1447 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1448 struct ieee80211_trigger *tf = (struct ieee80211_trigger *)skb->data;
1449 u8 *pos, *end, type;
1452 if (!ether_addr_equal(vif->bss_conf.bssid, tf->ta) ||
1453 rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION ||
1454 rtwvif->net_type == RTW89_NET_TYPE_NO_LINK)
1457 type = le64_get_bits(tf->common_info, IEEE80211_TRIGGER_TYPE_MASK);
1458 if (type != IEEE80211_TRIGGER_TYPE_BASIC)
1461 end = (u8 *)tf + skb->len;
1464 while (end - pos >= RTW89_TF_BASIC_USER_INFO_SZ) {
1465 aid = RTW89_GET_TF_USER_INFO_AID12(pos);
1466 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
1467 "[TF] aid: %d, ul_mcs: %d, rua: %d\n",
1468 aid, RTW89_GET_TF_USER_INFO_UL_MCS(pos),
1469 RTW89_GET_TF_USER_INFO_RUA(pos));
1471 if (aid == RTW89_TF_PAD)
1474 if (aid == vif->cfg.aid) {
1475 rtwvif->stats.rx_tf_acc++;
1476 rtwdev->stats.rx_tf_acc++;
1480 pos += RTW89_TF_BASIC_USER_INFO_SZ;
1484 static void rtw89_core_cancel_6ghz_probe_tx(struct rtw89_dev *rtwdev,
1485 struct sk_buff *skb)
1487 struct ieee80211_rx_status *rx_status = IEEE80211_SKB_RXCB(skb);
1488 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
1489 struct list_head *pkt_list = rtwdev->scan_info.pkt_list;
1490 struct rtw89_pktofld_info *info;
1491 const u8 *ies = mgmt->u.beacon.variable, *ssid_ie;
1493 if (rx_status->band != NL80211_BAND_6GHZ)
1496 ssid_ie = cfg80211_find_ie(WLAN_EID_SSID, ies, skb->len);
1498 list_for_each_entry(info, &pkt_list[NL80211_BAND_6GHZ], list) {
1499 if (ether_addr_equal(info->bssid, mgmt->bssid)) {
1500 rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id);
1504 if (!ssid_ie || ssid_ie[1] != info->ssid_len || info->ssid_len == 0)
1507 if (memcmp(&ssid_ie[2], info->ssid, info->ssid_len) == 0)
1508 rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id);
1512 static void rtw89_vif_rx_stats_iter(void *data, u8 *mac,
1513 struct ieee80211_vif *vif)
1515 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1516 struct rtw89_vif_rx_stats_iter_data *iter_data = data;
1517 struct rtw89_dev *rtwdev = iter_data->rtwdev;
1518 struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.cur_pkt_stat;
1519 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
1520 struct sk_buff *skb = iter_data->skb;
1521 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1522 struct rtw89_rx_phy_ppdu *phy_ppdu = iter_data->phy_ppdu;
1523 const u8 *bssid = iter_data->bssid;
1525 if (rtwdev->scanning &&
1526 (ieee80211_is_beacon(hdr->frame_control) ||
1527 ieee80211_is_probe_resp(hdr->frame_control)))
1528 rtw89_core_cancel_6ghz_probe_tx(rtwdev, skb);
1530 if (!vif->bss_conf.bssid)
1533 if (ieee80211_is_trigger(hdr->frame_control)) {
1534 rtw89_stats_trigger_frame(rtwdev, vif, skb);
1538 if (!ether_addr_equal(vif->bss_conf.bssid, bssid))
1541 if (ieee80211_is_beacon(hdr->frame_control)) {
1542 if (vif->type == NL80211_IFTYPE_STATION)
1543 rtw89_fw_h2c_rssi_offload(rtwdev, phy_ppdu);
1544 pkt_stat->beacon_nr++;
1547 if (!ether_addr_equal(vif->addr, hdr->addr1))
1550 if (desc_info->data_rate < RTW89_HW_RATE_NR)
1551 pkt_stat->rx_rate_cnt[desc_info->data_rate]++;
1553 rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, false);
1556 static void rtw89_core_rx_stats(struct rtw89_dev *rtwdev,
1557 struct rtw89_rx_phy_ppdu *phy_ppdu,
1558 struct rtw89_rx_desc_info *desc_info,
1559 struct sk_buff *skb)
1561 struct rtw89_vif_rx_stats_iter_data iter_data;
1563 rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, false);
1565 iter_data.rtwdev = rtwdev;
1566 iter_data.phy_ppdu = phy_ppdu;
1567 iter_data.desc_info = desc_info;
1568 iter_data.skb = skb;
1569 iter_data.bssid = get_hdr_bssid((struct ieee80211_hdr *)skb->data);
1570 rtw89_iterate_vifs_bh(rtwdev, rtw89_vif_rx_stats_iter, &iter_data);
1573 static void rtw89_correct_cck_chan(struct rtw89_dev *rtwdev,
1574 struct ieee80211_rx_status *status)
1576 const struct rtw89_chan_rcd *rcd =
1577 rtw89_chan_rcd_get(rtwdev, RTW89_SUB_ENTITY_0);
1578 u16 chan = rcd->prev_primary_channel;
1579 u8 band = rcd->prev_band_type == RTW89_BAND_2G ?
1580 NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
1582 if (status->band != NL80211_BAND_2GHZ &&
1583 status->encoding == RX_ENC_LEGACY &&
1584 status->rate_idx < RTW89_HW_RATE_OFDM6) {
1585 status->freq = ieee80211_channel_to_frequency(chan, band);
1586 status->band = band;
1590 static void rtw89_core_hw_to_sband_rate(struct ieee80211_rx_status *rx_status)
1592 if (rx_status->band == NL80211_BAND_2GHZ ||
1593 rx_status->encoding != RX_ENC_LEGACY)
1596 /* Some control frames' freq(ACKs in this case) are reported wrong due
1597 * to FW notify timing, set to lowest rate to prevent overflow.
1599 if (rx_status->rate_idx < RTW89_HW_RATE_OFDM6) {
1600 rx_status->rate_idx = 0;
1604 /* No 4 CCK rates for non-2G */
1605 rx_status->rate_idx -= 4;
1608 static void rtw89_core_update_radiotap(struct rtw89_dev *rtwdev,
1609 struct sk_buff *skb,
1610 struct ieee80211_rx_status *rx_status)
1612 static const struct ieee80211_radiotap_he known_he = {
1613 .data1 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN |
1614 IEEE80211_RADIOTAP_HE_DATA1_BW_RU_ALLOC_KNOWN),
1615 .data2 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN),
1617 struct ieee80211_radiotap_he *he;
1619 if (!(rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR))
1622 if (rx_status->encoding == RX_ENC_HE) {
1623 rx_status->flag |= RX_FLAG_RADIOTAP_HE;
1624 he = skb_push(skb, sizeof(*he));
1629 static void rtw89_core_rx_to_mac80211(struct rtw89_dev *rtwdev,
1630 struct rtw89_rx_phy_ppdu *phy_ppdu,
1631 struct rtw89_rx_desc_info *desc_info,
1632 struct sk_buff *skb_ppdu,
1633 struct ieee80211_rx_status *rx_status)
1635 struct napi_struct *napi = &rtwdev->napi;
1637 /* In low power mode, napi isn't scheduled. Receive it to netif. */
1638 if (unlikely(!test_bit(NAPI_STATE_SCHED, &napi->state)))
1641 rtw89_core_hw_to_sband_rate(rx_status);
1642 rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu);
1643 rtw89_core_update_radiotap(rtwdev, skb_ppdu, rx_status);
1644 /* In low power mode, it does RX in thread context. */
1646 ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, napi);
1648 rtwdev->napi_budget_countdown--;
1651 static void rtw89_core_rx_pending_skb(struct rtw89_dev *rtwdev,
1652 struct rtw89_rx_phy_ppdu *phy_ppdu,
1653 struct rtw89_rx_desc_info *desc_info,
1654 struct sk_buff *skb)
1656 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1657 int curr = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band];
1658 struct sk_buff *skb_ppdu = NULL, *tmp;
1659 struct ieee80211_rx_status *rx_status;
1661 if (curr > RTW89_MAX_PPDU_CNT)
1664 skb_queue_walk_safe(&rtwdev->ppdu_sts.rx_queue[band], skb_ppdu, tmp) {
1665 skb_unlink(skb_ppdu, &rtwdev->ppdu_sts.rx_queue[band]);
1666 rx_status = IEEE80211_SKB_RXCB(skb_ppdu);
1667 if (rtw89_core_rx_ppdu_match(rtwdev, desc_info, rx_status))
1668 rtw89_chip_query_ppdu(rtwdev, phy_ppdu, rx_status);
1669 rtw89_correct_cck_chan(rtwdev, rx_status);
1670 rtw89_core_rx_to_mac80211(rtwdev, phy_ppdu, desc_info, skb_ppdu, rx_status);
1674 static void rtw89_core_rx_process_ppdu_sts(struct rtw89_dev *rtwdev,
1675 struct rtw89_rx_desc_info *desc_info,
1676 struct sk_buff *skb)
1678 struct rtw89_rx_phy_ppdu phy_ppdu = {.buf = skb->data, .valid = false,
1680 .to_self = desc_info->addr1_match,
1681 .rate = desc_info->data_rate,
1682 .mac_id = desc_info->mac_id};
1685 if (desc_info->mac_info_valid)
1686 rtw89_core_rx_process_mac_ppdu(rtwdev, skb, &phy_ppdu);
1687 ret = rtw89_core_rx_process_phy_ppdu(rtwdev, &phy_ppdu);
1689 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "process ppdu failed\n");
1691 rtw89_core_rx_process_phy_sts(rtwdev, &phy_ppdu);
1692 rtw89_core_rx_pending_skb(rtwdev, &phy_ppdu, desc_info, skb);
1693 dev_kfree_skb_any(skb);
1696 static void rtw89_core_rx_process_report(struct rtw89_dev *rtwdev,
1697 struct rtw89_rx_desc_info *desc_info,
1698 struct sk_buff *skb)
1700 switch (desc_info->pkt_type) {
1701 case RTW89_CORE_RX_TYPE_C2H:
1702 rtw89_fw_c2h_irqsafe(rtwdev, skb);
1704 case RTW89_CORE_RX_TYPE_PPDU_STAT:
1705 rtw89_core_rx_process_ppdu_sts(rtwdev, desc_info, skb);
1708 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "unhandled pkt_type=%d\n",
1709 desc_info->pkt_type);
1710 dev_kfree_skb_any(skb);
1715 void rtw89_core_query_rxdesc(struct rtw89_dev *rtwdev,
1716 struct rtw89_rx_desc_info *desc_info,
1717 u8 *data, u32 data_offset)
1719 const struct rtw89_chip_info *chip = rtwdev->chip;
1720 struct rtw89_rxdesc_short *rxd_s;
1721 struct rtw89_rxdesc_long *rxd_l;
1722 u8 shift_len, drv_info_len;
1724 rxd_s = (struct rtw89_rxdesc_short *)(data + data_offset);
1725 desc_info->pkt_size = RTW89_GET_RXWD_PKT_SIZE(rxd_s);
1726 desc_info->drv_info_size = RTW89_GET_RXWD_DRV_INFO_SIZE(rxd_s);
1727 desc_info->long_rxdesc = RTW89_GET_RXWD_LONG_RXD(rxd_s);
1728 desc_info->pkt_type = RTW89_GET_RXWD_RPKT_TYPE(rxd_s);
1729 desc_info->mac_info_valid = RTW89_GET_RXWD_MAC_INFO_VALID(rxd_s);
1730 if (chip->chip_id == RTL8852C)
1731 desc_info->bw = RTW89_GET_RXWD_BW_V1(rxd_s);
1733 desc_info->bw = RTW89_GET_RXWD_BW(rxd_s);
1734 desc_info->data_rate = RTW89_GET_RXWD_DATA_RATE(rxd_s);
1735 desc_info->gi_ltf = RTW89_GET_RXWD_GI_LTF(rxd_s);
1736 desc_info->user_id = RTW89_GET_RXWD_USER_ID(rxd_s);
1737 desc_info->sr_en = RTW89_GET_RXWD_SR_EN(rxd_s);
1738 desc_info->ppdu_cnt = RTW89_GET_RXWD_PPDU_CNT(rxd_s);
1739 desc_info->ppdu_type = RTW89_GET_RXWD_PPDU_TYPE(rxd_s);
1740 desc_info->free_run_cnt = RTW89_GET_RXWD_FREE_RUN_CNT(rxd_s);
1741 desc_info->icv_err = RTW89_GET_RXWD_ICV_ERR(rxd_s);
1742 desc_info->crc32_err = RTW89_GET_RXWD_CRC32_ERR(rxd_s);
1743 desc_info->hw_dec = RTW89_GET_RXWD_HW_DEC(rxd_s);
1744 desc_info->sw_dec = RTW89_GET_RXWD_SW_DEC(rxd_s);
1745 desc_info->addr1_match = RTW89_GET_RXWD_A1_MATCH(rxd_s);
1747 shift_len = desc_info->shift << 1; /* 2-byte unit */
1748 drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */
1749 desc_info->offset = data_offset + shift_len + drv_info_len;
1750 desc_info->ready = true;
1752 if (!desc_info->long_rxdesc)
1755 rxd_l = (struct rtw89_rxdesc_long *)(data + data_offset);
1756 desc_info->frame_type = RTW89_GET_RXWD_TYPE(rxd_l);
1757 desc_info->addr_cam_valid = RTW89_GET_RXWD_ADDR_CAM_VLD(rxd_l);
1758 desc_info->addr_cam_id = RTW89_GET_RXWD_ADDR_CAM_ID(rxd_l);
1759 desc_info->sec_cam_id = RTW89_GET_RXWD_SEC_CAM_ID(rxd_l);
1760 desc_info->mac_id = RTW89_GET_RXWD_MAC_ID(rxd_l);
1761 desc_info->rx_pl_id = RTW89_GET_RXWD_RX_PL_ID(rxd_l);
1763 EXPORT_SYMBOL(rtw89_core_query_rxdesc);
1765 struct rtw89_core_iter_rx_status {
1766 struct rtw89_dev *rtwdev;
1767 struct ieee80211_rx_status *rx_status;
1768 struct rtw89_rx_desc_info *desc_info;
1773 void rtw89_core_stats_sta_rx_status_iter(void *data, struct ieee80211_sta *sta)
1775 struct rtw89_core_iter_rx_status *iter_data =
1776 (struct rtw89_core_iter_rx_status *)data;
1777 struct ieee80211_rx_status *rx_status = iter_data->rx_status;
1778 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1779 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
1780 u8 mac_id = iter_data->mac_id;
1782 if (mac_id != rtwsta->mac_id)
1785 rtwsta->rx_status = *rx_status;
1786 rtwsta->rx_hw_rate = desc_info->data_rate;
1789 static void rtw89_core_stats_sta_rx_status(struct rtw89_dev *rtwdev,
1790 struct rtw89_rx_desc_info *desc_info,
1791 struct ieee80211_rx_status *rx_status)
1793 struct rtw89_core_iter_rx_status iter_data;
1795 if (!desc_info->addr1_match || !desc_info->long_rxdesc)
1798 if (desc_info->frame_type != RTW89_RX_TYPE_DATA)
1801 iter_data.rtwdev = rtwdev;
1802 iter_data.rx_status = rx_status;
1803 iter_data.desc_info = desc_info;
1804 iter_data.mac_id = desc_info->mac_id;
1805 ieee80211_iterate_stations_atomic(rtwdev->hw,
1806 rtw89_core_stats_sta_rx_status_iter,
1810 static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev,
1811 struct rtw89_rx_desc_info *desc_info,
1812 struct ieee80211_rx_status *rx_status)
1814 const struct cfg80211_chan_def *chandef =
1815 rtw89_chandef_get(rtwdev, RTW89_SUB_ENTITY_0);
1816 const struct rtw89_chan *cur = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
1820 /* currently using single PHY */
1821 rx_status->freq = chandef->chan->center_freq;
1822 rx_status->band = chandef->chan->band;
1824 if (rtwdev->scanning &&
1825 RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &rtwdev->fw)) {
1826 u8 chan = cur->primary_channel;
1827 u8 band = cur->band_type;
1828 enum nl80211_band nl_band;
1830 nl_band = rtw89_hw_to_nl80211_band(band);
1831 rx_status->freq = ieee80211_channel_to_frequency(chan, nl_band);
1832 rx_status->band = nl_band;
1835 if (desc_info->icv_err || desc_info->crc32_err)
1836 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
1838 if (desc_info->hw_dec &&
1839 !(desc_info->sw_dec || desc_info->icv_err))
1840 rx_status->flag |= RX_FLAG_DECRYPTED;
1842 rx_status->bw = rtw89_hw_to_rate_info_bw(desc_info->bw);
1844 data_rate = desc_info->data_rate;
1845 data_rate_mode = GET_DATA_RATE_MODE(data_rate);
1846 if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
1847 rx_status->encoding = RX_ENC_LEGACY;
1848 rx_status->rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate);
1849 /* convert rate_idx after we get the correct band */
1850 } else if (data_rate_mode == DATA_RATE_MODE_HT) {
1851 rx_status->encoding = RX_ENC_HT;
1852 rx_status->rate_idx = GET_DATA_RATE_HT_IDX(data_rate);
1853 if (desc_info->gi_ltf)
1854 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1855 } else if (data_rate_mode == DATA_RATE_MODE_VHT) {
1856 rx_status->encoding = RX_ENC_VHT;
1857 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1858 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1;
1859 if (desc_info->gi_ltf)
1860 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1861 } else if (data_rate_mode == DATA_RATE_MODE_HE) {
1862 rx_status->encoding = RX_ENC_HE;
1863 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1864 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1;
1866 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
1869 /* he_gi is used to match ppdu, so we always fill it. */
1870 rx_status->he_gi = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, true);
1871 rx_status->flag |= RX_FLAG_MACTIME_START;
1872 rx_status->mactime = desc_info->free_run_cnt;
1874 rtw89_core_stats_sta_rx_status(rtwdev, desc_info, rx_status);
1877 static enum rtw89_ps_mode rtw89_update_ps_mode(struct rtw89_dev *rtwdev)
1879 const struct rtw89_chip_info *chip = rtwdev->chip;
1881 if (rtw89_disable_ps_mode || !chip->ps_mode_supported ||
1882 RTW89_CHK_FW_FEATURE(NO_DEEP_PS, &rtwdev->fw))
1883 return RTW89_PS_MODE_NONE;
1885 if ((chip->ps_mode_supported & BIT(RTW89_PS_MODE_PWR_GATED)) &&
1886 !RTW89_CHK_FW_FEATURE(NO_LPS_PG, &rtwdev->fw))
1887 return RTW89_PS_MODE_PWR_GATED;
1889 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_CLK_GATED))
1890 return RTW89_PS_MODE_CLK_GATED;
1892 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_RFOFF))
1893 return RTW89_PS_MODE_RFOFF;
1895 return RTW89_PS_MODE_NONE;
1898 static void rtw89_core_flush_ppdu_rx_queue(struct rtw89_dev *rtwdev,
1899 struct rtw89_rx_desc_info *desc_info)
1901 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
1902 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1903 struct ieee80211_rx_status *rx_status;
1904 struct sk_buff *skb_ppdu, *tmp;
1906 skb_queue_walk_safe(&ppdu_sts->rx_queue[band], skb_ppdu, tmp) {
1907 skb_unlink(skb_ppdu, &ppdu_sts->rx_queue[band]);
1908 rx_status = IEEE80211_SKB_RXCB(skb_ppdu);
1909 rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb_ppdu, rx_status);
1913 void rtw89_core_rx(struct rtw89_dev *rtwdev,
1914 struct rtw89_rx_desc_info *desc_info,
1915 struct sk_buff *skb)
1917 struct ieee80211_rx_status *rx_status;
1918 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
1919 u8 ppdu_cnt = desc_info->ppdu_cnt;
1920 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1922 if (desc_info->pkt_type != RTW89_CORE_RX_TYPE_WIFI) {
1923 rtw89_core_rx_process_report(rtwdev, desc_info, skb);
1927 if (ppdu_sts->curr_rx_ppdu_cnt[band] != ppdu_cnt) {
1928 rtw89_core_flush_ppdu_rx_queue(rtwdev, desc_info);
1929 ppdu_sts->curr_rx_ppdu_cnt[band] = ppdu_cnt;
1932 rx_status = IEEE80211_SKB_RXCB(skb);
1933 memset(rx_status, 0, sizeof(*rx_status));
1934 rtw89_core_update_rx_status(rtwdev, desc_info, rx_status);
1935 if (desc_info->long_rxdesc &&
1936 BIT(desc_info->frame_type) & PPDU_FILTER_BITMAP)
1937 skb_queue_tail(&ppdu_sts->rx_queue[band], skb);
1939 rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb, rx_status);
1941 EXPORT_SYMBOL(rtw89_core_rx);
1943 void rtw89_core_napi_start(struct rtw89_dev *rtwdev)
1945 if (test_and_set_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
1948 napi_enable(&rtwdev->napi);
1950 EXPORT_SYMBOL(rtw89_core_napi_start);
1952 void rtw89_core_napi_stop(struct rtw89_dev *rtwdev)
1954 if (!test_and_clear_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
1957 napi_synchronize(&rtwdev->napi);
1958 napi_disable(&rtwdev->napi);
1960 EXPORT_SYMBOL(rtw89_core_napi_stop);
1962 void rtw89_core_napi_init(struct rtw89_dev *rtwdev)
1964 init_dummy_netdev(&rtwdev->netdev);
1965 netif_napi_add(&rtwdev->netdev, &rtwdev->napi,
1966 rtwdev->hci.ops->napi_poll);
1968 EXPORT_SYMBOL(rtw89_core_napi_init);
1970 void rtw89_core_napi_deinit(struct rtw89_dev *rtwdev)
1972 rtw89_core_napi_stop(rtwdev);
1973 netif_napi_del(&rtwdev->napi);
1975 EXPORT_SYMBOL(rtw89_core_napi_deinit);
1977 static void rtw89_core_ba_work(struct work_struct *work)
1979 struct rtw89_dev *rtwdev =
1980 container_of(work, struct rtw89_dev, ba_work);
1981 struct rtw89_txq *rtwtxq, *tmp;
1984 spin_lock_bh(&rtwdev->ba_lock);
1985 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
1986 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
1987 struct ieee80211_sta *sta = txq->sta;
1988 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
1992 rtw89_warn(rtwdev, "cannot start BA without sta\n");
1996 if (rtwsta->disassoc) {
1997 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
1998 "cannot start BA with disassoc sta\n");
2002 ret = ieee80211_start_tx_ba_session(sta, tid, 0);
2004 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2005 "failed to setup BA session for %pM:%2d: %d\n",
2006 sta->addr, tid, ret);
2008 set_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags);
2011 list_del_init(&rtwtxq->list);
2013 spin_unlock_bh(&rtwdev->ba_lock);
2016 static void rtw89_core_free_sta_pending_ba(struct rtw89_dev *rtwdev,
2017 struct ieee80211_sta *sta)
2019 struct rtw89_txq *rtwtxq, *tmp;
2021 spin_lock_bh(&rtwdev->ba_lock);
2022 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
2023 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2025 if (sta == txq->sta)
2026 list_del_init(&rtwtxq->list);
2028 spin_unlock_bh(&rtwdev->ba_lock);
2031 static void rtw89_core_free_sta_pending_forbid_ba(struct rtw89_dev *rtwdev,
2032 struct ieee80211_sta *sta)
2034 struct rtw89_txq *rtwtxq, *tmp;
2036 spin_lock_bh(&rtwdev->ba_lock);
2037 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->forbid_ba_list, list) {
2038 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2040 if (sta == txq->sta) {
2041 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
2042 list_del_init(&rtwtxq->list);
2045 spin_unlock_bh(&rtwdev->ba_lock);
2048 static void rtw89_core_free_sta_pending_roc_tx(struct rtw89_dev *rtwdev,
2049 struct ieee80211_sta *sta)
2051 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2052 struct sk_buff *skb, *tmp;
2054 skb_queue_walk_safe(&rtwsta->roc_queue, skb, tmp) {
2055 skb_unlink(skb, &rtwsta->roc_queue);
2056 dev_kfree_skb_any(skb);
2060 static void rtw89_core_stop_tx_ba_session(struct rtw89_dev *rtwdev,
2061 struct rtw89_txq *rtwtxq)
2063 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2064 struct ieee80211_sta *sta = txq->sta;
2065 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
2067 if (unlikely(!rtwsta) || unlikely(rtwsta->disassoc))
2070 if (!test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags) ||
2071 test_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
2074 spin_lock_bh(&rtwdev->ba_lock);
2075 if (!test_and_set_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
2076 list_add_tail(&rtwtxq->list, &rtwdev->forbid_ba_list);
2077 spin_unlock_bh(&rtwdev->ba_lock);
2079 ieee80211_stop_tx_ba_session(sta, txq->tid);
2080 cancel_delayed_work(&rtwdev->forbid_ba_work);
2081 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->forbid_ba_work,
2082 RTW89_FORBID_BA_TIMER);
2085 static void rtw89_core_txq_check_agg(struct rtw89_dev *rtwdev,
2086 struct rtw89_txq *rtwtxq,
2087 struct sk_buff *skb)
2089 struct ieee80211_hw *hw = rtwdev->hw;
2090 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2091 struct ieee80211_sta *sta = txq->sta;
2092 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
2094 if (test_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
2097 if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE))) {
2098 rtw89_core_stop_tx_ba_session(rtwdev, rtwtxq);
2105 if (unlikely(test_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags)))
2108 if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags)) {
2109 IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_CTL_AMPDU;
2113 spin_lock_bh(&rtwdev->ba_lock);
2114 if (!rtwsta->disassoc && list_empty(&rtwtxq->list)) {
2115 list_add_tail(&rtwtxq->list, &rtwdev->ba_list);
2116 ieee80211_queue_work(hw, &rtwdev->ba_work);
2118 spin_unlock_bh(&rtwdev->ba_lock);
2121 static void rtw89_core_txq_push(struct rtw89_dev *rtwdev,
2122 struct rtw89_txq *rtwtxq,
2123 unsigned long frame_cnt,
2124 unsigned long byte_cnt)
2126 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2127 struct ieee80211_vif *vif = txq->vif;
2128 struct ieee80211_sta *sta = txq->sta;
2129 struct sk_buff *skb;
2134 for (i = 0; i < frame_cnt; i++) {
2135 skb = ieee80211_tx_dequeue_ni(rtwdev->hw, txq);
2137 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "dequeue a NULL skb\n");
2140 rtw89_core_txq_check_agg(rtwdev, rtwtxq, skb);
2141 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, NULL);
2143 rtw89_err(rtwdev, "failed to push txq: %d\n", ret);
2144 ieee80211_free_txskb(rtwdev->hw, skb);
2152 static u32 rtw89_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 tid)
2156 qsel = rtw89_core_get_qsel(rtwdev, tid);
2157 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
2159 return rtw89_hci_check_and_reclaim_tx_resource(rtwdev, ch_dma);
2162 static bool rtw89_core_txq_agg_wait(struct rtw89_dev *rtwdev,
2163 struct ieee80211_txq *txq,
2164 unsigned long *frame_cnt,
2165 bool *sched_txq, bool *reinvoke)
2167 struct rtw89_txq *rtwtxq = (struct rtw89_txq *)txq->drv_priv;
2168 struct ieee80211_sta *sta = txq->sta;
2169 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
2171 if (!sta || rtwsta->max_agg_wait <= 0)
2174 if (rtwdev->stats.tx_tfc_lv <= RTW89_TFC_MID)
2177 if (*frame_cnt > 1) {
2181 rtwtxq->wait_cnt = 1;
2185 if (*frame_cnt == 1 && rtwtxq->wait_cnt < rtwsta->max_agg_wait) {
2191 rtwtxq->wait_cnt = 0;
2195 static void rtw89_core_txq_schedule(struct rtw89_dev *rtwdev, u8 ac, bool *reinvoke)
2197 struct ieee80211_hw *hw = rtwdev->hw;
2198 struct ieee80211_txq *txq;
2199 struct rtw89_vif *rtwvif;
2200 struct rtw89_txq *rtwtxq;
2201 unsigned long frame_cnt;
2202 unsigned long byte_cnt;
2206 ieee80211_txq_schedule_start(hw, ac);
2207 while ((txq = ieee80211_next_txq(hw, ac))) {
2208 rtwtxq = (struct rtw89_txq *)txq->drv_priv;
2209 rtwvif = (struct rtw89_vif *)txq->vif->drv_priv;
2211 if (rtwvif->offchan) {
2212 ieee80211_return_txq(hw, txq, true);
2215 tx_resource = rtw89_check_and_reclaim_tx_resource(rtwdev, txq->tid);
2218 ieee80211_txq_get_depth(txq, &frame_cnt, &byte_cnt);
2219 if (rtw89_core_txq_agg_wait(rtwdev, txq, &frame_cnt, &sched_txq, reinvoke)) {
2220 ieee80211_return_txq(hw, txq, true);
2223 frame_cnt = min_t(unsigned long, frame_cnt, tx_resource);
2224 rtw89_core_txq_push(rtwdev, rtwtxq, frame_cnt, byte_cnt);
2225 ieee80211_return_txq(hw, txq, sched_txq);
2227 rtw89_core_tx_kick_off(rtwdev, rtw89_core_get_qsel(rtwdev, txq->tid));
2229 /* bound of tx_resource could get stuck due to burst traffic */
2230 if (frame_cnt == tx_resource)
2233 ieee80211_txq_schedule_end(hw, ac);
2236 static void rtw89_ips_work(struct work_struct *work)
2238 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
2240 mutex_lock(&rtwdev->mutex);
2241 rtw89_enter_ips_by_hwflags(rtwdev);
2242 mutex_unlock(&rtwdev->mutex);
2245 static void rtw89_core_txq_work(struct work_struct *w)
2247 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, txq_work);
2248 bool reinvoke = false;
2251 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2252 rtw89_core_txq_schedule(rtwdev, ac, &reinvoke);
2255 /* reinvoke to process the last frame */
2256 mod_delayed_work(rtwdev->txq_wq, &rtwdev->txq_reinvoke_work, 1);
2260 static void rtw89_core_txq_reinvoke_work(struct work_struct *w)
2262 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev,
2263 txq_reinvoke_work.work);
2265 queue_work(rtwdev->txq_wq, &rtwdev->txq_work);
2268 static void rtw89_forbid_ba_work(struct work_struct *w)
2270 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev,
2271 forbid_ba_work.work);
2272 struct rtw89_txq *rtwtxq, *tmp;
2274 spin_lock_bh(&rtwdev->ba_lock);
2275 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->forbid_ba_list, list) {
2276 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
2277 list_del_init(&rtwtxq->list);
2279 spin_unlock_bh(&rtwdev->ba_lock);
2282 static void rtw89_core_sta_pending_tx_iter(void *data,
2283 struct ieee80211_sta *sta)
2285 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2286 struct rtw89_vif *rtwvif_target = data, *rtwvif = rtwsta->rtwvif;
2287 struct rtw89_dev *rtwdev = rtwvif->rtwdev;
2288 struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
2289 struct sk_buff *skb, *tmp;
2292 if (rtwvif->sub_entity_idx != rtwvif_target->sub_entity_idx)
2295 if (skb_queue_len(&rtwsta->roc_queue) == 0)
2298 skb_queue_walk_safe(&rtwsta->roc_queue, skb, tmp) {
2299 skb_unlink(skb, &rtwsta->roc_queue);
2301 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, &qsel);
2303 rtw89_warn(rtwdev, "pending tx failed with %d\n", ret);
2304 dev_kfree_skb_any(skb);
2306 rtw89_core_tx_kick_off(rtwdev, qsel);
2311 static void rtw89_core_handle_sta_pending_tx(struct rtw89_dev *rtwdev,
2312 struct rtw89_vif *rtwvif)
2314 ieee80211_iterate_stations_atomic(rtwdev->hw,
2315 rtw89_core_sta_pending_tx_iter,
2319 static int rtw89_core_send_nullfunc(struct rtw89_dev *rtwdev,
2320 struct rtw89_vif *rtwvif, bool qos, bool ps)
2322 struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
2323 struct ieee80211_sta *sta;
2324 struct ieee80211_hdr *hdr;
2325 struct sk_buff *skb;
2328 if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc)
2332 sta = ieee80211_find_sta(vif, vif->bss_conf.bssid);
2338 skb = ieee80211_nullfunc_get(rtwdev->hw, vif, -1, qos);
2344 hdr = (struct ieee80211_hdr *)skb->data;
2346 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
2348 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, &qsel);
2350 rtw89_warn(rtwdev, "nullfunc transmit failed: %d\n", ret);
2351 dev_kfree_skb_any(skb);
2357 return rtw89_core_tx_kick_off_and_wait(rtwdev, skb, qsel,
2358 RTW89_ROC_TX_TIMEOUT);
2365 void rtw89_roc_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
2367 struct ieee80211_hw *hw = rtwdev->hw;
2368 struct rtw89_roc *roc = &rtwvif->roc;
2369 struct cfg80211_chan_def roc_chan;
2370 struct rtw89_vif *tmp;
2373 lockdep_assert_held(&rtwdev->mutex);
2375 ieee80211_queue_delayed_work(hw, &rtwvif->roc.roc_work,
2376 msecs_to_jiffies(rtwvif->roc.duration));
2378 rtw89_leave_ips_by_hwflags(rtwdev);
2379 rtw89_leave_lps(rtwdev);
2381 ret = rtw89_core_send_nullfunc(rtwdev, rtwvif, true, true);
2383 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2384 "roc send null-1 failed: %d\n", ret);
2386 rtw89_for_each_rtwvif(rtwdev, tmp)
2387 if (tmp->sub_entity_idx == rtwvif->sub_entity_idx)
2388 tmp->offchan = true;
2390 cfg80211_chandef_create(&roc_chan, &roc->chan, NL80211_CHAN_NO_HT);
2391 rtw89_config_roc_chandef(rtwdev, rtwvif->sub_entity_idx, &roc_chan);
2392 rtw89_set_channel(rtwdev);
2393 rtw89_write32_clr(rtwdev,
2394 rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0),
2395 B_AX_A_UC_CAM_MATCH | B_AX_A_BC_CAM_MATCH);
2397 ieee80211_ready_on_channel(hw);
2400 void rtw89_roc_end(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
2402 struct ieee80211_hw *hw = rtwdev->hw;
2403 struct rtw89_roc *roc = &rtwvif->roc;
2404 struct rtw89_vif *tmp;
2407 lockdep_assert_held(&rtwdev->mutex);
2409 ieee80211_remain_on_channel_expired(hw);
2411 rtw89_leave_ips_by_hwflags(rtwdev);
2412 rtw89_leave_lps(rtwdev);
2414 rtw89_write32_mask(rtwdev,
2415 rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0),
2416 B_AX_RX_FLTR_CFG_MASK,
2417 rtwdev->hal.rx_fltr);
2419 roc->state = RTW89_ROC_IDLE;
2420 rtw89_config_roc_chandef(rtwdev, rtwvif->sub_entity_idx, NULL);
2421 rtw89_set_channel(rtwdev);
2422 ret = rtw89_core_send_nullfunc(rtwdev, rtwvif, true, false);
2424 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2425 "roc send null-0 failed: %d\n", ret);
2427 rtw89_for_each_rtwvif(rtwdev, tmp)
2428 if (tmp->sub_entity_idx == rtwvif->sub_entity_idx)
2429 tmp->offchan = false;
2431 rtw89_core_handle_sta_pending_tx(rtwdev, rtwvif);
2432 queue_work(rtwdev->txq_wq, &rtwdev->txq_work);
2434 if (hw->conf.flags & IEEE80211_CONF_IDLE)
2435 ieee80211_queue_delayed_work(hw, &roc->roc_work,
2436 RTW89_ROC_IDLE_TIMEOUT);
2439 void rtw89_roc_work(struct work_struct *work)
2441 struct rtw89_vif *rtwvif = container_of(work, struct rtw89_vif,
2443 struct rtw89_dev *rtwdev = rtwvif->rtwdev;
2444 struct rtw89_roc *roc = &rtwvif->roc;
2446 mutex_lock(&rtwdev->mutex);
2448 switch (roc->state) {
2449 case RTW89_ROC_IDLE:
2450 rtw89_enter_ips_by_hwflags(rtwdev);
2452 case RTW89_ROC_MGMT:
2453 case RTW89_ROC_NORMAL:
2454 rtw89_roc_end(rtwdev, rtwvif);
2460 mutex_unlock(&rtwdev->mutex);
2463 static enum rtw89_tfc_lv rtw89_get_traffic_level(struct rtw89_dev *rtwdev,
2464 u32 throughput, u64 cnt)
2467 return RTW89_TFC_IDLE;
2468 if (throughput > 50)
2469 return RTW89_TFC_HIGH;
2470 if (throughput > 10)
2471 return RTW89_TFC_MID;
2473 return RTW89_TFC_LOW;
2474 return RTW89_TFC_ULTRA_LOW;
2477 static bool rtw89_traffic_stats_calc(struct rtw89_dev *rtwdev,
2478 struct rtw89_traffic_stats *stats)
2480 enum rtw89_tfc_lv tx_tfc_lv = stats->tx_tfc_lv;
2481 enum rtw89_tfc_lv rx_tfc_lv = stats->rx_tfc_lv;
2483 stats->tx_throughput_raw = (u32)(stats->tx_unicast >> RTW89_TP_SHIFT);
2484 stats->rx_throughput_raw = (u32)(stats->rx_unicast >> RTW89_TP_SHIFT);
2486 ewma_tp_add(&stats->tx_ewma_tp, stats->tx_throughput_raw);
2487 ewma_tp_add(&stats->rx_ewma_tp, stats->rx_throughput_raw);
2489 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
2490 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
2491 stats->tx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->tx_throughput,
2493 stats->rx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->rx_throughput,
2495 stats->tx_avg_len = stats->tx_cnt ?
2496 DIV_ROUND_DOWN_ULL(stats->tx_unicast, stats->tx_cnt) : 0;
2497 stats->rx_avg_len = stats->rx_cnt ?
2498 DIV_ROUND_DOWN_ULL(stats->rx_unicast, stats->rx_cnt) : 0;
2500 stats->tx_unicast = 0;
2501 stats->rx_unicast = 0;
2504 stats->rx_tf_periodic = stats->rx_tf_acc;
2505 stats->rx_tf_acc = 0;
2507 if (tx_tfc_lv != stats->tx_tfc_lv || rx_tfc_lv != stats->rx_tfc_lv)
2513 static bool rtw89_traffic_stats_track(struct rtw89_dev *rtwdev)
2515 struct rtw89_vif *rtwvif;
2518 tfc_changed = rtw89_traffic_stats_calc(rtwdev, &rtwdev->stats);
2519 rtw89_for_each_rtwvif(rtwdev, rtwvif) {
2520 rtw89_traffic_stats_calc(rtwdev, &rtwvif->stats);
2521 rtw89_fw_h2c_tp_offload(rtwdev, rtwvif);
2527 static void rtw89_vif_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
2529 if ((rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION &&
2530 rtwvif->wifi_role != RTW89_WIFI_ROLE_P2P_CLIENT) ||
2534 if (rtwdev->total_sta_assoc > 1)
2537 if (rtwvif->offchan)
2540 if (rtwvif->stats.tx_tfc_lv == RTW89_TFC_IDLE &&
2541 rtwvif->stats.rx_tfc_lv == RTW89_TFC_IDLE)
2542 rtw89_enter_lps(rtwdev, rtwvif, true);
2545 static void rtw89_enter_lps_track(struct rtw89_dev *rtwdev)
2547 struct rtw89_vif *rtwvif;
2549 rtw89_for_each_rtwvif(rtwdev, rtwvif)
2550 rtw89_vif_enter_lps(rtwdev, rtwvif);
2553 void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev,
2554 struct rtw89_traffic_stats *stats)
2556 stats->tx_unicast = 0;
2557 stats->rx_unicast = 0;
2560 ewma_tp_init(&stats->tx_ewma_tp);
2561 ewma_tp_init(&stats->rx_ewma_tp);
2564 static void rtw89_track_work(struct work_struct *work)
2566 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
2570 if (test_bit(RTW89_FLAG_FORBIDDEN_TRACK_WROK, rtwdev->flags))
2573 mutex_lock(&rtwdev->mutex);
2575 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
2578 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work,
2579 RTW89_TRACK_WORK_PERIOD);
2581 tfc_changed = rtw89_traffic_stats_track(rtwdev);
2582 if (rtwdev->scanning)
2585 rtw89_leave_lps(rtwdev);
2588 rtw89_hci_recalc_int_mit(rtwdev);
2589 rtw89_btc_ntfy_wl_sta(rtwdev);
2591 rtw89_mac_bf_monitor_track(rtwdev);
2592 rtw89_phy_stat_track(rtwdev);
2593 rtw89_phy_env_monitor_track(rtwdev);
2594 rtw89_phy_dig(rtwdev);
2595 rtw89_chip_rfk_track(rtwdev);
2596 rtw89_phy_ra_update(rtwdev);
2597 rtw89_phy_cfo_track(rtwdev);
2598 rtw89_phy_tx_path_div_track(rtwdev);
2599 rtw89_phy_ul_tb_ctrl_track(rtwdev);
2601 if (rtwdev->lps_enabled && !rtwdev->btc.lps)
2602 rtw89_enter_lps_track(rtwdev);
2605 mutex_unlock(&rtwdev->mutex);
2608 u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size)
2612 bit = find_first_zero_bit(addr, size);
2619 void rtw89_core_release_bit_map(unsigned long *addr, u8 bit)
2621 clear_bit(bit, addr);
2624 void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits)
2626 bitmap_zero(addr, nbits);
2629 int rtw89_core_acquire_sta_ba_entry(struct rtw89_dev *rtwdev,
2630 struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx)
2632 const struct rtw89_chip_info *chip = rtwdev->chip;
2633 struct rtw89_cam_info *cam_info = &rtwdev->cam_info;
2634 struct rtw89_ba_cam_entry *entry = NULL, *tmp;
2638 lockdep_assert_held(&rtwdev->mutex);
2640 idx = rtw89_core_acquire_bit_map(cam_info->ba_cam_map, chip->bacam_num);
2641 if (idx == chip->bacam_num) {
2642 /* allocate a static BA CAM to tid=0/5, so replace the existing
2643 * one if BA CAM is full. Hardware will process the original tid
2646 if (tid != 0 && tid != 5)
2649 for_each_set_bit(i, cam_info->ba_cam_map, chip->bacam_num) {
2650 tmp = &cam_info->ba_cam_entry[i];
2651 if (tmp->tid == 0 || tmp->tid == 5)
2656 list_del(&entry->list);
2663 entry = &cam_info->ba_cam_entry[idx];
2667 list_add_tail(&entry->list, &rtwsta->ba_cam_list);
2674 int rtw89_core_release_sta_ba_entry(struct rtw89_dev *rtwdev,
2675 struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx)
2677 struct rtw89_cam_info *cam_info = &rtwdev->cam_info;
2678 struct rtw89_ba_cam_entry *entry = NULL, *tmp;
2681 lockdep_assert_held(&rtwdev->mutex);
2683 list_for_each_entry_safe(entry, tmp, &rtwsta->ba_cam_list, list) {
2684 if (entry->tid != tid)
2687 idx = entry - cam_info->ba_cam_entry;
2688 list_del(&entry->list);
2690 rtw89_core_release_bit_map(cam_info->ba_cam_map, idx);
2698 #define RTW89_TYPE_MAPPING(_type) \
2699 case NL80211_IFTYPE_ ## _type: \
2700 rtwvif->wifi_role = RTW89_WIFI_ROLE_ ## _type; \
2702 void rtw89_vif_type_mapping(struct ieee80211_vif *vif, bool assoc)
2704 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2706 switch (vif->type) {
2707 case NL80211_IFTYPE_STATION:
2709 rtwvif->wifi_role = RTW89_WIFI_ROLE_P2P_CLIENT;
2711 rtwvif->wifi_role = RTW89_WIFI_ROLE_STATION;
2713 case NL80211_IFTYPE_AP:
2715 rtwvif->wifi_role = RTW89_WIFI_ROLE_P2P_GO;
2717 rtwvif->wifi_role = RTW89_WIFI_ROLE_AP;
2719 RTW89_TYPE_MAPPING(ADHOC);
2720 RTW89_TYPE_MAPPING(MONITOR);
2721 RTW89_TYPE_MAPPING(MESH_POINT);
2727 switch (vif->type) {
2728 case NL80211_IFTYPE_AP:
2729 case NL80211_IFTYPE_MESH_POINT:
2730 rtwvif->net_type = RTW89_NET_TYPE_AP_MODE;
2731 rtwvif->self_role = RTW89_SELF_ROLE_AP;
2733 case NL80211_IFTYPE_ADHOC:
2734 rtwvif->net_type = RTW89_NET_TYPE_AD_HOC;
2735 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT;
2737 case NL80211_IFTYPE_STATION:
2739 rtwvif->net_type = RTW89_NET_TYPE_INFRA;
2740 rtwvif->trigger = vif->bss_conf.he_support;
2742 rtwvif->net_type = RTW89_NET_TYPE_NO_LINK;
2743 rtwvif->trigger = false;
2745 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT;
2746 rtwvif->addr_cam.sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL;
2748 case NL80211_IFTYPE_MONITOR:
2756 int rtw89_core_sta_add(struct rtw89_dev *rtwdev,
2757 struct ieee80211_vif *vif,
2758 struct ieee80211_sta *sta)
2760 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2761 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2765 rtwsta->rtwdev = rtwdev;
2766 rtwsta->rtwvif = rtwvif;
2767 rtwsta->prev_rssi = 0;
2768 INIT_LIST_HEAD(&rtwsta->ba_cam_list);
2769 skb_queue_head_init(&rtwsta->roc_queue);
2771 for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
2772 rtw89_core_txq_init(rtwdev, sta->txq[i]);
2774 ewma_rssi_init(&rtwsta->avg_rssi);
2775 for (i = 0; i < rtwdev->chip->rf_path_num; i++)
2776 ewma_rssi_init(&rtwsta->rssi[i]);
2778 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
2779 /* for station mode, assign the mac_id from itself */
2780 rtwsta->mac_id = rtwvif->mac_id;
2781 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
2782 BTC_ROLE_MSTS_STA_CONN_START);
2783 rtw89_chip_rfk_channel(rtwdev);
2784 } else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
2785 rtwsta->mac_id = rtw89_core_acquire_bit_map(rtwdev->mac_id_map,
2786 RTW89_MAX_MAC_ID_NUM);
2787 if (rtwsta->mac_id == RTW89_MAX_MAC_ID_NUM)
2790 ret = rtw89_mac_set_macid_pause(rtwdev, rtwsta->mac_id, false);
2792 rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id);
2793 rtw89_warn(rtwdev, "failed to send h2c macid pause\n");
2797 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta,
2800 rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id);
2801 rtw89_warn(rtwdev, "failed to send h2c role info\n");
2809 int rtw89_core_sta_disassoc(struct rtw89_dev *rtwdev,
2810 struct ieee80211_vif *vif,
2811 struct ieee80211_sta *sta)
2813 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2814 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2816 if (vif->type == NL80211_IFTYPE_STATION)
2817 rtw89_fw_h2c_set_bcn_fltr_cfg(rtwdev, vif, false);
2819 rtwdev->total_sta_assoc--;
2821 rtwvif->tdls_peer--;
2822 rtwsta->disassoc = true;
2827 int rtw89_core_sta_disconnect(struct rtw89_dev *rtwdev,
2828 struct ieee80211_vif *vif,
2829 struct ieee80211_sta *sta)
2831 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2832 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2835 rtw89_mac_bf_monitor_calc(rtwdev, sta, true);
2836 rtw89_mac_bf_disassoc(rtwdev, vif, sta);
2837 rtw89_core_free_sta_pending_ba(rtwdev, sta);
2838 rtw89_core_free_sta_pending_forbid_ba(rtwdev, sta);
2839 rtw89_core_free_sta_pending_roc_tx(rtwdev, sta);
2841 if (vif->type == NL80211_IFTYPE_AP || sta->tdls)
2842 rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta->addr_cam);
2844 rtw89_cam_deinit_bssid_cam(rtwdev, &rtwsta->bssid_cam);
2846 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
2847 rtw89_vif_type_mapping(vif, false);
2848 rtw89_fw_release_general_pkt_list_vif(rtwdev, rtwvif, true);
2851 ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta);
2853 rtw89_warn(rtwdev, "failed to send h2c cmac table\n");
2857 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, true);
2859 rtw89_warn(rtwdev, "failed to send h2c join info\n");
2863 /* update cam aid mac_id net_type */
2864 ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL);
2866 rtw89_warn(rtwdev, "failed to send h2c cam\n");
2873 int rtw89_core_sta_assoc(struct rtw89_dev *rtwdev,
2874 struct ieee80211_vif *vif,
2875 struct ieee80211_sta *sta)
2877 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2878 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2879 struct rtw89_bssid_cam_entry *bssid_cam = rtw89_get_bssid_cam_of(rtwvif, rtwsta);
2882 if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
2884 ret = rtw89_cam_init_bssid_cam(rtwdev, rtwvif, bssid_cam, sta->addr);
2886 rtw89_warn(rtwdev, "failed to send h2c init bssid cam for TDLS\n");
2891 ret = rtw89_cam_init_addr_cam(rtwdev, &rtwsta->addr_cam, bssid_cam);
2893 rtw89_warn(rtwdev, "failed to send h2c init addr cam\n");
2898 ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta);
2900 rtw89_warn(rtwdev, "failed to send h2c cmac table\n");
2904 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, false);
2906 rtw89_warn(rtwdev, "failed to send h2c join info\n");
2910 /* update cam aid mac_id net_type */
2911 ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL);
2913 rtw89_warn(rtwdev, "failed to send h2c cam\n");
2917 rtwdev->total_sta_assoc++;
2919 rtwvif->tdls_peer++;
2920 rtw89_phy_ra_assoc(rtwdev, sta);
2921 rtw89_mac_bf_assoc(rtwdev, vif, sta);
2922 rtw89_mac_bf_monitor_calc(rtwdev, sta, false);
2924 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
2925 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2927 if (bss_conf->he_support &&
2928 !(bss_conf->he_oper.params & IEEE80211_HE_OPERATION_ER_SU_DISABLE))
2929 rtwsta->er_cap = true;
2931 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
2932 BTC_ROLE_MSTS_STA_CONN_END);
2933 rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template);
2934 rtw89_phy_ul_tb_assoc(rtwdev, rtwvif);
2936 ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwvif, rtwsta->mac_id);
2938 rtw89_warn(rtwdev, "failed to send h2c general packet\n");
2946 int rtw89_core_sta_remove(struct rtw89_dev *rtwdev,
2947 struct ieee80211_vif *vif,
2948 struct ieee80211_sta *sta)
2950 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2951 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2954 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls)
2955 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
2956 BTC_ROLE_MSTS_STA_DIS_CONN);
2957 else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
2958 rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id);
2960 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta,
2963 rtw89_warn(rtwdev, "failed to send h2c role info\n");
2971 static void _rtw89_core_set_tid_config(struct rtw89_dev *rtwdev,
2972 struct ieee80211_sta *sta,
2973 struct cfg80211_tid_cfg *tid_conf)
2975 struct ieee80211_txq *txq;
2976 struct rtw89_txq *rtwtxq;
2977 u32 mask = tid_conf->mask;
2978 u8 tids = tid_conf->tids;
2979 int tids_nbit = BITS_PER_BYTE;
2982 for (i = 0; i < tids_nbit; i++, tids >>= 1) {
2986 if (!(tids & BIT(0)))
2990 rtwtxq = (struct rtw89_txq *)txq->drv_priv;
2992 if (mask & BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL)) {
2993 if (tid_conf->ampdu == NL80211_TID_CONFIG_ENABLE) {
2994 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
2996 if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags))
2997 ieee80211_stop_tx_ba_session(sta, txq->tid);
2998 spin_lock_bh(&rtwdev->ba_lock);
2999 list_del_init(&rtwtxq->list);
3000 set_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
3001 spin_unlock_bh(&rtwdev->ba_lock);
3005 if (mask & BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL) && tids == 0xff) {
3006 if (tid_conf->amsdu == NL80211_TID_CONFIG_ENABLE)
3007 sta->max_amsdu_subframes = 0;
3009 sta->max_amsdu_subframes = 1;
3014 void rtw89_core_set_tid_config(struct rtw89_dev *rtwdev,
3015 struct ieee80211_sta *sta,
3016 struct cfg80211_tid_config *tid_config)
3020 for (i = 0; i < tid_config->n_tid_conf; i++)
3021 _rtw89_core_set_tid_config(rtwdev, sta,
3022 &tid_config->tid_conf[i]);
3025 static void rtw89_init_ht_cap(struct rtw89_dev *rtwdev,
3026 struct ieee80211_sta_ht_cap *ht_cap)
3028 static const __le16 highest[RF_PATH_MAX] = {
3029 cpu_to_le16(150), cpu_to_le16(300), cpu_to_le16(450), cpu_to_le16(600),
3031 struct rtw89_hal *hal = &rtwdev->hal;
3032 u8 nss = hal->rx_nss;
3035 ht_cap->ht_supported = true;
3037 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
3038 IEEE80211_HT_CAP_MAX_AMSDU |
3039 IEEE80211_HT_CAP_TX_STBC |
3040 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
3041 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
3042 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
3043 IEEE80211_HT_CAP_DSSSCCK40 |
3044 IEEE80211_HT_CAP_SGI_40;
3045 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
3046 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
3047 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
3048 for (i = 0; i < nss; i++)
3049 ht_cap->mcs.rx_mask[i] = 0xFF;
3050 ht_cap->mcs.rx_mask[4] = 0x01;
3051 ht_cap->mcs.rx_highest = highest[nss - 1];
3054 static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev,
3055 struct ieee80211_sta_vht_cap *vht_cap)
3057 static const __le16 highest_bw80[RF_PATH_MAX] = {
3058 cpu_to_le16(433), cpu_to_le16(867), cpu_to_le16(1300), cpu_to_le16(1733),
3060 static const __le16 highest_bw160[RF_PATH_MAX] = {
3061 cpu_to_le16(867), cpu_to_le16(1733), cpu_to_le16(2600), cpu_to_le16(3467),
3063 const struct rtw89_chip_info *chip = rtwdev->chip;
3064 const __le16 *highest = chip->support_bw160 ? highest_bw160 : highest_bw80;
3065 struct rtw89_hal *hal = &rtwdev->hal;
3066 u16 tx_mcs_map = 0, rx_mcs_map = 0;
3070 for (i = 0; i < 8; i++) {
3071 if (i < hal->tx_nss)
3072 tx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
3074 tx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
3075 if (i < hal->rx_nss)
3076 rx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
3078 rx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
3081 vht_cap->vht_supported = true;
3082 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
3083 IEEE80211_VHT_CAP_SHORT_GI_80 |
3084 IEEE80211_VHT_CAP_RXSTBC_1 |
3085 IEEE80211_VHT_CAP_HTC_VHT |
3086 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
3088 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
3089 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
3090 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
3091 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
3092 vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT;
3093 if (chip->support_bw160)
3094 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
3095 IEEE80211_VHT_CAP_SHORT_GI_160;
3096 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map);
3097 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(tx_mcs_map);
3098 vht_cap->vht_mcs.rx_highest = highest[hal->rx_nss - 1];
3099 vht_cap->vht_mcs.tx_highest = highest[hal->tx_nss - 1];
3102 #define RTW89_SBAND_IFTYPES_NR 2
3104 static void rtw89_init_he_cap(struct rtw89_dev *rtwdev,
3105 enum nl80211_band band,
3106 struct ieee80211_supported_band *sband)
3108 const struct rtw89_chip_info *chip = rtwdev->chip;
3109 struct rtw89_hal *hal = &rtwdev->hal;
3110 struct ieee80211_sband_iftype_data *iftype_data;
3111 bool no_ng16 = (chip->chip_id == RTL8852A && hal->cv == CHIP_CBV) ||
3112 (chip->chip_id == RTL8852B && hal->cv == CHIP_CAV);
3115 int nss = hal->rx_nss;
3118 iftype_data = kcalloc(RTW89_SBAND_IFTYPES_NR, sizeof(*iftype_data), GFP_KERNEL);
3122 for (i = 0; i < 8; i++) {
3124 mcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2);
3126 mcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2);
3129 for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
3130 struct ieee80211_sta_he_cap *he_cap;
3135 case NL80211_IFTYPE_STATION:
3136 case NL80211_IFTYPE_AP:
3142 if (idx >= RTW89_SBAND_IFTYPES_NR) {
3143 rtw89_warn(rtwdev, "run out of iftype_data\n");
3147 iftype_data[idx].types_mask = BIT(i);
3148 he_cap = &iftype_data[idx].he_cap;
3149 mac_cap_info = he_cap->he_cap_elem.mac_cap_info;
3150 phy_cap_info = he_cap->he_cap_elem.phy_cap_info;
3152 he_cap->has_he = true;
3153 mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE;
3154 if (i == NL80211_IFTYPE_STATION)
3155 mac_cap_info[1] = IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
3156 mac_cap_info[2] = IEEE80211_HE_MAC_CAP2_ALL_ACK |
3157 IEEE80211_HE_MAC_CAP2_BSR;
3158 mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2;
3159 if (i == NL80211_IFTYPE_AP)
3160 mac_cap_info[3] |= IEEE80211_HE_MAC_CAP3_OMI_CONTROL;
3161 mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_OPS |
3162 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
3163 if (i == NL80211_IFTYPE_STATION)
3164 mac_cap_info[5] = IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX;
3165 if (band == NL80211_BAND_2GHZ) {
3167 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
3170 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G;
3171 if (chip->support_bw160)
3172 phy_cap_info[0] |= IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
3174 phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
3175 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD |
3176 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
3177 phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
3178 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
3179 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |
3180 IEEE80211_HE_PHY_CAP2_DOPPLER_TX;
3181 phy_cap_info[3] = IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_16_QAM;
3182 if (i == NL80211_IFTYPE_STATION)
3183 phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_16_QAM |
3184 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_2;
3185 if (i == NL80211_IFTYPE_AP)
3186 phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_RX_PARTIAL_BW_SU_IN_20MHZ_MU;
3187 phy_cap_info[4] = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
3188 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4;
3189 if (chip->support_bw160)
3190 phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
3191 phy_cap_info[5] = no_ng16 ? 0 :
3192 IEEE80211_HE_PHY_CAP5_NG16_SU_FEEDBACK |
3193 IEEE80211_HE_PHY_CAP5_NG16_MU_FEEDBACK;
3194 phy_cap_info[6] = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
3195 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU |
3196 IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
3197 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE;
3198 phy_cap_info[7] = IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
3199 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI |
3200 IEEE80211_HE_PHY_CAP7_MAX_NC_1;
3201 phy_cap_info[8] = IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
3202 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI |
3203 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_996;
3204 if (chip->support_bw160)
3205 phy_cap_info[8] |= IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
3206 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU;
3207 phy_cap_info[9] = IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
3208 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
3209 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
3210 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB |
3211 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
3212 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
3213 if (i == NL80211_IFTYPE_STATION)
3214 phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU;
3215 he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map);
3216 he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map);
3217 if (chip->support_bw160) {
3218 he_cap->he_mcs_nss_supp.rx_mcs_160 = cpu_to_le16(mcs_map);
3219 he_cap->he_mcs_nss_supp.tx_mcs_160 = cpu_to_le16(mcs_map);
3222 if (band == NL80211_BAND_6GHZ) {
3225 capa = le16_encode_bits(IEEE80211_HT_MPDU_DENSITY_NONE,
3226 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
3227 le16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
3228 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
3229 le16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
3230 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
3231 iftype_data[idx].he_6ghz_capa.capa = capa;
3237 sband->iftype_data = iftype_data;
3238 sband->n_iftype_data = idx;
3241 static int rtw89_core_set_supported_band(struct rtw89_dev *rtwdev)
3243 struct ieee80211_hw *hw = rtwdev->hw;
3244 struct ieee80211_supported_band *sband_2ghz = NULL, *sband_5ghz = NULL;
3245 struct ieee80211_supported_band *sband_6ghz = NULL;
3246 u32 size = sizeof(struct ieee80211_supported_band);
3247 u8 support_bands = rtwdev->chip->support_bands;
3249 if (support_bands & BIT(NL80211_BAND_2GHZ)) {
3250 sband_2ghz = kmemdup(&rtw89_sband_2ghz, size, GFP_KERNEL);
3253 rtw89_init_ht_cap(rtwdev, &sband_2ghz->ht_cap);
3254 rtw89_init_he_cap(rtwdev, NL80211_BAND_2GHZ, sband_2ghz);
3255 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband_2ghz;
3258 if (support_bands & BIT(NL80211_BAND_5GHZ)) {
3259 sband_5ghz = kmemdup(&rtw89_sband_5ghz, size, GFP_KERNEL);
3262 rtw89_init_ht_cap(rtwdev, &sband_5ghz->ht_cap);
3263 rtw89_init_vht_cap(rtwdev, &sband_5ghz->vht_cap);
3264 rtw89_init_he_cap(rtwdev, NL80211_BAND_5GHZ, sband_5ghz);
3265 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband_5ghz;
3268 if (support_bands & BIT(NL80211_BAND_6GHZ)) {
3269 sband_6ghz = kmemdup(&rtw89_sband_6ghz, size, GFP_KERNEL);
3272 rtw89_init_he_cap(rtwdev, NL80211_BAND_6GHZ, sband_6ghz);
3273 hw->wiphy->bands[NL80211_BAND_6GHZ] = sband_6ghz;
3279 hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
3280 hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
3281 hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL;
3283 kfree(sband_2ghz->iftype_data);
3285 kfree(sband_5ghz->iftype_data);
3287 kfree(sband_6ghz->iftype_data);
3294 static void rtw89_core_clr_supported_band(struct rtw89_dev *rtwdev)
3296 struct ieee80211_hw *hw = rtwdev->hw;
3298 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data);
3299 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data);
3300 if (hw->wiphy->bands[NL80211_BAND_6GHZ])
3301 kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]->iftype_data);
3302 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
3303 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
3304 kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]);
3305 hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
3306 hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
3307 hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL;
3310 static void rtw89_core_ppdu_sts_init(struct rtw89_dev *rtwdev)
3314 for (i = 0; i < RTW89_PHY_MAX; i++)
3315 skb_queue_head_init(&rtwdev->ppdu_sts.rx_queue[i]);
3316 for (i = 0; i < RTW89_PHY_MAX; i++)
3317 rtwdev->ppdu_sts.curr_rx_ppdu_cnt[i] = U8_MAX;
3320 void rtw89_core_update_beacon_work(struct work_struct *work)
3322 struct rtw89_dev *rtwdev;
3323 struct rtw89_vif *rtwvif = container_of(work, struct rtw89_vif,
3324 update_beacon_work);
3326 if (rtwvif->net_type != RTW89_NET_TYPE_AP_MODE)
3329 rtwdev = rtwvif->rtwdev;
3330 mutex_lock(&rtwdev->mutex);
3331 rtw89_fw_h2c_update_beacon(rtwdev, rtwvif);
3332 mutex_unlock(&rtwdev->mutex);
3335 int rtw89_wait_for_cond(struct rtw89_wait_info *wait, unsigned int cond)
3337 struct completion *cmpl = &wait->completion;
3338 unsigned long timeout;
3341 cur = atomic_cmpxchg(&wait->cond, RTW89_WAIT_COND_IDLE, cond);
3342 if (cur != RTW89_WAIT_COND_IDLE)
3345 timeout = wait_for_completion_timeout(cmpl, RTW89_WAIT_FOR_COND_TIMEOUT);
3347 atomic_set(&wait->cond, RTW89_WAIT_COND_IDLE);
3357 void rtw89_complete_cond(struct rtw89_wait_info *wait, unsigned int cond,
3358 const struct rtw89_completion_data *data)
3362 cur = atomic_cmpxchg(&wait->cond, cond, RTW89_WAIT_COND_IDLE);
3367 complete(&wait->completion);
3370 int rtw89_core_start(struct rtw89_dev *rtwdev)
3374 rtwdev->mac.qta_mode = RTW89_QTA_SCC;
3375 ret = rtw89_mac_init(rtwdev);
3377 rtw89_err(rtwdev, "mac init fail, ret:%d\n", ret);
3381 rtw89_btc_ntfy_poweron(rtwdev);
3385 /* pre-config BB/RF, BB reset/RFC reset */
3386 ret = rtw89_chip_disable_bb_rf(rtwdev);
3389 ret = rtw89_chip_enable_bb_rf(rtwdev);
3393 rtw89_phy_init_bb_reg(rtwdev);
3394 rtw89_phy_init_rf_reg(rtwdev, false);
3396 rtw89_btc_ntfy_init(rtwdev, BTC_MODE_NORMAL);
3398 rtw89_phy_dm_init(rtwdev);
3400 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true);
3401 rtw89_mac_update_rts_threshold(rtwdev, RTW89_MAC_0);
3403 ret = rtw89_hci_start(rtwdev);
3405 rtw89_err(rtwdev, "failed to start hci\n");
3409 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work,
3410 RTW89_TRACK_WORK_PERIOD);
3412 set_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
3414 rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_ON);
3415 rtw89_fw_h2c_fw_log(rtwdev, rtwdev->fw.fw_log_enable);
3416 rtw89_fw_h2c_init_ba_cam(rtwdev);
3421 void rtw89_core_stop(struct rtw89_dev *rtwdev)
3423 struct rtw89_btc *btc = &rtwdev->btc;
3425 /* Prvent to stop twice; enter_ips and ops_stop */
3426 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
3429 rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_OFF);
3431 clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
3433 mutex_unlock(&rtwdev->mutex);
3435 cancel_work_sync(&rtwdev->c2h_work);
3436 cancel_work_sync(&btc->eapol_notify_work);
3437 cancel_work_sync(&btc->arp_notify_work);
3438 cancel_work_sync(&btc->dhcp_notify_work);
3439 cancel_work_sync(&btc->icmp_notify_work);
3440 cancel_delayed_work_sync(&rtwdev->txq_reinvoke_work);
3441 cancel_delayed_work_sync(&rtwdev->track_work);
3442 cancel_delayed_work_sync(&rtwdev->coex_act1_work);
3443 cancel_delayed_work_sync(&rtwdev->coex_bt_devinfo_work);
3444 cancel_delayed_work_sync(&rtwdev->coex_rfk_chk_work);
3445 cancel_delayed_work_sync(&rtwdev->cfo_track_work);
3446 cancel_delayed_work_sync(&rtwdev->forbid_ba_work);
3448 mutex_lock(&rtwdev->mutex);
3450 rtw89_btc_ntfy_poweroff(rtwdev);
3451 rtw89_hci_flush_queues(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
3452 rtw89_mac_flush_txq(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
3453 rtw89_hci_stop(rtwdev);
3454 rtw89_hci_deinit(rtwdev);
3455 rtw89_mac_pwr_off(rtwdev);
3456 rtw89_hci_reset(rtwdev);
3459 int rtw89_core_init(struct rtw89_dev *rtwdev)
3461 struct rtw89_btc *btc = &rtwdev->btc;
3464 INIT_LIST_HEAD(&rtwdev->ba_list);
3465 INIT_LIST_HEAD(&rtwdev->forbid_ba_list);
3466 INIT_LIST_HEAD(&rtwdev->rtwvifs_list);
3467 INIT_LIST_HEAD(&rtwdev->early_h2c_list);
3468 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
3469 if (!(rtwdev->chip->support_bands & BIT(band)))
3471 INIT_LIST_HEAD(&rtwdev->scan_info.pkt_list[band]);
3473 INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work);
3474 INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work);
3475 INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work);
3476 INIT_DELAYED_WORK(&rtwdev->track_work, rtw89_track_work);
3477 INIT_DELAYED_WORK(&rtwdev->coex_act1_work, rtw89_coex_act1_work);
3478 INIT_DELAYED_WORK(&rtwdev->coex_bt_devinfo_work, rtw89_coex_bt_devinfo_work);
3479 INIT_DELAYED_WORK(&rtwdev->coex_rfk_chk_work, rtw89_coex_rfk_chk_work);
3480 INIT_DELAYED_WORK(&rtwdev->cfo_track_work, rtw89_phy_cfo_track_work);
3481 INIT_DELAYED_WORK(&rtwdev->forbid_ba_work, rtw89_forbid_ba_work);
3482 rtwdev->txq_wq = alloc_workqueue("rtw89_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
3483 if (!rtwdev->txq_wq)
3485 spin_lock_init(&rtwdev->ba_lock);
3486 spin_lock_init(&rtwdev->rpwm_lock);
3487 mutex_init(&rtwdev->mutex);
3488 mutex_init(&rtwdev->rf_mutex);
3489 rtwdev->total_sta_assoc = 0;
3491 rtw89_init_wait(&rtwdev->mcc.wait);
3493 INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work);
3494 INIT_WORK(&rtwdev->ips_work, rtw89_ips_work);
3495 INIT_WORK(&rtwdev->load_firmware_work, rtw89_load_firmware_work);
3497 skb_queue_head_init(&rtwdev->c2h_queue);
3498 rtw89_core_ppdu_sts_init(rtwdev);
3499 rtw89_traffic_stats_init(rtwdev, &rtwdev->stats);
3501 rtwdev->hal.rx_fltr = DEFAULT_AX_RX_FLTR;
3503 INIT_WORK(&btc->eapol_notify_work, rtw89_btc_ntfy_eapol_packet_work);
3504 INIT_WORK(&btc->arp_notify_work, rtw89_btc_ntfy_arp_packet_work);
3505 INIT_WORK(&btc->dhcp_notify_work, rtw89_btc_ntfy_dhcp_packet_work);
3506 INIT_WORK(&btc->icmp_notify_work, rtw89_btc_ntfy_icmp_packet_work);
3508 init_completion(&rtwdev->fw.req.completion);
3510 schedule_work(&rtwdev->load_firmware_work);
3512 rtw89_ser_init(rtwdev);
3513 rtw89_entity_init(rtwdev);
3517 EXPORT_SYMBOL(rtw89_core_init);
3519 void rtw89_core_deinit(struct rtw89_dev *rtwdev)
3521 rtw89_ser_deinit(rtwdev);
3522 rtw89_unload_firmware(rtwdev);
3523 rtw89_fw_free_all_early_h2c(rtwdev);
3525 destroy_workqueue(rtwdev->txq_wq);
3526 mutex_destroy(&rtwdev->rf_mutex);
3527 mutex_destroy(&rtwdev->mutex);
3529 EXPORT_SYMBOL(rtw89_core_deinit);
3531 void rtw89_core_scan_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
3532 const u8 *mac_addr, bool hw_scan)
3534 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
3536 rtwdev->scanning = true;
3537 rtw89_leave_lps(rtwdev);
3539 rtw89_leave_ips_by_hwflags(rtwdev);
3541 ether_addr_copy(rtwvif->mac_addr, mac_addr);
3542 rtw89_btc_ntfy_scan_start(rtwdev, RTW89_PHY_0, chan->band_type);
3543 rtw89_chip_rfk_scan(rtwdev, true);
3544 rtw89_hci_recalc_int_mit(rtwdev);
3545 rtw89_phy_config_edcca(rtwdev, true);
3547 rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, mac_addr);
3550 void rtw89_core_scan_complete(struct rtw89_dev *rtwdev,
3551 struct ieee80211_vif *vif, bool hw_scan)
3553 struct rtw89_vif *rtwvif = vif ? (struct rtw89_vif *)vif->drv_priv : NULL;
3558 ether_addr_copy(rtwvif->mac_addr, vif->addr);
3559 rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, NULL);
3561 rtw89_chip_rfk_scan(rtwdev, false);
3562 rtw89_btc_ntfy_scan_finish(rtwdev, RTW89_PHY_0);
3563 rtw89_phy_config_edcca(rtwdev, false);
3565 rtwdev->scanning = false;
3566 rtwdev->dig.bypass_dig = true;
3567 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
3568 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work);
3571 static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev)
3573 const struct rtw89_chip_info *chip = rtwdev->chip;
3578 cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK);
3579 if (chip->chip_id == RTL8852A && cv <= CHIP_CBV) {
3580 if (rtw89_read32(rtwdev, R_AX_GPIO0_7_FUNC_SEL) == RTW89_R32_DEAD)
3586 rtwdev->hal.cv = cv;
3588 if (chip->chip_id == RTL8852B || chip->chip_id == RTL8851B) {
3589 ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_CV, &val);
3593 rtwdev->hal.acv = u8_get_bits(val, XTAL_SI_ACV_MASK);
3597 static void rtw89_core_setup_phycap(struct rtw89_dev *rtwdev)
3599 rtwdev->hal.support_cckpd =
3600 !(rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV) &&
3601 !(rtwdev->chip->chip_id == RTL8852B && rtwdev->hal.cv <= CHIP_CAV);
3602 rtwdev->hal.support_igi =
3603 rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV;
3606 static void rtw89_core_setup_rfe_parms(struct rtw89_dev *rtwdev)
3608 const struct rtw89_chip_info *chip = rtwdev->chip;
3609 const struct rtw89_rfe_parms_conf *conf = chip->rfe_parms_conf;
3610 struct rtw89_efuse *efuse = &rtwdev->efuse;
3611 u8 rfe_type = efuse->rfe_type;
3616 while (conf->rfe_parms) {
3617 if (rfe_type == conf->rfe_type) {
3618 rtwdev->rfe_parms = conf->rfe_parms;
3625 rtwdev->rfe_parms = chip->dflt_parms;
3628 static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev)
3632 ret = rtw89_mac_partial_init(rtwdev);
3636 ret = rtw89_parse_efuse_map(rtwdev);
3640 ret = rtw89_parse_phycap_map(rtwdev);
3644 ret = rtw89_mac_setup_phycap(rtwdev);
3648 rtw89_core_setup_phycap(rtwdev);
3649 rtw89_core_setup_rfe_parms(rtwdev);
3651 rtw89_mac_pwr_off(rtwdev);
3656 static int rtw89_chip_board_info_setup(struct rtw89_dev *rtwdev)
3658 rtw89_chip_fem_setup(rtwdev);
3663 int rtw89_chip_info_setup(struct rtw89_dev *rtwdev)
3667 rtw89_read_chip_ver(rtwdev);
3669 ret = rtw89_wait_firmware_completion(rtwdev);
3671 rtw89_err(rtwdev, "failed to wait firmware completion\n");
3675 ret = rtw89_fw_recognize(rtwdev);
3677 rtw89_err(rtwdev, "failed to recognize firmware\n");
3681 ret = rtw89_chip_efuse_info_setup(rtwdev);
3685 ret = rtw89_chip_board_info_setup(rtwdev);
3689 rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev);
3693 EXPORT_SYMBOL(rtw89_chip_info_setup);
3695 static int rtw89_core_register_hw(struct rtw89_dev *rtwdev)
3697 struct ieee80211_hw *hw = rtwdev->hw;
3698 struct rtw89_efuse *efuse = &rtwdev->efuse;
3700 int tx_headroom = IEEE80211_HT_CTL_LEN;
3702 hw->vif_data_size = sizeof(struct rtw89_vif);
3703 hw->sta_data_size = sizeof(struct rtw89_sta);
3704 hw->txq_data_size = sizeof(struct rtw89_txq);
3705 hw->chanctx_data_size = sizeof(struct rtw89_chanctx_cfg);
3707 SET_IEEE80211_PERM_ADDR(hw, efuse->addr);
3709 hw->extra_tx_headroom = tx_headroom;
3710 hw->queues = IEEE80211_NUM_ACS;
3711 hw->max_rx_aggregation_subframes = RTW89_MAX_RX_AGG_NUM;
3712 hw->max_tx_aggregation_subframes = RTW89_MAX_TX_AGG_NUM;
3713 hw->uapsd_max_sp_len = IEEE80211_WMM_IE_STA_QOSINFO_SP_ALL;
3715 ieee80211_hw_set(hw, SIGNAL_DBM);
3716 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
3717 ieee80211_hw_set(hw, MFP_CAPABLE);
3718 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
3719 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
3720 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3721 ieee80211_hw_set(hw, TX_AMSDU);
3722 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
3723 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
3724 ieee80211_hw_set(hw, SUPPORTS_PS);
3725 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
3726 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
3727 ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID);
3728 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
3729 if (RTW89_CHK_FW_FEATURE(BEACON_FILTER, &rtwdev->fw))
3730 ieee80211_hw_set(hw, CONNECTION_MONITOR);
3732 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
3733 BIT(NL80211_IFTYPE_AP) |
3734 BIT(NL80211_IFTYPE_P2P_CLIENT) |
3735 BIT(NL80211_IFTYPE_P2P_GO);
3737 hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1;
3738 hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1;
3740 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
3741 WIPHY_FLAG_TDLS_EXTERNAL_SETUP |
3742 WIPHY_FLAG_AP_UAPSD | WIPHY_FLAG_SPLIT_SCAN_6GHZ;
3743 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
3745 hw->wiphy->max_scan_ssids = RTW89_SCANOFLD_MAX_SSID;
3746 hw->wiphy->max_scan_ie_len = RTW89_SCANOFLD_MAX_IE_LEN;
3749 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;
3752 hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL);
3753 hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL);
3754 hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL);
3755 hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL);
3756 hw->wiphy->max_remain_on_channel_duration = 1000;
3758 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
3760 ret = rtw89_core_set_supported_band(rtwdev);
3762 rtw89_err(rtwdev, "failed to set supported band\n");
3766 hw->wiphy->reg_notifier = rtw89_regd_notifier;
3767 hw->wiphy->sar_capa = &rtw89_sar_capa;
3769 ret = ieee80211_register_hw(hw);
3771 rtw89_err(rtwdev, "failed to register hw\n");
3772 goto err_free_supported_band;
3775 ret = rtw89_regd_init(rtwdev, rtw89_regd_notifier);
3777 rtw89_err(rtwdev, "failed to init regd\n");
3778 goto err_unregister_hw;
3784 ieee80211_unregister_hw(hw);
3785 err_free_supported_band:
3786 rtw89_core_clr_supported_band(rtwdev);
3791 static void rtw89_core_unregister_hw(struct rtw89_dev *rtwdev)
3793 struct ieee80211_hw *hw = rtwdev->hw;
3795 ieee80211_unregister_hw(hw);
3796 rtw89_core_clr_supported_band(rtwdev);
3799 int rtw89_core_register(struct rtw89_dev *rtwdev)
3803 ret = rtw89_core_register_hw(rtwdev);
3805 rtw89_err(rtwdev, "failed to register core hw\n");
3809 rtw89_debugfs_init(rtwdev);
3813 EXPORT_SYMBOL(rtw89_core_register);
3815 void rtw89_core_unregister(struct rtw89_dev *rtwdev)
3817 rtw89_core_unregister_hw(rtwdev);
3819 EXPORT_SYMBOL(rtw89_core_unregister);
3821 struct rtw89_dev *rtw89_alloc_ieee80211_hw(struct device *device,
3823 const struct rtw89_chip_info *chip)
3825 struct rtw89_fw_info early_fw = {};
3826 const struct firmware *firmware;
3827 struct ieee80211_hw *hw;
3828 struct rtw89_dev *rtwdev;
3829 struct ieee80211_ops *ops;
3830 u32 driver_data_size;
3834 firmware = rtw89_early_fw_feature_recognize(device, chip, &early_fw, &fw_format);
3836 ops = kmemdup(&rtw89_ops, sizeof(rtw89_ops), GFP_KERNEL);
3840 no_chanctx = chip->support_chanctx_num == 0 ||
3841 !RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &early_fw) ||
3842 !RTW89_CHK_FW_FEATURE(BEACON_FILTER, &early_fw);
3845 ops->add_chanctx = NULL;
3846 ops->remove_chanctx = NULL;
3847 ops->change_chanctx = NULL;
3848 ops->assign_vif_chanctx = NULL;
3849 ops->unassign_vif_chanctx = NULL;
3850 ops->remain_on_channel = NULL;
3851 ops->cancel_remain_on_channel = NULL;
3854 driver_data_size = sizeof(struct rtw89_dev) + bus_data_size;
3855 hw = ieee80211_alloc_hw(driver_data_size, ops);
3859 hw->wiphy->iface_combinations = rtw89_iface_combs;
3860 hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw89_iface_combs);
3864 rtwdev->dev = device;
3866 rtwdev->chip = chip;
3867 rtwdev->fw.req.firmware = firmware;
3868 rtwdev->fw.fw_format = fw_format;
3870 rtw89_debug(rtwdev, RTW89_DBG_FW, "probe driver %s chanctx\n",
3871 no_chanctx ? "without" : "with");
3877 release_firmware(firmware);
3880 EXPORT_SYMBOL(rtw89_alloc_ieee80211_hw);
3882 void rtw89_free_ieee80211_hw(struct rtw89_dev *rtwdev)
3885 release_firmware(rtwdev->fw.req.firmware);
3886 ieee80211_free_hw(rtwdev->hw);
3888 EXPORT_SYMBOL(rtw89_free_ieee80211_hw);
3890 MODULE_AUTHOR("Realtek Corporation");
3891 MODULE_DESCRIPTION("Realtek 802.11ax wireless core module");
3892 MODULE_LICENSE("Dual BSD/GPL");