1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
22 static bool rtw89_disable_ps_mode;
23 module_param_named(disable_ps_mode, rtw89_disable_ps_mode, bool, 0644);
24 MODULE_PARM_DESC(disable_ps_mode, "Set Y to disable low power mode");
26 #define RTW89_DEF_CHAN(_freq, _hw_val, _flags, _band) \
27 { .center_freq = _freq, .hw_value = _hw_val, .flags = _flags, .band = _band, }
28 #define RTW89_DEF_CHAN_2G(_freq, _hw_val) \
29 RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_2GHZ)
30 #define RTW89_DEF_CHAN_5G(_freq, _hw_val) \
31 RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_5GHZ)
32 #define RTW89_DEF_CHAN_5G_NO_HT40MINUS(_freq, _hw_val) \
33 RTW89_DEF_CHAN(_freq, _hw_val, IEEE80211_CHAN_NO_HT40MINUS, NL80211_BAND_5GHZ)
34 #define RTW89_DEF_CHAN_6G(_freq, _hw_val) \
35 RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_6GHZ)
37 static struct ieee80211_channel rtw89_channels_2ghz[] = {
38 RTW89_DEF_CHAN_2G(2412, 1),
39 RTW89_DEF_CHAN_2G(2417, 2),
40 RTW89_DEF_CHAN_2G(2422, 3),
41 RTW89_DEF_CHAN_2G(2427, 4),
42 RTW89_DEF_CHAN_2G(2432, 5),
43 RTW89_DEF_CHAN_2G(2437, 6),
44 RTW89_DEF_CHAN_2G(2442, 7),
45 RTW89_DEF_CHAN_2G(2447, 8),
46 RTW89_DEF_CHAN_2G(2452, 9),
47 RTW89_DEF_CHAN_2G(2457, 10),
48 RTW89_DEF_CHAN_2G(2462, 11),
49 RTW89_DEF_CHAN_2G(2467, 12),
50 RTW89_DEF_CHAN_2G(2472, 13),
51 RTW89_DEF_CHAN_2G(2484, 14),
54 static struct ieee80211_channel rtw89_channels_5ghz[] = {
55 RTW89_DEF_CHAN_5G(5180, 36),
56 RTW89_DEF_CHAN_5G(5200, 40),
57 RTW89_DEF_CHAN_5G(5220, 44),
58 RTW89_DEF_CHAN_5G(5240, 48),
59 RTW89_DEF_CHAN_5G(5260, 52),
60 RTW89_DEF_CHAN_5G(5280, 56),
61 RTW89_DEF_CHAN_5G(5300, 60),
62 RTW89_DEF_CHAN_5G(5320, 64),
63 RTW89_DEF_CHAN_5G(5500, 100),
64 RTW89_DEF_CHAN_5G(5520, 104),
65 RTW89_DEF_CHAN_5G(5540, 108),
66 RTW89_DEF_CHAN_5G(5560, 112),
67 RTW89_DEF_CHAN_5G(5580, 116),
68 RTW89_DEF_CHAN_5G(5600, 120),
69 RTW89_DEF_CHAN_5G(5620, 124),
70 RTW89_DEF_CHAN_5G(5640, 128),
71 RTW89_DEF_CHAN_5G(5660, 132),
72 RTW89_DEF_CHAN_5G(5680, 136),
73 RTW89_DEF_CHAN_5G(5700, 140),
74 RTW89_DEF_CHAN_5G(5720, 144),
75 RTW89_DEF_CHAN_5G(5745, 149),
76 RTW89_DEF_CHAN_5G(5765, 153),
77 RTW89_DEF_CHAN_5G(5785, 157),
78 RTW89_DEF_CHAN_5G(5805, 161),
79 RTW89_DEF_CHAN_5G_NO_HT40MINUS(5825, 165),
82 static struct ieee80211_channel rtw89_channels_6ghz[] = {
83 RTW89_DEF_CHAN_6G(5955, 1),
84 RTW89_DEF_CHAN_6G(5975, 5),
85 RTW89_DEF_CHAN_6G(5995, 9),
86 RTW89_DEF_CHAN_6G(6015, 13),
87 RTW89_DEF_CHAN_6G(6035, 17),
88 RTW89_DEF_CHAN_6G(6055, 21),
89 RTW89_DEF_CHAN_6G(6075, 25),
90 RTW89_DEF_CHAN_6G(6095, 29),
91 RTW89_DEF_CHAN_6G(6115, 33),
92 RTW89_DEF_CHAN_6G(6135, 37),
93 RTW89_DEF_CHAN_6G(6155, 41),
94 RTW89_DEF_CHAN_6G(6175, 45),
95 RTW89_DEF_CHAN_6G(6195, 49),
96 RTW89_DEF_CHAN_6G(6215, 53),
97 RTW89_DEF_CHAN_6G(6235, 57),
98 RTW89_DEF_CHAN_6G(6255, 61),
99 RTW89_DEF_CHAN_6G(6275, 65),
100 RTW89_DEF_CHAN_6G(6295, 69),
101 RTW89_DEF_CHAN_6G(6315, 73),
102 RTW89_DEF_CHAN_6G(6335, 77),
103 RTW89_DEF_CHAN_6G(6355, 81),
104 RTW89_DEF_CHAN_6G(6375, 85),
105 RTW89_DEF_CHAN_6G(6395, 89),
106 RTW89_DEF_CHAN_6G(6415, 93),
107 RTW89_DEF_CHAN_6G(6435, 97),
108 RTW89_DEF_CHAN_6G(6455, 101),
109 RTW89_DEF_CHAN_6G(6475, 105),
110 RTW89_DEF_CHAN_6G(6495, 109),
111 RTW89_DEF_CHAN_6G(6515, 113),
112 RTW89_DEF_CHAN_6G(6535, 117),
113 RTW89_DEF_CHAN_6G(6555, 121),
114 RTW89_DEF_CHAN_6G(6575, 125),
115 RTW89_DEF_CHAN_6G(6595, 129),
116 RTW89_DEF_CHAN_6G(6615, 133),
117 RTW89_DEF_CHAN_6G(6635, 137),
118 RTW89_DEF_CHAN_6G(6655, 141),
119 RTW89_DEF_CHAN_6G(6675, 145),
120 RTW89_DEF_CHAN_6G(6695, 149),
121 RTW89_DEF_CHAN_6G(6715, 153),
122 RTW89_DEF_CHAN_6G(6735, 157),
123 RTW89_DEF_CHAN_6G(6755, 161),
124 RTW89_DEF_CHAN_6G(6775, 165),
125 RTW89_DEF_CHAN_6G(6795, 169),
126 RTW89_DEF_CHAN_6G(6815, 173),
127 RTW89_DEF_CHAN_6G(6835, 177),
128 RTW89_DEF_CHAN_6G(6855, 181),
129 RTW89_DEF_CHAN_6G(6875, 185),
130 RTW89_DEF_CHAN_6G(6895, 189),
131 RTW89_DEF_CHAN_6G(6915, 193),
132 RTW89_DEF_CHAN_6G(6935, 197),
133 RTW89_DEF_CHAN_6G(6955, 201),
134 RTW89_DEF_CHAN_6G(6975, 205),
135 RTW89_DEF_CHAN_6G(6995, 209),
136 RTW89_DEF_CHAN_6G(7015, 213),
137 RTW89_DEF_CHAN_6G(7035, 217),
138 RTW89_DEF_CHAN_6G(7055, 221),
139 RTW89_DEF_CHAN_6G(7075, 225),
140 RTW89_DEF_CHAN_6G(7095, 229),
141 RTW89_DEF_CHAN_6G(7115, 233),
144 static struct ieee80211_rate rtw89_bitrates[] = {
145 { .bitrate = 10, .hw_value = 0x00, },
146 { .bitrate = 20, .hw_value = 0x01, },
147 { .bitrate = 55, .hw_value = 0x02, },
148 { .bitrate = 110, .hw_value = 0x03, },
149 { .bitrate = 60, .hw_value = 0x04, },
150 { .bitrate = 90, .hw_value = 0x05, },
151 { .bitrate = 120, .hw_value = 0x06, },
152 { .bitrate = 180, .hw_value = 0x07, },
153 { .bitrate = 240, .hw_value = 0x08, },
154 { .bitrate = 360, .hw_value = 0x09, },
155 { .bitrate = 480, .hw_value = 0x0a, },
156 { .bitrate = 540, .hw_value = 0x0b, },
159 static const struct ieee80211_iface_limit rtw89_iface_limits[] = {
162 .types = BIT(NL80211_IFTYPE_STATION),
166 .types = BIT(NL80211_IFTYPE_P2P_CLIENT) |
167 BIT(NL80211_IFTYPE_P2P_GO) |
168 BIT(NL80211_IFTYPE_AP),
172 static const struct ieee80211_iface_combination rtw89_iface_combs[] = {
174 .limits = rtw89_iface_limits,
175 .n_limits = ARRAY_SIZE(rtw89_iface_limits),
177 .num_different_channels = 1,
181 bool rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate, u16 *bitrate)
183 struct ieee80211_rate rate;
185 if (unlikely(rpt_rate >= ARRAY_SIZE(rtw89_bitrates))) {
186 rtw89_debug(rtwdev, RTW89_DBG_UNEXP, "invalid rpt rate %d\n", rpt_rate);
190 rate = rtw89_bitrates[rpt_rate];
191 *bitrate = rate.bitrate;
196 static const struct ieee80211_supported_band rtw89_sband_2ghz = {
197 .band = NL80211_BAND_2GHZ,
198 .channels = rtw89_channels_2ghz,
199 .n_channels = ARRAY_SIZE(rtw89_channels_2ghz),
200 .bitrates = rtw89_bitrates,
201 .n_bitrates = ARRAY_SIZE(rtw89_bitrates),
206 static const struct ieee80211_supported_band rtw89_sband_5ghz = {
207 .band = NL80211_BAND_5GHZ,
208 .channels = rtw89_channels_5ghz,
209 .n_channels = ARRAY_SIZE(rtw89_channels_5ghz),
211 /* 5G has no CCK rates, 1M/2M/5.5M/11M */
212 .bitrates = rtw89_bitrates + 4,
213 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4,
218 static const struct ieee80211_supported_band rtw89_sband_6ghz = {
219 .band = NL80211_BAND_6GHZ,
220 .channels = rtw89_channels_6ghz,
221 .n_channels = ARRAY_SIZE(rtw89_channels_6ghz),
223 /* 6G has no CCK rates, 1M/2M/5.5M/11M */
224 .bitrates = rtw89_bitrates + 4,
225 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4,
228 static void rtw89_traffic_stats_accu(struct rtw89_dev *rtwdev,
229 struct rtw89_traffic_stats *stats,
230 struct sk_buff *skb, bool tx)
232 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
234 if (!ieee80211_is_data(hdr->frame_control))
237 if (is_broadcast_ether_addr(hdr->addr1) ||
238 is_multicast_ether_addr(hdr->addr1))
243 stats->tx_unicast += skb->len;
246 stats->rx_unicast += skb->len;
250 void rtw89_get_default_chandef(struct cfg80211_chan_def *chandef)
252 cfg80211_chandef_create(chandef, &rtw89_channels_2ghz[0],
256 static void rtw89_get_channel_params(const struct cfg80211_chan_def *chandef,
257 struct rtw89_chan *chan)
259 struct ieee80211_channel *channel = chandef->chan;
260 enum nl80211_chan_width width = chandef->width;
261 u32 primary_freq, center_freq;
263 u8 bandwidth = RTW89_CHANNEL_WIDTH_20;
267 center_chan = channel->hw_value;
268 primary_freq = channel->center_freq;
269 center_freq = chandef->center_freq1;
272 case NL80211_CHAN_WIDTH_20_NOHT:
273 case NL80211_CHAN_WIDTH_20:
274 bandwidth = RTW89_CHANNEL_WIDTH_20;
276 case NL80211_CHAN_WIDTH_40:
277 bandwidth = RTW89_CHANNEL_WIDTH_40;
278 if (primary_freq > center_freq) {
284 case NL80211_CHAN_WIDTH_80:
285 case NL80211_CHAN_WIDTH_160:
286 bandwidth = nl_to_rtw89_bandwidth(width);
287 if (primary_freq > center_freq) {
288 offset = (primary_freq - center_freq - 10) / 20;
289 center_chan -= 2 + offset * 4;
291 offset = (center_freq - primary_freq - 10) / 20;
292 center_chan += 2 + offset * 4;
300 switch (channel->band) {
302 case NL80211_BAND_2GHZ:
303 band = RTW89_BAND_2G;
305 case NL80211_BAND_5GHZ:
306 band = RTW89_BAND_5G;
308 case NL80211_BAND_6GHZ:
309 band = RTW89_BAND_6G;
313 rtw89_chan_create(chan, center_chan, channel->hw_value, band, bandwidth);
316 void rtw89_core_set_chip_txpwr(struct rtw89_dev *rtwdev)
318 const struct rtw89_chip_info *chip = rtwdev->chip;
319 const struct rtw89_chan *chan;
320 enum rtw89_sub_entity_idx sub_entity_idx;
321 enum rtw89_phy_idx phy_idx;
322 enum rtw89_entity_mode mode;
325 entity_active = rtw89_get_entity_state(rtwdev);
329 mode = rtw89_get_entity_mode(rtwdev);
330 if (WARN(mode != RTW89_ENTITY_MODE_SCC, "Invalid ent mode: %d\n", mode))
333 sub_entity_idx = RTW89_SUB_ENTITY_0;
334 phy_idx = RTW89_PHY_0;
335 chan = rtw89_chan_get(rtwdev, sub_entity_idx);
336 if (chip->ops->set_txpwr)
337 chip->ops->set_txpwr(rtwdev, chan, phy_idx);
340 void rtw89_set_channel(struct rtw89_dev *rtwdev)
342 const struct rtw89_chip_info *chip = rtwdev->chip;
343 const struct cfg80211_chan_def *chandef;
344 enum rtw89_sub_entity_idx sub_entity_idx;
345 enum rtw89_mac_idx mac_idx;
346 enum rtw89_phy_idx phy_idx;
347 struct rtw89_chan chan;
348 struct rtw89_channel_help_params bak;
349 enum rtw89_entity_mode mode;
353 entity_active = rtw89_get_entity_state(rtwdev);
355 mode = rtw89_entity_recalc(rtwdev);
356 if (WARN(mode != RTW89_ENTITY_MODE_SCC, "Invalid ent mode: %d\n", mode))
359 sub_entity_idx = RTW89_SUB_ENTITY_0;
360 mac_idx = RTW89_MAC_0;
361 phy_idx = RTW89_PHY_0;
362 chandef = rtw89_chandef_get(rtwdev, sub_entity_idx);
363 rtw89_get_channel_params(chandef, &chan);
364 if (WARN(chan.channel == 0, "Invalid channel\n"))
367 band_changed = rtw89_assign_entity_chan(rtwdev, sub_entity_idx, &chan);
369 rtw89_chip_set_channel_prepare(rtwdev, &bak, &chan, mac_idx, phy_idx);
371 chip->ops->set_channel(rtwdev, &chan, mac_idx, phy_idx);
373 rtw89_core_set_chip_txpwr(rtwdev);
375 rtw89_chip_set_channel_done(rtwdev, &bak, &chan, mac_idx, phy_idx);
377 if (!entity_active || band_changed) {
378 rtw89_btc_ntfy_switch_band(rtwdev, phy_idx, chan.band_type);
379 rtw89_chip_rfk_band_changed(rtwdev, phy_idx);
382 rtw89_set_entity_state(rtwdev, true);
385 void rtw89_get_channel(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
386 struct rtw89_chan *chan)
388 const struct cfg80211_chan_def *chandef;
390 chandef = rtw89_chandef_get(rtwdev, rtwvif->sub_entity_idx);
391 rtw89_get_channel_params(chandef, chan);
394 static enum rtw89_core_tx_type
395 rtw89_core_get_tx_type(struct rtw89_dev *rtwdev,
398 struct ieee80211_hdr *hdr = (void *)skb->data;
399 __le16 fc = hdr->frame_control;
401 if (ieee80211_is_mgmt(fc) || ieee80211_is_nullfunc(fc))
402 return RTW89_CORE_TX_TYPE_MGMT;
404 return RTW89_CORE_TX_TYPE_DATA;
408 rtw89_core_tx_update_ampdu_info(struct rtw89_dev *rtwdev,
409 struct rtw89_core_tx_request *tx_req,
410 enum btc_pkt_type pkt_type)
412 struct ieee80211_sta *sta = tx_req->sta;
413 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
414 struct sk_buff *skb = tx_req->skb;
415 struct rtw89_sta *rtwsta;
419 if (pkt_type == PACKET_EAPOL) {
420 desc_info->bk = true;
424 if (!(IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU))
428 rtw89_warn(rtwdev, "cannot set ampdu info without sta\n");
432 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
433 rtwsta = (struct rtw89_sta *)sta->drv_priv;
435 ampdu_num = (u8)((rtwsta->ampdu_params[tid].agg_num ?
436 rtwsta->ampdu_params[tid].agg_num :
437 4 << sta->deflink.ht_cap.ampdu_factor) - 1);
439 desc_info->agg_en = true;
440 desc_info->ampdu_density = sta->deflink.ht_cap.ampdu_density;
441 desc_info->ampdu_num = ampdu_num;
445 rtw89_core_tx_update_sec_key(struct rtw89_dev *rtwdev,
446 struct rtw89_core_tx_request *tx_req)
448 const struct rtw89_chip_info *chip = rtwdev->chip;
449 struct ieee80211_vif *vif = tx_req->vif;
450 struct ieee80211_sta *sta = tx_req->sta;
451 struct ieee80211_tx_info *info;
452 struct ieee80211_key_conf *key;
453 struct rtw89_vif *rtwvif;
454 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
455 struct rtw89_addr_cam_entry *addr_cam;
456 struct rtw89_sec_cam_entry *sec_cam;
457 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
458 struct sk_buff *skb = tx_req->skb;
459 u8 sec_type = RTW89_SEC_KEY_TYPE_NONE;
463 rtw89_warn(rtwdev, "cannot set sec key without vif\n");
467 rtwvif = (struct rtw89_vif *)vif->drv_priv;
468 addr_cam = rtw89_get_addr_cam_of(rtwvif, rtwsta);
470 info = IEEE80211_SKB_CB(skb);
471 key = info->control.hw_key;
472 sec_cam = addr_cam->sec_entries[key->hw_key_idx];
474 rtw89_warn(rtwdev, "sec cam entry is empty\n");
478 switch (key->cipher) {
479 case WLAN_CIPHER_SUITE_WEP40:
480 sec_type = RTW89_SEC_KEY_TYPE_WEP40;
482 case WLAN_CIPHER_SUITE_WEP104:
483 sec_type = RTW89_SEC_KEY_TYPE_WEP104;
485 case WLAN_CIPHER_SUITE_TKIP:
486 sec_type = RTW89_SEC_KEY_TYPE_TKIP;
488 case WLAN_CIPHER_SUITE_CCMP:
489 sec_type = RTW89_SEC_KEY_TYPE_CCMP128;
491 case WLAN_CIPHER_SUITE_CCMP_256:
492 sec_type = RTW89_SEC_KEY_TYPE_CCMP256;
494 case WLAN_CIPHER_SUITE_GCMP:
495 sec_type = RTW89_SEC_KEY_TYPE_GCMP128;
497 case WLAN_CIPHER_SUITE_GCMP_256:
498 sec_type = RTW89_SEC_KEY_TYPE_GCMP256;
501 rtw89_warn(rtwdev, "key cipher not supported %d\n", key->cipher);
505 desc_info->sec_en = true;
506 desc_info->sec_keyid = key->keyidx;
507 desc_info->sec_type = sec_type;
508 desc_info->sec_cam_idx = sec_cam->sec_cam_idx;
510 if (!chip->hw_sec_hdr)
513 pn64 = atomic64_inc_return(&key->tx_pn);
514 desc_info->sec_seq[0] = pn64;
515 desc_info->sec_seq[1] = pn64 >> 8;
516 desc_info->sec_seq[2] = pn64 >> 16;
517 desc_info->sec_seq[3] = pn64 >> 24;
518 desc_info->sec_seq[4] = pn64 >> 32;
519 desc_info->sec_seq[5] = pn64 >> 40;
520 desc_info->wp_offset = 1; /* in unit of 8 bytes for security header */
523 static u16 rtw89_core_get_mgmt_rate(struct rtw89_dev *rtwdev,
524 struct rtw89_core_tx_request *tx_req)
526 struct sk_buff *skb = tx_req->skb;
527 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
528 struct ieee80211_vif *vif = tx_info->control.vif;
529 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
532 if (tx_info->flags & IEEE80211_TX_CTL_NO_CCK_RATE ||
534 lowest_rate = RTW89_HW_RATE_OFDM6;
535 else if (chan->band_type == RTW89_BAND_2G)
536 lowest_rate = RTW89_HW_RATE_CCK1;
538 lowest_rate = RTW89_HW_RATE_OFDM6;
540 if (!vif || !vif->bss_conf.basic_rates || !tx_req->sta)
543 return __ffs(vif->bss_conf.basic_rates) + lowest_rate;
546 static u8 rtw89_core_tx_get_mac_id(struct rtw89_dev *rtwdev,
547 struct rtw89_core_tx_request *tx_req)
549 struct ieee80211_vif *vif = tx_req->vif;
550 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
551 struct ieee80211_sta *sta = tx_req->sta;
552 struct rtw89_sta *rtwsta;
555 return rtwvif->mac_id;
557 rtwsta = (struct rtw89_sta *)sta->drv_priv;
558 return rtwsta->mac_id;
562 rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev,
563 struct rtw89_core_tx_request *tx_req)
565 struct ieee80211_vif *vif = tx_req->vif;
566 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
567 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
568 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
571 qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : RTW89_TX_QSEL_B0_MGMT;
572 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
574 desc_info->qsel = qsel;
575 desc_info->ch_dma = ch_dma;
576 desc_info->port = desc_info->hiq ? rtwvif->port : 0;
577 desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req);
578 desc_info->hw_ssn_sel = RTW89_MGMT_HW_SSN_SEL;
579 desc_info->hw_seq_mode = RTW89_MGMT_HW_SEQ_MODE;
581 /* fixed data rate for mgmt frames */
582 desc_info->en_wd_info = true;
583 desc_info->use_rate = true;
584 desc_info->dis_data_fb = true;
585 desc_info->data_rate = rtw89_core_get_mgmt_rate(rtwdev, tx_req);
587 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
588 "tx mgmt frame with rate 0x%x on channel %d (band %d, bw %d)\n",
589 desc_info->data_rate, chan->channel, chan->band_type,
594 rtw89_core_tx_update_h2c_info(struct rtw89_dev *rtwdev,
595 struct rtw89_core_tx_request *tx_req)
597 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
599 desc_info->is_bmc = false;
600 desc_info->wd_page = false;
601 desc_info->ch_dma = RTW89_DMA_H2C;
604 static void rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev *rtwdev, __le32 *htc)
606 static const u8 rtw89_bandwidth_to_om[] = {
607 [RTW89_CHANNEL_WIDTH_20] = HTC_OM_CHANNEL_WIDTH_20,
608 [RTW89_CHANNEL_WIDTH_40] = HTC_OM_CHANNEL_WIDTH_40,
609 [RTW89_CHANNEL_WIDTH_80] = HTC_OM_CHANNEL_WIDTH_80,
610 [RTW89_CHANNEL_WIDTH_160] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80,
611 [RTW89_CHANNEL_WIDTH_80_80] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80,
613 const struct rtw89_chip_info *chip = rtwdev->chip;
614 struct rtw89_hal *hal = &rtwdev->hal;
615 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
618 if (!chip->dis_2g_40m_ul_ofdma ||
619 chan->band_type != RTW89_BAND_2G ||
620 chan->band_width != RTW89_CHANNEL_WIDTH_40)
623 om_bandwidth = chan->band_width < ARRAY_SIZE(rtw89_bandwidth_to_om) ?
624 rtw89_bandwidth_to_om[chan->band_width] : 0;
625 *htc = le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) |
626 le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_OM, RTW89_HTC_MASK_CTL_ID) |
627 le32_encode_bits(hal->rx_nss - 1, RTW89_HTC_MASK_HTC_OM_RX_NSS) |
628 le32_encode_bits(om_bandwidth, RTW89_HTC_MASK_HTC_OM_CH_WIDTH) |
629 le32_encode_bits(1, RTW89_HTC_MASK_HTC_OM_UL_MU_DIS) |
630 le32_encode_bits(hal->tx_nss - 1, RTW89_HTC_MASK_HTC_OM_TX_NSTS) |
631 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_ER_SU_DIS) |
632 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_DL_MU_MIMO_RR) |
633 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_UL_MU_DATA_DIS);
637 __rtw89_core_tx_check_he_qos_htc(struct rtw89_dev *rtwdev,
638 struct rtw89_core_tx_request *tx_req,
639 enum btc_pkt_type pkt_type)
641 struct ieee80211_sta *sta = tx_req->sta;
642 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
643 struct sk_buff *skb = tx_req->skb;
644 struct ieee80211_hdr *hdr = (void *)skb->data;
645 __le16 fc = hdr->frame_control;
647 /* AP IOT issue with EAPoL, ARP and DHCP */
648 if (pkt_type < PACKET_MAX)
651 if (!sta || !sta->deflink.he_cap.has_he)
654 if (!ieee80211_is_data_qos(fc))
657 if (skb_headroom(skb) < IEEE80211_HT_CTL_LEN)
660 if (rtwsta && rtwsta->ra_report.might_fallback_legacy)
667 __rtw89_core_tx_adjust_he_qos_htc(struct rtw89_dev *rtwdev,
668 struct rtw89_core_tx_request *tx_req)
670 struct ieee80211_sta *sta = tx_req->sta;
671 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
672 struct sk_buff *skb = tx_req->skb;
673 struct ieee80211_hdr *hdr = (void *)skb->data;
674 __le16 fc = hdr->frame_control;
680 hdr_len = ieee80211_has_a4(fc) ? 32 : 26;
681 data = skb_push(skb, IEEE80211_HT_CTL_LEN);
682 memmove(data, data + IEEE80211_HT_CTL_LEN, hdr_len);
685 htc = data + hdr_len;
686 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_ORDER);
687 *htc = rtwsta->htc_template ? rtwsta->htc_template :
688 le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) |
689 le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_CAS, RTW89_HTC_MASK_CTL_ID);
691 qc = data + hdr_len - IEEE80211_QOS_CTL_LEN;
692 qc[0] |= IEEE80211_QOS_CTL_EOSP;
696 rtw89_core_tx_update_he_qos_htc(struct rtw89_dev *rtwdev,
697 struct rtw89_core_tx_request *tx_req,
698 enum btc_pkt_type pkt_type)
700 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
701 struct ieee80211_vif *vif = tx_req->vif;
702 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
704 if (!__rtw89_core_tx_check_he_qos_htc(rtwdev, tx_req, pkt_type))
707 __rtw89_core_tx_adjust_he_qos_htc(rtwdev, tx_req);
709 desc_info->pkt_size += IEEE80211_HT_CTL_LEN;
710 desc_info->a_ctrl_bsr = true;
713 if (!rtwvif || rtwvif->last_a_ctrl == desc_info->a_ctrl_bsr)
716 rtwvif->last_a_ctrl = desc_info->a_ctrl_bsr;
717 desc_info->bk = true;
720 static u16 rtw89_core_get_data_rate(struct rtw89_dev *rtwdev,
721 struct rtw89_core_tx_request *tx_req)
723 struct ieee80211_vif *vif = tx_req->vif;
724 struct ieee80211_sta *sta = tx_req->sta;
725 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
726 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern;
727 enum rtw89_sub_entity_idx idx = rtwvif->sub_entity_idx;
728 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, idx);
731 if (rate_pattern->enable)
732 return rate_pattern->rate;
735 lowest_rate = RTW89_HW_RATE_OFDM6;
736 else if (chan->band_type == RTW89_BAND_2G)
737 lowest_rate = RTW89_HW_RATE_CCK1;
739 lowest_rate = RTW89_HW_RATE_OFDM6;
741 if (!sta || !sta->deflink.supp_rates[chan->band_type])
744 return __ffs(sta->deflink.supp_rates[chan->band_type]) + lowest_rate;
748 rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev,
749 struct rtw89_core_tx_request *tx_req)
751 struct ieee80211_vif *vif = tx_req->vif;
752 struct ieee80211_sta *sta = tx_req->sta;
753 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
754 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
755 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
756 struct sk_buff *skb = tx_req->skb;
757 u8 tid, tid_indicate;
760 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
761 tid_indicate = rtw89_core_get_tid_indicate(rtwdev, tid);
762 qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : rtw89_core_get_qsel(rtwdev, tid);
763 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
765 desc_info->ch_dma = ch_dma;
766 desc_info->tid_indicate = tid_indicate;
767 desc_info->qsel = qsel;
768 desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req);
769 desc_info->port = desc_info->hiq ? rtwvif->port : 0;
770 desc_info->er_cap = rtwsta ? rtwsta->er_cap : false;
772 /* enable wd_info for AMPDU */
773 desc_info->en_wd_info = true;
775 if (IEEE80211_SKB_CB(skb)->control.hw_key)
776 rtw89_core_tx_update_sec_key(rtwdev, tx_req);
778 desc_info->data_retry_lowest_rate = rtw89_core_get_data_rate(rtwdev, tx_req);
781 static enum btc_pkt_type
782 rtw89_core_tx_btc_spec_pkt_notify(struct rtw89_dev *rtwdev,
783 struct rtw89_core_tx_request *tx_req)
785 struct sk_buff *skb = tx_req->skb;
786 struct udphdr *udphdr;
788 if (IEEE80211_SKB_CB(skb)->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO) {
789 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.eapol_notify_work);
793 if (skb->protocol == htons(ETH_P_ARP)) {
794 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.arp_notify_work);
798 if (skb->protocol == htons(ETH_P_IP) &&
799 ip_hdr(skb)->protocol == IPPROTO_UDP) {
800 udphdr = udp_hdr(skb);
801 if (((udphdr->source == htons(67) && udphdr->dest == htons(68)) ||
802 (udphdr->source == htons(68) && udphdr->dest == htons(67))) &&
804 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.dhcp_notify_work);
809 if (skb->protocol == htons(ETH_P_IP) &&
810 ip_hdr(skb)->protocol == IPPROTO_ICMP) {
811 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.icmp_notify_work);
818 static void rtw89_core_tx_update_llc_hdr(struct rtw89_dev *rtwdev,
819 struct rtw89_tx_desc_info *desc_info,
822 struct ieee80211_hdr *hdr = (void *)skb->data;
823 __le16 fc = hdr->frame_control;
825 desc_info->hdr_llc_len = ieee80211_hdrlen(fc);
826 desc_info->hdr_llc_len >>= 1; /* in unit of 2 bytes */
830 rtw89_core_tx_wake(struct rtw89_dev *rtwdev,
831 struct rtw89_core_tx_request *tx_req)
833 const struct rtw89_chip_info *chip = rtwdev->chip;
835 if (!RTW89_CHK_FW_FEATURE(TX_WAKE, &rtwdev->fw))
838 if (!test_bit(RTW89_FLAG_LOW_POWER_MODE, rtwdev->flags))
841 if (chip->chip_id != RTL8852C &&
842 tx_req->tx_type != RTW89_CORE_TX_TYPE_MGMT)
845 rtw89_mac_notify_wake(rtwdev);
849 rtw89_core_tx_update_desc_info(struct rtw89_dev *rtwdev,
850 struct rtw89_core_tx_request *tx_req)
852 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
853 struct sk_buff *skb = tx_req->skb;
854 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
855 struct ieee80211_hdr *hdr = (void *)skb->data;
856 enum rtw89_core_tx_type tx_type;
857 enum btc_pkt_type pkt_type;
861 seq = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
862 if (tx_req->tx_type != RTW89_CORE_TX_TYPE_FWCMD) {
863 tx_type = rtw89_core_get_tx_type(rtwdev, skb);
864 tx_req->tx_type = tx_type;
866 is_bmc = (is_broadcast_ether_addr(hdr->addr1) ||
867 is_multicast_ether_addr(hdr->addr1));
869 desc_info->seq = seq;
870 desc_info->pkt_size = skb->len;
871 desc_info->is_bmc = is_bmc;
872 desc_info->wd_page = true;
873 desc_info->hiq = info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM;
875 switch (tx_req->tx_type) {
876 case RTW89_CORE_TX_TYPE_MGMT:
877 rtw89_core_tx_update_mgmt_info(rtwdev, tx_req);
879 case RTW89_CORE_TX_TYPE_DATA:
880 rtw89_core_tx_update_data_info(rtwdev, tx_req);
881 pkt_type = rtw89_core_tx_btc_spec_pkt_notify(rtwdev, tx_req);
882 rtw89_core_tx_update_he_qos_htc(rtwdev, tx_req, pkt_type);
883 rtw89_core_tx_update_ampdu_info(rtwdev, tx_req, pkt_type);
884 rtw89_core_tx_update_llc_hdr(rtwdev, desc_info, skb);
886 case RTW89_CORE_TX_TYPE_FWCMD:
887 rtw89_core_tx_update_h2c_info(rtwdev, tx_req);
892 void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel)
896 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
898 rtw89_hci_tx_kick_off(rtwdev, ch_dma);
901 int rtw89_core_tx_kick_off_and_wait(struct rtw89_dev *rtwdev, struct sk_buff *skb,
902 int qsel, unsigned int timeout)
904 struct rtw89_tx_skb_data *skb_data = RTW89_TX_SKB_CB(skb);
905 struct rtw89_tx_wait_info *wait;
906 unsigned long time_left;
909 wait = kzalloc(sizeof(*wait), GFP_KERNEL);
911 rtw89_core_tx_kick_off(rtwdev, qsel);
915 init_completion(&wait->completion);
916 rcu_assign_pointer(skb_data->wait, wait);
918 rtw89_core_tx_kick_off(rtwdev, qsel);
919 time_left = wait_for_completion_timeout(&wait->completion,
920 msecs_to_jiffies(timeout));
923 else if (!wait->tx_done)
926 rcu_assign_pointer(skb_data->wait, NULL);
927 kfree_rcu(wait, rcu_head);
932 int rtw89_h2c_tx(struct rtw89_dev *rtwdev,
933 struct sk_buff *skb, bool fwdl)
935 struct rtw89_core_tx_request tx_req = {0};
939 if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) {
940 rtw89_debug(rtwdev, RTW89_DBG_FW,
941 "ignore h2c due to power is off with firmware state=%d\n",
942 test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags));
948 tx_req.tx_type = RTW89_CORE_TX_TYPE_FWCMD;
950 tx_req.desc_info.fw_dl = true;
952 rtw89_core_tx_update_desc_info(rtwdev, &tx_req);
955 rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "H2C: ", skb->data, skb->len);
957 cnt = rtw89_hci_check_and_reclaim_tx_resource(rtwdev, RTW89_TXCH_CH12);
959 rtw89_err(rtwdev, "no tx fwcmd resource\n");
963 ret = rtw89_hci_tx_write(rtwdev, &tx_req);
965 rtw89_err(rtwdev, "failed to transmit skb to HCI\n");
968 rtw89_hci_tx_kick_off(rtwdev, RTW89_TXCH_CH12);
973 int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
974 struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel)
976 struct rtw89_core_tx_request tx_req = {0};
977 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
984 rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, true);
985 rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, true);
986 rtw89_core_tx_update_desc_info(rtwdev, &tx_req);
987 rtw89_core_tx_wake(rtwdev, &tx_req);
989 ret = rtw89_hci_tx_write(rtwdev, &tx_req);
991 rtw89_err(rtwdev, "failed to transmit skb to HCI\n");
996 *qsel = tx_req.desc_info.qsel;
1001 static __le32 rtw89_build_txwd_body0(struct rtw89_tx_desc_info *desc_info)
1003 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET, desc_info->wp_offset) |
1004 FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
1005 FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
1006 FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
1007 FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
1008 FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl) |
1009 FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_SEL, desc_info->hw_ssn_sel) |
1010 FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_MODE, desc_info->hw_seq_mode);
1012 return cpu_to_le32(dword);
1015 static __le32 rtw89_build_txwd_body0_v1(struct rtw89_tx_desc_info *desc_info)
1017 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET_V1, desc_info->wp_offset) |
1018 FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
1019 FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
1020 FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
1021 FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
1022 FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl);
1024 return cpu_to_le32(dword);
1027 static __le32 rtw89_build_txwd_body1_v1(struct rtw89_tx_desc_info *desc_info)
1029 u32 dword = FIELD_PREP(RTW89_TXWD_BODY1_ADDR_INFO_NUM, desc_info->addr_info_nr) |
1030 FIELD_PREP(RTW89_TXWD_BODY1_SEC_KEYID, desc_info->sec_keyid) |
1031 FIELD_PREP(RTW89_TXWD_BODY1_SEC_TYPE, desc_info->sec_type);
1033 return cpu_to_le32(dword);
1036 static __le32 rtw89_build_txwd_body2(struct rtw89_tx_desc_info *desc_info)
1038 u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) |
1039 FIELD_PREP(RTW89_TXWD_BODY2_QSEL, desc_info->qsel) |
1040 FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size) |
1041 FIELD_PREP(RTW89_TXWD_BODY2_MACID, desc_info->mac_id);
1043 return cpu_to_le32(dword);
1046 static __le32 rtw89_build_txwd_body3(struct rtw89_tx_desc_info *desc_info)
1048 u32 dword = FIELD_PREP(RTW89_TXWD_BODY3_SW_SEQ, desc_info->seq) |
1049 FIELD_PREP(RTW89_TXWD_BODY3_AGG_EN, desc_info->agg_en) |
1050 FIELD_PREP(RTW89_TXWD_BODY3_BK, desc_info->bk);
1052 return cpu_to_le32(dword);
1055 static __le32 rtw89_build_txwd_body4(struct rtw89_tx_desc_info *desc_info)
1057 u32 dword = FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L0, desc_info->sec_seq[0]) |
1058 FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L1, desc_info->sec_seq[1]);
1060 return cpu_to_le32(dword);
1063 static __le32 rtw89_build_txwd_body5(struct rtw89_tx_desc_info *desc_info)
1065 u32 dword = FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H2, desc_info->sec_seq[2]) |
1066 FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H3, desc_info->sec_seq[3]) |
1067 FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H4, desc_info->sec_seq[4]) |
1068 FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H5, desc_info->sec_seq[5]);
1070 return cpu_to_le32(dword);
1073 static __le32 rtw89_build_txwd_body7_v1(struct rtw89_tx_desc_info *desc_info)
1075 u32 dword = FIELD_PREP(RTW89_TXWD_BODY7_USE_RATE_V1, desc_info->use_rate) |
1076 FIELD_PREP(RTW89_TXWD_BODY7_DATA_RATE, desc_info->data_rate);
1078 return cpu_to_le32(dword);
1081 static __le32 rtw89_build_txwd_info0(struct rtw89_tx_desc_info *desc_info)
1083 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) |
1084 FIELD_PREP(RTW89_TXWD_INFO0_DATA_RATE, desc_info->data_rate) |
1085 FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1086 FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port);
1088 return cpu_to_le32(dword);
1091 static __le32 rtw89_build_txwd_info0_v1(struct rtw89_tx_desc_info *desc_info)
1093 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1094 FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port) |
1095 FIELD_PREP(RTW89_TXWD_INFO0_DATA_ER, desc_info->er_cap) |
1096 FIELD_PREP(RTW89_TXWD_INFO0_DATA_BW_ER, 0);
1098 return cpu_to_le32(dword);
1101 static __le32 rtw89_build_txwd_info1(struct rtw89_tx_desc_info *desc_info)
1103 u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) |
1104 FIELD_PREP(RTW89_TXWD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) |
1105 FIELD_PREP(RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE,
1106 desc_info->data_retry_lowest_rate);
1108 return cpu_to_le32(dword);
1111 static __le32 rtw89_build_txwd_info2(struct rtw89_tx_desc_info *desc_info)
1113 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1114 FIELD_PREP(RTW89_TXWD_INFO2_SEC_TYPE, desc_info->sec_type) |
1115 FIELD_PREP(RTW89_TXWD_INFO2_SEC_HW_ENC, desc_info->sec_en) |
1116 FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1118 return cpu_to_le32(dword);
1121 static __le32 rtw89_build_txwd_info2_v1(struct rtw89_tx_desc_info *desc_info)
1123 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1124 FIELD_PREP(RTW89_TXWD_INFO2_FORCE_KEY_EN, desc_info->sec_en) |
1125 FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1127 return cpu_to_le32(dword);
1130 static __le32 rtw89_build_txwd_info4(struct rtw89_tx_desc_info *desc_info)
1132 u32 dword = FIELD_PREP(RTW89_TXWD_INFO4_RTS_EN, 1) |
1133 FIELD_PREP(RTW89_TXWD_INFO4_HW_RTS_EN, 1);
1135 return cpu_to_le32(dword);
1138 void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev,
1139 struct rtw89_tx_desc_info *desc_info,
1142 struct rtw89_txwd_body *txwd_body = (struct rtw89_txwd_body *)txdesc;
1143 struct rtw89_txwd_info *txwd_info;
1145 txwd_body->dword0 = rtw89_build_txwd_body0(desc_info);
1146 txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
1147 txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
1149 if (!desc_info->en_wd_info)
1152 txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1);
1153 txwd_info->dword0 = rtw89_build_txwd_info0(desc_info);
1154 txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
1155 txwd_info->dword2 = rtw89_build_txwd_info2(desc_info);
1156 txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
1159 EXPORT_SYMBOL(rtw89_core_fill_txdesc);
1161 void rtw89_core_fill_txdesc_v1(struct rtw89_dev *rtwdev,
1162 struct rtw89_tx_desc_info *desc_info,
1165 struct rtw89_txwd_body_v1 *txwd_body = (struct rtw89_txwd_body_v1 *)txdesc;
1166 struct rtw89_txwd_info *txwd_info;
1168 txwd_body->dword0 = rtw89_build_txwd_body0_v1(desc_info);
1169 txwd_body->dword1 = rtw89_build_txwd_body1_v1(desc_info);
1170 txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
1171 txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
1172 if (desc_info->sec_en) {
1173 txwd_body->dword4 = rtw89_build_txwd_body4(desc_info);
1174 txwd_body->dword5 = rtw89_build_txwd_body5(desc_info);
1176 txwd_body->dword7 = rtw89_build_txwd_body7_v1(desc_info);
1178 if (!desc_info->en_wd_info)
1181 txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1);
1182 txwd_info->dword0 = rtw89_build_txwd_info0_v1(desc_info);
1183 txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
1184 txwd_info->dword2 = rtw89_build_txwd_info2_v1(desc_info);
1185 txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
1187 EXPORT_SYMBOL(rtw89_core_fill_txdesc_v1);
1189 static __le32 rtw89_build_txwd_fwcmd0_v1(struct rtw89_tx_desc_info *desc_info)
1191 u32 dword = FIELD_PREP(AX_RXD_RPKT_LEN_MASK, desc_info->pkt_size) |
1192 FIELD_PREP(AX_RXD_RPKT_TYPE_MASK, desc_info->fw_dl ?
1193 RTW89_CORE_RX_TYPE_FWDL :
1194 RTW89_CORE_RX_TYPE_H2C);
1196 return cpu_to_le32(dword);
1199 void rtw89_core_fill_txdesc_fwcmd_v1(struct rtw89_dev *rtwdev,
1200 struct rtw89_tx_desc_info *desc_info,
1203 struct rtw89_rxdesc_short *txwd_v1 = (struct rtw89_rxdesc_short *)txdesc;
1205 txwd_v1->dword0 = rtw89_build_txwd_fwcmd0_v1(desc_info);
1207 EXPORT_SYMBOL(rtw89_core_fill_txdesc_fwcmd_v1);
1209 static int rtw89_core_rx_process_mac_ppdu(struct rtw89_dev *rtwdev,
1210 struct sk_buff *skb,
1211 struct rtw89_rx_phy_ppdu *phy_ppdu)
1213 bool rx_cnt_valid = false;
1218 rx_cnt_valid = RTW89_GET_RXINFO_RX_CNT_VLD(skb->data);
1219 plcp_size = RTW89_GET_RXINFO_PLCP_LEN(skb->data) << 3;
1220 usr_num = RTW89_GET_RXINFO_USR_NUM(skb->data);
1221 if (usr_num > RTW89_PPDU_MAX_USR) {
1222 rtw89_warn(rtwdev, "Invalid user number in mac info\n");
1226 phy_sts = skb->data + RTW89_PPDU_MAC_INFO_SIZE;
1227 phy_sts += usr_num * RTW89_PPDU_MAC_INFO_USR_SIZE;
1228 /* 8-byte alignment */
1229 if (usr_num & BIT(0))
1230 phy_sts += RTW89_PPDU_MAC_INFO_USR_SIZE;
1232 phy_sts += RTW89_PPDU_MAC_RX_CNT_SIZE;
1233 phy_sts += plcp_size;
1235 phy_ppdu->buf = phy_sts;
1236 phy_ppdu->len = skb->data + skb->len - phy_sts;
1241 static void rtw89_core_rx_process_phy_ppdu_iter(void *data,
1242 struct ieee80211_sta *sta)
1244 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1245 struct rtw89_rx_phy_ppdu *phy_ppdu = (struct rtw89_rx_phy_ppdu *)data;
1246 struct rtw89_dev *rtwdev = rtwsta->rtwdev;
1247 struct rtw89_hal *hal = &rtwdev->hal;
1248 u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num;
1249 u8 ant_pos = U8_MAX;
1253 if (rtwsta->mac_id != phy_ppdu->mac_id || !phy_ppdu->to_self)
1256 if (hal->ant_diversity && hal->antenna_rx) {
1257 ant_pos = __ffs(hal->antenna_rx);
1261 ewma_rssi_add(&rtwsta->avg_rssi, phy_ppdu->rssi_avg);
1263 if (ant_pos < ant_num) {
1264 ewma_rssi_add(&rtwsta->rssi[ant_pos], phy_ppdu->rssi[0]);
1266 for (i = 0; i < rtwdev->chip->rf_path_num; i++)
1267 ewma_rssi_add(&rtwsta->rssi[i], phy_ppdu->rssi[i]);
1270 if (phy_ppdu->ofdm.has) {
1271 ewma_snr_add(&rtwsta->avg_snr, phy_ppdu->ofdm.avg_snr);
1272 ewma_evm_add(&rtwsta->evm_min[evm_pos], phy_ppdu->ofdm.evm_min);
1273 ewma_evm_add(&rtwsta->evm_max[evm_pos], phy_ppdu->ofdm.evm_max);
1277 #define VAR_LEN 0xff
1278 #define VAR_LEN_UNIT 8
1279 static u16 rtw89_core_get_phy_status_ie_len(struct rtw89_dev *rtwdev, u8 *addr)
1281 static const u8 physts_ie_len_tab[32] = {
1282 16, 32, 24, 24, 8, 8, 8, 8, VAR_LEN, 8, VAR_LEN, 176, VAR_LEN,
1283 VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, 16, 24, VAR_LEN,
1284 VAR_LEN, VAR_LEN, 0, 24, 24, 24, 24, 32, 32, 32, 32
1289 ie = RTW89_GET_PHY_STS_IE_TYPE(addr);
1290 if (physts_ie_len_tab[ie] != VAR_LEN)
1291 ie_len = physts_ie_len_tab[ie];
1293 ie_len = RTW89_GET_PHY_STS_IE_LEN(addr) * VAR_LEN_UNIT;
1298 static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev, u8 *addr,
1299 struct rtw89_rx_phy_ppdu *phy_ppdu)
1301 const struct rtw89_phy_sts_ie0 *ie = (const struct rtw89_phy_sts_ie0 *)addr;
1305 phy_ppdu->chan_idx = le32_get_bits(ie->w0, RTW89_PHY_STS_IE01_W0_CH_IDX);
1306 if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6)
1309 if (!phy_ppdu->to_self)
1312 phy_ppdu->ofdm.avg_snr = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_AVG_SNR);
1313 phy_ppdu->ofdm.evm_max = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_EVM_MAX);
1314 phy_ppdu->ofdm.evm_min = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_EVM_MIN);
1315 phy_ppdu->ofdm.has = true;
1317 /* sign conversion for S(12,2) */
1318 if (rtwdev->chip->cfo_src_fd) {
1319 t = le32_get_bits(ie->w1, RTW89_PHY_STS_IE01_W1_FD_CFO);
1320 cfo = sign_extend32(t, 11);
1322 t = le32_get_bits(ie->w1, RTW89_PHY_STS_IE01_W1_PREMB_CFO);
1323 cfo = sign_extend32(t, 11);
1326 rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu);
1329 static int rtw89_core_process_phy_status_ie(struct rtw89_dev *rtwdev, u8 *addr,
1330 struct rtw89_rx_phy_ppdu *phy_ppdu)
1334 ie = RTW89_GET_PHY_STS_IE_TYPE(addr);
1336 case RTW89_PHYSTS_IE01_CMN_OFDM:
1337 rtw89_core_parse_phy_status_ie01(rtwdev, addr, phy_ppdu);
1346 static void rtw89_core_update_phy_ppdu(struct rtw89_rx_phy_ppdu *phy_ppdu)
1348 u8 *rssi = phy_ppdu->rssi;
1349 u8 *buf = phy_ppdu->buf;
1351 phy_ppdu->ie = RTW89_GET_PHY_STS_IE_MAP(buf);
1352 phy_ppdu->rssi_avg = RTW89_GET_PHY_STS_RSSI_AVG(buf);
1353 rssi[RF_PATH_A] = RTW89_GET_PHY_STS_RSSI_A(buf);
1354 rssi[RF_PATH_B] = RTW89_GET_PHY_STS_RSSI_B(buf);
1355 rssi[RF_PATH_C] = RTW89_GET_PHY_STS_RSSI_C(buf);
1356 rssi[RF_PATH_D] = RTW89_GET_PHY_STS_RSSI_D(buf);
1359 static int rtw89_core_rx_process_phy_ppdu(struct rtw89_dev *rtwdev,
1360 struct rtw89_rx_phy_ppdu *phy_ppdu)
1362 if (RTW89_GET_PHY_STS_LEN(phy_ppdu->buf) << 3 != phy_ppdu->len) {
1363 rtw89_debug(rtwdev, RTW89_DBG_UNEXP, "phy ppdu len mismatch\n");
1366 rtw89_core_update_phy_ppdu(phy_ppdu);
1371 static int rtw89_core_rx_parse_phy_sts(struct rtw89_dev *rtwdev,
1372 struct rtw89_rx_phy_ppdu *phy_ppdu)
1377 /* mark invalid reports and bypass them */
1378 if (phy_ppdu->ie < RTW89_CCK_PKT)
1381 pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN;
1382 end = (u8 *)phy_ppdu->buf + phy_ppdu->len;
1384 ie_len = rtw89_core_get_phy_status_ie_len(rtwdev, pos);
1385 rtw89_core_process_phy_status_ie(rtwdev, pos, phy_ppdu);
1387 if (pos > end || ie_len == 0) {
1388 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
1389 "phy status parse failed\n");
1397 static void rtw89_core_rx_process_phy_sts(struct rtw89_dev *rtwdev,
1398 struct rtw89_rx_phy_ppdu *phy_ppdu)
1402 ret = rtw89_core_rx_parse_phy_sts(rtwdev, phy_ppdu);
1404 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "parse phy sts failed\n");
1406 phy_ppdu->valid = true;
1408 ieee80211_iterate_stations_atomic(rtwdev->hw,
1409 rtw89_core_rx_process_phy_ppdu_iter,
1413 static u8 rtw89_rxdesc_to_nl_he_gi(struct rtw89_dev *rtwdev,
1414 const struct rtw89_rx_desc_info *desc_info,
1417 switch (desc_info->gi_ltf) {
1418 case RTW89_GILTF_SGI_4XHE08:
1419 case RTW89_GILTF_2XHE08:
1420 case RTW89_GILTF_1XHE08:
1421 return NL80211_RATE_INFO_HE_GI_0_8;
1422 case RTW89_GILTF_2XHE16:
1423 case RTW89_GILTF_1XHE16:
1424 return NL80211_RATE_INFO_HE_GI_1_6;
1425 case RTW89_GILTF_LGI_4XHE32:
1426 return NL80211_RATE_INFO_HE_GI_3_2;
1428 rtw89_warn(rtwdev, "invalid gi_ltf=%d", desc_info->gi_ltf);
1429 return rx_status ? NL80211_RATE_INFO_HE_GI_3_2 : U8_MAX;
1433 static bool rtw89_core_rx_ppdu_match(struct rtw89_dev *rtwdev,
1434 struct rtw89_rx_desc_info *desc_info,
1435 struct ieee80211_rx_status *status)
1437 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1438 u8 data_rate_mode, bw, rate_idx = MASKBYTE0, gi_ltf;
1442 data_rate = desc_info->data_rate;
1443 data_rate_mode = GET_DATA_RATE_MODE(data_rate);
1444 if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
1445 rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate);
1446 /* rate_idx is still hardware value here */
1447 } else if (data_rate_mode == DATA_RATE_MODE_HT) {
1448 rate_idx = GET_DATA_RATE_HT_IDX(data_rate);
1449 } else if (data_rate_mode == DATA_RATE_MODE_VHT) {
1450 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1451 } else if (data_rate_mode == DATA_RATE_MODE_HE) {
1452 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1454 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
1457 bw = rtw89_hw_to_rate_info_bw(desc_info->bw);
1458 gi_ltf = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, false);
1459 ret = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band] == desc_info->ppdu_cnt &&
1460 status->rate_idx == rate_idx &&
1461 status->he_gi == gi_ltf &&
1467 struct rtw89_vif_rx_stats_iter_data {
1468 struct rtw89_dev *rtwdev;
1469 struct rtw89_rx_phy_ppdu *phy_ppdu;
1470 struct rtw89_rx_desc_info *desc_info;
1471 struct sk_buff *skb;
1475 static void rtw89_stats_trigger_frame(struct rtw89_dev *rtwdev,
1476 struct ieee80211_vif *vif,
1477 struct sk_buff *skb)
1479 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1480 struct ieee80211_trigger *tf = (struct ieee80211_trigger *)skb->data;
1481 u8 *pos, *end, type;
1484 if (!ether_addr_equal(vif->bss_conf.bssid, tf->ta) ||
1485 rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION ||
1486 rtwvif->net_type == RTW89_NET_TYPE_NO_LINK)
1489 type = le64_get_bits(tf->common_info, IEEE80211_TRIGGER_TYPE_MASK);
1490 if (type != IEEE80211_TRIGGER_TYPE_BASIC)
1493 end = (u8 *)tf + skb->len;
1496 while (end - pos >= RTW89_TF_BASIC_USER_INFO_SZ) {
1497 aid = RTW89_GET_TF_USER_INFO_AID12(pos);
1498 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
1499 "[TF] aid: %d, ul_mcs: %d, rua: %d\n",
1500 aid, RTW89_GET_TF_USER_INFO_UL_MCS(pos),
1501 RTW89_GET_TF_USER_INFO_RUA(pos));
1503 if (aid == RTW89_TF_PAD)
1506 if (aid == vif->cfg.aid) {
1507 rtwvif->stats.rx_tf_acc++;
1508 rtwdev->stats.rx_tf_acc++;
1512 pos += RTW89_TF_BASIC_USER_INFO_SZ;
1516 static void rtw89_core_cancel_6ghz_probe_tx(struct rtw89_dev *rtwdev,
1517 struct sk_buff *skb)
1519 struct ieee80211_rx_status *rx_status = IEEE80211_SKB_RXCB(skb);
1520 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
1521 struct list_head *pkt_list = rtwdev->scan_info.pkt_list;
1522 struct rtw89_pktofld_info *info;
1523 const u8 *ies = mgmt->u.beacon.variable, *ssid_ie;
1525 if (rx_status->band != NL80211_BAND_6GHZ)
1528 ssid_ie = cfg80211_find_ie(WLAN_EID_SSID, ies, skb->len);
1530 list_for_each_entry(info, &pkt_list[NL80211_BAND_6GHZ], list) {
1531 if (ether_addr_equal(info->bssid, mgmt->bssid)) {
1532 rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id);
1536 if (!ssid_ie || ssid_ie[1] != info->ssid_len || info->ssid_len == 0)
1539 if (memcmp(&ssid_ie[2], info->ssid, info->ssid_len) == 0)
1540 rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id);
1544 static void rtw89_vif_rx_stats_iter(void *data, u8 *mac,
1545 struct ieee80211_vif *vif)
1547 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1548 struct rtw89_vif_rx_stats_iter_data *iter_data = data;
1549 struct rtw89_dev *rtwdev = iter_data->rtwdev;
1550 struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.cur_pkt_stat;
1551 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
1552 struct sk_buff *skb = iter_data->skb;
1553 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1554 struct rtw89_rx_phy_ppdu *phy_ppdu = iter_data->phy_ppdu;
1555 const u8 *bssid = iter_data->bssid;
1557 if (rtwdev->scanning &&
1558 (ieee80211_is_beacon(hdr->frame_control) ||
1559 ieee80211_is_probe_resp(hdr->frame_control)))
1560 rtw89_core_cancel_6ghz_probe_tx(rtwdev, skb);
1562 if (!vif->bss_conf.bssid)
1565 if (ieee80211_is_trigger(hdr->frame_control)) {
1566 rtw89_stats_trigger_frame(rtwdev, vif, skb);
1570 if (!ether_addr_equal(vif->bss_conf.bssid, bssid))
1573 if (ieee80211_is_beacon(hdr->frame_control)) {
1574 if (vif->type == NL80211_IFTYPE_STATION)
1575 rtw89_fw_h2c_rssi_offload(rtwdev, phy_ppdu);
1576 pkt_stat->beacon_nr++;
1579 if (!ether_addr_equal(vif->addr, hdr->addr1))
1582 if (desc_info->data_rate < RTW89_HW_RATE_NR)
1583 pkt_stat->rx_rate_cnt[desc_info->data_rate]++;
1585 rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, false);
1588 static void rtw89_core_rx_stats(struct rtw89_dev *rtwdev,
1589 struct rtw89_rx_phy_ppdu *phy_ppdu,
1590 struct rtw89_rx_desc_info *desc_info,
1591 struct sk_buff *skb)
1593 struct rtw89_vif_rx_stats_iter_data iter_data;
1595 rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, false);
1597 iter_data.rtwdev = rtwdev;
1598 iter_data.phy_ppdu = phy_ppdu;
1599 iter_data.desc_info = desc_info;
1600 iter_data.skb = skb;
1601 iter_data.bssid = get_hdr_bssid((struct ieee80211_hdr *)skb->data);
1602 rtw89_iterate_vifs_bh(rtwdev, rtw89_vif_rx_stats_iter, &iter_data);
1605 static void rtw89_correct_cck_chan(struct rtw89_dev *rtwdev,
1606 struct ieee80211_rx_status *status)
1608 const struct rtw89_chan_rcd *rcd =
1609 rtw89_chan_rcd_get(rtwdev, RTW89_SUB_ENTITY_0);
1610 u16 chan = rcd->prev_primary_channel;
1611 u8 band = rcd->prev_band_type == RTW89_BAND_2G ?
1612 NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
1614 if (status->band != NL80211_BAND_2GHZ &&
1615 status->encoding == RX_ENC_LEGACY &&
1616 status->rate_idx < RTW89_HW_RATE_OFDM6) {
1617 status->freq = ieee80211_channel_to_frequency(chan, band);
1618 status->band = band;
1622 static void rtw89_core_hw_to_sband_rate(struct ieee80211_rx_status *rx_status)
1624 if (rx_status->band == NL80211_BAND_2GHZ ||
1625 rx_status->encoding != RX_ENC_LEGACY)
1628 /* Some control frames' freq(ACKs in this case) are reported wrong due
1629 * to FW notify timing, set to lowest rate to prevent overflow.
1631 if (rx_status->rate_idx < RTW89_HW_RATE_OFDM6) {
1632 rx_status->rate_idx = 0;
1636 /* No 4 CCK rates for non-2G */
1637 rx_status->rate_idx -= 4;
1640 static void rtw89_core_update_radiotap(struct rtw89_dev *rtwdev,
1641 struct sk_buff *skb,
1642 struct ieee80211_rx_status *rx_status)
1644 static const struct ieee80211_radiotap_he known_he = {
1645 .data1 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN |
1646 IEEE80211_RADIOTAP_HE_DATA1_BW_RU_ALLOC_KNOWN),
1647 .data2 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN),
1649 struct ieee80211_radiotap_he *he;
1651 if (!(rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR))
1654 if (rx_status->encoding == RX_ENC_HE) {
1655 rx_status->flag |= RX_FLAG_RADIOTAP_HE;
1656 he = skb_push(skb, sizeof(*he));
1661 static void rtw89_core_rx_to_mac80211(struct rtw89_dev *rtwdev,
1662 struct rtw89_rx_phy_ppdu *phy_ppdu,
1663 struct rtw89_rx_desc_info *desc_info,
1664 struct sk_buff *skb_ppdu,
1665 struct ieee80211_rx_status *rx_status)
1667 struct napi_struct *napi = &rtwdev->napi;
1669 /* In low power mode, napi isn't scheduled. Receive it to netif. */
1670 if (unlikely(!test_bit(NAPI_STATE_SCHED, &napi->state)))
1673 rtw89_core_hw_to_sband_rate(rx_status);
1674 rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu);
1675 rtw89_core_update_radiotap(rtwdev, skb_ppdu, rx_status);
1676 /* In low power mode, it does RX in thread context. */
1678 ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, napi);
1680 rtwdev->napi_budget_countdown--;
1683 static void rtw89_core_rx_pending_skb(struct rtw89_dev *rtwdev,
1684 struct rtw89_rx_phy_ppdu *phy_ppdu,
1685 struct rtw89_rx_desc_info *desc_info,
1686 struct sk_buff *skb)
1688 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1689 int curr = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band];
1690 struct sk_buff *skb_ppdu = NULL, *tmp;
1691 struct ieee80211_rx_status *rx_status;
1693 if (curr > RTW89_MAX_PPDU_CNT)
1696 skb_queue_walk_safe(&rtwdev->ppdu_sts.rx_queue[band], skb_ppdu, tmp) {
1697 skb_unlink(skb_ppdu, &rtwdev->ppdu_sts.rx_queue[band]);
1698 rx_status = IEEE80211_SKB_RXCB(skb_ppdu);
1699 if (rtw89_core_rx_ppdu_match(rtwdev, desc_info, rx_status))
1700 rtw89_chip_query_ppdu(rtwdev, phy_ppdu, rx_status);
1701 rtw89_correct_cck_chan(rtwdev, rx_status);
1702 rtw89_core_rx_to_mac80211(rtwdev, phy_ppdu, desc_info, skb_ppdu, rx_status);
1706 static void rtw89_core_rx_process_ppdu_sts(struct rtw89_dev *rtwdev,
1707 struct rtw89_rx_desc_info *desc_info,
1708 struct sk_buff *skb)
1710 struct rtw89_rx_phy_ppdu phy_ppdu = {.buf = skb->data, .valid = false,
1712 .to_self = desc_info->addr1_match,
1713 .rate = desc_info->data_rate,
1714 .mac_id = desc_info->mac_id};
1717 if (desc_info->mac_info_valid)
1718 rtw89_core_rx_process_mac_ppdu(rtwdev, skb, &phy_ppdu);
1719 ret = rtw89_core_rx_process_phy_ppdu(rtwdev, &phy_ppdu);
1721 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "process ppdu failed\n");
1723 rtw89_core_rx_process_phy_sts(rtwdev, &phy_ppdu);
1724 rtw89_core_rx_pending_skb(rtwdev, &phy_ppdu, desc_info, skb);
1725 dev_kfree_skb_any(skb);
1728 static void rtw89_core_rx_process_report(struct rtw89_dev *rtwdev,
1729 struct rtw89_rx_desc_info *desc_info,
1730 struct sk_buff *skb)
1732 switch (desc_info->pkt_type) {
1733 case RTW89_CORE_RX_TYPE_C2H:
1734 rtw89_fw_c2h_irqsafe(rtwdev, skb);
1736 case RTW89_CORE_RX_TYPE_PPDU_STAT:
1737 rtw89_core_rx_process_ppdu_sts(rtwdev, desc_info, skb);
1740 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "unhandled pkt_type=%d\n",
1741 desc_info->pkt_type);
1742 dev_kfree_skb_any(skb);
1747 void rtw89_core_query_rxdesc(struct rtw89_dev *rtwdev,
1748 struct rtw89_rx_desc_info *desc_info,
1749 u8 *data, u32 data_offset)
1751 const struct rtw89_chip_info *chip = rtwdev->chip;
1752 struct rtw89_rxdesc_short *rxd_s;
1753 struct rtw89_rxdesc_long *rxd_l;
1754 u8 shift_len, drv_info_len;
1756 rxd_s = (struct rtw89_rxdesc_short *)(data + data_offset);
1757 desc_info->pkt_size = RTW89_GET_RXWD_PKT_SIZE(rxd_s);
1758 desc_info->drv_info_size = RTW89_GET_RXWD_DRV_INFO_SIZE(rxd_s);
1759 desc_info->long_rxdesc = RTW89_GET_RXWD_LONG_RXD(rxd_s);
1760 desc_info->pkt_type = RTW89_GET_RXWD_RPKT_TYPE(rxd_s);
1761 desc_info->mac_info_valid = RTW89_GET_RXWD_MAC_INFO_VALID(rxd_s);
1762 if (chip->chip_id == RTL8852C)
1763 desc_info->bw = RTW89_GET_RXWD_BW_V1(rxd_s);
1765 desc_info->bw = RTW89_GET_RXWD_BW(rxd_s);
1766 desc_info->data_rate = RTW89_GET_RXWD_DATA_RATE(rxd_s);
1767 desc_info->gi_ltf = RTW89_GET_RXWD_GI_LTF(rxd_s);
1768 desc_info->user_id = RTW89_GET_RXWD_USER_ID(rxd_s);
1769 desc_info->sr_en = RTW89_GET_RXWD_SR_EN(rxd_s);
1770 desc_info->ppdu_cnt = RTW89_GET_RXWD_PPDU_CNT(rxd_s);
1771 desc_info->ppdu_type = RTW89_GET_RXWD_PPDU_TYPE(rxd_s);
1772 desc_info->free_run_cnt = RTW89_GET_RXWD_FREE_RUN_CNT(rxd_s);
1773 desc_info->icv_err = RTW89_GET_RXWD_ICV_ERR(rxd_s);
1774 desc_info->crc32_err = RTW89_GET_RXWD_CRC32_ERR(rxd_s);
1775 desc_info->hw_dec = RTW89_GET_RXWD_HW_DEC(rxd_s);
1776 desc_info->sw_dec = RTW89_GET_RXWD_SW_DEC(rxd_s);
1777 desc_info->addr1_match = RTW89_GET_RXWD_A1_MATCH(rxd_s);
1779 shift_len = desc_info->shift << 1; /* 2-byte unit */
1780 drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */
1781 desc_info->offset = data_offset + shift_len + drv_info_len;
1782 desc_info->ready = true;
1784 if (!desc_info->long_rxdesc)
1787 rxd_l = (struct rtw89_rxdesc_long *)(data + data_offset);
1788 desc_info->frame_type = RTW89_GET_RXWD_TYPE(rxd_l);
1789 desc_info->addr_cam_valid = RTW89_GET_RXWD_ADDR_CAM_VLD(rxd_l);
1790 desc_info->addr_cam_id = RTW89_GET_RXWD_ADDR_CAM_ID(rxd_l);
1791 desc_info->sec_cam_id = RTW89_GET_RXWD_SEC_CAM_ID(rxd_l);
1792 desc_info->mac_id = RTW89_GET_RXWD_MAC_ID(rxd_l);
1793 desc_info->rx_pl_id = RTW89_GET_RXWD_RX_PL_ID(rxd_l);
1795 EXPORT_SYMBOL(rtw89_core_query_rxdesc);
1797 struct rtw89_core_iter_rx_status {
1798 struct rtw89_dev *rtwdev;
1799 struct ieee80211_rx_status *rx_status;
1800 struct rtw89_rx_desc_info *desc_info;
1805 void rtw89_core_stats_sta_rx_status_iter(void *data, struct ieee80211_sta *sta)
1807 struct rtw89_core_iter_rx_status *iter_data =
1808 (struct rtw89_core_iter_rx_status *)data;
1809 struct ieee80211_rx_status *rx_status = iter_data->rx_status;
1810 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1811 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
1812 u8 mac_id = iter_data->mac_id;
1814 if (mac_id != rtwsta->mac_id)
1817 rtwsta->rx_status = *rx_status;
1818 rtwsta->rx_hw_rate = desc_info->data_rate;
1821 static void rtw89_core_stats_sta_rx_status(struct rtw89_dev *rtwdev,
1822 struct rtw89_rx_desc_info *desc_info,
1823 struct ieee80211_rx_status *rx_status)
1825 struct rtw89_core_iter_rx_status iter_data;
1827 if (!desc_info->addr1_match || !desc_info->long_rxdesc)
1830 if (desc_info->frame_type != RTW89_RX_TYPE_DATA)
1833 iter_data.rtwdev = rtwdev;
1834 iter_data.rx_status = rx_status;
1835 iter_data.desc_info = desc_info;
1836 iter_data.mac_id = desc_info->mac_id;
1837 ieee80211_iterate_stations_atomic(rtwdev->hw,
1838 rtw89_core_stats_sta_rx_status_iter,
1842 static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev,
1843 struct rtw89_rx_desc_info *desc_info,
1844 struct ieee80211_rx_status *rx_status)
1846 const struct cfg80211_chan_def *chandef =
1847 rtw89_chandef_get(rtwdev, RTW89_SUB_ENTITY_0);
1848 const struct rtw89_chan *cur = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
1852 /* currently using single PHY */
1853 rx_status->freq = chandef->chan->center_freq;
1854 rx_status->band = chandef->chan->band;
1856 if (rtwdev->scanning &&
1857 RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &rtwdev->fw)) {
1858 u8 chan = cur->primary_channel;
1859 u8 band = cur->band_type;
1860 enum nl80211_band nl_band;
1862 nl_band = rtw89_hw_to_nl80211_band(band);
1863 rx_status->freq = ieee80211_channel_to_frequency(chan, nl_band);
1864 rx_status->band = nl_band;
1867 if (desc_info->icv_err || desc_info->crc32_err)
1868 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
1870 if (desc_info->hw_dec &&
1871 !(desc_info->sw_dec || desc_info->icv_err))
1872 rx_status->flag |= RX_FLAG_DECRYPTED;
1874 rx_status->bw = rtw89_hw_to_rate_info_bw(desc_info->bw);
1876 data_rate = desc_info->data_rate;
1877 data_rate_mode = GET_DATA_RATE_MODE(data_rate);
1878 if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
1879 rx_status->encoding = RX_ENC_LEGACY;
1880 rx_status->rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate);
1881 /* convert rate_idx after we get the correct band */
1882 } else if (data_rate_mode == DATA_RATE_MODE_HT) {
1883 rx_status->encoding = RX_ENC_HT;
1884 rx_status->rate_idx = GET_DATA_RATE_HT_IDX(data_rate);
1885 if (desc_info->gi_ltf)
1886 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1887 } else if (data_rate_mode == DATA_RATE_MODE_VHT) {
1888 rx_status->encoding = RX_ENC_VHT;
1889 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1890 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1;
1891 if (desc_info->gi_ltf)
1892 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1893 } else if (data_rate_mode == DATA_RATE_MODE_HE) {
1894 rx_status->encoding = RX_ENC_HE;
1895 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1896 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1;
1898 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
1901 /* he_gi is used to match ppdu, so we always fill it. */
1902 rx_status->he_gi = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, true);
1903 rx_status->flag |= RX_FLAG_MACTIME_START;
1904 rx_status->mactime = desc_info->free_run_cnt;
1906 rtw89_core_stats_sta_rx_status(rtwdev, desc_info, rx_status);
1909 static enum rtw89_ps_mode rtw89_update_ps_mode(struct rtw89_dev *rtwdev)
1911 const struct rtw89_chip_info *chip = rtwdev->chip;
1913 if (rtw89_disable_ps_mode || !chip->ps_mode_supported ||
1914 RTW89_CHK_FW_FEATURE(NO_DEEP_PS, &rtwdev->fw))
1915 return RTW89_PS_MODE_NONE;
1917 if ((chip->ps_mode_supported & BIT(RTW89_PS_MODE_PWR_GATED)) &&
1918 !RTW89_CHK_FW_FEATURE(NO_LPS_PG, &rtwdev->fw))
1919 return RTW89_PS_MODE_PWR_GATED;
1921 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_CLK_GATED))
1922 return RTW89_PS_MODE_CLK_GATED;
1924 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_RFOFF))
1925 return RTW89_PS_MODE_RFOFF;
1927 return RTW89_PS_MODE_NONE;
1930 static void rtw89_core_flush_ppdu_rx_queue(struct rtw89_dev *rtwdev,
1931 struct rtw89_rx_desc_info *desc_info)
1933 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
1934 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1935 struct ieee80211_rx_status *rx_status;
1936 struct sk_buff *skb_ppdu, *tmp;
1938 skb_queue_walk_safe(&ppdu_sts->rx_queue[band], skb_ppdu, tmp) {
1939 skb_unlink(skb_ppdu, &ppdu_sts->rx_queue[band]);
1940 rx_status = IEEE80211_SKB_RXCB(skb_ppdu);
1941 rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb_ppdu, rx_status);
1945 void rtw89_core_rx(struct rtw89_dev *rtwdev,
1946 struct rtw89_rx_desc_info *desc_info,
1947 struct sk_buff *skb)
1949 struct ieee80211_rx_status *rx_status;
1950 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
1951 u8 ppdu_cnt = desc_info->ppdu_cnt;
1952 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1954 if (desc_info->pkt_type != RTW89_CORE_RX_TYPE_WIFI) {
1955 rtw89_core_rx_process_report(rtwdev, desc_info, skb);
1959 if (ppdu_sts->curr_rx_ppdu_cnt[band] != ppdu_cnt) {
1960 rtw89_core_flush_ppdu_rx_queue(rtwdev, desc_info);
1961 ppdu_sts->curr_rx_ppdu_cnt[band] = ppdu_cnt;
1964 rx_status = IEEE80211_SKB_RXCB(skb);
1965 memset(rx_status, 0, sizeof(*rx_status));
1966 rtw89_core_update_rx_status(rtwdev, desc_info, rx_status);
1967 if (desc_info->long_rxdesc &&
1968 BIT(desc_info->frame_type) & PPDU_FILTER_BITMAP)
1969 skb_queue_tail(&ppdu_sts->rx_queue[band], skb);
1971 rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb, rx_status);
1973 EXPORT_SYMBOL(rtw89_core_rx);
1975 void rtw89_core_napi_start(struct rtw89_dev *rtwdev)
1977 if (test_and_set_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
1980 napi_enable(&rtwdev->napi);
1982 EXPORT_SYMBOL(rtw89_core_napi_start);
1984 void rtw89_core_napi_stop(struct rtw89_dev *rtwdev)
1986 if (!test_and_clear_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
1989 napi_synchronize(&rtwdev->napi);
1990 napi_disable(&rtwdev->napi);
1992 EXPORT_SYMBOL(rtw89_core_napi_stop);
1994 void rtw89_core_napi_init(struct rtw89_dev *rtwdev)
1996 init_dummy_netdev(&rtwdev->netdev);
1997 netif_napi_add(&rtwdev->netdev, &rtwdev->napi,
1998 rtwdev->hci.ops->napi_poll);
2000 EXPORT_SYMBOL(rtw89_core_napi_init);
2002 void rtw89_core_napi_deinit(struct rtw89_dev *rtwdev)
2004 rtw89_core_napi_stop(rtwdev);
2005 netif_napi_del(&rtwdev->napi);
2007 EXPORT_SYMBOL(rtw89_core_napi_deinit);
2009 static void rtw89_core_ba_work(struct work_struct *work)
2011 struct rtw89_dev *rtwdev =
2012 container_of(work, struct rtw89_dev, ba_work);
2013 struct rtw89_txq *rtwtxq, *tmp;
2016 spin_lock_bh(&rtwdev->ba_lock);
2017 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
2018 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2019 struct ieee80211_sta *sta = txq->sta;
2020 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
2024 rtw89_warn(rtwdev, "cannot start BA without sta\n");
2028 if (rtwsta->disassoc) {
2029 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2030 "cannot start BA with disassoc sta\n");
2034 ret = ieee80211_start_tx_ba_session(sta, tid, 0);
2036 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2037 "failed to setup BA session for %pM:%2d: %d\n",
2038 sta->addr, tid, ret);
2040 set_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags);
2043 list_del_init(&rtwtxq->list);
2045 spin_unlock_bh(&rtwdev->ba_lock);
2048 static void rtw89_core_free_sta_pending_ba(struct rtw89_dev *rtwdev,
2049 struct ieee80211_sta *sta)
2051 struct rtw89_txq *rtwtxq, *tmp;
2053 spin_lock_bh(&rtwdev->ba_lock);
2054 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
2055 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2057 if (sta == txq->sta)
2058 list_del_init(&rtwtxq->list);
2060 spin_unlock_bh(&rtwdev->ba_lock);
2063 static void rtw89_core_free_sta_pending_forbid_ba(struct rtw89_dev *rtwdev,
2064 struct ieee80211_sta *sta)
2066 struct rtw89_txq *rtwtxq, *tmp;
2068 spin_lock_bh(&rtwdev->ba_lock);
2069 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->forbid_ba_list, list) {
2070 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2072 if (sta == txq->sta) {
2073 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
2074 list_del_init(&rtwtxq->list);
2077 spin_unlock_bh(&rtwdev->ba_lock);
2080 static void rtw89_core_free_sta_pending_roc_tx(struct rtw89_dev *rtwdev,
2081 struct ieee80211_sta *sta)
2083 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2084 struct sk_buff *skb, *tmp;
2086 skb_queue_walk_safe(&rtwsta->roc_queue, skb, tmp) {
2087 skb_unlink(skb, &rtwsta->roc_queue);
2088 dev_kfree_skb_any(skb);
2092 static void rtw89_core_stop_tx_ba_session(struct rtw89_dev *rtwdev,
2093 struct rtw89_txq *rtwtxq)
2095 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2096 struct ieee80211_sta *sta = txq->sta;
2097 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
2099 if (unlikely(!rtwsta) || unlikely(rtwsta->disassoc))
2102 if (!test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags) ||
2103 test_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
2106 spin_lock_bh(&rtwdev->ba_lock);
2107 if (!test_and_set_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
2108 list_add_tail(&rtwtxq->list, &rtwdev->forbid_ba_list);
2109 spin_unlock_bh(&rtwdev->ba_lock);
2111 ieee80211_stop_tx_ba_session(sta, txq->tid);
2112 cancel_delayed_work(&rtwdev->forbid_ba_work);
2113 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->forbid_ba_work,
2114 RTW89_FORBID_BA_TIMER);
2117 static void rtw89_core_txq_check_agg(struct rtw89_dev *rtwdev,
2118 struct rtw89_txq *rtwtxq,
2119 struct sk_buff *skb)
2121 struct ieee80211_hw *hw = rtwdev->hw;
2122 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2123 struct ieee80211_sta *sta = txq->sta;
2124 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
2126 if (test_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
2129 if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE))) {
2130 rtw89_core_stop_tx_ba_session(rtwdev, rtwtxq);
2137 if (unlikely(test_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags)))
2140 if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags)) {
2141 IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_CTL_AMPDU;
2145 spin_lock_bh(&rtwdev->ba_lock);
2146 if (!rtwsta->disassoc && list_empty(&rtwtxq->list)) {
2147 list_add_tail(&rtwtxq->list, &rtwdev->ba_list);
2148 ieee80211_queue_work(hw, &rtwdev->ba_work);
2150 spin_unlock_bh(&rtwdev->ba_lock);
2153 static void rtw89_core_txq_push(struct rtw89_dev *rtwdev,
2154 struct rtw89_txq *rtwtxq,
2155 unsigned long frame_cnt,
2156 unsigned long byte_cnt)
2158 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2159 struct ieee80211_vif *vif = txq->vif;
2160 struct ieee80211_sta *sta = txq->sta;
2161 struct sk_buff *skb;
2166 for (i = 0; i < frame_cnt; i++) {
2167 skb = ieee80211_tx_dequeue_ni(rtwdev->hw, txq);
2169 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "dequeue a NULL skb\n");
2172 rtw89_core_txq_check_agg(rtwdev, rtwtxq, skb);
2173 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, NULL);
2175 rtw89_err(rtwdev, "failed to push txq: %d\n", ret);
2176 ieee80211_free_txskb(rtwdev->hw, skb);
2184 static u32 rtw89_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 tid)
2188 qsel = rtw89_core_get_qsel(rtwdev, tid);
2189 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
2191 return rtw89_hci_check_and_reclaim_tx_resource(rtwdev, ch_dma);
2194 static bool rtw89_core_txq_agg_wait(struct rtw89_dev *rtwdev,
2195 struct ieee80211_txq *txq,
2196 unsigned long *frame_cnt,
2197 bool *sched_txq, bool *reinvoke)
2199 struct rtw89_txq *rtwtxq = (struct rtw89_txq *)txq->drv_priv;
2200 struct ieee80211_sta *sta = txq->sta;
2201 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
2203 if (!sta || rtwsta->max_agg_wait <= 0)
2206 if (rtwdev->stats.tx_tfc_lv <= RTW89_TFC_MID)
2209 if (*frame_cnt > 1) {
2213 rtwtxq->wait_cnt = 1;
2217 if (*frame_cnt == 1 && rtwtxq->wait_cnt < rtwsta->max_agg_wait) {
2223 rtwtxq->wait_cnt = 0;
2227 static void rtw89_core_txq_schedule(struct rtw89_dev *rtwdev, u8 ac, bool *reinvoke)
2229 struct ieee80211_hw *hw = rtwdev->hw;
2230 struct ieee80211_txq *txq;
2231 struct rtw89_vif *rtwvif;
2232 struct rtw89_txq *rtwtxq;
2233 unsigned long frame_cnt;
2234 unsigned long byte_cnt;
2238 ieee80211_txq_schedule_start(hw, ac);
2239 while ((txq = ieee80211_next_txq(hw, ac))) {
2240 rtwtxq = (struct rtw89_txq *)txq->drv_priv;
2241 rtwvif = (struct rtw89_vif *)txq->vif->drv_priv;
2243 if (rtwvif->offchan) {
2244 ieee80211_return_txq(hw, txq, true);
2247 tx_resource = rtw89_check_and_reclaim_tx_resource(rtwdev, txq->tid);
2250 ieee80211_txq_get_depth(txq, &frame_cnt, &byte_cnt);
2251 if (rtw89_core_txq_agg_wait(rtwdev, txq, &frame_cnt, &sched_txq, reinvoke)) {
2252 ieee80211_return_txq(hw, txq, true);
2255 frame_cnt = min_t(unsigned long, frame_cnt, tx_resource);
2256 rtw89_core_txq_push(rtwdev, rtwtxq, frame_cnt, byte_cnt);
2257 ieee80211_return_txq(hw, txq, sched_txq);
2259 rtw89_core_tx_kick_off(rtwdev, rtw89_core_get_qsel(rtwdev, txq->tid));
2261 /* bound of tx_resource could get stuck due to burst traffic */
2262 if (frame_cnt == tx_resource)
2265 ieee80211_txq_schedule_end(hw, ac);
2268 static void rtw89_ips_work(struct work_struct *work)
2270 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
2272 mutex_lock(&rtwdev->mutex);
2273 rtw89_enter_ips_by_hwflags(rtwdev);
2274 mutex_unlock(&rtwdev->mutex);
2277 static void rtw89_core_txq_work(struct work_struct *w)
2279 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, txq_work);
2280 bool reinvoke = false;
2283 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2284 rtw89_core_txq_schedule(rtwdev, ac, &reinvoke);
2287 /* reinvoke to process the last frame */
2288 mod_delayed_work(rtwdev->txq_wq, &rtwdev->txq_reinvoke_work, 1);
2292 static void rtw89_core_txq_reinvoke_work(struct work_struct *w)
2294 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev,
2295 txq_reinvoke_work.work);
2297 queue_work(rtwdev->txq_wq, &rtwdev->txq_work);
2300 static void rtw89_forbid_ba_work(struct work_struct *w)
2302 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev,
2303 forbid_ba_work.work);
2304 struct rtw89_txq *rtwtxq, *tmp;
2306 spin_lock_bh(&rtwdev->ba_lock);
2307 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->forbid_ba_list, list) {
2308 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
2309 list_del_init(&rtwtxq->list);
2311 spin_unlock_bh(&rtwdev->ba_lock);
2314 static void rtw89_core_sta_pending_tx_iter(void *data,
2315 struct ieee80211_sta *sta)
2317 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2318 struct rtw89_vif *rtwvif_target = data, *rtwvif = rtwsta->rtwvif;
2319 struct rtw89_dev *rtwdev = rtwvif->rtwdev;
2320 struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
2321 struct sk_buff *skb, *tmp;
2324 if (rtwvif->sub_entity_idx != rtwvif_target->sub_entity_idx)
2327 if (skb_queue_len(&rtwsta->roc_queue) == 0)
2330 skb_queue_walk_safe(&rtwsta->roc_queue, skb, tmp) {
2331 skb_unlink(skb, &rtwsta->roc_queue);
2333 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, &qsel);
2335 rtw89_warn(rtwdev, "pending tx failed with %d\n", ret);
2336 dev_kfree_skb_any(skb);
2338 rtw89_core_tx_kick_off(rtwdev, qsel);
2343 static void rtw89_core_handle_sta_pending_tx(struct rtw89_dev *rtwdev,
2344 struct rtw89_vif *rtwvif)
2346 ieee80211_iterate_stations_atomic(rtwdev->hw,
2347 rtw89_core_sta_pending_tx_iter,
2351 static int rtw89_core_send_nullfunc(struct rtw89_dev *rtwdev,
2352 struct rtw89_vif *rtwvif, bool qos, bool ps)
2354 struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
2355 struct ieee80211_sta *sta;
2356 struct ieee80211_hdr *hdr;
2357 struct sk_buff *skb;
2360 if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc)
2364 sta = ieee80211_find_sta(vif, vif->bss_conf.bssid);
2370 skb = ieee80211_nullfunc_get(rtwdev->hw, vif, -1, qos);
2376 hdr = (struct ieee80211_hdr *)skb->data;
2378 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
2380 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, &qsel);
2382 rtw89_warn(rtwdev, "nullfunc transmit failed: %d\n", ret);
2383 dev_kfree_skb_any(skb);
2389 return rtw89_core_tx_kick_off_and_wait(rtwdev, skb, qsel,
2390 RTW89_ROC_TX_TIMEOUT);
2397 void rtw89_roc_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
2399 struct ieee80211_hw *hw = rtwdev->hw;
2400 struct rtw89_roc *roc = &rtwvif->roc;
2401 struct cfg80211_chan_def roc_chan;
2402 struct rtw89_vif *tmp;
2405 lockdep_assert_held(&rtwdev->mutex);
2407 ieee80211_queue_delayed_work(hw, &rtwvif->roc.roc_work,
2408 msecs_to_jiffies(rtwvif->roc.duration));
2410 rtw89_leave_ips_by_hwflags(rtwdev);
2411 rtw89_leave_lps(rtwdev);
2413 ret = rtw89_core_send_nullfunc(rtwdev, rtwvif, true, true);
2415 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2416 "roc send null-1 failed: %d\n", ret);
2418 rtw89_for_each_rtwvif(rtwdev, tmp)
2419 if (tmp->sub_entity_idx == rtwvif->sub_entity_idx)
2420 tmp->offchan = true;
2422 cfg80211_chandef_create(&roc_chan, &roc->chan, NL80211_CHAN_NO_HT);
2423 rtw89_config_roc_chandef(rtwdev, rtwvif->sub_entity_idx, &roc_chan);
2424 rtw89_set_channel(rtwdev);
2425 rtw89_write32_clr(rtwdev,
2426 rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0),
2427 B_AX_A_UC_CAM_MATCH | B_AX_A_BC_CAM_MATCH);
2429 ieee80211_ready_on_channel(hw);
2432 void rtw89_roc_end(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
2434 struct ieee80211_hw *hw = rtwdev->hw;
2435 struct rtw89_roc *roc = &rtwvif->roc;
2436 struct rtw89_vif *tmp;
2439 lockdep_assert_held(&rtwdev->mutex);
2441 ieee80211_remain_on_channel_expired(hw);
2443 rtw89_leave_ips_by_hwflags(rtwdev);
2444 rtw89_leave_lps(rtwdev);
2446 rtw89_write32_mask(rtwdev,
2447 rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0),
2448 B_AX_RX_FLTR_CFG_MASK,
2449 rtwdev->hal.rx_fltr);
2451 roc->state = RTW89_ROC_IDLE;
2452 rtw89_config_roc_chandef(rtwdev, rtwvif->sub_entity_idx, NULL);
2453 rtw89_set_channel(rtwdev);
2454 ret = rtw89_core_send_nullfunc(rtwdev, rtwvif, true, false);
2456 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2457 "roc send null-0 failed: %d\n", ret);
2459 rtw89_for_each_rtwvif(rtwdev, tmp)
2460 if (tmp->sub_entity_idx == rtwvif->sub_entity_idx)
2461 tmp->offchan = false;
2463 rtw89_core_handle_sta_pending_tx(rtwdev, rtwvif);
2464 queue_work(rtwdev->txq_wq, &rtwdev->txq_work);
2466 if (hw->conf.flags & IEEE80211_CONF_IDLE)
2467 ieee80211_queue_delayed_work(hw, &roc->roc_work,
2468 RTW89_ROC_IDLE_TIMEOUT);
2471 void rtw89_roc_work(struct work_struct *work)
2473 struct rtw89_vif *rtwvif = container_of(work, struct rtw89_vif,
2475 struct rtw89_dev *rtwdev = rtwvif->rtwdev;
2476 struct rtw89_roc *roc = &rtwvif->roc;
2478 mutex_lock(&rtwdev->mutex);
2480 switch (roc->state) {
2481 case RTW89_ROC_IDLE:
2482 rtw89_enter_ips_by_hwflags(rtwdev);
2484 case RTW89_ROC_MGMT:
2485 case RTW89_ROC_NORMAL:
2486 rtw89_roc_end(rtwdev, rtwvif);
2492 mutex_unlock(&rtwdev->mutex);
2495 static enum rtw89_tfc_lv rtw89_get_traffic_level(struct rtw89_dev *rtwdev,
2496 u32 throughput, u64 cnt)
2499 return RTW89_TFC_IDLE;
2500 if (throughput > 50)
2501 return RTW89_TFC_HIGH;
2502 if (throughput > 10)
2503 return RTW89_TFC_MID;
2505 return RTW89_TFC_LOW;
2506 return RTW89_TFC_ULTRA_LOW;
2509 static bool rtw89_traffic_stats_calc(struct rtw89_dev *rtwdev,
2510 struct rtw89_traffic_stats *stats)
2512 enum rtw89_tfc_lv tx_tfc_lv = stats->tx_tfc_lv;
2513 enum rtw89_tfc_lv rx_tfc_lv = stats->rx_tfc_lv;
2515 stats->tx_throughput_raw = (u32)(stats->tx_unicast >> RTW89_TP_SHIFT);
2516 stats->rx_throughput_raw = (u32)(stats->rx_unicast >> RTW89_TP_SHIFT);
2518 ewma_tp_add(&stats->tx_ewma_tp, stats->tx_throughput_raw);
2519 ewma_tp_add(&stats->rx_ewma_tp, stats->rx_throughput_raw);
2521 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
2522 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
2523 stats->tx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->tx_throughput,
2525 stats->rx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->rx_throughput,
2527 stats->tx_avg_len = stats->tx_cnt ?
2528 DIV_ROUND_DOWN_ULL(stats->tx_unicast, stats->tx_cnt) : 0;
2529 stats->rx_avg_len = stats->rx_cnt ?
2530 DIV_ROUND_DOWN_ULL(stats->rx_unicast, stats->rx_cnt) : 0;
2532 stats->tx_unicast = 0;
2533 stats->rx_unicast = 0;
2536 stats->rx_tf_periodic = stats->rx_tf_acc;
2537 stats->rx_tf_acc = 0;
2539 if (tx_tfc_lv != stats->tx_tfc_lv || rx_tfc_lv != stats->rx_tfc_lv)
2545 static bool rtw89_traffic_stats_track(struct rtw89_dev *rtwdev)
2547 struct rtw89_vif *rtwvif;
2550 tfc_changed = rtw89_traffic_stats_calc(rtwdev, &rtwdev->stats);
2551 rtw89_for_each_rtwvif(rtwdev, rtwvif) {
2552 rtw89_traffic_stats_calc(rtwdev, &rtwvif->stats);
2553 rtw89_fw_h2c_tp_offload(rtwdev, rtwvif);
2559 static void rtw89_vif_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
2561 if ((rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION &&
2562 rtwvif->wifi_role != RTW89_WIFI_ROLE_P2P_CLIENT) ||
2566 if (rtwdev->total_sta_assoc > 1)
2569 if (rtwvif->offchan)
2572 if (rtwvif->stats.tx_tfc_lv == RTW89_TFC_IDLE &&
2573 rtwvif->stats.rx_tfc_lv == RTW89_TFC_IDLE)
2574 rtw89_enter_lps(rtwdev, rtwvif, true);
2577 static void rtw89_enter_lps_track(struct rtw89_dev *rtwdev)
2579 struct rtw89_vif *rtwvif;
2581 rtw89_for_each_rtwvif(rtwdev, rtwvif)
2582 rtw89_vif_enter_lps(rtwdev, rtwvif);
2585 void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev,
2586 struct rtw89_traffic_stats *stats)
2588 stats->tx_unicast = 0;
2589 stats->rx_unicast = 0;
2592 ewma_tp_init(&stats->tx_ewma_tp);
2593 ewma_tp_init(&stats->rx_ewma_tp);
2596 static void rtw89_track_work(struct work_struct *work)
2598 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
2602 if (test_bit(RTW89_FLAG_FORBIDDEN_TRACK_WROK, rtwdev->flags))
2605 mutex_lock(&rtwdev->mutex);
2607 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
2610 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work,
2611 RTW89_TRACK_WORK_PERIOD);
2613 tfc_changed = rtw89_traffic_stats_track(rtwdev);
2614 if (rtwdev->scanning)
2617 rtw89_leave_lps(rtwdev);
2620 rtw89_hci_recalc_int_mit(rtwdev);
2621 rtw89_btc_ntfy_wl_sta(rtwdev);
2623 rtw89_mac_bf_monitor_track(rtwdev);
2624 rtw89_phy_stat_track(rtwdev);
2625 rtw89_phy_env_monitor_track(rtwdev);
2626 rtw89_phy_dig(rtwdev);
2627 rtw89_chip_rfk_track(rtwdev);
2628 rtw89_phy_ra_update(rtwdev);
2629 rtw89_phy_cfo_track(rtwdev);
2630 rtw89_phy_tx_path_div_track(rtwdev);
2631 rtw89_phy_ul_tb_ctrl_track(rtwdev);
2633 if (rtwdev->lps_enabled && !rtwdev->btc.lps)
2634 rtw89_enter_lps_track(rtwdev);
2637 mutex_unlock(&rtwdev->mutex);
2640 u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size)
2644 bit = find_first_zero_bit(addr, size);
2651 void rtw89_core_release_bit_map(unsigned long *addr, u8 bit)
2653 clear_bit(bit, addr);
2656 void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits)
2658 bitmap_zero(addr, nbits);
2661 int rtw89_core_acquire_sta_ba_entry(struct rtw89_dev *rtwdev,
2662 struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx)
2664 const struct rtw89_chip_info *chip = rtwdev->chip;
2665 struct rtw89_cam_info *cam_info = &rtwdev->cam_info;
2666 struct rtw89_ba_cam_entry *entry = NULL, *tmp;
2670 lockdep_assert_held(&rtwdev->mutex);
2672 idx = rtw89_core_acquire_bit_map(cam_info->ba_cam_map, chip->bacam_num);
2673 if (idx == chip->bacam_num) {
2674 /* allocate a static BA CAM to tid=0/5, so replace the existing
2675 * one if BA CAM is full. Hardware will process the original tid
2678 if (tid != 0 && tid != 5)
2681 for_each_set_bit(i, cam_info->ba_cam_map, chip->bacam_num) {
2682 tmp = &cam_info->ba_cam_entry[i];
2683 if (tmp->tid == 0 || tmp->tid == 5)
2688 list_del(&entry->list);
2695 entry = &cam_info->ba_cam_entry[idx];
2699 list_add_tail(&entry->list, &rtwsta->ba_cam_list);
2706 int rtw89_core_release_sta_ba_entry(struct rtw89_dev *rtwdev,
2707 struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx)
2709 struct rtw89_cam_info *cam_info = &rtwdev->cam_info;
2710 struct rtw89_ba_cam_entry *entry = NULL, *tmp;
2713 lockdep_assert_held(&rtwdev->mutex);
2715 list_for_each_entry_safe(entry, tmp, &rtwsta->ba_cam_list, list) {
2716 if (entry->tid != tid)
2719 idx = entry - cam_info->ba_cam_entry;
2720 list_del(&entry->list);
2722 rtw89_core_release_bit_map(cam_info->ba_cam_map, idx);
2730 #define RTW89_TYPE_MAPPING(_type) \
2731 case NL80211_IFTYPE_ ## _type: \
2732 rtwvif->wifi_role = RTW89_WIFI_ROLE_ ## _type; \
2734 void rtw89_vif_type_mapping(struct ieee80211_vif *vif, bool assoc)
2736 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2738 switch (vif->type) {
2739 case NL80211_IFTYPE_STATION:
2741 rtwvif->wifi_role = RTW89_WIFI_ROLE_P2P_CLIENT;
2743 rtwvif->wifi_role = RTW89_WIFI_ROLE_STATION;
2745 case NL80211_IFTYPE_AP:
2747 rtwvif->wifi_role = RTW89_WIFI_ROLE_P2P_GO;
2749 rtwvif->wifi_role = RTW89_WIFI_ROLE_AP;
2751 RTW89_TYPE_MAPPING(ADHOC);
2752 RTW89_TYPE_MAPPING(MONITOR);
2753 RTW89_TYPE_MAPPING(MESH_POINT);
2759 switch (vif->type) {
2760 case NL80211_IFTYPE_AP:
2761 case NL80211_IFTYPE_MESH_POINT:
2762 rtwvif->net_type = RTW89_NET_TYPE_AP_MODE;
2763 rtwvif->self_role = RTW89_SELF_ROLE_AP;
2765 case NL80211_IFTYPE_ADHOC:
2766 rtwvif->net_type = RTW89_NET_TYPE_AD_HOC;
2767 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT;
2769 case NL80211_IFTYPE_STATION:
2771 rtwvif->net_type = RTW89_NET_TYPE_INFRA;
2772 rtwvif->trigger = vif->bss_conf.he_support;
2774 rtwvif->net_type = RTW89_NET_TYPE_NO_LINK;
2775 rtwvif->trigger = false;
2777 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT;
2778 rtwvif->addr_cam.sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL;
2780 case NL80211_IFTYPE_MONITOR:
2788 int rtw89_core_sta_add(struct rtw89_dev *rtwdev,
2789 struct ieee80211_vif *vif,
2790 struct ieee80211_sta *sta)
2792 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2793 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2794 struct rtw89_hal *hal = &rtwdev->hal;
2795 u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num;
2799 rtwsta->rtwdev = rtwdev;
2800 rtwsta->rtwvif = rtwvif;
2801 rtwsta->prev_rssi = 0;
2802 INIT_LIST_HEAD(&rtwsta->ba_cam_list);
2803 skb_queue_head_init(&rtwsta->roc_queue);
2805 for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
2806 rtw89_core_txq_init(rtwdev, sta->txq[i]);
2808 ewma_rssi_init(&rtwsta->avg_rssi);
2809 ewma_snr_init(&rtwsta->avg_snr);
2810 for (i = 0; i < ant_num; i++) {
2811 ewma_rssi_init(&rtwsta->rssi[i]);
2812 ewma_evm_init(&rtwsta->evm_min[i]);
2813 ewma_evm_init(&rtwsta->evm_max[i]);
2816 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
2817 /* for station mode, assign the mac_id from itself */
2818 rtwsta->mac_id = rtwvif->mac_id;
2819 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
2820 BTC_ROLE_MSTS_STA_CONN_START);
2821 rtw89_chip_rfk_channel(rtwdev);
2822 } else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
2823 rtwsta->mac_id = rtw89_core_acquire_bit_map(rtwdev->mac_id_map,
2824 RTW89_MAX_MAC_ID_NUM);
2825 if (rtwsta->mac_id == RTW89_MAX_MAC_ID_NUM)
2828 ret = rtw89_mac_set_macid_pause(rtwdev, rtwsta->mac_id, false);
2830 rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id);
2831 rtw89_warn(rtwdev, "failed to send h2c macid pause\n");
2835 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta,
2838 rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id);
2839 rtw89_warn(rtwdev, "failed to send h2c role info\n");
2847 int rtw89_core_sta_disassoc(struct rtw89_dev *rtwdev,
2848 struct ieee80211_vif *vif,
2849 struct ieee80211_sta *sta)
2851 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2852 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2854 if (vif->type == NL80211_IFTYPE_STATION)
2855 rtw89_fw_h2c_set_bcn_fltr_cfg(rtwdev, vif, false);
2857 rtwdev->total_sta_assoc--;
2859 rtwvif->tdls_peer--;
2860 rtwsta->disassoc = true;
2865 int rtw89_core_sta_disconnect(struct rtw89_dev *rtwdev,
2866 struct ieee80211_vif *vif,
2867 struct ieee80211_sta *sta)
2869 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2870 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2873 rtw89_mac_bf_monitor_calc(rtwdev, sta, true);
2874 rtw89_mac_bf_disassoc(rtwdev, vif, sta);
2875 rtw89_core_free_sta_pending_ba(rtwdev, sta);
2876 rtw89_core_free_sta_pending_forbid_ba(rtwdev, sta);
2877 rtw89_core_free_sta_pending_roc_tx(rtwdev, sta);
2879 if (vif->type == NL80211_IFTYPE_AP || sta->tdls)
2880 rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta->addr_cam);
2882 rtw89_cam_deinit_bssid_cam(rtwdev, &rtwsta->bssid_cam);
2884 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
2885 rtw89_vif_type_mapping(vif, false);
2886 rtw89_fw_release_general_pkt_list_vif(rtwdev, rtwvif, true);
2889 ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta);
2891 rtw89_warn(rtwdev, "failed to send h2c cmac table\n");
2895 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, true);
2897 rtw89_warn(rtwdev, "failed to send h2c join info\n");
2901 /* update cam aid mac_id net_type */
2902 ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL);
2904 rtw89_warn(rtwdev, "failed to send h2c cam\n");
2911 int rtw89_core_sta_assoc(struct rtw89_dev *rtwdev,
2912 struct ieee80211_vif *vif,
2913 struct ieee80211_sta *sta)
2915 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2916 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2917 struct rtw89_bssid_cam_entry *bssid_cam = rtw89_get_bssid_cam_of(rtwvif, rtwsta);
2920 if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
2922 ret = rtw89_cam_init_bssid_cam(rtwdev, rtwvif, bssid_cam, sta->addr);
2924 rtw89_warn(rtwdev, "failed to send h2c init bssid cam for TDLS\n");
2929 ret = rtw89_cam_init_addr_cam(rtwdev, &rtwsta->addr_cam, bssid_cam);
2931 rtw89_warn(rtwdev, "failed to send h2c init addr cam\n");
2936 ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta);
2938 rtw89_warn(rtwdev, "failed to send h2c cmac table\n");
2942 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, false);
2944 rtw89_warn(rtwdev, "failed to send h2c join info\n");
2948 /* update cam aid mac_id net_type */
2949 ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL);
2951 rtw89_warn(rtwdev, "failed to send h2c cam\n");
2955 rtwdev->total_sta_assoc++;
2957 rtwvif->tdls_peer++;
2958 rtw89_phy_ra_assoc(rtwdev, sta);
2959 rtw89_mac_bf_assoc(rtwdev, vif, sta);
2960 rtw89_mac_bf_monitor_calc(rtwdev, sta, false);
2962 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
2963 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2965 if (bss_conf->he_support &&
2966 !(bss_conf->he_oper.params & IEEE80211_HE_OPERATION_ER_SU_DISABLE))
2967 rtwsta->er_cap = true;
2969 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
2970 BTC_ROLE_MSTS_STA_CONN_END);
2971 rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template);
2972 rtw89_phy_ul_tb_assoc(rtwdev, rtwvif);
2974 ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwvif, rtwsta->mac_id);
2976 rtw89_warn(rtwdev, "failed to send h2c general packet\n");
2984 int rtw89_core_sta_remove(struct rtw89_dev *rtwdev,
2985 struct ieee80211_vif *vif,
2986 struct ieee80211_sta *sta)
2988 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2989 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2992 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls)
2993 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
2994 BTC_ROLE_MSTS_STA_DIS_CONN);
2995 else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
2996 rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id);
2998 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta,
3001 rtw89_warn(rtwdev, "failed to send h2c role info\n");
3009 static void _rtw89_core_set_tid_config(struct rtw89_dev *rtwdev,
3010 struct ieee80211_sta *sta,
3011 struct cfg80211_tid_cfg *tid_conf)
3013 struct ieee80211_txq *txq;
3014 struct rtw89_txq *rtwtxq;
3015 u32 mask = tid_conf->mask;
3016 u8 tids = tid_conf->tids;
3017 int tids_nbit = BITS_PER_BYTE;
3020 for (i = 0; i < tids_nbit; i++, tids >>= 1) {
3024 if (!(tids & BIT(0)))
3028 rtwtxq = (struct rtw89_txq *)txq->drv_priv;
3030 if (mask & BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL)) {
3031 if (tid_conf->ampdu == NL80211_TID_CONFIG_ENABLE) {
3032 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
3034 if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags))
3035 ieee80211_stop_tx_ba_session(sta, txq->tid);
3036 spin_lock_bh(&rtwdev->ba_lock);
3037 list_del_init(&rtwtxq->list);
3038 set_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
3039 spin_unlock_bh(&rtwdev->ba_lock);
3043 if (mask & BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL) && tids == 0xff) {
3044 if (tid_conf->amsdu == NL80211_TID_CONFIG_ENABLE)
3045 sta->max_amsdu_subframes = 0;
3047 sta->max_amsdu_subframes = 1;
3052 void rtw89_core_set_tid_config(struct rtw89_dev *rtwdev,
3053 struct ieee80211_sta *sta,
3054 struct cfg80211_tid_config *tid_config)
3058 for (i = 0; i < tid_config->n_tid_conf; i++)
3059 _rtw89_core_set_tid_config(rtwdev, sta,
3060 &tid_config->tid_conf[i]);
3063 static void rtw89_init_ht_cap(struct rtw89_dev *rtwdev,
3064 struct ieee80211_sta_ht_cap *ht_cap)
3066 static const __le16 highest[RF_PATH_MAX] = {
3067 cpu_to_le16(150), cpu_to_le16(300), cpu_to_le16(450), cpu_to_le16(600),
3069 struct rtw89_hal *hal = &rtwdev->hal;
3070 u8 nss = hal->rx_nss;
3073 ht_cap->ht_supported = true;
3075 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
3076 IEEE80211_HT_CAP_MAX_AMSDU |
3077 IEEE80211_HT_CAP_TX_STBC |
3078 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
3079 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
3080 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
3081 IEEE80211_HT_CAP_DSSSCCK40 |
3082 IEEE80211_HT_CAP_SGI_40;
3083 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
3084 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
3085 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
3086 for (i = 0; i < nss; i++)
3087 ht_cap->mcs.rx_mask[i] = 0xFF;
3088 ht_cap->mcs.rx_mask[4] = 0x01;
3089 ht_cap->mcs.rx_highest = highest[nss - 1];
3092 static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev,
3093 struct ieee80211_sta_vht_cap *vht_cap)
3095 static const __le16 highest_bw80[RF_PATH_MAX] = {
3096 cpu_to_le16(433), cpu_to_le16(867), cpu_to_le16(1300), cpu_to_le16(1733),
3098 static const __le16 highest_bw160[RF_PATH_MAX] = {
3099 cpu_to_le16(867), cpu_to_le16(1733), cpu_to_le16(2600), cpu_to_le16(3467),
3101 const struct rtw89_chip_info *chip = rtwdev->chip;
3102 const __le16 *highest = chip->support_bw160 ? highest_bw160 : highest_bw80;
3103 struct rtw89_hal *hal = &rtwdev->hal;
3104 u16 tx_mcs_map = 0, rx_mcs_map = 0;
3108 for (i = 0; i < 8; i++) {
3109 if (i < hal->tx_nss)
3110 tx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
3112 tx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
3113 if (i < hal->rx_nss)
3114 rx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
3116 rx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
3119 vht_cap->vht_supported = true;
3120 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
3121 IEEE80211_VHT_CAP_SHORT_GI_80 |
3122 IEEE80211_VHT_CAP_RXSTBC_1 |
3123 IEEE80211_VHT_CAP_HTC_VHT |
3124 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
3126 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
3127 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
3128 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
3129 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
3130 vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT;
3131 if (chip->support_bw160)
3132 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
3133 IEEE80211_VHT_CAP_SHORT_GI_160;
3134 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map);
3135 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(tx_mcs_map);
3136 vht_cap->vht_mcs.rx_highest = highest[hal->rx_nss - 1];
3137 vht_cap->vht_mcs.tx_highest = highest[hal->tx_nss - 1];
3140 #define RTW89_SBAND_IFTYPES_NR 2
3142 static void rtw89_init_he_cap(struct rtw89_dev *rtwdev,
3143 enum nl80211_band band,
3144 struct ieee80211_supported_band *sband)
3146 const struct rtw89_chip_info *chip = rtwdev->chip;
3147 struct rtw89_hal *hal = &rtwdev->hal;
3148 struct ieee80211_sband_iftype_data *iftype_data;
3149 bool no_ng16 = (chip->chip_id == RTL8852A && hal->cv == CHIP_CBV) ||
3150 (chip->chip_id == RTL8852B && hal->cv == CHIP_CAV);
3153 int nss = hal->rx_nss;
3156 iftype_data = kcalloc(RTW89_SBAND_IFTYPES_NR, sizeof(*iftype_data), GFP_KERNEL);
3160 for (i = 0; i < 8; i++) {
3162 mcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2);
3164 mcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2);
3167 for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
3168 struct ieee80211_sta_he_cap *he_cap;
3173 case NL80211_IFTYPE_STATION:
3174 case NL80211_IFTYPE_AP:
3180 if (idx >= RTW89_SBAND_IFTYPES_NR) {
3181 rtw89_warn(rtwdev, "run out of iftype_data\n");
3185 iftype_data[idx].types_mask = BIT(i);
3186 he_cap = &iftype_data[idx].he_cap;
3187 mac_cap_info = he_cap->he_cap_elem.mac_cap_info;
3188 phy_cap_info = he_cap->he_cap_elem.phy_cap_info;
3190 he_cap->has_he = true;
3191 mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE;
3192 if (i == NL80211_IFTYPE_STATION)
3193 mac_cap_info[1] = IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
3194 mac_cap_info[2] = IEEE80211_HE_MAC_CAP2_ALL_ACK |
3195 IEEE80211_HE_MAC_CAP2_BSR;
3196 mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2;
3197 if (i == NL80211_IFTYPE_AP)
3198 mac_cap_info[3] |= IEEE80211_HE_MAC_CAP3_OMI_CONTROL;
3199 mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_OPS |
3200 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
3201 if (i == NL80211_IFTYPE_STATION)
3202 mac_cap_info[5] = IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX;
3203 if (band == NL80211_BAND_2GHZ) {
3205 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
3208 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G;
3209 if (chip->support_bw160)
3210 phy_cap_info[0] |= IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
3212 phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
3213 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD |
3214 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
3215 phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
3216 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
3217 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |
3218 IEEE80211_HE_PHY_CAP2_DOPPLER_TX;
3219 phy_cap_info[3] = IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_16_QAM;
3220 if (i == NL80211_IFTYPE_STATION)
3221 phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_16_QAM |
3222 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_2;
3223 if (i == NL80211_IFTYPE_AP)
3224 phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_RX_PARTIAL_BW_SU_IN_20MHZ_MU;
3225 phy_cap_info[4] = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
3226 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4;
3227 if (chip->support_bw160)
3228 phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
3229 phy_cap_info[5] = no_ng16 ? 0 :
3230 IEEE80211_HE_PHY_CAP5_NG16_SU_FEEDBACK |
3231 IEEE80211_HE_PHY_CAP5_NG16_MU_FEEDBACK;
3232 phy_cap_info[6] = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
3233 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU |
3234 IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
3235 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE;
3236 phy_cap_info[7] = IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
3237 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI |
3238 IEEE80211_HE_PHY_CAP7_MAX_NC_1;
3239 phy_cap_info[8] = IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
3240 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI |
3241 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_996;
3242 if (chip->support_bw160)
3243 phy_cap_info[8] |= IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
3244 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU;
3245 phy_cap_info[9] = IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
3246 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
3247 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
3248 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB |
3249 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
3250 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
3251 if (i == NL80211_IFTYPE_STATION)
3252 phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU;
3253 he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map);
3254 he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map);
3255 if (chip->support_bw160) {
3256 he_cap->he_mcs_nss_supp.rx_mcs_160 = cpu_to_le16(mcs_map);
3257 he_cap->he_mcs_nss_supp.tx_mcs_160 = cpu_to_le16(mcs_map);
3260 if (band == NL80211_BAND_6GHZ) {
3263 capa = le16_encode_bits(IEEE80211_HT_MPDU_DENSITY_NONE,
3264 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
3265 le16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
3266 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
3267 le16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
3268 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
3269 iftype_data[idx].he_6ghz_capa.capa = capa;
3275 sband->iftype_data = iftype_data;
3276 sband->n_iftype_data = idx;
3279 static int rtw89_core_set_supported_band(struct rtw89_dev *rtwdev)
3281 struct ieee80211_hw *hw = rtwdev->hw;
3282 struct ieee80211_supported_band *sband_2ghz = NULL, *sband_5ghz = NULL;
3283 struct ieee80211_supported_band *sband_6ghz = NULL;
3284 u32 size = sizeof(struct ieee80211_supported_band);
3285 u8 support_bands = rtwdev->chip->support_bands;
3287 if (support_bands & BIT(NL80211_BAND_2GHZ)) {
3288 sband_2ghz = kmemdup(&rtw89_sband_2ghz, size, GFP_KERNEL);
3291 rtw89_init_ht_cap(rtwdev, &sband_2ghz->ht_cap);
3292 rtw89_init_he_cap(rtwdev, NL80211_BAND_2GHZ, sband_2ghz);
3293 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband_2ghz;
3296 if (support_bands & BIT(NL80211_BAND_5GHZ)) {
3297 sband_5ghz = kmemdup(&rtw89_sband_5ghz, size, GFP_KERNEL);
3300 rtw89_init_ht_cap(rtwdev, &sband_5ghz->ht_cap);
3301 rtw89_init_vht_cap(rtwdev, &sband_5ghz->vht_cap);
3302 rtw89_init_he_cap(rtwdev, NL80211_BAND_5GHZ, sband_5ghz);
3303 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband_5ghz;
3306 if (support_bands & BIT(NL80211_BAND_6GHZ)) {
3307 sband_6ghz = kmemdup(&rtw89_sband_6ghz, size, GFP_KERNEL);
3310 rtw89_init_he_cap(rtwdev, NL80211_BAND_6GHZ, sband_6ghz);
3311 hw->wiphy->bands[NL80211_BAND_6GHZ] = sband_6ghz;
3317 hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
3318 hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
3319 hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL;
3321 kfree(sband_2ghz->iftype_data);
3323 kfree(sband_5ghz->iftype_data);
3325 kfree(sband_6ghz->iftype_data);
3332 static void rtw89_core_clr_supported_band(struct rtw89_dev *rtwdev)
3334 struct ieee80211_hw *hw = rtwdev->hw;
3336 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data);
3337 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data);
3338 if (hw->wiphy->bands[NL80211_BAND_6GHZ])
3339 kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]->iftype_data);
3340 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
3341 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
3342 kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]);
3343 hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
3344 hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
3345 hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL;
3348 static void rtw89_core_ppdu_sts_init(struct rtw89_dev *rtwdev)
3352 for (i = 0; i < RTW89_PHY_MAX; i++)
3353 skb_queue_head_init(&rtwdev->ppdu_sts.rx_queue[i]);
3354 for (i = 0; i < RTW89_PHY_MAX; i++)
3355 rtwdev->ppdu_sts.curr_rx_ppdu_cnt[i] = U8_MAX;
3358 void rtw89_core_update_beacon_work(struct work_struct *work)
3360 struct rtw89_dev *rtwdev;
3361 struct rtw89_vif *rtwvif = container_of(work, struct rtw89_vif,
3362 update_beacon_work);
3364 if (rtwvif->net_type != RTW89_NET_TYPE_AP_MODE)
3367 rtwdev = rtwvif->rtwdev;
3368 mutex_lock(&rtwdev->mutex);
3369 rtw89_fw_h2c_update_beacon(rtwdev, rtwvif);
3370 mutex_unlock(&rtwdev->mutex);
3373 int rtw89_wait_for_cond(struct rtw89_wait_info *wait, unsigned int cond)
3375 struct completion *cmpl = &wait->completion;
3376 unsigned long timeout;
3379 cur = atomic_cmpxchg(&wait->cond, RTW89_WAIT_COND_IDLE, cond);
3380 if (cur != RTW89_WAIT_COND_IDLE)
3383 timeout = wait_for_completion_timeout(cmpl, RTW89_WAIT_FOR_COND_TIMEOUT);
3385 atomic_set(&wait->cond, RTW89_WAIT_COND_IDLE);
3395 void rtw89_complete_cond(struct rtw89_wait_info *wait, unsigned int cond,
3396 const struct rtw89_completion_data *data)
3400 cur = atomic_cmpxchg(&wait->cond, cond, RTW89_WAIT_COND_IDLE);
3405 complete(&wait->completion);
3408 int rtw89_core_start(struct rtw89_dev *rtwdev)
3412 rtwdev->mac.qta_mode = RTW89_QTA_SCC;
3413 ret = rtw89_mac_init(rtwdev);
3415 rtw89_err(rtwdev, "mac init fail, ret:%d\n", ret);
3419 rtw89_btc_ntfy_poweron(rtwdev);
3423 /* pre-config BB/RF, BB reset/RFC reset */
3424 ret = rtw89_chip_disable_bb_rf(rtwdev);
3427 ret = rtw89_chip_enable_bb_rf(rtwdev);
3431 rtw89_phy_init_bb_reg(rtwdev);
3432 rtw89_phy_init_rf_reg(rtwdev, false);
3434 rtw89_btc_ntfy_init(rtwdev, BTC_MODE_NORMAL);
3436 rtw89_phy_dm_init(rtwdev);
3438 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true);
3439 rtw89_mac_update_rts_threshold(rtwdev, RTW89_MAC_0);
3441 ret = rtw89_hci_start(rtwdev);
3443 rtw89_err(rtwdev, "failed to start hci\n");
3447 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work,
3448 RTW89_TRACK_WORK_PERIOD);
3450 set_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
3452 rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_ON);
3453 rtw89_fw_h2c_fw_log(rtwdev, rtwdev->fw.fw_log_enable);
3454 rtw89_fw_h2c_init_ba_cam(rtwdev);
3459 void rtw89_core_stop(struct rtw89_dev *rtwdev)
3461 struct rtw89_btc *btc = &rtwdev->btc;
3463 /* Prvent to stop twice; enter_ips and ops_stop */
3464 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
3467 rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_OFF);
3469 clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
3471 mutex_unlock(&rtwdev->mutex);
3473 cancel_work_sync(&rtwdev->c2h_work);
3474 cancel_work_sync(&btc->eapol_notify_work);
3475 cancel_work_sync(&btc->arp_notify_work);
3476 cancel_work_sync(&btc->dhcp_notify_work);
3477 cancel_work_sync(&btc->icmp_notify_work);
3478 cancel_delayed_work_sync(&rtwdev->txq_reinvoke_work);
3479 cancel_delayed_work_sync(&rtwdev->track_work);
3480 cancel_delayed_work_sync(&rtwdev->coex_act1_work);
3481 cancel_delayed_work_sync(&rtwdev->coex_bt_devinfo_work);
3482 cancel_delayed_work_sync(&rtwdev->coex_rfk_chk_work);
3483 cancel_delayed_work_sync(&rtwdev->cfo_track_work);
3484 cancel_delayed_work_sync(&rtwdev->forbid_ba_work);
3486 mutex_lock(&rtwdev->mutex);
3488 rtw89_btc_ntfy_poweroff(rtwdev);
3489 rtw89_hci_flush_queues(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
3490 rtw89_mac_flush_txq(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
3491 rtw89_hci_stop(rtwdev);
3492 rtw89_hci_deinit(rtwdev);
3493 rtw89_mac_pwr_off(rtwdev);
3494 rtw89_hci_reset(rtwdev);
3497 int rtw89_core_init(struct rtw89_dev *rtwdev)
3499 struct rtw89_btc *btc = &rtwdev->btc;
3502 INIT_LIST_HEAD(&rtwdev->ba_list);
3503 INIT_LIST_HEAD(&rtwdev->forbid_ba_list);
3504 INIT_LIST_HEAD(&rtwdev->rtwvifs_list);
3505 INIT_LIST_HEAD(&rtwdev->early_h2c_list);
3506 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
3507 if (!(rtwdev->chip->support_bands & BIT(band)))
3509 INIT_LIST_HEAD(&rtwdev->scan_info.pkt_list[band]);
3511 INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work);
3512 INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work);
3513 INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work);
3514 INIT_DELAYED_WORK(&rtwdev->track_work, rtw89_track_work);
3515 INIT_DELAYED_WORK(&rtwdev->coex_act1_work, rtw89_coex_act1_work);
3516 INIT_DELAYED_WORK(&rtwdev->coex_bt_devinfo_work, rtw89_coex_bt_devinfo_work);
3517 INIT_DELAYED_WORK(&rtwdev->coex_rfk_chk_work, rtw89_coex_rfk_chk_work);
3518 INIT_DELAYED_WORK(&rtwdev->cfo_track_work, rtw89_phy_cfo_track_work);
3519 INIT_DELAYED_WORK(&rtwdev->forbid_ba_work, rtw89_forbid_ba_work);
3520 rtwdev->txq_wq = alloc_workqueue("rtw89_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
3521 if (!rtwdev->txq_wq)
3523 spin_lock_init(&rtwdev->ba_lock);
3524 spin_lock_init(&rtwdev->rpwm_lock);
3525 mutex_init(&rtwdev->mutex);
3526 mutex_init(&rtwdev->rf_mutex);
3527 rtwdev->total_sta_assoc = 0;
3529 rtw89_init_wait(&rtwdev->mcc.wait);
3531 INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work);
3532 INIT_WORK(&rtwdev->ips_work, rtw89_ips_work);
3533 INIT_WORK(&rtwdev->load_firmware_work, rtw89_load_firmware_work);
3535 skb_queue_head_init(&rtwdev->c2h_queue);
3536 rtw89_core_ppdu_sts_init(rtwdev);
3537 rtw89_traffic_stats_init(rtwdev, &rtwdev->stats);
3539 rtwdev->hal.rx_fltr = DEFAULT_AX_RX_FLTR;
3541 INIT_WORK(&btc->eapol_notify_work, rtw89_btc_ntfy_eapol_packet_work);
3542 INIT_WORK(&btc->arp_notify_work, rtw89_btc_ntfy_arp_packet_work);
3543 INIT_WORK(&btc->dhcp_notify_work, rtw89_btc_ntfy_dhcp_packet_work);
3544 INIT_WORK(&btc->icmp_notify_work, rtw89_btc_ntfy_icmp_packet_work);
3546 init_completion(&rtwdev->fw.req.completion);
3548 schedule_work(&rtwdev->load_firmware_work);
3550 rtw89_ser_init(rtwdev);
3551 rtw89_entity_init(rtwdev);
3555 EXPORT_SYMBOL(rtw89_core_init);
3557 void rtw89_core_deinit(struct rtw89_dev *rtwdev)
3559 rtw89_ser_deinit(rtwdev);
3560 rtw89_unload_firmware(rtwdev);
3561 rtw89_fw_free_all_early_h2c(rtwdev);
3563 destroy_workqueue(rtwdev->txq_wq);
3564 mutex_destroy(&rtwdev->rf_mutex);
3565 mutex_destroy(&rtwdev->mutex);
3567 EXPORT_SYMBOL(rtw89_core_deinit);
3569 void rtw89_core_scan_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
3570 const u8 *mac_addr, bool hw_scan)
3572 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
3574 rtwdev->scanning = true;
3575 rtw89_leave_lps(rtwdev);
3577 rtw89_leave_ips_by_hwflags(rtwdev);
3579 ether_addr_copy(rtwvif->mac_addr, mac_addr);
3580 rtw89_btc_ntfy_scan_start(rtwdev, RTW89_PHY_0, chan->band_type);
3581 rtw89_chip_rfk_scan(rtwdev, true);
3582 rtw89_hci_recalc_int_mit(rtwdev);
3583 rtw89_phy_config_edcca(rtwdev, true);
3585 rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, mac_addr);
3588 void rtw89_core_scan_complete(struct rtw89_dev *rtwdev,
3589 struct ieee80211_vif *vif, bool hw_scan)
3591 struct rtw89_vif *rtwvif = vif ? (struct rtw89_vif *)vif->drv_priv : NULL;
3596 ether_addr_copy(rtwvif->mac_addr, vif->addr);
3597 rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, NULL);
3599 rtw89_chip_rfk_scan(rtwdev, false);
3600 rtw89_btc_ntfy_scan_finish(rtwdev, RTW89_PHY_0);
3601 rtw89_phy_config_edcca(rtwdev, false);
3603 rtwdev->scanning = false;
3604 rtwdev->dig.bypass_dig = true;
3605 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
3606 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work);
3609 static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev)
3611 const struct rtw89_chip_info *chip = rtwdev->chip;
3616 cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK);
3617 if (chip->chip_id == RTL8852A && cv <= CHIP_CBV) {
3618 if (rtw89_read32(rtwdev, R_AX_GPIO0_7_FUNC_SEL) == RTW89_R32_DEAD)
3624 rtwdev->hal.cv = cv;
3626 if (chip->chip_id == RTL8852B || chip->chip_id == RTL8851B) {
3627 ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_CV, &val);
3631 rtwdev->hal.acv = u8_get_bits(val, XTAL_SI_ACV_MASK);
3635 static void rtw89_core_setup_phycap(struct rtw89_dev *rtwdev)
3637 rtwdev->hal.support_cckpd =
3638 !(rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV) &&
3639 !(rtwdev->chip->chip_id == RTL8852B && rtwdev->hal.cv <= CHIP_CAV);
3640 rtwdev->hal.support_igi =
3641 rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV;
3644 static void rtw89_core_setup_rfe_parms(struct rtw89_dev *rtwdev)
3646 const struct rtw89_chip_info *chip = rtwdev->chip;
3647 const struct rtw89_rfe_parms_conf *conf = chip->rfe_parms_conf;
3648 struct rtw89_efuse *efuse = &rtwdev->efuse;
3649 u8 rfe_type = efuse->rfe_type;
3654 while (conf->rfe_parms) {
3655 if (rfe_type == conf->rfe_type) {
3656 rtwdev->rfe_parms = conf->rfe_parms;
3663 rtwdev->rfe_parms = chip->dflt_parms;
3666 static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev)
3670 ret = rtw89_mac_partial_init(rtwdev);
3674 ret = rtw89_parse_efuse_map(rtwdev);
3678 ret = rtw89_parse_phycap_map(rtwdev);
3682 ret = rtw89_mac_setup_phycap(rtwdev);
3686 rtw89_core_setup_phycap(rtwdev);
3687 rtw89_core_setup_rfe_parms(rtwdev);
3689 rtw89_mac_pwr_off(rtwdev);
3694 static int rtw89_chip_board_info_setup(struct rtw89_dev *rtwdev)
3696 rtw89_chip_fem_setup(rtwdev);
3701 int rtw89_chip_info_setup(struct rtw89_dev *rtwdev)
3705 rtw89_read_chip_ver(rtwdev);
3707 ret = rtw89_wait_firmware_completion(rtwdev);
3709 rtw89_err(rtwdev, "failed to wait firmware completion\n");
3713 ret = rtw89_fw_recognize(rtwdev);
3715 rtw89_err(rtwdev, "failed to recognize firmware\n");
3719 ret = rtw89_chip_efuse_info_setup(rtwdev);
3723 ret = rtw89_chip_board_info_setup(rtwdev);
3727 rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev);
3731 EXPORT_SYMBOL(rtw89_chip_info_setup);
3733 static int rtw89_core_register_hw(struct rtw89_dev *rtwdev)
3735 struct ieee80211_hw *hw = rtwdev->hw;
3736 struct rtw89_efuse *efuse = &rtwdev->efuse;
3737 struct rtw89_hal *hal = &rtwdev->hal;
3739 int tx_headroom = IEEE80211_HT_CTL_LEN;
3741 hw->vif_data_size = sizeof(struct rtw89_vif);
3742 hw->sta_data_size = sizeof(struct rtw89_sta);
3743 hw->txq_data_size = sizeof(struct rtw89_txq);
3744 hw->chanctx_data_size = sizeof(struct rtw89_chanctx_cfg);
3746 SET_IEEE80211_PERM_ADDR(hw, efuse->addr);
3748 hw->extra_tx_headroom = tx_headroom;
3749 hw->queues = IEEE80211_NUM_ACS;
3750 hw->max_rx_aggregation_subframes = RTW89_MAX_RX_AGG_NUM;
3751 hw->max_tx_aggregation_subframes = RTW89_MAX_TX_AGG_NUM;
3752 hw->uapsd_max_sp_len = IEEE80211_WMM_IE_STA_QOSINFO_SP_ALL;
3754 ieee80211_hw_set(hw, SIGNAL_DBM);
3755 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
3756 ieee80211_hw_set(hw, MFP_CAPABLE);
3757 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
3758 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
3759 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3760 ieee80211_hw_set(hw, TX_AMSDU);
3761 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
3762 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
3763 ieee80211_hw_set(hw, SUPPORTS_PS);
3764 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
3765 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
3766 ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID);
3767 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
3768 if (RTW89_CHK_FW_FEATURE(BEACON_FILTER, &rtwdev->fw))
3769 ieee80211_hw_set(hw, CONNECTION_MONITOR);
3771 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
3772 BIT(NL80211_IFTYPE_AP) |
3773 BIT(NL80211_IFTYPE_P2P_CLIENT) |
3774 BIT(NL80211_IFTYPE_P2P_GO);
3776 if (hal->ant_diversity) {
3777 hw->wiphy->available_antennas_tx = 0x3;
3778 hw->wiphy->available_antennas_rx = 0x3;
3780 hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1;
3781 hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1;
3784 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
3785 WIPHY_FLAG_TDLS_EXTERNAL_SETUP |
3786 WIPHY_FLAG_AP_UAPSD | WIPHY_FLAG_SPLIT_SCAN_6GHZ;
3787 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
3789 hw->wiphy->max_scan_ssids = RTW89_SCANOFLD_MAX_SSID;
3790 hw->wiphy->max_scan_ie_len = RTW89_SCANOFLD_MAX_IE_LEN;
3793 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;
3796 hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL);
3797 hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL);
3798 hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL);
3799 hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL);
3800 hw->wiphy->max_remain_on_channel_duration = 1000;
3802 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
3804 ret = rtw89_core_set_supported_band(rtwdev);
3806 rtw89_err(rtwdev, "failed to set supported band\n");
3810 hw->wiphy->reg_notifier = rtw89_regd_notifier;
3811 hw->wiphy->sar_capa = &rtw89_sar_capa;
3813 ret = ieee80211_register_hw(hw);
3815 rtw89_err(rtwdev, "failed to register hw\n");
3816 goto err_free_supported_band;
3819 ret = rtw89_regd_init(rtwdev, rtw89_regd_notifier);
3821 rtw89_err(rtwdev, "failed to init regd\n");
3822 goto err_unregister_hw;
3828 ieee80211_unregister_hw(hw);
3829 err_free_supported_band:
3830 rtw89_core_clr_supported_band(rtwdev);
3835 static void rtw89_core_unregister_hw(struct rtw89_dev *rtwdev)
3837 struct ieee80211_hw *hw = rtwdev->hw;
3839 ieee80211_unregister_hw(hw);
3840 rtw89_core_clr_supported_band(rtwdev);
3843 int rtw89_core_register(struct rtw89_dev *rtwdev)
3847 ret = rtw89_core_register_hw(rtwdev);
3849 rtw89_err(rtwdev, "failed to register core hw\n");
3853 rtw89_debugfs_init(rtwdev);
3857 EXPORT_SYMBOL(rtw89_core_register);
3859 void rtw89_core_unregister(struct rtw89_dev *rtwdev)
3861 rtw89_core_unregister_hw(rtwdev);
3863 EXPORT_SYMBOL(rtw89_core_unregister);
3865 struct rtw89_dev *rtw89_alloc_ieee80211_hw(struct device *device,
3867 const struct rtw89_chip_info *chip)
3869 struct rtw89_fw_info early_fw = {};
3870 const struct firmware *firmware;
3871 struct ieee80211_hw *hw;
3872 struct rtw89_dev *rtwdev;
3873 struct ieee80211_ops *ops;
3874 u32 driver_data_size;
3878 firmware = rtw89_early_fw_feature_recognize(device, chip, &early_fw, &fw_format);
3880 ops = kmemdup(&rtw89_ops, sizeof(rtw89_ops), GFP_KERNEL);
3884 no_chanctx = chip->support_chanctx_num == 0 ||
3885 !RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &early_fw) ||
3886 !RTW89_CHK_FW_FEATURE(BEACON_FILTER, &early_fw);
3889 ops->add_chanctx = NULL;
3890 ops->remove_chanctx = NULL;
3891 ops->change_chanctx = NULL;
3892 ops->assign_vif_chanctx = NULL;
3893 ops->unassign_vif_chanctx = NULL;
3894 ops->remain_on_channel = NULL;
3895 ops->cancel_remain_on_channel = NULL;
3898 driver_data_size = sizeof(struct rtw89_dev) + bus_data_size;
3899 hw = ieee80211_alloc_hw(driver_data_size, ops);
3903 hw->wiphy->iface_combinations = rtw89_iface_combs;
3904 hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw89_iface_combs);
3908 rtwdev->dev = device;
3910 rtwdev->chip = chip;
3911 rtwdev->fw.req.firmware = firmware;
3912 rtwdev->fw.fw_format = fw_format;
3914 rtw89_debug(rtwdev, RTW89_DBG_FW, "probe driver %s chanctx\n",
3915 no_chanctx ? "without" : "with");
3921 release_firmware(firmware);
3924 EXPORT_SYMBOL(rtw89_alloc_ieee80211_hw);
3926 void rtw89_free_ieee80211_hw(struct rtw89_dev *rtwdev)
3929 release_firmware(rtwdev->fw.req.firmware);
3930 ieee80211_free_hw(rtwdev->hw);
3932 EXPORT_SYMBOL(rtw89_free_ieee80211_hw);
3934 MODULE_AUTHOR("Realtek Corporation");
3935 MODULE_DESCRIPTION("Realtek 802.11ax wireless core module");
3936 MODULE_LICENSE("Dual BSD/GPL");