drivers/net/wireless/realtek/rtw89/core.c

   1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
   2 /* Copyright(c) 2019-2020  Realtek Corporation
   3  */
   4 #include <linux/ip.h>
   5 #include <linux/udp.h>
   6
   7 #include "cam.h"
   8 #include "chan.h"
   9 #include "coex.h"
  10 #include "core.h"
  11 #include "efuse.h"
  12 #include "fw.h"
  13 #include "mac.h"
  14 #include "phy.h"
  15 #include "ps.h"
  16 #include "reg.h"
  17 #include "sar.h"
  18 #include "ser.h"
  19 #include "txrx.h"
  20 #include "util.h"
  21
  22 static bool rtw89_disable_ps_mode;
  23 module_param_named(disable_ps_mode, rtw89_disable_ps_mode, bool, 0644);
  24 MODULE_PARM_DESC(disable_ps_mode, "Set Y to disable low power mode");
  25
  26 #define RTW89_DEF_CHAN(_freq, _hw_val, _flags, _band)   \
  27         { .center_freq = _freq, .hw_value = _hw_val, .flags = _flags, .band = _band, }
  28 #define RTW89_DEF_CHAN_2G(_freq, _hw_val)       \
  29         RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_2GHZ)
  30 #define RTW89_DEF_CHAN_5G(_freq, _hw_val)       \
  31         RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_5GHZ)
  32 #define RTW89_DEF_CHAN_5G_NO_HT40MINUS(_freq, _hw_val)  \
  33         RTW89_DEF_CHAN(_freq, _hw_val, IEEE80211_CHAN_NO_HT40MINUS, NL80211_BAND_5GHZ)
  34 #define RTW89_DEF_CHAN_6G(_freq, _hw_val)       \
  35         RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_6GHZ)
  36
  37 static struct ieee80211_channel rtw89_channels_2ghz[] = {
  38         RTW89_DEF_CHAN_2G(2412, 1),
  39         RTW89_DEF_CHAN_2G(2417, 2),
  40         RTW89_DEF_CHAN_2G(2422, 3),
  41         RTW89_DEF_CHAN_2G(2427, 4),
  42         RTW89_DEF_CHAN_2G(2432, 5),
  43         RTW89_DEF_CHAN_2G(2437, 6),
  44         RTW89_DEF_CHAN_2G(2442, 7),
  45         RTW89_DEF_CHAN_2G(2447, 8),
  46         RTW89_DEF_CHAN_2G(2452, 9),
  47         RTW89_DEF_CHAN_2G(2457, 10),
  48         RTW89_DEF_CHAN_2G(2462, 11),
  49         RTW89_DEF_CHAN_2G(2467, 12),
  50         RTW89_DEF_CHAN_2G(2472, 13),
  51         RTW89_DEF_CHAN_2G(2484, 14),
  52 };
  53
  54 static struct ieee80211_channel rtw89_channels_5ghz[] = {
  55         RTW89_DEF_CHAN_5G(5180, 36),
  56         RTW89_DEF_CHAN_5G(5200, 40),
  57         RTW89_DEF_CHAN_5G(5220, 44),
  58         RTW89_DEF_CHAN_5G(5240, 48),
  59         RTW89_DEF_CHAN_5G(5260, 52),
  60         RTW89_DEF_CHAN_5G(5280, 56),
  61         RTW89_DEF_CHAN_5G(5300, 60),
  62         RTW89_DEF_CHAN_5G(5320, 64),
  63         RTW89_DEF_CHAN_5G(5500, 100),
  64         RTW89_DEF_CHAN_5G(5520, 104),
  65         RTW89_DEF_CHAN_5G(5540, 108),
  66         RTW89_DEF_CHAN_5G(5560, 112),
  67         RTW89_DEF_CHAN_5G(5580, 116),
  68         RTW89_DEF_CHAN_5G(5600, 120),
  69         RTW89_DEF_CHAN_5G(5620, 124),
  70         RTW89_DEF_CHAN_5G(5640, 128),
  71         RTW89_DEF_CHAN_5G(5660, 132),
  72         RTW89_DEF_CHAN_5G(5680, 136),
  73         RTW89_DEF_CHAN_5G(5700, 140),
  74         RTW89_DEF_CHAN_5G(5720, 144),
  75         RTW89_DEF_CHAN_5G(5745, 149),
  76         RTW89_DEF_CHAN_5G(5765, 153),
  77         RTW89_DEF_CHAN_5G(5785, 157),
  78         RTW89_DEF_CHAN_5G(5805, 161),
  79         RTW89_DEF_CHAN_5G_NO_HT40MINUS(5825, 165),
  80         RTW89_DEF_CHAN_5G(5845, 169),
  81         RTW89_DEF_CHAN_5G(5865, 173),
  82         RTW89_DEF_CHAN_5G(5885, 177),
  83 };
  84
  85 static struct ieee80211_channel rtw89_channels_6ghz[] = {
  86         RTW89_DEF_CHAN_6G(5955, 1),
  87         RTW89_DEF_CHAN_6G(5975, 5),
  88         RTW89_DEF_CHAN_6G(5995, 9),
  89         RTW89_DEF_CHAN_6G(6015, 13),
  90         RTW89_DEF_CHAN_6G(6035, 17),
  91         RTW89_DEF_CHAN_6G(6055, 21),
  92         RTW89_DEF_CHAN_6G(6075, 25),
  93         RTW89_DEF_CHAN_6G(6095, 29),
  94         RTW89_DEF_CHAN_6G(6115, 33),
  95         RTW89_DEF_CHAN_6G(6135, 37),
  96         RTW89_DEF_CHAN_6G(6155, 41),
  97         RTW89_DEF_CHAN_6G(6175, 45),
  98         RTW89_DEF_CHAN_6G(6195, 49),
  99         RTW89_DEF_CHAN_6G(6215, 53),
 100         RTW89_DEF_CHAN_6G(6235, 57),
 101         RTW89_DEF_CHAN_6G(6255, 61),
 102         RTW89_DEF_CHAN_6G(6275, 65),
 103         RTW89_DEF_CHAN_6G(6295, 69),
 104         RTW89_DEF_CHAN_6G(6315, 73),
 105         RTW89_DEF_CHAN_6G(6335, 77),
 106         RTW89_DEF_CHAN_6G(6355, 81),
 107         RTW89_DEF_CHAN_6G(6375, 85),
 108         RTW89_DEF_CHAN_6G(6395, 89),
 109         RTW89_DEF_CHAN_6G(6415, 93),
 110         RTW89_DEF_CHAN_6G(6435, 97),
 111         RTW89_DEF_CHAN_6G(6455, 101),
 112         RTW89_DEF_CHAN_6G(6475, 105),
 113         RTW89_DEF_CHAN_6G(6495, 109),
 114         RTW89_DEF_CHAN_6G(6515, 113),
 115         RTW89_DEF_CHAN_6G(6535, 117),
 116         RTW89_DEF_CHAN_6G(6555, 121),
 117         RTW89_DEF_CHAN_6G(6575, 125),
 118         RTW89_DEF_CHAN_6G(6595, 129),
 119         RTW89_DEF_CHAN_6G(6615, 133),
 120         RTW89_DEF_CHAN_6G(6635, 137),
 121         RTW89_DEF_CHAN_6G(6655, 141),
 122         RTW89_DEF_CHAN_6G(6675, 145),
 123         RTW89_DEF_CHAN_6G(6695, 149),
 124         RTW89_DEF_CHAN_6G(6715, 153),
 125         RTW89_DEF_CHAN_6G(6735, 157),
 126         RTW89_DEF_CHAN_6G(6755, 161),
 127         RTW89_DEF_CHAN_6G(6775, 165),
 128         RTW89_DEF_CHAN_6G(6795, 169),
 129         RTW89_DEF_CHAN_6G(6815, 173),
 130         RTW89_DEF_CHAN_6G(6835, 177),
 131         RTW89_DEF_CHAN_6G(6855, 181),
 132         RTW89_DEF_CHAN_6G(6875, 185),
 133         RTW89_DEF_CHAN_6G(6895, 189),
 134         RTW89_DEF_CHAN_6G(6915, 193),
 135         RTW89_DEF_CHAN_6G(6935, 197),
 136         RTW89_DEF_CHAN_6G(6955, 201),
 137         RTW89_DEF_CHAN_6G(6975, 205),
 138         RTW89_DEF_CHAN_6G(6995, 209),
 139         RTW89_DEF_CHAN_6G(7015, 213),
 140         RTW89_DEF_CHAN_6G(7035, 217),
 141         RTW89_DEF_CHAN_6G(7055, 221),
 142         RTW89_DEF_CHAN_6G(7075, 225),
 143         RTW89_DEF_CHAN_6G(7095, 229),
 144         RTW89_DEF_CHAN_6G(7115, 233),
 145 };
 146
 147 static struct ieee80211_rate rtw89_bitrates[] = {
 148         { .bitrate = 10,  .hw_value = 0x00, },
 149         { .bitrate = 20,  .hw_value = 0x01, },
 150         { .bitrate = 55,  .hw_value = 0x02, },
 151         { .bitrate = 110, .hw_value = 0x03, },
 152         { .bitrate = 60,  .hw_value = 0x04, },
 153         { .bitrate = 90,  .hw_value = 0x05, },
 154         { .bitrate = 120, .hw_value = 0x06, },
 155         { .bitrate = 180, .hw_value = 0x07, },
 156         { .bitrate = 240, .hw_value = 0x08, },
 157         { .bitrate = 360, .hw_value = 0x09, },
 158         { .bitrate = 480, .hw_value = 0x0a, },
 159         { .bitrate = 540, .hw_value = 0x0b, },
 160 };
 161
 162 static const struct ieee80211_iface_limit rtw89_iface_limits[] = {
 163         {
 164                 .max = 1,
 165                 .types = BIT(NL80211_IFTYPE_STATION),
 166         },
 167         {
 168                 .max = 1,
 169                 .types = BIT(NL80211_IFTYPE_P2P_CLIENT) |
 170                          BIT(NL80211_IFTYPE_P2P_GO) |
 171                          BIT(NL80211_IFTYPE_AP),
 172         },
 173 };
 174
 175 static const struct ieee80211_iface_combination rtw89_iface_combs[] = {
 176         {
 177                 .limits = rtw89_iface_limits,
 178                 .n_limits = ARRAY_SIZE(rtw89_iface_limits),
 179                 .max_interfaces = 2,
 180                 .num_different_channels = 1,
 181         }
 182 };
 183
 184 bool rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate, u16 *bitrate)
 185 {
 186         struct ieee80211_rate rate;
 187
 188         if (unlikely(rpt_rate >= ARRAY_SIZE(rtw89_bitrates))) {
 189                 rtw89_debug(rtwdev, RTW89_DBG_UNEXP, "invalid rpt rate %d\n", rpt_rate);
 190                 return false;
 191         }
 192
 193         rate = rtw89_bitrates[rpt_rate];
 194         *bitrate = rate.bitrate;
 195
 196         return true;
 197 }
 198
 199 static const struct ieee80211_supported_band rtw89_sband_2ghz = {
 200         .band           = NL80211_BAND_2GHZ,
 201         .channels       = rtw89_channels_2ghz,
 202         .n_channels     = ARRAY_SIZE(rtw89_channels_2ghz),
 203         .bitrates       = rtw89_bitrates,
 204         .n_bitrates     = ARRAY_SIZE(rtw89_bitrates),
 205         .ht_cap         = {0},
 206         .vht_cap        = {0},
 207 };
 208
 209 static const struct ieee80211_supported_band rtw89_sband_5ghz = {
 210         .band           = NL80211_BAND_5GHZ,
 211         .channels       = rtw89_channels_5ghz,
 212         .n_channels     = ARRAY_SIZE(rtw89_channels_5ghz),
 213
 214         /* 5G has no CCK rates, 1M/2M/5.5M/11M */
 215         .bitrates       = rtw89_bitrates + 4,
 216         .n_bitrates     = ARRAY_SIZE(rtw89_bitrates) - 4,
 217         .ht_cap         = {0},
 218         .vht_cap        = {0},
 219 };
 220
 221 static const struct ieee80211_supported_band rtw89_sband_6ghz = {
 222         .band           = NL80211_BAND_6GHZ,
 223         .channels       = rtw89_channels_6ghz,
 224         .n_channels     = ARRAY_SIZE(rtw89_channels_6ghz),
 225
 226         /* 6G has no CCK rates, 1M/2M/5.5M/11M */
 227         .bitrates       = rtw89_bitrates + 4,
 228         .n_bitrates     = ARRAY_SIZE(rtw89_bitrates) - 4,
 229 };
 230
 231 static void rtw89_traffic_stats_accu(struct rtw89_dev *rtwdev,
 232                                      struct rtw89_traffic_stats *stats,
 233                                      struct sk_buff *skb, bool tx)
 234 {
 235         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
 236
 237         if (!ieee80211_is_data(hdr->frame_control))
 238                 return;
 239
 240         if (is_broadcast_ether_addr(hdr->addr1) ||
 241             is_multicast_ether_addr(hdr->addr1))
 242                 return;
 243
 244         if (tx) {
 245                 stats->tx_cnt++;
 246                 stats->tx_unicast += skb->len;
 247         } else {
 248                 stats->rx_cnt++;
 249                 stats->rx_unicast += skb->len;
 250         }
 251 }
 252
 253 void rtw89_get_default_chandef(struct cfg80211_chan_def *chandef)
 254 {
 255         cfg80211_chandef_create(chandef, &rtw89_channels_2ghz[0],
 256                                 NL80211_CHAN_NO_HT);
 257 }
 258
 259 static void rtw89_get_channel_params(const struct cfg80211_chan_def *chandef,
 260                                      struct rtw89_chan *chan)
 261 {
 262         struct ieee80211_channel *channel = chandef->chan;
 263         enum nl80211_chan_width width = chandef->width;
 264         u32 primary_freq, center_freq;
 265         u8 center_chan;
 266         u8 bandwidth = RTW89_CHANNEL_WIDTH_20;
 267         u32 offset;
 268         u8 band;
 269
 270         center_chan = channel->hw_value;
 271         primary_freq = channel->center_freq;
 272         center_freq = chandef->center_freq1;
 273
 274         switch (width) {
 275         case NL80211_CHAN_WIDTH_20_NOHT:
 276         case NL80211_CHAN_WIDTH_20:
 277                 bandwidth = RTW89_CHANNEL_WIDTH_20;
 278                 break;
 279         case NL80211_CHAN_WIDTH_40:
 280                 bandwidth = RTW89_CHANNEL_WIDTH_40;
 281                 if (primary_freq > center_freq) {
 282                         center_chan -= 2;
 283                 } else {
 284                         center_chan += 2;
 285                 }
 286                 break;
 287         case NL80211_CHAN_WIDTH_80:
 288         case NL80211_CHAN_WIDTH_160:
 289                 bandwidth = nl_to_rtw89_bandwidth(width);
 290                 if (primary_freq > center_freq) {
 291                         offset = (primary_freq - center_freq - 10) / 20;
 292                         center_chan -= 2 + offset * 4;
 293                 } else {
 294                         offset = (center_freq - primary_freq - 10) / 20;
 295                         center_chan += 2 + offset * 4;
 296                 }
 297                 break;
 298         default:
 299                 center_chan = 0;
 300                 break;
 301         }
 302
 303         switch (channel->band) {
 304         default:
 305         case NL80211_BAND_2GHZ:
 306                 band = RTW89_BAND_2G;
 307                 break;
 308         case NL80211_BAND_5GHZ:
 309                 band = RTW89_BAND_5G;
 310                 break;
 311         case NL80211_BAND_6GHZ:
 312                 band = RTW89_BAND_6G;
 313                 break;
 314         }
 315
 316         rtw89_chan_create(chan, center_chan, channel->hw_value, band, bandwidth);
 317 }
 318
 319 void rtw89_core_set_chip_txpwr(struct rtw89_dev *rtwdev)
 320 {
 321         const struct rtw89_chip_info *chip = rtwdev->chip;
 322         const struct rtw89_chan *chan;
 323         enum rtw89_sub_entity_idx sub_entity_idx;
 324         enum rtw89_phy_idx phy_idx;
 325         enum rtw89_entity_mode mode;
 326         bool entity_active;
 327
 328         entity_active = rtw89_get_entity_state(rtwdev);
 329         if (!entity_active)
 330                 return;
 331
 332         mode = rtw89_get_entity_mode(rtwdev);
 333         if (WARN(mode != RTW89_ENTITY_MODE_SCC, "Invalid ent mode: %d\n", mode))
 334                 return;
 335
 336         sub_entity_idx = RTW89_SUB_ENTITY_0;
 337         phy_idx = RTW89_PHY_0;
 338         chan = rtw89_chan_get(rtwdev, sub_entity_idx);
 339         if (chip->ops->set_txpwr)
 340                 chip->ops->set_txpwr(rtwdev, chan, phy_idx);
 341 }
 342
 343 void rtw89_set_channel(struct rtw89_dev *rtwdev)
 344 {
 345         const struct rtw89_chip_info *chip = rtwdev->chip;
 346         const struct cfg80211_chan_def *chandef;
 347         enum rtw89_sub_entity_idx sub_entity_idx;
 348         enum rtw89_mac_idx mac_idx;
 349         enum rtw89_phy_idx phy_idx;
 350         struct rtw89_chan chan;
 351         struct rtw89_channel_help_params bak;
 352         enum rtw89_entity_mode mode;
 353         bool band_changed;
 354         bool entity_active;
 355
 356         entity_active = rtw89_get_entity_state(rtwdev);
 357
 358         mode = rtw89_entity_recalc(rtwdev);
 359         if (WARN(mode != RTW89_ENTITY_MODE_SCC, "Invalid ent mode: %d\n", mode))
 360                 return;
 361
 362         sub_entity_idx = RTW89_SUB_ENTITY_0;
 363         mac_idx = RTW89_MAC_0;
 364         phy_idx = RTW89_PHY_0;
 365         chandef = rtw89_chandef_get(rtwdev, sub_entity_idx);
 366         rtw89_get_channel_params(chandef, &chan);
 367         if (WARN(chan.channel == 0, "Invalid channel\n"))
 368                 return;
 369
 370         band_changed = rtw89_assign_entity_chan(rtwdev, sub_entity_idx, &chan);
 371
 372         rtw89_chip_set_channel_prepare(rtwdev, &bak, &chan, mac_idx, phy_idx);
 373
 374         chip->ops->set_channel(rtwdev, &chan, mac_idx, phy_idx);
 375
 376         rtw89_core_set_chip_txpwr(rtwdev);
 377
 378         rtw89_chip_set_channel_done(rtwdev, &bak, &chan, mac_idx, phy_idx);
 379
 380         if (!entity_active || band_changed) {
 381                 rtw89_btc_ntfy_switch_band(rtwdev, phy_idx, chan.band_type);
 382                 rtw89_chip_rfk_band_changed(rtwdev, phy_idx);
 383         }
 384
 385         rtw89_set_entity_state(rtwdev, true);
 386 }
 387
 388 void rtw89_get_channel(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
 389                        struct rtw89_chan *chan)
 390 {
 391         const struct cfg80211_chan_def *chandef;
 392
 393         chandef = rtw89_chandef_get(rtwdev, rtwvif->sub_entity_idx);
 394         rtw89_get_channel_params(chandef, chan);
 395 }
 396
 397 static enum rtw89_core_tx_type
 398 rtw89_core_get_tx_type(struct rtw89_dev *rtwdev,
 399                        struct sk_buff *skb)
 400 {
 401         struct ieee80211_hdr *hdr = (void *)skb->data;
 402         __le16 fc = hdr->frame_control;
 403
 404         if (ieee80211_is_mgmt(fc) || ieee80211_is_nullfunc(fc))
 405                 return RTW89_CORE_TX_TYPE_MGMT;
 406
 407         return RTW89_CORE_TX_TYPE_DATA;
 408 }
 409
 410 static void
 411 rtw89_core_tx_update_ampdu_info(struct rtw89_dev *rtwdev,
 412                                 struct rtw89_core_tx_request *tx_req,
 413                                 enum btc_pkt_type pkt_type)
 414 {
 415         struct ieee80211_sta *sta = tx_req->sta;
 416         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 417         struct sk_buff *skb = tx_req->skb;
 418         struct rtw89_sta *rtwsta;
 419         u8 ampdu_num;
 420         u8 tid;
 421
 422         if (pkt_type == PACKET_EAPOL) {
 423                 desc_info->bk = true;
 424                 return;
 425         }
 426
 427         if (!(IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU))
 428                 return;
 429
 430         if (!sta) {
 431                 rtw89_warn(rtwdev, "cannot set ampdu info without sta\n");
 432                 return;
 433         }
 434
 435         tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
 436         rtwsta = (struct rtw89_sta *)sta->drv_priv;
 437
 438         ampdu_num = (u8)((rtwsta->ampdu_params[tid].agg_num ?
 439                           rtwsta->ampdu_params[tid].agg_num :
 440                           4 << sta->deflink.ht_cap.ampdu_factor) - 1);
 441
 442         desc_info->agg_en = true;
 443         desc_info->ampdu_density = sta->deflink.ht_cap.ampdu_density;
 444         desc_info->ampdu_num = ampdu_num;
 445 }
 446
 447 static void
 448 rtw89_core_tx_update_sec_key(struct rtw89_dev *rtwdev,
 449                              struct rtw89_core_tx_request *tx_req)
 450 {
 451         const struct rtw89_chip_info *chip = rtwdev->chip;
 452         struct ieee80211_vif *vif = tx_req->vif;
 453         struct ieee80211_sta *sta = tx_req->sta;
 454         struct ieee80211_tx_info *info;
 455         struct ieee80211_key_conf *key;
 456         struct rtw89_vif *rtwvif;
 457         struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
 458         struct rtw89_addr_cam_entry *addr_cam;
 459         struct rtw89_sec_cam_entry *sec_cam;
 460         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 461         struct sk_buff *skb = tx_req->skb;
 462         u8 sec_type = RTW89_SEC_KEY_TYPE_NONE;
 463         u64 pn64;
 464
 465         if (!vif) {
 466                 rtw89_warn(rtwdev, "cannot set sec key without vif\n");
 467                 return;
 468         }
 469
 470         rtwvif = (struct rtw89_vif *)vif->drv_priv;
 471         addr_cam = rtw89_get_addr_cam_of(rtwvif, rtwsta);
 472
 473         info = IEEE80211_SKB_CB(skb);
 474         key = info->control.hw_key;
 475         sec_cam = addr_cam->sec_entries[key->hw_key_idx];
 476         if (!sec_cam) {
 477                 rtw89_warn(rtwdev, "sec cam entry is empty\n");
 478                 return;
 479         }
 480
 481         switch (key->cipher) {
 482         case WLAN_CIPHER_SUITE_WEP40:
 483                 sec_type = RTW89_SEC_KEY_TYPE_WEP40;
 484                 break;
 485         case WLAN_CIPHER_SUITE_WEP104:
 486                 sec_type = RTW89_SEC_KEY_TYPE_WEP104;
 487                 break;
 488         case WLAN_CIPHER_SUITE_TKIP:
 489                 sec_type = RTW89_SEC_KEY_TYPE_TKIP;
 490                 break;
 491         case WLAN_CIPHER_SUITE_CCMP:
 492                 sec_type = RTW89_SEC_KEY_TYPE_CCMP128;
 493                 break;
 494         case WLAN_CIPHER_SUITE_CCMP_256:
 495                 sec_type = RTW89_SEC_KEY_TYPE_CCMP256;
 496                 break;
 497         case WLAN_CIPHER_SUITE_GCMP:
 498                 sec_type = RTW89_SEC_KEY_TYPE_GCMP128;
 499                 break;
 500         case WLAN_CIPHER_SUITE_GCMP_256:
 501                 sec_type = RTW89_SEC_KEY_TYPE_GCMP256;
 502                 break;
 503         default:
 504                 rtw89_warn(rtwdev, "key cipher not supported %d\n", key->cipher);
 505                 return;
 506         }
 507
 508         desc_info->sec_en = true;
 509         desc_info->sec_keyid = key->keyidx;
 510         desc_info->sec_type = sec_type;
 511         desc_info->sec_cam_idx = sec_cam->sec_cam_idx;
 512
 513         if (!chip->hw_sec_hdr)
 514                 return;
 515
 516         pn64 = atomic64_inc_return(&key->tx_pn);
 517         desc_info->sec_seq[0] = pn64;
 518         desc_info->sec_seq[1] = pn64 >> 8;
 519         desc_info->sec_seq[2] = pn64 >> 16;
 520         desc_info->sec_seq[3] = pn64 >> 24;
 521         desc_info->sec_seq[4] = pn64 >> 32;
 522         desc_info->sec_seq[5] = pn64 >> 40;
 523         desc_info->wp_offset = 1; /* in unit of 8 bytes for security header */
 524 }
 525
 526 static u16 rtw89_core_get_mgmt_rate(struct rtw89_dev *rtwdev,
 527                                     struct rtw89_core_tx_request *tx_req)
 528 {
 529         struct sk_buff *skb = tx_req->skb;
 530         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 531         struct ieee80211_vif *vif = tx_info->control.vif;
 532         const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
 533         u16 lowest_rate;
 534
 535         if (tx_info->flags & IEEE80211_TX_CTL_NO_CCK_RATE ||
 536             (vif && vif->p2p))
 537                 lowest_rate = RTW89_HW_RATE_OFDM6;
 538         else if (chan->band_type == RTW89_BAND_2G)
 539                 lowest_rate = RTW89_HW_RATE_CCK1;
 540         else
 541                 lowest_rate = RTW89_HW_RATE_OFDM6;
 542
 543         if (!vif || !vif->bss_conf.basic_rates || !tx_req->sta)
 544                 return lowest_rate;
 545
 546         return __ffs(vif->bss_conf.basic_rates) + lowest_rate;
 547 }
 548
 549 static u8 rtw89_core_tx_get_mac_id(struct rtw89_dev *rtwdev,
 550                                    struct rtw89_core_tx_request *tx_req)
 551 {
 552         struct ieee80211_vif *vif = tx_req->vif;
 553         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 554         struct ieee80211_sta *sta = tx_req->sta;
 555         struct rtw89_sta *rtwsta;
 556
 557         if (!sta)
 558                 return rtwvif->mac_id;
 559
 560         rtwsta = (struct rtw89_sta *)sta->drv_priv;
 561         return rtwsta->mac_id;
 562 }
 563
 564 static void
 565 rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev,
 566                                struct rtw89_core_tx_request *tx_req)
 567 {
 568         struct ieee80211_vif *vif = tx_req->vif;
 569         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 570         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 571         const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
 572         u8 qsel, ch_dma;
 573
 574         qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : RTW89_TX_QSEL_B0_MGMT;
 575         ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
 576
 577         desc_info->qsel = qsel;
 578         desc_info->ch_dma = ch_dma;
 579         desc_info->port = desc_info->hiq ? rtwvif->port : 0;
 580         desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req);
 581         desc_info->hw_ssn_sel = RTW89_MGMT_HW_SSN_SEL;
 582         desc_info->hw_seq_mode = RTW89_MGMT_HW_SEQ_MODE;
 583
 584         /* fixed data rate for mgmt frames */
 585         desc_info->en_wd_info = true;
 586         desc_info->use_rate = true;
 587         desc_info->dis_data_fb = true;
 588         desc_info->data_rate = rtw89_core_get_mgmt_rate(rtwdev, tx_req);
 589
 590         rtw89_debug(rtwdev, RTW89_DBG_TXRX,
 591                     "tx mgmt frame with rate 0x%x on channel %d (band %d, bw %d)\n",
 592                     desc_info->data_rate, chan->channel, chan->band_type,
 593                     chan->band_width);
 594 }
 595
 596 static void
 597 rtw89_core_tx_update_h2c_info(struct rtw89_dev *rtwdev,
 598                               struct rtw89_core_tx_request *tx_req)
 599 {
 600         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 601
 602         desc_info->is_bmc = false;
 603         desc_info->wd_page = false;
 604         desc_info->ch_dma = RTW89_DMA_H2C;
 605 }
 606
 607 static void rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev *rtwdev, __le32 *htc)
 608 {
 609         static const u8 rtw89_bandwidth_to_om[] = {
 610                 [RTW89_CHANNEL_WIDTH_20] = HTC_OM_CHANNEL_WIDTH_20,
 611                 [RTW89_CHANNEL_WIDTH_40] = HTC_OM_CHANNEL_WIDTH_40,
 612                 [RTW89_CHANNEL_WIDTH_80] = HTC_OM_CHANNEL_WIDTH_80,
 613                 [RTW89_CHANNEL_WIDTH_160] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80,
 614                 [RTW89_CHANNEL_WIDTH_80_80] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80,
 615         };
 616         const struct rtw89_chip_info *chip = rtwdev->chip;
 617         struct rtw89_hal *hal = &rtwdev->hal;
 618         const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
 619         u8 om_bandwidth;
 620
 621         if (!chip->dis_2g_40m_ul_ofdma ||
 622             chan->band_type != RTW89_BAND_2G ||
 623             chan->band_width != RTW89_CHANNEL_WIDTH_40)
 624                 return;
 625
 626         om_bandwidth = chan->band_width < ARRAY_SIZE(rtw89_bandwidth_to_om) ?
 627                        rtw89_bandwidth_to_om[chan->band_width] : 0;
 628         *htc = le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) |
 629                le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_OM, RTW89_HTC_MASK_CTL_ID) |
 630                le32_encode_bits(hal->rx_nss - 1, RTW89_HTC_MASK_HTC_OM_RX_NSS) |
 631                le32_encode_bits(om_bandwidth, RTW89_HTC_MASK_HTC_OM_CH_WIDTH) |
 632                le32_encode_bits(1, RTW89_HTC_MASK_HTC_OM_UL_MU_DIS) |
 633                le32_encode_bits(hal->tx_nss - 1, RTW89_HTC_MASK_HTC_OM_TX_NSTS) |
 634                le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_ER_SU_DIS) |
 635                le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_DL_MU_MIMO_RR) |
 636                le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_UL_MU_DATA_DIS);
 637 }
 638
 639 static bool
 640 __rtw89_core_tx_check_he_qos_htc(struct rtw89_dev *rtwdev,
 641                                  struct rtw89_core_tx_request *tx_req,
 642                                  enum btc_pkt_type pkt_type)
 643 {
 644         struct ieee80211_sta *sta = tx_req->sta;
 645         struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
 646         struct sk_buff *skb = tx_req->skb;
 647         struct ieee80211_hdr *hdr = (void *)skb->data;
 648         __le16 fc = hdr->frame_control;
 649
 650         /* AP IOT issue with EAPoL, ARP and DHCP */
 651         if (pkt_type < PACKET_MAX)
 652                 return false;
 653
 654         if (!sta || !sta->deflink.he_cap.has_he)
 655                 return false;
 656
 657         if (!ieee80211_is_data_qos(fc))
 658                 return false;
 659
 660         if (skb_headroom(skb) < IEEE80211_HT_CTL_LEN)
 661                 return false;
 662
 663         if (rtwsta && rtwsta->ra_report.might_fallback_legacy)
 664                 return false;
 665
 666         return true;
 667 }
 668
 669 static void
 670 __rtw89_core_tx_adjust_he_qos_htc(struct rtw89_dev *rtwdev,
 671                                   struct rtw89_core_tx_request *tx_req)
 672 {
 673         struct ieee80211_sta *sta = tx_req->sta;
 674         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
 675         struct sk_buff *skb = tx_req->skb;
 676         struct ieee80211_hdr *hdr = (void *)skb->data;
 677         __le16 fc = hdr->frame_control;
 678         void *data;
 679         __le32 *htc;
 680         u8 *qc;
 681         int hdr_len;
 682
 683         hdr_len = ieee80211_has_a4(fc) ? 32 : 26;
 684         data = skb_push(skb, IEEE80211_HT_CTL_LEN);
 685         memmove(data, data + IEEE80211_HT_CTL_LEN, hdr_len);
 686
 687         hdr = data;
 688         htc = data + hdr_len;
 689         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_ORDER);
 690         *htc = rtwsta->htc_template ? rtwsta->htc_template :
 691                le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) |
 692                le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_CAS, RTW89_HTC_MASK_CTL_ID);
 693
 694         qc = data + hdr_len - IEEE80211_QOS_CTL_LEN;
 695         qc[0] |= IEEE80211_QOS_CTL_EOSP;
 696 }
 697
 698 static void
 699 rtw89_core_tx_update_he_qos_htc(struct rtw89_dev *rtwdev,
 700                                 struct rtw89_core_tx_request *tx_req,
 701                                 enum btc_pkt_type pkt_type)
 702 {
 703         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 704         struct ieee80211_vif *vif = tx_req->vif;
 705         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 706
 707         if (!__rtw89_core_tx_check_he_qos_htc(rtwdev, tx_req, pkt_type))
 708                 goto desc_bk;
 709
 710         __rtw89_core_tx_adjust_he_qos_htc(rtwdev, tx_req);
 711
 712         desc_info->pkt_size += IEEE80211_HT_CTL_LEN;
 713         desc_info->a_ctrl_bsr = true;
 714
 715 desc_bk:
 716         if (!rtwvif || rtwvif->last_a_ctrl == desc_info->a_ctrl_bsr)
 717                 return;
 718
 719         rtwvif->last_a_ctrl = desc_info->a_ctrl_bsr;
 720         desc_info->bk = true;
 721 }
 722
 723 static u16 rtw89_core_get_data_rate(struct rtw89_dev *rtwdev,
 724                                     struct rtw89_core_tx_request *tx_req)
 725 {
 726         struct ieee80211_vif *vif = tx_req->vif;
 727         struct ieee80211_sta *sta = tx_req->sta;
 728         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 729         struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern;
 730         enum rtw89_sub_entity_idx idx = rtwvif->sub_entity_idx;
 731         const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, idx);
 732         u16 lowest_rate;
 733
 734         if (rate_pattern->enable)
 735                 return rate_pattern->rate;
 736
 737         if (vif->p2p)
 738                 lowest_rate = RTW89_HW_RATE_OFDM6;
 739         else if (chan->band_type == RTW89_BAND_2G)
 740                 lowest_rate = RTW89_HW_RATE_CCK1;
 741         else
 742                 lowest_rate = RTW89_HW_RATE_OFDM6;
 743
 744         if (!sta || !sta->deflink.supp_rates[chan->band_type])
 745                 return lowest_rate;
 746
 747         return __ffs(sta->deflink.supp_rates[chan->band_type]) + lowest_rate;
 748 }
 749
 750 static void
 751 rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev,
 752                                struct rtw89_core_tx_request *tx_req)
 753 {
 754         struct ieee80211_vif *vif = tx_req->vif;
 755         struct ieee80211_sta *sta = tx_req->sta;
 756         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 757         struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
 758         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 759         struct sk_buff *skb = tx_req->skb;
 760         u8 tid, tid_indicate;
 761         u8 qsel, ch_dma;
 762
 763         tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
 764         tid_indicate = rtw89_core_get_tid_indicate(rtwdev, tid);
 765         qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : rtw89_core_get_qsel(rtwdev, tid);
 766         ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
 767
 768         desc_info->ch_dma = ch_dma;
 769         desc_info->tid_indicate = tid_indicate;
 770         desc_info->qsel = qsel;
 771         desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req);
 772         desc_info->port = desc_info->hiq ? rtwvif->port : 0;
 773         desc_info->er_cap = rtwsta ? rtwsta->er_cap : false;
 774
 775         /* enable wd_info for AMPDU */
 776         desc_info->en_wd_info = true;
 777
 778         if (IEEE80211_SKB_CB(skb)->control.hw_key)
 779                 rtw89_core_tx_update_sec_key(rtwdev, tx_req);
 780
 781         desc_info->data_retry_lowest_rate = rtw89_core_get_data_rate(rtwdev, tx_req);
 782 }
 783
 784 static enum btc_pkt_type
 785 rtw89_core_tx_btc_spec_pkt_notify(struct rtw89_dev *rtwdev,
 786                                   struct rtw89_core_tx_request *tx_req)
 787 {
 788         struct sk_buff *skb = tx_req->skb;
 789         struct udphdr *udphdr;
 790
 791         if (IEEE80211_SKB_CB(skb)->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO) {
 792                 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.eapol_notify_work);
 793                 return PACKET_EAPOL;
 794         }
 795
 796         if (skb->protocol == htons(ETH_P_ARP)) {
 797                 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.arp_notify_work);
 798                 return PACKET_ARP;
 799         }
 800
 801         if (skb->protocol == htons(ETH_P_IP) &&
 802             ip_hdr(skb)->protocol == IPPROTO_UDP) {
 803                 udphdr = udp_hdr(skb);
 804                 if (((udphdr->source == htons(67) && udphdr->dest == htons(68)) ||
 805                      (udphdr->source == htons(68) && udphdr->dest == htons(67))) &&
 806                     skb->len > 282) {
 807                         ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.dhcp_notify_work);
 808                         return PACKET_DHCP;
 809                 }
 810         }
 811
 812         if (skb->protocol == htons(ETH_P_IP) &&
 813             ip_hdr(skb)->protocol == IPPROTO_ICMP) {
 814                 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.icmp_notify_work);
 815                 return PACKET_ICMP;
 816         }
 817
 818         return PACKET_MAX;
 819 }
 820
 821 static void rtw89_core_tx_update_llc_hdr(struct rtw89_dev *rtwdev,
 822                                          struct rtw89_tx_desc_info *desc_info,
 823                                          struct sk_buff *skb)
 824 {
 825         struct ieee80211_hdr *hdr = (void *)skb->data;
 826         __le16 fc = hdr->frame_control;
 827
 828         desc_info->hdr_llc_len = ieee80211_hdrlen(fc);
 829         desc_info->hdr_llc_len >>= 1; /* in unit of 2 bytes */
 830 }
 831
 832 static void
 833 rtw89_core_tx_wake(struct rtw89_dev *rtwdev,
 834                    struct rtw89_core_tx_request *tx_req)
 835 {
 836         const struct rtw89_chip_info *chip = rtwdev->chip;
 837
 838         if (!RTW89_CHK_FW_FEATURE(TX_WAKE, &rtwdev->fw))
 839                 return;
 840
 841         if (!test_bit(RTW89_FLAG_LOW_POWER_MODE, rtwdev->flags))
 842                 return;
 843
 844         if (chip->chip_id != RTL8852C &&
 845             tx_req->tx_type != RTW89_CORE_TX_TYPE_MGMT)
 846                 return;
 847
 848         rtw89_mac_notify_wake(rtwdev);
 849 }
 850
 851 static void
 852 rtw89_core_tx_update_desc_info(struct rtw89_dev *rtwdev,
 853                                struct rtw89_core_tx_request *tx_req)
 854 {
 855         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 856         struct sk_buff *skb = tx_req->skb;
 857         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 858         struct ieee80211_hdr *hdr = (void *)skb->data;
 859         enum rtw89_core_tx_type tx_type;
 860         enum btc_pkt_type pkt_type;
 861         bool is_bmc;
 862         u16 seq;
 863
 864         seq = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
 865         if (tx_req->tx_type != RTW89_CORE_TX_TYPE_FWCMD) {
 866                 tx_type = rtw89_core_get_tx_type(rtwdev, skb);
 867                 tx_req->tx_type = tx_type;
 868         }
 869         is_bmc = (is_broadcast_ether_addr(hdr->addr1) ||
 870                   is_multicast_ether_addr(hdr->addr1));
 871
 872         desc_info->seq = seq;
 873         desc_info->pkt_size = skb->len;
 874         desc_info->is_bmc = is_bmc;
 875         desc_info->wd_page = true;
 876         desc_info->hiq = info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM;
 877
 878         switch (tx_req->tx_type) {
 879         case RTW89_CORE_TX_TYPE_MGMT:
 880                 rtw89_core_tx_update_mgmt_info(rtwdev, tx_req);
 881                 break;
 882         case RTW89_CORE_TX_TYPE_DATA:
 883                 rtw89_core_tx_update_data_info(rtwdev, tx_req);
 884                 pkt_type = rtw89_core_tx_btc_spec_pkt_notify(rtwdev, tx_req);
 885                 rtw89_core_tx_update_he_qos_htc(rtwdev, tx_req, pkt_type);
 886                 rtw89_core_tx_update_ampdu_info(rtwdev, tx_req, pkt_type);
 887                 rtw89_core_tx_update_llc_hdr(rtwdev, desc_info, skb);
 888                 break;
 889         case RTW89_CORE_TX_TYPE_FWCMD:
 890                 rtw89_core_tx_update_h2c_info(rtwdev, tx_req);
 891                 break;
 892         }
 893 }
 894
 895 void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel)
 896 {
 897         u8 ch_dma;
 898
 899         ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
 900
 901         rtw89_hci_tx_kick_off(rtwdev, ch_dma);
 902 }
 903
 904 int rtw89_core_tx_kick_off_and_wait(struct rtw89_dev *rtwdev, struct sk_buff *skb,
 905                                     int qsel, unsigned int timeout)
 906 {
 907         struct rtw89_tx_skb_data *skb_data = RTW89_TX_SKB_CB(skb);
 908         struct rtw89_tx_wait_info *wait;
 909         unsigned long time_left;
 910         int ret = 0;
 911
 912         wait = kzalloc(sizeof(*wait), GFP_KERNEL);
 913         if (!wait) {
 914                 rtw89_core_tx_kick_off(rtwdev, qsel);
 915                 return 0;
 916         }
 917
 918         init_completion(&wait->completion);
 919         rcu_assign_pointer(skb_data->wait, wait);
 920
 921         rtw89_core_tx_kick_off(rtwdev, qsel);
 922         time_left = wait_for_completion_timeout(&wait->completion,
 923                                                 msecs_to_jiffies(timeout));
 924         if (time_left == 0)
 925                 ret = -ETIMEDOUT;
 926         else if (!wait->tx_done)
 927                 ret = -EAGAIN;
 928
 929         rcu_assign_pointer(skb_data->wait, NULL);
 930         kfree_rcu(wait, rcu_head);
 931
 932         return ret;
 933 }
 934
 935 int rtw89_h2c_tx(struct rtw89_dev *rtwdev,
 936                  struct sk_buff *skb, bool fwdl)
 937 {
 938         struct rtw89_core_tx_request tx_req = {0};
 939         u32 cnt;
 940         int ret;
 941
 942         if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) {
 943                 rtw89_debug(rtwdev, RTW89_DBG_FW,
 944                             "ignore h2c due to power is off with firmware state=%d\n",
 945                             test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags));
 946                 dev_kfree_skb(skb);
 947                 return 0;
 948         }
 949
 950         tx_req.skb = skb;
 951         tx_req.tx_type = RTW89_CORE_TX_TYPE_FWCMD;
 952         if (fwdl)
 953                 tx_req.desc_info.fw_dl = true;
 954
 955         rtw89_core_tx_update_desc_info(rtwdev, &tx_req);
 956
 957         if (!fwdl)
 958                 rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "H2C: ", skb->data, skb->len);
 959
 960         cnt = rtw89_hci_check_and_reclaim_tx_resource(rtwdev, RTW89_TXCH_CH12);
 961         if (cnt == 0) {
 962                 rtw89_err(rtwdev, "no tx fwcmd resource\n");
 963                 return -ENOSPC;
 964         }
 965
 966         ret = rtw89_hci_tx_write(rtwdev, &tx_req);
 967         if (ret) {
 968                 rtw89_err(rtwdev, "failed to transmit skb to HCI\n");
 969                 return ret;
 970         }
 971         rtw89_hci_tx_kick_off(rtwdev, RTW89_TXCH_CH12);
 972
 973         return 0;
 974 }
 975
 976 int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
 977                         struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel)
 978 {
 979         struct rtw89_core_tx_request tx_req = {0};
 980         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 981         int ret;
 982
 983         tx_req.skb = skb;
 984         tx_req.sta = sta;
 985         tx_req.vif = vif;
 986
 987         rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, true);
 988         rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, true);
 989         rtw89_core_tx_update_desc_info(rtwdev, &tx_req);
 990         rtw89_core_tx_wake(rtwdev, &tx_req);
 991
 992         ret = rtw89_hci_tx_write(rtwdev, &tx_req);
 993         if (ret) {
 994                 rtw89_err(rtwdev, "failed to transmit skb to HCI\n");
 995                 return ret;
 996         }
 997
 998         if (qsel)
 999                 *qsel = tx_req.desc_info.qsel;
1000
1001         return 0;
1002 }
1003
1004 static __le32 rtw89_build_txwd_body0(struct rtw89_tx_desc_info *desc_info)
1005 {
1006         u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET, desc_info->wp_offset) |
1007                     FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
1008                     FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
1009                     FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
1010                     FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
1011                     FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl) |
1012                     FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_SEL, desc_info->hw_ssn_sel) |
1013                     FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_MODE, desc_info->hw_seq_mode);
1014
1015         return cpu_to_le32(dword);
1016 }
1017
1018 static __le32 rtw89_build_txwd_body0_v1(struct rtw89_tx_desc_info *desc_info)
1019 {
1020         u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET_V1, desc_info->wp_offset) |
1021                     FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
1022                     FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
1023                     FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
1024                     FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
1025                     FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl);
1026
1027         return cpu_to_le32(dword);
1028 }
1029
1030 static __le32 rtw89_build_txwd_body1_v1(struct rtw89_tx_desc_info *desc_info)
1031 {
1032         u32 dword = FIELD_PREP(RTW89_TXWD_BODY1_ADDR_INFO_NUM, desc_info->addr_info_nr) |
1033                     FIELD_PREP(RTW89_TXWD_BODY1_SEC_KEYID, desc_info->sec_keyid) |
1034                     FIELD_PREP(RTW89_TXWD_BODY1_SEC_TYPE, desc_info->sec_type);
1035
1036         return cpu_to_le32(dword);
1037 }
1038
1039 static __le32 rtw89_build_txwd_body2(struct rtw89_tx_desc_info *desc_info)
1040 {
1041         u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) |
1042                     FIELD_PREP(RTW89_TXWD_BODY2_QSEL, desc_info->qsel) |
1043                     FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size) |
1044                     FIELD_PREP(RTW89_TXWD_BODY2_MACID, desc_info->mac_id);
1045
1046         return cpu_to_le32(dword);
1047 }
1048
1049 static __le32 rtw89_build_txwd_body3(struct rtw89_tx_desc_info *desc_info)
1050 {
1051         u32 dword = FIELD_PREP(RTW89_TXWD_BODY3_SW_SEQ, desc_info->seq) |
1052                     FIELD_PREP(RTW89_TXWD_BODY3_AGG_EN, desc_info->agg_en) |
1053                     FIELD_PREP(RTW89_TXWD_BODY3_BK, desc_info->bk);
1054
1055         return cpu_to_le32(dword);
1056 }
1057
1058 static __le32 rtw89_build_txwd_body4(struct rtw89_tx_desc_info *desc_info)
1059 {
1060         u32 dword = FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L0, desc_info->sec_seq[0]) |
1061                     FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L1, desc_info->sec_seq[1]);
1062
1063         return cpu_to_le32(dword);
1064 }
1065
1066 static __le32 rtw89_build_txwd_body5(struct rtw89_tx_desc_info *desc_info)
1067 {
1068         u32 dword = FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H2, desc_info->sec_seq[2]) |
1069                     FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H3, desc_info->sec_seq[3]) |
1070                     FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H4, desc_info->sec_seq[4]) |
1071                     FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H5, desc_info->sec_seq[5]);
1072
1073         return cpu_to_le32(dword);
1074 }
1075
1076 static __le32 rtw89_build_txwd_body7_v1(struct rtw89_tx_desc_info *desc_info)
1077 {
1078         u32 dword = FIELD_PREP(RTW89_TXWD_BODY7_USE_RATE_V1, desc_info->use_rate) |
1079                     FIELD_PREP(RTW89_TXWD_BODY7_DATA_RATE, desc_info->data_rate);
1080
1081         return cpu_to_le32(dword);
1082 }
1083
1084 static __le32 rtw89_build_txwd_info0(struct rtw89_tx_desc_info *desc_info)
1085 {
1086         u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) |
1087                     FIELD_PREP(RTW89_TXWD_INFO0_DATA_RATE, desc_info->data_rate) |
1088                     FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1089                     FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port);
1090
1091         return cpu_to_le32(dword);
1092 }
1093
1094 static __le32 rtw89_build_txwd_info0_v1(struct rtw89_tx_desc_info *desc_info)
1095 {
1096         u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1097                     FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port) |
1098                     FIELD_PREP(RTW89_TXWD_INFO0_DATA_ER, desc_info->er_cap) |
1099                     FIELD_PREP(RTW89_TXWD_INFO0_DATA_BW_ER, 0);
1100
1101         return cpu_to_le32(dword);
1102 }
1103
1104 static __le32 rtw89_build_txwd_info1(struct rtw89_tx_desc_info *desc_info)
1105 {
1106         u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) |
1107                     FIELD_PREP(RTW89_TXWD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) |
1108                     FIELD_PREP(RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE,
1109                                desc_info->data_retry_lowest_rate);
1110
1111         return cpu_to_le32(dword);
1112 }
1113
1114 static __le32 rtw89_build_txwd_info2(struct rtw89_tx_desc_info *desc_info)
1115 {
1116         u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1117                     FIELD_PREP(RTW89_TXWD_INFO2_SEC_TYPE, desc_info->sec_type) |
1118                     FIELD_PREP(RTW89_TXWD_INFO2_SEC_HW_ENC, desc_info->sec_en) |
1119                     FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1120
1121         return cpu_to_le32(dword);
1122 }
1123
1124 static __le32 rtw89_build_txwd_info2_v1(struct rtw89_tx_desc_info *desc_info)
1125 {
1126         u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1127                     FIELD_PREP(RTW89_TXWD_INFO2_FORCE_KEY_EN, desc_info->sec_en) |
1128                     FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1129
1130         return cpu_to_le32(dword);
1131 }
1132
1133 static __le32 rtw89_build_txwd_info4(struct rtw89_tx_desc_info *desc_info)
1134 {
1135         u32 dword = FIELD_PREP(RTW89_TXWD_INFO4_RTS_EN, 1) |
1136                     FIELD_PREP(RTW89_TXWD_INFO4_HW_RTS_EN, 1);
1137
1138         return cpu_to_le32(dword);
1139 }
1140
1141 void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev,
1142                             struct rtw89_tx_desc_info *desc_info,
1143                             void *txdesc)
1144 {
1145         struct rtw89_txwd_body *txwd_body = (struct rtw89_txwd_body *)txdesc;
1146         struct rtw89_txwd_info *txwd_info;
1147
1148         txwd_body->dword0 = rtw89_build_txwd_body0(desc_info);
1149         txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
1150         txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
1151
1152         if (!desc_info->en_wd_info)
1153                 return;
1154
1155         txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1);
1156         txwd_info->dword0 = rtw89_build_txwd_info0(desc_info);
1157         txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
1158         txwd_info->dword2 = rtw89_build_txwd_info2(desc_info);
1159         txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
1160
1161 }
1162 EXPORT_SYMBOL(rtw89_core_fill_txdesc);
1163
1164 void rtw89_core_fill_txdesc_v1(struct rtw89_dev *rtwdev,
1165                                struct rtw89_tx_desc_info *desc_info,
1166                                void *txdesc)
1167 {
1168         struct rtw89_txwd_body_v1 *txwd_body = (struct rtw89_txwd_body_v1 *)txdesc;
1169         struct rtw89_txwd_info *txwd_info;
1170
1171         txwd_body->dword0 = rtw89_build_txwd_body0_v1(desc_info);
1172         txwd_body->dword1 = rtw89_build_txwd_body1_v1(desc_info);
1173         txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
1174         txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
1175         if (desc_info->sec_en) {
1176                 txwd_body->dword4 = rtw89_build_txwd_body4(desc_info);
1177                 txwd_body->dword5 = rtw89_build_txwd_body5(desc_info);
1178         }
1179         txwd_body->dword7 = rtw89_build_txwd_body7_v1(desc_info);
1180
1181         if (!desc_info->en_wd_info)
1182                 return;
1183
1184         txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1);
1185         txwd_info->dword0 = rtw89_build_txwd_info0_v1(desc_info);
1186         txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
1187         txwd_info->dword2 = rtw89_build_txwd_info2_v1(desc_info);
1188         txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
1189 }
1190 EXPORT_SYMBOL(rtw89_core_fill_txdesc_v1);
1191
1192 static __le32 rtw89_build_txwd_fwcmd0_v1(struct rtw89_tx_desc_info *desc_info)
1193 {
1194         u32 dword = FIELD_PREP(AX_RXD_RPKT_LEN_MASK, desc_info->pkt_size) |
1195                     FIELD_PREP(AX_RXD_RPKT_TYPE_MASK, desc_info->fw_dl ?
1196                                                       RTW89_CORE_RX_TYPE_FWDL :
1197                                                       RTW89_CORE_RX_TYPE_H2C);
1198
1199         return cpu_to_le32(dword);
1200 }
1201
1202 void rtw89_core_fill_txdesc_fwcmd_v1(struct rtw89_dev *rtwdev,
1203                                      struct rtw89_tx_desc_info *desc_info,
1204                                      void *txdesc)
1205 {
1206         struct rtw89_rxdesc_short *txwd_v1 = (struct rtw89_rxdesc_short *)txdesc;
1207
1208         txwd_v1->dword0 = rtw89_build_txwd_fwcmd0_v1(desc_info);
1209 }
1210 EXPORT_SYMBOL(rtw89_core_fill_txdesc_fwcmd_v1);
1211
1212 static int rtw89_core_rx_process_mac_ppdu(struct rtw89_dev *rtwdev,
1213                                           struct sk_buff *skb,
1214                                           struct rtw89_rx_phy_ppdu *phy_ppdu)
1215 {
1216         bool rx_cnt_valid = false;
1217         u8 plcp_size = 0;
1218         u8 usr_num = 0;
1219         u8 *phy_sts;
1220
1221         rx_cnt_valid = RTW89_GET_RXINFO_RX_CNT_VLD(skb->data);
1222         plcp_size = RTW89_GET_RXINFO_PLCP_LEN(skb->data) << 3;
1223         usr_num = RTW89_GET_RXINFO_USR_NUM(skb->data);
1224         if (usr_num > RTW89_PPDU_MAX_USR) {
1225                 rtw89_warn(rtwdev, "Invalid user number in mac info\n");
1226                 return -EINVAL;
1227         }
1228
1229         phy_sts = skb->data + RTW89_PPDU_MAC_INFO_SIZE;
1230         phy_sts += usr_num * RTW89_PPDU_MAC_INFO_USR_SIZE;
1231         /* 8-byte alignment */
1232         if (usr_num & BIT(0))
1233                 phy_sts += RTW89_PPDU_MAC_INFO_USR_SIZE;
1234         if (rx_cnt_valid)
1235                 phy_sts += RTW89_PPDU_MAC_RX_CNT_SIZE;
1236         phy_sts += plcp_size;
1237
1238         phy_ppdu->buf = phy_sts;
1239         phy_ppdu->len = skb->data + skb->len - phy_sts;
1240
1241         return 0;
1242 }
1243
1244 static void rtw89_core_rx_process_phy_ppdu_iter(void *data,
1245                                                 struct ieee80211_sta *sta)
1246 {
1247         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1248         struct rtw89_rx_phy_ppdu *phy_ppdu = (struct rtw89_rx_phy_ppdu *)data;
1249         struct rtw89_dev *rtwdev = rtwsta->rtwdev;
1250         struct rtw89_hal *hal = &rtwdev->hal;
1251         u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num;
1252         u8 ant_pos = U8_MAX;
1253         u8 evm_pos = 0;
1254         int i;
1255
1256         if (rtwsta->mac_id != phy_ppdu->mac_id || !phy_ppdu->to_self)
1257                 return;
1258
1259         if (hal->ant_diversity && hal->antenna_rx) {
1260                 ant_pos = __ffs(hal->antenna_rx);
1261                 evm_pos = ant_pos;
1262         }
1263
1264         ewma_rssi_add(&rtwsta->avg_rssi, phy_ppdu->rssi_avg);
1265
1266         if (ant_pos < ant_num) {
1267                 ewma_rssi_add(&rtwsta->rssi[ant_pos], phy_ppdu->rssi[0]);
1268         } else {
1269                 for (i = 0; i < rtwdev->chip->rf_path_num; i++)
1270                         ewma_rssi_add(&rtwsta->rssi[i], phy_ppdu->rssi[i]);
1271         }
1272
1273         if (phy_ppdu->ofdm.has) {
1274                 ewma_snr_add(&rtwsta->avg_snr, phy_ppdu->ofdm.avg_snr);
1275                 ewma_evm_add(&rtwsta->evm_min[evm_pos], phy_ppdu->ofdm.evm_min);
1276                 ewma_evm_add(&rtwsta->evm_max[evm_pos], phy_ppdu->ofdm.evm_max);
1277         }
1278 }
1279
1280 #define VAR_LEN 0xff
1281 #define VAR_LEN_UNIT 8
1282 static u16 rtw89_core_get_phy_status_ie_len(struct rtw89_dev *rtwdev, u8 *addr)
1283 {
1284         static const u8 physts_ie_len_tab[32] = {
1285                 16, 32, 24, 24, 8, 8, 8, 8, VAR_LEN, 8, VAR_LEN, 176, VAR_LEN,
1286                 VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, 16, 24, VAR_LEN,
1287                 VAR_LEN, VAR_LEN, 0, 24, 24, 24, 24, 32, 32, 32, 32
1288         };
1289         u16 ie_len;
1290         u8 ie;
1291
1292         ie = RTW89_GET_PHY_STS_IE_TYPE(addr);
1293         if (physts_ie_len_tab[ie] != VAR_LEN)
1294                 ie_len = physts_ie_len_tab[ie];
1295         else
1296                 ie_len = RTW89_GET_PHY_STS_IE_LEN(addr) * VAR_LEN_UNIT;
1297
1298         return ie_len;
1299 }
1300
1301 static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev, u8 *addr,
1302                                              struct rtw89_rx_phy_ppdu *phy_ppdu)
1303 {
1304         const struct rtw89_phy_sts_ie0 *ie = (const struct rtw89_phy_sts_ie0 *)addr;
1305         s16 cfo;
1306         u32 t;
1307
1308         phy_ppdu->chan_idx = le32_get_bits(ie->w0, RTW89_PHY_STS_IE01_W0_CH_IDX);
1309         if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6)
1310                 return;
1311
1312         if (!phy_ppdu->to_self)
1313                 return;
1314
1315         phy_ppdu->ofdm.avg_snr = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_AVG_SNR);
1316         phy_ppdu->ofdm.evm_max = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_EVM_MAX);
1317         phy_ppdu->ofdm.evm_min = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_EVM_MIN);
1318         phy_ppdu->ofdm.has = true;
1319
1320         /* sign conversion for S(12,2) */
1321         if (rtwdev->chip->cfo_src_fd) {
1322                 t = le32_get_bits(ie->w1, RTW89_PHY_STS_IE01_W1_FD_CFO);
1323                 cfo = sign_extend32(t, 11);
1324         } else {
1325                 t = le32_get_bits(ie->w1, RTW89_PHY_STS_IE01_W1_PREMB_CFO);
1326                 cfo = sign_extend32(t, 11);
1327         }
1328
1329         rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu);
1330 }
1331
1332 static int rtw89_core_process_phy_status_ie(struct rtw89_dev *rtwdev, u8 *addr,
1333                                             struct rtw89_rx_phy_ppdu *phy_ppdu)
1334 {
1335         u8 ie;
1336
1337         ie = RTW89_GET_PHY_STS_IE_TYPE(addr);
1338         switch (ie) {
1339         case RTW89_PHYSTS_IE01_CMN_OFDM:
1340                 rtw89_core_parse_phy_status_ie01(rtwdev, addr, phy_ppdu);
1341                 break;
1342         default:
1343                 break;
1344         }
1345
1346         return 0;
1347 }
1348
1349 static void rtw89_core_update_phy_ppdu(struct rtw89_rx_phy_ppdu *phy_ppdu)
1350 {
1351         u8 *rssi = phy_ppdu->rssi;
1352         u8 *buf = phy_ppdu->buf;
1353
1354         phy_ppdu->ie = RTW89_GET_PHY_STS_IE_MAP(buf);
1355         phy_ppdu->rssi_avg = RTW89_GET_PHY_STS_RSSI_AVG(buf);
1356         rssi[RF_PATH_A] = RTW89_GET_PHY_STS_RSSI_A(buf);
1357         rssi[RF_PATH_B] = RTW89_GET_PHY_STS_RSSI_B(buf);
1358         rssi[RF_PATH_C] = RTW89_GET_PHY_STS_RSSI_C(buf);
1359         rssi[RF_PATH_D] = RTW89_GET_PHY_STS_RSSI_D(buf);
1360 }
1361
1362 static int rtw89_core_rx_process_phy_ppdu(struct rtw89_dev *rtwdev,
1363                                           struct rtw89_rx_phy_ppdu *phy_ppdu)
1364 {
1365         if (RTW89_GET_PHY_STS_LEN(phy_ppdu->buf) << 3 != phy_ppdu->len) {
1366                 rtw89_debug(rtwdev, RTW89_DBG_UNEXP, "phy ppdu len mismatch\n");
1367                 return -EINVAL;
1368         }
1369         rtw89_core_update_phy_ppdu(phy_ppdu);
1370
1371         return 0;
1372 }
1373
1374 static int rtw89_core_rx_parse_phy_sts(struct rtw89_dev *rtwdev,
1375                                        struct rtw89_rx_phy_ppdu *phy_ppdu)
1376 {
1377         u16 ie_len;
1378         u8 *pos, *end;
1379
1380         /* mark invalid reports and bypass them */
1381         if (phy_ppdu->ie < RTW89_CCK_PKT)
1382                 return -EINVAL;
1383
1384         pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN;
1385         end = (u8 *)phy_ppdu->buf + phy_ppdu->len;
1386         while (pos < end) {
1387                 ie_len = rtw89_core_get_phy_status_ie_len(rtwdev, pos);
1388                 rtw89_core_process_phy_status_ie(rtwdev, pos, phy_ppdu);
1389                 pos += ie_len;
1390                 if (pos > end || ie_len == 0) {
1391                         rtw89_debug(rtwdev, RTW89_DBG_TXRX,
1392                                     "phy status parse failed\n");
1393                         return -EINVAL;
1394                 }
1395         }
1396
1397         rtw89_phy_antdiv_parse(rtwdev, phy_ppdu);
1398
1399         return 0;
1400 }
1401
1402 static void rtw89_core_rx_process_phy_sts(struct rtw89_dev *rtwdev,
1403                                           struct rtw89_rx_phy_ppdu *phy_ppdu)
1404 {
1405         int ret;
1406
1407         ret = rtw89_core_rx_parse_phy_sts(rtwdev, phy_ppdu);
1408         if (ret)
1409                 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "parse phy sts failed\n");
1410         else
1411                 phy_ppdu->valid = true;
1412
1413         ieee80211_iterate_stations_atomic(rtwdev->hw,
1414                                           rtw89_core_rx_process_phy_ppdu_iter,
1415                                           phy_ppdu);
1416 }
1417
1418 static u8 rtw89_rxdesc_to_nl_he_gi(struct rtw89_dev *rtwdev,
1419                                    const struct rtw89_rx_desc_info *desc_info,
1420                                    bool rx_status)
1421 {
1422         switch (desc_info->gi_ltf) {
1423         case RTW89_GILTF_SGI_4XHE08:
1424         case RTW89_GILTF_2XHE08:
1425         case RTW89_GILTF_1XHE08:
1426                 return NL80211_RATE_INFO_HE_GI_0_8;
1427         case RTW89_GILTF_2XHE16:
1428         case RTW89_GILTF_1XHE16:
1429                 return NL80211_RATE_INFO_HE_GI_1_6;
1430         case RTW89_GILTF_LGI_4XHE32:
1431                 return NL80211_RATE_INFO_HE_GI_3_2;
1432         default:
1433                 rtw89_warn(rtwdev, "invalid gi_ltf=%d", desc_info->gi_ltf);
1434                 return rx_status ? NL80211_RATE_INFO_HE_GI_3_2 : U8_MAX;
1435         }
1436 }
1437
1438 static bool rtw89_core_rx_ppdu_match(struct rtw89_dev *rtwdev,
1439                                      struct rtw89_rx_desc_info *desc_info,
1440                                      struct ieee80211_rx_status *status)
1441 {
1442         u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1443         u8 data_rate_mode, bw, rate_idx = MASKBYTE0, gi_ltf;
1444         u16 data_rate;
1445         bool ret;
1446
1447         data_rate = desc_info->data_rate;
1448         data_rate_mode = GET_DATA_RATE_MODE(data_rate);
1449         if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
1450                 rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate);
1451                 /* rate_idx is still hardware value here */
1452         } else if (data_rate_mode == DATA_RATE_MODE_HT) {
1453                 rate_idx = GET_DATA_RATE_HT_IDX(data_rate);
1454         } else if (data_rate_mode == DATA_RATE_MODE_VHT) {
1455                 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1456         } else if (data_rate_mode == DATA_RATE_MODE_HE) {
1457                 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1458         } else {
1459                 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
1460         }
1461
1462         bw = rtw89_hw_to_rate_info_bw(desc_info->bw);
1463         gi_ltf = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, false);
1464         ret = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band] == desc_info->ppdu_cnt &&
1465               status->rate_idx == rate_idx &&
1466               status->he_gi == gi_ltf &&
1467               status->bw == bw;
1468
1469         return ret;
1470 }
1471
1472 struct rtw89_vif_rx_stats_iter_data {
1473         struct rtw89_dev *rtwdev;
1474         struct rtw89_rx_phy_ppdu *phy_ppdu;
1475         struct rtw89_rx_desc_info *desc_info;
1476         struct sk_buff *skb;
1477         const u8 *bssid;
1478 };
1479
1480 static void rtw89_stats_trigger_frame(struct rtw89_dev *rtwdev,
1481                                       struct ieee80211_vif *vif,
1482                                       struct sk_buff *skb)
1483 {
1484         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1485         struct ieee80211_trigger *tf = (struct ieee80211_trigger *)skb->data;
1486         u8 *pos, *end, type;
1487         u16 aid;
1488
1489         if (!ether_addr_equal(vif->bss_conf.bssid, tf->ta) ||
1490             rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION ||
1491             rtwvif->net_type == RTW89_NET_TYPE_NO_LINK)
1492                 return;
1493
1494         type = le64_get_bits(tf->common_info, IEEE80211_TRIGGER_TYPE_MASK);
1495         if (type != IEEE80211_TRIGGER_TYPE_BASIC)
1496                 return;
1497
1498         end = (u8 *)tf + skb->len;
1499         pos = tf->variable;
1500
1501         while (end - pos >= RTW89_TF_BASIC_USER_INFO_SZ) {
1502                 aid = RTW89_GET_TF_USER_INFO_AID12(pos);
1503                 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
1504                             "[TF] aid: %d, ul_mcs: %d, rua: %d\n",
1505                             aid, RTW89_GET_TF_USER_INFO_UL_MCS(pos),
1506                             RTW89_GET_TF_USER_INFO_RUA(pos));
1507
1508                 if (aid == RTW89_TF_PAD)
1509                         break;
1510
1511                 if (aid == vif->cfg.aid) {
1512                         rtwvif->stats.rx_tf_acc++;
1513                         rtwdev->stats.rx_tf_acc++;
1514                         break;
1515                 }
1516
1517                 pos += RTW89_TF_BASIC_USER_INFO_SZ;
1518         }
1519 }
1520
1521 static void rtw89_cancel_6ghz_probe_work(struct work_struct *work)
1522 {
1523         struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
1524                                                 cancel_6ghz_probe_work);
1525         struct list_head *pkt_list = rtwdev->scan_info.pkt_list;
1526         struct rtw89_pktofld_info *info;
1527
1528         mutex_lock(&rtwdev->mutex);
1529
1530         if (!rtwdev->scanning)
1531                 goto out;
1532
1533         list_for_each_entry(info, &pkt_list[NL80211_BAND_6GHZ], list) {
1534                 if (!info->cancel || !test_bit(info->id, rtwdev->pkt_offload))
1535                         continue;
1536
1537                 rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id);
1538
1539                 /* Don't delete/free info from pkt_list at this moment. Let it
1540                  * be deleted/freed in rtw89_release_pkt_list() after scanning,
1541                  * since if during scanning, pkt_list is accessed in bottom half.
1542                  */
1543         }
1544
1545 out:
1546         mutex_unlock(&rtwdev->mutex);
1547 }
1548
1549 static void rtw89_core_cancel_6ghz_probe_tx(struct rtw89_dev *rtwdev,
1550                                             struct sk_buff *skb)
1551 {
1552         struct ieee80211_rx_status *rx_status = IEEE80211_SKB_RXCB(skb);
1553         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
1554         struct list_head *pkt_list = rtwdev->scan_info.pkt_list;
1555         struct rtw89_pktofld_info *info;
1556         const u8 *ies = mgmt->u.beacon.variable, *ssid_ie;
1557         bool queue_work = false;
1558
1559         if (rx_status->band != NL80211_BAND_6GHZ)
1560                 return;
1561
1562         ssid_ie = cfg80211_find_ie(WLAN_EID_SSID, ies, skb->len);
1563
1564         list_for_each_entry(info, &pkt_list[NL80211_BAND_6GHZ], list) {
1565                 if (ether_addr_equal(info->bssid, mgmt->bssid)) {
1566                         info->cancel = true;
1567                         queue_work = true;
1568                         continue;
1569                 }
1570
1571                 if (!ssid_ie || ssid_ie[1] != info->ssid_len || info->ssid_len == 0)
1572                         continue;
1573
1574                 if (memcmp(&ssid_ie[2], info->ssid, info->ssid_len) == 0) {
1575                         info->cancel = true;
1576                         queue_work = true;
1577                 }
1578         }
1579
1580         if (queue_work)
1581                 ieee80211_queue_work(rtwdev->hw, &rtwdev->cancel_6ghz_probe_work);
1582 }
1583
1584 static void rtw89_vif_rx_stats_iter(void *data, u8 *mac,
1585                                     struct ieee80211_vif *vif)
1586 {
1587         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1588         struct rtw89_vif_rx_stats_iter_data *iter_data = data;
1589         struct rtw89_dev *rtwdev = iter_data->rtwdev;
1590         struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.cur_pkt_stat;
1591         struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
1592         struct sk_buff *skb = iter_data->skb;
1593         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1594         struct rtw89_rx_phy_ppdu *phy_ppdu = iter_data->phy_ppdu;
1595         const u8 *bssid = iter_data->bssid;
1596
1597         if (rtwdev->scanning &&
1598             (ieee80211_is_beacon(hdr->frame_control) ||
1599              ieee80211_is_probe_resp(hdr->frame_control)))
1600                 rtw89_core_cancel_6ghz_probe_tx(rtwdev, skb);
1601
1602         if (!vif->bss_conf.bssid)
1603                 return;
1604
1605         if (ieee80211_is_trigger(hdr->frame_control)) {
1606                 rtw89_stats_trigger_frame(rtwdev, vif, skb);
1607                 return;
1608         }
1609
1610         if (!ether_addr_equal(vif->bss_conf.bssid, bssid))
1611                 return;
1612
1613         if (ieee80211_is_beacon(hdr->frame_control)) {
1614                 if (vif->type == NL80211_IFTYPE_STATION)
1615                         rtw89_fw_h2c_rssi_offload(rtwdev, phy_ppdu);
1616                 pkt_stat->beacon_nr++;
1617         }
1618
1619         if (!ether_addr_equal(vif->addr, hdr->addr1))
1620                 return;
1621
1622         if (desc_info->data_rate < RTW89_HW_RATE_NR)
1623                 pkt_stat->rx_rate_cnt[desc_info->data_rate]++;
1624
1625         rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, false);
1626 }
1627
1628 static void rtw89_core_rx_stats(struct rtw89_dev *rtwdev,
1629                                 struct rtw89_rx_phy_ppdu *phy_ppdu,
1630                                 struct rtw89_rx_desc_info *desc_info,
1631                                 struct sk_buff *skb)
1632 {
1633         struct rtw89_vif_rx_stats_iter_data iter_data;
1634
1635         rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, false);
1636
1637         iter_data.rtwdev = rtwdev;
1638         iter_data.phy_ppdu = phy_ppdu;
1639         iter_data.desc_info = desc_info;
1640         iter_data.skb = skb;
1641         iter_data.bssid = get_hdr_bssid((struct ieee80211_hdr *)skb->data);
1642         rtw89_iterate_vifs_bh(rtwdev, rtw89_vif_rx_stats_iter, &iter_data);
1643 }
1644
1645 static void rtw89_correct_cck_chan(struct rtw89_dev *rtwdev,
1646                                    struct ieee80211_rx_status *status)
1647 {
1648         const struct rtw89_chan_rcd *rcd =
1649                 rtw89_chan_rcd_get(rtwdev, RTW89_SUB_ENTITY_0);
1650         u16 chan = rcd->prev_primary_channel;
1651         u8 band = rcd->prev_band_type == RTW89_BAND_2G ?
1652                   NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
1653
1654         if (status->band != NL80211_BAND_2GHZ &&
1655             status->encoding == RX_ENC_LEGACY &&
1656             status->rate_idx < RTW89_HW_RATE_OFDM6) {
1657                 status->freq = ieee80211_channel_to_frequency(chan, band);
1658                 status->band = band;
1659         }
1660 }
1661
1662 static void rtw89_core_hw_to_sband_rate(struct ieee80211_rx_status *rx_status)
1663 {
1664         if (rx_status->band == NL80211_BAND_2GHZ ||
1665             rx_status->encoding != RX_ENC_LEGACY)
1666                 return;
1667
1668         /* Some control frames' freq(ACKs in this case) are reported wrong due
1669          * to FW notify timing, set to lowest rate to prevent overflow.
1670          */
1671         if (rx_status->rate_idx < RTW89_HW_RATE_OFDM6) {
1672                 rx_status->rate_idx = 0;
1673                 return;
1674         }
1675
1676         /* No 4 CCK rates for non-2G */
1677         rx_status->rate_idx -= 4;
1678 }
1679
1680 static void rtw89_core_update_radiotap(struct rtw89_dev *rtwdev,
1681                                        struct sk_buff *skb,
1682                                        struct ieee80211_rx_status *rx_status)
1683 {
1684         static const struct ieee80211_radiotap_he known_he = {
1685                 .data1 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN |
1686                                      IEEE80211_RADIOTAP_HE_DATA1_BW_RU_ALLOC_KNOWN),
1687                 .data2 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN),
1688         };
1689         struct ieee80211_radiotap_he *he;
1690
1691         if (!(rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR))
1692                 return;
1693
1694         if (rx_status->encoding == RX_ENC_HE) {
1695                 rx_status->flag |= RX_FLAG_RADIOTAP_HE;
1696                 he = skb_push(skb, sizeof(*he));
1697                 *he = known_he;
1698         }
1699 }
1700
1701 static void rtw89_core_rx_to_mac80211(struct rtw89_dev *rtwdev,
1702                                       struct rtw89_rx_phy_ppdu *phy_ppdu,
1703                                       struct rtw89_rx_desc_info *desc_info,
1704                                       struct sk_buff *skb_ppdu,
1705                                       struct ieee80211_rx_status *rx_status)
1706 {
1707         struct napi_struct *napi = &rtwdev->napi;
1708
1709         /* In low power mode, napi isn't scheduled. Receive it to netif. */
1710         if (unlikely(!test_bit(NAPI_STATE_SCHED, &napi->state)))
1711                 napi = NULL;
1712
1713         rtw89_core_hw_to_sband_rate(rx_status);
1714         rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu);
1715         rtw89_core_update_radiotap(rtwdev, skb_ppdu, rx_status);
1716         /* In low power mode, it does RX in thread context. */
1717         local_bh_disable();
1718         ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, napi);
1719         local_bh_enable();
1720         rtwdev->napi_budget_countdown--;
1721 }
1722
1723 static void rtw89_core_rx_pending_skb(struct rtw89_dev *rtwdev,
1724                                       struct rtw89_rx_phy_ppdu *phy_ppdu,
1725                                       struct rtw89_rx_desc_info *desc_info,
1726                                       struct sk_buff *skb)
1727 {
1728         u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1729         int curr = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band];
1730         struct sk_buff *skb_ppdu = NULL, *tmp;
1731         struct ieee80211_rx_status *rx_status;
1732
1733         if (curr > RTW89_MAX_PPDU_CNT)
1734                 return;
1735
1736         skb_queue_walk_safe(&rtwdev->ppdu_sts.rx_queue[band], skb_ppdu, tmp) {
1737                 skb_unlink(skb_ppdu, &rtwdev->ppdu_sts.rx_queue[band]);
1738                 rx_status = IEEE80211_SKB_RXCB(skb_ppdu);
1739                 if (rtw89_core_rx_ppdu_match(rtwdev, desc_info, rx_status))
1740                         rtw89_chip_query_ppdu(rtwdev, phy_ppdu, rx_status);
1741                 rtw89_correct_cck_chan(rtwdev, rx_status);
1742                 rtw89_core_rx_to_mac80211(rtwdev, phy_ppdu, desc_info, skb_ppdu, rx_status);
1743         }
1744 }
1745
1746 static void rtw89_core_rx_process_ppdu_sts(struct rtw89_dev *rtwdev,
1747                                            struct rtw89_rx_desc_info *desc_info,
1748                                            struct sk_buff *skb)
1749 {
1750         struct rtw89_rx_phy_ppdu phy_ppdu = {.buf = skb->data, .valid = false,
1751                                              .len = skb->len,
1752                                              .to_self = desc_info->addr1_match,
1753                                              .rate = desc_info->data_rate,
1754                                              .mac_id = desc_info->mac_id};
1755         int ret;
1756
1757         if (desc_info->mac_info_valid)
1758                 rtw89_core_rx_process_mac_ppdu(rtwdev, skb, &phy_ppdu);
1759         ret = rtw89_core_rx_process_phy_ppdu(rtwdev, &phy_ppdu);
1760         if (ret)
1761                 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "process ppdu failed\n");
1762
1763         rtw89_core_rx_process_phy_sts(rtwdev, &phy_ppdu);
1764         rtw89_core_rx_pending_skb(rtwdev, &phy_ppdu, desc_info, skb);
1765         dev_kfree_skb_any(skb);
1766 }
1767
1768 static void rtw89_core_rx_process_report(struct rtw89_dev *rtwdev,
1769                                          struct rtw89_rx_desc_info *desc_info,
1770                                          struct sk_buff *skb)
1771 {
1772         switch (desc_info->pkt_type) {
1773         case RTW89_CORE_RX_TYPE_C2H:
1774                 rtw89_fw_c2h_irqsafe(rtwdev, skb);
1775                 break;
1776         case RTW89_CORE_RX_TYPE_PPDU_STAT:
1777                 rtw89_core_rx_process_ppdu_sts(rtwdev, desc_info, skb);
1778                 break;
1779         default:
1780                 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "unhandled pkt_type=%d\n",
1781                             desc_info->pkt_type);
1782                 dev_kfree_skb_any(skb);
1783                 break;
1784         }
1785 }
1786
1787 void rtw89_core_query_rxdesc(struct rtw89_dev *rtwdev,
1788                              struct rtw89_rx_desc_info *desc_info,
1789                              u8 *data, u32 data_offset)
1790 {
1791         const struct rtw89_chip_info *chip = rtwdev->chip;
1792         struct rtw89_rxdesc_short *rxd_s;
1793         struct rtw89_rxdesc_long *rxd_l;
1794         u8 shift_len, drv_info_len;
1795
1796         rxd_s = (struct rtw89_rxdesc_short *)(data + data_offset);
1797         desc_info->pkt_size = RTW89_GET_RXWD_PKT_SIZE(rxd_s);
1798         desc_info->drv_info_size = RTW89_GET_RXWD_DRV_INFO_SIZE(rxd_s);
1799         desc_info->long_rxdesc = RTW89_GET_RXWD_LONG_RXD(rxd_s);
1800         desc_info->pkt_type = RTW89_GET_RXWD_RPKT_TYPE(rxd_s);
1801         desc_info->mac_info_valid = RTW89_GET_RXWD_MAC_INFO_VALID(rxd_s);
1802         if (chip->chip_id == RTL8852C)
1803                 desc_info->bw = RTW89_GET_RXWD_BW_V1(rxd_s);
1804         else
1805                 desc_info->bw = RTW89_GET_RXWD_BW(rxd_s);
1806         desc_info->data_rate = RTW89_GET_RXWD_DATA_RATE(rxd_s);
1807         desc_info->gi_ltf = RTW89_GET_RXWD_GI_LTF(rxd_s);
1808         desc_info->user_id = RTW89_GET_RXWD_USER_ID(rxd_s);
1809         desc_info->sr_en = RTW89_GET_RXWD_SR_EN(rxd_s);
1810         desc_info->ppdu_cnt = RTW89_GET_RXWD_PPDU_CNT(rxd_s);
1811         desc_info->ppdu_type = RTW89_GET_RXWD_PPDU_TYPE(rxd_s);
1812         desc_info->free_run_cnt = RTW89_GET_RXWD_FREE_RUN_CNT(rxd_s);
1813         desc_info->icv_err = RTW89_GET_RXWD_ICV_ERR(rxd_s);
1814         desc_info->crc32_err = RTW89_GET_RXWD_CRC32_ERR(rxd_s);
1815         desc_info->hw_dec = RTW89_GET_RXWD_HW_DEC(rxd_s);
1816         desc_info->sw_dec = RTW89_GET_RXWD_SW_DEC(rxd_s);
1817         desc_info->addr1_match = RTW89_GET_RXWD_A1_MATCH(rxd_s);
1818
1819         shift_len = desc_info->shift << 1; /* 2-byte unit */
1820         drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */
1821         desc_info->offset = data_offset + shift_len + drv_info_len;
1822         desc_info->ready = true;
1823
1824         if (!desc_info->long_rxdesc)
1825                 return;
1826
1827         rxd_l = (struct rtw89_rxdesc_long *)(data + data_offset);
1828         desc_info->frame_type = RTW89_GET_RXWD_TYPE(rxd_l);
1829         desc_info->addr_cam_valid = RTW89_GET_RXWD_ADDR_CAM_VLD(rxd_l);
1830         desc_info->addr_cam_id = RTW89_GET_RXWD_ADDR_CAM_ID(rxd_l);
1831         desc_info->sec_cam_id = RTW89_GET_RXWD_SEC_CAM_ID(rxd_l);
1832         desc_info->mac_id = RTW89_GET_RXWD_MAC_ID(rxd_l);
1833         desc_info->rx_pl_id = RTW89_GET_RXWD_RX_PL_ID(rxd_l);
1834 }
1835 EXPORT_SYMBOL(rtw89_core_query_rxdesc);
1836
1837 struct rtw89_core_iter_rx_status {
1838         struct rtw89_dev *rtwdev;
1839         struct ieee80211_rx_status *rx_status;
1840         struct rtw89_rx_desc_info *desc_info;
1841         u8 mac_id;
1842 };
1843
1844 static
1845 void rtw89_core_stats_sta_rx_status_iter(void *data, struct ieee80211_sta *sta)
1846 {
1847         struct rtw89_core_iter_rx_status *iter_data =
1848                                 (struct rtw89_core_iter_rx_status *)data;
1849         struct ieee80211_rx_status *rx_status = iter_data->rx_status;
1850         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1851         struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
1852         u8 mac_id = iter_data->mac_id;
1853
1854         if (mac_id != rtwsta->mac_id)
1855                 return;
1856
1857         rtwsta->rx_status = *rx_status;
1858         rtwsta->rx_hw_rate = desc_info->data_rate;
1859 }
1860
1861 static void rtw89_core_stats_sta_rx_status(struct rtw89_dev *rtwdev,
1862                                            struct rtw89_rx_desc_info *desc_info,
1863                                            struct ieee80211_rx_status *rx_status)
1864 {
1865         struct rtw89_core_iter_rx_status iter_data;
1866
1867         if (!desc_info->addr1_match || !desc_info->long_rxdesc)
1868                 return;
1869
1870         if (desc_info->frame_type != RTW89_RX_TYPE_DATA)
1871                 return;
1872
1873         iter_data.rtwdev = rtwdev;
1874         iter_data.rx_status = rx_status;
1875         iter_data.desc_info = desc_info;
1876         iter_data.mac_id = desc_info->mac_id;
1877         ieee80211_iterate_stations_atomic(rtwdev->hw,
1878                                           rtw89_core_stats_sta_rx_status_iter,
1879                                           &iter_data);
1880 }
1881
1882 static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev,
1883                                         struct rtw89_rx_desc_info *desc_info,
1884                                         struct ieee80211_rx_status *rx_status)
1885 {
1886         const struct cfg80211_chan_def *chandef =
1887                 rtw89_chandef_get(rtwdev, RTW89_SUB_ENTITY_0);
1888         const struct rtw89_chan *cur = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
1889         u16 data_rate;
1890         u8 data_rate_mode;
1891
1892         /* currently using single PHY */
1893         rx_status->freq = chandef->chan->center_freq;
1894         rx_status->band = chandef->chan->band;
1895
1896         if (rtwdev->scanning &&
1897             RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &rtwdev->fw)) {
1898                 u8 chan = cur->primary_channel;
1899                 u8 band = cur->band_type;
1900                 enum nl80211_band nl_band;
1901
1902                 nl_band = rtw89_hw_to_nl80211_band(band);
1903                 rx_status->freq = ieee80211_channel_to_frequency(chan, nl_band);
1904                 rx_status->band = nl_band;
1905         }
1906
1907         if (desc_info->icv_err || desc_info->crc32_err)
1908                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
1909
1910         if (desc_info->hw_dec &&
1911             !(desc_info->sw_dec || desc_info->icv_err))
1912                 rx_status->flag |= RX_FLAG_DECRYPTED;
1913
1914         rx_status->bw = rtw89_hw_to_rate_info_bw(desc_info->bw);
1915
1916         data_rate = desc_info->data_rate;
1917         data_rate_mode = GET_DATA_RATE_MODE(data_rate);
1918         if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
1919                 rx_status->encoding = RX_ENC_LEGACY;
1920                 rx_status->rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate);
1921                 /* convert rate_idx after we get the correct band */
1922         } else if (data_rate_mode == DATA_RATE_MODE_HT) {
1923                 rx_status->encoding = RX_ENC_HT;
1924                 rx_status->rate_idx = GET_DATA_RATE_HT_IDX(data_rate);
1925                 if (desc_info->gi_ltf)
1926                         rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1927         } else if (data_rate_mode == DATA_RATE_MODE_VHT) {
1928                 rx_status->encoding = RX_ENC_VHT;
1929                 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1930                 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1;
1931                 if (desc_info->gi_ltf)
1932                         rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1933         } else if (data_rate_mode == DATA_RATE_MODE_HE) {
1934                 rx_status->encoding = RX_ENC_HE;
1935                 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1936                 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1;
1937         } else {
1938                 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
1939         }
1940
1941         /* he_gi is used to match ppdu, so we always fill it. */
1942         rx_status->he_gi = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, true);
1943         rx_status->flag |= RX_FLAG_MACTIME_START;
1944         rx_status->mactime = desc_info->free_run_cnt;
1945
1946         rtw89_core_stats_sta_rx_status(rtwdev, desc_info, rx_status);
1947 }
1948
1949 static enum rtw89_ps_mode rtw89_update_ps_mode(struct rtw89_dev *rtwdev)
1950 {
1951         const struct rtw89_chip_info *chip = rtwdev->chip;
1952
1953         if (rtw89_disable_ps_mode || !chip->ps_mode_supported ||
1954             RTW89_CHK_FW_FEATURE(NO_DEEP_PS, &rtwdev->fw))
1955                 return RTW89_PS_MODE_NONE;
1956
1957         if ((chip->ps_mode_supported & BIT(RTW89_PS_MODE_PWR_GATED)) &&
1958             !RTW89_CHK_FW_FEATURE(NO_LPS_PG, &rtwdev->fw))
1959                 return RTW89_PS_MODE_PWR_GATED;
1960
1961         if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_CLK_GATED))
1962                 return RTW89_PS_MODE_CLK_GATED;
1963
1964         if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_RFOFF))
1965                 return RTW89_PS_MODE_RFOFF;
1966
1967         return RTW89_PS_MODE_NONE;
1968 }
1969
1970 static void rtw89_core_flush_ppdu_rx_queue(struct rtw89_dev *rtwdev,
1971                                            struct rtw89_rx_desc_info *desc_info)
1972 {
1973         struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
1974         u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1975         struct ieee80211_rx_status *rx_status;
1976         struct sk_buff *skb_ppdu, *tmp;
1977
1978         skb_queue_walk_safe(&ppdu_sts->rx_queue[band], skb_ppdu, tmp) {
1979                 skb_unlink(skb_ppdu, &ppdu_sts->rx_queue[band]);
1980                 rx_status = IEEE80211_SKB_RXCB(skb_ppdu);
1981                 rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb_ppdu, rx_status);
1982         }
1983 }
1984
1985 void rtw89_core_rx(struct rtw89_dev *rtwdev,
1986                    struct rtw89_rx_desc_info *desc_info,
1987                    struct sk_buff *skb)
1988 {
1989         struct ieee80211_rx_status *rx_status;
1990         struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
1991         u8 ppdu_cnt = desc_info->ppdu_cnt;
1992         u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1993
1994         if (desc_info->pkt_type != RTW89_CORE_RX_TYPE_WIFI) {
1995                 rtw89_core_rx_process_report(rtwdev, desc_info, skb);
1996                 return;
1997         }
1998
1999         if (ppdu_sts->curr_rx_ppdu_cnt[band] != ppdu_cnt) {
2000                 rtw89_core_flush_ppdu_rx_queue(rtwdev, desc_info);
2001                 ppdu_sts->curr_rx_ppdu_cnt[band] = ppdu_cnt;
2002         }
2003
2004         rx_status = IEEE80211_SKB_RXCB(skb);
2005         memset(rx_status, 0, sizeof(*rx_status));
2006         rtw89_core_update_rx_status(rtwdev, desc_info, rx_status);
2007         if (desc_info->long_rxdesc &&
2008             BIT(desc_info->frame_type) & PPDU_FILTER_BITMAP)
2009                 skb_queue_tail(&ppdu_sts->rx_queue[band], skb);
2010         else
2011                 rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb, rx_status);
2012 }
2013 EXPORT_SYMBOL(rtw89_core_rx);
2014
2015 void rtw89_core_napi_start(struct rtw89_dev *rtwdev)
2016 {
2017         if (test_and_set_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
2018                 return;
2019
2020         napi_enable(&rtwdev->napi);
2021 }
2022 EXPORT_SYMBOL(rtw89_core_napi_start);
2023
2024 void rtw89_core_napi_stop(struct rtw89_dev *rtwdev)
2025 {
2026         if (!test_and_clear_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
2027                 return;
2028
2029         napi_synchronize(&rtwdev->napi);
2030         napi_disable(&rtwdev->napi);
2031 }
2032 EXPORT_SYMBOL(rtw89_core_napi_stop);
2033
2034 void rtw89_core_napi_init(struct rtw89_dev *rtwdev)
2035 {
2036         init_dummy_netdev(&rtwdev->netdev);
2037         netif_napi_add(&rtwdev->netdev, &rtwdev->napi,
2038                        rtwdev->hci.ops->napi_poll);
2039 }
2040 EXPORT_SYMBOL(rtw89_core_napi_init);
2041
2042 void rtw89_core_napi_deinit(struct rtw89_dev *rtwdev)
2043 {
2044         rtw89_core_napi_stop(rtwdev);
2045         netif_napi_del(&rtwdev->napi);
2046 }
2047 EXPORT_SYMBOL(rtw89_core_napi_deinit);
2048
2049 static void rtw89_core_ba_work(struct work_struct *work)
2050 {
2051         struct rtw89_dev *rtwdev =
2052                 container_of(work, struct rtw89_dev, ba_work);
2053         struct rtw89_txq *rtwtxq, *tmp;
2054         int ret;
2055
2056         spin_lock_bh(&rtwdev->ba_lock);
2057         list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
2058                 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2059                 struct ieee80211_sta *sta = txq->sta;
2060                 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
2061                 u8 tid = txq->tid;
2062
2063                 if (!sta) {
2064                         rtw89_warn(rtwdev, "cannot start BA without sta\n");
2065                         goto skip_ba_work;
2066                 }
2067
2068                 if (rtwsta->disassoc) {
2069                         rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2070                                     "cannot start BA with disassoc sta\n");
2071                         goto skip_ba_work;
2072                 }
2073
2074                 ret = ieee80211_start_tx_ba_session(sta, tid, 0);
2075                 if (ret) {
2076                         rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2077                                     "failed to setup BA session for %pM:%2d: %d\n",
2078                                     sta->addr, tid, ret);
2079                         if (ret == -EINVAL)
2080                                 set_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags);
2081                 }
2082 skip_ba_work:
2083                 list_del_init(&rtwtxq->list);
2084         }
2085         spin_unlock_bh(&rtwdev->ba_lock);
2086 }
2087
2088 static void rtw89_core_free_sta_pending_ba(struct rtw89_dev *rtwdev,
2089                                            struct ieee80211_sta *sta)
2090 {
2091         struct rtw89_txq *rtwtxq, *tmp;
2092
2093         spin_lock_bh(&rtwdev->ba_lock);
2094         list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
2095                 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2096
2097                 if (sta == txq->sta)
2098                         list_del_init(&rtwtxq->list);
2099         }
2100         spin_unlock_bh(&rtwdev->ba_lock);
2101 }
2102
2103 static void rtw89_core_free_sta_pending_forbid_ba(struct rtw89_dev *rtwdev,
2104                                                   struct ieee80211_sta *sta)
2105 {
2106         struct rtw89_txq *rtwtxq, *tmp;
2107
2108         spin_lock_bh(&rtwdev->ba_lock);
2109         list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->forbid_ba_list, list) {
2110                 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2111
2112                 if (sta == txq->sta) {
2113                         clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
2114                         list_del_init(&rtwtxq->list);
2115                 }
2116         }
2117         spin_unlock_bh(&rtwdev->ba_lock);
2118 }
2119
2120 static void rtw89_core_free_sta_pending_roc_tx(struct rtw89_dev *rtwdev,
2121                                                struct ieee80211_sta *sta)
2122 {
2123         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2124         struct sk_buff *skb, *tmp;
2125
2126         skb_queue_walk_safe(&rtwsta->roc_queue, skb, tmp) {
2127                 skb_unlink(skb, &rtwsta->roc_queue);
2128                 dev_kfree_skb_any(skb);
2129         }
2130 }
2131
2132 static void rtw89_core_stop_tx_ba_session(struct rtw89_dev *rtwdev,
2133                                           struct rtw89_txq *rtwtxq)
2134 {
2135         struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2136         struct ieee80211_sta *sta = txq->sta;
2137         struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
2138
2139         if (unlikely(!rtwsta) || unlikely(rtwsta->disassoc))
2140                 return;
2141
2142         if (!test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags) ||
2143             test_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
2144                 return;
2145
2146         spin_lock_bh(&rtwdev->ba_lock);
2147         if (!test_and_set_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
2148                 list_add_tail(&rtwtxq->list, &rtwdev->forbid_ba_list);
2149         spin_unlock_bh(&rtwdev->ba_lock);
2150
2151         ieee80211_stop_tx_ba_session(sta, txq->tid);
2152         cancel_delayed_work(&rtwdev->forbid_ba_work);
2153         ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->forbid_ba_work,
2154                                      RTW89_FORBID_BA_TIMER);
2155 }
2156
2157 static void rtw89_core_txq_check_agg(struct rtw89_dev *rtwdev,
2158                                      struct rtw89_txq *rtwtxq,
2159                                      struct sk_buff *skb)
2160 {
2161         struct ieee80211_hw *hw = rtwdev->hw;
2162         struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2163         struct ieee80211_sta *sta = txq->sta;
2164         struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
2165
2166         if (test_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags))
2167                 return;
2168
2169         if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE))) {
2170                 rtw89_core_stop_tx_ba_session(rtwdev, rtwtxq);
2171                 return;
2172         }
2173
2174         if (unlikely(!sta))
2175                 return;
2176
2177         if (unlikely(test_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags)))
2178                 return;
2179
2180         if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags)) {
2181                 IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_CTL_AMPDU;
2182                 return;
2183         }
2184
2185         spin_lock_bh(&rtwdev->ba_lock);
2186         if (!rtwsta->disassoc && list_empty(&rtwtxq->list)) {
2187                 list_add_tail(&rtwtxq->list, &rtwdev->ba_list);
2188                 ieee80211_queue_work(hw, &rtwdev->ba_work);
2189         }
2190         spin_unlock_bh(&rtwdev->ba_lock);
2191 }
2192
2193 static void rtw89_core_txq_push(struct rtw89_dev *rtwdev,
2194                                 struct rtw89_txq *rtwtxq,
2195                                 unsigned long frame_cnt,
2196                                 unsigned long byte_cnt)
2197 {
2198         struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
2199         struct ieee80211_vif *vif = txq->vif;
2200         struct ieee80211_sta *sta = txq->sta;
2201         struct sk_buff *skb;
2202         unsigned long i;
2203         int ret;
2204
2205         rcu_read_lock();
2206         for (i = 0; i < frame_cnt; i++) {
2207                 skb = ieee80211_tx_dequeue_ni(rtwdev->hw, txq);
2208                 if (!skb) {
2209                         rtw89_debug(rtwdev, RTW89_DBG_TXRX, "dequeue a NULL skb\n");
2210                         goto out;
2211                 }
2212                 rtw89_core_txq_check_agg(rtwdev, rtwtxq, skb);
2213                 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, NULL);
2214                 if (ret) {
2215                         rtw89_err(rtwdev, "failed to push txq: %d\n", ret);
2216                         ieee80211_free_txskb(rtwdev->hw, skb);
2217                         break;
2218                 }
2219         }
2220 out:
2221         rcu_read_unlock();
2222 }
2223
2224 static u32 rtw89_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 tid)
2225 {
2226         u8 qsel, ch_dma;
2227
2228         qsel = rtw89_core_get_qsel(rtwdev, tid);
2229         ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
2230
2231         return rtw89_hci_check_and_reclaim_tx_resource(rtwdev, ch_dma);
2232 }
2233
2234 static bool rtw89_core_txq_agg_wait(struct rtw89_dev *rtwdev,
2235                                     struct ieee80211_txq *txq,
2236                                     unsigned long *frame_cnt,
2237                                     bool *sched_txq, bool *reinvoke)
2238 {
2239         struct rtw89_txq *rtwtxq = (struct rtw89_txq *)txq->drv_priv;
2240         struct ieee80211_sta *sta = txq->sta;
2241         struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
2242
2243         if (!sta || rtwsta->max_agg_wait <= 0)
2244                 return false;
2245
2246         if (rtwdev->stats.tx_tfc_lv <= RTW89_TFC_MID)
2247                 return false;
2248
2249         if (*frame_cnt > 1) {
2250                 *frame_cnt -= 1;
2251                 *sched_txq = true;
2252                 *reinvoke = true;
2253                 rtwtxq->wait_cnt = 1;
2254                 return false;
2255         }
2256
2257         if (*frame_cnt == 1 && rtwtxq->wait_cnt < rtwsta->max_agg_wait) {
2258                 *reinvoke = true;
2259                 rtwtxq->wait_cnt++;
2260                 return true;
2261         }
2262
2263         rtwtxq->wait_cnt = 0;
2264         return false;
2265 }
2266
2267 static void rtw89_core_txq_schedule(struct rtw89_dev *rtwdev, u8 ac, bool *reinvoke)
2268 {
2269         struct ieee80211_hw *hw = rtwdev->hw;
2270         struct ieee80211_txq *txq;
2271         struct rtw89_vif *rtwvif;
2272         struct rtw89_txq *rtwtxq;
2273         unsigned long frame_cnt;
2274         unsigned long byte_cnt;
2275         u32 tx_resource;
2276         bool sched_txq;
2277
2278         ieee80211_txq_schedule_start(hw, ac);
2279         while ((txq = ieee80211_next_txq(hw, ac))) {
2280                 rtwtxq = (struct rtw89_txq *)txq->drv_priv;
2281                 rtwvif = (struct rtw89_vif *)txq->vif->drv_priv;
2282
2283                 if (rtwvif->offchan) {
2284                         ieee80211_return_txq(hw, txq, true);
2285                         continue;
2286                 }
2287                 tx_resource = rtw89_check_and_reclaim_tx_resource(rtwdev, txq->tid);
2288                 sched_txq = false;
2289
2290                 ieee80211_txq_get_depth(txq, &frame_cnt, &byte_cnt);
2291                 if (rtw89_core_txq_agg_wait(rtwdev, txq, &frame_cnt, &sched_txq, reinvoke)) {
2292                         ieee80211_return_txq(hw, txq, true);
2293                         continue;
2294                 }
2295                 frame_cnt = min_t(unsigned long, frame_cnt, tx_resource);
2296                 rtw89_core_txq_push(rtwdev, rtwtxq, frame_cnt, byte_cnt);
2297                 ieee80211_return_txq(hw, txq, sched_txq);
2298                 if (frame_cnt != 0)
2299                         rtw89_core_tx_kick_off(rtwdev, rtw89_core_get_qsel(rtwdev, txq->tid));
2300
2301                 /* bound of tx_resource could get stuck due to burst traffic */
2302                 if (frame_cnt == tx_resource)
2303                         *reinvoke = true;
2304         }
2305         ieee80211_txq_schedule_end(hw, ac);
2306 }
2307
2308 static void rtw89_ips_work(struct work_struct *work)
2309 {
2310         struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
2311                                                 ips_work);
2312         mutex_lock(&rtwdev->mutex);
2313         rtw89_enter_ips_by_hwflags(rtwdev);
2314         mutex_unlock(&rtwdev->mutex);
2315 }
2316
2317 static void rtw89_core_txq_work(struct work_struct *w)
2318 {
2319         struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, txq_work);
2320         bool reinvoke = false;
2321         u8 ac;
2322
2323         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2324                 rtw89_core_txq_schedule(rtwdev, ac, &reinvoke);
2325
2326         if (reinvoke) {
2327                 /* reinvoke to process the last frame */
2328                 mod_delayed_work(rtwdev->txq_wq, &rtwdev->txq_reinvoke_work, 1);
2329         }
2330 }
2331
2332 static void rtw89_core_txq_reinvoke_work(struct work_struct *w)
2333 {
2334         struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev,
2335                                                 txq_reinvoke_work.work);
2336
2337         queue_work(rtwdev->txq_wq, &rtwdev->txq_work);
2338 }
2339
2340 static void rtw89_forbid_ba_work(struct work_struct *w)
2341 {
2342         struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev,
2343                                                 forbid_ba_work.work);
2344         struct rtw89_txq *rtwtxq, *tmp;
2345
2346         spin_lock_bh(&rtwdev->ba_lock);
2347         list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->forbid_ba_list, list) {
2348                 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
2349                 list_del_init(&rtwtxq->list);
2350         }
2351         spin_unlock_bh(&rtwdev->ba_lock);
2352 }
2353
2354 static void rtw89_core_sta_pending_tx_iter(void *data,
2355                                            struct ieee80211_sta *sta)
2356 {
2357         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2358         struct rtw89_vif *rtwvif_target = data, *rtwvif = rtwsta->rtwvif;
2359         struct rtw89_dev *rtwdev = rtwvif->rtwdev;
2360         struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
2361         struct sk_buff *skb, *tmp;
2362         int qsel, ret;
2363
2364         if (rtwvif->sub_entity_idx != rtwvif_target->sub_entity_idx)
2365                 return;
2366
2367         if (skb_queue_len(&rtwsta->roc_queue) == 0)
2368                 return;
2369
2370         skb_queue_walk_safe(&rtwsta->roc_queue, skb, tmp) {
2371                 skb_unlink(skb, &rtwsta->roc_queue);
2372
2373                 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, &qsel);
2374                 if (ret) {
2375                         rtw89_warn(rtwdev, "pending tx failed with %d\n", ret);
2376                         dev_kfree_skb_any(skb);
2377                 } else {
2378                         rtw89_core_tx_kick_off(rtwdev, qsel);
2379                 }
2380         }
2381 }
2382
2383 static void rtw89_core_handle_sta_pending_tx(struct rtw89_dev *rtwdev,
2384                                              struct rtw89_vif *rtwvif)
2385 {
2386         ieee80211_iterate_stations_atomic(rtwdev->hw,
2387                                           rtw89_core_sta_pending_tx_iter,
2388                                           rtwvif);
2389 }
2390
2391 static int rtw89_core_send_nullfunc(struct rtw89_dev *rtwdev,
2392                                     struct rtw89_vif *rtwvif, bool qos, bool ps)
2393 {
2394         struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
2395         struct ieee80211_sta *sta;
2396         struct ieee80211_hdr *hdr;
2397         struct sk_buff *skb;
2398         int ret, qsel;
2399
2400         if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc)
2401                 return 0;
2402
2403         rcu_read_lock();
2404         sta = ieee80211_find_sta(vif, vif->bss_conf.bssid);
2405         if (!sta) {
2406                 ret = -EINVAL;
2407                 goto out;
2408         }
2409
2410         skb = ieee80211_nullfunc_get(rtwdev->hw, vif, -1, qos);
2411         if (!skb) {
2412                 ret = -ENOMEM;
2413                 goto out;
2414         }
2415
2416         hdr = (struct ieee80211_hdr *)skb->data;
2417         if (ps)
2418                 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
2419
2420         ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, &qsel);
2421         if (ret) {
2422                 rtw89_warn(rtwdev, "nullfunc transmit failed: %d\n", ret);
2423                 dev_kfree_skb_any(skb);
2424                 goto out;
2425         }
2426
2427         rcu_read_unlock();
2428
2429         return rtw89_core_tx_kick_off_and_wait(rtwdev, skb, qsel,
2430                                                RTW89_ROC_TX_TIMEOUT);
2431 out:
2432         rcu_read_unlock();
2433
2434         return ret;
2435 }
2436
2437 void rtw89_roc_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
2438 {
2439         struct ieee80211_hw *hw = rtwdev->hw;
2440         struct rtw89_roc *roc = &rtwvif->roc;
2441         struct cfg80211_chan_def roc_chan;
2442         struct rtw89_vif *tmp;
2443         int ret;
2444
2445         lockdep_assert_held(&rtwdev->mutex);
2446
2447         ieee80211_queue_delayed_work(hw, &rtwvif->roc.roc_work,
2448                                      msecs_to_jiffies(rtwvif->roc.duration));
2449
2450         rtw89_leave_ips_by_hwflags(rtwdev);
2451         rtw89_leave_lps(rtwdev);
2452
2453         ret = rtw89_core_send_nullfunc(rtwdev, rtwvif, true, true);
2454         if (ret)
2455                 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2456                             "roc send null-1 failed: %d\n", ret);
2457
2458         rtw89_for_each_rtwvif(rtwdev, tmp)
2459                 if (tmp->sub_entity_idx == rtwvif->sub_entity_idx)
2460                         tmp->offchan = true;
2461
2462         cfg80211_chandef_create(&roc_chan, &roc->chan, NL80211_CHAN_NO_HT);
2463         rtw89_config_roc_chandef(rtwdev, rtwvif->sub_entity_idx, &roc_chan);
2464         rtw89_set_channel(rtwdev);
2465         rtw89_write32_clr(rtwdev,
2466                           rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0),
2467                           B_AX_A_UC_CAM_MATCH | B_AX_A_BC_CAM_MATCH);
2468
2469         ieee80211_ready_on_channel(hw);
2470 }
2471
2472 void rtw89_roc_end(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
2473 {
2474         struct ieee80211_hw *hw = rtwdev->hw;
2475         struct rtw89_roc *roc = &rtwvif->roc;
2476         struct rtw89_vif *tmp;
2477         int ret;
2478
2479         lockdep_assert_held(&rtwdev->mutex);
2480
2481         ieee80211_remain_on_channel_expired(hw);
2482
2483         rtw89_leave_ips_by_hwflags(rtwdev);
2484         rtw89_leave_lps(rtwdev);
2485
2486         rtw89_write32_mask(rtwdev,
2487                            rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0),
2488                            B_AX_RX_FLTR_CFG_MASK,
2489                            rtwdev->hal.rx_fltr);
2490
2491         roc->state = RTW89_ROC_IDLE;
2492         rtw89_config_roc_chandef(rtwdev, rtwvif->sub_entity_idx, NULL);
2493         rtw89_set_channel(rtwdev);
2494         ret = rtw89_core_send_nullfunc(rtwdev, rtwvif, true, false);
2495         if (ret)
2496                 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2497                             "roc send null-0 failed: %d\n", ret);
2498
2499         rtw89_for_each_rtwvif(rtwdev, tmp)
2500                 if (tmp->sub_entity_idx == rtwvif->sub_entity_idx)
2501                         tmp->offchan = false;
2502
2503         rtw89_core_handle_sta_pending_tx(rtwdev, rtwvif);
2504         queue_work(rtwdev->txq_wq, &rtwdev->txq_work);
2505
2506         if (hw->conf.flags & IEEE80211_CONF_IDLE)
2507                 ieee80211_queue_delayed_work(hw, &roc->roc_work,
2508                                              RTW89_ROC_IDLE_TIMEOUT);
2509 }
2510
2511 void rtw89_roc_work(struct work_struct *work)
2512 {
2513         struct rtw89_vif *rtwvif = container_of(work, struct rtw89_vif,
2514                                                 roc.roc_work.work);
2515         struct rtw89_dev *rtwdev = rtwvif->rtwdev;
2516         struct rtw89_roc *roc = &rtwvif->roc;
2517
2518         mutex_lock(&rtwdev->mutex);
2519
2520         switch (roc->state) {
2521         case RTW89_ROC_IDLE:
2522                 rtw89_enter_ips_by_hwflags(rtwdev);
2523                 break;
2524         case RTW89_ROC_MGMT:
2525         case RTW89_ROC_NORMAL:
2526                 rtw89_roc_end(rtwdev, rtwvif);
2527                 break;
2528         default:
2529                 break;
2530         }
2531
2532         mutex_unlock(&rtwdev->mutex);
2533 }
2534
2535 static enum rtw89_tfc_lv rtw89_get_traffic_level(struct rtw89_dev *rtwdev,
2536                                                  u32 throughput, u64 cnt)
2537 {
2538         if (cnt < 100)
2539                 return RTW89_TFC_IDLE;
2540         if (throughput > 50)
2541                 return RTW89_TFC_HIGH;
2542         if (throughput > 10)
2543                 return RTW89_TFC_MID;
2544         if (throughput > 2)
2545                 return RTW89_TFC_LOW;
2546         return RTW89_TFC_ULTRA_LOW;
2547 }
2548
2549 static bool rtw89_traffic_stats_calc(struct rtw89_dev *rtwdev,
2550                                      struct rtw89_traffic_stats *stats)
2551 {
2552         enum rtw89_tfc_lv tx_tfc_lv = stats->tx_tfc_lv;
2553         enum rtw89_tfc_lv rx_tfc_lv = stats->rx_tfc_lv;
2554
2555         stats->tx_throughput_raw = (u32)(stats->tx_unicast >> RTW89_TP_SHIFT);
2556         stats->rx_throughput_raw = (u32)(stats->rx_unicast >> RTW89_TP_SHIFT);
2557
2558         ewma_tp_add(&stats->tx_ewma_tp, stats->tx_throughput_raw);
2559         ewma_tp_add(&stats->rx_ewma_tp, stats->rx_throughput_raw);
2560
2561         stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
2562         stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
2563         stats->tx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->tx_throughput,
2564                                                    stats->tx_cnt);
2565         stats->rx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->rx_throughput,
2566                                                    stats->rx_cnt);
2567         stats->tx_avg_len = stats->tx_cnt ?
2568                             DIV_ROUND_DOWN_ULL(stats->tx_unicast, stats->tx_cnt) : 0;
2569         stats->rx_avg_len = stats->rx_cnt ?
2570                             DIV_ROUND_DOWN_ULL(stats->rx_unicast, stats->rx_cnt) : 0;
2571
2572         stats->tx_unicast = 0;
2573         stats->rx_unicast = 0;
2574         stats->tx_cnt = 0;
2575         stats->rx_cnt = 0;
2576         stats->rx_tf_periodic = stats->rx_tf_acc;
2577         stats->rx_tf_acc = 0;
2578
2579         if (tx_tfc_lv != stats->tx_tfc_lv || rx_tfc_lv != stats->rx_tfc_lv)
2580                 return true;
2581
2582         return false;
2583 }
2584
2585 static bool rtw89_traffic_stats_track(struct rtw89_dev *rtwdev)
2586 {
2587         struct rtw89_vif *rtwvif;
2588         bool tfc_changed;
2589
2590         tfc_changed = rtw89_traffic_stats_calc(rtwdev, &rtwdev->stats);
2591         rtw89_for_each_rtwvif(rtwdev, rtwvif) {
2592                 rtw89_traffic_stats_calc(rtwdev, &rtwvif->stats);
2593                 rtw89_fw_h2c_tp_offload(rtwdev, rtwvif);
2594         }
2595
2596         return tfc_changed;
2597 }
2598
2599 static void rtw89_vif_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
2600 {
2601         if ((rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION &&
2602              rtwvif->wifi_role != RTW89_WIFI_ROLE_P2P_CLIENT) ||
2603             rtwvif->tdls_peer)
2604                 return;
2605
2606         if (rtwdev->total_sta_assoc > 1)
2607                 return;
2608
2609         if (rtwvif->offchan)
2610                 return;
2611
2612         if (rtwvif->stats.tx_tfc_lv == RTW89_TFC_IDLE &&
2613             rtwvif->stats.rx_tfc_lv == RTW89_TFC_IDLE)
2614                 rtw89_enter_lps(rtwdev, rtwvif, true);
2615 }
2616
2617 static void rtw89_enter_lps_track(struct rtw89_dev *rtwdev)
2618 {
2619         struct rtw89_vif *rtwvif;
2620
2621         rtw89_for_each_rtwvif(rtwdev, rtwvif)
2622                 rtw89_vif_enter_lps(rtwdev, rtwvif);
2623 }
2624
2625 void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev,
2626                               struct rtw89_traffic_stats *stats)
2627 {
2628         stats->tx_unicast = 0;
2629         stats->rx_unicast = 0;
2630         stats->tx_cnt = 0;
2631         stats->rx_cnt = 0;
2632         ewma_tp_init(&stats->tx_ewma_tp);
2633         ewma_tp_init(&stats->rx_ewma_tp);
2634 }
2635
2636 static void rtw89_track_work(struct work_struct *work)
2637 {
2638         struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
2639                                                 track_work.work);
2640         bool tfc_changed;
2641
2642         if (test_bit(RTW89_FLAG_FORBIDDEN_TRACK_WROK, rtwdev->flags))
2643                 return;
2644
2645         mutex_lock(&rtwdev->mutex);
2646
2647         if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
2648                 goto out;
2649
2650         ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work,
2651                                      RTW89_TRACK_WORK_PERIOD);
2652
2653         tfc_changed = rtw89_traffic_stats_track(rtwdev);
2654         if (rtwdev->scanning)
2655                 goto out;
2656
2657         rtw89_leave_lps(rtwdev);
2658
2659         if (tfc_changed) {
2660                 rtw89_hci_recalc_int_mit(rtwdev);
2661                 rtw89_btc_ntfy_wl_sta(rtwdev);
2662         }
2663         rtw89_mac_bf_monitor_track(rtwdev);
2664         rtw89_phy_stat_track(rtwdev);
2665         rtw89_phy_env_monitor_track(rtwdev);
2666         rtw89_phy_dig(rtwdev);
2667         rtw89_chip_rfk_track(rtwdev);
2668         rtw89_phy_ra_update(rtwdev);
2669         rtw89_phy_cfo_track(rtwdev);
2670         rtw89_phy_tx_path_div_track(rtwdev);
2671         rtw89_phy_antdiv_track(rtwdev);
2672         rtw89_phy_ul_tb_ctrl_track(rtwdev);
2673
2674         if (rtwdev->lps_enabled && !rtwdev->btc.lps)
2675                 rtw89_enter_lps_track(rtwdev);
2676
2677 out:
2678         mutex_unlock(&rtwdev->mutex);
2679 }
2680
2681 u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size)
2682 {
2683         unsigned long bit;
2684
2685         bit = find_first_zero_bit(addr, size);
2686         if (bit < size)
2687                 set_bit(bit, addr);
2688
2689         return bit;
2690 }
2691
2692 void rtw89_core_release_bit_map(unsigned long *addr, u8 bit)
2693 {
2694         clear_bit(bit, addr);
2695 }
2696
2697 void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits)
2698 {
2699         bitmap_zero(addr, nbits);
2700 }
2701
2702 int rtw89_core_acquire_sta_ba_entry(struct rtw89_dev *rtwdev,
2703                                     struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx)
2704 {
2705         const struct rtw89_chip_info *chip = rtwdev->chip;
2706         struct rtw89_cam_info *cam_info = &rtwdev->cam_info;
2707         struct rtw89_ba_cam_entry *entry = NULL, *tmp;
2708         u8 idx;
2709         int i;
2710
2711         lockdep_assert_held(&rtwdev->mutex);
2712
2713         idx = rtw89_core_acquire_bit_map(cam_info->ba_cam_map, chip->bacam_num);
2714         if (idx == chip->bacam_num) {
2715                 /* allocate a static BA CAM to tid=0/5, so replace the existing
2716                  * one if BA CAM is full. Hardware will process the original tid
2717                  * automatically.
2718                  */
2719                 if (tid != 0 && tid != 5)
2720                         return -ENOSPC;
2721
2722                 for_each_set_bit(i, cam_info->ba_cam_map, chip->bacam_num) {
2723                         tmp = &cam_info->ba_cam_entry[i];
2724                         if (tmp->tid == 0 || tmp->tid == 5)
2725                                 continue;
2726
2727                         idx = i;
2728                         entry = tmp;
2729                         list_del(&entry->list);
2730                         break;
2731                 }
2732
2733                 if (!entry)
2734                         return -ENOSPC;
2735         } else {
2736                 entry = &cam_info->ba_cam_entry[idx];
2737         }
2738
2739         entry->tid = tid;
2740         list_add_tail(&entry->list, &rtwsta->ba_cam_list);
2741
2742         *cam_idx = idx;
2743
2744         return 0;
2745 }
2746
2747 int rtw89_core_release_sta_ba_entry(struct rtw89_dev *rtwdev,
2748                                     struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx)
2749 {
2750         struct rtw89_cam_info *cam_info = &rtwdev->cam_info;
2751         struct rtw89_ba_cam_entry *entry = NULL, *tmp;
2752         u8 idx;
2753
2754         lockdep_assert_held(&rtwdev->mutex);
2755
2756         list_for_each_entry_safe(entry, tmp, &rtwsta->ba_cam_list, list) {
2757                 if (entry->tid != tid)
2758                         continue;
2759
2760                 idx = entry - cam_info->ba_cam_entry;
2761                 list_del(&entry->list);
2762
2763                 rtw89_core_release_bit_map(cam_info->ba_cam_map, idx);
2764                 *cam_idx = idx;
2765                 return 0;
2766         }
2767
2768         return -ENOENT;
2769 }
2770
2771 #define RTW89_TYPE_MAPPING(_type)       \
2772         case NL80211_IFTYPE_ ## _type:  \
2773                 rtwvif->wifi_role = RTW89_WIFI_ROLE_ ## _type;  \
2774                 break
2775 void rtw89_vif_type_mapping(struct ieee80211_vif *vif, bool assoc)
2776 {
2777         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2778
2779         switch (vif->type) {
2780         case NL80211_IFTYPE_STATION:
2781                 if (vif->p2p)
2782                         rtwvif->wifi_role = RTW89_WIFI_ROLE_P2P_CLIENT;
2783                 else
2784                         rtwvif->wifi_role = RTW89_WIFI_ROLE_STATION;
2785                 break;
2786         case NL80211_IFTYPE_AP:
2787                 if (vif->p2p)
2788                         rtwvif->wifi_role = RTW89_WIFI_ROLE_P2P_GO;
2789                 else
2790                         rtwvif->wifi_role = RTW89_WIFI_ROLE_AP;
2791                 break;
2792         RTW89_TYPE_MAPPING(ADHOC);
2793         RTW89_TYPE_MAPPING(MONITOR);
2794         RTW89_TYPE_MAPPING(MESH_POINT);
2795         default:
2796                 WARN_ON(1);
2797                 break;
2798         }
2799
2800         switch (vif->type) {
2801         case NL80211_IFTYPE_AP:
2802         case NL80211_IFTYPE_MESH_POINT:
2803                 rtwvif->net_type = RTW89_NET_TYPE_AP_MODE;
2804                 rtwvif->self_role = RTW89_SELF_ROLE_AP;
2805                 break;
2806         case NL80211_IFTYPE_ADHOC:
2807                 rtwvif->net_type = RTW89_NET_TYPE_AD_HOC;
2808                 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT;
2809                 break;
2810         case NL80211_IFTYPE_STATION:
2811                 if (assoc) {
2812                         rtwvif->net_type = RTW89_NET_TYPE_INFRA;
2813                         rtwvif->trigger = vif->bss_conf.he_support;
2814                 } else {
2815                         rtwvif->net_type = RTW89_NET_TYPE_NO_LINK;
2816                         rtwvif->trigger = false;
2817                 }
2818                 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT;
2819                 rtwvif->addr_cam.sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL;
2820                 break;
2821         case NL80211_IFTYPE_MONITOR:
2822                 break;
2823         default:
2824                 WARN_ON(1);
2825                 break;
2826         }
2827 }
2828
2829 int rtw89_core_sta_add(struct rtw89_dev *rtwdev,
2830                        struct ieee80211_vif *vif,
2831                        struct ieee80211_sta *sta)
2832 {
2833         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2834         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2835         struct rtw89_hal *hal = &rtwdev->hal;
2836         u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num;
2837         int i;
2838         int ret;
2839
2840         rtwsta->rtwdev = rtwdev;
2841         rtwsta->rtwvif = rtwvif;
2842         rtwsta->prev_rssi = 0;
2843         INIT_LIST_HEAD(&rtwsta->ba_cam_list);
2844         skb_queue_head_init(&rtwsta->roc_queue);
2845
2846         for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
2847                 rtw89_core_txq_init(rtwdev, sta->txq[i]);
2848
2849         ewma_rssi_init(&rtwsta->avg_rssi);
2850         ewma_snr_init(&rtwsta->avg_snr);
2851         for (i = 0; i < ant_num; i++) {
2852                 ewma_rssi_init(&rtwsta->rssi[i]);
2853                 ewma_evm_init(&rtwsta->evm_min[i]);
2854                 ewma_evm_init(&rtwsta->evm_max[i]);
2855         }
2856
2857         if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
2858                 /* for station mode, assign the mac_id from itself */
2859                 rtwsta->mac_id = rtwvif->mac_id;
2860                 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
2861                                          BTC_ROLE_MSTS_STA_CONN_START);
2862                 rtw89_chip_rfk_channel(rtwdev);
2863         } else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
2864                 rtwsta->mac_id = rtw89_core_acquire_bit_map(rtwdev->mac_id_map,
2865                                                             RTW89_MAX_MAC_ID_NUM);
2866                 if (rtwsta->mac_id == RTW89_MAX_MAC_ID_NUM)
2867                         return -ENOSPC;
2868
2869                 ret = rtw89_mac_set_macid_pause(rtwdev, rtwsta->mac_id, false);
2870                 if (ret) {
2871                         rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id);
2872                         rtw89_warn(rtwdev, "failed to send h2c macid pause\n");
2873                         return ret;
2874                 }
2875
2876                 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta,
2877                                                  RTW89_ROLE_CREATE);
2878                 if (ret) {
2879                         rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id);
2880                         rtw89_warn(rtwdev, "failed to send h2c role info\n");
2881                         return ret;
2882                 }
2883         }
2884
2885         return 0;
2886 }
2887
2888 int rtw89_core_sta_disassoc(struct rtw89_dev *rtwdev,
2889                             struct ieee80211_vif *vif,
2890                             struct ieee80211_sta *sta)
2891 {
2892         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2893         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2894
2895         if (vif->type == NL80211_IFTYPE_STATION)
2896                 rtw89_fw_h2c_set_bcn_fltr_cfg(rtwdev, vif, false);
2897
2898         rtwdev->total_sta_assoc--;
2899         if (sta->tdls)
2900                 rtwvif->tdls_peer--;
2901         rtwsta->disassoc = true;
2902
2903         return 0;
2904 }
2905
2906 int rtw89_core_sta_disconnect(struct rtw89_dev *rtwdev,
2907                               struct ieee80211_vif *vif,
2908                               struct ieee80211_sta *sta)
2909 {
2910         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2911         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2912         int ret;
2913
2914         rtw89_mac_bf_monitor_calc(rtwdev, sta, true);
2915         rtw89_mac_bf_disassoc(rtwdev, vif, sta);
2916         rtw89_core_free_sta_pending_ba(rtwdev, sta);
2917         rtw89_core_free_sta_pending_forbid_ba(rtwdev, sta);
2918         rtw89_core_free_sta_pending_roc_tx(rtwdev, sta);
2919
2920         if (vif->type == NL80211_IFTYPE_AP || sta->tdls)
2921                 rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta->addr_cam);
2922         if (sta->tdls)
2923                 rtw89_cam_deinit_bssid_cam(rtwdev, &rtwsta->bssid_cam);
2924
2925         if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
2926                 rtw89_vif_type_mapping(vif, false);
2927                 rtw89_fw_release_general_pkt_list_vif(rtwdev, rtwvif, true);
2928         }
2929
2930         ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta);
2931         if (ret) {
2932                 rtw89_warn(rtwdev, "failed to send h2c cmac table\n");
2933                 return ret;
2934         }
2935
2936         ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, true);
2937         if (ret) {
2938                 rtw89_warn(rtwdev, "failed to send h2c join info\n");
2939                 return ret;
2940         }
2941
2942         /* update cam aid mac_id net_type */
2943         ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL);
2944         if (ret) {
2945                 rtw89_warn(rtwdev, "failed to send h2c cam\n");
2946                 return ret;
2947         }
2948
2949         return ret;
2950 }
2951
2952 int rtw89_core_sta_assoc(struct rtw89_dev *rtwdev,
2953                          struct ieee80211_vif *vif,
2954                          struct ieee80211_sta *sta)
2955 {
2956         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2957         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2958         struct rtw89_bssid_cam_entry *bssid_cam = rtw89_get_bssid_cam_of(rtwvif, rtwsta);
2959         int ret;
2960
2961         if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
2962                 if (sta->tdls) {
2963                         ret = rtw89_cam_init_bssid_cam(rtwdev, rtwvif, bssid_cam, sta->addr);
2964                         if (ret) {
2965                                 rtw89_warn(rtwdev, "failed to send h2c init bssid cam for TDLS\n");
2966                                 return ret;
2967                         }
2968                 }
2969
2970                 ret = rtw89_cam_init_addr_cam(rtwdev, &rtwsta->addr_cam, bssid_cam);
2971                 if (ret) {
2972                         rtw89_warn(rtwdev, "failed to send h2c init addr cam\n");
2973                         return ret;
2974                 }
2975         }
2976
2977         ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta);
2978         if (ret) {
2979                 rtw89_warn(rtwdev, "failed to send h2c cmac table\n");
2980                 return ret;
2981         }
2982
2983         ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, false);
2984         if (ret) {
2985                 rtw89_warn(rtwdev, "failed to send h2c join info\n");
2986                 return ret;
2987         }
2988
2989         /* update cam aid mac_id net_type */
2990         ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL);
2991         if (ret) {
2992                 rtw89_warn(rtwdev, "failed to send h2c cam\n");
2993                 return ret;
2994         }
2995
2996         rtwdev->total_sta_assoc++;
2997         if (sta->tdls)
2998                 rtwvif->tdls_peer++;
2999         rtw89_phy_ra_assoc(rtwdev, sta);
3000         rtw89_mac_bf_assoc(rtwdev, vif, sta);
3001         rtw89_mac_bf_monitor_calc(rtwdev, sta, false);
3002
3003         if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
3004                 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
3005
3006                 if (bss_conf->he_support &&
3007                     !(bss_conf->he_oper.params & IEEE80211_HE_OPERATION_ER_SU_DISABLE))
3008                         rtwsta->er_cap = true;
3009
3010                 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
3011                                          BTC_ROLE_MSTS_STA_CONN_END);
3012                 rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template);
3013                 rtw89_phy_ul_tb_assoc(rtwdev, rtwvif);
3014
3015                 ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwvif, rtwsta->mac_id);
3016                 if (ret) {
3017                         rtw89_warn(rtwdev, "failed to send h2c general packet\n");
3018                         return ret;
3019                 }
3020         }
3021
3022         return ret;
3023 }
3024
3025 int rtw89_core_sta_remove(struct rtw89_dev *rtwdev,
3026                           struct ieee80211_vif *vif,
3027                           struct ieee80211_sta *sta)
3028 {
3029         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
3030         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
3031         int ret;
3032
3033         if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls)
3034                 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
3035                                          BTC_ROLE_MSTS_STA_DIS_CONN);
3036         else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
3037                 rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id);
3038
3039                 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta,
3040                                                  RTW89_ROLE_REMOVE);
3041                 if (ret) {
3042                         rtw89_warn(rtwdev, "failed to send h2c role info\n");
3043                         return ret;
3044                 }
3045         }
3046
3047         return 0;
3048 }
3049
3050 static void _rtw89_core_set_tid_config(struct rtw89_dev *rtwdev,
3051                                        struct ieee80211_sta *sta,
3052                                        struct cfg80211_tid_cfg *tid_conf)
3053 {
3054         struct ieee80211_txq *txq;
3055         struct rtw89_txq *rtwtxq;
3056         u32 mask = tid_conf->mask;
3057         u8 tids = tid_conf->tids;
3058         int tids_nbit = BITS_PER_BYTE;
3059         int i;
3060
3061         for (i = 0; i < tids_nbit; i++, tids >>= 1) {
3062                 if (!tids)
3063                         break;
3064
3065                 if (!(tids & BIT(0)))
3066                         continue;
3067
3068                 txq = sta->txq[i];
3069                 rtwtxq = (struct rtw89_txq *)txq->drv_priv;
3070
3071                 if (mask & BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL)) {
3072                         if (tid_conf->ampdu == NL80211_TID_CONFIG_ENABLE) {
3073                                 clear_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
3074                         } else {
3075                                 if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags))
3076                                         ieee80211_stop_tx_ba_session(sta, txq->tid);
3077                                 spin_lock_bh(&rtwdev->ba_lock);
3078                                 list_del_init(&rtwtxq->list);
3079                                 set_bit(RTW89_TXQ_F_FORBID_BA, &rtwtxq->flags);
3080                                 spin_unlock_bh(&rtwdev->ba_lock);
3081                         }
3082                 }
3083
3084                 if (mask & BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL) && tids == 0xff) {
3085                         if (tid_conf->amsdu == NL80211_TID_CONFIG_ENABLE)
3086                                 sta->max_amsdu_subframes = 0;
3087                         else
3088                                 sta->max_amsdu_subframes = 1;
3089                 }
3090         }
3091 }
3092
3093 void rtw89_core_set_tid_config(struct rtw89_dev *rtwdev,
3094                                struct ieee80211_sta *sta,
3095                                struct cfg80211_tid_config *tid_config)
3096 {
3097         int i;
3098
3099         for (i = 0; i < tid_config->n_tid_conf; i++)
3100                 _rtw89_core_set_tid_config(rtwdev, sta,
3101                                            &tid_config->tid_conf[i]);
3102 }
3103
3104 static void rtw89_init_ht_cap(struct rtw89_dev *rtwdev,
3105                               struct ieee80211_sta_ht_cap *ht_cap)
3106 {
3107         static const __le16 highest[RF_PATH_MAX] = {
3108                 cpu_to_le16(150), cpu_to_le16(300), cpu_to_le16(450), cpu_to_le16(600),
3109         };
3110         struct rtw89_hal *hal = &rtwdev->hal;
3111         u8 nss = hal->rx_nss;
3112         int i;
3113
3114         ht_cap->ht_supported = true;
3115         ht_cap->cap = 0;
3116         ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
3117                        IEEE80211_HT_CAP_MAX_AMSDU |
3118                        IEEE80211_HT_CAP_TX_STBC |
3119                        (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
3120         ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
3121         ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
3122                        IEEE80211_HT_CAP_DSSSCCK40 |
3123                        IEEE80211_HT_CAP_SGI_40;
3124         ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
3125         ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
3126         ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
3127         for (i = 0; i < nss; i++)
3128                 ht_cap->mcs.rx_mask[i] = 0xFF;
3129         ht_cap->mcs.rx_mask[4] = 0x01;
3130         ht_cap->mcs.rx_highest = highest[nss - 1];
3131 }
3132
3133 static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev,
3134                                struct ieee80211_sta_vht_cap *vht_cap)
3135 {
3136         static const __le16 highest_bw80[RF_PATH_MAX] = {
3137                 cpu_to_le16(433), cpu_to_le16(867), cpu_to_le16(1300), cpu_to_le16(1733),
3138         };
3139         static const __le16 highest_bw160[RF_PATH_MAX] = {
3140                 cpu_to_le16(867), cpu_to_le16(1733), cpu_to_le16(2600), cpu_to_le16(3467),
3141         };
3142         const struct rtw89_chip_info *chip = rtwdev->chip;
3143         const __le16 *highest = chip->support_bw160 ? highest_bw160 : highest_bw80;
3144         struct rtw89_hal *hal = &rtwdev->hal;
3145         u16 tx_mcs_map = 0, rx_mcs_map = 0;
3146         u8 sts_cap = 3;
3147         int i;
3148
3149         for (i = 0; i < 8; i++) {
3150                 if (i < hal->tx_nss)
3151                         tx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
3152                 else
3153                         tx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
3154                 if (i < hal->rx_nss)
3155                         rx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
3156                 else
3157                         rx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
3158         }
3159
3160         vht_cap->vht_supported = true;
3161         vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
3162                        IEEE80211_VHT_CAP_SHORT_GI_80 |
3163                        IEEE80211_VHT_CAP_RXSTBC_1 |
3164                        IEEE80211_VHT_CAP_HTC_VHT |
3165                        IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
3166                        0;
3167         vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
3168         vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
3169         vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
3170                         IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
3171         vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT;
3172         if (chip->support_bw160)
3173                 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
3174                                 IEEE80211_VHT_CAP_SHORT_GI_160;
3175         vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map);
3176         vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(tx_mcs_map);
3177         vht_cap->vht_mcs.rx_highest = highest[hal->rx_nss - 1];
3178         vht_cap->vht_mcs.tx_highest = highest[hal->tx_nss - 1];
3179 }
3180
3181 #define RTW89_SBAND_IFTYPES_NR 2
3182
3183 static void rtw89_init_he_cap(struct rtw89_dev *rtwdev,
3184                               enum nl80211_band band,
3185                               struct ieee80211_supported_band *sband)
3186 {
3187         const struct rtw89_chip_info *chip = rtwdev->chip;
3188         struct rtw89_hal *hal = &rtwdev->hal;
3189         struct ieee80211_sband_iftype_data *iftype_data;
3190         bool no_ng16 = (chip->chip_id == RTL8852A && hal->cv == CHIP_CBV) ||
3191                        (chip->chip_id == RTL8852B && hal->cv == CHIP_CAV);
3192         u16 mcs_map = 0;
3193         int i;
3194         int nss = hal->rx_nss;
3195         int idx = 0;
3196
3197         iftype_data = kcalloc(RTW89_SBAND_IFTYPES_NR, sizeof(*iftype_data), GFP_KERNEL);
3198         if (!iftype_data)
3199                 return;
3200
3201         for (i = 0; i < 8; i++) {
3202                 if (i < nss)
3203                         mcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2);
3204                 else
3205                         mcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2);
3206         }
3207
3208         for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
3209                 struct ieee80211_sta_he_cap *he_cap;
3210                 u8 *mac_cap_info;
3211                 u8 *phy_cap_info;
3212
3213                 switch (i) {
3214                 case NL80211_IFTYPE_STATION:
3215                 case NL80211_IFTYPE_AP:
3216                         break;
3217                 default:
3218                         continue;
3219                 }
3220
3221                 if (idx >= RTW89_SBAND_IFTYPES_NR) {
3222                         rtw89_warn(rtwdev, "run out of iftype_data\n");
3223                         break;
3224                 }
3225
3226                 iftype_data[idx].types_mask = BIT(i);
3227                 he_cap = &iftype_data[idx].he_cap;
3228                 mac_cap_info = he_cap->he_cap_elem.mac_cap_info;
3229                 phy_cap_info = he_cap->he_cap_elem.phy_cap_info;
3230
3231                 he_cap->has_he = true;
3232                 mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE;
3233                 if (i == NL80211_IFTYPE_STATION)
3234                         mac_cap_info[1] = IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
3235                 mac_cap_info[2] = IEEE80211_HE_MAC_CAP2_ALL_ACK |
3236                                   IEEE80211_HE_MAC_CAP2_BSR;
3237                 mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2;
3238                 if (i == NL80211_IFTYPE_AP)
3239                         mac_cap_info[3] |= IEEE80211_HE_MAC_CAP3_OMI_CONTROL;
3240                 mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_OPS |
3241                                   IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
3242                 if (i == NL80211_IFTYPE_STATION)
3243                         mac_cap_info[5] = IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX;
3244                 if (band == NL80211_BAND_2GHZ) {
3245                         phy_cap_info[0] =
3246                                 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
3247                 } else {
3248                         phy_cap_info[0] =
3249                                 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G;
3250                         if (chip->support_bw160)
3251                                 phy_cap_info[0] |= IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
3252                 }
3253                 phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
3254                                   IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD |
3255                                   IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
3256                 phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
3257                                   IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
3258                                   IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |
3259                                   IEEE80211_HE_PHY_CAP2_DOPPLER_TX;
3260                 phy_cap_info[3] = IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_16_QAM;
3261                 if (i == NL80211_IFTYPE_STATION)
3262                         phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_16_QAM |
3263                                            IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_2;
3264                 if (i == NL80211_IFTYPE_AP)
3265                         phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_RX_PARTIAL_BW_SU_IN_20MHZ_MU;
3266                 phy_cap_info[4] = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
3267                                   IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4;
3268                 if (chip->support_bw160)
3269                         phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
3270                 phy_cap_info[5] = no_ng16 ? 0 :
3271                                   IEEE80211_HE_PHY_CAP5_NG16_SU_FEEDBACK |
3272                                   IEEE80211_HE_PHY_CAP5_NG16_MU_FEEDBACK;
3273                 phy_cap_info[6] = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
3274                                   IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU |
3275                                   IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
3276                                   IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE;
3277                 phy_cap_info[7] = IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
3278                                   IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI |
3279                                   IEEE80211_HE_PHY_CAP7_MAX_NC_1;
3280                 phy_cap_info[8] = IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
3281                                   IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI |
3282                                   IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_996;
3283                 if (chip->support_bw160)
3284                         phy_cap_info[8] |= IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
3285                                            IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU;
3286                 phy_cap_info[9] = IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
3287                                   IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
3288                                   IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
3289                                   IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB |
3290                                   u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
3291                                                  IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
3292                 if (i == NL80211_IFTYPE_STATION)
3293                         phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU;
3294                 he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map);
3295                 he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map);
3296                 if (chip->support_bw160) {
3297                         he_cap->he_mcs_nss_supp.rx_mcs_160 = cpu_to_le16(mcs_map);
3298                         he_cap->he_mcs_nss_supp.tx_mcs_160 = cpu_to_le16(mcs_map);
3299                 }
3300
3301                 if (band == NL80211_BAND_6GHZ) {
3302                         __le16 capa;
3303
3304                         capa = le16_encode_bits(IEEE80211_HT_MPDU_DENSITY_NONE,
3305                                                 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
3306                                le16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
3307                                                 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
3308                                le16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
3309                                                 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
3310                         iftype_data[idx].he_6ghz_capa.capa = capa;
3311                 }
3312
3313                 idx++;
3314         }
3315
3316         sband->iftype_data = iftype_data;
3317         sband->n_iftype_data = idx;
3318 }
3319
3320 static int rtw89_core_set_supported_band(struct rtw89_dev *rtwdev)
3321 {
3322         struct ieee80211_hw *hw = rtwdev->hw;
3323         struct ieee80211_supported_band *sband_2ghz = NULL, *sband_5ghz = NULL;
3324         struct ieee80211_supported_band *sband_6ghz = NULL;
3325         u32 size = sizeof(struct ieee80211_supported_band);
3326         u8 support_bands = rtwdev->chip->support_bands;
3327
3328         if (support_bands & BIT(NL80211_BAND_2GHZ)) {
3329                 sband_2ghz = kmemdup(&rtw89_sband_2ghz, size, GFP_KERNEL);
3330                 if (!sband_2ghz)
3331                         goto err;
3332                 rtw89_init_ht_cap(rtwdev, &sband_2ghz->ht_cap);
3333                 rtw89_init_he_cap(rtwdev, NL80211_BAND_2GHZ, sband_2ghz);
3334                 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband_2ghz;
3335         }
3336
3337         if (support_bands & BIT(NL80211_BAND_5GHZ)) {
3338                 sband_5ghz = kmemdup(&rtw89_sband_5ghz, size, GFP_KERNEL);
3339                 if (!sband_5ghz)
3340                         goto err;
3341                 rtw89_init_ht_cap(rtwdev, &sband_5ghz->ht_cap);
3342                 rtw89_init_vht_cap(rtwdev, &sband_5ghz->vht_cap);
3343                 rtw89_init_he_cap(rtwdev, NL80211_BAND_5GHZ, sband_5ghz);
3344                 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband_5ghz;
3345         }
3346
3347         if (support_bands & BIT(NL80211_BAND_6GHZ)) {
3348                 sband_6ghz = kmemdup(&rtw89_sband_6ghz, size, GFP_KERNEL);
3349                 if (!sband_6ghz)
3350                         goto err;
3351                 rtw89_init_he_cap(rtwdev, NL80211_BAND_6GHZ, sband_6ghz);
3352                 hw->wiphy->bands[NL80211_BAND_6GHZ] = sband_6ghz;
3353         }
3354
3355         return 0;
3356
3357 err:
3358         hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
3359         hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
3360         hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL;
3361         if (sband_2ghz)
3362                 kfree(sband_2ghz->iftype_data);
3363         if (sband_5ghz)
3364                 kfree(sband_5ghz->iftype_data);
3365         if (sband_6ghz)
3366                 kfree(sband_6ghz->iftype_data);
3367         kfree(sband_2ghz);
3368         kfree(sband_5ghz);
3369         kfree(sband_6ghz);
3370         return -ENOMEM;
3371 }
3372
3373 static void rtw89_core_clr_supported_band(struct rtw89_dev *rtwdev)
3374 {
3375         struct ieee80211_hw *hw = rtwdev->hw;
3376
3377         kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data);
3378         kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data);
3379         if (hw->wiphy->bands[NL80211_BAND_6GHZ])
3380                 kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]->iftype_data);
3381         kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
3382         kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
3383         kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]);
3384         hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
3385         hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
3386         hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL;
3387 }
3388
3389 static void rtw89_core_ppdu_sts_init(struct rtw89_dev *rtwdev)
3390 {
3391         int i;
3392
3393         for (i = 0; i < RTW89_PHY_MAX; i++)
3394                 skb_queue_head_init(&rtwdev->ppdu_sts.rx_queue[i]);
3395         for (i = 0; i < RTW89_PHY_MAX; i++)
3396                 rtwdev->ppdu_sts.curr_rx_ppdu_cnt[i] = U8_MAX;
3397 }
3398
3399 void rtw89_core_update_beacon_work(struct work_struct *work)
3400 {
3401         struct rtw89_dev *rtwdev;
3402         struct rtw89_vif *rtwvif = container_of(work, struct rtw89_vif,
3403                                                 update_beacon_work);
3404
3405         if (rtwvif->net_type != RTW89_NET_TYPE_AP_MODE)
3406                 return;
3407
3408         rtwdev = rtwvif->rtwdev;
3409         mutex_lock(&rtwdev->mutex);
3410         rtw89_fw_h2c_update_beacon(rtwdev, rtwvif);
3411         mutex_unlock(&rtwdev->mutex);
3412 }
3413
3414 int rtw89_wait_for_cond(struct rtw89_wait_info *wait, unsigned int cond)
3415 {
3416         struct completion *cmpl = &wait->completion;
3417         unsigned long timeout;
3418         unsigned int cur;
3419
3420         cur = atomic_cmpxchg(&wait->cond, RTW89_WAIT_COND_IDLE, cond);
3421         if (cur != RTW89_WAIT_COND_IDLE)
3422                 return -EBUSY;
3423
3424         timeout = wait_for_completion_timeout(cmpl, RTW89_WAIT_FOR_COND_TIMEOUT);
3425         if (timeout == 0) {
3426                 atomic_set(&wait->cond, RTW89_WAIT_COND_IDLE);
3427                 return -ETIMEDOUT;
3428         }
3429
3430         if (wait->data.err)
3431                 return -EFAULT;
3432
3433         return 0;
3434 }
3435
3436 void rtw89_complete_cond(struct rtw89_wait_info *wait, unsigned int cond,
3437                          const struct rtw89_completion_data *data)
3438 {
3439         unsigned int cur;
3440
3441         cur = atomic_cmpxchg(&wait->cond, cond, RTW89_WAIT_COND_IDLE);
3442         if (cur != cond)
3443                 return;
3444
3445         wait->data = *data;
3446         complete(&wait->completion);
3447 }
3448
3449 int rtw89_core_start(struct rtw89_dev *rtwdev)
3450 {
3451         int ret;
3452
3453         rtwdev->mac.qta_mode = RTW89_QTA_SCC;
3454         ret = rtw89_mac_init(rtwdev);
3455         if (ret) {
3456                 rtw89_err(rtwdev, "mac init fail, ret:%d\n", ret);
3457                 return ret;
3458         }
3459
3460         rtw89_btc_ntfy_poweron(rtwdev);
3461
3462         /* efuse process */
3463
3464         /* pre-config BB/RF, BB reset/RFC reset */
3465         ret = rtw89_chip_disable_bb_rf(rtwdev);
3466         if (ret)
3467                 return ret;
3468         ret = rtw89_chip_enable_bb_rf(rtwdev);
3469         if (ret)
3470                 return ret;
3471
3472         rtw89_phy_init_bb_reg(rtwdev);
3473         rtw89_phy_init_rf_reg(rtwdev, false);
3474
3475         rtw89_btc_ntfy_init(rtwdev, BTC_MODE_NORMAL);
3476
3477         rtw89_phy_dm_init(rtwdev);
3478
3479         rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true);
3480         rtw89_mac_update_rts_threshold(rtwdev, RTW89_MAC_0);
3481
3482         ret = rtw89_hci_start(rtwdev);
3483         if (ret) {
3484                 rtw89_err(rtwdev, "failed to start hci\n");
3485                 return ret;
3486         }
3487
3488         ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work,
3489                                      RTW89_TRACK_WORK_PERIOD);
3490
3491         set_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
3492
3493         rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_ON);
3494         rtw89_fw_h2c_fw_log(rtwdev, rtwdev->fw.fw_log_enable);
3495         rtw89_fw_h2c_init_ba_cam(rtwdev);
3496
3497         return 0;
3498 }
3499
3500 void rtw89_core_stop(struct rtw89_dev *rtwdev)
3501 {
3502         struct rtw89_btc *btc = &rtwdev->btc;
3503
3504         /* Prvent to stop twice; enter_ips and ops_stop */
3505         if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
3506                 return;
3507
3508         rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_OFF);
3509
3510         clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
3511
3512         mutex_unlock(&rtwdev->mutex);
3513
3514         cancel_work_sync(&rtwdev->c2h_work);
3515         cancel_work_sync(&rtwdev->cancel_6ghz_probe_work);
3516         cancel_work_sync(&btc->eapol_notify_work);
3517         cancel_work_sync(&btc->arp_notify_work);
3518         cancel_work_sync(&btc->dhcp_notify_work);
3519         cancel_work_sync(&btc->icmp_notify_work);
3520         cancel_delayed_work_sync(&rtwdev->txq_reinvoke_work);
3521         cancel_delayed_work_sync(&rtwdev->track_work);
3522         cancel_delayed_work_sync(&rtwdev->coex_act1_work);
3523         cancel_delayed_work_sync(&rtwdev->coex_bt_devinfo_work);
3524         cancel_delayed_work_sync(&rtwdev->coex_rfk_chk_work);
3525         cancel_delayed_work_sync(&rtwdev->cfo_track_work);
3526         cancel_delayed_work_sync(&rtwdev->forbid_ba_work);
3527         cancel_delayed_work_sync(&rtwdev->antdiv_work);
3528
3529         mutex_lock(&rtwdev->mutex);
3530
3531         rtw89_btc_ntfy_poweroff(rtwdev);
3532         rtw89_hci_flush_queues(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
3533         rtw89_mac_flush_txq(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
3534         rtw89_hci_stop(rtwdev);
3535         rtw89_hci_deinit(rtwdev);
3536         rtw89_mac_pwr_off(rtwdev);
3537         rtw89_hci_reset(rtwdev);
3538 }
3539
3540 int rtw89_core_init(struct rtw89_dev *rtwdev)
3541 {
3542         struct rtw89_btc *btc = &rtwdev->btc;
3543         u8 band;
3544
3545         INIT_LIST_HEAD(&rtwdev->ba_list);
3546         INIT_LIST_HEAD(&rtwdev->forbid_ba_list);
3547         INIT_LIST_HEAD(&rtwdev->rtwvifs_list);
3548         INIT_LIST_HEAD(&rtwdev->early_h2c_list);
3549         for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
3550                 if (!(rtwdev->chip->support_bands & BIT(band)))
3551                         continue;
3552                 INIT_LIST_HEAD(&rtwdev->scan_info.pkt_list[band]);
3553         }
3554         INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work);
3555         INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work);
3556         INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work);
3557         INIT_DELAYED_WORK(&rtwdev->track_work, rtw89_track_work);
3558         INIT_DELAYED_WORK(&rtwdev->coex_act1_work, rtw89_coex_act1_work);
3559         INIT_DELAYED_WORK(&rtwdev->coex_bt_devinfo_work, rtw89_coex_bt_devinfo_work);
3560         INIT_DELAYED_WORK(&rtwdev->coex_rfk_chk_work, rtw89_coex_rfk_chk_work);
3561         INIT_DELAYED_WORK(&rtwdev->cfo_track_work, rtw89_phy_cfo_track_work);
3562         INIT_DELAYED_WORK(&rtwdev->forbid_ba_work, rtw89_forbid_ba_work);
3563         INIT_DELAYED_WORK(&rtwdev->antdiv_work, rtw89_phy_antdiv_work);
3564         rtwdev->txq_wq = alloc_workqueue("rtw89_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
3565         if (!rtwdev->txq_wq)
3566                 return -ENOMEM;
3567         spin_lock_init(&rtwdev->ba_lock);
3568         spin_lock_init(&rtwdev->rpwm_lock);
3569         mutex_init(&rtwdev->mutex);
3570         mutex_init(&rtwdev->rf_mutex);
3571         rtwdev->total_sta_assoc = 0;
3572
3573         rtw89_init_wait(&rtwdev->mcc.wait);
3574         rtw89_init_wait(&rtwdev->mac.fw_ofld_wait);
3575
3576         INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work);
3577         INIT_WORK(&rtwdev->ips_work, rtw89_ips_work);
3578         INIT_WORK(&rtwdev->load_firmware_work, rtw89_load_firmware_work);
3579         INIT_WORK(&rtwdev->cancel_6ghz_probe_work, rtw89_cancel_6ghz_probe_work);
3580
3581         skb_queue_head_init(&rtwdev->c2h_queue);
3582         rtw89_core_ppdu_sts_init(rtwdev);
3583         rtw89_traffic_stats_init(rtwdev, &rtwdev->stats);
3584
3585         rtwdev->hal.rx_fltr = DEFAULT_AX_RX_FLTR;
3586
3587         INIT_WORK(&btc->eapol_notify_work, rtw89_btc_ntfy_eapol_packet_work);
3588         INIT_WORK(&btc->arp_notify_work, rtw89_btc_ntfy_arp_packet_work);
3589         INIT_WORK(&btc->dhcp_notify_work, rtw89_btc_ntfy_dhcp_packet_work);
3590         INIT_WORK(&btc->icmp_notify_work, rtw89_btc_ntfy_icmp_packet_work);
3591
3592         init_completion(&rtwdev->fw.req.completion);
3593
3594         schedule_work(&rtwdev->load_firmware_work);
3595
3596         rtw89_ser_init(rtwdev);
3597         rtw89_entity_init(rtwdev);
3598
3599         return 0;
3600 }
3601 EXPORT_SYMBOL(rtw89_core_init);
3602
3603 void rtw89_core_deinit(struct rtw89_dev *rtwdev)
3604 {
3605         rtw89_ser_deinit(rtwdev);
3606         rtw89_unload_firmware(rtwdev);
3607         rtw89_fw_free_all_early_h2c(rtwdev);
3608
3609         destroy_workqueue(rtwdev->txq_wq);
3610         mutex_destroy(&rtwdev->rf_mutex);
3611         mutex_destroy(&rtwdev->mutex);
3612 }
3613 EXPORT_SYMBOL(rtw89_core_deinit);
3614
3615 void rtw89_core_scan_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
3616                            const u8 *mac_addr, bool hw_scan)
3617 {
3618         const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
3619
3620         rtwdev->scanning = true;
3621         rtw89_leave_lps(rtwdev);
3622         if (hw_scan)
3623                 rtw89_leave_ips_by_hwflags(rtwdev);
3624
3625         ether_addr_copy(rtwvif->mac_addr, mac_addr);
3626         rtw89_btc_ntfy_scan_start(rtwdev, RTW89_PHY_0, chan->band_type);
3627         rtw89_chip_rfk_scan(rtwdev, true);
3628         rtw89_hci_recalc_int_mit(rtwdev);
3629         rtw89_phy_config_edcca(rtwdev, true);
3630
3631         rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, mac_addr);
3632 }
3633
3634 void rtw89_core_scan_complete(struct rtw89_dev *rtwdev,
3635                               struct ieee80211_vif *vif, bool hw_scan)
3636 {
3637         struct rtw89_vif *rtwvif = vif ? (struct rtw89_vif *)vif->drv_priv : NULL;
3638
3639         if (!rtwvif)
3640                 return;
3641
3642         ether_addr_copy(rtwvif->mac_addr, vif->addr);
3643         rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, NULL);
3644
3645         rtw89_chip_rfk_scan(rtwdev, false);
3646         rtw89_btc_ntfy_scan_finish(rtwdev, RTW89_PHY_0);
3647         rtw89_phy_config_edcca(rtwdev, false);
3648
3649         rtwdev->scanning = false;
3650         rtwdev->dig.bypass_dig = true;
3651         if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
3652                 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work);
3653 }
3654
3655 static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev)
3656 {
3657         const struct rtw89_chip_info *chip = rtwdev->chip;
3658         int ret;
3659         u8 val;
3660         u8 cv;
3661
3662         cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK);
3663         if (chip->chip_id == RTL8852A && cv <= CHIP_CBV) {
3664                 if (rtw89_read32(rtwdev, R_AX_GPIO0_7_FUNC_SEL) == RTW89_R32_DEAD)
3665                         cv = CHIP_CAV;
3666                 else
3667                         cv = CHIP_CBV;
3668         }
3669
3670         rtwdev->hal.cv = cv;
3671
3672         if (chip->chip_id == RTL8852B || chip->chip_id == RTL8851B) {
3673                 ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_CV, &val);
3674                 if (ret)
3675                         return;
3676
3677                 rtwdev->hal.acv = u8_get_bits(val, XTAL_SI_ACV_MASK);
3678         }
3679 }
3680
3681 static void rtw89_core_setup_phycap(struct rtw89_dev *rtwdev)
3682 {
3683         rtwdev->hal.support_cckpd =
3684                 !(rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV) &&
3685                 !(rtwdev->chip->chip_id == RTL8852B && rtwdev->hal.cv <= CHIP_CAV);
3686         rtwdev->hal.support_igi =
3687                 rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV;
3688 }
3689
3690 static void rtw89_core_setup_rfe_parms(struct rtw89_dev *rtwdev)
3691 {
3692         const struct rtw89_chip_info *chip = rtwdev->chip;
3693         const struct rtw89_rfe_parms_conf *conf = chip->rfe_parms_conf;
3694         struct rtw89_efuse *efuse = &rtwdev->efuse;
3695         u8 rfe_type = efuse->rfe_type;
3696
3697         if (!conf)
3698                 goto out;
3699
3700         while (conf->rfe_parms) {
3701                 if (rfe_type == conf->rfe_type) {
3702                         rtwdev->rfe_parms = conf->rfe_parms;
3703                         return;
3704                 }
3705                 conf++;
3706         }
3707
3708 out:
3709         rtwdev->rfe_parms = chip->dflt_parms;
3710 }
3711
3712 static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev)
3713 {
3714         int ret;
3715
3716         ret = rtw89_mac_partial_init(rtwdev);
3717         if (ret)
3718                 return ret;
3719
3720         ret = rtw89_parse_efuse_map(rtwdev);
3721         if (ret)
3722                 return ret;
3723
3724         ret = rtw89_parse_phycap_map(rtwdev);
3725         if (ret)
3726                 return ret;
3727
3728         ret = rtw89_mac_setup_phycap(rtwdev);
3729         if (ret)
3730                 return ret;
3731
3732         rtw89_core_setup_phycap(rtwdev);
3733         rtw89_core_setup_rfe_parms(rtwdev);
3734
3735         rtw89_mac_pwr_off(rtwdev);
3736
3737         return 0;
3738 }
3739
3740 static int rtw89_chip_board_info_setup(struct rtw89_dev *rtwdev)
3741 {
3742         rtw89_chip_fem_setup(rtwdev);
3743
3744         return 0;
3745 }
3746
3747 int rtw89_chip_info_setup(struct rtw89_dev *rtwdev)
3748 {
3749         int ret;
3750
3751         rtw89_read_chip_ver(rtwdev);
3752
3753         ret = rtw89_wait_firmware_completion(rtwdev);
3754         if (ret) {
3755                 rtw89_err(rtwdev, "failed to wait firmware completion\n");
3756                 return ret;
3757         }
3758
3759         ret = rtw89_fw_recognize(rtwdev);
3760         if (ret) {
3761                 rtw89_err(rtwdev, "failed to recognize firmware\n");
3762                 return ret;
3763         }
3764
3765         ret = rtw89_chip_efuse_info_setup(rtwdev);
3766         if (ret)
3767                 return ret;
3768
3769         ret = rtw89_chip_board_info_setup(rtwdev);
3770         if (ret)
3771                 return ret;
3772
3773         rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev);
3774
3775         return 0;
3776 }
3777 EXPORT_SYMBOL(rtw89_chip_info_setup);
3778
3779 static int rtw89_core_register_hw(struct rtw89_dev *rtwdev)
3780 {
3781         struct ieee80211_hw *hw = rtwdev->hw;
3782         struct rtw89_efuse *efuse = &rtwdev->efuse;
3783         struct rtw89_hal *hal = &rtwdev->hal;
3784         int ret;
3785         int tx_headroom = IEEE80211_HT_CTL_LEN;
3786
3787         hw->vif_data_size = sizeof(struct rtw89_vif);
3788         hw->sta_data_size = sizeof(struct rtw89_sta);
3789         hw->txq_data_size = sizeof(struct rtw89_txq);
3790         hw->chanctx_data_size = sizeof(struct rtw89_chanctx_cfg);
3791
3792         SET_IEEE80211_PERM_ADDR(hw, efuse->addr);
3793
3794         hw->extra_tx_headroom = tx_headroom;
3795         hw->queues = IEEE80211_NUM_ACS;
3796         hw->max_rx_aggregation_subframes = RTW89_MAX_RX_AGG_NUM;
3797         hw->max_tx_aggregation_subframes = RTW89_MAX_TX_AGG_NUM;
3798         hw->uapsd_max_sp_len = IEEE80211_WMM_IE_STA_QOSINFO_SP_ALL;
3799
3800         ieee80211_hw_set(hw, SIGNAL_DBM);
3801         ieee80211_hw_set(hw, HAS_RATE_CONTROL);
3802         ieee80211_hw_set(hw, MFP_CAPABLE);
3803         ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
3804         ieee80211_hw_set(hw, AMPDU_AGGREGATION);
3805         ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3806         ieee80211_hw_set(hw, TX_AMSDU);
3807         ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
3808         ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
3809         ieee80211_hw_set(hw, SUPPORTS_PS);
3810         ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
3811         ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
3812         ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID);
3813         ieee80211_hw_set(hw, WANT_MONITOR_VIF);
3814         if (RTW89_CHK_FW_FEATURE(BEACON_FILTER, &rtwdev->fw))
3815                 ieee80211_hw_set(hw, CONNECTION_MONITOR);
3816
3817         hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
3818                                      BIT(NL80211_IFTYPE_AP) |
3819                                      BIT(NL80211_IFTYPE_P2P_CLIENT) |
3820                                      BIT(NL80211_IFTYPE_P2P_GO);
3821
3822         if (hal->ant_diversity) {
3823                 hw->wiphy->available_antennas_tx = 0x3;
3824                 hw->wiphy->available_antennas_rx = 0x3;
3825         } else {
3826                 hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1;
3827                 hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1;
3828         }
3829
3830         hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
3831                             WIPHY_FLAG_TDLS_EXTERNAL_SETUP |
3832                             WIPHY_FLAG_AP_UAPSD | WIPHY_FLAG_SPLIT_SCAN_6GHZ;
3833         hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
3834
3835         hw->wiphy->max_scan_ssids = RTW89_SCANOFLD_MAX_SSID;
3836         hw->wiphy->max_scan_ie_len = RTW89_SCANOFLD_MAX_IE_LEN;
3837
3838 #ifdef CONFIG_PM
3839         hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;
3840 #endif
3841
3842         hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL);
3843         hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL);
3844         hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL);
3845         hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL);
3846         hw->wiphy->max_remain_on_channel_duration = 1000;
3847
3848         wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
3849
3850         ret = rtw89_core_set_supported_band(rtwdev);
3851         if (ret) {
3852                 rtw89_err(rtwdev, "failed to set supported band\n");
3853                 return ret;
3854         }
3855
3856         ret = rtw89_regd_setup(rtwdev);
3857         if (ret) {
3858                 rtw89_err(rtwdev, "failed to set up regd\n");
3859                 goto err_free_supported_band;
3860         }
3861
3862         hw->wiphy->sar_capa = &rtw89_sar_capa;
3863
3864         ret = ieee80211_register_hw(hw);
3865         if (ret) {
3866                 rtw89_err(rtwdev, "failed to register hw\n");
3867                 goto err_free_supported_band;
3868         }
3869
3870         ret = rtw89_regd_init(rtwdev, rtw89_regd_notifier);
3871         if (ret) {
3872                 rtw89_err(rtwdev, "failed to init regd\n");
3873                 goto err_unregister_hw;
3874         }
3875
3876         return 0;
3877
3878 err_unregister_hw:
3879         ieee80211_unregister_hw(hw);
3880 err_free_supported_band:
3881         rtw89_core_clr_supported_band(rtwdev);
3882
3883         return ret;
3884 }
3885
3886 static void rtw89_core_unregister_hw(struct rtw89_dev *rtwdev)
3887 {
3888         struct ieee80211_hw *hw = rtwdev->hw;
3889
3890         ieee80211_unregister_hw(hw);
3891         rtw89_core_clr_supported_band(rtwdev);
3892 }
3893
3894 int rtw89_core_register(struct rtw89_dev *rtwdev)
3895 {
3896         int ret;
3897
3898         ret = rtw89_core_register_hw(rtwdev);
3899         if (ret) {
3900                 rtw89_err(rtwdev, "failed to register core hw\n");
3901                 return ret;
3902         }
3903
3904         rtw89_debugfs_init(rtwdev);
3905
3906         return 0;
3907 }
3908 EXPORT_SYMBOL(rtw89_core_register);
3909
3910 void rtw89_core_unregister(struct rtw89_dev *rtwdev)
3911 {
3912         rtw89_core_unregister_hw(rtwdev);
3913 }
3914 EXPORT_SYMBOL(rtw89_core_unregister);
3915
3916 struct rtw89_dev *rtw89_alloc_ieee80211_hw(struct device *device,
3917                                            u32 bus_data_size,
3918                                            const struct rtw89_chip_info *chip)
3919 {
3920         struct rtw89_fw_info early_fw = {};
3921         const struct firmware *firmware;
3922         struct ieee80211_hw *hw;
3923         struct rtw89_dev *rtwdev;
3924         struct ieee80211_ops *ops;
3925         u32 driver_data_size;
3926         int fw_format = -1;
3927         bool no_chanctx;
3928
3929         firmware = rtw89_early_fw_feature_recognize(device, chip, &early_fw, &fw_format);
3930
3931         ops = kmemdup(&rtw89_ops, sizeof(rtw89_ops), GFP_KERNEL);
3932         if (!ops)
3933                 goto err;
3934
3935         no_chanctx = chip->support_chanctx_num == 0 ||
3936                      !RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &early_fw) ||
3937                      !RTW89_CHK_FW_FEATURE(BEACON_FILTER, &early_fw);
3938
3939         if (no_chanctx) {
3940                 ops->add_chanctx = NULL;
3941                 ops->remove_chanctx = NULL;
3942                 ops->change_chanctx = NULL;
3943                 ops->assign_vif_chanctx = NULL;
3944                 ops->unassign_vif_chanctx = NULL;
3945                 ops->remain_on_channel = NULL;
3946                 ops->cancel_remain_on_channel = NULL;
3947         }
3948
3949         driver_data_size = sizeof(struct rtw89_dev) + bus_data_size;
3950         hw = ieee80211_alloc_hw(driver_data_size, ops);
3951         if (!hw)
3952                 goto err;
3953
3954         hw->wiphy->iface_combinations = rtw89_iface_combs;
3955         hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw89_iface_combs);
3956
3957         rtwdev = hw->priv;
3958         rtwdev->hw = hw;
3959         rtwdev->dev = device;
3960         rtwdev->ops = ops;
3961         rtwdev->chip = chip;
3962         rtwdev->fw.req.firmware = firmware;
3963         rtwdev->fw.fw_format = fw_format;
3964
3965         rtw89_debug(rtwdev, RTW89_DBG_FW, "probe driver %s chanctx\n",
3966                     no_chanctx ? "without" : "with");
3967
3968         return rtwdev;
3969
3970 err:
3971         kfree(ops);
3972         release_firmware(firmware);
3973         return NULL;
3974 }
3975 EXPORT_SYMBOL(rtw89_alloc_ieee80211_hw);
3976
3977 void rtw89_free_ieee80211_hw(struct rtw89_dev *rtwdev)
3978 {
3979         kfree(rtwdev->ops);
3980         release_firmware(rtwdev->fw.req.firmware);
3981         ieee80211_free_hw(rtwdev->hw);
3982 }
3983 EXPORT_SYMBOL(rtw89_free_ieee80211_hw);
3984
3985 MODULE_AUTHOR("Realtek Corporation");
3986 MODULE_DESCRIPTION("Realtek 802.11ax wireless core module");
3987 MODULE_LICENSE("Dual BSD/GPL");