1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
12 static u8 rtw_coex_next_rssi_state(struct rtw_dev *rtwdev, u8 pre_state,
13 u8 rssi, u8 rssi_thresh)
15 struct rtw_chip_info *chip = rtwdev->chip;
16 u8 tol = chip->rssi_tolerance;
19 if (pre_state == COEX_RSSI_STATE_LOW ||
20 pre_state == COEX_RSSI_STATE_STAY_LOW) {
21 if (rssi >= (rssi_thresh + tol))
22 next_state = COEX_RSSI_STATE_HIGH;
24 next_state = COEX_RSSI_STATE_STAY_LOW;
26 if (rssi < rssi_thresh)
27 next_state = COEX_RSSI_STATE_LOW;
29 next_state = COEX_RSSI_STATE_STAY_HIGH;
35 static void rtw_coex_limited_tx(struct rtw_dev *rtwdev,
36 bool tx_limit_en, bool ampdu_limit_en)
38 struct rtw_chip_info *chip = rtwdev->chip;
39 struct rtw_coex *coex = &rtwdev->coex;
40 struct rtw_coex_stat *coex_stat = &coex->stat;
41 bool wifi_under_b_mode = false;
43 if (!chip->scbd_support)
46 /* force max tx retry limit = 8 */
47 if (coex_stat->wl_tx_limit_en == tx_limit_en &&
48 coex_stat->wl_ampdu_limit_en == ampdu_limit_en)
51 if (!coex_stat->wl_tx_limit_en) {
52 coex_stat->darfrc = rtw_read32(rtwdev, REG_DARFRC);
53 coex_stat->darfrch = rtw_read32(rtwdev, REG_DARFRCH);
54 coex_stat->retry_limit = rtw_read16(rtwdev, REG_RETRY_LIMIT);
57 if (!coex_stat->wl_ampdu_limit_en)
58 coex_stat->ampdu_max_time =
59 rtw_read8(rtwdev, REG_AMPDU_MAX_TIME_V1);
61 coex_stat->wl_tx_limit_en = tx_limit_en;
62 coex_stat->wl_ampdu_limit_en = ampdu_limit_en;
65 /* set BT polluted packet on for tx rate adaptive,
66 * not including tx retry broken by PTA
68 rtw_write8_set(rtwdev, REG_TX_HANG_CTRL, BIT_EN_GNT_BT_AWAKE);
70 /* set queue life time to avoid can't reach tx retry limit
71 * if tx is always broken by GNT_BT
73 rtw_write8_set(rtwdev, REG_LIFETIME_EN, 0xf);
74 rtw_write16(rtwdev, REG_RETRY_LIMIT, 0x0808);
76 /* auto rate fallback step within 8 retries */
77 if (wifi_under_b_mode) {
78 rtw_write32(rtwdev, REG_DARFRC, 0x1000000);
79 rtw_write32(rtwdev, REG_DARFRCH, 0x1010101);
81 rtw_write32(rtwdev, REG_DARFRC, 0x1000000);
82 rtw_write32(rtwdev, REG_DARFRCH, 0x4030201);
85 rtw_write8_clr(rtwdev, REG_TX_HANG_CTRL, BIT_EN_GNT_BT_AWAKE);
86 rtw_write8_clr(rtwdev, REG_LIFETIME_EN, 0xf);
88 rtw_write16(rtwdev, REG_RETRY_LIMIT, coex_stat->retry_limit);
89 rtw_write32(rtwdev, REG_DARFRC, coex_stat->darfrc);
90 rtw_write32(rtwdev, REG_DARFRCH, coex_stat->darfrch);
94 rtw_write8(rtwdev, REG_AMPDU_MAX_TIME_V1, 0x20);
96 rtw_write8(rtwdev, REG_AMPDU_MAX_TIME_V1,
97 coex_stat->ampdu_max_time);
100 static void rtw_coex_limited_wl(struct rtw_dev *rtwdev)
102 struct rtw_coex *coex = &rtwdev->coex;
103 struct rtw_coex_dm *coex_dm = &coex->dm;
104 struct rtw_coex_stat *coex_stat = &coex->stat;
105 bool tx_limit = false;
106 bool tx_agg_ctrl = false;
108 if (coex->under_5g ||
109 coex_dm->bt_status == COEX_BTSTATUS_NCON_IDLE) {
110 /* no need to limit tx */
113 if (coex_stat->bt_hid_exist || coex_stat->bt_hfp_exist ||
114 coex_stat->bt_hid_pair_num > 0)
118 rtw_coex_limited_tx(rtwdev, tx_limit, tx_agg_ctrl);
121 static void rtw_coex_wl_ccklock_action(struct rtw_dev *rtwdev)
123 struct rtw_coex *coex = &rtwdev->coex;
124 struct rtw_coex_stat *coex_stat = &coex->stat;
130 para[0] = COEX_H2C69_WL_LEAKAP;
132 if (coex_stat->tdma_timer_base == 3 && coex_stat->wl_slot_extend) {
133 para[1] = PARA1_H2C69_DIS_5MS; /* disable 5ms extend */
134 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]);
135 coex_stat->wl_slot_extend = false;
136 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0;
140 if (coex_stat->wl_slot_extend && coex_stat->wl_force_lps_ctrl &&
141 !coex_stat->wl_cck_lock_ever) {
142 if (coex_stat->wl_fw_dbg_info[7] <= 5)
143 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND]++;
145 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0;
147 if (coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] == 7) {
148 para[1] = 0x1; /* disable 5ms extend */
149 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]);
150 coex_stat->wl_slot_extend = false;
151 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0;
153 } else if (!coex_stat->wl_slot_extend && coex_stat->wl_cck_lock) {
154 para[1] = 0x0; /* enable 5ms extend */
155 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]);
156 coex_stat->wl_slot_extend = true;
160 static void rtw_coex_wl_ccklock_detect(struct rtw_dev *rtwdev)
162 struct rtw_coex *coex = &rtwdev->coex;
163 struct rtw_coex_stat *coex_stat = &coex->stat;
165 /* TODO: wait for rx_rate_change_notify implement */
166 coex_stat->wl_cck_lock = false;
167 coex_stat->wl_cck_lock_pre = false;
168 coex_stat->wl_cck_lock_ever = false;
171 static void rtw_coex_wl_noisy_detect(struct rtw_dev *rtwdev)
173 struct rtw_coex *coex = &rtwdev->coex;
174 struct rtw_coex_stat *coex_stat = &coex->stat;
175 struct rtw_dm_info *dm_info = &rtwdev->dm_info;
178 /* wifi noisy environment identification */
179 cnt_cck = dm_info->cck_ok_cnt + dm_info->cck_err_cnt;
181 if (!coex_stat->wl_gl_busy) {
183 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] < 5)
184 coex_stat->cnt_wl[COEX_CNT_WL_NOISY2]++;
186 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] == 5) {
187 coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] = 0;
188 coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] = 0;
190 } else if (cnt_cck < 100) {
191 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] < 5)
192 coex_stat->cnt_wl[COEX_CNT_WL_NOISY0]++;
194 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] == 5) {
195 coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] = 0;
196 coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] = 0;
199 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] < 5)
200 coex_stat->cnt_wl[COEX_CNT_WL_NOISY1]++;
202 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] == 5) {
203 coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] = 0;
204 coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] = 0;
208 if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] == 5)
209 coex_stat->wl_noisy_level = 2;
210 else if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] == 5)
211 coex_stat->wl_noisy_level = 1;
213 coex_stat->wl_noisy_level = 0;
217 static void rtw_coex_tdma_timer_base(struct rtw_dev *rtwdev, u8 type)
219 struct rtw_coex *coex = &rtwdev->coex;
220 struct rtw_coex_stat *coex_stat = &coex->stat;
223 if (coex_stat->tdma_timer_base == type)
226 coex_stat->tdma_timer_base = type;
228 para[0] = COEX_H2C69_TDMA_SLOT;
230 if (type == 3) /* 4-slot */
231 para[1] = PARA1_H2C69_TDMA_4SLOT; /* 4-slot */
233 para[1] = PARA1_H2C69_TDMA_2SLOT;
235 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]);
237 /* no 5ms_wl_slot_extend for 4-slot mode */
238 if (coex_stat->tdma_timer_base == 3)
239 rtw_coex_wl_ccklock_action(rtwdev);
242 static void rtw_coex_set_wl_pri_mask(struct rtw_dev *rtwdev, u8 bitmap,
247 addr = REG_BT_COEX_TABLE_H + (bitmap / 8);
250 rtw_write8_mask(rtwdev, addr, BIT(bitmap), data);
253 void rtw_coex_write_scbd(struct rtw_dev *rtwdev, u16 bitpos, bool set)
255 struct rtw_chip_info *chip = rtwdev->chip;
256 struct rtw_coex *coex = &rtwdev->coex;
257 struct rtw_coex_stat *coex_stat = &coex->stat;
260 if (!chip->scbd_support)
263 val |= coex_stat->score_board;
265 /* for 8822b, scbd[10] is CQDDR on
266 * for 8822c, scbd[10] is no fix 2M
268 if (!chip->new_scbd10_def && (bitpos & COEX_SCBD_FIX2M)) {
270 val &= ~COEX_SCBD_FIX2M;
272 val |= COEX_SCBD_FIX2M;
280 if (val != coex_stat->score_board) {
281 coex_stat->score_board = val;
282 val |= BIT_BT_INT_EN;
283 rtw_write16(rtwdev, REG_WIFI_BT_INFO, val);
287 static u16 rtw_coex_read_scbd(struct rtw_dev *rtwdev)
289 struct rtw_chip_info *chip = rtwdev->chip;
291 if (!chip->scbd_support)
294 return (rtw_read16(rtwdev, REG_WIFI_BT_INFO)) & ~(BIT_BT_INT_EN);
297 static void rtw_coex_check_rfk(struct rtw_dev *rtwdev)
299 struct rtw_chip_info *chip = rtwdev->chip;
300 struct rtw_coex *coex = &rtwdev->coex;
301 struct rtw_coex_stat *coex_stat = &coex->stat;
302 struct rtw_coex_rfe *coex_rfe = &coex->rfe;
307 if (coex_rfe->wlg_at_btg && chip->scbd_support &&
308 coex_stat->bt_iqk_state != 0xff) {
309 wait_cnt = COEX_RFK_TIMEOUT / COEX_MIN_DELAY;
312 btk = !!(rtw_coex_read_scbd(rtwdev) & COEX_SCBD_BT_RFK);
315 wlk = !!(rtw_read8(rtwdev, REG_ARFR4) & BIT_WL_RFK);
320 mdelay(COEX_MIN_DELAY);
321 } while (++cnt < wait_cnt);
324 coex_stat->bt_iqk_state = 0xff;
328 static void rtw_coex_query_bt_info(struct rtw_dev *rtwdev)
330 struct rtw_coex *coex = &rtwdev->coex;
331 struct rtw_coex_stat *coex_stat = &coex->stat;
333 if (coex_stat->bt_disabled)
336 rtw_fw_query_bt_info(rtwdev);
339 static void rtw_coex_monitor_bt_enable(struct rtw_dev *rtwdev)
341 struct rtw_chip_info *chip = rtwdev->chip;
342 struct rtw_coex *coex = &rtwdev->coex;
343 struct rtw_coex_stat *coex_stat = &coex->stat;
344 struct rtw_coex_dm *coex_dm = &coex->dm;
345 bool bt_disabled = false;
348 if (chip->scbd_support) {
349 score_board = rtw_coex_read_scbd(rtwdev);
350 bt_disabled = !(score_board & COEX_SCBD_ONOFF);
353 if (coex_stat->bt_disabled != bt_disabled) {
354 rtw_dbg(rtwdev, RTW_DBG_COEX, "coex: BT state changed (%d) -> (%d)\n",
355 coex_stat->bt_disabled, bt_disabled);
357 coex_stat->bt_disabled = bt_disabled;
358 coex_stat->bt_ble_scan_type = 0;
359 coex_dm->cur_bt_lna_lvl = 0;
362 if (!coex_stat->bt_disabled) {
363 coex_stat->bt_reenable = true;
364 ieee80211_queue_delayed_work(rtwdev->hw,
365 &coex->bt_reenable_work, 15 * HZ);
367 coex_stat->bt_mailbox_reply = false;
368 coex_stat->bt_reenable = false;
372 static void rtw_coex_update_wl_link_info(struct rtw_dev *rtwdev, u8 reason)
374 struct rtw_coex *coex = &rtwdev->coex;
375 struct rtw_coex_stat *coex_stat = &coex->stat;
376 struct rtw_coex_dm *coex_dm = &coex->dm;
377 struct rtw_chip_info *chip = rtwdev->chip;
378 struct rtw_traffic_stats *stats = &rtwdev->stats;
380 bool scan = false, link = false;
386 scan = test_bit(RTW_FLAG_SCANNING, rtwdev->flags);
387 coex_stat->wl_connected = !!rtwdev->sta_cnt;
388 coex_stat->wl_gl_busy = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
390 if (stats->tx_throughput > stats->rx_throughput)
391 coex_stat->wl_tput_dir = COEX_WL_TPUT_TX;
393 coex_stat->wl_tput_dir = COEX_WL_TPUT_RX;
395 if (scan || link || reason == COEX_RSN_2GCONSTART ||
396 reason == COEX_RSN_2GSCANSTART || reason == COEX_RSN_2GSWITCHBAND)
397 coex_stat->wl_linkscan_proc = true;
399 coex_stat->wl_linkscan_proc = false;
401 rtw_coex_wl_noisy_detect(rtwdev);
403 for (i = 0; i < 4; i++) {
404 rssi_state = coex_dm->wl_rssi_state[i];
405 rssi_step = chip->wl_rssi_step[i];
406 rssi = rtwdev->dm_info.min_rssi;
407 rssi_state = rtw_coex_next_rssi_state(rtwdev, rssi_state,
409 coex_dm->wl_rssi_state[i] = rssi_state;
413 case COEX_RSN_5GSCANSTART:
414 case COEX_RSN_5GSWITCHBAND:
415 case COEX_RSN_5GCONSTART:
419 case COEX_RSN_2GSCANSTART:
420 case COEX_RSN_2GSWITCHBAND:
421 case COEX_RSN_2GCONSTART:
426 if (rtwdev->hal.current_band_type == RTW_BAND_5G)
433 coex->under_5g = is_5G;
436 static inline u8 *get_payload_from_coex_resp(struct sk_buff *resp)
438 struct rtw_c2h_cmd *c2h;
441 pkt_offset = *((u32 *)resp->cb);
442 c2h = (struct rtw_c2h_cmd *)(resp->data + pkt_offset);
447 void rtw_coex_info_response(struct rtw_dev *rtwdev, struct sk_buff *skb)
449 struct rtw_coex *coex = &rtwdev->coex;
450 u8 *payload = get_payload_from_coex_resp(skb);
452 if (payload[0] != COEX_RESP_ACK_BY_WL_FW)
455 skb_queue_tail(&coex->queue, skb);
456 wake_up(&coex->wait);
459 static struct sk_buff *rtw_coex_info_request(struct rtw_dev *rtwdev,
460 struct rtw_coex_info_req *req)
462 struct rtw_coex *coex = &rtwdev->coex;
463 struct sk_buff *skb_resp = NULL;
465 mutex_lock(&coex->mutex);
467 rtw_fw_query_bt_mp_info(rtwdev, req);
469 if (!wait_event_timeout(coex->wait, !skb_queue_empty(&coex->queue),
470 COEX_REQUEST_TIMEOUT)) {
471 rtw_err(rtwdev, "coex request time out\n");
475 skb_resp = skb_dequeue(&coex->queue);
477 rtw_err(rtwdev, "failed to get coex info response\n");
482 mutex_unlock(&coex->mutex);
486 static bool rtw_coex_get_bt_scan_type(struct rtw_dev *rtwdev, u8 *scan_type)
488 struct rtw_coex_info_req req = {0};
493 req.op_code = BT_MP_INFO_OP_SCAN_TYPE;
494 skb = rtw_coex_info_request(rtwdev, &req);
498 payload = get_payload_from_coex_resp(skb);
499 *scan_type = GET_COEX_RESP_BT_SCAN_TYPE(payload);
500 dev_kfree_skb_any(skb);
507 static bool rtw_coex_set_lna_constrain_level(struct rtw_dev *rtwdev,
508 u8 lna_constrain_level)
510 struct rtw_coex_info_req req = {0};
514 req.op_code = BT_MP_INFO_OP_LNA_CONSTRAINT;
515 req.para1 = lna_constrain_level;
516 skb = rtw_coex_info_request(rtwdev, &req);
520 dev_kfree_skb_any(skb);
527 static void rtw_coex_update_bt_link_info(struct rtw_dev *rtwdev)
529 struct rtw_coex *coex = &rtwdev->coex;
530 struct rtw_coex_stat *coex_stat = &coex->stat;
531 struct rtw_coex_dm *coex_dm = &coex->dm;
532 struct rtw_chip_info *chip = rtwdev->chip;
538 /* update wl/bt rssi by btinfo */
539 for (i = 0; i < COEX_RSSI_STEP; i++) {
540 rssi_state = coex_dm->bt_rssi_state[i];
541 rssi_step = chip->bt_rssi_step[i];
542 rssi = coex_stat->bt_rssi;
543 rssi_state = rtw_coex_next_rssi_state(rtwdev, rssi_state,
545 coex_dm->bt_rssi_state[i] = rssi_state;
548 for (i = 0; i < COEX_RSSI_STEP; i++) {
549 rssi_state = coex_dm->wl_rssi_state[i];
550 rssi_step = chip->wl_rssi_step[i];
551 rssi = rtwdev->dm_info.min_rssi;
552 rssi_state = rtw_coex_next_rssi_state(rtwdev, rssi_state,
554 coex_dm->wl_rssi_state[i] = rssi_state;
557 if (coex_stat->bt_ble_scan_en &&
558 coex_stat->cnt_bt[COEX_CNT_BT_INFOUPDATE] % 3 == 0) {
561 if (rtw_coex_get_bt_scan_type(rtwdev, &scan_type)) {
562 coex_stat->bt_ble_scan_type = scan_type;
563 if ((coex_stat->bt_ble_scan_type & 0x1) == 0x1)
564 coex_stat->bt_init_scan = true;
566 coex_stat->bt_init_scan = false;
570 coex_stat->bt_profile_num = 0;
572 /* set link exist status */
573 if (!(coex_stat->bt_info_lb2 & COEX_INFO_CONNECTION)) {
574 coex_stat->bt_link_exist = false;
575 coex_stat->bt_pan_exist = false;
576 coex_stat->bt_a2dp_exist = false;
577 coex_stat->bt_hid_exist = false;
578 coex_stat->bt_hfp_exist = false;
580 /* connection exists */
581 coex_stat->bt_link_exist = true;
582 if (coex_stat->bt_info_lb2 & COEX_INFO_FTP) {
583 coex_stat->bt_pan_exist = true;
584 coex_stat->bt_profile_num++;
586 coex_stat->bt_pan_exist = false;
589 if (coex_stat->bt_info_lb2 & COEX_INFO_A2DP) {
590 coex_stat->bt_a2dp_exist = true;
591 coex_stat->bt_profile_num++;
593 coex_stat->bt_a2dp_exist = false;
596 if (coex_stat->bt_info_lb2 & COEX_INFO_HID) {
597 coex_stat->bt_hid_exist = true;
598 coex_stat->bt_profile_num++;
600 coex_stat->bt_hid_exist = false;
603 if (coex_stat->bt_info_lb2 & COEX_INFO_SCO_ESCO) {
604 coex_stat->bt_hfp_exist = true;
605 coex_stat->bt_profile_num++;
607 coex_stat->bt_hfp_exist = false;
611 if (coex_stat->bt_info_lb2 & COEX_INFO_INQ_PAGE) {
612 coex_dm->bt_status = COEX_BTSTATUS_INQ_PAGE;
613 } else if (!(coex_stat->bt_info_lb2 & COEX_INFO_CONNECTION)) {
614 coex_dm->bt_status = COEX_BTSTATUS_NCON_IDLE;
615 } else if (coex_stat->bt_info_lb2 == COEX_INFO_CONNECTION) {
616 coex_dm->bt_status = COEX_BTSTATUS_CON_IDLE;
617 } else if ((coex_stat->bt_info_lb2 & COEX_INFO_SCO_ESCO) ||
618 (coex_stat->bt_info_lb2 & COEX_INFO_SCO_BUSY)) {
619 if (coex_stat->bt_info_lb2 & COEX_INFO_ACL_BUSY)
620 coex_dm->bt_status = COEX_BTSTATUS_ACL_SCO_BUSY;
622 coex_dm->bt_status = COEX_BTSTATUS_SCO_BUSY;
623 } else if (coex_stat->bt_info_lb2 & COEX_INFO_ACL_BUSY) {
624 coex_dm->bt_status = COEX_BTSTATUS_ACL_BUSY;
626 coex_dm->bt_status = COEX_BTSTATUS_MAX;
629 coex_stat->cnt_bt[COEX_CNT_BT_INFOUPDATE]++;
631 rtw_dbg(rtwdev, RTW_DBG_COEX, "coex: bt status(%d)\n", coex_dm->bt_status);
634 static void rtw_coex_update_wl_ch_info(struct rtw_dev *rtwdev, u8 type)
636 struct rtw_chip_info *chip = rtwdev->chip;
637 struct rtw_coex_dm *coex_dm = &rtwdev->coex.dm;
638 struct rtw_efuse *efuse = &rtwdev->efuse;
644 bw = rtwdev->hal.current_band_width;
646 if (type != COEX_MEDIA_DISCONNECT)
647 center_chan = rtwdev->hal.current_channel;
649 if (center_chan == 0 || (efuse->share_ant && center_chan <= 14)) {
651 } else if (center_chan <= 14) {
654 if (bw == RTW_CHANNEL_WIDTH_40)
655 bw = chip->bt_afh_span_bw40;
657 bw = chip->bt_afh_span_bw20;
658 } else if (chip->afh_5g_num > 1) {
659 for (i = 0; i < chip->afh_5g_num; i++) {
660 if (center_chan == chip->afh_5g[i].wl_5g_ch) {
662 center_chan = chip->afh_5g[i].bt_skip_ch;
663 bw = chip->afh_5g[i].bt_skip_span;
669 coex_dm->wl_ch_info[0] = link;
670 coex_dm->wl_ch_info[1] = center_chan;
671 coex_dm->wl_ch_info[2] = bw;
673 rtw_fw_wl_ch_info(rtwdev, link, center_chan, bw);
676 static void rtw_coex_set_bt_tx_power(struct rtw_dev *rtwdev, u8 bt_pwr_dec_lvl)
678 struct rtw_coex *coex = &rtwdev->coex;
679 struct rtw_coex_dm *coex_dm = &coex->dm;
681 if (bt_pwr_dec_lvl == coex_dm->cur_bt_pwr_lvl)
684 coex_dm->cur_bt_pwr_lvl = bt_pwr_dec_lvl;
686 rtw_fw_force_bt_tx_power(rtwdev, bt_pwr_dec_lvl);
689 static void rtw_coex_set_bt_rx_gain(struct rtw_dev *rtwdev, u8 bt_lna_lvl)
691 struct rtw_coex *coex = &rtwdev->coex;
692 struct rtw_coex_dm *coex_dm = &coex->dm;
694 if (bt_lna_lvl == coex_dm->cur_bt_lna_lvl)
697 coex_dm->cur_bt_lna_lvl = bt_lna_lvl;
699 /* notify BT rx gain table changed */
700 if (bt_lna_lvl < 7) {
701 rtw_coex_set_lna_constrain_level(rtwdev, bt_lna_lvl);
702 rtw_coex_write_scbd(rtwdev, COEX_SCBD_RXGAIN, true);
704 rtw_coex_write_scbd(rtwdev, COEX_SCBD_RXGAIN, false);
708 static void rtw_coex_set_rf_para(struct rtw_dev *rtwdev,
709 struct coex_rf_para para)
711 struct rtw_coex *coex = &rtwdev->coex;
712 struct rtw_coex_stat *coex_stat = &coex->stat;
715 if (coex->freerun && coex_stat->wl_noisy_level <= 1)
718 rtw_coex_set_wl_tx_power(rtwdev, para.wl_pwr_dec_lvl);
719 rtw_coex_set_bt_tx_power(rtwdev, para.bt_pwr_dec_lvl + offset);
720 rtw_coex_set_wl_rx_gain(rtwdev, para.wl_low_gain_en);
721 rtw_coex_set_bt_rx_gain(rtwdev, para.bt_lna_lvl);
724 u32 rtw_coex_read_indirect_reg(struct rtw_dev *rtwdev, u16 addr)
728 if (!ltecoex_read_reg(rtwdev, addr, &val)) {
729 rtw_err(rtwdev, "failed to read indirect register\n");
736 void rtw_coex_write_indirect_reg(struct rtw_dev *rtwdev, u16 addr,
739 u32 shift = __ffs(mask);
742 tmp = rtw_coex_read_indirect_reg(rtwdev, addr);
743 tmp = (tmp & (~mask)) | ((val << shift) & mask);
745 if (!ltecoex_reg_write(rtwdev, addr, tmp))
746 rtw_err(rtwdev, "failed to write indirect register\n");
749 static void rtw_coex_coex_ctrl_owner(struct rtw_dev *rtwdev, bool wifi_control)
752 rtw_write32_set(rtwdev, REG_SYS_SDIO_CTRL, BIT_LTE_MUX_CTRL_PATH);
754 rtw_write32_clr(rtwdev, REG_SYS_SDIO_CTRL, BIT_LTE_MUX_CTRL_PATH);
757 static void rtw_coex_set_gnt_bt(struct rtw_dev *rtwdev, u8 state)
759 rtw_coex_write_indirect_reg(rtwdev, 0x38, 0xc000, state);
760 rtw_coex_write_indirect_reg(rtwdev, 0x38, 0x0c00, state);
763 static void rtw_coex_set_gnt_wl(struct rtw_dev *rtwdev, u8 state)
765 rtw_coex_write_indirect_reg(rtwdev, 0x38, 0x3000, state);
766 rtw_coex_write_indirect_reg(rtwdev, 0x38, 0x0300, state);
769 static void rtw_coex_set_table(struct rtw_dev *rtwdev, u32 table0, u32 table1)
771 #define DEF_BRK_TABLE_VAL 0xf0ffffff
772 rtw_write32(rtwdev, REG_BT_COEX_TABLE0, table0);
773 rtw_write32(rtwdev, REG_BT_COEX_TABLE1, table1);
774 rtw_write32(rtwdev, REG_BT_COEX_BRK_TABLE, DEF_BRK_TABLE_VAL);
777 static void rtw_coex_table(struct rtw_dev *rtwdev, u8 type)
779 struct rtw_coex *coex = &rtwdev->coex;
780 struct rtw_coex_dm *coex_dm = &coex->dm;
781 struct rtw_chip_info *chip = rtwdev->chip;
782 struct rtw_efuse *efuse = &rtwdev->efuse;
784 coex_dm->cur_table = type;
786 if (efuse->share_ant) {
787 if (type < chip->table_sant_num)
788 rtw_coex_set_table(rtwdev,
789 chip->table_sant[type].bt,
790 chip->table_sant[type].wl);
793 if (type < chip->table_nsant_num)
794 rtw_coex_set_table(rtwdev,
795 chip->table_nsant[type].bt,
796 chip->table_nsant[type].wl);
800 static void rtw_coex_ignore_wlan_act(struct rtw_dev *rtwdev, bool enable)
802 struct rtw_coex *coex = &rtwdev->coex;
807 rtw_fw_bt_ignore_wlan_action(rtwdev, enable);
810 static void rtw_coex_power_save_state(struct rtw_dev *rtwdev, u8 ps_type,
811 u8 lps_val, u8 rpwm_val)
813 struct rtw_coex *coex = &rtwdev->coex;
814 struct rtw_coex_stat *coex_stat = &coex->stat;
817 lps_mode = rtwdev->lps_conf.mode;
820 case COEX_PS_WIFI_NATIVE:
821 /* recover to original 32k low power setting */
822 coex_stat->wl_force_lps_ctrl = false;
824 rtw_leave_lps(rtwdev);
826 case COEX_PS_LPS_OFF:
827 coex_stat->wl_force_lps_ctrl = true;
829 rtw_fw_coex_tdma_type(rtwdev, 0x8, 0, 0, 0, 0);
831 rtw_leave_lps(rtwdev);
838 static void rtw_coex_set_tdma(struct rtw_dev *rtwdev, u8 byte1, u8 byte2,
839 u8 byte3, u8 byte4, u8 byte5)
841 struct rtw_coex *coex = &rtwdev->coex;
842 struct rtw_coex_dm *coex_dm = &coex->dm;
843 struct rtw_chip_info *chip = rtwdev->chip;
844 u8 ps_type = COEX_PS_WIFI_NATIVE;
845 bool ap_enable = false;
847 if (ap_enable && (byte1 & BIT(4) && !(byte1 & BIT(5)))) {
854 ps_type = COEX_PS_WIFI_NATIVE;
855 rtw_coex_power_save_state(rtwdev, ps_type, 0x0, 0x0);
856 } else if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
857 if (chip->pstdma_type == COEX_PSTDMA_FORCE_LPSOFF)
858 ps_type = COEX_PS_LPS_OFF;
860 ps_type = COEX_PS_LPS_ON;
861 rtw_coex_power_save_state(rtwdev, ps_type, 0x50, 0x4);
863 ps_type = COEX_PS_WIFI_NATIVE;
864 rtw_coex_power_save_state(rtwdev, ps_type, 0x0, 0x0);
867 coex_dm->ps_tdma_para[0] = byte1;
868 coex_dm->ps_tdma_para[1] = byte2;
869 coex_dm->ps_tdma_para[2] = byte3;
870 coex_dm->ps_tdma_para[3] = byte4;
871 coex_dm->ps_tdma_para[4] = byte5;
873 rtw_fw_coex_tdma_type(rtwdev, byte1, byte2, byte3, byte4, byte5);
876 static void rtw_coex_tdma(struct rtw_dev *rtwdev, bool force, u32 tcase)
878 struct rtw_coex *coex = &rtwdev->coex;
879 struct rtw_coex_dm *coex_dm = &coex->dm;
880 struct rtw_chip_info *chip = rtwdev->chip;
881 struct rtw_efuse *efuse = &rtwdev->efuse;
885 if (tcase & TDMA_4SLOT)/* 4-slot (50ms) mode */
886 rtw_coex_tdma_timer_base(rtwdev, 3);
888 rtw_coex_tdma_timer_base(rtwdev, 0);
890 type = (u8)(tcase & 0xff);
892 turn_on = (type == 0 || type == 100) ? false : true;
895 if (turn_on == coex_dm->cur_ps_tdma_on &&
896 type == coex_dm->cur_ps_tdma) {
902 /* enable TBTT interrupt */
903 rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
904 rtw_coex_write_scbd(rtwdev, COEX_SCBD_TDMA, true);
906 rtw_coex_write_scbd(rtwdev, COEX_SCBD_TDMA, false);
909 if (efuse->share_ant) {
910 if (type < chip->tdma_sant_num)
911 rtw_coex_set_tdma(rtwdev,
912 chip->tdma_sant[type].para[0],
913 chip->tdma_sant[type].para[1],
914 chip->tdma_sant[type].para[2],
915 chip->tdma_sant[type].para[3],
916 chip->tdma_sant[type].para[4]);
919 if (n < chip->tdma_nsant_num)
920 rtw_coex_set_tdma(rtwdev,
921 chip->tdma_nsant[n].para[0],
922 chip->tdma_nsant[n].para[1],
923 chip->tdma_nsant[n].para[2],
924 chip->tdma_nsant[n].para[3],
925 chip->tdma_nsant[n].para[4]);
928 /* update pre state */
929 coex_dm->cur_ps_tdma_on = turn_on;
930 coex_dm->cur_ps_tdma = type;
932 rtw_dbg(rtwdev, RTW_DBG_COEX, "coex: coex tdma type (%d)\n", type);
935 static void rtw_coex_set_ant_path(struct rtw_dev *rtwdev, bool force, u8 phase)
937 struct rtw_coex *coex = &rtwdev->coex;
938 struct rtw_coex_stat *coex_stat = &coex->stat;
939 struct rtw_coex_dm *coex_dm = &coex->dm;
940 u8 ctrl_type = COEX_SWITCH_CTRL_MAX;
941 u8 pos_type = COEX_SWITCH_TO_MAX;
943 if (!force && coex_dm->cur_ant_pos_type == phase)
946 coex_dm->cur_ant_pos_type = phase;
948 /* avoid switch coex_ctrl_owner during BT IQK */
949 rtw_coex_check_rfk(rtwdev);
952 case COEX_SET_ANT_POWERON:
953 /* set path control owner to BT at power-on */
954 if (coex_stat->bt_disabled)
955 rtw_coex_coex_ctrl_owner(rtwdev, true);
957 rtw_coex_coex_ctrl_owner(rtwdev, false);
959 ctrl_type = COEX_SWITCH_CTRL_BY_BBSW;
960 pos_type = COEX_SWITCH_TO_BT;
962 case COEX_SET_ANT_INIT:
963 if (coex_stat->bt_disabled) {
964 /* set GNT_BT to SW low */
965 rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_SW_LOW);
967 /* set GNT_WL to SW high */
968 rtw_coex_set_gnt_wl(rtwdev, COEX_GNT_SET_SW_HIGH);
970 /* set GNT_BT to SW high */
971 rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_SW_HIGH);
973 /* set GNT_WL to SW low */
974 rtw_coex_set_gnt_wl(rtwdev, COEX_GNT_SET_SW_LOW);
977 /* set path control owner to wl at initial step */
978 rtw_coex_coex_ctrl_owner(rtwdev, true);
980 ctrl_type = COEX_SWITCH_CTRL_BY_BBSW;
981 pos_type = COEX_SWITCH_TO_BT;
983 case COEX_SET_ANT_WONLY:
984 /* set GNT_BT to SW Low */
985 rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_SW_LOW);
987 /* Set GNT_WL to SW high */
988 rtw_coex_set_gnt_wl(rtwdev, COEX_GNT_SET_SW_HIGH);
990 /* set path control owner to wl at initial step */
991 rtw_coex_coex_ctrl_owner(rtwdev, true);
993 ctrl_type = COEX_SWITCH_CTRL_BY_BBSW;
994 pos_type = COEX_SWITCH_TO_WLG;
996 case COEX_SET_ANT_WOFF:
997 /* set path control owner to BT */
998 rtw_coex_coex_ctrl_owner(rtwdev, false);
1000 ctrl_type = COEX_SWITCH_CTRL_BY_BT;
1001 pos_type = COEX_SWITCH_TO_NOCARE;
1003 case COEX_SET_ANT_2G:
1004 /* set GNT_BT to PTA */
1005 rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_HW_PTA);
1007 /* set GNT_WL to PTA */
1008 rtw_coex_set_gnt_wl(rtwdev, COEX_GNT_SET_HW_PTA);
1010 /* set path control owner to wl at runtime step */
1011 rtw_coex_coex_ctrl_owner(rtwdev, true);
1013 ctrl_type = COEX_SWITCH_CTRL_BY_PTA;
1014 pos_type = COEX_SWITCH_TO_NOCARE;
1016 case COEX_SET_ANT_5G:
1017 /* set GNT_BT to PTA */
1018 rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_SW_HIGH);
1020 /* set GNT_WL to SW high */
1021 rtw_coex_set_gnt_wl(rtwdev, COEX_GNT_SET_SW_HIGH);
1023 /* set path control owner to wl at runtime step */
1024 rtw_coex_coex_ctrl_owner(rtwdev, true);
1026 ctrl_type = COEX_SWITCH_CTRL_BY_BBSW;
1027 pos_type = COEX_SWITCH_TO_WLA;
1029 case COEX_SET_ANT_2G_FREERUN:
1030 /* set GNT_BT to SW high */
1031 rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_SW_HIGH);
1033 /* Set GNT_WL to SW high */
1034 rtw_coex_set_gnt_wl(rtwdev, COEX_GNT_SET_SW_HIGH);
1036 /* set path control owner to wl at runtime step */
1037 rtw_coex_coex_ctrl_owner(rtwdev, true);
1039 ctrl_type = COEX_SWITCH_CTRL_BY_BBSW;
1040 pos_type = COEX_SWITCH_TO_WLG_BT;
1042 case COEX_SET_ANT_2G_WLBT:
1043 /* set GNT_BT to SW high */
1044 rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_HW_PTA);
1046 /* Set GNT_WL to SW high */
1047 rtw_coex_set_gnt_wl(rtwdev, COEX_GNT_SET_HW_PTA);
1049 /* set path control owner to wl at runtime step */
1050 rtw_coex_coex_ctrl_owner(rtwdev, true);
1052 ctrl_type = COEX_SWITCH_CTRL_BY_BBSW;
1053 pos_type = COEX_SWITCH_TO_WLG_BT;
1056 WARN(1, "unknown phase when setting antenna path\n");
1060 if (ctrl_type < COEX_SWITCH_CTRL_MAX && pos_type < COEX_SWITCH_TO_MAX)
1061 rtw_coex_set_ant_switch(rtwdev, ctrl_type, pos_type);
1064 static u8 rtw_coex_algorithm(struct rtw_dev *rtwdev)
1066 struct rtw_coex *coex = &rtwdev->coex;
1067 struct rtw_coex_stat *coex_stat = &coex->stat;
1068 u8 algorithm = COEX_ALGO_NOPROFILE;
1071 if (coex_stat->bt_hfp_exist)
1072 profile_map |= BPM_HFP;
1073 if (coex_stat->bt_hid_exist)
1074 profile_map |= BPM_HID;
1075 if (coex_stat->bt_a2dp_exist)
1076 profile_map |= BPM_A2DP;
1077 if (coex_stat->bt_pan_exist)
1078 profile_map |= BPM_PAN;
1080 switch (profile_map) {
1082 algorithm = COEX_ALGO_HFP;
1085 case BPM_HFP + BPM_HID:
1086 algorithm = COEX_ALGO_HID;
1088 case BPM_HFP + BPM_A2DP:
1089 case BPM_HID + BPM_A2DP:
1090 case BPM_HFP + BPM_HID + BPM_A2DP:
1091 algorithm = COEX_ALGO_A2DP_HID;
1093 case BPM_HFP + BPM_PAN:
1094 case BPM_HID + BPM_PAN:
1095 case BPM_HFP + BPM_HID + BPM_PAN:
1096 algorithm = COEX_ALGO_PAN_HID;
1098 case BPM_HFP + BPM_A2DP + BPM_PAN:
1099 case BPM_HID + BPM_A2DP + BPM_PAN:
1100 case BPM_HFP + BPM_HID + BPM_A2DP + BPM_PAN:
1101 algorithm = COEX_ALGO_A2DP_PAN_HID;
1104 algorithm = COEX_ALGO_PAN;
1106 case BPM_A2DP + BPM_PAN:
1107 algorithm = COEX_ALGO_A2DP_PAN;
1110 if (coex_stat->bt_multi_link) {
1111 if (coex_stat->bt_hid_pair_num > 0)
1112 algorithm = COEX_ALGO_A2DP_HID;
1114 algorithm = COEX_ALGO_A2DP_PAN;
1116 algorithm = COEX_ALGO_A2DP;
1120 algorithm = COEX_ALGO_NOPROFILE;
1127 static void rtw_coex_action_coex_all_off(struct rtw_dev *rtwdev)
1129 struct rtw_efuse *efuse = &rtwdev->efuse;
1130 struct rtw_chip_info *chip = rtwdev->chip;
1131 u8 table_case, tdma_case;
1133 if (efuse->share_ant) {
1138 /* Non-Shared-Ant */
1143 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1144 rtw_coex_table(rtwdev, table_case);
1145 rtw_coex_tdma(rtwdev, false, tdma_case);
1148 static void rtw_coex_action_freerun(struct rtw_dev *rtwdev)
1150 struct rtw_coex *coex = &rtwdev->coex;
1151 struct rtw_coex_stat *coex_stat = &coex->stat;
1152 struct rtw_coex_dm *coex_dm = &coex->dm;
1153 struct rtw_efuse *efuse = &rtwdev->efuse;
1154 struct rtw_chip_info *chip = rtwdev->chip;
1157 if (efuse->share_ant)
1160 coex->freerun = true;
1162 if (coex_stat->wl_connected)
1163 rtw_coex_update_wl_ch_info(rtwdev, COEX_MEDIA_CONNECT);
1165 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G_FREERUN);
1167 rtw_coex_write_scbd(rtwdev, COEX_SCBD_FIX2M, false);
1169 if (COEX_RSSI_HIGH(coex_dm->wl_rssi_state[0]))
1171 else if (COEX_RSSI_HIGH(coex_dm->wl_rssi_state[1]))
1173 else if (COEX_RSSI_HIGH(coex_dm->wl_rssi_state[2]))
1178 if (level > chip->wl_rf_para_num - 1)
1179 level = chip->wl_rf_para_num - 1;
1181 if (coex_stat->wl_tput_dir == COEX_WL_TPUT_TX)
1182 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_tx[level]);
1184 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[level]);
1186 rtw_coex_table(rtwdev, 100);
1187 rtw_coex_tdma(rtwdev, false, 100);
1190 static void rtw_coex_action_bt_whql_test(struct rtw_dev *rtwdev)
1192 struct rtw_efuse *efuse = &rtwdev->efuse;
1193 struct rtw_chip_info *chip = rtwdev->chip;
1194 u8 table_case, tdma_case;
1196 if (efuse->share_ant) {
1201 /* Non-Shared-Ant */
1206 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1207 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1208 rtw_coex_table(rtwdev, table_case);
1209 rtw_coex_tdma(rtwdev, false, tdma_case);
1212 static void rtw_coex_action_bt_relink(struct rtw_dev *rtwdev)
1214 struct rtw_efuse *efuse = &rtwdev->efuse;
1215 struct rtw_chip_info *chip = rtwdev->chip;
1216 u8 table_case, tdma_case;
1218 if (efuse->share_ant) {
1223 /* Non-Shared-Ant */
1228 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1229 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1230 rtw_coex_table(rtwdev, table_case);
1231 rtw_coex_tdma(rtwdev, false, tdma_case);
1234 static void rtw_coex_action_bt_idle(struct rtw_dev *rtwdev)
1236 struct rtw_coex *coex = &rtwdev->coex;
1237 struct rtw_coex_stat *coex_stat = &coex->stat;
1238 struct rtw_coex_dm *coex_dm = &coex->dm;
1239 struct rtw_efuse *efuse = &rtwdev->efuse;
1240 struct rtw_chip_info *chip = rtwdev->chip;
1241 struct rtw_coex_rfe *coex_rfe = &coex->rfe;
1242 u8 table_case = 0xff, tdma_case = 0xff;
1244 if (coex_rfe->ant_switch_with_bt &&
1245 coex_dm->bt_status == COEX_BTSTATUS_NCON_IDLE) {
1246 if (efuse->share_ant &&
1247 COEX_RSSI_HIGH(coex_dm->wl_rssi_state[1])) {
1250 } else if (!efuse->share_ant) {
1256 if (table_case != 0xff && tdma_case != 0xff) {
1257 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G_FREERUN);
1258 rtw_coex_table(rtwdev, table_case);
1259 rtw_coex_tdma(rtwdev, false, tdma_case);
1263 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1265 if (efuse->share_ant) {
1267 if (!coex_stat->wl_gl_busy) {
1270 } else if (coex_dm->bt_status == COEX_BTSTATUS_NCON_IDLE) {
1278 /* Non-Shared-Ant */
1279 if (!coex_stat->wl_gl_busy) {
1282 } else if ((coex_stat->bt_ble_scan_type & 0x2) &&
1283 coex_dm->bt_status == COEX_BTSTATUS_NCON_IDLE) {
1292 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1293 rtw_coex_table(rtwdev, table_case);
1294 rtw_coex_tdma(rtwdev, false, tdma_case);
1297 static void rtw_coex_action_bt_inquiry(struct rtw_dev *rtwdev)
1299 struct rtw_coex *coex = &rtwdev->coex;
1300 struct rtw_coex_stat *coex_stat = &coex->stat;
1301 struct rtw_efuse *efuse = &rtwdev->efuse;
1302 struct rtw_chip_info *chip = rtwdev->chip;
1303 bool wl_hi_pri = false;
1304 u8 table_case, tdma_case;
1306 if (coex_stat->wl_linkscan_proc || coex_stat->wl_hi_pri_task1 ||
1307 coex_stat->wl_hi_pri_task2)
1310 if (efuse->share_ant) {
1314 if (coex_stat->bt_a2dp_exist &&
1315 !coex_stat->bt_pan_exist)
1317 else if (coex_stat->wl_hi_pri_task1)
1319 else if (!coex_stat->bt_page)
1323 } else if (coex_stat->wl_connected) {
1331 /* Non_Shared-Ant */
1334 if (coex_stat->bt_a2dp_exist &&
1335 !coex_stat->bt_pan_exist)
1337 else if (coex_stat->wl_hi_pri_task1)
1339 else if (!coex_stat->bt_page)
1343 } else if (coex_stat->wl_connected) {
1352 rtw_dbg(rtwdev, RTW_DBG_COEX, "coex: wifi hi(%d), bt page(%d)\n",
1353 wl_hi_pri, coex_stat->bt_page);
1355 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1356 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1357 rtw_coex_table(rtwdev, table_case);
1358 rtw_coex_tdma(rtwdev, false, tdma_case);
1361 static void rtw_coex_action_bt_hfp(struct rtw_dev *rtwdev)
1363 struct rtw_coex *coex = &rtwdev->coex;
1364 struct rtw_coex_stat *coex_stat = &coex->stat;
1365 struct rtw_efuse *efuse = &rtwdev->efuse;
1366 struct rtw_chip_info *chip = rtwdev->chip;
1367 u8 table_case, tdma_case;
1369 if (efuse->share_ant) {
1371 if (coex_stat->bt_multi_link) {
1379 /* Non-Shared-Ant */
1380 if (coex_stat->bt_multi_link) {
1389 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1390 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1391 rtw_coex_table(rtwdev, table_case);
1392 rtw_coex_tdma(rtwdev, false, tdma_case);
1395 static void rtw_coex_action_bt_hid(struct rtw_dev *rtwdev)
1397 struct rtw_coex *coex = &rtwdev->coex;
1398 struct rtw_coex_stat *coex_stat = &coex->stat;
1399 struct rtw_efuse *efuse = &rtwdev->efuse;
1400 struct rtw_chip_info *chip = rtwdev->chip;
1401 u8 table_case, tdma_case;
1404 wl_bw = rtwdev->hal.current_band_width;
1406 if (efuse->share_ant) {
1408 if (coex_stat->bt_ble_exist) {
1410 if (!coex_stat->wl_gl_busy)
1415 if (coex_stat->bt_a2dp_active || wl_bw == 0)
1417 else if (coex_stat->wl_gl_busy)
1422 if (coex_stat->bt_a2dp_active || wl_bw == 0) {
1427 if (coex_stat->bt_418_hid_exist &&
1428 coex_stat->wl_gl_busy)
1436 /* Non-Shared-Ant */
1437 if (coex_stat->bt_a2dp_active) {
1440 } else if (coex_stat->bt_ble_exist) {
1444 if (coex_stat->wl_gl_busy)
1454 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1455 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1456 rtw_coex_table(rtwdev, table_case);
1457 rtw_coex_tdma(rtwdev, false, tdma_case);
1460 static void rtw_coex_action_bt_a2dp(struct rtw_dev *rtwdev)
1462 struct rtw_coex *coex = &rtwdev->coex;
1463 struct rtw_coex_stat *coex_stat = &coex->stat;
1464 struct rtw_coex_dm *coex_dm = &coex->dm;
1465 struct rtw_efuse *efuse = &rtwdev->efuse;
1466 struct rtw_chip_info *chip = rtwdev->chip;
1467 u8 table_case, tdma_case;
1470 if (efuse->share_ant) {
1472 if (coex_stat->wl_gl_busy && coex_stat->wl_noisy_level == 0)
1477 slot_type = TDMA_4SLOT;
1479 if (coex_stat->wl_gl_busy)
1484 /* Non-Shared-Ant */
1487 if (COEX_RSSI_HIGH(coex_dm->wl_rssi_state[1]))
1493 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1494 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1495 rtw_coex_table(rtwdev, table_case);
1496 rtw_coex_tdma(rtwdev, false, tdma_case | slot_type);
1499 static void rtw_coex_action_bt_a2dpsink(struct rtw_dev *rtwdev)
1501 struct rtw_coex *coex = &rtwdev->coex;
1502 struct rtw_coex_stat *coex_stat = &coex->stat;
1503 struct rtw_efuse *efuse = &rtwdev->efuse;
1504 struct rtw_chip_info *chip = rtwdev->chip;
1505 u8 table_case, tdma_case;
1506 bool ap_enable = false;
1508 if (efuse->share_ant) { /* Shared-Ant */
1512 } else if (coex_stat->wl_gl_busy) {
1519 } else { /* Non-Shared-Ant */
1529 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1530 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1531 rtw_coex_table(rtwdev, table_case);
1532 rtw_coex_tdma(rtwdev, false, tdma_case);
1535 static void rtw_coex_action_bt_pan(struct rtw_dev *rtwdev)
1537 struct rtw_coex *coex = &rtwdev->coex;
1538 struct rtw_coex_stat *coex_stat = &coex->stat;
1539 struct rtw_efuse *efuse = &rtwdev->efuse;
1540 struct rtw_chip_info *chip = rtwdev->chip;
1541 u8 table_case, tdma_case;
1543 if (efuse->share_ant) {
1545 if (coex_stat->wl_gl_busy && coex_stat->wl_noisy_level == 0)
1550 if (coex_stat->wl_gl_busy)
1555 /* Non-Shared-Ant */
1558 if (coex_stat->wl_gl_busy)
1564 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1565 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1566 rtw_coex_table(rtwdev, table_case);
1567 rtw_coex_tdma(rtwdev, false, tdma_case);
1570 static void rtw_coex_action_bt_a2dp_hid(struct rtw_dev *rtwdev)
1572 struct rtw_coex *coex = &rtwdev->coex;
1573 struct rtw_coex_stat *coex_stat = &coex->stat;
1574 struct rtw_coex_dm *coex_dm = &coex->dm;
1575 struct rtw_efuse *efuse = &rtwdev->efuse;
1576 struct rtw_chip_info *chip = rtwdev->chip;
1577 u8 table_case, tdma_case;
1580 if (efuse->share_ant) {
1582 if (coex_stat->bt_ble_exist)
1587 if (coex_stat->wl_gl_busy) {
1588 slot_type = TDMA_4SLOT;
1594 /* Non-Shared-Ant */
1595 if (coex_stat->bt_ble_exist)
1600 if (COEX_RSSI_HIGH(coex_dm->wl_rssi_state[1]))
1606 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1607 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1608 rtw_coex_table(rtwdev, table_case);
1609 rtw_coex_tdma(rtwdev, false, tdma_case | slot_type);
1612 static void rtw_coex_action_bt_a2dp_pan(struct rtw_dev *rtwdev)
1614 struct rtw_coex *coex = &rtwdev->coex;
1615 struct rtw_coex_stat *coex_stat = &coex->stat;
1616 struct rtw_efuse *efuse = &rtwdev->efuse;
1617 struct rtw_chip_info *chip = rtwdev->chip;
1618 u8 table_case, tdma_case;
1620 if (efuse->share_ant) {
1622 if (coex_stat->wl_gl_busy &&
1623 coex_stat->wl_noisy_level == 0)
1628 if (coex_stat->wl_gl_busy)
1633 /* Non-Shared-Ant */
1636 if (coex_stat->wl_gl_busy)
1642 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1643 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1644 rtw_coex_table(rtwdev, table_case);
1645 rtw_coex_tdma(rtwdev, false, tdma_case);
1648 static void rtw_coex_action_bt_pan_hid(struct rtw_dev *rtwdev)
1650 struct rtw_coex *coex = &rtwdev->coex;
1651 struct rtw_coex_stat *coex_stat = &coex->stat;
1652 struct rtw_efuse *efuse = &rtwdev->efuse;
1653 struct rtw_chip_info *chip = rtwdev->chip;
1654 u8 table_case, tdma_case;
1656 if (efuse->share_ant) {
1660 if (coex_stat->wl_gl_busy)
1665 /* Non-Shared-Ant */
1668 if (coex_stat->wl_gl_busy)
1674 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1675 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1676 rtw_coex_table(rtwdev, table_case);
1677 rtw_coex_tdma(rtwdev, false, tdma_case);
1680 static void rtw_coex_action_bt_a2dp_pan_hid(struct rtw_dev *rtwdev)
1682 struct rtw_coex *coex = &rtwdev->coex;
1683 struct rtw_coex_stat *coex_stat = &coex->stat;
1684 struct rtw_efuse *efuse = &rtwdev->efuse;
1685 struct rtw_chip_info *chip = rtwdev->chip;
1686 u8 table_case, tdma_case;
1688 if (efuse->share_ant) {
1692 if (coex_stat->wl_gl_busy)
1697 /* Non-Shared-Ant */
1700 if (coex_stat->wl_gl_busy)
1706 rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G);
1707 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1708 rtw_coex_table(rtwdev, table_case);
1709 rtw_coex_tdma(rtwdev, false, tdma_case);
1712 static void rtw_coex_action_wl_under5g(struct rtw_dev *rtwdev)
1714 struct rtw_efuse *efuse = &rtwdev->efuse;
1715 struct rtw_chip_info *chip = rtwdev->chip;
1716 u8 table_case, tdma_case;
1718 rtw_coex_write_scbd(rtwdev, COEX_SCBD_FIX2M, false);
1720 if (efuse->share_ant) {
1725 /* Non-Shared-Ant */
1730 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_5G);
1731 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1732 rtw_coex_table(rtwdev, table_case);
1733 rtw_coex_tdma(rtwdev, false, tdma_case);
1736 static void rtw_coex_action_wl_only(struct rtw_dev *rtwdev)
1738 struct rtw_efuse *efuse = &rtwdev->efuse;
1739 struct rtw_chip_info *chip = rtwdev->chip;
1740 u8 table_case, tdma_case;
1742 if (efuse->share_ant) {
1747 /* Non-Shared-Ant */
1752 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G);
1753 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1754 rtw_coex_table(rtwdev, table_case);
1755 rtw_coex_tdma(rtwdev, false, tdma_case);
1758 static void rtw_coex_action_wl_native_lps(struct rtw_dev *rtwdev)
1760 struct rtw_coex *coex = &rtwdev->coex;
1761 struct rtw_efuse *efuse = &rtwdev->efuse;
1762 struct rtw_chip_info *chip = rtwdev->chip;
1763 u8 table_case, tdma_case;
1768 if (efuse->share_ant) {
1773 /* Non-Shared-Ant */
1778 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G);
1779 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1780 rtw_coex_table(rtwdev, table_case);
1781 rtw_coex_tdma(rtwdev, false, tdma_case);
1784 static void rtw_coex_action_wl_linkscan(struct rtw_dev *rtwdev)
1786 struct rtw_coex *coex = &rtwdev->coex;
1787 struct rtw_coex_stat *coex_stat = &coex->stat;
1788 struct rtw_efuse *efuse = &rtwdev->efuse;
1789 struct rtw_chip_info *chip = rtwdev->chip;
1790 u8 table_case, tdma_case;
1792 if (efuse->share_ant) {
1794 if (coex_stat->bt_a2dp_exist) {
1802 /* Non-Shared-Ant */
1803 if (coex_stat->bt_a2dp_exist) {
1812 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G);
1813 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1814 rtw_coex_table(rtwdev, table_case);
1815 rtw_coex_tdma(rtwdev, false, tdma_case);
1818 static void rtw_coex_action_wl_not_connected(struct rtw_dev *rtwdev)
1820 struct rtw_efuse *efuse = &rtwdev->efuse;
1821 struct rtw_chip_info *chip = rtwdev->chip;
1822 u8 table_case, tdma_case;
1824 if (efuse->share_ant) {
1829 /* Non-Shared-Ant */
1834 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G);
1835 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]);
1836 rtw_coex_table(rtwdev, table_case);
1837 rtw_coex_tdma(rtwdev, false, tdma_case);
1840 static void rtw_coex_action_wl_connected(struct rtw_dev *rtwdev)
1842 struct rtw_coex *coex = &rtwdev->coex;
1843 struct rtw_coex_stat *coex_stat = &coex->stat;
1844 struct rtw_coex_dm *coex_dm = &coex->dm;
1845 struct rtw_efuse *efuse = &rtwdev->efuse;
1848 /* Non-Shared-Ant */
1849 if (!efuse->share_ant && coex_stat->wl_gl_busy &&
1850 COEX_RSSI_HIGH(coex_dm->wl_rssi_state[3]) &&
1851 COEX_RSSI_HIGH(coex_dm->bt_rssi_state[0])) {
1852 rtw_coex_action_freerun(rtwdev);
1856 algorithm = rtw_coex_algorithm(rtwdev);
1858 switch (algorithm) {
1860 rtw_coex_action_bt_hfp(rtwdev);
1863 rtw_coex_action_bt_hid(rtwdev);
1865 case COEX_ALGO_A2DP:
1866 if (coex_stat->bt_a2dp_sink)
1867 rtw_coex_action_bt_a2dpsink(rtwdev);
1869 rtw_coex_action_bt_a2dp(rtwdev);
1872 rtw_coex_action_bt_pan(rtwdev);
1874 case COEX_ALGO_A2DP_HID:
1875 rtw_coex_action_bt_a2dp_hid(rtwdev);
1877 case COEX_ALGO_A2DP_PAN:
1878 rtw_coex_action_bt_a2dp_pan(rtwdev);
1880 case COEX_ALGO_PAN_HID:
1881 rtw_coex_action_bt_pan_hid(rtwdev);
1883 case COEX_ALGO_A2DP_PAN_HID:
1884 rtw_coex_action_bt_a2dp_pan_hid(rtwdev);
1887 case COEX_ALGO_NOPROFILE:
1888 rtw_coex_action_bt_idle(rtwdev);
1893 static void rtw_coex_run_coex(struct rtw_dev *rtwdev, u8 reason)
1895 struct rtw_coex *coex = &rtwdev->coex;
1896 struct rtw_coex_dm *coex_dm = &coex->dm;
1897 struct rtw_coex_stat *coex_stat = &coex->stat;
1899 lockdep_assert_held(&rtwdev->mutex);
1901 coex_dm->reason = reason;
1903 /* update wifi_link_info_ext variable */
1904 rtw_coex_update_wl_link_info(rtwdev, reason);
1906 rtw_coex_monitor_bt_enable(rtwdev);
1911 if (coex_stat->wl_under_ips)
1914 if (coex->freeze && !coex_stat->bt_setup_link)
1917 coex_stat->cnt_wl[COEX_CNT_WL_COEXRUN]++;
1918 coex->freerun = false;
1920 /* Pure-5G Coex Process */
1921 if (coex->under_5g) {
1922 coex_stat->wl_coex_mode = COEX_WLINK_5G;
1923 rtw_coex_action_wl_under5g(rtwdev);
1927 coex_stat->wl_coex_mode = COEX_WLINK_2G1PORT;
1928 rtw_coex_write_scbd(rtwdev, COEX_SCBD_FIX2M, false);
1929 if (coex_stat->bt_disabled) {
1930 rtw_coex_action_wl_only(rtwdev);
1934 if (coex_stat->wl_under_lps && !coex_stat->wl_force_lps_ctrl) {
1935 rtw_coex_action_wl_native_lps(rtwdev);
1939 if (coex_stat->bt_whck_test) {
1940 rtw_coex_action_bt_whql_test(rtwdev);
1944 if (coex_stat->bt_setup_link) {
1945 rtw_coex_action_bt_relink(rtwdev);
1949 if (coex_stat->bt_inq_page) {
1950 rtw_coex_action_bt_inquiry(rtwdev);
1954 if ((coex_dm->bt_status == COEX_BTSTATUS_NCON_IDLE ||
1955 coex_dm->bt_status == COEX_BTSTATUS_CON_IDLE) &&
1956 coex_stat->wl_connected) {
1957 rtw_coex_action_bt_idle(rtwdev);
1961 if (coex_stat->wl_linkscan_proc) {
1962 rtw_coex_action_wl_linkscan(rtwdev);
1966 if (coex_stat->wl_connected)
1967 rtw_coex_action_wl_connected(rtwdev);
1969 rtw_coex_action_wl_not_connected(rtwdev);
1972 rtw_coex_set_gnt_fix(rtwdev);
1973 rtw_coex_limited_wl(rtwdev);
1976 static void rtw_coex_init_coex_var(struct rtw_dev *rtwdev)
1978 struct rtw_coex *coex = &rtwdev->coex;
1979 struct rtw_coex_stat *coex_stat = &coex->stat;
1980 struct rtw_coex_dm *coex_dm = &coex->dm;
1983 memset(coex_dm, 0, sizeof(*coex_dm));
1984 memset(coex_stat, 0, sizeof(*coex_stat));
1986 for (i = 0; i < COEX_CNT_WL_MAX; i++)
1987 coex_stat->cnt_wl[i] = 0;
1989 for (i = 0; i < COEX_CNT_BT_MAX; i++)
1990 coex_stat->cnt_bt[i] = 0;
1992 for (i = 0; i < ARRAY_SIZE(coex_dm->bt_rssi_state); i++)
1993 coex_dm->bt_rssi_state[i] = COEX_RSSI_STATE_LOW;
1995 for (i = 0; i < ARRAY_SIZE(coex_dm->wl_rssi_state); i++)
1996 coex_dm->wl_rssi_state[i] = COEX_RSSI_STATE_LOW;
1998 coex_stat->wl_coex_mode = COEX_WLINK_MAX;
2001 static void __rtw_coex_init_hw_config(struct rtw_dev *rtwdev, bool wifi_only)
2003 struct rtw_coex *coex = &rtwdev->coex;
2005 rtw_coex_init_coex_var(rtwdev);
2006 rtw_coex_monitor_bt_enable(rtwdev);
2007 rtw_coex_set_rfe_type(rtwdev);
2008 rtw_coex_set_init(rtwdev);
2010 /* set Tx response = Hi-Pri (ex: Transmitting ACK,BA,CTS) */
2011 rtw_coex_set_wl_pri_mask(rtwdev, COEX_WLPRI_TX_RSP, 1);
2013 /* set Tx beacon = Hi-Pri */
2014 rtw_coex_set_wl_pri_mask(rtwdev, COEX_WLPRI_TX_BEACON, 1);
2016 /* set Tx beacon queue = Hi-Pri */
2017 rtw_coex_set_wl_pri_mask(rtwdev, COEX_WLPRI_TX_BEACONQ, 1);
2019 /* antenna config */
2020 if (coex->wl_rf_off) {
2021 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_WOFF);
2022 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ALL, false);
2023 coex->stop_dm = true;
2024 } else if (wifi_only) {
2025 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_WONLY);
2026 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_SCAN,
2028 coex->stop_dm = true;
2030 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_INIT);
2031 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_SCAN,
2033 coex->stop_dm = false;
2034 coex->freeze = true;
2038 rtw_coex_table(rtwdev, 0);
2039 rtw_coex_tdma(rtwdev, true, 0);
2040 rtw_coex_query_bt_info(rtwdev);
2043 void rtw_coex_power_on_setting(struct rtw_dev *rtwdev)
2045 struct rtw_coex *coex = &rtwdev->coex;
2047 coex->stop_dm = true;
2048 coex->wl_rf_off = false;
2050 /* enable BB, we can write 0x948 */
2051 rtw_write8_set(rtwdev, REG_SYS_FUNC_EN, BIT(0) | BIT(1));
2053 rtw_coex_monitor_bt_enable(rtwdev);
2054 rtw_coex_set_rfe_type(rtwdev);
2056 /* set antenna path to BT */
2057 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_POWERON);
2060 rtw_write8(rtwdev, 0xff1a, 0x0);
2063 void rtw_coex_init_hw_config(struct rtw_dev *rtwdev, bool wifi_only)
2065 __rtw_coex_init_hw_config(rtwdev, wifi_only);
2068 void rtw_coex_ips_notify(struct rtw_dev *rtwdev, u8 type)
2070 struct rtw_coex *coex = &rtwdev->coex;
2071 struct rtw_coex_stat *coex_stat = &coex->stat;
2076 if (type == COEX_IPS_ENTER) {
2077 coex_stat->wl_under_ips = true;
2080 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ALL, false);
2082 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_WOFF);
2083 rtw_coex_action_coex_all_off(rtwdev);
2084 } else if (type == COEX_IPS_LEAVE) {
2085 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_ONOFF, true);
2087 /* run init hw config (exclude wifi only) */
2088 __rtw_coex_init_hw_config(rtwdev, false);
2091 coex_stat->wl_under_ips = false;
2095 void rtw_coex_lps_notify(struct rtw_dev *rtwdev, u8 type)
2097 struct rtw_coex *coex = &rtwdev->coex;
2098 struct rtw_coex_stat *coex_stat = &coex->stat;
2103 if (type == COEX_LPS_ENABLE) {
2104 coex_stat->wl_under_lps = true;
2106 if (coex_stat->wl_force_lps_ctrl) {
2108 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE, true);
2111 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE, false);
2113 rtw_coex_run_coex(rtwdev, COEX_RSN_LPS);
2115 } else if (type == COEX_LPS_DISABLE) {
2116 coex_stat->wl_under_lps = false;
2119 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE, true);
2121 if (!coex_stat->wl_force_lps_ctrl)
2122 rtw_coex_query_bt_info(rtwdev);
2126 void rtw_coex_scan_notify(struct rtw_dev *rtwdev, u8 type)
2128 struct rtw_coex *coex = &rtwdev->coex;
2129 struct rtw_coex_stat *coex_stat = &coex->stat;
2134 coex->freeze = false;
2136 if (type != COEX_SCAN_FINISH)
2137 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_SCAN |
2138 COEX_SCBD_ONOFF, true);
2140 if (type == COEX_SCAN_START_5G) {
2141 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_5G);
2142 rtw_coex_run_coex(rtwdev, COEX_RSN_5GSCANSTART);
2143 } else if ((type == COEX_SCAN_START_2G) || (type == COEX_SCAN_START)) {
2144 coex_stat->wl_hi_pri_task2 = true;
2146 /* Force antenna setup for no scan result issue */
2147 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G);
2148 rtw_coex_run_coex(rtwdev, COEX_RSN_2GSCANSTART);
2150 coex_stat->wl_hi_pri_task2 = false;
2151 rtw_coex_run_coex(rtwdev, COEX_RSN_SCANFINISH);
2155 void rtw_coex_switchband_notify(struct rtw_dev *rtwdev, u8 type)
2157 struct rtw_coex *coex = &rtwdev->coex;
2162 if (type == COEX_SWITCH_TO_5G)
2163 rtw_coex_run_coex(rtwdev, COEX_RSN_5GSWITCHBAND);
2164 else if (type == COEX_SWITCH_TO_24G_NOFORSCAN)
2165 rtw_coex_run_coex(rtwdev, COEX_RSN_2GSWITCHBAND);
2167 rtw_coex_scan_notify(rtwdev, COEX_SCAN_START_2G);
2170 void rtw_coex_connect_notify(struct rtw_dev *rtwdev, u8 type)
2172 struct rtw_coex *coex = &rtwdev->coex;
2173 struct rtw_coex_stat *coex_stat = &coex->stat;
2178 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_SCAN |
2179 COEX_SCBD_ONOFF, true);
2181 if (type == COEX_ASSOCIATE_5G_START) {
2182 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_5G);
2183 rtw_coex_run_coex(rtwdev, COEX_RSN_5GCONSTART);
2184 } else if (type == COEX_ASSOCIATE_5G_FINISH) {
2185 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_5G);
2186 rtw_coex_run_coex(rtwdev, COEX_RSN_5GCONFINISH);
2187 } else if (type == COEX_ASSOCIATE_START) {
2188 coex_stat->wl_hi_pri_task1 = true;
2189 coex_stat->cnt_wl[COEX_CNT_WL_CONNPKT] = 2;
2191 /* Force antenna setup for no scan result issue */
2192 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G);
2194 rtw_coex_run_coex(rtwdev, COEX_RSN_2GCONSTART);
2196 /* To keep TDMA case during connect process,
2197 * to avoid changed by Btinfo and runcoexmechanism
2199 coex->freeze = true;
2200 ieee80211_queue_delayed_work(rtwdev->hw, &coex->defreeze_work,
2203 coex_stat->wl_hi_pri_task1 = false;
2204 coex->freeze = false;
2206 rtw_coex_run_coex(rtwdev, COEX_RSN_2GCONFINISH);
2210 void rtw_coex_media_status_notify(struct rtw_dev *rtwdev, u8 type)
2212 struct rtw_coex *coex = &rtwdev->coex;
2213 struct rtw_coex_stat *coex_stat = &coex->stat;
2219 if (type == COEX_MEDIA_CONNECT_5G) {
2220 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE, true);
2222 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_5G);
2223 rtw_coex_run_coex(rtwdev, COEX_RSN_5GMEDIA);
2224 } else if (type == COEX_MEDIA_CONNECT) {
2225 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE, true);
2227 /* Force antenna setup for no scan result issue */
2228 rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G);
2230 /* Set CCK Rx high Pri */
2231 rtw_coex_set_wl_pri_mask(rtwdev, COEX_WLPRI_RX_CCK, 1);
2233 /* always enable 5ms extend if connect */
2234 para[0] = COEX_H2C69_WL_LEAKAP;
2235 para[1] = PARA1_H2C69_EN_5MS; /* enable 5ms extend */
2236 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]);
2237 coex_stat->wl_slot_extend = true;
2238 rtw_coex_run_coex(rtwdev, COEX_RSN_2GMEDIA);
2240 rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE, false);
2242 rtw_coex_set_wl_pri_mask(rtwdev, COEX_WLPRI_RX_CCK, 0);
2244 rtw_coex_run_coex(rtwdev, COEX_RSN_MEDIADISCON);
2247 rtw_coex_update_wl_ch_info(rtwdev, type);
2250 void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length)
2252 struct rtw_coex *coex = &rtwdev->coex;
2253 struct rtw_coex_stat *coex_stat = &coex->stat;
2254 struct rtw_chip_info *chip = rtwdev->chip;
2255 unsigned long bt_relink_time;
2256 u8 i, rsp_source = 0, type;
2258 rsp_source = buf[0] & 0xf;
2259 if (rsp_source >= COEX_BTINFO_SRC_MAX)
2260 rsp_source = COEX_BTINFO_SRC_WL_FW;
2262 if (rsp_source == COEX_BTINFO_SRC_BT_IQK) {
2263 coex_stat->bt_iqk_state = buf[1];
2264 if (coex_stat->bt_iqk_state == 1)
2265 coex_stat->cnt_bt[COEX_CNT_BT_IQK]++;
2266 else if (coex_stat->bt_iqk_state == 2)
2267 coex_stat->cnt_bt[COEX_CNT_BT_IQKFAIL]++;
2272 if (rsp_source == COEX_BTINFO_SRC_BT_SCBD) {
2273 rtw_coex_monitor_bt_enable(rtwdev);
2274 if (coex_stat->bt_disabled != coex_stat->bt_disabled_pre) {
2275 coex_stat->bt_disabled_pre = coex_stat->bt_disabled;
2276 rtw_coex_run_coex(rtwdev, COEX_RSN_BTINFO);
2281 if (rsp_source == COEX_BTINFO_SRC_BT_RSP ||
2282 rsp_source == COEX_BTINFO_SRC_BT_ACT) {
2283 if (coex_stat->bt_disabled) {
2284 coex_stat->bt_disabled = false;
2285 coex_stat->bt_reenable = true;
2286 ieee80211_queue_delayed_work(rtwdev->hw,
2287 &coex->bt_reenable_work,
2292 for (i = 0; i < length; i++) {
2293 if (i < COEX_BTINFO_LENGTH_MAX)
2294 coex_stat->bt_info_c2h[rsp_source][i] = buf[i];
2299 if (rsp_source == COEX_BTINFO_SRC_WL_FW) {
2300 rtw_coex_update_bt_link_info(rtwdev);
2301 rtw_coex_run_coex(rtwdev, COEX_RSN_BTINFO);
2305 /* get the same info from bt, skip it */
2306 if (coex_stat->bt_info_c2h[rsp_source][1] == coex_stat->bt_info_lb2 &&
2307 coex_stat->bt_info_c2h[rsp_source][2] == coex_stat->bt_info_lb3 &&
2308 coex_stat->bt_info_c2h[rsp_source][3] == coex_stat->bt_info_hb0 &&
2309 coex_stat->bt_info_c2h[rsp_source][4] == coex_stat->bt_info_hb1 &&
2310 coex_stat->bt_info_c2h[rsp_source][5] == coex_stat->bt_info_hb2 &&
2311 coex_stat->bt_info_c2h[rsp_source][6] == coex_stat->bt_info_hb3)
2314 coex_stat->bt_info_lb2 = coex_stat->bt_info_c2h[rsp_source][1];
2315 coex_stat->bt_info_lb3 = coex_stat->bt_info_c2h[rsp_source][2];
2316 coex_stat->bt_info_hb0 = coex_stat->bt_info_c2h[rsp_source][3];
2317 coex_stat->bt_info_hb1 = coex_stat->bt_info_c2h[rsp_source][4];
2318 coex_stat->bt_info_hb2 = coex_stat->bt_info_c2h[rsp_source][5];
2319 coex_stat->bt_info_hb3 = coex_stat->bt_info_c2h[rsp_source][6];
2321 /* 0xff means BT is under WHCK test */
2322 coex_stat->bt_whck_test = (coex_stat->bt_info_lb2 == 0xff);
2323 coex_stat->bt_inq_page = ((coex_stat->bt_info_lb2 & BIT(2)) == BIT(2));
2324 coex_stat->bt_acl_busy = ((coex_stat->bt_info_lb2 & BIT(3)) == BIT(3));
2325 coex_stat->cnt_bt[COEX_CNT_BT_RETRY] = coex_stat->bt_info_lb3 & 0xf;
2326 if (coex_stat->cnt_bt[COEX_CNT_BT_RETRY] >= 1)
2327 coex_stat->cnt_bt[COEX_CNT_BT_POPEVENT]++;
2329 coex_stat->bt_fix_2M = ((coex_stat->bt_info_lb3 & BIT(4)) == BIT(4));
2330 coex_stat->bt_inq = ((coex_stat->bt_info_lb3 & BIT(5)) == BIT(5));
2331 if (coex_stat->bt_inq)
2332 coex_stat->cnt_bt[COEX_CNT_BT_INQ]++;
2334 coex_stat->bt_page = ((coex_stat->bt_info_lb3 & BIT(7)) == BIT(7));
2335 if (coex_stat->bt_page) {
2336 coex_stat->cnt_bt[COEX_CNT_BT_PAGE]++;
2337 if (coex_stat->wl_linkscan_proc ||
2338 coex_stat->wl_hi_pri_task1 ||
2339 coex_stat->wl_hi_pri_task2 || coex_stat->wl_gl_busy)
2340 rtw_coex_write_scbd(rtwdev, COEX_SCBD_SCAN, true);
2342 rtw_coex_write_scbd(rtwdev, COEX_SCBD_SCAN, false);
2344 rtw_coex_write_scbd(rtwdev, COEX_SCBD_SCAN, false);
2347 /* unit: % (value-100 to translate to unit: dBm in coex info) */
2348 if (chip->bt_rssi_type == COEX_BTRSSI_RATIO) {
2349 coex_stat->bt_rssi = coex_stat->bt_info_hb0 * 2 + 10;
2350 } else { /* original unit: dbm -> unit: % -> value-100 in coex info */
2351 if (coex_stat->bt_info_hb0 <= 127)
2352 coex_stat->bt_rssi = 100;
2353 else if (256 - coex_stat->bt_info_hb0 <= 100)
2354 coex_stat->bt_rssi = 100 - (256 - coex_stat->bt_info_hb0);
2356 coex_stat->bt_rssi = 0;
2359 coex_stat->bt_ble_exist = ((coex_stat->bt_info_hb1 & BIT(0)) == BIT(0));
2360 if (coex_stat->bt_info_hb1 & BIT(1))
2361 coex_stat->cnt_bt[COEX_CNT_BT_REINIT]++;
2363 if (coex_stat->bt_info_hb1 & BIT(2)) {
2364 coex_stat->cnt_bt[COEX_CNT_BT_SETUPLINK]++;
2365 coex_stat->bt_setup_link = true;
2366 if (coex_stat->bt_reenable)
2367 bt_relink_time = 6 * HZ;
2369 bt_relink_time = 2 * HZ;
2371 ieee80211_queue_delayed_work(rtwdev->hw,
2372 &coex->bt_relink_work,
2376 if (coex_stat->bt_info_hb1 & BIT(3))
2377 coex_stat->cnt_bt[COEX_CNT_BT_IGNWLANACT]++;
2379 coex_stat->bt_ble_voice = ((coex_stat->bt_info_hb1 & BIT(4)) == BIT(4));
2380 coex_stat->bt_ble_scan_en = ((coex_stat->bt_info_hb1 & BIT(5)) == BIT(5));
2381 if (coex_stat->bt_info_hb1 & BIT(6))
2382 coex_stat->cnt_bt[COEX_CNT_BT_ROLESWITCH]++;
2384 coex_stat->bt_multi_link = ((coex_stat->bt_info_hb1 & BIT(7)) == BIT(7));
2385 /* resend wifi info to bt, it is reset and lost the info */
2386 if ((coex_stat->bt_info_hb1 & BIT(1))) {
2387 if (coex_stat->wl_connected)
2388 type = COEX_MEDIA_CONNECT;
2390 type = COEX_MEDIA_DISCONNECT;
2391 rtw_coex_update_wl_ch_info(rtwdev, type);
2394 /* if ignore_wlan_act && not set_up_link */
2395 if ((coex_stat->bt_info_hb1 & BIT(3)) &&
2396 (!(coex_stat->bt_info_hb1 & BIT(2))))
2397 rtw_coex_ignore_wlan_act(rtwdev, false);
2399 coex_stat->bt_opp_exist = ((coex_stat->bt_info_hb2 & BIT(0)) == BIT(0));
2400 if (coex_stat->bt_info_hb2 & BIT(1))
2401 coex_stat->cnt_bt[COEX_CNT_BT_AFHUPDATE]++;
2403 coex_stat->bt_a2dp_active = (coex_stat->bt_info_hb2 & BIT(2)) == BIT(2);
2404 coex_stat->bt_slave = ((coex_stat->bt_info_hb2 & BIT(3)) == BIT(3));
2405 coex_stat->bt_hid_slot = (coex_stat->bt_info_hb2 & 0x30) >> 4;
2406 coex_stat->bt_hid_pair_num = (coex_stat->bt_info_hb2 & 0xc0) >> 6;
2407 if (coex_stat->bt_hid_pair_num > 0 && coex_stat->bt_hid_slot >= 2)
2408 coex_stat->bt_418_hid_exist = true;
2409 else if (coex_stat->bt_hid_pair_num == 0)
2410 coex_stat->bt_418_hid_exist = false;
2412 if ((coex_stat->bt_info_lb2 & 0x49) == 0x49)
2413 coex_stat->bt_a2dp_bitpool = (coex_stat->bt_info_hb3 & 0x7f);
2415 coex_stat->bt_a2dp_bitpool = 0;
2417 coex_stat->bt_a2dp_sink = ((coex_stat->bt_info_hb3 & BIT(7)) == BIT(7));
2419 rtw_coex_update_bt_link_info(rtwdev);
2420 rtw_coex_run_coex(rtwdev, COEX_RSN_BTINFO);
2423 void rtw_coex_wl_fwdbginfo_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length)
2425 struct rtw_coex *coex = &rtwdev->coex;
2426 struct rtw_coex_stat *coex_stat = &coex->stat;
2430 if (WARN(length < 8, "invalid wl info c2h length\n"))
2436 for (i = 1; i < 8; i++) {
2437 val = coex_stat->wl_fw_dbg_info_pre[i];
2439 coex_stat->wl_fw_dbg_info[i] = buf[i] - val;
2441 coex_stat->wl_fw_dbg_info[i] = val - buf[i];
2443 coex_stat->wl_fw_dbg_info_pre[i] = buf[i];
2446 coex_stat->cnt_wl[COEX_CNT_WL_FW_NOTIFY]++;
2447 rtw_coex_wl_ccklock_action(rtwdev);
2448 rtw_coex_wl_ccklock_detect(rtwdev);
2451 void rtw_coex_wl_status_change_notify(struct rtw_dev *rtwdev)
2453 struct rtw_coex *coex = &rtwdev->coex;
2458 rtw_coex_run_coex(rtwdev, COEX_RSN_WLSTATUS);
2461 void rtw_coex_bt_relink_work(struct work_struct *work)
2463 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
2464 coex.bt_relink_work.work);
2465 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
2467 mutex_lock(&rtwdev->mutex);
2468 coex_stat->bt_setup_link = false;
2469 rtw_coex_run_coex(rtwdev, COEX_RSN_WLSTATUS);
2470 mutex_unlock(&rtwdev->mutex);
2473 void rtw_coex_bt_reenable_work(struct work_struct *work)
2475 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
2476 coex.bt_reenable_work.work);
2477 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
2479 mutex_lock(&rtwdev->mutex);
2480 coex_stat->bt_reenable = false;
2481 mutex_unlock(&rtwdev->mutex);
2484 void rtw_coex_defreeze_work(struct work_struct *work)
2486 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
2487 coex.defreeze_work.work);
2488 struct rtw_coex *coex = &rtwdev->coex;
2489 struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat;
2491 mutex_lock(&rtwdev->mutex);
2492 coex->freeze = false;
2493 coex_stat->wl_hi_pri_task1 = false;
2494 rtw_coex_run_coex(rtwdev, COEX_RSN_WLSTATUS);
2495 mutex_unlock(&rtwdev->mutex);