2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.10"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
91 struct mwl8k_device_info {
95 struct rxd_ops *rxd_ops;
99 struct mwl8k_rx_queue {
102 /* hw receives here */
105 /* refill descs here */
112 DECLARE_PCI_UNMAP_ADDR(dma)
116 struct mwl8k_tx_queue {
117 /* hw transmits here */
120 /* sw appends here */
123 struct ieee80211_tx_queue_stats stats;
124 struct mwl8k_tx_desc *txd;
126 struct sk_buff **skb;
129 /* Pointers to the firmware data and meta information about it. */
130 struct mwl8k_firmware {
131 /* Boot helper code */
132 struct firmware *helper;
135 struct firmware *ucode;
141 struct ieee80211_hw *hw;
143 struct pci_dev *pdev;
145 struct mwl8k_device_info *device_info;
147 struct rxd_ops *rxd_ops;
149 /* firmware files and meta data */
150 struct mwl8k_firmware fw;
152 /* firmware access */
153 struct mutex fw_mutex;
154 struct task_struct *fw_mutex_owner;
156 struct completion *hostcmd_wait;
158 /* lock held over TX and TX reap */
161 /* TX quiesce completion, protected by fw_mutex and tx_lock */
162 struct completion *tx_wait;
164 struct ieee80211_vif *vif;
166 struct ieee80211_channel *current_channel;
168 /* power management status cookie from firmware */
170 dma_addr_t cookie_dma;
177 * Running count of TX packets in flight, to avoid
178 * iterating over the transmit rings each time.
182 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
183 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
186 struct ieee80211_supported_band band;
187 struct ieee80211_channel channels[14];
188 struct ieee80211_rate rates[14];
191 bool radio_short_preamble;
192 bool sniffer_enabled;
195 /* XXX need to convert this to handle multiple interfaces */
197 u8 capture_bssid[ETH_ALEN];
198 struct sk_buff *beacon_skb;
201 * This FJ worker has to be global as it is scheduled from the
202 * RX handler. At this point we don't know which interface it
203 * belongs to until the list of bssids waiting to complete join
206 struct work_struct finalize_join_worker;
208 /* Tasklet to reclaim TX descriptors and buffers after tx */
209 struct tasklet_struct tx_reclaim_task;
212 /* Per interface specific private data */
214 /* backpointer to parent config block */
215 struct mwl8k_priv *priv;
217 /* BSS config of AP or IBSS from mac80211*/
218 struct ieee80211_bss_conf bss_info;
220 /* BSSID of AP or IBSS */
222 u8 mac_addr[ETH_ALEN];
224 /* Index into station database.Returned by update_sta_db call */
227 /* Non AMPDU sequence number assigned by driver */
231 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
233 static const struct ieee80211_channel mwl8k_channels[] = {
234 { .center_freq = 2412, .hw_value = 1, },
235 { .center_freq = 2417, .hw_value = 2, },
236 { .center_freq = 2422, .hw_value = 3, },
237 { .center_freq = 2427, .hw_value = 4, },
238 { .center_freq = 2432, .hw_value = 5, },
239 { .center_freq = 2437, .hw_value = 6, },
240 { .center_freq = 2442, .hw_value = 7, },
241 { .center_freq = 2447, .hw_value = 8, },
242 { .center_freq = 2452, .hw_value = 9, },
243 { .center_freq = 2457, .hw_value = 10, },
244 { .center_freq = 2462, .hw_value = 11, },
247 static const struct ieee80211_rate mwl8k_rates[] = {
248 { .bitrate = 10, .hw_value = 2, },
249 { .bitrate = 20, .hw_value = 4, },
250 { .bitrate = 55, .hw_value = 11, },
251 { .bitrate = 110, .hw_value = 22, },
252 { .bitrate = 220, .hw_value = 44, },
253 { .bitrate = 60, .hw_value = 12, },
254 { .bitrate = 90, .hw_value = 18, },
255 { .bitrate = 120, .hw_value = 24, },
256 { .bitrate = 180, .hw_value = 36, },
257 { .bitrate = 240, .hw_value = 48, },
258 { .bitrate = 360, .hw_value = 72, },
259 { .bitrate = 480, .hw_value = 96, },
260 { .bitrate = 540, .hw_value = 108, },
261 { .bitrate = 720, .hw_value = 144, },
264 static const u8 mwl8k_rateids[12] = {
265 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108,
268 /* Set or get info from Firmware */
269 #define MWL8K_CMD_SET 0x0001
270 #define MWL8K_CMD_GET 0x0000
272 /* Firmware command codes */
273 #define MWL8K_CMD_CODE_DNLD 0x0001
274 #define MWL8K_CMD_GET_HW_SPEC 0x0003
275 #define MWL8K_CMD_SET_HW_SPEC 0x0004
276 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
277 #define MWL8K_CMD_GET_STAT 0x0014
278 #define MWL8K_CMD_RADIO_CONTROL 0x001c
279 #define MWL8K_CMD_RF_TX_POWER 0x001e
280 #define MWL8K_CMD_RF_ANTENNA 0x0020
281 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
282 #define MWL8K_CMD_SET_POST_SCAN 0x0108
283 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
284 #define MWL8K_CMD_SET_AID 0x010d
285 #define MWL8K_CMD_SET_RATE 0x0110
286 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
287 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
288 #define MWL8K_CMD_SET_SLOT 0x0114
289 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
290 #define MWL8K_CMD_SET_WMM_MODE 0x0123
291 #define MWL8K_CMD_MIMO_CONFIG 0x0125
292 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
293 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
294 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
295 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
296 #define MWL8K_CMD_UPDATE_STADB 0x1123
298 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
300 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
301 snprintf(buf, bufsize, "%s", #x);\
304 switch (cmd & ~0x8000) {
305 MWL8K_CMDNAME(CODE_DNLD);
306 MWL8K_CMDNAME(GET_HW_SPEC);
307 MWL8K_CMDNAME(SET_HW_SPEC);
308 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
309 MWL8K_CMDNAME(GET_STAT);
310 MWL8K_CMDNAME(RADIO_CONTROL);
311 MWL8K_CMDNAME(RF_TX_POWER);
312 MWL8K_CMDNAME(RF_ANTENNA);
313 MWL8K_CMDNAME(SET_PRE_SCAN);
314 MWL8K_CMDNAME(SET_POST_SCAN);
315 MWL8K_CMDNAME(SET_RF_CHANNEL);
316 MWL8K_CMDNAME(SET_AID);
317 MWL8K_CMDNAME(SET_RATE);
318 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
319 MWL8K_CMDNAME(RTS_THRESHOLD);
320 MWL8K_CMDNAME(SET_SLOT);
321 MWL8K_CMDNAME(SET_EDCA_PARAMS);
322 MWL8K_CMDNAME(SET_WMM_MODE);
323 MWL8K_CMDNAME(MIMO_CONFIG);
324 MWL8K_CMDNAME(USE_FIXED_RATE);
325 MWL8K_CMDNAME(ENABLE_SNIFFER);
326 MWL8K_CMDNAME(SET_MAC_ADDR);
327 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
328 MWL8K_CMDNAME(UPDATE_STADB);
330 snprintf(buf, bufsize, "0x%x", cmd);
337 /* Hardware and firmware reset */
338 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
340 iowrite32(MWL8K_H2A_INT_RESET,
341 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
342 iowrite32(MWL8K_H2A_INT_RESET,
343 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
347 /* Release fw image */
348 static void mwl8k_release_fw(struct firmware **fw)
352 release_firmware(*fw);
356 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
358 mwl8k_release_fw(&priv->fw.ucode);
359 mwl8k_release_fw(&priv->fw.helper);
362 /* Request fw image */
363 static int mwl8k_request_fw(struct mwl8k_priv *priv,
364 const char *fname, struct firmware **fw)
366 /* release current image */
368 mwl8k_release_fw(fw);
370 return request_firmware((const struct firmware **)fw,
371 fname, &priv->pdev->dev);
374 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
376 struct mwl8k_device_info *di = priv->device_info;
379 if (di->helper_image != NULL) {
380 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw.helper);
382 printk(KERN_ERR "%s: Error requesting helper "
383 "firmware file %s\n", pci_name(priv->pdev),
389 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw.ucode);
391 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
392 pci_name(priv->pdev), di->fw_image);
393 mwl8k_release_fw(&priv->fw.helper);
400 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
401 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
403 struct mwl8k_cmd_pkt {
409 } __attribute__((packed));
415 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
417 void __iomem *regs = priv->regs;
421 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
422 if (pci_dma_mapping_error(priv->pdev, dma_addr))
425 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
426 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
427 iowrite32(MWL8K_H2A_INT_DOORBELL,
428 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
429 iowrite32(MWL8K_H2A_INT_DUMMY,
430 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
436 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
437 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
438 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
446 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
448 return loops ? 0 : -ETIMEDOUT;
451 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
452 const u8 *data, size_t length)
454 struct mwl8k_cmd_pkt *cmd;
458 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
462 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
468 int block_size = length > 256 ? 256 : length;
470 memcpy(cmd->payload, data + done, block_size);
471 cmd->length = cpu_to_le16(block_size);
473 rc = mwl8k_send_fw_load_cmd(priv, cmd,
474 sizeof(*cmd) + block_size);
479 length -= block_size;
484 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
492 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
493 const u8 *data, size_t length)
495 unsigned char *buffer;
496 int may_continue, rc = 0;
497 u32 done, prev_block_size;
499 buffer = kmalloc(1024, GFP_KERNEL);
506 while (may_continue > 0) {
509 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
510 if (block_size & 1) {
514 done += prev_block_size;
515 length -= prev_block_size;
518 if (block_size > 1024 || block_size > length) {
528 if (block_size == 0) {
535 prev_block_size = block_size;
536 memcpy(buffer, data + done, block_size);
538 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
543 if (!rc && length != 0)
551 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
553 struct mwl8k_priv *priv = hw->priv;
554 struct firmware *fw = priv->fw.ucode;
555 struct mwl8k_device_info *di = priv->device_info;
559 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
560 struct firmware *helper = priv->fw.helper;
562 if (helper == NULL) {
563 printk(KERN_ERR "%s: helper image needed but none "
564 "given\n", pci_name(priv->pdev));
568 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
570 printk(KERN_ERR "%s: unable to load firmware "
571 "helper image\n", pci_name(priv->pdev));
576 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
578 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
582 printk(KERN_ERR "%s: unable to load firmware image\n",
583 pci_name(priv->pdev));
587 if (di->modes & BIT(NL80211_IFTYPE_AP))
588 iowrite32(MWL8K_MODE_AP, priv->regs + MWL8K_HIU_GEN_PTR);
590 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
596 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
597 if (ready_code == MWL8K_FWAP_READY) {
600 } else if (ready_code == MWL8K_FWSTA_READY) {
609 return loops ? 0 : -ETIMEDOUT;
614 * Defines shared between transmission and reception.
616 /* HT control fields for firmware */
621 } __attribute__((packed));
623 /* Firmware Station database operations */
624 #define MWL8K_STA_DB_ADD_ENTRY 0
625 #define MWL8K_STA_DB_MODIFY_ENTRY 1
626 #define MWL8K_STA_DB_DEL_ENTRY 2
627 #define MWL8K_STA_DB_FLUSH 3
629 /* Peer Entry flags - used to define the type of the peer node */
630 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
632 struct peer_capability_info {
633 /* Peer type - AP vs. STA. */
636 /* Basic 802.11 capabilities from assoc resp. */
639 /* Set if peer supports 802.11n high throughput (HT). */
642 /* Valid if HT is supported. */
644 __u8 extended_ht_caps;
645 struct ewc_ht_info ewc_info;
647 /* Legacy rate table. Intersection of our rates and peer rates. */
648 __u8 legacy_rates[12];
650 /* HT rate table. Intersection of our rates and peer rates. */
654 /* If set, interoperability mode, no proprietary extensions. */
658 __le16 amsdu_enabled;
659 } __attribute__((packed));
661 /* Inline functions to manipulate QoS field in data descriptor. */
662 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
664 u16 val_mask = 1 << 4;
666 /* End of Service Period Bit 4 */
667 return qos | val_mask;
670 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
674 u16 qos_mask = ~(val_mask << shift);
676 /* Ack Policy Bit 5-6 */
677 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
680 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
682 u16 val_mask = 1 << 7;
684 /* AMSDU present Bit 7 */
685 return qos | val_mask;
688 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
692 u16 qos_mask = ~(val_mask << shift);
694 /* Queue Length Bits 8-15 */
695 return (qos & qos_mask) | ((len & val_mask) << shift);
698 /* DMA header used by firmware and hardware. */
699 struct mwl8k_dma_data {
701 struct ieee80211_hdr wh;
703 } __attribute__((packed));
705 /* Routines to add/remove DMA header from skb. */
706 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
708 struct mwl8k_dma_data *tr;
711 tr = (struct mwl8k_dma_data *)skb->data;
712 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
714 if (hdrlen != sizeof(tr->wh)) {
715 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
716 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
717 *((__le16 *)(tr->data - 2)) = qos;
719 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
723 if (hdrlen != sizeof(*tr))
724 skb_pull(skb, sizeof(*tr) - hdrlen);
727 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
729 struct ieee80211_hdr *wh;
731 struct mwl8k_dma_data *tr;
734 * Add a firmware DMA header; the firmware requires that we
735 * present a 2-byte payload length followed by a 4-address
736 * header (without QoS field), followed (optionally) by any
737 * WEP/ExtIV header (but only filled in for CCMP).
739 wh = (struct ieee80211_hdr *)skb->data;
741 hdrlen = ieee80211_hdrlen(wh->frame_control);
742 if (hdrlen != sizeof(*tr))
743 skb_push(skb, sizeof(*tr) - hdrlen);
745 if (ieee80211_is_data_qos(wh->frame_control))
748 tr = (struct mwl8k_dma_data *)skb->data;
750 memmove(&tr->wh, wh, hdrlen);
751 if (hdrlen != sizeof(tr->wh))
752 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
755 * Firmware length is the length of the fully formed "802.11
756 * payload". That is, everything except for the 802.11 header.
757 * This includes all crypto material including the MIC.
759 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
764 * Packet reception for 88w8366.
766 struct mwl8k_rxd_8366 {
770 __le32 pkt_phys_addr;
771 __le32 next_rxd_phys_addr;
775 __le32 hw_noise_floor_info;
782 } __attribute__((packed));
784 #define MWL8K_8366_RATE_INFO_MCS_FORMAT 0x80
785 #define MWL8K_8366_RATE_INFO_40MHZ 0x40
786 #define MWL8K_8366_RATE_INFO_RATEID(x) ((x) & 0x3f)
788 #define MWL8K_8366_RX_CTRL_OWNED_BY_HOST 0x80
790 static void mwl8k_rxd_8366_init(void *_rxd, dma_addr_t next_dma_addr)
792 struct mwl8k_rxd_8366 *rxd = _rxd;
794 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
795 rxd->rx_ctrl = MWL8K_8366_RX_CTRL_OWNED_BY_HOST;
798 static void mwl8k_rxd_8366_refill(void *_rxd, dma_addr_t addr, int len)
800 struct mwl8k_rxd_8366 *rxd = _rxd;
802 rxd->pkt_len = cpu_to_le16(len);
803 rxd->pkt_phys_addr = cpu_to_le32(addr);
809 mwl8k_rxd_8366_process(void *_rxd, struct ieee80211_rx_status *status,
812 struct mwl8k_rxd_8366 *rxd = _rxd;
814 if (!(rxd->rx_ctrl & MWL8K_8366_RX_CTRL_OWNED_BY_HOST))
818 memset(status, 0, sizeof(*status));
820 status->signal = -rxd->rssi;
821 status->noise = -rxd->noise_floor;
823 if (rxd->rate & MWL8K_8366_RATE_INFO_MCS_FORMAT) {
824 status->flag |= RX_FLAG_HT;
825 if (rxd->rate & MWL8K_8366_RATE_INFO_40MHZ)
826 status->flag |= RX_FLAG_40MHZ;
827 status->rate_idx = MWL8K_8366_RATE_INFO_RATEID(rxd->rate);
831 for (i = 0; i < ARRAY_SIZE(mwl8k_rates); i++) {
832 if (mwl8k_rates[i].hw_value == rxd->rate) {
833 status->rate_idx = i;
839 status->band = IEEE80211_BAND_2GHZ;
840 status->freq = ieee80211_channel_to_frequency(rxd->channel);
842 *qos = rxd->qos_control;
844 return le16_to_cpu(rxd->pkt_len);
847 static struct rxd_ops rxd_8366_ops = {
848 .rxd_size = sizeof(struct mwl8k_rxd_8366),
849 .rxd_init = mwl8k_rxd_8366_init,
850 .rxd_refill = mwl8k_rxd_8366_refill,
851 .rxd_process = mwl8k_rxd_8366_process,
855 * Packet reception for 88w8687.
857 struct mwl8k_rxd_8687 {
861 __le32 pkt_phys_addr;
862 __le32 next_rxd_phys_addr;
872 } __attribute__((packed));
874 #define MWL8K_8687_RATE_INFO_SHORTPRE 0x8000
875 #define MWL8K_8687_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
876 #define MWL8K_8687_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
877 #define MWL8K_8687_RATE_INFO_40MHZ 0x0004
878 #define MWL8K_8687_RATE_INFO_SHORTGI 0x0002
879 #define MWL8K_8687_RATE_INFO_MCS_FORMAT 0x0001
881 #define MWL8K_8687_RX_CTRL_OWNED_BY_HOST 0x02
883 static void mwl8k_rxd_8687_init(void *_rxd, dma_addr_t next_dma_addr)
885 struct mwl8k_rxd_8687 *rxd = _rxd;
887 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
888 rxd->rx_ctrl = MWL8K_8687_RX_CTRL_OWNED_BY_HOST;
891 static void mwl8k_rxd_8687_refill(void *_rxd, dma_addr_t addr, int len)
893 struct mwl8k_rxd_8687 *rxd = _rxd;
895 rxd->pkt_len = cpu_to_le16(len);
896 rxd->pkt_phys_addr = cpu_to_le32(addr);
902 mwl8k_rxd_8687_process(void *_rxd, struct ieee80211_rx_status *status,
905 struct mwl8k_rxd_8687 *rxd = _rxd;
908 if (!(rxd->rx_ctrl & MWL8K_8687_RX_CTRL_OWNED_BY_HOST))
912 rate_info = le16_to_cpu(rxd->rate_info);
914 memset(status, 0, sizeof(*status));
916 status->signal = -rxd->rssi;
917 status->noise = -rxd->noise_level;
918 status->antenna = MWL8K_8687_RATE_INFO_ANTSELECT(rate_info);
919 status->rate_idx = MWL8K_8687_RATE_INFO_RATEID(rate_info);
921 if (rate_info & MWL8K_8687_RATE_INFO_SHORTPRE)
922 status->flag |= RX_FLAG_SHORTPRE;
923 if (rate_info & MWL8K_8687_RATE_INFO_40MHZ)
924 status->flag |= RX_FLAG_40MHZ;
925 if (rate_info & MWL8K_8687_RATE_INFO_SHORTGI)
926 status->flag |= RX_FLAG_SHORT_GI;
927 if (rate_info & MWL8K_8687_RATE_INFO_MCS_FORMAT)
928 status->flag |= RX_FLAG_HT;
930 status->band = IEEE80211_BAND_2GHZ;
931 status->freq = ieee80211_channel_to_frequency(rxd->channel);
933 *qos = rxd->qos_control;
935 return le16_to_cpu(rxd->pkt_len);
938 static struct rxd_ops rxd_8687_ops = {
939 .rxd_size = sizeof(struct mwl8k_rxd_8687),
940 .rxd_init = mwl8k_rxd_8687_init,
941 .rxd_refill = mwl8k_rxd_8687_refill,
942 .rxd_process = mwl8k_rxd_8687_process,
946 #define MWL8K_RX_DESCS 256
947 #define MWL8K_RX_MAXSZ 3800
949 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
951 struct mwl8k_priv *priv = hw->priv;
952 struct mwl8k_rx_queue *rxq = priv->rxq + index;
960 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
962 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
963 if (rxq->rxd == NULL) {
964 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
965 wiphy_name(hw->wiphy));
968 memset(rxq->rxd, 0, size);
970 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
971 if (rxq->buf == NULL) {
972 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
973 wiphy_name(hw->wiphy));
974 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
977 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
979 for (i = 0; i < MWL8K_RX_DESCS; i++) {
983 dma_addr_t next_dma_addr;
985 desc_size = priv->rxd_ops->rxd_size;
986 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
989 if (nexti == MWL8K_RX_DESCS)
991 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
993 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
999 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1001 struct mwl8k_priv *priv = hw->priv;
1002 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1006 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
1007 struct sk_buff *skb;
1012 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1016 addr = pci_map_single(priv->pdev, skb->data,
1017 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
1021 if (rxq->tail == MWL8K_RX_DESCS)
1023 rxq->buf[rx].skb = skb;
1024 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
1026 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1027 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
1035 /* Must be called only when the card's reception is completely halted */
1036 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1038 struct mwl8k_priv *priv = hw->priv;
1039 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1042 for (i = 0; i < MWL8K_RX_DESCS; i++) {
1043 if (rxq->buf[i].skb != NULL) {
1044 pci_unmap_single(priv->pdev,
1045 pci_unmap_addr(&rxq->buf[i], dma),
1046 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1047 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
1049 kfree_skb(rxq->buf[i].skb);
1050 rxq->buf[i].skb = NULL;
1057 pci_free_consistent(priv->pdev,
1058 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
1059 rxq->rxd, rxq->rxd_dma);
1065 * Scan a list of BSSIDs to process for finalize join.
1066 * Allows for extension to process multiple BSSIDs.
1069 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1071 return priv->capture_beacon &&
1072 ieee80211_is_beacon(wh->frame_control) &&
1073 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1076 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1077 struct sk_buff *skb)
1079 struct mwl8k_priv *priv = hw->priv;
1081 priv->capture_beacon = false;
1082 memset(priv->capture_bssid, 0, ETH_ALEN);
1085 * Use GFP_ATOMIC as rxq_process is called from
1086 * the primary interrupt handler, memory allocation call
1089 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1090 if (priv->beacon_skb != NULL)
1091 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1094 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1096 struct mwl8k_priv *priv = hw->priv;
1097 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1101 while (rxq->rxd_count && limit--) {
1102 struct sk_buff *skb;
1105 struct ieee80211_rx_status status;
1108 skb = rxq->buf[rxq->head].skb;
1112 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1114 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1118 rxq->buf[rxq->head].skb = NULL;
1120 pci_unmap_single(priv->pdev,
1121 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1122 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1123 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1126 if (rxq->head == MWL8K_RX_DESCS)
1131 skb_put(skb, pkt_len);
1132 mwl8k_remove_dma_header(skb, qos);
1135 * Check for a pending join operation. Save a
1136 * copy of the beacon and schedule a tasklet to
1137 * send a FINALIZE_JOIN command to the firmware.
1139 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1140 mwl8k_save_beacon(hw, skb);
1142 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1143 ieee80211_rx_irqsafe(hw, skb);
1153 * Packet transmission.
1156 /* Transmit packet ACK policy */
1157 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1158 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1160 #define MWL8K_TXD_STATUS_OK 0x00000001
1161 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1162 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1163 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1164 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1166 struct mwl8k_tx_desc {
1171 __le32 pkt_phys_addr;
1173 __u8 dest_MAC_addr[ETH_ALEN];
1174 __le32 next_txd_phys_addr;
1179 } __attribute__((packed));
1181 #define MWL8K_TX_DESCS 128
1183 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1185 struct mwl8k_priv *priv = hw->priv;
1186 struct mwl8k_tx_queue *txq = priv->txq + index;
1190 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1191 txq->stats.limit = MWL8K_TX_DESCS;
1195 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1197 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1198 if (txq->txd == NULL) {
1199 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1200 wiphy_name(hw->wiphy));
1203 memset(txq->txd, 0, size);
1205 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1206 if (txq->skb == NULL) {
1207 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1208 wiphy_name(hw->wiphy));
1209 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1212 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1214 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1215 struct mwl8k_tx_desc *tx_desc;
1218 tx_desc = txq->txd + i;
1219 nexti = (i + 1) % MWL8K_TX_DESCS;
1221 tx_desc->status = 0;
1222 tx_desc->next_txd_phys_addr =
1223 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1229 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1231 iowrite32(MWL8K_H2A_INT_PPA_READY,
1232 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1233 iowrite32(MWL8K_H2A_INT_DUMMY,
1234 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1235 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1238 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1240 struct mwl8k_priv *priv = hw->priv;
1243 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1244 struct mwl8k_tx_queue *txq = priv->txq + i;
1250 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1251 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1254 status = le32_to_cpu(tx_desc->status);
1255 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1260 if (tx_desc->pkt_len == 0)
1264 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1265 "fw_owned=%d drv_owned=%d unused=%d\n",
1266 wiphy_name(hw->wiphy), i,
1267 txq->stats.len, txq->head, txq->tail,
1268 fw_owned, drv_owned, unused);
1273 * Must be called with priv->fw_mutex held and tx queues stopped.
1275 #define MWL8K_TX_WAIT_TIMEOUT_MS 1000
1277 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1279 struct mwl8k_priv *priv = hw->priv;
1280 DECLARE_COMPLETION_ONSTACK(tx_wait);
1287 * The TX queues are stopped at this point, so this test
1288 * doesn't need to take ->tx_lock.
1290 if (!priv->pending_tx_pkts)
1296 spin_lock_bh(&priv->tx_lock);
1297 priv->tx_wait = &tx_wait;
1300 unsigned long timeout;
1302 oldcount = priv->pending_tx_pkts;
1304 spin_unlock_bh(&priv->tx_lock);
1305 timeout = wait_for_completion_timeout(&tx_wait,
1306 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1307 spin_lock_bh(&priv->tx_lock);
1310 WARN_ON(priv->pending_tx_pkts);
1312 printk(KERN_NOTICE "%s: tx rings drained\n",
1313 wiphy_name(hw->wiphy));
1318 if (priv->pending_tx_pkts < oldcount) {
1319 printk(KERN_NOTICE "%s: timeout waiting for tx "
1320 "rings to drain (%d -> %d pkts), retrying\n",
1321 wiphy_name(hw->wiphy), oldcount,
1322 priv->pending_tx_pkts);
1327 priv->tx_wait = NULL;
1329 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1330 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1331 mwl8k_dump_tx_rings(hw);
1335 spin_unlock_bh(&priv->tx_lock);
1340 #define MWL8K_TXD_SUCCESS(status) \
1341 ((status) & (MWL8K_TXD_STATUS_OK | \
1342 MWL8K_TXD_STATUS_OK_RETRY | \
1343 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1345 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1347 struct mwl8k_priv *priv = hw->priv;
1348 struct mwl8k_tx_queue *txq = priv->txq + index;
1351 while (txq->stats.len > 0) {
1353 struct mwl8k_tx_desc *tx_desc;
1356 struct sk_buff *skb;
1357 struct ieee80211_tx_info *info;
1361 tx_desc = txq->txd + tx;
1363 status = le32_to_cpu(tx_desc->status);
1365 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1369 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1372 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1373 BUG_ON(txq->stats.len == 0);
1375 priv->pending_tx_pkts--;
1377 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1378 size = le16_to_cpu(tx_desc->pkt_len);
1380 txq->skb[tx] = NULL;
1382 BUG_ON(skb == NULL);
1383 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1385 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1387 /* Mark descriptor as unused */
1388 tx_desc->pkt_phys_addr = 0;
1389 tx_desc->pkt_len = 0;
1391 info = IEEE80211_SKB_CB(skb);
1392 ieee80211_tx_info_clear_status(info);
1393 if (MWL8K_TXD_SUCCESS(status))
1394 info->flags |= IEEE80211_TX_STAT_ACK;
1396 ieee80211_tx_status_irqsafe(hw, skb);
1401 if (wake && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1402 ieee80211_wake_queue(hw, index);
1405 /* must be called only when the card's transmit is completely halted */
1406 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1408 struct mwl8k_priv *priv = hw->priv;
1409 struct mwl8k_tx_queue *txq = priv->txq + index;
1411 mwl8k_txq_reclaim(hw, index, 1);
1416 pci_free_consistent(priv->pdev,
1417 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1418 txq->txd, txq->txd_dma);
1423 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1425 struct mwl8k_priv *priv = hw->priv;
1426 struct ieee80211_tx_info *tx_info;
1427 struct mwl8k_vif *mwl8k_vif;
1428 struct ieee80211_hdr *wh;
1429 struct mwl8k_tx_queue *txq;
1430 struct mwl8k_tx_desc *tx;
1436 wh = (struct ieee80211_hdr *)skb->data;
1437 if (ieee80211_is_data_qos(wh->frame_control))
1438 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1442 mwl8k_add_dma_header(skb);
1443 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1445 tx_info = IEEE80211_SKB_CB(skb);
1446 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1448 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1449 u16 seqno = mwl8k_vif->seqno;
1451 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1452 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1453 mwl8k_vif->seqno = seqno++ % 4096;
1456 /* Setup firmware control bit fields for each frame type. */
1459 if (ieee80211_is_mgmt(wh->frame_control) ||
1460 ieee80211_is_ctl(wh->frame_control)) {
1462 qos = mwl8k_qos_setbit_eosp(qos);
1463 /* Set Queue size to unspecified */
1464 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1465 } else if (ieee80211_is_data(wh->frame_control)) {
1467 if (is_multicast_ether_addr(wh->addr1))
1468 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1470 /* Send pkt in an aggregate if AMPDU frame. */
1471 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1472 qos = mwl8k_qos_setbit_ack(qos,
1473 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1475 qos = mwl8k_qos_setbit_ack(qos,
1476 MWL8K_TXD_ACK_POLICY_NORMAL);
1478 if (qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT)
1479 qos = mwl8k_qos_setbit_amsdu(qos);
1482 dma = pci_map_single(priv->pdev, skb->data,
1483 skb->len, PCI_DMA_TODEVICE);
1485 if (pci_dma_mapping_error(priv->pdev, dma)) {
1486 printk(KERN_DEBUG "%s: failed to dma map skb, "
1487 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1489 return NETDEV_TX_OK;
1492 spin_lock_bh(&priv->tx_lock);
1494 txq = priv->txq + index;
1496 BUG_ON(txq->skb[txq->tail] != NULL);
1497 txq->skb[txq->tail] = skb;
1499 tx = txq->txd + txq->tail;
1500 tx->data_rate = txdatarate;
1501 tx->tx_priority = index;
1502 tx->qos_control = cpu_to_le16(qos);
1503 tx->pkt_phys_addr = cpu_to_le32(dma);
1504 tx->pkt_len = cpu_to_le16(skb->len);
1506 tx->peer_id = mwl8k_vif->peer_id;
1508 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1512 priv->pending_tx_pkts++;
1515 if (txq->tail == MWL8K_TX_DESCS)
1518 if (txq->head == txq->tail)
1519 ieee80211_stop_queue(hw, index);
1521 mwl8k_tx_start(priv);
1523 spin_unlock_bh(&priv->tx_lock);
1525 return NETDEV_TX_OK;
1532 * We have the following requirements for issuing firmware commands:
1533 * - Some commands require that the packet transmit path is idle when
1534 * the command is issued. (For simplicity, we'll just quiesce the
1535 * transmit path for every command.)
1536 * - There are certain sequences of commands that need to be issued to
1537 * the hardware sequentially, with no other intervening commands.
1539 * This leads to an implementation of a "firmware lock" as a mutex that
1540 * can be taken recursively, and which is taken by both the low-level
1541 * command submission function (mwl8k_post_cmd) as well as any users of
1542 * that function that require issuing of an atomic sequence of commands,
1543 * and quiesces the transmit path whenever it's taken.
1545 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1547 struct mwl8k_priv *priv = hw->priv;
1549 if (priv->fw_mutex_owner != current) {
1552 mutex_lock(&priv->fw_mutex);
1553 ieee80211_stop_queues(hw);
1555 rc = mwl8k_tx_wait_empty(hw);
1557 ieee80211_wake_queues(hw);
1558 mutex_unlock(&priv->fw_mutex);
1563 priv->fw_mutex_owner = current;
1566 priv->fw_mutex_depth++;
1571 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1573 struct mwl8k_priv *priv = hw->priv;
1575 if (!--priv->fw_mutex_depth) {
1576 ieee80211_wake_queues(hw);
1577 priv->fw_mutex_owner = NULL;
1578 mutex_unlock(&priv->fw_mutex);
1584 * Command processing.
1587 /* Timeout firmware commands after 10s */
1588 #define MWL8K_CMD_TIMEOUT_MS 10000
1590 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1592 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1593 struct mwl8k_priv *priv = hw->priv;
1594 void __iomem *regs = priv->regs;
1595 dma_addr_t dma_addr;
1596 unsigned int dma_size;
1598 unsigned long timeout = 0;
1601 cmd->result = 0xffff;
1602 dma_size = le16_to_cpu(cmd->length);
1603 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1604 PCI_DMA_BIDIRECTIONAL);
1605 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1608 rc = mwl8k_fw_lock(hw);
1610 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1611 PCI_DMA_BIDIRECTIONAL);
1615 priv->hostcmd_wait = &cmd_wait;
1616 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1617 iowrite32(MWL8K_H2A_INT_DOORBELL,
1618 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1619 iowrite32(MWL8K_H2A_INT_DUMMY,
1620 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1622 timeout = wait_for_completion_timeout(&cmd_wait,
1623 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1625 priv->hostcmd_wait = NULL;
1627 mwl8k_fw_unlock(hw);
1629 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1630 PCI_DMA_BIDIRECTIONAL);
1633 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1634 wiphy_name(hw->wiphy),
1635 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1636 MWL8K_CMD_TIMEOUT_MS);
1641 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1643 rc = cmd->result ? -EINVAL : 0;
1645 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1646 wiphy_name(hw->wiphy),
1647 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1648 le16_to_cpu(cmd->result));
1650 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1651 wiphy_name(hw->wiphy),
1652 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1660 * CMD_GET_HW_SPEC (STA version).
1662 struct mwl8k_cmd_get_hw_spec_sta {
1663 struct mwl8k_cmd_pkt header;
1665 __u8 host_interface;
1667 __u8 perm_addr[ETH_ALEN];
1672 __u8 mcs_bitmap[16];
1673 __le32 rx_queue_ptr;
1674 __le32 num_tx_queues;
1675 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1677 __le32 num_tx_desc_per_queue;
1679 } __attribute__((packed));
1681 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1683 struct mwl8k_priv *priv = hw->priv;
1684 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1688 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1692 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1693 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1695 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1696 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1697 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1698 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1699 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1700 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1701 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1702 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1704 rc = mwl8k_post_cmd(hw, &cmd->header);
1707 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1708 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1709 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1710 priv->hw_rev = cmd->hw_rev;
1718 * CMD_GET_HW_SPEC (AP version).
1720 struct mwl8k_cmd_get_hw_spec_ap {
1721 struct mwl8k_cmd_pkt header;
1723 __u8 host_interface;
1726 __u8 perm_addr[ETH_ALEN];
1737 } __attribute__((packed));
1739 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1741 struct mwl8k_priv *priv = hw->priv;
1742 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1745 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1749 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1750 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1752 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1753 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1755 rc = mwl8k_post_cmd(hw, &cmd->header);
1760 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1761 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1762 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1763 priv->hw_rev = cmd->hw_rev;
1765 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1766 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1768 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1769 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1771 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1772 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1774 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1775 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1777 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1778 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1780 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1781 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1791 struct mwl8k_cmd_set_hw_spec {
1792 struct mwl8k_cmd_pkt header;
1794 __u8 host_interface;
1796 __u8 perm_addr[ETH_ALEN];
1801 __le32 rx_queue_ptr;
1802 __le32 num_tx_queues;
1803 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1805 __le32 num_tx_desc_per_queue;
1807 } __attribute__((packed));
1809 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1811 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1813 struct mwl8k_priv *priv = hw->priv;
1814 struct mwl8k_cmd_set_hw_spec *cmd;
1818 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1822 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1823 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1825 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1826 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1827 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1828 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1829 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1830 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT);
1831 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1832 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1834 rc = mwl8k_post_cmd(hw, &cmd->header);
1841 * CMD_MAC_MULTICAST_ADR.
1843 struct mwl8k_cmd_mac_multicast_adr {
1844 struct mwl8k_cmd_pkt header;
1847 __u8 addr[0][ETH_ALEN];
1850 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1851 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1852 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1853 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1855 static struct mwl8k_cmd_pkt *
1856 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1857 int mc_count, struct dev_addr_list *mclist)
1859 struct mwl8k_priv *priv = hw->priv;
1860 struct mwl8k_cmd_mac_multicast_adr *cmd;
1863 if (allmulti || mc_count > priv->num_mcaddrs) {
1868 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1870 cmd = kzalloc(size, GFP_ATOMIC);
1874 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1875 cmd->header.length = cpu_to_le16(size);
1876 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1877 MWL8K_ENABLE_RX_BROADCAST);
1880 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1881 } else if (mc_count) {
1884 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1885 cmd->numaddr = cpu_to_le16(mc_count);
1886 for (i = 0; i < mc_count && mclist; i++) {
1887 if (mclist->da_addrlen != ETH_ALEN) {
1891 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1892 mclist = mclist->next;
1896 return &cmd->header;
1900 * CMD_802_11_GET_STAT.
1902 struct mwl8k_cmd_802_11_get_stat {
1903 struct mwl8k_cmd_pkt header;
1905 } __attribute__((packed));
1907 #define MWL8K_STAT_ACK_FAILURE 9
1908 #define MWL8K_STAT_RTS_FAILURE 12
1909 #define MWL8K_STAT_FCS_ERROR 24
1910 #define MWL8K_STAT_RTS_SUCCESS 11
1912 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1913 struct ieee80211_low_level_stats *stats)
1915 struct mwl8k_cmd_802_11_get_stat *cmd;
1918 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1922 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1923 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1925 rc = mwl8k_post_cmd(hw, &cmd->header);
1927 stats->dot11ACKFailureCount =
1928 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1929 stats->dot11RTSFailureCount =
1930 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1931 stats->dot11FCSErrorCount =
1932 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1933 stats->dot11RTSSuccessCount =
1934 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1942 * CMD_802_11_RADIO_CONTROL.
1944 struct mwl8k_cmd_802_11_radio_control {
1945 struct mwl8k_cmd_pkt header;
1949 } __attribute__((packed));
1952 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1954 struct mwl8k_priv *priv = hw->priv;
1955 struct mwl8k_cmd_802_11_radio_control *cmd;
1958 if (enable == priv->radio_on && !force)
1961 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1965 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1966 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1967 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1968 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1969 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1971 rc = mwl8k_post_cmd(hw, &cmd->header);
1975 priv->radio_on = enable;
1980 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw)
1982 return mwl8k_cmd_802_11_radio_control(hw, 0, 0);
1985 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw)
1987 return mwl8k_cmd_802_11_radio_control(hw, 1, 0);
1991 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1993 struct mwl8k_priv *priv;
1995 if (hw == NULL || hw->priv == NULL)
1999 priv->radio_short_preamble = short_preamble;
2001 return mwl8k_cmd_802_11_radio_control(hw, 1, 1);
2005 * CMD_802_11_RF_TX_POWER.
2007 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
2009 struct mwl8k_cmd_802_11_rf_tx_power {
2010 struct mwl8k_cmd_pkt header;
2012 __le16 support_level;
2013 __le16 current_level;
2015 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2016 } __attribute__((packed));
2018 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2020 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
2023 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2027 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2028 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2029 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2030 cmd->support_level = cpu_to_le16(dBm);
2032 rc = mwl8k_post_cmd(hw, &cmd->header);
2041 struct mwl8k_cmd_rf_antenna {
2042 struct mwl8k_cmd_pkt header;
2045 } __attribute__((packed));
2047 #define MWL8K_RF_ANTENNA_RX 1
2048 #define MWL8K_RF_ANTENNA_TX 2
2051 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2053 struct mwl8k_cmd_rf_antenna *cmd;
2056 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2060 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2061 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2062 cmd->antenna = cpu_to_le16(antenna);
2063 cmd->mode = cpu_to_le16(mask);
2065 rc = mwl8k_post_cmd(hw, &cmd->header);
2074 struct mwl8k_cmd_set_pre_scan {
2075 struct mwl8k_cmd_pkt header;
2076 } __attribute__((packed));
2078 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2080 struct mwl8k_cmd_set_pre_scan *cmd;
2083 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2087 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2088 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2090 rc = mwl8k_post_cmd(hw, &cmd->header);
2097 * CMD_SET_POST_SCAN.
2099 struct mwl8k_cmd_set_post_scan {
2100 struct mwl8k_cmd_pkt header;
2102 __u8 bssid[ETH_ALEN];
2103 } __attribute__((packed));
2106 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
2108 struct mwl8k_cmd_set_post_scan *cmd;
2111 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2115 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2116 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2118 memcpy(cmd->bssid, mac, ETH_ALEN);
2120 rc = mwl8k_post_cmd(hw, &cmd->header);
2127 * CMD_SET_RF_CHANNEL.
2129 struct mwl8k_cmd_set_rf_channel {
2130 struct mwl8k_cmd_pkt header;
2132 __u8 current_channel;
2133 __le32 channel_flags;
2134 } __attribute__((packed));
2136 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2137 struct ieee80211_channel *channel)
2139 struct mwl8k_cmd_set_rf_channel *cmd;
2142 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2146 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2147 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2148 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2149 cmd->current_channel = channel->hw_value;
2150 if (channel->band == IEEE80211_BAND_2GHZ)
2151 cmd->channel_flags = cpu_to_le32(0x00000081);
2153 cmd->channel_flags = cpu_to_le32(0x00000000);
2155 rc = mwl8k_post_cmd(hw, &cmd->header);
2164 struct mwl8k_cmd_set_slot {
2165 struct mwl8k_cmd_pkt header;
2168 } __attribute__((packed));
2170 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2172 struct mwl8k_cmd_set_slot *cmd;
2175 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2179 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2180 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2181 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2182 cmd->short_slot = short_slot_time;
2184 rc = mwl8k_post_cmd(hw, &cmd->header);
2193 struct mwl8k_cmd_mimo_config {
2194 struct mwl8k_cmd_pkt header;
2196 __u8 rx_antenna_map;
2197 __u8 tx_antenna_map;
2198 } __attribute__((packed));
2200 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2202 struct mwl8k_cmd_mimo_config *cmd;
2205 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2209 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2210 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2211 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2212 cmd->rx_antenna_map = rx;
2213 cmd->tx_antenna_map = tx;
2215 rc = mwl8k_post_cmd(hw, &cmd->header);
2222 * CMD_ENABLE_SNIFFER.
2224 struct mwl8k_cmd_enable_sniffer {
2225 struct mwl8k_cmd_pkt header;
2227 } __attribute__((packed));
2229 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2231 struct mwl8k_cmd_enable_sniffer *cmd;
2234 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2238 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2239 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2240 cmd->action = cpu_to_le32(!!enable);
2242 rc = mwl8k_post_cmd(hw, &cmd->header);
2251 struct mwl8k_cmd_set_mac_addr {
2252 struct mwl8k_cmd_pkt header;
2256 __u8 mac_addr[ETH_ALEN];
2258 __u8 mac_addr[ETH_ALEN];
2260 } __attribute__((packed));
2262 static int mwl8k_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
2264 struct mwl8k_priv *priv = hw->priv;
2265 struct mwl8k_cmd_set_mac_addr *cmd;
2268 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2272 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2273 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2275 cmd->mbss.mac_type = 0;
2276 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2278 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2281 rc = mwl8k_post_cmd(hw, &cmd->header);
2289 * CMD_SET_RATEADAPT_MODE.
2291 struct mwl8k_cmd_set_rate_adapt_mode {
2292 struct mwl8k_cmd_pkt header;
2295 } __attribute__((packed));
2297 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
2299 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2302 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2306 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2307 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2308 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2309 cmd->mode = cpu_to_le16(mode);
2311 rc = mwl8k_post_cmd(hw, &cmd->header);
2320 struct mwl8k_cmd_set_wmm {
2321 struct mwl8k_cmd_pkt header;
2323 } __attribute__((packed));
2325 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
2327 struct mwl8k_priv *priv = hw->priv;
2328 struct mwl8k_cmd_set_wmm *cmd;
2331 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2335 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2336 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2337 cmd->action = cpu_to_le16(!!enable);
2339 rc = mwl8k_post_cmd(hw, &cmd->header);
2343 priv->wmm_enabled = enable;
2349 * CMD_SET_RTS_THRESHOLD.
2351 struct mwl8k_cmd_rts_threshold {
2352 struct mwl8k_cmd_pkt header;
2355 } __attribute__((packed));
2357 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
2358 u16 action, u16 threshold)
2360 struct mwl8k_cmd_rts_threshold *cmd;
2363 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2367 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2368 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2369 cmd->action = cpu_to_le16(action);
2370 cmd->threshold = cpu_to_le16(threshold);
2372 rc = mwl8k_post_cmd(hw, &cmd->header);
2379 * CMD_SET_EDCA_PARAMS.
2381 struct mwl8k_cmd_set_edca_params {
2382 struct mwl8k_cmd_pkt header;
2384 /* See MWL8K_SET_EDCA_XXX below */
2387 /* TX opportunity in units of 32 us */
2392 /* Log exponent of max contention period: 0...15 */
2395 /* Log exponent of min contention period: 0...15 */
2398 /* Adaptive interframe spacing in units of 32us */
2401 /* TX queue to configure */
2405 /* Log exponent of max contention period: 0...15 */
2408 /* Log exponent of min contention period: 0...15 */
2411 /* Adaptive interframe spacing in units of 32us */
2414 /* TX queue to configure */
2418 } __attribute__((packed));
2420 #define MWL8K_SET_EDCA_CW 0x01
2421 #define MWL8K_SET_EDCA_TXOP 0x02
2422 #define MWL8K_SET_EDCA_AIFS 0x04
2424 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2425 MWL8K_SET_EDCA_TXOP | \
2426 MWL8K_SET_EDCA_AIFS)
2429 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2430 __u16 cw_min, __u16 cw_max,
2431 __u8 aifs, __u16 txop)
2433 struct mwl8k_priv *priv = hw->priv;
2434 struct mwl8k_cmd_set_edca_params *cmd;
2437 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2442 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2445 qnum ^= !(qnum >> 1);
2447 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2448 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2449 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2450 cmd->txop = cpu_to_le16(txop);
2452 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2453 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2454 cmd->ap.aifs = aifs;
2457 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2458 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2459 cmd->sta.aifs = aifs;
2460 cmd->sta.txq = qnum;
2463 rc = mwl8k_post_cmd(hw, &cmd->header);
2470 * CMD_FINALIZE_JOIN.
2472 #define MWL8K_FJ_BEACON_MAXLEN 128
2474 struct mwl8k_cmd_finalize_join {
2475 struct mwl8k_cmd_pkt header;
2476 __le32 sleep_interval; /* Number of beacon periods to sleep */
2477 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2478 } __attribute__((packed));
2480 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2481 int framelen, int dtim)
2483 struct mwl8k_cmd_finalize_join *cmd;
2484 struct ieee80211_mgmt *payload = frame;
2488 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2492 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2493 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2494 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2496 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2497 if (payload_len < 0)
2499 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2500 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2502 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2504 rc = mwl8k_post_cmd(hw, &cmd->header);
2513 struct mwl8k_cmd_update_sta_db {
2514 struct mwl8k_cmd_pkt header;
2516 /* See STADB_ACTION_TYPE */
2519 /* Peer MAC address */
2520 __u8 peer_addr[ETH_ALEN];
2524 /* Peer info - valid during add/update. */
2525 struct peer_capability_info peer_info;
2526 } __attribute__((packed));
2528 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2529 struct ieee80211_vif *vif, __u32 action)
2531 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2532 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2533 struct mwl8k_cmd_update_sta_db *cmd;
2534 struct peer_capability_info *peer_info;
2537 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2541 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2542 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2544 cmd->action = cpu_to_le32(action);
2545 peer_info = &cmd->peer_info;
2546 memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2549 case MWL8K_STA_DB_ADD_ENTRY:
2550 case MWL8K_STA_DB_MODIFY_ENTRY:
2551 /* Build peer_info block */
2552 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2553 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2554 memcpy(peer_info->legacy_rates, mwl8k_rateids,
2555 sizeof(mwl8k_rateids));
2556 peer_info->interop = 1;
2557 peer_info->amsdu_enabled = 0;
2559 rc = mwl8k_post_cmd(hw, &cmd->header);
2561 mv_vif->peer_id = peer_info->station_id;
2565 case MWL8K_STA_DB_DEL_ENTRY:
2566 case MWL8K_STA_DB_FLUSH:
2568 rc = mwl8k_post_cmd(hw, &cmd->header);
2570 mv_vif->peer_id = 0;
2581 #define MWL8K_FRAME_PROT_DISABLED 0x00
2582 #define MWL8K_FRAME_PROT_11G 0x07
2583 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2584 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2586 struct mwl8k_cmd_update_set_aid {
2587 struct mwl8k_cmd_pkt header;
2590 /* AP's MAC address (BSSID) */
2591 __u8 bssid[ETH_ALEN];
2592 __le16 protection_mode;
2593 __u8 supp_rates[14];
2594 } __attribute__((packed));
2596 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2597 struct ieee80211_vif *vif)
2599 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2600 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2601 struct mwl8k_cmd_update_set_aid *cmd;
2605 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2609 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2610 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2611 cmd->aid = cpu_to_le16(info->aid);
2613 memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
2615 if (info->use_cts_prot) {
2616 prot_mode = MWL8K_FRAME_PROT_11G;
2618 switch (info->ht_operation_mode &
2619 IEEE80211_HT_OP_MODE_PROTECTION) {
2620 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2621 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2623 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2624 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2627 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2631 cmd->protection_mode = cpu_to_le16(prot_mode);
2633 memcpy(cmd->supp_rates, mwl8k_rateids, sizeof(mwl8k_rateids));
2635 rc = mwl8k_post_cmd(hw, &cmd->header);
2644 struct mwl8k_cmd_update_rateset {
2645 struct mwl8k_cmd_pkt header;
2646 __u8 legacy_rates[14];
2648 /* Bitmap for supported MCS codes. */
2651 } __attribute__((packed));
2653 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2654 struct ieee80211_vif *vif)
2656 struct mwl8k_cmd_update_rateset *cmd;
2659 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2663 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2664 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2665 memcpy(cmd->legacy_rates, mwl8k_rateids, sizeof(mwl8k_rateids));
2667 rc = mwl8k_post_cmd(hw, &cmd->header);
2674 * CMD_USE_FIXED_RATE.
2676 #define MWL8K_RATE_TABLE_SIZE 8
2677 #define MWL8K_UCAST_RATE 0
2678 #define MWL8K_USE_AUTO_RATE 0x0002
2680 struct mwl8k_rate_entry {
2681 /* Set to 1 if HT rate, 0 if legacy. */
2684 /* Set to 1 to use retry_count field. */
2685 __le32 enable_retry;
2687 /* Specified legacy rate or MCS. */
2690 /* Number of allowed retries. */
2692 } __attribute__((packed));
2694 struct mwl8k_rate_table {
2695 /* 1 to allow specified rate and below */
2696 __le32 allow_rate_drop;
2698 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2699 } __attribute__((packed));
2701 struct mwl8k_cmd_use_fixed_rate {
2702 struct mwl8k_cmd_pkt header;
2704 struct mwl8k_rate_table rate_table;
2706 /* Unicast, Broadcast or Multicast */
2710 } __attribute__((packed));
2712 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2713 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2715 struct mwl8k_cmd_use_fixed_rate *cmd;
2719 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2723 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2724 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2726 cmd->action = cpu_to_le32(action);
2727 cmd->rate_type = cpu_to_le32(rate_type);
2729 if (rate_table != NULL) {
2731 * Copy over each field manually so that endian
2732 * conversion can be done.
2734 cmd->rate_table.allow_rate_drop =
2735 cpu_to_le32(rate_table->allow_rate_drop);
2736 cmd->rate_table.num_rates =
2737 cpu_to_le32(rate_table->num_rates);
2739 for (count = 0; count < rate_table->num_rates; count++) {
2740 struct mwl8k_rate_entry *dst =
2741 &cmd->rate_table.rate_entry[count];
2742 struct mwl8k_rate_entry *src =
2743 &rate_table->rate_entry[count];
2745 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2746 dst->enable_retry = cpu_to_le32(src->enable_retry);
2747 dst->rate = cpu_to_le32(src->rate);
2748 dst->retry_count = cpu_to_le32(src->retry_count);
2752 rc = mwl8k_post_cmd(hw, &cmd->header);
2760 * Interrupt handling.
2762 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2764 struct ieee80211_hw *hw = dev_id;
2765 struct mwl8k_priv *priv = hw->priv;
2768 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2769 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2774 if (status & MWL8K_A2H_INT_TX_DONE)
2775 tasklet_schedule(&priv->tx_reclaim_task);
2777 if (status & MWL8K_A2H_INT_RX_READY) {
2778 while (rxq_process(hw, 0, 1))
2779 rxq_refill(hw, 0, 1);
2782 if (status & MWL8K_A2H_INT_OPC_DONE) {
2783 if (priv->hostcmd_wait != NULL)
2784 complete(priv->hostcmd_wait);
2787 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2788 if (!mutex_is_locked(&priv->fw_mutex) &&
2789 priv->radio_on && priv->pending_tx_pkts)
2790 mwl8k_tx_start(priv);
2798 * Core driver operations.
2800 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2802 struct mwl8k_priv *priv = hw->priv;
2803 int index = skb_get_queue_mapping(skb);
2806 if (priv->current_channel == NULL) {
2807 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2808 "disabled\n", wiphy_name(hw->wiphy));
2810 return NETDEV_TX_OK;
2813 rc = mwl8k_txq_xmit(hw, index, skb);
2818 static int mwl8k_start(struct ieee80211_hw *hw)
2820 struct mwl8k_priv *priv = hw->priv;
2823 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
2824 IRQF_SHARED, MWL8K_NAME, hw);
2826 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2827 wiphy_name(hw->wiphy));
2831 /* Enable tx reclaim tasklet */
2832 tasklet_enable(&priv->tx_reclaim_task);
2834 /* Enable interrupts */
2835 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2837 rc = mwl8k_fw_lock(hw);
2839 rc = mwl8k_cmd_802_11_radio_enable(hw);
2843 rc = mwl8k_enable_sniffer(hw, 0);
2846 rc = mwl8k_cmd_set_pre_scan(hw);
2849 rc = mwl8k_cmd_set_post_scan(hw,
2850 "\x00\x00\x00\x00\x00\x00");
2854 rc = mwl8k_cmd_setrateadaptmode(hw, 0);
2857 rc = mwl8k_set_wmm(hw, 0);
2859 mwl8k_fw_unlock(hw);
2863 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2864 free_irq(priv->pdev->irq, hw);
2865 tasklet_disable(&priv->tx_reclaim_task);
2871 static void mwl8k_stop(struct ieee80211_hw *hw)
2873 struct mwl8k_priv *priv = hw->priv;
2876 mwl8k_cmd_802_11_radio_disable(hw);
2878 ieee80211_stop_queues(hw);
2880 /* Disable interrupts */
2881 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2882 free_irq(priv->pdev->irq, hw);
2884 /* Stop finalize join worker */
2885 cancel_work_sync(&priv->finalize_join_worker);
2886 if (priv->beacon_skb != NULL)
2887 dev_kfree_skb(priv->beacon_skb);
2889 /* Stop tx reclaim tasklet */
2890 tasklet_disable(&priv->tx_reclaim_task);
2892 /* Return all skbs to mac80211 */
2893 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2894 mwl8k_txq_reclaim(hw, i, 1);
2897 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2898 struct ieee80211_if_init_conf *conf)
2900 struct mwl8k_priv *priv = hw->priv;
2901 struct mwl8k_vif *mwl8k_vif;
2904 * We only support one active interface at a time.
2906 if (priv->vif != NULL)
2910 * We only support managed interfaces for now.
2912 if (conf->type != NL80211_IFTYPE_STATION)
2916 * Reject interface creation if sniffer mode is active, as
2917 * STA operation is mutually exclusive with hardware sniffer
2920 if (priv->sniffer_enabled) {
2921 printk(KERN_INFO "%s: unable to create STA "
2922 "interface due to sniffer mode being enabled\n",
2923 wiphy_name(hw->wiphy));
2927 /* Clean out driver private area */
2928 mwl8k_vif = MWL8K_VIF(conf->vif);
2929 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2931 /* Set and save the mac address */
2932 mwl8k_set_mac_addr(hw, conf->mac_addr);
2933 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2935 /* Back pointer to parent config block */
2936 mwl8k_vif->priv = priv;
2938 /* Set Initial sequence number to zero */
2939 mwl8k_vif->seqno = 0;
2941 priv->vif = conf->vif;
2942 priv->current_channel = NULL;
2947 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2948 struct ieee80211_if_init_conf *conf)
2950 struct mwl8k_priv *priv = hw->priv;
2952 if (priv->vif == NULL)
2955 mwl8k_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
2960 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2962 struct ieee80211_conf *conf = &hw->conf;
2963 struct mwl8k_priv *priv = hw->priv;
2966 if (conf->flags & IEEE80211_CONF_IDLE) {
2967 mwl8k_cmd_802_11_radio_disable(hw);
2968 priv->current_channel = NULL;
2972 rc = mwl8k_fw_lock(hw);
2976 rc = mwl8k_cmd_802_11_radio_enable(hw);
2980 rc = mwl8k_cmd_set_rf_channel(hw, conf->channel);
2984 priv->current_channel = conf->channel;
2986 if (conf->power_level > 18)
2987 conf->power_level = 18;
2988 rc = mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level);
2993 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
2995 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
2997 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3001 mwl8k_fw_unlock(hw);
3006 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
3007 struct ieee80211_vif *vif,
3008 struct ieee80211_bss_conf *info,
3011 struct mwl8k_priv *priv = hw->priv;
3012 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3015 if ((changed & BSS_CHANGED_ASSOC) == 0)
3018 priv->capture_beacon = false;
3020 rc = mwl8k_fw_lock(hw);
3025 memcpy(&mwl8k_vif->bss_info, info,
3026 sizeof(struct ieee80211_bss_conf));
3028 memcpy(mwl8k_vif->bssid, info->bssid, ETH_ALEN);
3031 rc = mwl8k_update_rateset(hw, vif);
3035 /* Turn on rate adaptation */
3036 rc = mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
3037 MWL8K_UCAST_RATE, NULL);
3041 /* Set radio preamble */
3042 rc = mwl8k_set_radio_preamble(hw, info->use_short_preamble);
3047 rc = mwl8k_cmd_set_slot(hw, info->use_short_slot);
3051 /* Update peer rate info */
3052 rc = mwl8k_cmd_update_sta_db(hw, vif,
3053 MWL8K_STA_DB_MODIFY_ENTRY);
3058 rc = mwl8k_cmd_set_aid(hw, vif);
3063 * Finalize the join. Tell rx handler to process
3064 * next beacon from our BSSID.
3066 memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
3067 priv->capture_beacon = true;
3069 rc = mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
3070 memset(&mwl8k_vif->bss_info, 0,
3071 sizeof(struct ieee80211_bss_conf));
3072 memset(mwl8k_vif->bssid, 0, ETH_ALEN);
3076 mwl8k_fw_unlock(hw);
3079 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3080 int mc_count, struct dev_addr_list *mclist)
3082 struct mwl8k_cmd_pkt *cmd;
3085 * Synthesize and return a command packet that programs the
3086 * hardware multicast address filter. At this point we don't
3087 * know whether FIF_ALLMULTI is being requested, but if it is,
3088 * we'll end up throwing this packet away and creating a new
3089 * one in mwl8k_configure_filter().
3091 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3093 return (unsigned long)cmd;
3097 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3098 unsigned int changed_flags,
3099 unsigned int *total_flags)
3101 struct mwl8k_priv *priv = hw->priv;
3104 * Hardware sniffer mode is mutually exclusive with STA
3105 * operation, so refuse to enable sniffer mode if a STA
3106 * interface is active.
3108 if (priv->vif != NULL) {
3109 if (net_ratelimit())
3110 printk(KERN_INFO "%s: not enabling sniffer "
3111 "mode because STA interface is active\n",
3112 wiphy_name(hw->wiphy));
3116 if (!priv->sniffer_enabled) {
3117 if (mwl8k_enable_sniffer(hw, 1))
3119 priv->sniffer_enabled = true;
3122 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3123 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3129 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3130 unsigned int changed_flags,
3131 unsigned int *total_flags,
3134 struct mwl8k_priv *priv = hw->priv;
3135 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3138 * AP firmware doesn't allow fine-grained control over
3139 * the receive filter.
3142 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3148 * Enable hardware sniffer mode if FIF_CONTROL or
3149 * FIF_OTHER_BSS is requested.
3151 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3152 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3157 /* Clear unsupported feature flags */
3158 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3160 if (mwl8k_fw_lock(hw)) {
3165 if (priv->sniffer_enabled) {
3166 mwl8k_enable_sniffer(hw, 0);
3167 priv->sniffer_enabled = false;
3170 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3171 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3173 * Disable the BSS filter.
3175 mwl8k_cmd_set_pre_scan(hw);
3180 * Enable the BSS filter.
3182 * If there is an active STA interface, use that
3183 * interface's BSSID, otherwise use a dummy one
3184 * (where the OUI part needs to be nonzero for
3185 * the BSSID to be accepted by POST_SCAN).
3187 bssid = "\x01\x00\x00\x00\x00\x00";
3188 if (priv->vif != NULL)
3189 bssid = MWL8K_VIF(priv->vif)->bssid;
3191 mwl8k_cmd_set_post_scan(hw, bssid);
3196 * If FIF_ALLMULTI is being requested, throw away the command
3197 * packet that ->prepare_multicast() built and replace it with
3198 * a command packet that enables reception of all multicast
3201 if (*total_flags & FIF_ALLMULTI) {
3203 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3207 mwl8k_post_cmd(hw, cmd);
3211 mwl8k_fw_unlock(hw);
3214 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3216 return mwl8k_rts_threshold(hw, MWL8K_CMD_SET, value);
3219 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3220 const struct ieee80211_tx_queue_params *params)
3222 struct mwl8k_priv *priv = hw->priv;
3225 rc = mwl8k_fw_lock(hw);
3227 if (!priv->wmm_enabled)
3228 rc = mwl8k_set_wmm(hw, 1);
3231 rc = mwl8k_set_edca_params(hw, queue,
3237 mwl8k_fw_unlock(hw);
3243 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3244 struct ieee80211_tx_queue_stats *stats)
3246 struct mwl8k_priv *priv = hw->priv;
3247 struct mwl8k_tx_queue *txq;
3250 spin_lock_bh(&priv->tx_lock);
3251 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3252 txq = priv->txq + index;
3253 memcpy(&stats[index], &txq->stats,
3254 sizeof(struct ieee80211_tx_queue_stats));
3256 spin_unlock_bh(&priv->tx_lock);
3261 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3262 struct ieee80211_low_level_stats *stats)
3264 return mwl8k_cmd_802_11_get_stat(hw, stats);
3267 static const struct ieee80211_ops mwl8k_ops = {
3269 .start = mwl8k_start,
3271 .add_interface = mwl8k_add_interface,
3272 .remove_interface = mwl8k_remove_interface,
3273 .config = mwl8k_config,
3274 .bss_info_changed = mwl8k_bss_info_changed,
3275 .prepare_multicast = mwl8k_prepare_multicast,
3276 .configure_filter = mwl8k_configure_filter,
3277 .set_rts_threshold = mwl8k_set_rts_threshold,
3278 .conf_tx = mwl8k_conf_tx,
3279 .get_tx_stats = mwl8k_get_tx_stats,
3280 .get_stats = mwl8k_get_stats,
3283 static void mwl8k_tx_reclaim_handler(unsigned long data)
3286 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3287 struct mwl8k_priv *priv = hw->priv;
3289 spin_lock_bh(&priv->tx_lock);
3290 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3291 mwl8k_txq_reclaim(hw, i, 0);
3293 if (priv->tx_wait != NULL && !priv->pending_tx_pkts) {
3294 complete(priv->tx_wait);
3295 priv->tx_wait = NULL;
3297 spin_unlock_bh(&priv->tx_lock);
3300 static void mwl8k_finalize_join_worker(struct work_struct *work)
3302 struct mwl8k_priv *priv =
3303 container_of(work, struct mwl8k_priv, finalize_join_worker);
3304 struct sk_buff *skb = priv->beacon_skb;
3305 u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
3307 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3310 priv->beacon_skb = NULL;
3318 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3320 .part_name = "88w8687",
3321 .helper_image = "mwl8k/helper_8687.fw",
3322 .fw_image = "mwl8k/fmimage_8687.fw",
3323 .rxd_ops = &rxd_8687_ops,
3324 .modes = BIT(NL80211_IFTYPE_STATION),
3327 .part_name = "88w8366",
3328 .helper_image = "mwl8k/helper_8366.fw",
3329 .fw_image = "mwl8k/fmimage_8366.fw",
3330 .rxd_ops = &rxd_8366_ops,
3335 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3336 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3337 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3338 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3341 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3343 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3344 const struct pci_device_id *id)
3346 static int printed_version = 0;
3347 struct ieee80211_hw *hw;
3348 struct mwl8k_priv *priv;
3352 if (!printed_version) {
3353 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3354 printed_version = 1;
3357 rc = pci_enable_device(pdev);
3359 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3364 rc = pci_request_regions(pdev, MWL8K_NAME);
3366 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3368 goto err_disable_device;
3371 pci_set_master(pdev);
3373 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3375 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3383 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3384 priv->rxd_ops = priv->device_info->rxd_ops;
3385 priv->sniffer_enabled = false;
3386 priv->wmm_enabled = false;
3387 priv->pending_tx_pkts = 0;
3389 SET_IEEE80211_DEV(hw, &pdev->dev);
3390 pci_set_drvdata(pdev, hw);
3392 priv->sram = pci_iomap(pdev, 0, 0x10000);
3393 if (priv->sram == NULL) {
3394 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3395 wiphy_name(hw->wiphy));
3400 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3401 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3403 priv->regs = pci_iomap(pdev, 1, 0x10000);
3404 if (priv->regs == NULL) {
3405 priv->regs = pci_iomap(pdev, 2, 0x10000);
3406 if (priv->regs == NULL) {
3407 printk(KERN_ERR "%s: Cannot map device registers\n",
3408 wiphy_name(hw->wiphy));
3413 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3414 priv->band.band = IEEE80211_BAND_2GHZ;
3415 priv->band.channels = priv->channels;
3416 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3417 priv->band.bitrates = priv->rates;
3418 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3419 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3421 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3422 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3425 * Extra headroom is the size of the required DMA header
3426 * minus the size of the smallest 802.11 frame (CTS frame).
3428 hw->extra_tx_headroom =
3429 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3431 hw->channel_change_time = 10;
3433 hw->queues = MWL8K_TX_QUEUES;
3435 hw->wiphy->interface_modes = priv->device_info->modes;
3437 /* Set rssi and noise values to dBm */
3438 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3439 hw->vif_data_size = sizeof(struct mwl8k_vif);
3442 /* Set default radio state and preamble */
3444 priv->radio_short_preamble = 0;
3446 /* Finalize join worker */
3447 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3449 /* TX reclaim tasklet */
3450 tasklet_init(&priv->tx_reclaim_task,
3451 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3452 tasklet_disable(&priv->tx_reclaim_task);
3454 /* Power management cookie */
3455 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3456 if (priv->cookie == NULL)
3459 rc = mwl8k_rxq_init(hw, 0);
3462 rxq_refill(hw, 0, INT_MAX);
3464 mutex_init(&priv->fw_mutex);
3465 priv->fw_mutex_owner = NULL;
3466 priv->fw_mutex_depth = 0;
3467 priv->hostcmd_wait = NULL;
3469 spin_lock_init(&priv->tx_lock);
3471 priv->tx_wait = NULL;
3473 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3474 rc = mwl8k_txq_init(hw, i);
3476 goto err_free_queues;
3479 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3480 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3481 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3482 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3484 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3485 IRQF_SHARED, MWL8K_NAME, hw);
3487 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3488 wiphy_name(hw->wiphy));
3489 goto err_free_queues;
3492 /* Reset firmware and hardware */
3493 mwl8k_hw_reset(priv);
3495 /* Ask userland hotplug daemon for the device firmware */
3496 rc = mwl8k_request_firmware(priv);
3498 printk(KERN_ERR "%s: Firmware files not found\n",
3499 wiphy_name(hw->wiphy));
3503 /* Load firmware into hardware */
3504 rc = mwl8k_load_firmware(hw);
3506 printk(KERN_ERR "%s: Cannot start firmware\n",
3507 wiphy_name(hw->wiphy));
3508 goto err_stop_firmware;
3511 /* Reclaim memory once firmware is successfully loaded */
3512 mwl8k_release_firmware(priv);
3515 * Temporarily enable interrupts. Initial firmware host
3516 * commands use interrupts and avoids polling. Disable
3517 * interrupts when done.
3519 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3521 /* Get config data, mac addrs etc */
3523 rc = mwl8k_cmd_get_hw_spec_ap(hw);
3525 rc = mwl8k_cmd_set_hw_spec(hw);
3527 rc = mwl8k_cmd_get_hw_spec_sta(hw);
3530 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3531 wiphy_name(hw->wiphy));
3532 goto err_stop_firmware;
3535 /* Turn radio off */
3536 rc = mwl8k_cmd_802_11_radio_disable(hw);
3538 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3539 goto err_stop_firmware;
3542 /* Clear MAC address */
3543 rc = mwl8k_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3545 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3546 wiphy_name(hw->wiphy));
3547 goto err_stop_firmware;
3550 /* Disable interrupts */
3551 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3552 free_irq(priv->pdev->irq, hw);
3554 rc = ieee80211_register_hw(hw);
3556 printk(KERN_ERR "%s: Cannot register device\n",
3557 wiphy_name(hw->wiphy));
3558 goto err_stop_firmware;
3561 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3562 wiphy_name(hw->wiphy), priv->device_info->part_name,
3563 priv->hw_rev, hw->wiphy->perm_addr,
3564 priv->ap_fw ? "AP" : "STA",
3565 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3566 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
3571 mwl8k_hw_reset(priv);
3572 mwl8k_release_firmware(priv);
3575 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3576 free_irq(priv->pdev->irq, hw);
3579 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3580 mwl8k_txq_deinit(hw, i);
3581 mwl8k_rxq_deinit(hw, 0);
3584 if (priv->cookie != NULL)
3585 pci_free_consistent(priv->pdev, 4,
3586 priv->cookie, priv->cookie_dma);
3588 if (priv->regs != NULL)
3589 pci_iounmap(pdev, priv->regs);
3591 if (priv->sram != NULL)
3592 pci_iounmap(pdev, priv->sram);
3594 pci_set_drvdata(pdev, NULL);
3595 ieee80211_free_hw(hw);
3598 pci_release_regions(pdev);
3601 pci_disable_device(pdev);
3606 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3608 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3611 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3613 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3614 struct mwl8k_priv *priv;
3621 ieee80211_stop_queues(hw);
3623 ieee80211_unregister_hw(hw);
3625 /* Remove tx reclaim tasklet */
3626 tasklet_kill(&priv->tx_reclaim_task);
3629 mwl8k_hw_reset(priv);
3631 /* Return all skbs to mac80211 */
3632 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3633 mwl8k_txq_reclaim(hw, i, 1);
3635 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3636 mwl8k_txq_deinit(hw, i);
3638 mwl8k_rxq_deinit(hw, 0);
3640 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
3642 pci_iounmap(pdev, priv->regs);
3643 pci_iounmap(pdev, priv->sram);
3644 pci_set_drvdata(pdev, NULL);
3645 ieee80211_free_hw(hw);
3646 pci_release_regions(pdev);
3647 pci_disable_device(pdev);
3650 static struct pci_driver mwl8k_driver = {
3652 .id_table = mwl8k_pci_id_table,
3653 .probe = mwl8k_probe,
3654 .remove = __devexit_p(mwl8k_remove),
3655 .shutdown = __devexit_p(mwl8k_shutdown),
3658 static int __init mwl8k_init(void)
3660 return pci_register_driver(&mwl8k_driver);
3663 static void __exit mwl8k_exit(void)
3665 pci_unregister_driver(&mwl8k_driver);
3668 module_init(mwl8k_init);
3669 module_exit(mwl8k_exit);
3671 MODULE_DESCRIPTION(MWL8K_DESC);
3672 MODULE_VERSION(MWL8K_VERSION);
3673 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3674 MODULE_LICENSE("GPL");