2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/kernel.h>
22 #include <linux/spinlock.h>
23 #include <linux/skbuff.h>
24 #include <linux/leds.h>
25 #include <linux/usb.h>
26 #include <linux/average.h>
27 #include <net/mac80211.h>
30 #define MT_TX_RING_SIZE 256
31 #define MT_MCU_RING_SIZE 32
32 #define MT_RX_BUF_SIZE 2048
33 #define MT_SKB_HEAD_LEN 128
38 struct mt76_reg_pair {
49 u32 (*rr)(struct mt76_dev *dev, u32 offset);
50 void (*wr)(struct mt76_dev *dev, u32 offset, u32 val);
51 u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val);
52 void (*copy)(struct mt76_dev *dev, u32 offset, const void *data,
54 int (*wr_rp)(struct mt76_dev *dev, u32 base,
55 const struct mt76_reg_pair *rp, int len);
56 int (*rd_rp)(struct mt76_dev *dev, u32 base,
57 struct mt76_reg_pair *rp, int len);
58 enum mt76_bus_type type;
61 #define mt76_is_usb(dev) ((dev)->mt76.bus->type == MT76_BUS_USB)
62 #define mt76_is_mmio(dev) ((dev)->mt76.bus->type == MT76_BUS_MMIO)
65 MT_TXQ_VO = IEEE80211_AC_VO,
66 MT_TXQ_VI = IEEE80211_AC_VI,
67 MT_TXQ_BE = IEEE80211_AC_BE,
68 MT_TXQ_BK = IEEE80211_AC_BK,
83 struct mt76_queue_buf {
89 struct mt76_queue_buf buf[32];
95 struct mt76_queue_entry {
101 struct mt76_txwi_cache *txwi;
104 enum mt76_txq_id qid;
109 struct mt76_queue_regs {
114 } __packed __aligned(4);
117 struct mt76_queue_regs __iomem *regs;
120 struct mt76_queue_entry *entry;
121 struct mt76_desc *desc;
135 struct sk_buff *rx_head;
136 struct page_frag_cache rx_page;
139 struct mt76_sw_queue {
140 struct mt76_queue *q;
142 struct list_head swq;
146 struct mt76_mcu_ops {
147 int (*mcu_send_msg)(struct mt76_dev *dev, int cmd, const void *data,
148 int len, bool wait_resp);
149 int (*mcu_wr_rp)(struct mt76_dev *dev, u32 base,
150 const struct mt76_reg_pair *rp, int len);
151 int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base,
152 struct mt76_reg_pair *rp, int len);
153 int (*mcu_restart)(struct mt76_dev *dev);
156 struct mt76_queue_ops {
157 int (*init)(struct mt76_dev *dev);
159 int (*alloc)(struct mt76_dev *dev, struct mt76_queue *q,
160 int idx, int n_desc, int bufsize,
163 int (*add_buf)(struct mt76_dev *dev, struct mt76_queue *q,
164 struct mt76_queue_buf *buf, int nbufs, u32 info,
165 struct sk_buff *skb, void *txwi);
167 int (*tx_queue_skb)(struct mt76_dev *dev, enum mt76_txq_id qid,
168 struct sk_buff *skb, struct mt76_wcid *wcid,
169 struct ieee80211_sta *sta);
171 int (*tx_queue_skb_raw)(struct mt76_dev *dev, enum mt76_txq_id qid,
172 struct sk_buff *skb, u32 tx_info);
174 void *(*dequeue)(struct mt76_dev *dev, struct mt76_queue *q, bool flush,
175 int *len, u32 *info, bool *more);
177 void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid);
179 void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid,
182 void (*kick)(struct mt76_dev *dev, struct mt76_queue *q);
185 enum mt76_wcid_flags {
186 MT_WCID_FLAG_CHECK_PS,
190 #define MT76_N_WCIDS 128
192 DECLARE_EWMA(signal, 10, 8);
194 #define MT_WCID_TX_INFO_RATE GENMASK(15, 0)
195 #define MT_WCID_TX_INFO_NSS GENMASK(17, 16)
196 #define MT_WCID_TX_INFO_TXPWR_ADJ GENMASK(25, 18)
197 #define MT_WCID_TX_INFO_SET BIT(31)
200 struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS];
202 struct work_struct aggr_work;
206 struct ewma_signal rssi;
215 u8 rx_key_pn[IEEE80211_NUM_TIDS][6];
224 struct mt76_sw_queue *swq;
225 struct mt76_wcid *wcid;
227 struct sk_buff_head retry_q;
234 struct mt76_txwi_cache {
235 struct list_head list;
242 struct rcu_head rcu_head;
244 struct mt76_dev *dev;
247 struct delayed_work reorder_work;
253 u8 started:1, stopped:1, timer_pending:1;
255 struct sk_buff *reorder_buf[];
258 #define MT_TX_CB_DMA_DONE BIT(0)
259 #define MT_TX_CB_TXS_DONE BIT(1)
260 #define MT_TX_CB_TXS_FAILED BIT(2)
262 #define MT_PACKET_ID_MASK GENMASK(6, 0)
263 #define MT_PACKET_ID_NO_ACK 0
264 #define MT_PACKET_ID_NO_SKB 1
265 #define MT_PACKET_ID_FIRST 2
266 #define MT_PACKET_ID_HAS_RATE BIT(7)
268 #define MT_TX_STATUS_SKB_TIMEOUT HZ
271 unsigned long jiffies;
278 MT76_STATE_INITIALIZED,
280 MT76_STATE_MCU_RUNNING,
293 #define MT_TXWI_NO_FREE BIT(0)
295 struct mt76_driver_ops {
296 bool tx_aligned4_skbs;
300 void (*update_survey)(struct mt76_dev *dev);
302 int (*tx_prepare_skb)(struct mt76_dev *dev, void *txwi_ptr,
303 enum mt76_txq_id qid, struct mt76_wcid *wcid,
304 struct ieee80211_sta *sta,
305 struct mt76_tx_info *tx_info);
307 void (*tx_complete_skb)(struct mt76_dev *dev, enum mt76_txq_id qid,
308 struct mt76_queue_entry *e);
310 bool (*tx_status_data)(struct mt76_dev *dev, u8 *update);
312 void (*rx_skb)(struct mt76_dev *dev, enum mt76_rxq_id q,
313 struct sk_buff *skb);
315 void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q);
317 void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta,
320 int (*sta_add)(struct mt76_dev *dev, struct ieee80211_vif *vif,
321 struct ieee80211_sta *sta);
323 void (*sta_assoc)(struct mt76_dev *dev, struct ieee80211_vif *vif,
324 struct ieee80211_sta *sta);
326 void (*sta_remove)(struct mt76_dev *dev, struct ieee80211_vif *vif,
327 struct ieee80211_sta *sta);
330 struct mt76_channel_state {
336 struct ieee80211_supported_band sband;
337 struct mt76_channel_state *chan;
340 struct mt76_rate_power {
354 #define MT_VEND_TYPE_EEPROM BIT(31)
355 #define MT_VEND_TYPE_CFG BIT(30)
356 #define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG)
358 #define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n))
360 MT_VEND_DEV_MODE = 0x1,
362 MT_VEND_MULTI_WRITE = 0x6,
363 MT_VEND_MULTI_READ = 0x7,
364 MT_VEND_READ_EEPROM = 0x9,
365 MT_VEND_WRITE_FCE = 0x42,
366 MT_VEND_WRITE_CFG = 0x46,
367 MT_VEND_READ_CFG = 0x47,
377 MT_EP_OUT_INBAND_CMD,
386 #define MT_TX_SG_MAX_SIZE 8
387 #define MT_RX_SG_MAX_SIZE 1
388 #define MT_NUM_TX_ENTRIES 256
389 #define MT_NUM_RX_ENTRIES 128
390 #define MCU_RESP_URB_SIZE 1024
392 struct mutex usb_ctrl_mtx;
395 struct tasklet_struct rx_tasklet;
396 struct delayed_work stat_work;
398 u8 out_ep[__MT_EP_OUT_MAX];
399 u8 in_ep[__MT_EP_IN_MAX];
408 struct mt76_reg_pair *rp;
419 wait_queue_head_t wait;
420 struct sk_buff_head res_q;
430 struct ieee80211_hw *hw;
431 struct cfg80211_chan_def chandef;
432 struct ieee80211_channel *main_chan;
439 const struct mt76_bus_ops *bus;
440 const struct mt76_driver_ops *drv;
441 const struct mt76_mcu_ops *mcu_ops;
444 struct net_device napi_dev;
446 struct napi_struct napi[__MT_RXQ_MAX];
447 struct sk_buff_head rx_skb[__MT_RXQ_MAX];
449 struct list_head txwi_cache;
450 struct mt76_sw_queue q_tx[__MT_TXQ_MAX];
451 struct mt76_queue q_rx[__MT_RXQ_MAX];
452 const struct mt76_queue_ops *queue_ops;
455 struct tasklet_struct tx_tasklet;
456 struct napi_struct tx_napi;
457 struct delayed_work mac_work;
459 wait_queue_head_t tx_wait;
460 struct sk_buff_head status_list;
462 unsigned long wcid_mask[MT76_N_WCIDS / BITS_PER_LONG];
464 struct mt76_wcid global_wcid;
465 struct mt76_wcid __rcu *wcid[MT76_N_WCIDS];
467 u8 macaddr[ETH_ALEN];
474 struct tasklet_struct pre_tbtt_tasklet;
478 struct mt76_sband sband_2g;
479 struct mt76_sband sband_5g;
480 struct debugfs_blob_wrapper eeprom;
481 struct debugfs_blob_wrapper otp;
482 struct mt76_hw_cap cap;
484 struct mt76_rate_power rate_power;
488 enum nl80211_dfs_regions region;
492 struct led_classdev led_cdev;
502 struct mt76_mmio mmio;
515 struct mt76_rx_status {
516 struct mt76_wcid *wcid;
518 unsigned long reorder_time;
535 s8 chain_signal[IEEE80211_MAX_CHAINS];
538 #define __mt76_rr(dev, ...) (dev)->bus->rr((dev), __VA_ARGS__)
539 #define __mt76_wr(dev, ...) (dev)->bus->wr((dev), __VA_ARGS__)
540 #define __mt76_rmw(dev, ...) (dev)->bus->rmw((dev), __VA_ARGS__)
541 #define __mt76_wr_copy(dev, ...) (dev)->bus->copy((dev), __VA_ARGS__)
543 #define __mt76_set(dev, offset, val) __mt76_rmw(dev, offset, 0, val)
544 #define __mt76_clear(dev, offset, val) __mt76_rmw(dev, offset, val, 0)
546 #define mt76_rr(dev, ...) (dev)->mt76.bus->rr(&((dev)->mt76), __VA_ARGS__)
547 #define mt76_wr(dev, ...) (dev)->mt76.bus->wr(&((dev)->mt76), __VA_ARGS__)
548 #define mt76_rmw(dev, ...) (dev)->mt76.bus->rmw(&((dev)->mt76), __VA_ARGS__)
549 #define mt76_wr_copy(dev, ...) (dev)->mt76.bus->copy(&((dev)->mt76), __VA_ARGS__)
550 #define mt76_wr_rp(dev, ...) (dev)->mt76.bus->wr_rp(&((dev)->mt76), __VA_ARGS__)
551 #define mt76_rd_rp(dev, ...) (dev)->mt76.bus->rd_rp(&((dev)->mt76), __VA_ARGS__)
553 #define mt76_mcu_send_msg(dev, ...) (dev)->mt76.mcu_ops->mcu_send_msg(&((dev)->mt76), __VA_ARGS__)
554 #define __mt76_mcu_send_msg(dev, ...) (dev)->mcu_ops->mcu_send_msg((dev), __VA_ARGS__)
555 #define mt76_mcu_restart(dev, ...) (dev)->mt76.mcu_ops->mcu_restart(&((dev)->mt76))
556 #define __mt76_mcu_restart(dev, ...) (dev)->mcu_ops->mcu_restart((dev))
558 #define mt76_set(dev, offset, val) mt76_rmw(dev, offset, 0, val)
559 #define mt76_clear(dev, offset, val) mt76_rmw(dev, offset, val, 0)
561 #define mt76_get_field(_dev, _reg, _field) \
562 FIELD_GET(_field, mt76_rr(dev, _reg))
564 #define mt76_rmw_field(_dev, _reg, _field, _val) \
565 mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
567 #define __mt76_rmw_field(_dev, _reg, _field, _val) \
568 __mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
570 #define mt76_hw(dev) (dev)->mt76.hw
572 bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
575 #define mt76_poll(dev, ...) __mt76_poll(&((dev)->mt76), __VA_ARGS__)
577 bool __mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
580 #define mt76_poll_msec(dev, ...) __mt76_poll_msec(&((dev)->mt76), __VA_ARGS__)
582 void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs);
584 static inline u16 mt76_chip(struct mt76_dev *dev)
586 return dev->rev >> 16;
589 static inline u16 mt76_rev(struct mt76_dev *dev)
591 return dev->rev & 0xffff;
594 #define mt76xx_chip(dev) mt76_chip(&((dev)->mt76))
595 #define mt76xx_rev(dev) mt76_rev(&((dev)->mt76))
597 #define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76))
598 #define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__)
599 #define mt76_tx_queue_skb_raw(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb_raw(&((dev)->mt76), __VA_ARGS__)
600 #define mt76_tx_queue_skb(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb(&((dev)->mt76), __VA_ARGS__)
601 #define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__)
602 #define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__)
603 #define mt76_queue_kick(dev, ...) (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__)
605 static inline struct mt76_channel_state *
606 mt76_channel_state(struct mt76_dev *dev, struct ieee80211_channel *c)
608 struct mt76_sband *msband;
611 if (c->band == NL80211_BAND_2GHZ)
612 msband = &dev->sband_2g;
614 msband = &dev->sband_5g;
616 idx = c - &msband->sband.channels[0];
617 return &msband->chan[idx];
620 struct mt76_dev *mt76_alloc_device(struct device *pdev, unsigned int size,
621 const struct ieee80211_ops *ops,
622 const struct mt76_driver_ops *drv_ops);
623 int mt76_register_device(struct mt76_dev *dev, bool vht,
624 struct ieee80211_rate *rates, int n_rates);
625 void mt76_unregister_device(struct mt76_dev *dev);
626 void mt76_free_device(struct mt76_dev *dev);
628 struct dentry *mt76_register_debugfs(struct mt76_dev *dev);
629 void mt76_seq_puts_array(struct seq_file *file, const char *str,
632 int mt76_eeprom_init(struct mt76_dev *dev, int len);
633 void mt76_eeprom_override(struct mt76_dev *dev);
636 mt76_get_txwi_ptr(struct mt76_dev *dev, struct mt76_txwi_cache *t)
638 return (u8 *)t - dev->drv->txwi_size;
641 /* increment with wrap-around */
642 static inline int mt76_incr(int val, int size)
644 return (val + 1) & (size - 1);
647 /* decrement with wrap-around */
648 static inline int mt76_decr(int val, int size)
650 return (val - 1) & (size - 1);
653 u8 mt76_ac_to_hwq(u8 ac);
655 static inline struct ieee80211_txq *
656 mtxq_to_txq(struct mt76_txq *mtxq)
660 return container_of(ptr, struct ieee80211_txq, drv_priv);
663 static inline struct ieee80211_sta *
664 wcid_to_sta(struct mt76_wcid *wcid)
668 if (!wcid || !wcid->sta)
671 return container_of(ptr, struct ieee80211_sta, drv_priv);
674 static inline struct mt76_tx_cb *mt76_tx_skb_cb(struct sk_buff *skb)
676 BUILD_BUG_ON(sizeof(struct mt76_tx_cb) >
677 sizeof(IEEE80211_SKB_CB(skb)->status.status_driver_data));
678 return ((void *) IEEE80211_SKB_CB(skb)->status.status_driver_data);
681 static inline void mt76_insert_hdr_pad(struct sk_buff *skb)
683 int len = ieee80211_get_hdrlen_from_skb(skb);
689 memmove(skb->data, skb->data + 2, len);
692 skb->data[len + 1] = 0;
695 static inline bool mt76_is_skb_pktid(u8 pktid)
697 if (pktid & MT_PACKET_ID_HAS_RATE)
700 return pktid >= MT_PACKET_ID_FIRST;
703 void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb);
704 void mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta,
705 struct mt76_wcid *wcid, struct sk_buff *skb);
706 void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq);
707 void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq);
708 void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq);
709 void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta,
711 void mt76_txq_schedule(struct mt76_dev *dev, enum mt76_txq_id qid);
712 void mt76_txq_schedule_all(struct mt76_dev *dev);
713 void mt76_release_buffered_frames(struct ieee80211_hw *hw,
714 struct ieee80211_sta *sta,
715 u16 tids, int nframes,
716 enum ieee80211_frame_release_type reason,
718 bool mt76_has_tx_pending(struct mt76_dev *dev);
719 void mt76_set_channel(struct mt76_dev *dev);
720 int mt76_get_survey(struct ieee80211_hw *hw, int idx,
721 struct survey_info *survey);
722 void mt76_set_stream_caps(struct mt76_dev *dev, bool vht);
724 int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid,
726 void mt76_rx_aggr_stop(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid);
728 void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid,
729 struct ieee80211_key_conf *key);
731 void mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list)
732 __acquires(&dev->status_list.lock);
733 void mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list)
734 __releases(&dev->status_list.lock);
736 int mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid,
737 struct sk_buff *skb);
738 struct sk_buff *mt76_tx_status_skb_get(struct mt76_dev *dev,
739 struct mt76_wcid *wcid, int pktid,
740 struct sk_buff_head *list);
741 void mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb,
742 struct sk_buff_head *list);
743 void mt76_tx_complete_skb(struct mt76_dev *dev, struct sk_buff *skb);
744 void mt76_tx_status_check(struct mt76_dev *dev, struct mt76_wcid *wcid,
746 int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
747 struct ieee80211_sta *sta,
748 enum ieee80211_sta_state old_state,
749 enum ieee80211_sta_state new_state);
750 void __mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif,
751 struct ieee80211_sta *sta);
753 struct ieee80211_sta *mt76_rx_convert(struct sk_buff *skb);
755 int mt76_get_min_avg_rssi(struct mt76_dev *dev);
757 int mt76_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
760 void mt76_csa_check(struct mt76_dev *dev);
761 void mt76_csa_finish(struct mt76_dev *dev);
763 int mt76_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set);
764 void mt76_insert_ccmp_hdr(struct sk_buff *skb, u8 key_id);
765 int mt76_get_rate(struct mt76_dev *dev,
766 struct ieee80211_supported_band *sband,
770 void mt76_tx_free(struct mt76_dev *dev);
771 struct mt76_txwi_cache *mt76_get_txwi(struct mt76_dev *dev);
772 void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t);
773 void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames,
774 struct napi_struct *napi);
775 void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,
776 struct napi_struct *napi);
777 void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames);
780 static inline bool mt76u_urb_error(struct urb *urb)
782 return urb->status &&
783 urb->status != -ECONNRESET &&
784 urb->status != -ESHUTDOWN &&
785 urb->status != -ENOENT;
788 /* Map hardware queues to usb endpoints */
789 static inline u8 q2ep(u8 qid)
791 /* TODO: take management packets to queue 5 */
796 mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len,
799 struct usb_device *udev = to_usb_device(dev->dev);
800 struct mt76_usb *usb = &dev->usb;
804 pipe = usb_rcvbulkpipe(udev, usb->in_ep[MT_EP_IN_CMD_RESP]);
806 pipe = usb_sndbulkpipe(udev, usb->out_ep[MT_EP_OUT_INBAND_CMD]);
808 return usb_bulk_msg(udev, pipe, data, len, actual_len, timeout);
811 int mt76u_vendor_request(struct mt76_dev *dev, u8 req,
812 u8 req_type, u16 val, u16 offset,
813 void *buf, size_t len);
814 void mt76u_single_wr(struct mt76_dev *dev, const u8 req,
815 const u16 offset, const u32 val);
816 int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf);
817 int mt76u_alloc_queues(struct mt76_dev *dev);
818 void mt76u_stop_tx(struct mt76_dev *dev);
819 void mt76u_stop_rx(struct mt76_dev *dev);
820 int mt76u_resume_rx(struct mt76_dev *dev);
821 void mt76u_queues_deinit(struct mt76_dev *dev);
824 mt76_mcu_msg_alloc(const void *data, int head_len,
825 int data_len, int tail_len);
826 void mt76_mcu_rx_event(struct mt76_dev *dev, struct sk_buff *skb);
827 struct sk_buff *mt76_mcu_get_response(struct mt76_dev *dev,
828 unsigned long expires);
830 void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr, u32 clear, u32 set);