1 /******************************************************************************
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/etherdevice.h>
31 #include <net/mac80211.h>
32 #include <asm/unaligned.h>
33 #include "iwl-eeprom.h"
38 #include "iwl-calib.h"
39 #include "iwl-helpers.h"
40 /************************** RX-FUNCTIONS ****************************/
42 * Rx theory of operation
44 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
45 * each of which point to Receive Buffers to be filled by the NIC. These get
46 * used not only for Rx frames, but for any command response or notification
47 * from the NIC. The driver and NIC manage the Rx buffers by means
48 * of indexes into the circular buffer.
51 * The host/firmware share two index registers for managing the Rx buffers.
53 * The READ index maps to the first position that the firmware may be writing
54 * to -- the driver can read up to (but not including) this position and get
56 * The READ index is managed by the firmware once the card is enabled.
58 * The WRITE index maps to the last position the driver has read from -- the
59 * position preceding WRITE is the last slot the firmware can place a packet.
61 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
64 * During initialization, the host sets up the READ queue position to the first
65 * INDEX position, and WRITE to the last (READ - 1 wrapped)
67 * When the firmware places a packet in a buffer, it will advance the READ index
68 * and fire the RX interrupt. The driver can then query the READ index and
69 * process as many packets as possible, moving the WRITE index forward as it
70 * resets the Rx queue buffers with new memory.
72 * The management in the driver is as follows:
73 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
74 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
75 * to replenish the iwl->rxq->rx_free.
76 * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
77 * iwl->rxq is replenished and the READ INDEX is updated (updating the
78 * 'processed' and 'read' driver indexes as well)
79 * + A received packet is processed and handed to the kernel network stack,
80 * detached from the iwl->rxq. The driver 'processed' index is updated.
81 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
82 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
83 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
84 * were enough free buffers and RX_STALLED is set it is cleared.
89 * iwl_rx_queue_alloc() Allocates rx_free
90 * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
91 * iwl_rx_queue_restock
92 * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
93 * queue, updates firmware pointers, and updates
94 * the WRITE index. If insufficient rx_free buffers
95 * are available, schedules iwl_rx_replenish
97 * -- enable interrupts --
98 * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
99 * READ INDEX, detaching the SKB from the pool.
100 * Moves the packet buffer from queue to rx_used.
101 * Calls iwl_rx_queue_restock to refill any empty
108 * iwl_rx_queue_space - Return number of free slots available in queue.
110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
112 int s = q->read - q->write;
115 /* keep some buffer to not confuse full and empty queue */
121 EXPORT_SYMBOL(iwl_rx_queue_space);
124 * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
126 void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
129 u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
132 spin_lock_irqsave(&q->lock, flags);
134 if (q->need_update == 0)
137 /* If power-saving is in use, make sure device is awake */
138 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
139 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
141 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
142 IWL_DEBUG_INFO(priv, "Rx queue requesting wakeup, GP1 = 0x%x\n",
144 iwl_set_bit(priv, CSR_GP_CNTRL,
145 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
149 q->write_actual = (q->write & ~0x7);
150 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
152 /* Else device is assumed to be awake */
154 /* Device expects a multiple of 8 */
155 q->write_actual = (q->write & ~0x7);
156 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
162 spin_unlock_irqrestore(&q->lock, flags);
164 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
166 * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
168 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
171 return cpu_to_le32((u32)(dma_addr >> 8));
175 * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
177 * If there are slots in the RX queue that need to be restocked,
178 * and we have free pre-allocated buffers, fill the ranks as much
179 * as we can, pulling from rx_free.
181 * This moves the 'write' index forward to catch up with 'processed', and
182 * also updates the memory address in the firmware to reference the new
185 void iwl_rx_queue_restock(struct iwl_priv *priv)
187 struct iwl_rx_queue *rxq = &priv->rxq;
188 struct list_head *element;
189 struct iwl_rx_mem_buffer *rxb;
193 spin_lock_irqsave(&rxq->lock, flags);
194 write = rxq->write & ~0x7;
195 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
196 /* Get next free Rx buffer, remove from free list */
197 element = rxq->rx_free.next;
198 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
201 /* Point to Rx buffer via next RBD in circular buffer */
202 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->page_dma);
203 rxq->queue[rxq->write] = rxb;
204 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
207 spin_unlock_irqrestore(&rxq->lock, flags);
208 /* If the pre-allocated buffer pool is dropping low, schedule to
210 if (rxq->free_count <= RX_LOW_WATERMARK)
211 queue_work(priv->workqueue, &priv->rx_replenish);
214 /* If we've added more space for the firmware to place data, tell it.
215 * Increment device's write pointer in multiples of 8. */
216 if (rxq->write_actual != (rxq->write & ~0x7)) {
217 spin_lock_irqsave(&rxq->lock, flags);
218 rxq->need_update = 1;
219 spin_unlock_irqrestore(&rxq->lock, flags);
220 iwl_rx_queue_update_write_ptr(priv, rxq);
223 EXPORT_SYMBOL(iwl_rx_queue_restock);
227 * iwl_rx_replenish - Move all used packet from rx_used to rx_free
229 * When moving to rx_free an SKB is allocated for the slot.
231 * Also restock the Rx queue via iwl_rx_queue_restock.
232 * This is called as a scheduled work item (except for during initialization)
234 void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
236 struct iwl_rx_queue *rxq = &priv->rxq;
237 struct list_head *element;
238 struct iwl_rx_mem_buffer *rxb;
241 gfp_t gfp_mask = priority;
244 spin_lock_irqsave(&rxq->lock, flags);
245 if (list_empty(&rxq->rx_used)) {
246 spin_unlock_irqrestore(&rxq->lock, flags);
249 spin_unlock_irqrestore(&rxq->lock, flags);
251 if (rxq->free_count > RX_LOW_WATERMARK)
252 gfp_mask |= __GFP_NOWARN;
254 if (priv->hw_params.rx_page_order > 0)
255 gfp_mask |= __GFP_COMP;
257 /* Alloc a new receive buffer */
258 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
261 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
263 priv->hw_params.rx_page_order);
265 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
267 IWL_CRIT(priv, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
268 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
270 /* We don't reschedule replenish work here -- we will
271 * call the restock method and if it still needs
272 * more buffers it will schedule replenish */
276 spin_lock_irqsave(&rxq->lock, flags);
278 if (list_empty(&rxq->rx_used)) {
279 spin_unlock_irqrestore(&rxq->lock, flags);
280 __free_pages(page, priv->hw_params.rx_page_order);
283 element = rxq->rx_used.next;
284 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
287 spin_unlock_irqrestore(&rxq->lock, flags);
290 /* Get physical address of the RB */
291 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
292 PAGE_SIZE << priv->hw_params.rx_page_order,
294 /* dma address must be no more than 36 bits */
295 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
296 /* and also 256 byte aligned! */
297 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
299 spin_lock_irqsave(&rxq->lock, flags);
301 list_add_tail(&rxb->list, &rxq->rx_free);
303 priv->alloc_rxb_page++;
305 spin_unlock_irqrestore(&rxq->lock, flags);
309 void iwl_rx_replenish(struct iwl_priv *priv)
313 iwl_rx_allocate(priv, GFP_KERNEL);
315 spin_lock_irqsave(&priv->lock, flags);
316 iwl_rx_queue_restock(priv);
317 spin_unlock_irqrestore(&priv->lock, flags);
319 EXPORT_SYMBOL(iwl_rx_replenish);
321 void iwl_rx_replenish_now(struct iwl_priv *priv)
323 iwl_rx_allocate(priv, GFP_ATOMIC);
325 iwl_rx_queue_restock(priv);
327 EXPORT_SYMBOL(iwl_rx_replenish_now);
330 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
331 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
332 * This free routine walks the list of POOL entries and if SKB is set to
333 * non NULL it is unmapped and freed
335 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
338 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
339 if (rxq->pool[i].page != NULL) {
340 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
341 PAGE_SIZE << priv->hw_params.rx_page_order,
343 __iwl_free_pages(priv, rxq->pool[i].page);
344 rxq->pool[i].page = NULL;
348 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
350 pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
351 rxq->rb_stts, rxq->rb_stts_dma);
355 EXPORT_SYMBOL(iwl_rx_queue_free);
357 int iwl_rx_queue_alloc(struct iwl_priv *priv)
359 struct iwl_rx_queue *rxq = &priv->rxq;
360 struct pci_dev *dev = priv->pci_dev;
363 spin_lock_init(&rxq->lock);
364 INIT_LIST_HEAD(&rxq->rx_free);
365 INIT_LIST_HEAD(&rxq->rx_used);
367 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
368 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
372 rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
377 /* Fill the rx_used queue with _all_ of the Rx buffers */
378 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
379 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
381 /* Set us so that we have processed and used all buffers, but have
382 * not restocked the Rx queue with fresh buffers */
383 rxq->read = rxq->write = 0;
384 rxq->write_actual = 0;
386 rxq->need_update = 0;
390 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
395 EXPORT_SYMBOL(iwl_rx_queue_alloc);
397 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
401 spin_lock_irqsave(&rxq->lock, flags);
402 INIT_LIST_HEAD(&rxq->rx_free);
403 INIT_LIST_HEAD(&rxq->rx_used);
404 /* Fill the rx_used queue with _all_ of the Rx buffers */
405 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
406 /* In the reset function, these buffers may have been allocated
407 * to an SKB, so we need to unmap and free potential storage */
408 if (rxq->pool[i].page != NULL) {
409 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
410 PAGE_SIZE << priv->hw_params.rx_page_order,
412 __iwl_free_pages(priv, rxq->pool[i].page);
413 rxq->pool[i].page = NULL;
415 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
418 /* Set us so that we have processed and used all buffers, but have
419 * not restocked the Rx queue with fresh buffers */
420 rxq->read = rxq->write = 0;
421 rxq->write_actual = 0;
423 spin_unlock_irqrestore(&rxq->lock, flags);
426 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
429 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
430 u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
432 if (!priv->cfg->use_isr_legacy)
433 rb_timeout = RX_RB_TIMEOUT;
435 if (priv->cfg->mod_params->amsdu_size_8K)
436 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
438 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
441 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
443 /* Reset driver's Rx queue write index */
444 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
446 /* Tell device where to find RBD circular buffer in DRAM */
447 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
448 (u32)(rxq->dma_addr >> 8));
450 /* Tell device where in DRAM to update its Rx status */
451 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
452 rxq->rb_stts_dma >> 4);
455 * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
456 * the credit mechanism in 5000 HW RX FIFO
457 * Direct rx interrupts to hosts
458 * Rx buffer size 4 or 8k
462 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
463 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
464 FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
465 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
466 FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
468 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
469 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
471 /* Set interrupt coalescing timer to default (2048 usecs) */
472 iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
477 int iwl_rxq_stop(struct iwl_priv *priv)
481 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
482 iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
483 FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
487 EXPORT_SYMBOL(iwl_rxq_stop);
489 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
490 struct iwl_rx_mem_buffer *rxb)
493 struct iwl_rx_packet *pkt = rxb_addr(rxb);
494 struct iwl_missed_beacon_notif *missed_beacon;
496 missed_beacon = &pkt->u.missed_beacon;
497 if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) >
498 priv->missed_beacon_threshold) {
499 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
500 le32_to_cpu(missed_beacon->consecutive_missed_beacons),
501 le32_to_cpu(missed_beacon->total_missed_becons),
502 le32_to_cpu(missed_beacon->num_recvd_beacons),
503 le32_to_cpu(missed_beacon->num_expected_beacons));
504 if (!test_bit(STATUS_SCANNING, &priv->status))
505 iwl_init_sensitivity(priv);
508 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
510 void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
511 struct iwl_rx_mem_buffer *rxb)
513 struct iwl_rx_packet *pkt = rxb_addr(rxb);
514 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
516 if (!report->state) {
518 "Spectrum Measure Notification: Start\n");
522 memcpy(&priv->measure_report, report, sizeof(*report));
523 priv->measurement_status |= MEASUREMENT_READY;
525 EXPORT_SYMBOL(iwl_rx_spectrum_measure_notif);
529 /* Calculate noise level, based on measurements during network silence just
530 * before arriving beacon. This measurement can be done only if we know
531 * exactly when to expect beacons, therefore only when we're associated. */
532 static void iwl_rx_calc_noise(struct iwl_priv *priv)
534 struct statistics_rx_non_phy *rx_info
535 = &(priv->statistics.rx.general);
536 int num_active_rx = 0;
537 int total_silence = 0;
539 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
541 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
543 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
546 total_silence += bcn_silence_a;
550 total_silence += bcn_silence_b;
554 total_silence += bcn_silence_c;
558 /* Average among active antennas */
560 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
562 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
564 IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
565 bcn_silence_a, bcn_silence_b, bcn_silence_c,
566 priv->last_rx_noise);
569 #ifdef CONFIG_IWLWIFI_DEBUG
571 * based on the assumption of all statistics counter are in DWORD
572 * FIXME: This function is for debugging, do not deal with
573 * the case of counters roll-over.
575 static void iwl_accumulative_statistics(struct iwl_priv *priv,
581 u32 *delta, *max_delta;
583 prev_stats = (__le32 *)&priv->statistics;
584 accum_stats = (u32 *)&priv->accum_statistics;
585 delta = (u32 *)&priv->delta_statistics;
586 max_delta = (u32 *)&priv->max_delta;
588 for (i = sizeof(__le32); i < sizeof(struct iwl_notif_statistics);
589 i += sizeof(__le32), stats++, prev_stats++, delta++,
590 max_delta++, accum_stats++) {
591 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
592 *delta = (le32_to_cpu(*stats) -
593 le32_to_cpu(*prev_stats));
594 *accum_stats += *delta;
595 if (*delta > *max_delta)
600 /* reset accumulative statistics for "no-counter" type statistics */
601 priv->accum_statistics.general.temperature =
602 priv->statistics.general.temperature;
603 priv->accum_statistics.general.temperature_m =
604 priv->statistics.general.temperature_m;
605 priv->accum_statistics.general.ttl_timestamp =
606 priv->statistics.general.ttl_timestamp;
607 priv->accum_statistics.tx.tx_power.ant_a =
608 priv->statistics.tx.tx_power.ant_a;
609 priv->accum_statistics.tx.tx_power.ant_b =
610 priv->statistics.tx.tx_power.ant_b;
611 priv->accum_statistics.tx.tx_power.ant_c =
612 priv->statistics.tx.tx_power.ant_c;
616 #define REG_RECALIB_PERIOD (60)
618 #define PLCP_MSG "plcp_err exceeded %u, %u, %u, %u, %u, %d, %u mSecs\n"
619 void iwl_rx_statistics(struct iwl_priv *priv,
620 struct iwl_rx_mem_buffer *rxb)
623 struct iwl_rx_packet *pkt = rxb_addr(rxb);
624 int combined_plcp_delta;
625 unsigned int plcp_msec;
626 unsigned long plcp_received_jiffies;
628 IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
629 (int)sizeof(priv->statistics),
630 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
632 change = ((priv->statistics.general.temperature !=
633 pkt->u.stats.general.temperature) ||
634 ((priv->statistics.flag &
635 STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
636 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
638 #ifdef CONFIG_IWLWIFI_DEBUG
639 iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats);
642 * check for plcp_err and trigger radio reset if it exceeds
643 * the plcp error threshold plcp_delta.
645 plcp_received_jiffies = jiffies;
646 plcp_msec = jiffies_to_msecs((long) plcp_received_jiffies -
647 (long) priv->plcp_jiffies);
648 priv->plcp_jiffies = plcp_received_jiffies;
650 * check to make sure plcp_msec is not 0 to prevent division
654 combined_plcp_delta =
655 (le32_to_cpu(pkt->u.stats.rx.ofdm.plcp_err) -
656 le32_to_cpu(priv->statistics.rx.ofdm.plcp_err)) +
657 (le32_to_cpu(pkt->u.stats.rx.ofdm_ht.plcp_err) -
658 le32_to_cpu(priv->statistics.rx.ofdm_ht.plcp_err));
660 if ((combined_plcp_delta > 0) &&
661 ((combined_plcp_delta * 100) / plcp_msec) >
662 priv->cfg->plcp_delta_threshold) {
664 * if plcp_err exceed the threshold, the following
665 * data is printed in csv format:
666 * Text: plcp_err exceeded %d,
667 * Received ofdm.plcp_err,
668 * Current ofdm.plcp_err,
669 * Received ofdm_ht.plcp_err,
670 * Current ofdm_ht.plcp_err,
671 * combined_plcp_delta,
674 IWL_DEBUG_RADIO(priv, PLCP_MSG,
675 priv->cfg->plcp_delta_threshold,
676 le32_to_cpu(pkt->u.stats.rx.ofdm.plcp_err),
677 le32_to_cpu(priv->statistics.rx.ofdm.plcp_err),
678 le32_to_cpu(pkt->u.stats.rx.ofdm_ht.plcp_err),
680 priv->statistics.rx.ofdm_ht.plcp_err),
681 combined_plcp_delta, plcp_msec);
684 * Reset the RF radio due to the high plcp
687 iwl_force_reset(priv, IWL_RF_RESET);
691 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
693 set_bit(STATUS_STATISTICS, &priv->status);
695 /* Reschedule the statistics timer to occur in
696 * REG_RECALIB_PERIOD seconds to ensure we get a
697 * thermal update even if the uCode doesn't give
699 mod_timer(&priv->statistics_periodic, jiffies +
700 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
702 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
703 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
704 iwl_rx_calc_noise(priv);
705 queue_work(priv->workqueue, &priv->run_time_calib_work);
707 if (priv->cfg->ops->lib->temp_ops.temperature && change)
708 priv->cfg->ops->lib->temp_ops.temperature(priv);
710 EXPORT_SYMBOL(iwl_rx_statistics);
712 void iwl_reply_statistics(struct iwl_priv *priv,
713 struct iwl_rx_mem_buffer *rxb)
715 struct iwl_rx_packet *pkt = rxb_addr(rxb);
717 if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) {
718 #ifdef CONFIG_IWLWIFI_DEBUG
719 memset(&priv->accum_statistics, 0,
720 sizeof(struct iwl_notif_statistics));
721 memset(&priv->delta_statistics, 0,
722 sizeof(struct iwl_notif_statistics));
723 memset(&priv->max_delta, 0,
724 sizeof(struct iwl_notif_statistics));
726 IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
728 iwl_rx_statistics(priv, rxb);
730 EXPORT_SYMBOL(iwl_reply_statistics);
732 /* Calc max signal level (dBm) among 3 possible receivers */
733 static inline int iwl_calc_rssi(struct iwl_priv *priv,
734 struct iwl_rx_phy_res *rx_resp)
736 return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
739 #ifdef CONFIG_IWLWIFI_DEBUG
741 * iwl_dbg_report_frame - dump frame to syslog during debug sessions
743 * You may hack this function to show different aspects of received frames,
744 * including selective frame dumps.
745 * group100 parameter selects whether to show 1 out of 100 good data frames.
746 * All beacon and probe response frames are printed.
748 static void iwl_dbg_report_frame(struct iwl_priv *priv,
749 struct iwl_rx_phy_res *phy_res, u16 length,
750 struct ieee80211_hdr *header, int group100)
753 u32 print_summary = 0;
754 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
765 if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
769 fc = header->frame_control;
770 seq_ctl = le16_to_cpu(header->seq_ctrl);
773 channel = le16_to_cpu(phy_res->channel);
774 phy_flags = le16_to_cpu(phy_res->phy_flags);
775 rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
777 /* signal statistics */
778 rssi = iwl_calc_rssi(priv, phy_res);
779 tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
781 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
783 /* if data frame is to us and all is good,
784 * (optionally) print summary for only 1 out of every 100 */
785 if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
786 cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
789 print_summary = 1; /* print each frame */
790 else if (priv->framecnt_to_us < 100) {
791 priv->framecnt_to_us++;
794 priv->framecnt_to_us = 0;
799 /* print summary for all other frames */
810 else if (ieee80211_has_retry(fc))
812 else if (ieee80211_is_assoc_resp(fc))
814 else if (ieee80211_is_reassoc_resp(fc))
816 else if (ieee80211_is_probe_resp(fc)) {
818 print_dump = 1; /* dump frame contents */
819 } else if (ieee80211_is_beacon(fc)) {
821 print_dump = 1; /* dump frame contents */
822 } else if (ieee80211_is_atim(fc))
824 else if (ieee80211_is_auth(fc))
826 else if (ieee80211_is_deauth(fc))
828 else if (ieee80211_is_disassoc(fc))
833 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
834 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
838 bitrate = iwl_rates[rate_idx].ieee / 2;
841 /* print frame summary.
842 * MAC addresses show just the last byte (for brevity),
843 * but you can hack it to show more, if you'd like to. */
845 IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
846 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
847 title, le16_to_cpu(fc), header->addr1[5],
848 length, rssi, channel, bitrate);
850 /* src/dst addresses assume managed mode */
851 IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
852 "len=%u, rssi=%d, tim=%lu usec, "
853 "phy=0x%02x, chnl=%d\n",
854 title, le16_to_cpu(fc), header->addr1[5],
855 header->addr3[5], length, rssi,
856 tsf_low - priv->scan_start_tsf,
861 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
866 * returns non-zero if packet should be dropped
868 int iwl_set_decrypted_flag(struct iwl_priv *priv,
869 struct ieee80211_hdr *hdr,
871 struct ieee80211_rx_status *stats)
873 u16 fc = le16_to_cpu(hdr->frame_control);
875 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
878 if (!(fc & IEEE80211_FCTL_PROTECTED))
881 IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
882 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
883 case RX_RES_STATUS_SEC_TYPE_TKIP:
884 /* The uCode has got a bad phase 1 Key, pushes the packet.
885 * Decryption will be done in SW. */
886 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
887 RX_RES_STATUS_BAD_KEY_TTAK)
890 case RX_RES_STATUS_SEC_TYPE_WEP:
891 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
892 RX_RES_STATUS_BAD_ICV_MIC) {
893 /* bad ICV, the packet is destroyed since the
894 * decryption is inplace, drop it */
895 IWL_DEBUG_RX(priv, "Packet destroyed\n");
898 case RX_RES_STATUS_SEC_TYPE_CCMP:
899 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
900 RX_RES_STATUS_DECRYPT_OK) {
901 IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
902 stats->flag |= RX_FLAG_DECRYPTED;
911 EXPORT_SYMBOL(iwl_set_decrypted_flag);
913 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
917 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
918 RX_RES_STATUS_STATION_FOUND)
919 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
920 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
922 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
924 /* packet was not encrypted */
925 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
926 RX_RES_STATUS_SEC_TYPE_NONE)
929 /* packet was encrypted with unknown alg */
930 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
931 RX_RES_STATUS_SEC_TYPE_ERR)
934 /* decryption was not done in HW */
935 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
936 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
939 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
941 case RX_RES_STATUS_SEC_TYPE_CCMP:
942 /* alg is CCM: check MIC only */
943 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
945 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
947 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
951 case RX_RES_STATUS_SEC_TYPE_TKIP:
952 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
954 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
957 /* fall through if TTAK OK */
959 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
960 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
962 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
966 IWL_DEBUG_RX(priv, "decrypt_in:0x%x decrypt_out = 0x%x\n",
967 decrypt_in, decrypt_out);
972 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
973 struct ieee80211_hdr *hdr,
976 struct iwl_rx_mem_buffer *rxb,
977 struct ieee80211_rx_status *stats)
981 __le16 fc = hdr->frame_control;
983 /* We only process data packets if the interface is open */
984 if (unlikely(!priv->is_open)) {
985 IWL_DEBUG_DROP_LIMIT(priv,
986 "Dropping packet while interface is not open.\n");
990 /* In case of HW accelerated crypto and bad decryption, drop */
991 if (!priv->cfg->mod_params->sw_crypto &&
992 iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
995 skb = alloc_skb(IWL_LINK_HDR_MAX * 2, GFP_ATOMIC);
997 IWL_ERR(priv, "alloc_skb failed\n");
1001 skb_reserve(skb, IWL_LINK_HDR_MAX);
1002 skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
1004 /* mac80211 currently doesn't support paged SKB. Convert it to
1005 * linear SKB for management frame and data frame requires
1006 * software decryption or software defragementation. */
1007 if (ieee80211_is_mgmt(fc) ||
1008 ieee80211_has_protected(fc) ||
1009 ieee80211_has_morefrags(fc) ||
1010 le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG)
1011 ret = skb_linearize(skb);
1013 ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ?
1022 * XXX: We cannot touch the page and its virtual memory (hdr) after
1023 * here. It might have already been freed by the above skb change.
1026 iwl_update_stats(priv, false, fc, len);
1027 memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
1029 ieee80211_rx(priv->hw, skb);
1031 priv->alloc_rxb_page--;
1035 /* This is necessary only for a number of statistics, see the caller. */
1036 static int iwl_is_network_packet(struct iwl_priv *priv,
1037 struct ieee80211_hdr *header)
1039 /* Filter incoming packets to determine if they are targeted toward
1040 * this network, discarding packets coming from ourselves */
1041 switch (priv->iw_mode) {
1042 case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source | BSSID */
1043 /* packets to our IBSS update information */
1044 return !compare_ether_addr(header->addr3, priv->bssid);
1045 case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
1046 /* packets to our IBSS update information */
1047 return !compare_ether_addr(header->addr2, priv->bssid);
1053 /* Called for REPLY_RX (legacy ABG frames), or
1054 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
1055 void iwl_rx_reply_rx(struct iwl_priv *priv,
1056 struct iwl_rx_mem_buffer *rxb)
1058 struct ieee80211_hdr *header;
1059 struct ieee80211_rx_status rx_status;
1060 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1061 struct iwl_rx_phy_res *phy_res;
1062 __le32 rx_pkt_status;
1063 struct iwl4965_rx_mpdu_res_start *amsdu;
1069 * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
1070 * REPLY_RX: physical layer info is in this buffer
1071 * REPLY_RX_MPDU_CMD: physical layer info was sent in separate
1072 * command and cached in priv->last_phy_res
1074 * Here we set up local variables depending on which command is
1077 if (pkt->hdr.cmd == REPLY_RX) {
1078 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
1079 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
1080 + phy_res->cfg_phy_cnt);
1082 len = le16_to_cpu(phy_res->byte_count);
1083 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
1084 phy_res->cfg_phy_cnt + len);
1085 ampdu_status = le32_to_cpu(rx_pkt_status);
1087 if (!priv->last_phy_res[0]) {
1088 IWL_ERR(priv, "MPDU frame without cached PHY data\n");
1091 phy_res = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
1092 amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1093 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
1094 len = le16_to_cpu(amsdu->byte_count);
1095 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
1096 ampdu_status = iwl_translate_rx_status(priv,
1097 le32_to_cpu(rx_pkt_status));
1100 if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
1101 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
1102 phy_res->cfg_phy_cnt);
1106 if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
1107 !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1108 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
1109 le32_to_cpu(rx_pkt_status));
1113 /* This will be used in several places later */
1114 rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
1116 /* rx_status carries information about the packet to mac80211 */
1117 rx_status.mactime = le64_to_cpu(phy_res->timestamp);
1119 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
1120 rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1121 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1122 rx_status.rate_idx =
1123 iwl_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
1126 /* TSF isn't reliable. In order to allow smooth user experience,
1127 * this W/A doesn't propagate it to the mac80211 */
1128 /*rx_status.flag |= RX_FLAG_TSFT;*/
1130 priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
1132 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1133 rx_status.signal = iwl_calc_rssi(priv, phy_res);
1135 /* Meaningful noise values are available only from beacon statistics,
1136 * which are gathered only when associated, and indicate noise
1137 * only for the associated network channel ...
1138 * Ignore these noise values while scanning (other channels) */
1139 if (iwl_is_associated(priv) &&
1140 !test_bit(STATUS_SCANNING, &priv->status)) {
1141 rx_status.noise = priv->last_rx_noise;
1143 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1146 /* Reset beacon noise level if not associated. */
1147 if (!iwl_is_associated(priv))
1148 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1150 #ifdef CONFIG_IWLWIFI_DEBUG
1151 /* Set "1" to report good data frames in groups of 100 */
1152 if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
1153 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1155 iwl_dbg_log_rx_data_frame(priv, len, header);
1156 IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, TSF %llu\n",
1157 rx_status.signal, rx_status.noise,
1158 (unsigned long long)rx_status.mactime);
1163 * It seems that the antenna field in the phy flags value
1164 * is actually a bit field. This is undefined by radiotap,
1165 * it wants an actual antenna number but I always get "7"
1166 * for most legacy frames I receive indicating that the
1167 * same frame was received on all three RX chains.
1169 * I think this field should be removed in favor of a
1170 * new 802.11n radiotap field "RX chains" that is defined
1174 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1175 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1177 /* set the preamble flag if appropriate */
1178 if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1179 rx_status.flag |= RX_FLAG_SHORTPRE;
1181 /* Set up the HT phy flags */
1182 if (rate_n_flags & RATE_MCS_HT_MSK)
1183 rx_status.flag |= RX_FLAG_HT;
1184 if (rate_n_flags & RATE_MCS_HT40_MSK)
1185 rx_status.flag |= RX_FLAG_40MHZ;
1186 if (rate_n_flags & RATE_MCS_SGI_MSK)
1187 rx_status.flag |= RX_FLAG_SHORT_GI;
1189 if (iwl_is_network_packet(priv, header)) {
1190 priv->last_rx_rssi = rx_status.signal;
1191 priv->last_beacon_time = priv->ucode_beacon_time;
1192 priv->last_tsf = le64_to_cpu(phy_res->timestamp);
1195 iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1198 EXPORT_SYMBOL(iwl_rx_reply_rx);
1200 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1201 * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1202 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1203 struct iwl_rx_mem_buffer *rxb)
1205 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1206 priv->last_phy_res[0] = 1;
1207 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1208 sizeof(struct iwl_rx_phy_res));
1210 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);