1 /******************************************************************************
5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <net/mac80211.h>
36 #include "iwl-eeprom.h"
37 #include "iwl-dev.h" /* FIXME: remove */
38 #include "iwl-debug.h"
41 #include "iwl-power.h"
43 #include "iwl-helpers.h"
46 MODULE_DESCRIPTION("iwl core");
47 MODULE_VERSION(IWLWIFI_VERSION);
48 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
49 MODULE_LICENSE("GPL");
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
67 static bool bt_coex_active = true;
68 module_param(bt_coex_active, bool, S_IRUGO);
69 MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist\n");
71 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
72 {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
73 0, COEX_UNASSOC_IDLE_FLAGS},
74 {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
75 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
76 {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
77 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
78 {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
79 0, COEX_CALIBRATION_FLAGS},
80 {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
81 0, COEX_PERIODIC_CALIBRATION_FLAGS},
82 {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
83 0, COEX_CONNECTION_ESTAB_FLAGS},
84 {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
85 0, COEX_ASSOCIATED_IDLE_FLAGS},
86 {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
87 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
88 {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
89 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
90 {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
91 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
92 {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
93 {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
94 {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
95 0, COEX_STAND_ALONE_DEBUG_FLAGS},
96 {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
97 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
98 {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
99 {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
102 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
103 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
104 IWL_RATE_SISO_##s##M_PLCP, \
105 IWL_RATE_MIMO2_##s##M_PLCP,\
106 IWL_RATE_MIMO3_##s##M_PLCP,\
107 IWL_RATE_##r##M_IEEE, \
108 IWL_RATE_##ip##M_INDEX, \
109 IWL_RATE_##in##M_INDEX, \
110 IWL_RATE_##rp##M_INDEX, \
111 IWL_RATE_##rn##M_INDEX, \
112 IWL_RATE_##pp##M_INDEX, \
113 IWL_RATE_##np##M_INDEX }
116 EXPORT_SYMBOL(iwl_debug_level);
118 static irqreturn_t iwl_isr(int irq, void *data);
122 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
124 * If there isn't a valid next or previous rate then INV is used which
125 * maps to IWL_RATE_INVALID
128 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
129 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
130 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
131 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
132 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
133 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
134 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
135 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
136 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
137 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
138 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
139 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
140 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
141 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
142 /* FIXME:RS: ^^ should be INV (legacy) */
144 EXPORT_SYMBOL(iwl_rates);
147 * translate ucode response to mac80211 tx status control values
149 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
150 struct ieee80211_tx_info *info)
152 struct ieee80211_tx_rate *r = &info->control.rates[0];
154 info->antenna_sel_tx =
155 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
156 if (rate_n_flags & RATE_MCS_HT_MSK)
157 r->flags |= IEEE80211_TX_RC_MCS;
158 if (rate_n_flags & RATE_MCS_GF_MSK)
159 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
160 if (rate_n_flags & RATE_MCS_HT40_MSK)
161 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
162 if (rate_n_flags & RATE_MCS_DUP_MSK)
163 r->flags |= IEEE80211_TX_RC_DUP_DATA;
164 if (rate_n_flags & RATE_MCS_SGI_MSK)
165 r->flags |= IEEE80211_TX_RC_SHORT_GI;
166 r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
168 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
170 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
175 if (rate_n_flags & RATE_MCS_HT_MSK) {
176 idx = (rate_n_flags & 0xff);
178 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
179 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
180 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
181 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
183 idx += IWL_FIRST_OFDM_RATE;
184 /* skip 9M not supported in ht*/
185 if (idx >= IWL_RATE_9M_INDEX)
187 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
190 /* legacy rate format, search for match in table */
192 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
193 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
199 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
201 int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
206 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
207 if (rate_n_flags & RATE_MCS_HT_MSK) {
208 idx = (rate_n_flags & 0xff);
210 /* Legacy rate format, search for match in table */
212 if (band == IEEE80211_BAND_5GHZ)
213 band_offset = IWL_FIRST_OFDM_RATE;
214 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
215 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
216 return idx - band_offset;
222 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
226 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
227 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
228 if (priv->hw_params.valid_tx_ant & BIT(ind))
233 EXPORT_SYMBOL(iwl_toggle_tx_ant);
235 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
236 EXPORT_SYMBOL(iwl_bcast_addr);
239 /* This function both allocates and initializes hw and priv. */
240 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
241 struct ieee80211_ops *hw_ops)
243 struct iwl_priv *priv;
245 /* mac80211 allocates memory for this device instance, including
246 * space for this driver's private structure */
247 struct ieee80211_hw *hw =
248 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
250 printk(KERN_ERR "%s: Can not allocate network device\n",
261 EXPORT_SYMBOL(iwl_alloc_all);
263 void iwl_hw_detect(struct iwl_priv *priv)
265 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
266 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
267 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
269 EXPORT_SYMBOL(iwl_hw_detect);
271 int iwl_hw_nic_init(struct iwl_priv *priv)
274 struct iwl_rx_queue *rxq = &priv->rxq;
278 spin_lock_irqsave(&priv->lock, flags);
279 priv->cfg->ops->lib->apm_ops.init(priv);
281 /* Set interrupt coalescing calibration timer to default (512 usecs) */
282 iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_CALIB_TIMEOUT_DEF);
284 spin_unlock_irqrestore(&priv->lock, flags);
286 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
288 priv->cfg->ops->lib->apm_ops.config(priv);
290 /* Allocate the RX queue, or reset if it is already allocated */
292 ret = iwl_rx_queue_alloc(priv);
294 IWL_ERR(priv, "Unable to initialize Rx queue\n");
298 iwl_rx_queue_reset(priv, rxq);
300 iwl_rx_replenish(priv);
302 iwl_rx_init(priv, rxq);
304 spin_lock_irqsave(&priv->lock, flags);
306 rxq->need_update = 1;
307 iwl_rx_queue_update_write_ptr(priv, rxq);
309 spin_unlock_irqrestore(&priv->lock, flags);
311 /* Allocate and init all Tx and Command queues */
312 ret = iwl_txq_ctx_reset(priv);
316 set_bit(STATUS_INIT, &priv->status);
320 EXPORT_SYMBOL(iwl_hw_nic_init);
325 void iwl_activate_qos(struct iwl_priv *priv, u8 force)
327 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
330 priv->qos_data.def_qos_parm.qos_flags = 0;
332 if (priv->qos_data.qos_cap.q_AP.queue_request &&
333 !priv->qos_data.qos_cap.q_AP.txop_request)
334 priv->qos_data.def_qos_parm.qos_flags |=
335 QOS_PARAM_FLG_TXOP_TYPE_MSK;
336 if (priv->qos_data.qos_active)
337 priv->qos_data.def_qos_parm.qos_flags |=
338 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
340 if (priv->current_ht_config.is_ht)
341 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
343 if (force || iwl_is_associated(priv)) {
344 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
345 priv->qos_data.qos_active,
346 priv->qos_data.def_qos_parm.qos_flags);
348 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
349 sizeof(struct iwl_qosparam_cmd),
350 &priv->qos_data.def_qos_parm, NULL);
353 EXPORT_SYMBOL(iwl_activate_qos);
356 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
357 * (802.11b) (802.11a/g)
358 * AC_BK 15 1023 7 0 0
359 * AC_BE 15 1023 3 0 0
360 * AC_VI 7 15 2 6.016ms 3.008ms
361 * AC_VO 3 7 2 3.264ms 1.504ms
363 void iwl_reset_qos(struct iwl_priv *priv)
368 bool is_legacy = false;
372 spin_lock_irqsave(&priv->lock, flags);
373 /* QoS always active in AP and ADHOC mode
374 * In STA mode wait for association
376 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
377 priv->iw_mode == NL80211_IFTYPE_AP)
378 priv->qos_data.qos_active = 1;
380 priv->qos_data.qos_active = 0;
382 /* check for legacy mode */
383 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
384 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
385 (priv->iw_mode == NL80211_IFTYPE_STATION &&
386 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
391 if (priv->qos_data.qos_active)
395 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
396 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
397 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
398 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
399 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
401 if (priv->qos_data.qos_active) {
404 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
405 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
406 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
407 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
408 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
412 priv->qos_data.def_qos_parm.ac[i].cw_min =
413 cpu_to_le16((cw_min + 1) / 2 - 1);
414 priv->qos_data.def_qos_parm.ac[i].cw_max =
416 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
418 priv->qos_data.def_qos_parm.ac[i].edca_txop =
421 priv->qos_data.def_qos_parm.ac[i].edca_txop =
423 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
427 priv->qos_data.def_qos_parm.ac[i].cw_min =
428 cpu_to_le16((cw_min + 1) / 4 - 1);
429 priv->qos_data.def_qos_parm.ac[i].cw_max =
430 cpu_to_le16((cw_min + 1) / 2 - 1);
431 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
432 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
434 priv->qos_data.def_qos_parm.ac[i].edca_txop =
437 priv->qos_data.def_qos_parm.ac[i].edca_txop =
440 for (i = 1; i < 4; i++) {
441 priv->qos_data.def_qos_parm.ac[i].cw_min =
443 priv->qos_data.def_qos_parm.ac[i].cw_max =
445 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
446 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
447 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
450 IWL_DEBUG_QOS(priv, "set QoS to default \n");
452 spin_unlock_irqrestore(&priv->lock, flags);
454 EXPORT_SYMBOL(iwl_reset_qos);
456 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
457 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
458 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
459 struct ieee80211_sta_ht_cap *ht_info,
460 enum ieee80211_band band)
462 u16 max_bit_rate = 0;
463 u8 rx_chains_num = priv->hw_params.rx_chains_num;
464 u8 tx_chains_num = priv->hw_params.tx_chains_num;
467 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
469 ht_info->ht_supported = true;
471 if (priv->cfg->ht_greenfield_support)
472 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
473 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
474 max_bit_rate = MAX_BIT_RATE_20_MHZ;
475 if (priv->hw_params.ht40_channel & BIT(band)) {
476 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
477 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
478 ht_info->mcs.rx_mask[4] = 0x01;
479 max_bit_rate = MAX_BIT_RATE_40_MHZ;
482 if (priv->cfg->mod_params->amsdu_size_8K)
483 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
485 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
486 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
488 ht_info->mcs.rx_mask[0] = 0xFF;
489 if (rx_chains_num >= 2)
490 ht_info->mcs.rx_mask[1] = 0xFF;
491 if (rx_chains_num >= 3)
492 ht_info->mcs.rx_mask[2] = 0xFF;
494 /* Highest supported Rx data rate */
495 max_bit_rate *= rx_chains_num;
496 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
497 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
499 /* Tx MCS capabilities */
500 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
501 if (tx_chains_num != rx_chains_num) {
502 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
503 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
504 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
509 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
511 int iwlcore_init_geos(struct iwl_priv *priv)
513 struct iwl_channel_info *ch;
514 struct ieee80211_supported_band *sband;
515 struct ieee80211_channel *channels;
516 struct ieee80211_channel *geo_ch;
517 struct ieee80211_rate *rates;
520 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
521 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
522 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
523 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
527 channels = kzalloc(sizeof(struct ieee80211_channel) *
528 priv->channel_count, GFP_KERNEL);
532 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
539 /* 5.2GHz channels start after the 2.4GHz channels */
540 sband = &priv->bands[IEEE80211_BAND_5GHZ];
541 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
543 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
544 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
546 if (priv->cfg->sku & IWL_SKU_N)
547 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
548 IEEE80211_BAND_5GHZ);
550 sband = &priv->bands[IEEE80211_BAND_2GHZ];
551 sband->channels = channels;
553 sband->bitrates = rates;
554 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
556 if (priv->cfg->sku & IWL_SKU_N)
557 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
558 IEEE80211_BAND_2GHZ);
560 priv->ieee_channels = channels;
561 priv->ieee_rates = rates;
563 for (i = 0; i < priv->channel_count; i++) {
564 ch = &priv->channel_info[i];
566 /* FIXME: might be removed if scan is OK */
567 if (!is_channel_valid(ch))
570 if (is_channel_a_band(ch))
571 sband = &priv->bands[IEEE80211_BAND_5GHZ];
573 sband = &priv->bands[IEEE80211_BAND_2GHZ];
575 geo_ch = &sband->channels[sband->n_channels++];
577 geo_ch->center_freq =
578 ieee80211_channel_to_frequency(ch->channel);
579 geo_ch->max_power = ch->max_power_avg;
580 geo_ch->max_antenna_gain = 0xff;
581 geo_ch->hw_value = ch->channel;
583 if (is_channel_valid(ch)) {
584 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
585 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
587 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
588 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
590 if (ch->flags & EEPROM_CHANNEL_RADAR)
591 geo_ch->flags |= IEEE80211_CHAN_RADAR;
593 geo_ch->flags |= ch->ht40_extension_channel;
595 if (ch->max_power_avg > priv->tx_power_device_lmt)
596 priv->tx_power_device_lmt = ch->max_power_avg;
598 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
601 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
602 ch->channel, geo_ch->center_freq,
603 is_channel_a_band(ch) ? "5.2" : "2.4",
604 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
605 "restricted" : "valid",
609 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
610 priv->cfg->sku & IWL_SKU_A) {
611 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
612 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
613 priv->pci_dev->device,
614 priv->pci_dev->subsystem_device);
615 priv->cfg->sku &= ~IWL_SKU_A;
618 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
619 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
620 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
622 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
626 EXPORT_SYMBOL(iwlcore_init_geos);
629 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
631 void iwlcore_free_geos(struct iwl_priv *priv)
633 kfree(priv->ieee_channels);
634 kfree(priv->ieee_rates);
635 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
637 EXPORT_SYMBOL(iwlcore_free_geos);
640 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
643 void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
646 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
647 *tx_flags |= TX_CMD_FLG_RTS_MSK;
648 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
649 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
650 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
651 *tx_flags |= TX_CMD_FLG_CTS_MSK;
654 EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
656 static bool is_single_rx_stream(struct iwl_priv *priv)
658 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
659 priv->current_ht_config.single_chain_sufficient;
662 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
663 enum ieee80211_band band,
664 u16 channel, u8 extension_chan_offset)
666 const struct iwl_channel_info *ch_info;
668 ch_info = iwl_get_channel_info(priv, band, channel);
669 if (!is_channel_valid(ch_info))
672 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
673 return !(ch_info->ht40_extension_channel &
674 IEEE80211_CHAN_NO_HT40PLUS);
675 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
676 return !(ch_info->ht40_extension_channel &
677 IEEE80211_CHAN_NO_HT40MINUS);
682 u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
683 struct ieee80211_sta_ht_cap *sta_ht_inf)
685 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
687 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
690 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
691 * the bit will not set if it is pure 40MHz case
694 if (!sta_ht_inf->ht_supported)
697 #ifdef CONFIG_IWLWIFI_DEBUG
698 if (priv->disable_ht40)
701 return iwl_is_channel_extension(priv, priv->band,
702 le16_to_cpu(priv->staging_rxon.channel),
703 ht_conf->extension_chan_offset);
705 EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
707 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
710 u16 beacon_factor = 0;
712 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
713 new_val = beacon_val / beacon_factor;
716 new_val = max_beacon_val;
721 void iwl_setup_rxon_timing(struct iwl_priv *priv)
724 s32 interval_tm, rem;
726 struct ieee80211_conf *conf = NULL;
729 conf = ieee80211_get_hw_conf(priv->hw);
731 spin_lock_irqsave(&priv->lock, flags);
732 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
733 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
735 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
736 beacon_int = priv->beacon_int;
737 priv->rxon_timing.atim_window = 0;
739 beacon_int = priv->vif->bss_conf.beacon_int;
741 /* TODO: we need to get atim_window from upper stack
742 * for now we set to 0 */
743 priv->rxon_timing.atim_window = 0;
746 beacon_int = iwl_adjust_beacon_interval(beacon_int,
747 priv->hw_params.max_beacon_itrvl * 1024);
748 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
750 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
751 interval_tm = beacon_int * 1024;
752 rem = do_div(tsf, interval_tm);
753 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
755 spin_unlock_irqrestore(&priv->lock, flags);
756 IWL_DEBUG_ASSOC(priv,
757 "beacon interval %d beacon timer %d beacon tim %d\n",
758 le16_to_cpu(priv->rxon_timing.beacon_interval),
759 le32_to_cpu(priv->rxon_timing.beacon_init_val),
760 le16_to_cpu(priv->rxon_timing.atim_window));
762 EXPORT_SYMBOL(iwl_setup_rxon_timing);
764 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
766 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
769 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
771 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
774 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
777 * iwl_check_rxon_cmd - validate RXON structure is valid
779 * NOTE: This is really only useful during development and can eventually
780 * be #ifdef'd out once the driver is stable and folks aren't actively
783 int iwl_check_rxon_cmd(struct iwl_priv *priv)
787 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
789 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
790 error |= le32_to_cpu(rxon->flags &
791 (RXON_FLG_TGJ_NARROW_BAND_MSK |
792 RXON_FLG_RADAR_DETECT_MSK));
794 IWL_WARN(priv, "check 24G fields %d | %d\n",
797 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
798 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
800 IWL_WARN(priv, "check 52 fields %d | %d\n",
802 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
804 IWL_WARN(priv, "check 52 CCK %d | %d\n",
807 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
809 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
811 /* make sure basic rates 6Mbps and 1Mbps are supported */
812 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
813 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
815 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
817 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
819 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
821 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
822 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
824 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
827 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
828 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
830 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
833 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
834 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
836 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
840 IWL_WARN(priv, "Tuning to channel %d\n",
841 le16_to_cpu(rxon->channel));
844 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
849 EXPORT_SYMBOL(iwl_check_rxon_cmd);
852 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
853 * @priv: staging_rxon is compared to active_rxon
855 * If the RXON structure is changing enough to require a new tune,
856 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
857 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
859 int iwl_full_rxon_required(struct iwl_priv *priv)
862 /* These items are only settable from the full RXON command */
863 if (!(iwl_is_associated(priv)) ||
864 compare_ether_addr(priv->staging_rxon.bssid_addr,
865 priv->active_rxon.bssid_addr) ||
866 compare_ether_addr(priv->staging_rxon.node_addr,
867 priv->active_rxon.node_addr) ||
868 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
869 priv->active_rxon.wlap_bssid_addr) ||
870 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
871 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
872 (priv->staging_rxon.air_propagation !=
873 priv->active_rxon.air_propagation) ||
874 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
875 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
876 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
877 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
878 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
879 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
880 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
883 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
884 * be updated with the RXON_ASSOC command -- however only some
885 * flag transitions are allowed using RXON_ASSOC */
887 /* Check if we are not switching bands */
888 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
889 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
892 /* Check if we are switching association toggle */
893 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
894 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
899 EXPORT_SYMBOL(iwl_full_rxon_required);
901 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
907 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
908 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
910 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
912 /* Find lowest valid rate */
913 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
914 i = iwl_rates[i].next_ieee) {
915 if (rate_mask & (1 << i))
916 return iwl_rates[i].plcp;
919 /* No valid rate was found. Assign the lowest one */
920 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
921 return IWL_RATE_1M_PLCP;
923 return IWL_RATE_6M_PLCP;
925 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
927 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
929 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
931 if (!ht_conf->is_ht) {
932 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
933 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
934 RXON_FLG_HT40_PROT_MSK |
935 RXON_FLG_HT_PROT_MSK);
939 /* FIXME: if the definition of ht_protection changed, the "translation"
940 * will be needed for rxon->flags
942 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
944 /* Set up channel bandwidth:
945 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
946 /* clear the HT channel mode before set the mode */
947 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
948 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
949 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
951 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
952 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
953 /* Note: control channel is opposite of extension channel */
954 switch (ht_conf->extension_chan_offset) {
955 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
956 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
958 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
959 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
963 /* Note: control channel is opposite of extension channel */
964 switch (ht_conf->extension_chan_offset) {
965 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
966 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
967 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
969 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
970 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
971 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
973 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
975 /* channel location only valid if in Mixed mode */
976 IWL_ERR(priv, "invalid extension channel offset\n");
981 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
984 if (priv->cfg->ops->hcmd->set_rxon_chain)
985 priv->cfg->ops->hcmd->set_rxon_chain(priv);
987 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
988 "extension channel offset 0x%x\n",
989 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
990 ht_conf->extension_chan_offset);
993 EXPORT_SYMBOL(iwl_set_rxon_ht);
995 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
996 #define IWL_NUM_RX_CHAINS_SINGLE 2
997 #define IWL_NUM_IDLE_CHAINS_DUAL 2
998 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
1001 * Determine how many receiver/antenna chains to use.
1003 * More provides better reception via diversity. Fewer saves power
1004 * at the expense of throughput, but only when not in powersave to
1007 * MIMO (dual stream) requires at least 2, but works better with 3.
1008 * This does not determine *which* chains to use, just how many.
1010 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
1012 /* # of Rx chains to use when expecting MIMO. */
1013 if (is_single_rx_stream(priv))
1014 return IWL_NUM_RX_CHAINS_SINGLE;
1016 return IWL_NUM_RX_CHAINS_MULTIPLE;
1020 * When we are in power saving mode, unless device support spatial
1021 * multiplexing power save, use the active count for rx chain count.
1023 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
1025 /* # Rx chains when idling, depending on SMPS mode */
1026 switch (priv->current_ht_config.smps) {
1027 case IEEE80211_SMPS_STATIC:
1028 case IEEE80211_SMPS_DYNAMIC:
1029 return IWL_NUM_IDLE_CHAINS_SINGLE;
1030 case IEEE80211_SMPS_OFF:
1033 WARN(1, "invalid SMPS mode %d",
1034 priv->current_ht_config.smps);
1039 /* up to 4 chains */
1040 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
1043 res = (chain_bitmap & BIT(0)) >> 0;
1044 res += (chain_bitmap & BIT(1)) >> 1;
1045 res += (chain_bitmap & BIT(2)) >> 2;
1046 res += (chain_bitmap & BIT(3)) >> 3;
1051 * iwl_is_monitor_mode - Determine if interface in monitor mode
1053 * priv->iw_mode is set in add_interface, but add_interface is
1054 * never called for monitor mode. The only way mac80211 informs us about
1055 * monitor mode is through configuring filters (call to configure_filter).
1057 bool iwl_is_monitor_mode(struct iwl_priv *priv)
1059 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1061 EXPORT_SYMBOL(iwl_is_monitor_mode);
1064 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1066 * Selects how many and which Rx receivers/antennas/chains to use.
1067 * This should not be used for scan command ... it puts data in wrong place.
1069 void iwl_set_rxon_chain(struct iwl_priv *priv)
1071 bool is_single = is_single_rx_stream(priv);
1072 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1073 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1077 /* Tell uCode which antennas are actually connected.
1078 * Before first association, we assume all antennas are connected.
1079 * Just after first association, iwl_chain_noise_calibration()
1080 * checks which antennas actually *are* connected. */
1081 if (priv->chain_noise_data.active_chains)
1082 active_chains = priv->chain_noise_data.active_chains;
1084 active_chains = priv->hw_params.valid_rx_ant;
1086 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1088 /* How many receivers should we use? */
1089 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1090 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1093 /* correct rx chain count according hw settings
1094 * and chain noise calibration
1096 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1097 if (valid_rx_cnt < active_rx_cnt)
1098 active_rx_cnt = valid_rx_cnt;
1100 if (valid_rx_cnt < idle_rx_cnt)
1101 idle_rx_cnt = valid_rx_cnt;
1103 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1104 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1106 /* copied from 'iwl_bg_request_scan()' */
1107 /* Force use of chains B and C (0x6) for Rx for 4965
1108 * Avoid A (0x1) because of its off-channel reception on A-band.
1109 * MIMO is not used here, but value is required */
1110 if (iwl_is_monitor_mode(priv) &&
1111 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1112 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
1113 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1114 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1115 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1116 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1119 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1121 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
1122 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1124 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1126 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
1127 priv->staging_rxon.rx_chain,
1128 active_rx_cnt, idle_rx_cnt);
1130 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1131 active_rx_cnt < idle_rx_cnt);
1133 EXPORT_SYMBOL(iwl_set_rxon_chain);
1136 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1137 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1138 * @channel: Any channel valid for the requested phymode
1140 * In addition to setting the staging RXON, priv->phymode is also set.
1142 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1143 * in the staging RXON flag structure based on the phymode
1145 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
1147 enum ieee80211_band band = ch->band;
1148 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1150 if (!iwl_get_channel_info(priv, band, channel)) {
1151 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
1156 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1157 (priv->band == band))
1160 priv->staging_rxon.channel = cpu_to_le16(channel);
1161 if (band == IEEE80211_BAND_5GHZ)
1162 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1164 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1168 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
1172 EXPORT_SYMBOL(iwl_set_rxon_channel);
1174 void iwl_set_flags_for_band(struct iwl_priv *priv,
1175 enum ieee80211_band band)
1177 if (band == IEEE80211_BAND_5GHZ) {
1178 priv->staging_rxon.flags &=
1179 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1180 | RXON_FLG_CCK_MSK);
1181 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1183 /* Copied from iwl_post_associate() */
1184 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1185 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1187 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1189 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1190 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1192 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1193 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1194 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1199 * initialize rxon structure with default values from eeprom
1201 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1203 const struct iwl_channel_info *ch_info;
1205 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1208 case NL80211_IFTYPE_AP:
1209 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1212 case NL80211_IFTYPE_STATION:
1213 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1214 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1217 case NL80211_IFTYPE_ADHOC:
1218 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1219 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1220 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1221 RXON_FILTER_ACCEPT_GRP_MSK;
1225 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1230 /* TODO: Figure out when short_preamble would be set and cache from
1232 if (!hw_to_local(priv->hw)->short_preamble)
1233 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1235 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1238 ch_info = iwl_get_channel_info(priv, priv->band,
1239 le16_to_cpu(priv->active_rxon.channel));
1242 ch_info = &priv->channel_info[0];
1245 * in some case A channels are all non IBSS
1246 * in this case force B/G channel
1248 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1249 !(is_channel_ibss(ch_info)))
1250 ch_info = &priv->channel_info[0];
1252 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1253 priv->band = ch_info->band;
1255 iwl_set_flags_for_band(priv, priv->band);
1257 priv->staging_rxon.ofdm_basic_rates =
1258 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1259 priv->staging_rxon.cck_basic_rates =
1260 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1262 /* clear both MIX and PURE40 mode flag */
1263 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1264 RXON_FLG_CHANNEL_MODE_PURE_40);
1265 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1266 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1267 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1268 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1269 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1271 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1273 static void iwl_set_rate(struct iwl_priv *priv)
1275 const struct ieee80211_supported_band *hw = NULL;
1276 struct ieee80211_rate *rate;
1279 hw = iwl_get_hw_mode(priv, priv->band);
1281 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1285 priv->active_rate = 0;
1286 priv->active_rate_basic = 0;
1288 for (i = 0; i < hw->n_bitrates; i++) {
1289 rate = &(hw->bitrates[i]);
1290 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
1291 priv->active_rate |= (1 << rate->hw_value);
1294 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
1295 priv->active_rate, priv->active_rate_basic);
1298 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1299 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1302 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1303 priv->staging_rxon.cck_basic_rates =
1304 ((priv->active_rate_basic &
1305 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1307 priv->staging_rxon.cck_basic_rates =
1308 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1310 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1311 priv->staging_rxon.ofdm_basic_rates =
1312 ((priv->active_rate_basic &
1313 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1314 IWL_FIRST_OFDM_RATE) & 0xFF;
1316 priv->staging_rxon.ofdm_basic_rates =
1317 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1320 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1322 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1323 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1324 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1326 if (priv->switch_rxon.switch_in_progress) {
1327 if (!le32_to_cpu(csa->status) &&
1328 (csa->channel == priv->switch_rxon.channel)) {
1329 rxon->channel = csa->channel;
1330 priv->staging_rxon.channel = csa->channel;
1331 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1332 le16_to_cpu(csa->channel));
1334 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1335 le16_to_cpu(csa->channel));
1337 priv->switch_rxon.switch_in_progress = false;
1340 EXPORT_SYMBOL(iwl_rx_csa);
1342 #ifdef CONFIG_IWLWIFI_DEBUG
1343 void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1345 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1347 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1348 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1349 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1350 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1351 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1352 le32_to_cpu(rxon->filter_flags));
1353 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1354 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1355 rxon->ofdm_basic_rates);
1356 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1357 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1358 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1359 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1361 EXPORT_SYMBOL(iwl_print_rx_config_cmd);
1364 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1366 void iwl_irq_handle_error(struct iwl_priv *priv)
1368 /* Set the FW error flag -- cleared on iwl_down */
1369 set_bit(STATUS_FW_ERROR, &priv->status);
1371 /* Cancel currently queued command. */
1372 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1374 priv->cfg->ops->lib->dump_nic_error_log(priv);
1375 if (priv->cfg->ops->lib->dump_csr)
1376 priv->cfg->ops->lib->dump_csr(priv);
1377 if (priv->cfg->ops->lib->dump_fh)
1378 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
1379 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
1380 #ifdef CONFIG_IWLWIFI_DEBUG
1381 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
1382 iwl_print_rx_config_cmd(priv);
1385 wake_up_interruptible(&priv->wait_command_queue);
1387 /* Keep the restart process from trying to send host
1388 * commands by clearing the INIT status bit */
1389 clear_bit(STATUS_READY, &priv->status);
1391 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1392 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1393 "Restarting adapter due to uCode error.\n");
1395 if (priv->cfg->mod_params->restart_fw)
1396 queue_work(priv->workqueue, &priv->restart);
1399 EXPORT_SYMBOL(iwl_irq_handle_error);
1401 int iwl_apm_stop_master(struct iwl_priv *priv)
1405 /* stop device's busmaster DMA activity */
1406 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1408 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
1409 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1411 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
1413 IWL_DEBUG_INFO(priv, "stop master\n");
1417 EXPORT_SYMBOL(iwl_apm_stop_master);
1419 void iwl_apm_stop(struct iwl_priv *priv)
1421 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1423 /* Stop device's DMA activity */
1424 iwl_apm_stop_master(priv);
1426 /* Reset the entire device */
1427 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1432 * Clear "initialization complete" bit to move adapter from
1433 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1435 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1437 EXPORT_SYMBOL(iwl_apm_stop);
1441 * Start up NIC's basic functionality after it has been reset
1442 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1443 * NOTE: This does not load uCode nor start the embedded processor
1445 int iwl_apm_init(struct iwl_priv *priv)
1450 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1453 * Use "set_bit" below rather than "write", to preserve any hardware
1454 * bits already set by default after reset.
1457 /* Disable L0S exit timer (platform NMI Work/Around) */
1458 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1459 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1462 * Disable L0s without affecting L1;
1463 * don't wait for ICH L0s (ICH bug W/A)
1465 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1466 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1468 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1469 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1472 * Enable HAP INTA (interrupt from management bus) to
1473 * wake device's PCI Express link L1a -> L0s
1474 * NOTE: This is no-op for 3945 (non-existant bit)
1476 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1477 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1480 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1481 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1482 * If so (likely), disable L0S, so device moves directly L0->L1;
1483 * costs negligible amount of power savings.
1484 * If not (unlikely), enable L0S, so there is at least some
1485 * power savings, even without L1.
1487 if (priv->cfg->set_l0s) {
1488 lctl = iwl_pcie_link_ctl(priv);
1489 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1490 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1491 /* L1-ASPM enabled; disable(!) L0S */
1492 iwl_set_bit(priv, CSR_GIO_REG,
1493 CSR_GIO_REG_VAL_L0S_ENABLED);
1494 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1496 /* L1-ASPM disabled; enable(!) L0S */
1497 iwl_clear_bit(priv, CSR_GIO_REG,
1498 CSR_GIO_REG_VAL_L0S_ENABLED);
1499 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1503 /* Configure analog phase-lock-loop before activating to D0A */
1504 if (priv->cfg->pll_cfg_val)
1505 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1508 * Set "initialization complete" bit to move adapter from
1509 * D0U* --> D0A* (powered-up active) state.
1511 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1514 * Wait for clock stabilization; once stabilized, access to
1515 * device-internal resources is supported, e.g. iwl_write_prph()
1516 * and accesses to uCode SRAM.
1518 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1519 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1520 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1522 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1527 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1528 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1529 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1530 * and don't need BSM to restore data after power-saving sleep.
1532 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1533 * do not disable clocks. This preserves any hardware bits already
1534 * set by default in "CLK_CTRL_REG" after reset.
1536 if (priv->cfg->use_bsm)
1537 iwl_write_prph(priv, APMG_CLK_EN_REG,
1538 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1540 iwl_write_prph(priv, APMG_CLK_EN_REG,
1541 APMG_CLK_VAL_DMA_CLK_RQT);
1544 /* Disable L1-Active */
1545 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1546 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1551 EXPORT_SYMBOL(iwl_apm_init);
1555 void iwl_configure_filter(struct ieee80211_hw *hw,
1556 unsigned int changed_flags,
1557 unsigned int *total_flags,
1560 struct iwl_priv *priv = hw->priv;
1561 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1563 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1564 changed_flags, *total_flags);
1566 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1567 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1568 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1570 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1572 if (changed_flags & FIF_ALLMULTI) {
1573 if (*total_flags & FIF_ALLMULTI)
1574 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1576 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1578 if (changed_flags & FIF_CONTROL) {
1579 if (*total_flags & FIF_CONTROL)
1580 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1582 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1584 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1585 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1586 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1588 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1591 /* We avoid iwl_commit_rxon here to commit the new filter flags
1592 * since mac80211 will call ieee80211_hw_config immediately.
1593 * (mc_list is not supported at this time). Otherwise, we need to
1594 * queue a background iwl_commit_rxon work.
1597 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1598 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1600 EXPORT_SYMBOL(iwl_configure_filter);
1602 int iwl_set_hw_params(struct iwl_priv *priv)
1604 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1605 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1606 if (priv->cfg->mod_params->amsdu_size_8K)
1607 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
1609 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
1611 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1613 if (priv->cfg->mod_params->disable_11n)
1614 priv->cfg->sku &= ~IWL_SKU_N;
1616 /* Device-specific setup */
1617 return priv->cfg->ops->lib->set_hw_params(priv);
1619 EXPORT_SYMBOL(iwl_set_hw_params);
1621 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1624 s8 prev_tx_power = priv->tx_power_user_lmt;
1626 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
1627 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1629 IWL_TX_POWER_TARGET_POWER_MIN);
1633 if (tx_power > priv->tx_power_device_lmt) {
1635 "Requested user TXPOWER %d above upper limit %d.\n",
1636 tx_power, priv->tx_power_device_lmt);
1640 if (priv->tx_power_user_lmt != tx_power)
1643 /* if nic is not up don't send command */
1644 if (iwl_is_ready_rf(priv)) {
1645 priv->tx_power_user_lmt = tx_power;
1646 if (force && priv->cfg->ops->lib->send_tx_power)
1647 ret = priv->cfg->ops->lib->send_tx_power(priv);
1648 else if (!priv->cfg->ops->lib->send_tx_power)
1651 * if fail to set tx_power, restore the orig. tx power
1654 priv->tx_power_user_lmt = prev_tx_power;
1658 * Even this is an async host command, the command
1659 * will always report success from uCode
1660 * So once driver can placing the command into the queue
1661 * successfully, driver can use priv->tx_power_user_lmt
1662 * to reflect the current tx power
1666 EXPORT_SYMBOL(iwl_set_tx_power);
1668 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1670 /* Free dram table */
1671 void iwl_free_isr_ict(struct iwl_priv *priv)
1673 if (priv->ict_tbl_vir) {
1674 dma_free_coherent(&priv->pci_dev->dev,
1675 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
1676 priv->ict_tbl_vir, priv->ict_tbl_dma);
1677 priv->ict_tbl_vir = NULL;
1680 EXPORT_SYMBOL(iwl_free_isr_ict);
1683 /* allocate dram shared table it is a PAGE_SIZE aligned
1684 * also reset all data related to ICT table interrupt.
1686 int iwl_alloc_isr_ict(struct iwl_priv *priv)
1689 if (priv->cfg->use_isr_legacy)
1691 /* allocate shrared data table */
1692 priv->ict_tbl_vir = dma_alloc_coherent(&priv->pci_dev->dev,
1693 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
1694 &priv->ict_tbl_dma, GFP_KERNEL);
1695 if (!priv->ict_tbl_vir)
1698 /* align table to PAGE_SIZE boundry */
1699 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1701 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1702 (unsigned long long)priv->ict_tbl_dma,
1703 (unsigned long long)priv->aligned_ict_tbl_dma,
1704 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1706 priv->ict_tbl = priv->ict_tbl_vir +
1707 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1709 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1710 priv->ict_tbl, priv->ict_tbl_vir,
1711 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1713 /* reset table and index to all 0 */
1714 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1715 priv->ict_index = 0;
1717 /* add periodic RX interrupt */
1718 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
1721 EXPORT_SYMBOL(iwl_alloc_isr_ict);
1723 /* Device is going up inform it about using ICT interrupt table,
1724 * also we need to tell the driver to start using ICT interrupt.
1726 int iwl_reset_ict(struct iwl_priv *priv)
1729 unsigned long flags;
1731 if (!priv->ict_tbl_vir)
1734 spin_lock_irqsave(&priv->lock, flags);
1735 iwl_disable_interrupts(priv);
1737 memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
1739 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1741 val |= CSR_DRAM_INT_TBL_ENABLE;
1742 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1744 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1745 "aligned dma address %Lx\n",
1746 val, (unsigned long long)priv->aligned_ict_tbl_dma);
1748 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1749 priv->use_ict = true;
1750 priv->ict_index = 0;
1751 iwl_write32(priv, CSR_INT, priv->inta_mask);
1752 iwl_enable_interrupts(priv);
1753 spin_unlock_irqrestore(&priv->lock, flags);
1757 EXPORT_SYMBOL(iwl_reset_ict);
1759 /* Device is going down disable ict interrupt usage */
1760 void iwl_disable_ict(struct iwl_priv *priv)
1762 unsigned long flags;
1764 spin_lock_irqsave(&priv->lock, flags);
1765 priv->use_ict = false;
1766 spin_unlock_irqrestore(&priv->lock, flags);
1768 EXPORT_SYMBOL(iwl_disable_ict);
1770 /* interrupt handler using ict table, with this interrupt driver will
1771 * stop using INTA register to get device's interrupt, reading this register
1772 * is expensive, device will write interrupts in ICT dram table, increment
1773 * index then will fire interrupt to driver, driver will OR all ICT table
1774 * entries from current index up to table entry with 0 value. the result is
1775 * the interrupt we need to service, driver will set the entries back to 0 and
1778 irqreturn_t iwl_isr_ict(int irq, void *data)
1780 struct iwl_priv *priv = data;
1781 u32 inta, inta_mask;
1787 /* dram interrupt table not set yet,
1788 * use legacy interrupt.
1791 return iwl_isr(irq, data);
1793 spin_lock(&priv->lock);
1795 /* Disable (but don't clear!) interrupts here to avoid
1796 * back-to-back ISRs and sporadic interrupts from our NIC.
1797 * If we have something to service, the tasklet will re-enable ints.
1798 * If we *don't* have something, we'll re-enable before leaving here.
1800 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1801 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1804 /* Ignore interrupt if there's nothing in NIC to service.
1805 * This may be due to IRQ shared with another device,
1806 * or due to sporadic interrupts thrown from our NIC. */
1807 if (!priv->ict_tbl[priv->ict_index]) {
1808 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1812 /* read all entries that not 0 start with ict_index */
1813 while (priv->ict_tbl[priv->ict_index]) {
1815 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
1816 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1818 le32_to_cpu(priv->ict_tbl[priv->ict_index]));
1819 priv->ict_tbl[priv->ict_index] = 0;
1820 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1825 /* We should not get this value, just ignore it. */
1826 if (val == 0xffffffff)
1830 * this is a w/a for a h/w bug. the h/w bug may cause the Rx bit
1831 * (bit 15 before shifting it to 31) to clear when using interrupt
1832 * coalescing. fortunately, bits 18 and 19 stay set when this happens
1833 * so we use them to decide on the real state of the Rx bit.
1834 * In order words, bit 15 is set if bit 18 or bit 19 are set.
1839 inta = (0xff & val) | ((0xff00 & val) << 16);
1840 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1841 inta, inta_mask, val);
1843 inta &= priv->inta_mask;
1846 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1848 tasklet_schedule(&priv->irq_tasklet);
1849 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1850 /* Allow interrupt if was disabled by this handler and
1851 * no tasklet was schedules, We should not enable interrupt,
1852 * tasklet will enable it.
1854 iwl_enable_interrupts(priv);
1857 spin_unlock(&priv->lock);
1861 /* re-enable interrupts here since we don't have anything to service.
1862 * only Re-enable if disabled by irq.
1864 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1865 iwl_enable_interrupts(priv);
1867 spin_unlock(&priv->lock);
1870 EXPORT_SYMBOL(iwl_isr_ict);
1873 static irqreturn_t iwl_isr(int irq, void *data)
1875 struct iwl_priv *priv = data;
1876 u32 inta, inta_mask;
1877 #ifdef CONFIG_IWLWIFI_DEBUG
1883 spin_lock(&priv->lock);
1885 /* Disable (but don't clear!) interrupts here to avoid
1886 * back-to-back ISRs and sporadic interrupts from our NIC.
1887 * If we have something to service, the tasklet will re-enable ints.
1888 * If we *don't* have something, we'll re-enable before leaving here. */
1889 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1890 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1892 /* Discover which interrupts are active/pending */
1893 inta = iwl_read32(priv, CSR_INT);
1895 /* Ignore interrupt if there's nothing in NIC to service.
1896 * This may be due to IRQ shared with another device,
1897 * or due to sporadic interrupts thrown from our NIC. */
1899 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1903 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1904 /* Hardware disappeared. It might have already raised
1906 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1910 #ifdef CONFIG_IWLWIFI_DEBUG
1911 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1912 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1913 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1914 "fh 0x%08x\n", inta, inta_mask, inta_fh);
1919 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1921 tasklet_schedule(&priv->irq_tasklet);
1922 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1923 iwl_enable_interrupts(priv);
1926 spin_unlock(&priv->lock);
1930 /* re-enable interrupts here since we don't have anything to service. */
1931 /* only Re-enable if diabled by irq and no schedules tasklet. */
1932 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1933 iwl_enable_interrupts(priv);
1935 spin_unlock(&priv->lock);
1939 irqreturn_t iwl_isr_legacy(int irq, void *data)
1941 struct iwl_priv *priv = data;
1942 u32 inta, inta_mask;
1947 spin_lock(&priv->lock);
1949 /* Disable (but don't clear!) interrupts here to avoid
1950 * back-to-back ISRs and sporadic interrupts from our NIC.
1951 * If we have something to service, the tasklet will re-enable ints.
1952 * If we *don't* have something, we'll re-enable before leaving here. */
1953 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1954 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1956 /* Discover which interrupts are active/pending */
1957 inta = iwl_read32(priv, CSR_INT);
1958 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1960 /* Ignore interrupt if there's nothing in NIC to service.
1961 * This may be due to IRQ shared with another device,
1962 * or due to sporadic interrupts thrown from our NIC. */
1963 if (!inta && !inta_fh) {
1964 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1968 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1969 /* Hardware disappeared. It might have already raised
1971 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1975 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1976 inta, inta_mask, inta_fh);
1978 inta &= ~CSR_INT_BIT_SCD;
1980 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1981 if (likely(inta || inta_fh))
1982 tasklet_schedule(&priv->irq_tasklet);
1985 spin_unlock(&priv->lock);
1989 /* re-enable interrupts here since we don't have anything to service. */
1990 /* only Re-enable if diabled by irq */
1991 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1992 iwl_enable_interrupts(priv);
1993 spin_unlock(&priv->lock);
1996 EXPORT_SYMBOL(iwl_isr_legacy);
1998 int iwl_send_bt_config(struct iwl_priv *priv)
2000 struct iwl_bt_cmd bt_cmd = {
2001 .lead_time = BT_LEAD_TIME_DEF,
2002 .max_kill = BT_MAX_KILL_DEF,
2007 if (!bt_coex_active)
2008 bt_cmd.flags = BT_COEX_DISABLE;
2010 bt_cmd.flags = BT_COEX_ENABLE;
2012 IWL_DEBUG_INFO(priv, "BT coex %s\n",
2013 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
2015 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
2016 sizeof(struct iwl_bt_cmd), &bt_cmd);
2018 EXPORT_SYMBOL(iwl_send_bt_config);
2020 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
2022 struct iwl_statistics_cmd statistics_cmd = {
2023 .configuration_flags =
2024 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
2027 if (flags & CMD_ASYNC)
2028 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
2029 sizeof(struct iwl_statistics_cmd),
2030 &statistics_cmd, NULL);
2032 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
2033 sizeof(struct iwl_statistics_cmd),
2036 EXPORT_SYMBOL(iwl_send_statistics_request);
2039 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
2040 * using sample data 100 bytes apart. If these sample points are good,
2041 * it's a pretty good bet that everything between them is good, too.
2043 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2050 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2052 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2053 /* read data comes through single port, auto-incr addr */
2054 /* NOTE: Use the debugless read so we don't flood kernel log
2055 * if IWL_DL_IO is set */
2056 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2057 i + IWL49_RTC_INST_LOWER_BOUND);
2058 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2059 if (val != le32_to_cpu(*image)) {
2071 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
2072 * looking at all data.
2074 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
2082 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2084 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2085 IWL49_RTC_INST_LOWER_BOUND);
2088 for (; len > 0; len -= sizeof(u32), image++) {
2089 /* read data comes through single port, auto-incr addr */
2090 /* NOTE: Use the debugless read so we don't flood kernel log
2091 * if IWL_DL_IO is set */
2092 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2093 if (val != le32_to_cpu(*image)) {
2094 IWL_ERR(priv, "uCode INST section is invalid at "
2095 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2096 save_len - len, val, le32_to_cpu(*image));
2105 IWL_DEBUG_INFO(priv,
2106 "ucode image in INSTRUCTION memory is good\n");
2112 * iwl_verify_ucode - determine which instruction image is in SRAM,
2113 * and verify its contents
2115 int iwl_verify_ucode(struct iwl_priv *priv)
2122 image = (__le32 *)priv->ucode_boot.v_addr;
2123 len = priv->ucode_boot.len;
2124 ret = iwlcore_verify_inst_sparse(priv, image, len);
2126 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2130 /* Try initialize */
2131 image = (__le32 *)priv->ucode_init.v_addr;
2132 len = priv->ucode_init.len;
2133 ret = iwlcore_verify_inst_sparse(priv, image, len);
2135 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2139 /* Try runtime/protocol */
2140 image = (__le32 *)priv->ucode_code.v_addr;
2141 len = priv->ucode_code.len;
2142 ret = iwlcore_verify_inst_sparse(priv, image, len);
2144 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2148 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2150 /* Since nothing seems to match, show first several data entries in
2151 * instruction SRAM, so maybe visual inspection will give a clue.
2152 * Selection of bootstrap image (vs. other images) is arbitrary. */
2153 image = (__le32 *)priv->ucode_boot.v_addr;
2154 len = priv->ucode_boot.len;
2155 ret = iwl_verify_inst_full(priv, image, len);
2159 EXPORT_SYMBOL(iwl_verify_ucode);
2162 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2164 struct iwl_ct_kill_config cmd;
2165 struct iwl_ct_kill_throttling_config adv_cmd;
2166 unsigned long flags;
2169 spin_lock_irqsave(&priv->lock, flags);
2170 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2171 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2172 spin_unlock_irqrestore(&priv->lock, flags);
2173 priv->thermal_throttle.ct_kill_toggle = false;
2175 if (priv->cfg->support_ct_kill_exit) {
2176 adv_cmd.critical_temperature_enter =
2177 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2178 adv_cmd.critical_temperature_exit =
2179 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2181 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2182 sizeof(adv_cmd), &adv_cmd);
2184 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2186 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2188 "critical temperature enter is %d,"
2190 priv->hw_params.ct_kill_threshold,
2191 priv->hw_params.ct_kill_exit_threshold);
2193 cmd.critical_temperature_R =
2194 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2196 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2199 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2201 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2203 "critical temperature is %d\n",
2204 priv->hw_params.ct_kill_threshold);
2207 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
2213 * Use: Sets the device's internal card state to enable, disable, or halt
2215 * When in the 'enable' state the card operates as normal.
2216 * When in the 'disable' state, the card enters into a low power mode.
2217 * When in the 'halt' state, the card is shut down and must be fully
2218 * restarted to come back on.
2220 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
2222 struct iwl_host_cmd cmd = {
2223 .id = REPLY_CARD_STATE_CMD,
2229 return iwl_send_cmd(priv, &cmd);
2232 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2233 struct iwl_rx_mem_buffer *rxb)
2235 #ifdef CONFIG_IWLWIFI_DEBUG
2236 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2237 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2238 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2239 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2242 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2244 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2245 struct iwl_rx_mem_buffer *rxb)
2247 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2248 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
2249 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2250 "notification for %s:\n", len,
2251 get_cmd_string(pkt->hdr.cmd));
2252 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
2254 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2256 void iwl_rx_reply_error(struct iwl_priv *priv,
2257 struct iwl_rx_mem_buffer *rxb)
2259 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2261 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2262 "seq 0x%04X ser 0x%08X\n",
2263 le32_to_cpu(pkt->u.err_resp.error_type),
2264 get_cmd_string(pkt->u.err_resp.cmd_id),
2265 pkt->u.err_resp.cmd_id,
2266 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2267 le32_to_cpu(pkt->u.err_resp.error_info));
2269 EXPORT_SYMBOL(iwl_rx_reply_error);
2271 void iwl_clear_isr_stats(struct iwl_priv *priv)
2273 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2276 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2277 const struct ieee80211_tx_queue_params *params)
2279 struct iwl_priv *priv = hw->priv;
2280 unsigned long flags;
2283 IWL_DEBUG_MAC80211(priv, "enter\n");
2285 if (!iwl_is_ready_rf(priv)) {
2286 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2290 if (queue >= AC_NUM) {
2291 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2295 q = AC_NUM - 1 - queue;
2297 spin_lock_irqsave(&priv->lock, flags);
2299 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2300 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2301 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2302 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2303 cpu_to_le16((params->txop * 32));
2305 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2306 priv->qos_data.qos_active = 1;
2308 if (priv->iw_mode == NL80211_IFTYPE_AP)
2309 iwl_activate_qos(priv, 1);
2310 else if (priv->assoc_id && iwl_is_associated(priv))
2311 iwl_activate_qos(priv, 0);
2313 spin_unlock_irqrestore(&priv->lock, flags);
2315 IWL_DEBUG_MAC80211(priv, "leave\n");
2318 EXPORT_SYMBOL(iwl_mac_conf_tx);
2320 static void iwl_ht_conf(struct iwl_priv *priv,
2321 struct ieee80211_bss_conf *bss_conf)
2323 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2324 struct ieee80211_sta *sta;
2326 IWL_DEBUG_MAC80211(priv, "enter: \n");
2328 if (!ht_conf->is_ht)
2331 ht_conf->ht_protection =
2332 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2333 ht_conf->non_GF_STA_present =
2334 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2336 ht_conf->single_chain_sufficient = false;
2338 switch (priv->iw_mode) {
2339 case NL80211_IFTYPE_STATION:
2341 sta = ieee80211_find_sta(priv->vif, priv->bssid);
2343 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
2346 maxstreams = (ht_cap->mcs.tx_params &
2347 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
2348 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2351 if ((ht_cap->mcs.rx_mask[1] == 0) &&
2352 (ht_cap->mcs.rx_mask[2] == 0))
2353 ht_conf->single_chain_sufficient = true;
2354 if (maxstreams <= 1)
2355 ht_conf->single_chain_sufficient = true;
2358 * If at all, this can only happen through a race
2359 * when the AP disconnects us while we're still
2360 * setting up the connection, in that case mac80211
2361 * will soon tell us about that.
2363 ht_conf->single_chain_sufficient = true;
2367 case NL80211_IFTYPE_ADHOC:
2368 ht_conf->single_chain_sufficient = true;
2374 IWL_DEBUG_MAC80211(priv, "leave\n");
2377 static inline void iwl_set_no_assoc(struct iwl_priv *priv)
2380 iwl_led_disassociate(priv);
2382 * inform the ucode that there is no longer an
2383 * association and that no more packets should be
2386 priv->staging_rxon.filter_flags &=
2387 ~RXON_FILTER_ASSOC_MSK;
2388 priv->staging_rxon.assoc_id = 0;
2389 iwlcore_commit_rxon(priv);
2392 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2393 void iwl_bss_info_changed(struct ieee80211_hw *hw,
2394 struct ieee80211_vif *vif,
2395 struct ieee80211_bss_conf *bss_conf,
2398 struct iwl_priv *priv = hw->priv;
2401 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2403 if (!iwl_is_alive(priv))
2406 mutex_lock(&priv->mutex);
2408 if (changes & BSS_CHANGED_BEACON &&
2409 priv->iw_mode == NL80211_IFTYPE_AP) {
2410 dev_kfree_skb(priv->ibss_beacon);
2411 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2414 if (changes & BSS_CHANGED_BEACON_INT) {
2415 priv->beacon_int = bss_conf->beacon_int;
2416 /* TODO: in AP mode, do something to make this take effect */
2419 if (changes & BSS_CHANGED_BSSID) {
2420 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2423 * If there is currently a HW scan going on in the
2424 * background then we need to cancel it else the RXON
2425 * below/in post_associate will fail.
2427 if (iwl_scan_cancel_timeout(priv, 100)) {
2428 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2429 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2430 mutex_unlock(&priv->mutex);
2434 /* mac80211 only sets assoc when in STATION mode */
2435 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2437 memcpy(priv->staging_rxon.bssid_addr,
2438 bss_conf->bssid, ETH_ALEN);
2440 /* currently needed in a few places */
2441 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2443 priv->staging_rxon.filter_flags &=
2444 ~RXON_FILTER_ASSOC_MSK;
2450 * This needs to be after setting the BSSID in case
2451 * mac80211 decides to do both changes at once because
2452 * it will invoke post_associate.
2454 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2455 changes & BSS_CHANGED_BEACON) {
2456 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2459 iwl_mac_beacon_update(hw, beacon);
2462 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2463 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2464 bss_conf->use_short_preamble);
2465 if (bss_conf->use_short_preamble)
2466 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2468 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2471 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2472 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2473 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2474 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2476 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2479 if (changes & BSS_CHANGED_BASIC_RATES) {
2480 /* XXX use this information
2482 * To do that, remove code from iwl_set_rate() and put something
2486 priv->staging_rxon.ofdm_basic_rates =
2487 bss_conf->basic_rates;
2489 priv->staging_rxon.ofdm_basic_rates =
2490 bss_conf->basic_rates >> 4;
2491 priv->staging_rxon.cck_basic_rates =
2492 bss_conf->basic_rates & 0xF;
2496 if (changes & BSS_CHANGED_HT) {
2497 iwl_ht_conf(priv, bss_conf);
2499 if (priv->cfg->ops->hcmd->set_rxon_chain)
2500 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2503 if (changes & BSS_CHANGED_ASSOC) {
2504 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2505 if (bss_conf->assoc) {
2506 priv->assoc_id = bss_conf->aid;
2507 priv->beacon_int = bss_conf->beacon_int;
2508 priv->timestamp = bss_conf->timestamp;
2509 priv->assoc_capability = bss_conf->assoc_capability;
2511 iwl_led_associate(priv);
2514 * We have just associated, don't start scan too early
2515 * leave time for EAPOL exchange to complete.
2517 * XXX: do this in mac80211
2519 priv->next_scan_jiffies = jiffies +
2520 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2521 if (!iwl_is_rfkill(priv))
2522 priv->cfg->ops->lib->post_associate(priv);
2524 iwl_set_no_assoc(priv);
2527 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2528 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2530 ret = iwl_send_rxon_assoc(priv);
2532 /* Sync active_rxon with latest change. */
2533 memcpy((void *)&priv->active_rxon,
2534 &priv->staging_rxon,
2535 sizeof(struct iwl_rxon_cmd));
2539 if (changes & BSS_CHANGED_BEACON_ENABLED) {
2540 if (vif->bss_conf.enable_beacon) {
2541 memcpy(priv->staging_rxon.bssid_addr,
2542 bss_conf->bssid, ETH_ALEN);
2543 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2544 iwlcore_config_ap(priv);
2546 iwl_set_no_assoc(priv);
2549 mutex_unlock(&priv->mutex);
2551 IWL_DEBUG_MAC80211(priv, "leave\n");
2553 EXPORT_SYMBOL(iwl_bss_info_changed);
2555 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2557 struct iwl_priv *priv = hw->priv;
2558 unsigned long flags;
2561 IWL_DEBUG_MAC80211(priv, "enter\n");
2563 if (!iwl_is_ready_rf(priv)) {
2564 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2568 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2569 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2573 spin_lock_irqsave(&priv->lock, flags);
2575 if (priv->ibss_beacon)
2576 dev_kfree_skb(priv->ibss_beacon);
2578 priv->ibss_beacon = skb;
2581 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2582 priv->timestamp = le64_to_cpu(timestamp);
2584 IWL_DEBUG_MAC80211(priv, "leave\n");
2585 spin_unlock_irqrestore(&priv->lock, flags);
2587 iwl_reset_qos(priv);
2589 priv->cfg->ops->lib->post_associate(priv);
2594 EXPORT_SYMBOL(iwl_mac_beacon_update);
2596 int iwl_set_mode(struct iwl_priv *priv, int mode)
2598 if (mode == NL80211_IFTYPE_ADHOC) {
2599 const struct iwl_channel_info *ch_info;
2601 ch_info = iwl_get_channel_info(priv,
2603 le16_to_cpu(priv->staging_rxon.channel));
2605 if (!ch_info || !is_channel_ibss(ch_info)) {
2606 IWL_ERR(priv, "channel %d not IBSS channel\n",
2607 le16_to_cpu(priv->staging_rxon.channel));
2612 iwl_connection_init_rx_config(priv, mode);
2614 if (priv->cfg->ops->hcmd->set_rxon_chain)
2615 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2617 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2619 iwl_clear_stations_table(priv);
2621 /* dont commit rxon if rf-kill is on*/
2622 if (!iwl_is_ready_rf(priv))
2625 iwlcore_commit_rxon(priv);
2629 EXPORT_SYMBOL(iwl_set_mode);
2631 int iwl_mac_add_interface(struct ieee80211_hw *hw,
2632 struct ieee80211_vif *vif)
2634 struct iwl_priv *priv = hw->priv;
2637 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
2639 mutex_lock(&priv->mutex);
2642 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2648 priv->iw_mode = vif->type;
2651 IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
2652 memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
2655 if (iwl_set_mode(priv, vif->type) == -EAGAIN)
2656 /* we are not ready, will run again when ready */
2657 set_bit(STATUS_MODE_PENDING, &priv->status);
2660 mutex_unlock(&priv->mutex);
2662 IWL_DEBUG_MAC80211(priv, "leave\n");
2665 EXPORT_SYMBOL(iwl_mac_add_interface);
2667 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2668 struct ieee80211_vif *vif)
2670 struct iwl_priv *priv = hw->priv;
2672 IWL_DEBUG_MAC80211(priv, "enter\n");
2674 mutex_lock(&priv->mutex);
2676 if (iwl_is_ready_rf(priv)) {
2677 iwl_scan_cancel_timeout(priv, 100);
2678 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2679 iwlcore_commit_rxon(priv);
2681 if (priv->vif == vif) {
2683 memset(priv->bssid, 0, ETH_ALEN);
2685 mutex_unlock(&priv->mutex);
2687 IWL_DEBUG_MAC80211(priv, "leave\n");
2690 EXPORT_SYMBOL(iwl_mac_remove_interface);
2693 * iwl_mac_config - mac80211 config callback
2695 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2696 * be set inappropriately and the driver currently sets the hardware up to
2697 * use it whenever needed.
2699 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2701 struct iwl_priv *priv = hw->priv;
2702 const struct iwl_channel_info *ch_info;
2703 struct ieee80211_conf *conf = &hw->conf;
2704 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2705 unsigned long flags = 0;
2708 int scan_active = 0;
2710 mutex_lock(&priv->mutex);
2712 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2713 conf->channel->hw_value, changed);
2715 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2716 test_bit(STATUS_SCANNING, &priv->status))) {
2718 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2721 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2722 IEEE80211_CONF_CHANGE_CHANNEL)) {
2723 /* mac80211 uses static for non-HT which is what we want */
2724 priv->current_ht_config.smps = conf->smps_mode;
2727 * Recalculate chain counts.
2729 * If monitor mode is enabled then mac80211 will
2730 * set up the SM PS mode to OFF if an HT channel is
2733 if (priv->cfg->ops->hcmd->set_rxon_chain)
2734 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2737 /* during scanning mac80211 will delay channel setting until
2738 * scan finish with changed = 0
2740 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2744 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2745 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2746 if (!is_channel_valid(ch_info)) {
2747 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2752 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2753 !is_channel_ibss(ch_info)) {
2754 IWL_ERR(priv, "channel %d in band %d not "
2756 conf->channel->hw_value, conf->channel->band);
2761 spin_lock_irqsave(&priv->lock, flags);
2763 /* Configure HT40 channels */
2764 ht_conf->is_ht = conf_is_ht(conf);
2765 if (ht_conf->is_ht) {
2766 if (conf_is_ht40_minus(conf)) {
2767 ht_conf->extension_chan_offset =
2768 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2769 ht_conf->is_40mhz = true;
2770 } else if (conf_is_ht40_plus(conf)) {
2771 ht_conf->extension_chan_offset =
2772 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2773 ht_conf->is_40mhz = true;
2775 ht_conf->extension_chan_offset =
2776 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2777 ht_conf->is_40mhz = false;
2780 ht_conf->is_40mhz = false;
2781 /* Default to no protection. Protection mode will later be set
2782 * from BSS config in iwl_ht_conf */
2783 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
2785 /* if we are switching from ht to 2.4 clear flags
2786 * from any ht related info since 2.4 does not
2788 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2789 priv->staging_rxon.flags = 0;
2791 iwl_set_rxon_channel(priv, conf->channel);
2792 iwl_set_rxon_ht(priv, ht_conf);
2794 iwl_set_flags_for_band(priv, conf->channel->band);
2795 spin_unlock_irqrestore(&priv->lock, flags);
2796 if (iwl_is_associated(priv) &&
2797 (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2798 priv->cfg->ops->lib->set_channel_switch) {
2801 * at this point, staging_rxon has the
2802 * configuration for channel switch
2804 ret = priv->cfg->ops->lib->set_channel_switch(priv,
2807 iwl_print_rx_config_cmd(priv);
2810 priv->switch_rxon.switch_in_progress = false;
2813 /* The list of supported rates and rate mask can be different
2814 * for each band; since the band may have changed, reset
2815 * the rate mask to what mac80211 lists */
2819 if (changed & (IEEE80211_CONF_CHANGE_PS |
2820 IEEE80211_CONF_CHANGE_IDLE)) {
2821 ret = iwl_power_update_mode(priv, false);
2823 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
2826 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2827 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2828 priv->tx_power_user_lmt, conf->power_level);
2830 iwl_set_tx_power(priv, conf->power_level, false);
2833 if (!iwl_is_ready(priv)) {
2834 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2841 if (memcmp(&priv->active_rxon,
2842 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2843 iwlcore_commit_rxon(priv);
2845 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2849 IWL_DEBUG_MAC80211(priv, "leave\n");
2850 mutex_unlock(&priv->mutex);
2853 EXPORT_SYMBOL(iwl_mac_config);
2855 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2857 struct iwl_priv *priv = hw->priv;
2858 unsigned long flags;
2860 mutex_lock(&priv->mutex);
2861 IWL_DEBUG_MAC80211(priv, "enter\n");
2863 spin_lock_irqsave(&priv->lock, flags);
2864 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
2865 spin_unlock_irqrestore(&priv->lock, flags);
2867 iwl_reset_qos(priv);
2869 spin_lock_irqsave(&priv->lock, flags);
2871 priv->assoc_capability = 0;
2872 priv->assoc_station_added = 0;
2874 /* new association get rid of ibss beacon skb */
2875 if (priv->ibss_beacon)
2876 dev_kfree_skb(priv->ibss_beacon);
2878 priv->ibss_beacon = NULL;
2880 priv->beacon_int = priv->vif->bss_conf.beacon_int;
2881 priv->timestamp = 0;
2882 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2883 priv->beacon_int = 0;
2885 spin_unlock_irqrestore(&priv->lock, flags);
2887 if (!iwl_is_ready_rf(priv)) {
2888 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2889 mutex_unlock(&priv->mutex);
2893 /* we are restarting association process
2894 * clear RXON_FILTER_ASSOC_MSK bit
2896 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2897 iwl_scan_cancel_timeout(priv, 100);
2898 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2899 iwlcore_commit_rxon(priv);
2902 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2903 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2904 mutex_unlock(&priv->mutex);
2910 mutex_unlock(&priv->mutex);
2912 IWL_DEBUG_MAC80211(priv, "leave\n");
2914 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2916 int iwl_alloc_txq_mem(struct iwl_priv *priv)
2919 priv->txq = kzalloc(
2920 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2923 IWL_ERR(priv, "Not enough memory for txq \n");
2928 EXPORT_SYMBOL(iwl_alloc_txq_mem);
2930 void iwl_free_txq_mem(struct iwl_priv *priv)
2935 EXPORT_SYMBOL(iwl_free_txq_mem);
2937 int iwl_send_wimax_coex(struct iwl_priv *priv)
2939 struct iwl_wimax_coex_cmd uninitialized_var(coex_cmd);
2941 if (priv->cfg->support_wimax_coexist) {
2942 /* UnMask wake up src at associated sleep */
2943 coex_cmd.flags |= COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
2945 /* UnMask wake up src at unassociated sleep */
2946 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
2947 memcpy(coex_cmd.sta_prio, cu_priorities,
2948 sizeof(struct iwl_wimax_coex_event_entry) *
2949 COEX_NUM_OF_EVENTS);
2951 /* enabling the coexistence feature */
2952 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
2954 /* enabling the priorities tables */
2955 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
2957 /* coexistence is disabled */
2958 memset(&coex_cmd, 0, sizeof(coex_cmd));
2960 return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
2961 sizeof(coex_cmd), &coex_cmd);
2963 EXPORT_SYMBOL(iwl_send_wimax_coex);
2965 #ifdef CONFIG_IWLWIFI_DEBUGFS
2967 #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2969 void iwl_reset_traffic_log(struct iwl_priv *priv)
2971 priv->tx_traffic_idx = 0;
2972 priv->rx_traffic_idx = 0;
2973 if (priv->tx_traffic)
2974 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2975 if (priv->rx_traffic)
2976 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2979 int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2981 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2983 if (iwl_debug_level & IWL_DL_TX) {
2984 if (!priv->tx_traffic) {
2986 kzalloc(traffic_size, GFP_KERNEL);
2987 if (!priv->tx_traffic)
2991 if (iwl_debug_level & IWL_DL_RX) {
2992 if (!priv->rx_traffic) {
2994 kzalloc(traffic_size, GFP_KERNEL);
2995 if (!priv->rx_traffic)
2999 iwl_reset_traffic_log(priv);
3002 EXPORT_SYMBOL(iwl_alloc_traffic_mem);
3004 void iwl_free_traffic_mem(struct iwl_priv *priv)
3006 kfree(priv->tx_traffic);
3007 priv->tx_traffic = NULL;
3009 kfree(priv->rx_traffic);
3010 priv->rx_traffic = NULL;
3012 EXPORT_SYMBOL(iwl_free_traffic_mem);
3014 void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
3015 u16 length, struct ieee80211_hdr *header)
3020 if (likely(!(iwl_debug_level & IWL_DL_TX)))
3023 if (!priv->tx_traffic)
3026 fc = header->frame_control;
3027 if (ieee80211_is_data(fc)) {
3028 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3029 ? IWL_TRAFFIC_ENTRY_SIZE : length;
3030 memcpy((priv->tx_traffic +
3031 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3033 priv->tx_traffic_idx =
3034 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3037 EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
3039 void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
3040 u16 length, struct ieee80211_hdr *header)
3045 if (likely(!(iwl_debug_level & IWL_DL_RX)))
3048 if (!priv->rx_traffic)
3051 fc = header->frame_control;
3052 if (ieee80211_is_data(fc)) {
3053 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3054 ? IWL_TRAFFIC_ENTRY_SIZE : length;
3055 memcpy((priv->rx_traffic +
3056 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3058 priv->rx_traffic_idx =
3059 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3062 EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
3064 const char *get_mgmt_string(int cmd)
3067 IWL_CMD(MANAGEMENT_ASSOC_REQ);
3068 IWL_CMD(MANAGEMENT_ASSOC_RESP);
3069 IWL_CMD(MANAGEMENT_REASSOC_REQ);
3070 IWL_CMD(MANAGEMENT_REASSOC_RESP);
3071 IWL_CMD(MANAGEMENT_PROBE_REQ);
3072 IWL_CMD(MANAGEMENT_PROBE_RESP);
3073 IWL_CMD(MANAGEMENT_BEACON);
3074 IWL_CMD(MANAGEMENT_ATIM);
3075 IWL_CMD(MANAGEMENT_DISASSOC);
3076 IWL_CMD(MANAGEMENT_AUTH);
3077 IWL_CMD(MANAGEMENT_DEAUTH);
3078 IWL_CMD(MANAGEMENT_ACTION);
3085 const char *get_ctrl_string(int cmd)
3088 IWL_CMD(CONTROL_BACK_REQ);
3089 IWL_CMD(CONTROL_BACK);
3090 IWL_CMD(CONTROL_PSPOLL);
3091 IWL_CMD(CONTROL_RTS);
3092 IWL_CMD(CONTROL_CTS);
3093 IWL_CMD(CONTROL_ACK);
3094 IWL_CMD(CONTROL_CFEND);
3095 IWL_CMD(CONTROL_CFENDACK);
3102 void iwl_clear_traffic_stats(struct iwl_priv *priv)
3104 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
3105 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
3110 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
3111 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
3112 * Use debugFs to display the rx/rx_statistics
3113 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
3114 * information will be recorded, but DATA pkt still will be recorded
3115 * for the reason of iwl_led.c need to control the led blinking based on
3116 * number of tx and rx data.
3119 void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
3121 struct traffic_stats *stats;
3124 stats = &priv->tx_stats;
3126 stats = &priv->rx_stats;
3128 if (ieee80211_is_mgmt(fc)) {
3129 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3130 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
3131 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
3133 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
3134 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
3136 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
3137 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
3139 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
3140 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
3142 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
3143 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
3145 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
3146 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
3148 case cpu_to_le16(IEEE80211_STYPE_BEACON):
3149 stats->mgmt[MANAGEMENT_BEACON]++;
3151 case cpu_to_le16(IEEE80211_STYPE_ATIM):
3152 stats->mgmt[MANAGEMENT_ATIM]++;
3154 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
3155 stats->mgmt[MANAGEMENT_DISASSOC]++;
3157 case cpu_to_le16(IEEE80211_STYPE_AUTH):
3158 stats->mgmt[MANAGEMENT_AUTH]++;
3160 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
3161 stats->mgmt[MANAGEMENT_DEAUTH]++;
3163 case cpu_to_le16(IEEE80211_STYPE_ACTION):
3164 stats->mgmt[MANAGEMENT_ACTION]++;
3167 } else if (ieee80211_is_ctl(fc)) {
3168 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3169 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
3170 stats->ctrl[CONTROL_BACK_REQ]++;
3172 case cpu_to_le16(IEEE80211_STYPE_BACK):
3173 stats->ctrl[CONTROL_BACK]++;
3175 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
3176 stats->ctrl[CONTROL_PSPOLL]++;
3178 case cpu_to_le16(IEEE80211_STYPE_RTS):
3179 stats->ctrl[CONTROL_RTS]++;
3181 case cpu_to_le16(IEEE80211_STYPE_CTS):
3182 stats->ctrl[CONTROL_CTS]++;
3184 case cpu_to_le16(IEEE80211_STYPE_ACK):
3185 stats->ctrl[CONTROL_ACK]++;
3187 case cpu_to_le16(IEEE80211_STYPE_CFEND):
3188 stats->ctrl[CONTROL_CFEND]++;
3190 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
3191 stats->ctrl[CONTROL_CFENDACK]++;
3197 stats->data_bytes += len;
3199 iwl_leds_background(priv);
3201 EXPORT_SYMBOL(iwl_update_stats);
3204 const static char *get_csr_string(int cmd)
3207 IWL_CMD(CSR_HW_IF_CONFIG_REG);
3208 IWL_CMD(CSR_INT_COALESCING);
3210 IWL_CMD(CSR_INT_MASK);
3211 IWL_CMD(CSR_FH_INT_STATUS);
3212 IWL_CMD(CSR_GPIO_IN);
3214 IWL_CMD(CSR_GP_CNTRL);
3215 IWL_CMD(CSR_HW_REV);
3216 IWL_CMD(CSR_EEPROM_REG);
3217 IWL_CMD(CSR_EEPROM_GP);
3218 IWL_CMD(CSR_OTP_GP_REG);
3219 IWL_CMD(CSR_GIO_REG);
3220 IWL_CMD(CSR_GP_UCODE_REG);
3221 IWL_CMD(CSR_GP_DRIVER_REG);
3222 IWL_CMD(CSR_UCODE_DRV_GP1);
3223 IWL_CMD(CSR_UCODE_DRV_GP2);
3224 IWL_CMD(CSR_LED_REG);
3225 IWL_CMD(CSR_DRAM_INT_TBL_REG);
3226 IWL_CMD(CSR_GIO_CHICKEN_BITS);
3227 IWL_CMD(CSR_ANA_PLL_CFG);
3228 IWL_CMD(CSR_HW_REV_WA_REG);
3229 IWL_CMD(CSR_DBG_HPET_MEM_REG);
3236 void iwl_dump_csr(struct iwl_priv *priv)
3240 CSR_HW_IF_CONFIG_REG,
3258 CSR_DRAM_INT_TBL_REG,
3259 CSR_GIO_CHICKEN_BITS,
3262 CSR_DBG_HPET_MEM_REG
3264 IWL_ERR(priv, "CSR values:\n");
3265 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
3266 "CSR_INT_PERIODIC_REG)\n");
3267 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
3268 IWL_ERR(priv, " %25s: 0X%08x\n",
3269 get_csr_string(csr_tbl[i]),
3270 iwl_read32(priv, csr_tbl[i]));
3273 EXPORT_SYMBOL(iwl_dump_csr);
3275 const static char *get_fh_string(int cmd)
3278 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
3279 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
3280 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
3281 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
3282 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
3283 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
3284 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
3285 IWL_CMD(FH_TSSR_TX_STATUS_REG);
3286 IWL_CMD(FH_TSSR_TX_ERROR_REG);
3293 int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
3296 #ifdef CONFIG_IWLWIFI_DEBUG
3301 FH_RSCSR_CHNL0_STTS_WPTR_REG,
3302 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
3303 FH_RSCSR_CHNL0_WPTR,
3304 FH_MEM_RCSR_CHNL0_CONFIG_REG,
3305 FH_MEM_RSSR_SHARED_CTRL_REG,
3306 FH_MEM_RSSR_RX_STATUS_REG,
3307 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
3308 FH_TSSR_TX_STATUS_REG,
3309 FH_TSSR_TX_ERROR_REG
3311 #ifdef CONFIG_IWLWIFI_DEBUG
3313 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
3314 *buf = kmalloc(bufsz, GFP_KERNEL);
3317 pos += scnprintf(*buf + pos, bufsz - pos,
3318 "FH register values:\n");
3319 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
3320 pos += scnprintf(*buf + pos, bufsz - pos,
3322 get_fh_string(fh_tbl[i]),
3323 iwl_read_direct32(priv, fh_tbl[i]));
3328 IWL_ERR(priv, "FH register values:\n");
3329 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
3330 IWL_ERR(priv, " %34s: 0X%08x\n",
3331 get_fh_string(fh_tbl[i]),
3332 iwl_read_direct32(priv, fh_tbl[i]));
3336 EXPORT_SYMBOL(iwl_dump_fh);
3338 static void iwl_force_rf_reset(struct iwl_priv *priv)
3340 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3343 if (!iwl_is_associated(priv)) {
3344 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
3348 * There is no easy and better way to force reset the radio,
3349 * the only known method is switching channel which will force to
3350 * reset and tune the radio.
3351 * Use internal short scan (single channel) operation to should
3352 * achieve this objective.
3353 * Driver should reset the radio when number of consecutive missed
3354 * beacon, or any other uCode error condition detected.
3356 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
3357 iwl_internal_short_hw_scan(priv);
3362 int iwl_force_reset(struct iwl_priv *priv, int mode)
3364 struct iwl_force_reset *force_reset;
3366 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3369 if (mode >= IWL_MAX_FORCE_RESET) {
3370 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
3373 force_reset = &priv->force_reset[mode];
3374 force_reset->reset_request_count++;
3375 if (force_reset->last_force_reset_jiffies &&
3376 time_after(force_reset->last_force_reset_jiffies +
3377 force_reset->reset_duration, jiffies)) {
3378 IWL_DEBUG_INFO(priv, "force reset rejected\n");
3379 force_reset->reset_reject_count++;
3382 force_reset->reset_success_count++;
3383 force_reset->last_force_reset_jiffies = jiffies;
3384 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
3387 iwl_force_rf_reset(priv);
3390 IWL_ERR(priv, "On demand firmware reload\n");
3391 /* Set the FW error flag -- cleared on iwl_down */
3392 set_bit(STATUS_FW_ERROR, &priv->status);
3393 wake_up_interruptible(&priv->wait_command_queue);
3395 * Keep the restart process from trying to send host
3396 * commands by clearing the INIT status bit
3398 clear_bit(STATUS_READY, &priv->status);
3399 queue_work(priv->workqueue, &priv->restart);
3407 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3409 struct iwl_priv *priv = pci_get_drvdata(pdev);
3412 * This function is called when system goes into suspend state
3413 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3414 * first but since iwl_mac_stop() has no knowledge of who the caller is,
3415 * it will not call apm_ops.stop() to stop the DMA operation.
3416 * Calling apm_ops.stop here to make sure we stop the DMA.
3418 priv->cfg->ops->lib->apm_ops.stop(priv);
3420 pci_save_state(pdev);
3421 pci_disable_device(pdev);
3422 pci_set_power_state(pdev, PCI_D3hot);
3426 EXPORT_SYMBOL(iwl_pci_suspend);
3428 int iwl_pci_resume(struct pci_dev *pdev)
3430 struct iwl_priv *priv = pci_get_drvdata(pdev);
3433 pci_set_power_state(pdev, PCI_D0);
3434 ret = pci_enable_device(pdev);
3437 pci_restore_state(pdev);
3438 iwl_enable_interrupts(priv);
3442 EXPORT_SYMBOL(iwl_pci_resume);
3444 #endif /* CONFIG_PM */