drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <linux/firmware.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39 #include <net/mac80211.h>
  40
  41 #include "iwl-3945-core.h"
  42 #include "iwl-3945-fh.h"
  43 #include "iwl-3945-commands.h"
  44 #include "iwl-3945.h"
  45 #include "iwl-helpers.h"
  46 #include "iwl-3945-rs.h"
  47
  48 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  49         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  50                                     IWL_RATE_##r##M_IEEE,   \
  51                                     IWL_RATE_##ip##M_INDEX, \
  52                                     IWL_RATE_##in##M_INDEX, \
  53                                     IWL_RATE_##rp##M_INDEX, \
  54                                     IWL_RATE_##rn##M_INDEX, \
  55                                     IWL_RATE_##pp##M_INDEX, \
  56                                     IWL_RATE_##np##M_INDEX, \
  57                                     IWL_RATE_##r##M_INDEX_TABLE, \
  58                                     IWL_RATE_##ip##M_INDEX_TABLE }
  59
  60 /*
  61  * Parameter order:
  62  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  63  *
  64  * If there isn't a valid next or previous rate then INV is used which
  65  * maps to IWL_RATE_INVALID
  66  *
  67  */
  68 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
  69         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  70         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  71         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  72         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  73         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  74         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  75         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  76         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  77         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  78         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  79         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  80         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  81 };
  82
  83 /* 1 = enable the iwl3945_disable_events() function */
  84 #define IWL_EVT_DISABLE (0)
  85 #define IWL_EVT_DISABLE_SIZE (1532/32)
  86
  87 /**
  88  * iwl3945_disable_events - Disable selected events in uCode event log
  89  *
  90  * Disable an event by writing "1"s into "disable"
  91  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  92  *   Default values of 0 enable uCode events to be logged.
  93  * Use for only special debugging.  This function is just a placeholder as-is,
  94  *   you'll need to provide the special bits! ...
  95  *   ... and set IWL_EVT_DISABLE to 1. */
  96 void iwl3945_disable_events(struct iwl3945_priv *priv)
  97 {
  98         int ret;
  99         int i;
 100         u32 base;               /* SRAM address of event log header */
 101         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 102         u32 array_size;         /* # of u32 entries in array */
 103         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 104                 0x00000000,     /*   31 -    0  Event id numbers */
 105                 0x00000000,     /*   63 -   32 */
 106                 0x00000000,     /*   95 -   64 */
 107                 0x00000000,     /*  127 -   96 */
 108                 0x00000000,     /*  159 -  128 */
 109                 0x00000000,     /*  191 -  160 */
 110                 0x00000000,     /*  223 -  192 */
 111                 0x00000000,     /*  255 -  224 */
 112                 0x00000000,     /*  287 -  256 */
 113                 0x00000000,     /*  319 -  288 */
 114                 0x00000000,     /*  351 -  320 */
 115                 0x00000000,     /*  383 -  352 */
 116                 0x00000000,     /*  415 -  384 */
 117                 0x00000000,     /*  447 -  416 */
 118                 0x00000000,     /*  479 -  448 */
 119                 0x00000000,     /*  511 -  480 */
 120                 0x00000000,     /*  543 -  512 */
 121                 0x00000000,     /*  575 -  544 */
 122                 0x00000000,     /*  607 -  576 */
 123                 0x00000000,     /*  639 -  608 */
 124                 0x00000000,     /*  671 -  640 */
 125                 0x00000000,     /*  703 -  672 */
 126                 0x00000000,     /*  735 -  704 */
 127                 0x00000000,     /*  767 -  736 */
 128                 0x00000000,     /*  799 -  768 */
 129                 0x00000000,     /*  831 -  800 */
 130                 0x00000000,     /*  863 -  832 */
 131                 0x00000000,     /*  895 -  864 */
 132                 0x00000000,     /*  927 -  896 */
 133                 0x00000000,     /*  959 -  928 */
 134                 0x00000000,     /*  991 -  960 */
 135                 0x00000000,     /* 1023 -  992 */
 136                 0x00000000,     /* 1055 - 1024 */
 137                 0x00000000,     /* 1087 - 1056 */
 138                 0x00000000,     /* 1119 - 1088 */
 139                 0x00000000,     /* 1151 - 1120 */
 140                 0x00000000,     /* 1183 - 1152 */
 141                 0x00000000,     /* 1215 - 1184 */
 142                 0x00000000,     /* 1247 - 1216 */
 143                 0x00000000,     /* 1279 - 1248 */
 144                 0x00000000,     /* 1311 - 1280 */
 145                 0x00000000,     /* 1343 - 1312 */
 146                 0x00000000,     /* 1375 - 1344 */
 147                 0x00000000,     /* 1407 - 1376 */
 148                 0x00000000,     /* 1439 - 1408 */
 149                 0x00000000,     /* 1471 - 1440 */
 150                 0x00000000,     /* 1503 - 1472 */
 151         };
 152
 153         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 154         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 155                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 156                 return;
 157         }
 158
 159         ret = iwl3945_grab_nic_access(priv);
 160         if (ret) {
 161                 IWL_WARNING("Can not read from adapter at this time.\n");
 162                 return;
 163         }
 164
 165         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
 166         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
 167         iwl3945_release_nic_access(priv);
 168
 169         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 170                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 171                                disable_ptr);
 172                 ret = iwl3945_grab_nic_access(priv);
 173                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 174                         iwl3945_write_targ_mem(priv,
 175                                            disable_ptr + (i * sizeof(u32)),
 176                                            evt_disable[i]);
 177
 178                 iwl3945_release_nic_access(priv);
 179         } else {
 180                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 181                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 182                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 183                                disable_ptr, array_size);
 184         }
 185
 186 }
 187
 188 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
 189 {
 190         int idx;
 191
 192         for (idx = 0; idx < IWL_RATE_COUNT; idx++)
 193                 if (iwl3945_rates[idx].plcp == plcp)
 194                         return idx;
 195         return -1;
 196 }
 197
 198 /**
 199  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 200  * @priv: eeprom and antenna fields are used to determine antenna flags
 201  *
 202  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 203  * priv->antenna specifies the antenna diversity mode:
 204  *
 205  * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
 206  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 207  * IWL_ANTENNA_AUX       - Force AUX antenna
 208  */
 209 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
 210 {
 211         switch (priv->antenna) {
 212         case IWL_ANTENNA_DIVERSITY:
 213                 return 0;
 214
 215         case IWL_ANTENNA_MAIN:
 216                 if (priv->eeprom.antenna_switch_type)
 217                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 218                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 219
 220         case IWL_ANTENNA_AUX:
 221                 if (priv->eeprom.antenna_switch_type)
 222                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 223                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 224         }
 225
 226         /* bad antenna selector value */
 227         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 228         return 0;               /* "diversity" is default if error */
 229 }
 230
 231 #ifdef CONFIG_IWL3945_DEBUG
 232 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
 233
 234 static const char *iwl3945_get_tx_fail_reason(u32 status)
 235 {
 236         switch (status & TX_STATUS_MSK) {
 237         case TX_STATUS_SUCCESS:
 238                 return "SUCCESS";
 239                 TX_STATUS_ENTRY(SHORT_LIMIT);
 240                 TX_STATUS_ENTRY(LONG_LIMIT);
 241                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 242                 TX_STATUS_ENTRY(MGMNT_ABORT);
 243                 TX_STATUS_ENTRY(NEXT_FRAG);
 244                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 245                 TX_STATUS_ENTRY(DEST_PS);
 246                 TX_STATUS_ENTRY(ABORTED);
 247                 TX_STATUS_ENTRY(BT_RETRY);
 248                 TX_STATUS_ENTRY(STA_INVALID);
 249                 TX_STATUS_ENTRY(FRAG_DROPPED);
 250                 TX_STATUS_ENTRY(TID_DISABLE);
 251                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 252                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 253                 TX_STATUS_ENTRY(TX_LOCKED);
 254                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 255         }
 256
 257         return "UNKNOWN";
 258 }
 259 #else
 260 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
 261 {
 262         return "";
 263 }
 264 #endif
 265
 266 /*
 267  * get ieee prev rate from rate scale table.
 268  * for A and B mode we need to overright prev
 269  * value
 270  */
 271 int iwl3945_rs_next_rate(struct iwl3945_priv *priv, int rate)
 272 {
 273         int next_rate = iwl3945_get_prev_ieee_rate(rate);
 274
 275         switch (priv->band) {
 276         case IEEE80211_BAND_5GHZ:
 277                 if (rate == IWL_RATE_12M_INDEX)
 278                         next_rate = IWL_RATE_9M_INDEX;
 279                 else if (rate == IWL_RATE_6M_INDEX)
 280                         next_rate = IWL_RATE_6M_INDEX;
 281                 break;
 282         case IEEE80211_BAND_2GHZ:
 283                 if (!(priv->sta_supp_rates & IWL_OFDM_RATES_MASK) &&
 284                     iwl3945_is_associated(priv)) {
 285                         if (rate == IWL_RATE_11M_INDEX)
 286                                 next_rate = IWL_RATE_5M_INDEX;
 287                 }
 288                 break;
 289
 290         default:
 291                 break;
 292         }
 293
 294         return next_rate;
 295 }
 296
 297
 298 /**
 299  * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 300  *
 301  * When FW advances 'R' index, all entries between old and new 'R' index
 302  * need to be reclaimed. As result, some free space forms. If there is
 303  * enough free space (> low mark), wake the stack that feeds us.
 304  */
 305 static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv,
 306                                      int txq_id, int index)
 307 {
 308         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 309         struct iwl3945_queue *q = &txq->q;
 310         struct iwl3945_tx_info *tx_info;
 311
 312         BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
 313
 314         for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
 315                 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 316
 317                 tx_info = &txq->txb[txq->q.read_ptr];
 318                 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
 319                 tx_info->skb[0] = NULL;
 320                 iwl3945_hw_txq_free_tfd(priv, txq);
 321         }
 322
 323         if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
 324                         (txq_id != IWL_CMD_QUEUE_NUM) &&
 325                         priv->mac80211_registered)
 326                 ieee80211_wake_queue(priv->hw, txq_id);
 327 }
 328
 329 /**
 330  * iwl3945_rx_reply_tx - Handle Tx response
 331  */
 332 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
 333                             struct iwl3945_rx_mem_buffer *rxb)
 334 {
 335         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 336         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 337         int txq_id = SEQ_TO_QUEUE(sequence);
 338         int index = SEQ_TO_INDEX(sequence);
 339         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 340         struct ieee80211_tx_info *info;
 341         struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 342         u32  status = le32_to_cpu(tx_resp->status);
 343         int rate_idx;
 344         int fail;
 345
 346         if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
 347                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
 348                           "is out of range [0-%d] %d %d\n", txq_id,
 349                           index, txq->q.n_bd, txq->q.write_ptr,
 350                           txq->q.read_ptr);
 351                 return;
 352         }
 353
 354         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
 355         ieee80211_tx_info_clear_status(info);
 356
 357         /* Fill the MRR chain with some info about on-chip retransmissions */
 358         rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
 359         if (info->band == IEEE80211_BAND_5GHZ)
 360                 rate_idx -= IWL_FIRST_OFDM_RATE;
 361
 362         fail = tx_resp->failure_frame;
 363
 364         info->status.rates[0].idx = rate_idx;
 365         info->status.rates[0].count = fail + 1; /* add final attempt */
 366
 367         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 368         info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
 369                                 IEEE80211_TX_STAT_ACK : 0;
 370
 371         IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
 372                         txq_id, iwl3945_get_tx_fail_reason(status), status,
 373                         tx_resp->rate, tx_resp->failure_frame);
 374
 375         IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
 376         iwl3945_tx_queue_reclaim(priv, txq_id, index);
 377
 378         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
 379                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
 380 }
 381
 382
 383
 384 /*****************************************************************************
 385  *
 386  * Intel PRO/Wireless 3945ABG/BG Network Connection
 387  *
 388  *  RX handler implementations
 389  *
 390  *****************************************************************************/
 391
 392 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
 393 {
 394         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 395         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 396                      (int)sizeof(struct iwl3945_notif_statistics),
 397                      le32_to_cpu(pkt->len));
 398
 399         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 400
 401         iwl3945_led_background(priv);
 402
 403         priv->last_statistics_time = jiffies;
 404 }
 405
 406 /******************************************************************************
 407  *
 408  * Misc. internal state and helper functions
 409  *
 410  ******************************************************************************/
 411 #ifdef CONFIG_IWL3945_DEBUG
 412
 413 /**
 414  * iwl3945_report_frame - dump frame to syslog during debug sessions
 415  *
 416  * You may hack this function to show different aspects of received frames,
 417  * including selective frame dumps.
 418  * group100 parameter selects whether to show 1 out of 100 good frames.
 419  */
 420 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 421                       struct iwl3945_rx_packet *pkt,
 422                       struct ieee80211_hdr *header, int group100)
 423 {
 424         u32 to_us;
 425         u32 print_summary = 0;
 426         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 427         u32 hundred = 0;
 428         u32 dataframe = 0;
 429         __le16 fc;
 430         u16 seq_ctl;
 431         u16 channel;
 432         u16 phy_flags;
 433         u16 length;
 434         u16 status;
 435         u16 bcn_tmr;
 436         u32 tsf_low;
 437         u64 tsf;
 438         u8 rssi;
 439         u8 agc;
 440         u16 sig_avg;
 441         u16 noise_diff;
 442         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 443         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 444         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 445         u8 *data = IWL_RX_DATA(pkt);
 446
 447         /* MAC header */
 448         fc = header->frame_control;
 449         seq_ctl = le16_to_cpu(header->seq_ctrl);
 450
 451         /* metadata */
 452         channel = le16_to_cpu(rx_hdr->channel);
 453         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 454         length = le16_to_cpu(rx_hdr->len);
 455
 456         /* end-of-frame status and timestamp */
 457         status = le32_to_cpu(rx_end->status);
 458         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
 459         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
 460         tsf = le64_to_cpu(rx_end->timestamp);
 461
 462         /* signal statistics */
 463         rssi = rx_stats->rssi;
 464         agc = rx_stats->agc;
 465         sig_avg = le16_to_cpu(rx_stats->sig_avg);
 466         noise_diff = le16_to_cpu(rx_stats->noise_diff);
 467
 468         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 469
 470         /* if data frame is to us and all is good,
 471          *   (optionally) print summary for only 1 out of every 100 */
 472         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 473             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 474                 dataframe = 1;
 475                 if (!group100)
 476                         print_summary = 1;      /* print each frame */
 477                 else if (priv->framecnt_to_us < 100) {
 478                         priv->framecnt_to_us++;
 479                         print_summary = 0;
 480                 } else {
 481                         priv->framecnt_to_us = 0;
 482                         print_summary = 1;
 483                         hundred = 1;
 484                 }
 485         } else {
 486                 /* print summary for all other frames */
 487                 print_summary = 1;
 488         }
 489
 490         if (print_summary) {
 491                 char *title;
 492                 int rate;
 493
 494                 if (hundred)
 495                         title = "100Frames";
 496                 else if (ieee80211_has_retry(fc))
 497                         title = "Retry";
 498                 else if (ieee80211_is_assoc_resp(fc))
 499                         title = "AscRsp";
 500                 else if (ieee80211_is_reassoc_resp(fc))
 501                         title = "RasRsp";
 502                 else if (ieee80211_is_probe_resp(fc)) {
 503                         title = "PrbRsp";
 504                         print_dump = 1; /* dump frame contents */
 505                 } else if (ieee80211_is_beacon(fc)) {
 506                         title = "Beacon";
 507                         print_dump = 1; /* dump frame contents */
 508                 } else if (ieee80211_is_atim(fc))
 509                         title = "ATIM";
 510                 else if (ieee80211_is_auth(fc))
 511                         title = "Auth";
 512                 else if (ieee80211_is_deauth(fc))
 513                         title = "DeAuth";
 514                 else if (ieee80211_is_disassoc(fc))
 515                         title = "DisAssoc";
 516                 else
 517                         title = "Frame";
 518
 519                 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 520                 if (rate == -1)
 521                         rate = 0;
 522                 else
 523                         rate = iwl3945_rates[rate].ieee / 2;
 524
 525                 /* print frame summary.
 526                  * MAC addresses show just the last byte (for brevity),
 527                  *    but you can hack it to show more, if you'd like to. */
 528                 if (dataframe)
 529                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
 530                                      "len=%u, rssi=%d, chnl=%d, rate=%d, \n",
 531                                      title, le16_to_cpu(fc), header->addr1[5],
 532                                      length, rssi, channel, rate);
 533                 else {
 534                         /* src/dst addresses assume managed mode */
 535                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
 536                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
 537                                      "phy=0x%02x, chnl=%d\n",
 538                                      title, le16_to_cpu(fc), header->addr1[5],
 539                                      header->addr3[5], rssi,
 540                                      tsf_low - priv->scan_start_tsf,
 541                                      phy_flags, channel);
 542                 }
 543         }
 544         if (print_dump)
 545                 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
 546 }
 547 #else
 548 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 549                       struct iwl3945_rx_packet *pkt,
 550                       struct ieee80211_hdr *header, int group100)
 551 {
 552 }
 553 #endif
 554
 555 /* This is necessary only for a number of statistics, see the caller. */
 556 static int iwl3945_is_network_packet(struct iwl3945_priv *priv,
 557                 struct ieee80211_hdr *header)
 558 {
 559         /* Filter incoming packets to determine if they are targeted toward
 560          * this network, discarding packets coming from ourselves */
 561         switch (priv->iw_mode) {
 562         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
 563                 /* packets to our IBSS update information */
 564                 return !compare_ether_addr(header->addr3, priv->bssid);
 565         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
 566                 /* packets to our IBSS update information */
 567                 return !compare_ether_addr(header->addr2, priv->bssid);
 568         default:
 569                 return 1;
 570         }
 571 }
 572
 573 static void iwl3945_pass_packet_to_mac80211(struct iwl3945_priv *priv,
 574                                    struct iwl3945_rx_mem_buffer *rxb,
 575                                    struct ieee80211_rx_status *stats)
 576 {
 577         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
 578 #ifdef CONFIG_IWL3945_LEDS
 579         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 580 #endif
 581         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 582         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 583         short len = le16_to_cpu(rx_hdr->len);
 584
 585         /* We received data from the HW, so stop the watchdog */
 586         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 587                 IWL_DEBUG_DROP("Corruption detected!\n");
 588                 return;
 589         }
 590
 591         /* We only process data packets if the interface is open */
 592         if (unlikely(!priv->is_open)) {
 593                 IWL_DEBUG_DROP_LIMIT
 594                     ("Dropping packet while interface is not open.\n");
 595                 return;
 596         }
 597
 598         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 599         /* Set the size of the skb to the size of the frame */
 600         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 601
 602         if (iwl3945_param_hwcrypto)
 603                 iwl3945_set_decrypted_flag(priv, rxb->skb,
 604                                        le32_to_cpu(rx_end->status), stats);
 605
 606 #ifdef CONFIG_IWL3945_LEDS
 607         if (ieee80211_is_data(hdr->frame_control))
 608                 priv->rxtxpackets += len;
 609 #endif
 610         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 611         rxb->skb = NULL;
 612 }
 613
 614 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 615
 616 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
 617                                 struct iwl3945_rx_mem_buffer *rxb)
 618 {
 619         struct ieee80211_hdr *header;
 620         struct ieee80211_rx_status rx_status;
 621         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 622         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 623         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 624         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 625         int snr;
 626         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 627         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 628         u8 network_packet;
 629
 630         rx_status.flag = 0;
 631         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 632         rx_status.freq =
 633                 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
 634         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 635                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 636
 637         rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 638         if (rx_status.band == IEEE80211_BAND_5GHZ)
 639                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
 640
 641         rx_status.antenna = le16_to_cpu(rx_hdr->phy_flags &
 642                                         RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
 643
 644         /* set the preamble flag if appropriate */
 645         if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 646                 rx_status.flag |= RX_FLAG_SHORTPRE;
 647
 648         if ((unlikely(rx_stats->phy_count > 20))) {
 649                 IWL_DEBUG_DROP
 650                     ("dsp size out of range [0,20]: "
 651                      "%d/n", rx_stats->phy_count);
 652                 return;
 653         }
 654
 655         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 656             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 657                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 658                 return;
 659         }
 660
 661
 662
 663         /* Convert 3945's rssi indicator to dBm */
 664         rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET;
 665
 666         /* Set default noise value to -127 */
 667         if (priv->last_rx_noise == 0)
 668                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 669
 670         /* 3945 provides noise info for OFDM frames only.
 671          * sig_avg and noise_diff are measured by the 3945's digital signal
 672          *   processor (DSP), and indicate linear levels of signal level and
 673          *   distortion/noise within the packet preamble after
 674          *   automatic gain control (AGC).  sig_avg should stay fairly
 675          *   constant if the radio's AGC is working well.
 676          * Since these values are linear (not dB or dBm), linear
 677          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 678          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 679          *   to obtain noise level in dBm.
 680          * Calculate rx_status.signal (quality indicator in %) based on SNR. */
 681         if (rx_stats_noise_diff) {
 682                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 683                 rx_status.noise = rx_status.signal -
 684                                         iwl3945_calc_db_from_ratio(snr);
 685                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal,
 686                                                          rx_status.noise);
 687
 688         /* If noise info not available, calculate signal quality indicator (%)
 689          *   using just the dBm signal level. */
 690         } else {
 691                 rx_status.noise = priv->last_rx_noise;
 692                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal, 0);
 693         }
 694
 695
 696         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 697                         rx_status.signal, rx_status.noise, rx_status.qual,
 698                         rx_stats_sig_avg, rx_stats_noise_diff);
 699
 700         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 701
 702         network_packet = iwl3945_is_network_packet(priv, header);
 703
 704         IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
 705                               network_packet ? '*' : ' ',
 706                               le16_to_cpu(rx_hdr->channel),
 707                               rx_status.signal, rx_status.signal,
 708                               rx_status.noise, rx_status.rate_idx);
 709
 710 #ifdef CONFIG_IWL3945_DEBUG
 711         if (iwl3945_debug_level & (IWL_DL_RX))
 712                 /* Set "1" to report good data frames in groups of 100 */
 713                 iwl3945_dbg_report_frame(priv, pkt, header, 1);
 714 #endif
 715
 716         if (network_packet) {
 717                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 718                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 719                 priv->last_rx_rssi = rx_status.signal;
 720                 priv->last_rx_noise = rx_status.noise;
 721         }
 722
 723         iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
 724 }
 725
 726 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
 727                                  dma_addr_t addr, u16 len)
 728 {
 729         int count;
 730         u32 pad;
 731         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
 732
 733         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 734         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 735
 736         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 737                 IWL_ERROR("Error can not send more than %d chunks\n",
 738                           NUM_TFD_CHUNKS);
 739                 return -EINVAL;
 740         }
 741
 742         tfd->pa[count].addr = cpu_to_le32(addr);
 743         tfd->pa[count].len = cpu_to_le32(len);
 744
 745         count++;
 746
 747         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 748                                          TFD_CTL_PAD_SET(pad));
 749
 750         return 0;
 751 }
 752
 753 /**
 754  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 755  *
 756  * Does NOT advance any indexes
 757  */
 758 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
 759 {
 760         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
 761         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
 762         struct pci_dev *dev = priv->pci_dev;
 763         int i;
 764         int counter;
 765
 766         /* classify bd */
 767         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 768                 /* nothing to cleanup after for host commands */
 769                 return 0;
 770
 771         /* sanity check */
 772         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 773         if (counter > NUM_TFD_CHUNKS) {
 774                 IWL_ERROR("Too many chunks: %i\n", counter);
 775                 /* @todo issue fatal error, it is quite serious situation */
 776                 return 0;
 777         }
 778
 779         /* unmap chunks if any */
 780
 781         for (i = 1; i < counter; i++) {
 782                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 783                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 784                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 785                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 786                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 787                                 /* Can be called from interrupt context */
 788                                 dev_kfree_skb_any(skb);
 789                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 790                         }
 791                 }
 792         }
 793         return 0;
 794 }
 795
 796 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
 797 {
 798         int i, start = IWL_AP_ID;
 799         int ret = IWL_INVALID_STATION;
 800         unsigned long flags;
 801
 802         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) ||
 803             (priv->iw_mode == NL80211_IFTYPE_AP))
 804                 start = IWL_STA_ID;
 805
 806         if (is_broadcast_ether_addr(addr))
 807                 return priv->hw_setting.bcast_sta_id;
 808
 809         spin_lock_irqsave(&priv->sta_lock, flags);
 810         for (i = start; i < priv->hw_setting.max_stations; i++)
 811                 if ((priv->stations[i].used) &&
 812                     (!compare_ether_addr
 813                      (priv->stations[i].sta.sta.addr, addr))) {
 814                         ret = i;
 815                         goto out;
 816                 }
 817
 818         IWL_DEBUG_INFO("can not find STA %pM (total %d)\n",
 819                        addr, priv->num_stations);
 820  out:
 821         spin_unlock_irqrestore(&priv->sta_lock, flags);
 822         return ret;
 823 }
 824
 825 /**
 826  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 827  *
 828 */
 829 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
 830                               struct iwl3945_cmd *cmd,
 831                               struct ieee80211_tx_info *info,
 832                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 833 {
 834         unsigned long flags;
 835         u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
 836         u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1);
 837         u16 rate_mask;
 838         int rate;
 839         u8 rts_retry_limit;
 840         u8 data_retry_limit;
 841         __le32 tx_flags;
 842         __le16 fc = hdr->frame_control;
 843
 844         rate = iwl3945_rates[rate_index].plcp;
 845         tx_flags = cmd->cmd.tx.tx_flags;
 846
 847         /* We need to figure out how to get the sta->supp_rates while
 848          * in this running context */
 849         rate_mask = IWL_RATES_MASK;
 850
 851         spin_lock_irqsave(&priv->sta_lock, flags);
 852
 853         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 854
 855         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
 856             (sta_id != priv->hw_setting.bcast_sta_id) &&
 857                 (sta_id != IWL_MULTICAST_ID))
 858                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 859
 860         spin_unlock_irqrestore(&priv->sta_lock, flags);
 861
 862         if (tx_id >= IWL_CMD_QUEUE_NUM)
 863                 rts_retry_limit = 3;
 864         else
 865                 rts_retry_limit = 7;
 866
 867         if (ieee80211_is_probe_resp(fc)) {
 868                 data_retry_limit = 3;
 869                 if (data_retry_limit < rts_retry_limit)
 870                         rts_retry_limit = data_retry_limit;
 871         } else
 872                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 873
 874         if (priv->data_retry_limit != -1)
 875                 data_retry_limit = priv->data_retry_limit;
 876
 877         if (ieee80211_is_mgmt(fc)) {
 878                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
 879                 case cpu_to_le16(IEEE80211_STYPE_AUTH):
 880                 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
 881                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
 882                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
 883                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 884                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 885                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 886                         }
 887                         break;
 888                 default:
 889                         break;
 890                 }
 891         }
 892
 893         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
 894         cmd->cmd.tx.data_retry_limit = data_retry_limit;
 895         cmd->cmd.tx.rate = rate;
 896         cmd->cmd.tx.tx_flags = tx_flags;
 897
 898         /* OFDM */
 899         cmd->cmd.tx.supp_rates[0] =
 900            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
 901
 902         /* CCK */
 903         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
 904
 905         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 906                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 907                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
 908                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
 909 }
 910
 911 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
 912 {
 913         unsigned long flags_spin;
 914         struct iwl3945_station_entry *station;
 915
 916         if (sta_id == IWL_INVALID_STATION)
 917                 return IWL_INVALID_STATION;
 918
 919         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 920         station = &priv->stations[sta_id];
 921
 922         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 923         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 924         station->current_rate.rate_n_flags = tx_rate;
 925         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 926
 927         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 928
 929         iwl3945_send_add_station(priv, &station->sta, flags);
 930         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
 931                         sta_id, tx_rate);
 932         return sta_id;
 933 }
 934
 935 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
 936 {
 937         int rc;
 938         unsigned long flags;
 939
 940         spin_lock_irqsave(&priv->lock, flags);
 941         rc = iwl3945_grab_nic_access(priv);
 942         if (rc) {
 943                 spin_unlock_irqrestore(&priv->lock, flags);
 944                 return rc;
 945         }
 946
 947         if (!pwr_max) {
 948                 u32 val;
 949
 950                 rc = pci_read_config_dword(priv->pci_dev,
 951                                 PCI_POWER_SOURCE, &val);
 952                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 953                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 954                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 955                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 956                         iwl3945_release_nic_access(priv);
 957
 958                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
 959                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 960                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 961                 } else
 962                         iwl3945_release_nic_access(priv);
 963         } else {
 964                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 965                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 966                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 967
 968                 iwl3945_release_nic_access(priv);
 969                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 970                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 971         }
 972         spin_unlock_irqrestore(&priv->lock, flags);
 973
 974         return rc;
 975 }
 976
 977 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
 978 {
 979         int rc;
 980         unsigned long flags;
 981
 982         spin_lock_irqsave(&priv->lock, flags);
 983         rc = iwl3945_grab_nic_access(priv);
 984         if (rc) {
 985                 spin_unlock_irqrestore(&priv->lock, flags);
 986                 return rc;
 987         }
 988
 989         iwl3945_write_direct32(priv, FH39_RCSR_RBD_BASE(0), rxq->dma_addr);
 990         iwl3945_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0),
 991                              priv->hw_setting.shared_phys +
 992                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
 993         iwl3945_write_direct32(priv, FH39_RCSR_WPTR(0), 0);
 994         iwl3945_write_direct32(priv, FH39_RCSR_CONFIG(0),
 995                 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 996                 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 997                 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 998                 FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
 999                 (RX_QUEUE_SIZE_LOG << FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
1000                 FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
1001                 (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1002                 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1003
1004         /* fake read to flush all prev I/O */
1005         iwl3945_read_direct32(priv, FH39_RSSR_CTRL);
1006
1007         iwl3945_release_nic_access(priv);
1008         spin_unlock_irqrestore(&priv->lock, flags);
1009
1010         return 0;
1011 }
1012
1013 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1014 {
1015         int rc;
1016         unsigned long flags;
1017
1018         spin_lock_irqsave(&priv->lock, flags);
1019         rc = iwl3945_grab_nic_access(priv);
1020         if (rc) {
1021                 spin_unlock_irqrestore(&priv->lock, flags);
1022                 return rc;
1023         }
1024
1025         /* bypass mode */
1026         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1027
1028         /* RA 0 is active */
1029         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1030
1031         /* all 6 fifo are active */
1032         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1033
1034         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1035         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1036         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1037         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1038
1039         iwl3945_write_direct32(priv, FH39_TSSR_CBB_BASE,
1040                              priv->hw_setting.shared_phys);
1041
1042         iwl3945_write_direct32(priv, FH39_TSSR_MSG_CONFIG,
1043                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1044                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1045                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1046                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1047                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1048                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1049                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1050
1051         iwl3945_release_nic_access(priv);
1052         spin_unlock_irqrestore(&priv->lock, flags);
1053
1054         return 0;
1055 }
1056
1057 /**
1058  * iwl3945_txq_ctx_reset - Reset TX queue context
1059  *
1060  * Destroys all DMA structures and initialize them again
1061  */
1062 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1063 {
1064         int rc;
1065         int txq_id, slots_num;
1066
1067         iwl3945_hw_txq_ctx_free(priv);
1068
1069         /* Tx CMD queue */
1070         rc = iwl3945_tx_reset(priv);
1071         if (rc)
1072                 goto error;
1073
1074         /* Tx queue(s) */
1075         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1076                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1077                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1078                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1079                                 txq_id);
1080                 if (rc) {
1081                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
1082                         goto error;
1083                 }
1084         }
1085
1086         return rc;
1087
1088  error:
1089         iwl3945_hw_txq_ctx_free(priv);
1090         return rc;
1091 }
1092
1093 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1094 {
1095         u8 rev_id;
1096         int rc;
1097         unsigned long flags;
1098         struct iwl3945_rx_queue *rxq = &priv->rxq;
1099
1100         iwl3945_power_init_handle(priv);
1101
1102         spin_lock_irqsave(&priv->lock, flags);
1103         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, CSR39_ANA_PLL_CFG_VAL);
1104         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1105                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1106
1107         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1108         rc = iwl3945_poll_direct_bit(priv, CSR_GP_CNTRL,
1109                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1110         if (rc < 0) {
1111                 spin_unlock_irqrestore(&priv->lock, flags);
1112                 IWL_DEBUG_INFO("Failed to init the card\n");
1113                 return rc;
1114         }
1115
1116         rc = iwl3945_grab_nic_access(priv);
1117         if (rc) {
1118                 spin_unlock_irqrestore(&priv->lock, flags);
1119                 return rc;
1120         }
1121         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1122                                  APMG_CLK_VAL_DMA_CLK_RQT |
1123                                  APMG_CLK_VAL_BSM_CLK_RQT);
1124         udelay(20);
1125         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1126                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1127         iwl3945_release_nic_access(priv);
1128         spin_unlock_irqrestore(&priv->lock, flags);
1129
1130         /* Determine HW type */
1131         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1132         if (rc)
1133                 return rc;
1134         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1135
1136         iwl3945_nic_set_pwr_src(priv, 1);
1137         spin_lock_irqsave(&priv->lock, flags);
1138
1139         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1140                 IWL_DEBUG_INFO("RTP type \n");
1141         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1142                 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1143                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1144                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1145         } else {
1146                 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1147                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1148                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1149         }
1150
1151         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1152                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1153                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1154                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1155         } else
1156                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1157
1158         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1159                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1160                                priv->eeprom.board_revision);
1161                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1162                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1163         } else {
1164                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1165                                priv->eeprom.board_revision);
1166                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1167                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1168         }
1169
1170         if (priv->eeprom.almgor_m_version <= 1) {
1171                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1172                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1173                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1174                                priv->eeprom.almgor_m_version);
1175         } else {
1176                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1177                                priv->eeprom.almgor_m_version);
1178                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1179                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1180         }
1181         spin_unlock_irqrestore(&priv->lock, flags);
1182
1183         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1184                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1185
1186         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1187                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1188
1189         /* Allocate the RX queue, or reset if it is already allocated */
1190         if (!rxq->bd) {
1191                 rc = iwl3945_rx_queue_alloc(priv);
1192                 if (rc) {
1193                         IWL_ERROR("Unable to initialize Rx queue\n");
1194                         return -ENOMEM;
1195                 }
1196         } else
1197                 iwl3945_rx_queue_reset(priv, rxq);
1198
1199         iwl3945_rx_replenish(priv);
1200
1201         iwl3945_rx_init(priv, rxq);
1202
1203         spin_lock_irqsave(&priv->lock, flags);
1204
1205         /* Look at using this instead:
1206         rxq->need_update = 1;
1207         iwl3945_rx_queue_update_write_ptr(priv, rxq);
1208         */
1209
1210         rc = iwl3945_grab_nic_access(priv);
1211         if (rc) {
1212                 spin_unlock_irqrestore(&priv->lock, flags);
1213                 return rc;
1214         }
1215         iwl3945_write_direct32(priv, FH39_RCSR_WPTR(0), rxq->write & ~7);
1216         iwl3945_release_nic_access(priv);
1217
1218         spin_unlock_irqrestore(&priv->lock, flags);
1219
1220         rc = iwl3945_txq_ctx_reset(priv);
1221         if (rc)
1222                 return rc;
1223
1224         set_bit(STATUS_INIT, &priv->status);
1225
1226         return 0;
1227 }
1228
1229 /**
1230  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1231  *
1232  * Destroy all TX DMA queues and structures
1233  */
1234 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1235 {
1236         int txq_id;
1237
1238         /* Tx queues */
1239         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1240                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1241 }
1242
1243 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1244 {
1245         int txq_id;
1246         unsigned long flags;
1247
1248         spin_lock_irqsave(&priv->lock, flags);
1249         if (iwl3945_grab_nic_access(priv)) {
1250                 spin_unlock_irqrestore(&priv->lock, flags);
1251                 iwl3945_hw_txq_ctx_free(priv);
1252                 return;
1253         }
1254
1255         /* stop SCD */
1256         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1257
1258         /* reset TFD queues */
1259         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1260                 iwl3945_write_direct32(priv, FH39_TCSR_CONFIG(txq_id), 0x0);
1261                 iwl3945_poll_direct_bit(priv, FH39_TSSR_TX_STATUS,
1262                                 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
1263                                 1000);
1264         }
1265
1266         iwl3945_release_nic_access(priv);
1267         spin_unlock_irqrestore(&priv->lock, flags);
1268
1269         iwl3945_hw_txq_ctx_free(priv);
1270 }
1271
1272 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1273 {
1274         int rc = 0;
1275         u32 reg_val;
1276         unsigned long flags;
1277
1278         spin_lock_irqsave(&priv->lock, flags);
1279
1280         /* set stop master bit */
1281         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1282
1283         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1284
1285         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1286             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1287                 IWL_DEBUG_INFO("Card in power save, master is already "
1288                                "stopped\n");
1289         else {
1290                 rc = iwl3945_poll_direct_bit(priv, CSR_RESET,
1291                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1292                 if (rc < 0) {
1293                         spin_unlock_irqrestore(&priv->lock, flags);
1294                         return rc;
1295                 }
1296         }
1297
1298         spin_unlock_irqrestore(&priv->lock, flags);
1299         IWL_DEBUG_INFO("stop master\n");
1300
1301         return rc;
1302 }
1303
1304 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1305 {
1306         int rc;
1307         unsigned long flags;
1308
1309         iwl3945_hw_nic_stop_master(priv);
1310
1311         spin_lock_irqsave(&priv->lock, flags);
1312
1313         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1314
1315         iwl3945_poll_direct_bit(priv, CSR_GP_CNTRL,
1316                          CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1317
1318         rc = iwl3945_grab_nic_access(priv);
1319         if (!rc) {
1320                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1321                                          APMG_CLK_VAL_BSM_CLK_RQT);
1322
1323                 udelay(10);
1324
1325                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1326                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1327
1328                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1329                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1330                                         0xFFFFFFFF);
1331
1332                 /* enable DMA */
1333                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1334                                          APMG_CLK_VAL_DMA_CLK_RQT |
1335                                          APMG_CLK_VAL_BSM_CLK_RQT);
1336                 udelay(10);
1337
1338                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1339                                 APMG_PS_CTRL_VAL_RESET_REQ);
1340                 udelay(5);
1341                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1342                                 APMG_PS_CTRL_VAL_RESET_REQ);
1343                 iwl3945_release_nic_access(priv);
1344         }
1345
1346         /* Clear the 'host command active' bit... */
1347         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1348
1349         wake_up_interruptible(&priv->wait_command_queue);
1350         spin_unlock_irqrestore(&priv->lock, flags);
1351
1352         return rc;
1353 }
1354
1355 /**
1356  * iwl3945_hw_reg_adjust_power_by_temp
1357  * return index delta into power gain settings table
1358 */
1359 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1360 {
1361         return (new_reading - old_reading) * (-11) / 100;
1362 }
1363
1364 /**
1365  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1366  */
1367 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1368 {
1369         return ((temperature < -260) || (temperature > 25)) ? 1 : 0;
1370 }
1371
1372 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1373 {
1374         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1375 }
1376
1377 /**
1378  * iwl3945_hw_reg_txpower_get_temperature
1379  * get the current temperature by reading from NIC
1380 */
1381 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1382 {
1383         int temperature;
1384
1385         temperature = iwl3945_hw_get_temperature(priv);
1386
1387         /* driver's okay range is -260 to +25.
1388          *   human readable okay range is 0 to +285 */
1389         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1390
1391         /* handle insane temp reading */
1392         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1393                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1394
1395                 /* if really really hot(?),
1396                  *   substitute the 3rd band/group's temp measured at factory */
1397                 if (priv->last_temperature > 100)
1398                         temperature = priv->eeprom.groups[2].temperature;
1399                 else /* else use most recent "sane" value from driver */
1400                         temperature = priv->last_temperature;
1401         }
1402
1403         return temperature;     /* raw, not "human readable" */
1404 }
1405
1406 /* Adjust Txpower only if temperature variance is greater than threshold.
1407  *
1408  * Both are lower than older versions' 9 degrees */
1409 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1410
1411 /**
1412  * is_temp_calib_needed - determines if new calibration is needed
1413  *
1414  * records new temperature in tx_mgr->temperature.
1415  * replaces tx_mgr->last_temperature *only* if calib needed
1416  *    (assumes caller will actually do the calibration!). */
1417 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1418 {
1419         int temp_diff;
1420
1421         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1422         temp_diff = priv->temperature - priv->last_temperature;
1423
1424         /* get absolute value */
1425         if (temp_diff < 0) {
1426                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1427                 temp_diff = -temp_diff;
1428         } else if (temp_diff == 0)
1429                 IWL_DEBUG_POWER("Same temp,\n");
1430         else
1431                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1432
1433         /* if we don't need calibration, *don't* update last_temperature */
1434         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1435                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1436                 return 0;
1437         }
1438
1439         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1440
1441         /* assume that caller will actually do calib ...
1442          *   update the "last temperature" value */
1443         priv->last_temperature = priv->temperature;
1444         return 1;
1445 }
1446
1447 #define IWL_MAX_GAIN_ENTRIES 78
1448 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1449 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1450
1451 /* radio and DSP power table, each step is 1/2 dB.
1452  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1453 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1454         {
1455          {251, 127},            /* 2.4 GHz, highest power */
1456          {251, 127},
1457          {251, 127},
1458          {251, 127},
1459          {251, 125},
1460          {251, 110},
1461          {251, 105},
1462          {251, 98},
1463          {187, 125},
1464          {187, 115},
1465          {187, 108},
1466          {187, 99},
1467          {243, 119},
1468          {243, 111},
1469          {243, 105},
1470          {243, 97},
1471          {243, 92},
1472          {211, 106},
1473          {211, 100},
1474          {179, 120},
1475          {179, 113},
1476          {179, 107},
1477          {147, 125},
1478          {147, 119},
1479          {147, 112},
1480          {147, 106},
1481          {147, 101},
1482          {147, 97},
1483          {147, 91},
1484          {115, 107},
1485          {235, 121},
1486          {235, 115},
1487          {235, 109},
1488          {203, 127},
1489          {203, 121},
1490          {203, 115},
1491          {203, 108},
1492          {203, 102},
1493          {203, 96},
1494          {203, 92},
1495          {171, 110},
1496          {171, 104},
1497          {171, 98},
1498          {139, 116},
1499          {227, 125},
1500          {227, 119},
1501          {227, 113},
1502          {227, 107},
1503          {227, 101},
1504          {227, 96},
1505          {195, 113},
1506          {195, 106},
1507          {195, 102},
1508          {195, 95},
1509          {163, 113},
1510          {163, 106},
1511          {163, 102},
1512          {163, 95},
1513          {131, 113},
1514          {131, 106},
1515          {131, 102},
1516          {131, 95},
1517          {99, 113},
1518          {99, 106},
1519          {99, 102},
1520          {99, 95},
1521          {67, 113},
1522          {67, 106},
1523          {67, 102},
1524          {67, 95},
1525          {35, 113},
1526          {35, 106},
1527          {35, 102},
1528          {35, 95},
1529          {3, 113},
1530          {3, 106},
1531          {3, 102},
1532          {3, 95} },             /* 2.4 GHz, lowest power */
1533         {
1534          {251, 127},            /* 5.x GHz, highest power */
1535          {251, 120},
1536          {251, 114},
1537          {219, 119},
1538          {219, 101},
1539          {187, 113},
1540          {187, 102},
1541          {155, 114},
1542          {155, 103},
1543          {123, 117},
1544          {123, 107},
1545          {123, 99},
1546          {123, 92},
1547          {91, 108},
1548          {59, 125},
1549          {59, 118},
1550          {59, 109},
1551          {59, 102},
1552          {59, 96},
1553          {59, 90},
1554          {27, 104},
1555          {27, 98},
1556          {27, 92},
1557          {115, 118},
1558          {115, 111},
1559          {115, 104},
1560          {83, 126},
1561          {83, 121},
1562          {83, 113},
1563          {83, 105},
1564          {83, 99},
1565          {51, 118},
1566          {51, 111},
1567          {51, 104},
1568          {51, 98},
1569          {19, 116},
1570          {19, 109},
1571          {19, 102},
1572          {19, 98},
1573          {19, 93},
1574          {171, 113},
1575          {171, 107},
1576          {171, 99},
1577          {139, 120},
1578          {139, 113},
1579          {139, 107},
1580          {139, 99},
1581          {107, 120},
1582          {107, 113},
1583          {107, 107},
1584          {107, 99},
1585          {75, 120},
1586          {75, 113},
1587          {75, 107},
1588          {75, 99},
1589          {43, 120},
1590          {43, 113},
1591          {43, 107},
1592          {43, 99},
1593          {11, 120},
1594          {11, 113},
1595          {11, 107},
1596          {11, 99},
1597          {131, 107},
1598          {131, 99},
1599          {99, 120},
1600          {99, 113},
1601          {99, 107},
1602          {99, 99},
1603          {67, 120},
1604          {67, 113},
1605          {67, 107},
1606          {67, 99},
1607          {35, 120},
1608          {35, 113},
1609          {35, 107},
1610          {35, 99},
1611          {3, 120} }             /* 5.x GHz, lowest power */
1612 };
1613
1614 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1615 {
1616         if (index < 0)
1617                 return 0;
1618         if (index >= IWL_MAX_GAIN_ENTRIES)
1619                 return IWL_MAX_GAIN_ENTRIES - 1;
1620         return (u8) index;
1621 }
1622
1623 /* Kick off thermal recalibration check every 60 seconds */
1624 #define REG_RECALIB_PERIOD (60)
1625
1626 /**
1627  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1628  *
1629  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1630  * or 6 Mbit (OFDM) rates.
1631  */
1632 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1633                                s32 rate_index, const s8 *clip_pwrs,
1634                                struct iwl3945_channel_info *ch_info,
1635                                int band_index)
1636 {
1637         struct iwl3945_scan_power_info *scan_power_info;
1638         s8 power;
1639         u8 power_index;
1640
1641         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1642
1643         /* use this channel group's 6Mbit clipping/saturation pwr,
1644          *   but cap at regulatory scan power restriction (set during init
1645          *   based on eeprom channel data) for this channel.  */
1646         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1647
1648         /* further limit to user's max power preference.
1649          * FIXME:  Other spectrum management power limitations do not
1650          *   seem to apply?? */
1651         power = min(power, priv->user_txpower_limit);
1652         scan_power_info->requested_power = power;
1653
1654         /* find difference between new scan *power* and current "normal"
1655          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1656          *   current "normal" temperature-compensated Tx power *index* for
1657          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1658          *   *index*. */
1659         power_index = ch_info->power_info[rate_index].power_table_index
1660             - (power - ch_info->power_info
1661                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1662
1663         /* store reference index that we use when adjusting *all* scan
1664          *   powers.  So we can accommodate user (all channel) or spectrum
1665          *   management (single channel) power changes "between" temperature
1666          *   feedback compensation procedures.
1667          * don't force fit this reference index into gain table; it may be a
1668          *   negative number.  This will help avoid errors when we're at
1669          *   the lower bounds (highest gains, for warmest temperatures)
1670          *   of the table. */
1671
1672         /* don't exceed table bounds for "real" setting */
1673         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1674
1675         scan_power_info->power_table_index = power_index;
1676         scan_power_info->tpc.tx_gain =
1677             power_gain_table[band_index][power_index].tx_gain;
1678         scan_power_info->tpc.dsp_atten =
1679             power_gain_table[band_index][power_index].dsp_atten;
1680 }
1681
1682 /**
1683  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1684  *
1685  * Configures power settings for all rates for the current channel,
1686  * using values from channel info struct, and send to NIC
1687  */
1688 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1689 {
1690         int rate_idx, i;
1691         const struct iwl3945_channel_info *ch_info = NULL;
1692         struct iwl3945_txpowertable_cmd txpower = {
1693                 .channel = priv->active_rxon.channel,
1694         };
1695
1696         txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1697         ch_info = iwl3945_get_channel_info(priv,
1698                                        priv->band,
1699                                        le16_to_cpu(priv->active_rxon.channel));
1700         if (!ch_info) {
1701                 IWL_ERROR
1702                     ("Failed to get channel info for channel %d [%d]\n",
1703                      le16_to_cpu(priv->active_rxon.channel), priv->band);
1704                 return -EINVAL;
1705         }
1706
1707         if (!is_channel_valid(ch_info)) {
1708                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1709                                 "non-Tx channel.\n");
1710                 return 0;
1711         }
1712
1713         /* fill cmd with power settings for all rates for current channel */
1714         /* Fill OFDM rate */
1715         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1716              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1717
1718                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1719                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1720
1721                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1722                                 le16_to_cpu(txpower.channel),
1723                                 txpower.band,
1724                                 txpower.power[i].tpc.tx_gain,
1725                                 txpower.power[i].tpc.dsp_atten,
1726                                 txpower.power[i].rate);
1727         }
1728         /* Fill CCK rates */
1729         for (rate_idx = IWL_FIRST_CCK_RATE;
1730              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1731                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1732                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1733
1734                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1735                                 le16_to_cpu(txpower.channel),
1736                                 txpower.band,
1737                                 txpower.power[i].tpc.tx_gain,
1738                                 txpower.power[i].tpc.dsp_atten,
1739                                 txpower.power[i].rate);
1740         }
1741
1742         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1743                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1744
1745 }
1746
1747 /**
1748  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1749  * @ch_info: Channel to update.  Uses power_info.requested_power.
1750  *
1751  * Replace requested_power and base_power_index ch_info fields for
1752  * one channel.
1753  *
1754  * Called if user or spectrum management changes power preferences.
1755  * Takes into account h/w and modulation limitations (clip power).
1756  *
1757  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1758  *
1759  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1760  *       properly fill out the scan powers, and actual h/w gain settings,
1761  *       and send changes to NIC
1762  */
1763 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1764                              struct iwl3945_channel_info *ch_info)
1765 {
1766         struct iwl3945_channel_power_info *power_info;
1767         int power_changed = 0;
1768         int i;
1769         const s8 *clip_pwrs;
1770         int power;
1771
1772         /* Get this chnlgrp's rate-to-max/clip-powers table */
1773         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1774
1775         /* Get this channel's rate-to-current-power settings table */
1776         power_info = ch_info->power_info;
1777
1778         /* update OFDM Txpower settings */
1779         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1780              i++, ++power_info) {
1781                 int delta_idx;
1782
1783                 /* limit new power to be no more than h/w capability */
1784                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1785                 if (power == power_info->requested_power)
1786                         continue;
1787
1788                 /* find difference between old and new requested powers,
1789                  *    update base (non-temp-compensated) power index */
1790                 delta_idx = (power - power_info->requested_power) * 2;
1791                 power_info->base_power_index -= delta_idx;
1792
1793                 /* save new requested power value */
1794                 power_info->requested_power = power;
1795
1796                 power_changed = 1;
1797         }
1798
1799         /* update CCK Txpower settings, based on OFDM 12M setting ...
1800          *    ... all CCK power settings for a given channel are the *same*. */
1801         if (power_changed) {
1802                 power =
1803                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1804                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1805
1806                 /* do all CCK rates' iwl3945_channel_power_info structures */
1807                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1808                         power_info->requested_power = power;
1809                         power_info->base_power_index =
1810                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1811                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1812                         ++power_info;
1813                 }
1814         }
1815
1816         return 0;
1817 }
1818
1819 /**
1820  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1821  *
1822  * NOTE: Returned power limit may be less (but not more) than requested,
1823  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1824  *       (no consideration for h/w clipping limitations).
1825  */
1826 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1827 {
1828         s8 max_power;
1829
1830 #if 0
1831         /* if we're using TGd limits, use lower of TGd or EEPROM */
1832         if (ch_info->tgd_data.max_power != 0)
1833                 max_power = min(ch_info->tgd_data.max_power,
1834                                 ch_info->eeprom.max_power_avg);
1835
1836         /* else just use EEPROM limits */
1837         else
1838 #endif
1839                 max_power = ch_info->eeprom.max_power_avg;
1840
1841         return min(max_power, ch_info->max_power_avg);
1842 }
1843
1844 /**
1845  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1846  *
1847  * Compensate txpower settings of *all* channels for temperature.
1848  * This only accounts for the difference between current temperature
1849  *   and the factory calibration temperatures, and bases the new settings
1850  *   on the channel's base_power_index.
1851  *
1852  * If RxOn is "associated", this sends the new Txpower to NIC!
1853  */
1854 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1855 {
1856         struct iwl3945_channel_info *ch_info = NULL;
1857         int delta_index;
1858         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1859         u8 a_band;
1860         u8 rate_index;
1861         u8 scan_tbl_index;
1862         u8 i;
1863         int ref_temp;
1864         int temperature = priv->temperature;
1865
1866         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1867         for (i = 0; i < priv->channel_count; i++) {
1868                 ch_info = &priv->channel_info[i];
1869                 a_band = is_channel_a_band(ch_info);
1870
1871                 /* Get this chnlgrp's factory calibration temperature */
1872                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1873                     temperature;
1874
1875                 /* get power index adjustment based on current and factory
1876                  * temps */
1877                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1878                                                               ref_temp);
1879
1880                 /* set tx power value for all rates, OFDM and CCK */
1881                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1882                      rate_index++) {
1883                         int power_idx =
1884                             ch_info->power_info[rate_index].base_power_index;
1885
1886                         /* temperature compensate */
1887                         power_idx += delta_index;
1888
1889                         /* stay within table range */
1890                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1891                         ch_info->power_info[rate_index].
1892                             power_table_index = (u8) power_idx;
1893                         ch_info->power_info[rate_index].tpc =
1894                             power_gain_table[a_band][power_idx];
1895                 }
1896
1897                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1898                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1899
1900                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1901                 for (scan_tbl_index = 0;
1902                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1903                         s32 actual_index = (scan_tbl_index == 0) ?
1904                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1905                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1906                                            actual_index, clip_pwrs,
1907                                            ch_info, a_band);
1908                 }
1909         }
1910
1911         /* send Txpower command for current channel to ucode */
1912         return iwl3945_hw_reg_send_txpower(priv);
1913 }
1914
1915 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
1916 {
1917         struct iwl3945_channel_info *ch_info;
1918         s8 max_power;
1919         u8 a_band;
1920         u8 i;
1921
1922         if (priv->user_txpower_limit == power) {
1923                 IWL_DEBUG_POWER("Requested Tx power same as current "
1924                                 "limit: %ddBm.\n", power);
1925                 return 0;
1926         }
1927
1928         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1929         priv->user_txpower_limit = power;
1930
1931         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1932
1933         for (i = 0; i < priv->channel_count; i++) {
1934                 ch_info = &priv->channel_info[i];
1935                 a_band = is_channel_a_band(ch_info);
1936
1937                 /* find minimum power of all user and regulatory constraints
1938                  *    (does not consider h/w clipping limitations) */
1939                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1940                 max_power = min(power, max_power);
1941                 if (max_power != ch_info->curr_txpow) {
1942                         ch_info->curr_txpow = max_power;
1943
1944                         /* this considers the h/w clipping limitations */
1945                         iwl3945_hw_reg_set_new_power(priv, ch_info);
1946                 }
1947         }
1948
1949         /* update txpower settings for all channels,
1950          *   send to NIC if associated. */
1951         is_temp_calib_needed(priv);
1952         iwl3945_hw_reg_comp_txpower_temp(priv);
1953
1954         return 0;
1955 }
1956
1957 /* will add 3945 channel switch cmd handling later */
1958 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
1959 {
1960         return 0;
1961 }
1962
1963 /**
1964  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1965  *
1966  * -- reset periodic timer
1967  * -- see if temp has changed enough to warrant re-calibration ... if so:
1968  *     -- correct coeffs for temp (can reset temp timer)
1969  *     -- save this temp as "last",
1970  *     -- send new set of gain settings to NIC
1971  * NOTE:  This should continue working, even when we're not associated,
1972  *   so we can keep our internal table of scan powers current. */
1973 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
1974 {
1975         /* This will kick in the "brute force"
1976          * iwl3945_hw_reg_comp_txpower_temp() below */
1977         if (!is_temp_calib_needed(priv))
1978                 goto reschedule;
1979
1980         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1981          * This is based *only* on current temperature,
1982          * ignoring any previous power measurements */
1983         iwl3945_hw_reg_comp_txpower_temp(priv);
1984
1985  reschedule:
1986         queue_delayed_work(priv->workqueue,
1987                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1988 }
1989
1990 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1991 {
1992         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
1993                                              thermal_periodic.work);
1994
1995         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1996                 return;
1997
1998         mutex_lock(&priv->mutex);
1999         iwl3945_reg_txpower_periodic(priv);
2000         mutex_unlock(&priv->mutex);
2001 }
2002
2003 /**
2004  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2005  *                                 for the channel.
2006  *
2007  * This function is used when initializing channel-info structs.
2008  *
2009  * NOTE: These channel groups do *NOT* match the bands above!
2010  *       These channel groups are based on factory-tested channels;
2011  *       on A-band, EEPROM's "group frequency" entries represent the top
2012  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
2013  */
2014 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2015                                        const struct iwl3945_channel_info *ch_info)
2016 {
2017         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2018         u8 group;
2019         u16 group_index = 0;    /* based on factory calib frequencies */
2020         u8 grp_channel;
2021
2022         /* Find the group index for the channel ... don't use index 1(?) */
2023         if (is_channel_a_band(ch_info)) {
2024                 for (group = 1; group < 5; group++) {
2025                         grp_channel = ch_grp[group].group_channel;
2026                         if (ch_info->channel <= grp_channel) {
2027                                 group_index = group;
2028                                 break;
2029                         }
2030                 }
2031                 /* group 4 has a few channels *above* its factory cal freq */
2032                 if (group == 5)
2033                         group_index = 4;
2034         } else
2035                 group_index = 0;        /* 2.4 GHz, group 0 */
2036
2037         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2038                         group_index);
2039         return group_index;
2040 }
2041
2042 /**
2043  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2044  *
2045  * Interpolate to get nominal (i.e. at factory calibration temperature) index
2046  *   into radio/DSP gain settings table for requested power.
2047  */
2048 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2049                                        s8 requested_power,
2050                                        s32 setting_index, s32 *new_index)
2051 {
2052         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2053         s32 index0, index1;
2054         s32 power = 2 * requested_power;
2055         s32 i;
2056         const struct iwl3945_eeprom_txpower_sample *samples;
2057         s32 gains0, gains1;
2058         s32 res;
2059         s32 denominator;
2060
2061         chnl_grp = &priv->eeprom.groups[setting_index];
2062         samples = chnl_grp->samples;
2063         for (i = 0; i < 5; i++) {
2064                 if (power == samples[i].power) {
2065                         *new_index = samples[i].gain_index;
2066                         return 0;
2067                 }
2068         }
2069
2070         if (power > samples[1].power) {
2071                 index0 = 0;
2072                 index1 = 1;
2073         } else if (power > samples[2].power) {
2074                 index0 = 1;
2075                 index1 = 2;
2076         } else if (power > samples[3].power) {
2077                 index0 = 2;
2078                 index1 = 3;
2079         } else {
2080                 index0 = 3;
2081                 index1 = 4;
2082         }
2083
2084         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2085         if (denominator == 0)
2086                 return -EINVAL;
2087         gains0 = (s32) samples[index0].gain_index * (1 << 19);
2088         gains1 = (s32) samples[index1].gain_index * (1 << 19);
2089         res = gains0 + (gains1 - gains0) *
2090             ((s32) power - (s32) samples[index0].power) / denominator +
2091             (1 << 18);
2092         *new_index = res >> 19;
2093         return 0;
2094 }
2095
2096 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2097 {
2098         u32 i;
2099         s32 rate_index;
2100         const struct iwl3945_eeprom_txpower_group *group;
2101
2102         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2103
2104         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2105                 s8 *clip_pwrs;  /* table of power levels for each rate */
2106                 s8 satur_pwr;   /* saturation power for each chnl group */
2107                 group = &priv->eeprom.groups[i];
2108
2109                 /* sanity check on factory saturation power value */
2110                 if (group->saturation_power < 40) {
2111                         IWL_WARNING("Error: saturation power is %d, "
2112                                     "less than minimum expected 40\n",
2113                                     group->saturation_power);
2114                         return;
2115                 }
2116
2117                 /*
2118                  * Derive requested power levels for each rate, based on
2119                  *   hardware capabilities (saturation power for band).
2120                  * Basic value is 3dB down from saturation, with further
2121                  *   power reductions for highest 3 data rates.  These
2122                  *   backoffs provide headroom for high rate modulation
2123                  *   power peaks, without too much distortion (clipping).
2124                  */
2125                 /* we'll fill in this array with h/w max power levels */
2126                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2127
2128                 /* divide factory saturation power by 2 to find -3dB level */
2129                 satur_pwr = (s8) (group->saturation_power >> 1);
2130
2131                 /* fill in channel group's nominal powers for each rate */
2132                 for (rate_index = 0;
2133                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2134                         switch (rate_index) {
2135                         case IWL_RATE_36M_INDEX_TABLE:
2136                                 if (i == 0)     /* B/G */
2137                                         *clip_pwrs = satur_pwr;
2138                                 else    /* A */
2139                                         *clip_pwrs = satur_pwr - 5;
2140                                 break;
2141                         case IWL_RATE_48M_INDEX_TABLE:
2142                                 if (i == 0)
2143                                         *clip_pwrs = satur_pwr - 7;
2144                                 else
2145                                         *clip_pwrs = satur_pwr - 10;
2146                                 break;
2147                         case IWL_RATE_54M_INDEX_TABLE:
2148                                 if (i == 0)
2149                                         *clip_pwrs = satur_pwr - 9;
2150                                 else
2151                                         *clip_pwrs = satur_pwr - 12;
2152                                 break;
2153                         default:
2154                                 *clip_pwrs = satur_pwr;
2155                                 break;
2156                         }
2157                 }
2158         }
2159 }
2160
2161 /**
2162  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2163  *
2164  * Second pass (during init) to set up priv->channel_info
2165  *
2166  * Set up Tx-power settings in our channel info database for each VALID
2167  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2168  * and current temperature.
2169  *
2170  * Since this is based on current temperature (at init time), these values may
2171  * not be valid for very long, but it gives us a starting/default point,
2172  * and allows us to active (i.e. using Tx) scan.
2173  *
2174  * This does *not* write values to NIC, just sets up our internal table.
2175  */
2176 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2177 {
2178         struct iwl3945_channel_info *ch_info = NULL;
2179         struct iwl3945_channel_power_info *pwr_info;
2180         int delta_index;
2181         u8 rate_index;
2182         u8 scan_tbl_index;
2183         const s8 *clip_pwrs;    /* array of power levels for each rate */
2184         u8 gain, dsp_atten;
2185         s8 power;
2186         u8 pwr_index, base_pwr_index, a_band;
2187         u8 i;
2188         int temperature;
2189
2190         /* save temperature reference,
2191          *   so we can determine next time to calibrate */
2192         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2193         priv->last_temperature = temperature;
2194
2195         iwl3945_hw_reg_init_channel_groups(priv);
2196
2197         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2198         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2199              i++, ch_info++) {
2200                 a_band = is_channel_a_band(ch_info);
2201                 if (!is_channel_valid(ch_info))
2202                         continue;
2203
2204                 /* find this channel's channel group (*not* "band") index */
2205                 ch_info->group_index =
2206                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2207
2208                 /* Get this chnlgrp's rate->max/clip-powers table */
2209                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2210
2211                 /* calculate power index *adjustment* value according to
2212                  *  diff between current temperature and factory temperature */
2213                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2214                                 priv->eeprom.groups[ch_info->group_index].
2215                                 temperature);
2216
2217                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2218                                 ch_info->channel, delta_index, temperature +
2219                                 IWL_TEMP_CONVERT);
2220
2221                 /* set tx power value for all OFDM rates */
2222                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2223                      rate_index++) {
2224                         s32 uninitialized_var(power_idx);
2225                         int rc;
2226
2227                         /* use channel group's clip-power table,
2228                          *   but don't exceed channel's max power */
2229                         s8 pwr = min(ch_info->max_power_avg,
2230                                      clip_pwrs[rate_index]);
2231
2232                         pwr_info = &ch_info->power_info[rate_index];
2233
2234                         /* get base (i.e. at factory-measured temperature)
2235                          *    power table index for this rate's power */
2236                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2237                                                          ch_info->group_index,
2238                                                          &power_idx);
2239                         if (rc) {
2240                                 IWL_ERROR("Invalid power index\n");
2241                                 return rc;
2242                         }
2243                         pwr_info->base_power_index = (u8) power_idx;
2244
2245                         /* temperature compensate */
2246                         power_idx += delta_index;
2247
2248                         /* stay within range of gain table */
2249                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2250
2251                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2252                         pwr_info->requested_power = pwr;
2253                         pwr_info->power_table_index = (u8) power_idx;
2254                         pwr_info->tpc.tx_gain =
2255                             power_gain_table[a_band][power_idx].tx_gain;
2256                         pwr_info->tpc.dsp_atten =
2257                             power_gain_table[a_band][power_idx].dsp_atten;
2258                 }
2259
2260                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2261                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2262                 power = pwr_info->requested_power +
2263                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2264                 pwr_index = pwr_info->power_table_index +
2265                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2266                 base_pwr_index = pwr_info->base_power_index +
2267                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2268
2269                 /* stay within table range */
2270                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2271                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2272                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2273
2274                 /* fill each CCK rate's iwl3945_channel_power_info structure
2275                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2276                  * NOTE:  CCK rates start at end of OFDM rates! */
2277                 for (rate_index = 0;
2278                      rate_index < IWL_CCK_RATES; rate_index++) {
2279                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2280                         pwr_info->requested_power = power;
2281                         pwr_info->power_table_index = pwr_index;
2282                         pwr_info->base_power_index = base_pwr_index;
2283                         pwr_info->tpc.tx_gain = gain;
2284                         pwr_info->tpc.dsp_atten = dsp_atten;
2285                 }
2286
2287                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2288                 for (scan_tbl_index = 0;
2289                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2290                         s32 actual_index = (scan_tbl_index == 0) ?
2291                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2292                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2293                                 actual_index, clip_pwrs, ch_info, a_band);
2294                 }
2295         }
2296
2297         return 0;
2298 }
2299
2300 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2301 {
2302         int rc;
2303         unsigned long flags;
2304
2305         spin_lock_irqsave(&priv->lock, flags);
2306         rc = iwl3945_grab_nic_access(priv);
2307         if (rc) {
2308                 spin_unlock_irqrestore(&priv->lock, flags);
2309                 return rc;
2310         }
2311
2312         iwl3945_write_direct32(priv, FH39_RCSR_CONFIG(0), 0);
2313         rc = iwl3945_poll_direct_bit(priv, FH39_RSSR_STATUS,
2314                         FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
2315         if (rc < 0)
2316                 IWL_ERROR("Can't stop Rx DMA.\n");
2317
2318         iwl3945_release_nic_access(priv);
2319         spin_unlock_irqrestore(&priv->lock, flags);
2320
2321         return 0;
2322 }
2323
2324 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2325 {
2326         int rc;
2327         unsigned long flags;
2328         int txq_id = txq->q.id;
2329
2330         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2331
2332         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2333
2334         spin_lock_irqsave(&priv->lock, flags);
2335         rc = iwl3945_grab_nic_access(priv);
2336         if (rc) {
2337                 spin_unlock_irqrestore(&priv->lock, flags);
2338                 return rc;
2339         }
2340         iwl3945_write_direct32(priv, FH39_CBCC_CTRL(txq_id), 0);
2341         iwl3945_write_direct32(priv, FH39_CBCC_BASE(txq_id), 0);
2342
2343         iwl3945_write_direct32(priv, FH39_TCSR_CONFIG(txq_id),
2344                 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2345                 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2346                 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2347                 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2348                 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2349         iwl3945_release_nic_access(priv);
2350
2351         /* fake read to flush all prev. writes */
2352         iwl3945_read32(priv, FH39_TSSR_CBB_BASE);
2353         spin_unlock_irqrestore(&priv->lock, flags);
2354
2355         return 0;
2356 }
2357
2358 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2359 {
2360         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2361
2362         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2363 }
2364
2365 /**
2366  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2367  */
2368 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2369 {
2370         int rc, i, index, prev_index;
2371         struct iwl3945_rate_scaling_cmd rate_cmd = {
2372                 .reserved = {0, 0, 0},
2373         };
2374         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2375
2376         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2377                 index = iwl3945_rates[i].table_rs_index;
2378
2379                 table[index].rate_n_flags =
2380                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2381                 table[index].try_cnt = priv->retry_rate;
2382                 prev_index = iwl3945_get_prev_ieee_rate(i);
2383                 table[index].next_rate_index =
2384                                 iwl3945_rates[prev_index].table_rs_index;
2385         }
2386
2387         switch (priv->band) {
2388         case IEEE80211_BAND_5GHZ:
2389                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2390                 /* If one of the following CCK rates is used,
2391                  * have it fall back to the 6M OFDM rate */
2392                 for (i = IWL_RATE_1M_INDEX_TABLE;
2393                         i <= IWL_RATE_11M_INDEX_TABLE; i++)
2394                         table[i].next_rate_index =
2395                           iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2396
2397                 /* Don't fall back to CCK rates */
2398                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index =
2399                                                 IWL_RATE_9M_INDEX_TABLE;
2400
2401                 /* Don't drop out of OFDM rates */
2402                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2403                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2404                 break;
2405
2406         case IEEE80211_BAND_2GHZ:
2407                 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2408                 /* If an OFDM rate is used, have it fall back to the
2409                  * 1M CCK rates */
2410
2411                 if (!(priv->sta_supp_rates & IWL_OFDM_RATES_MASK) &&
2412                     iwl3945_is_associated(priv)) {
2413
2414                         index = IWL_FIRST_CCK_RATE;
2415                         for (i = IWL_RATE_6M_INDEX_TABLE;
2416                              i <= IWL_RATE_54M_INDEX_TABLE; i++)
2417                                 table[i].next_rate_index =
2418                                         iwl3945_rates[index].table_rs_index;
2419
2420                         index = IWL_RATE_11M_INDEX_TABLE;
2421                         /* CCK shouldn't fall back to OFDM... */
2422                         table[index].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2423                 }
2424                 break;
2425
2426         default:
2427                 WARN_ON(1);
2428                 break;
2429         }
2430
2431         /* Update the rate scaling for control frame Tx */
2432         rate_cmd.table_id = 0;
2433         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2434                               &rate_cmd);
2435         if (rc)
2436                 return rc;
2437
2438         /* Update the rate scaling for data frame Tx */
2439         rate_cmd.table_id = 1;
2440         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2441                                 &rate_cmd);
2442 }
2443
2444 /* Called when initializing driver */
2445 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2446 {
2447         memset((void *)&priv->hw_setting, 0,
2448                sizeof(struct iwl3945_driver_hw_info));
2449
2450         priv->hw_setting.shared_virt =
2451             pci_alloc_consistent(priv->pci_dev,
2452                                  sizeof(struct iwl3945_shared),
2453                                  &priv->hw_setting.shared_phys);
2454
2455         if (!priv->hw_setting.shared_virt) {
2456                 IWL_ERROR("failed to allocate pci memory\n");
2457                 mutex_unlock(&priv->mutex);
2458                 return -ENOMEM;
2459         }
2460
2461         priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2462         priv->hw_setting.max_pkt_size = 2342;
2463         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2464         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2465         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2466         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2467         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2468
2469         priv->hw_setting.tx_ant_num = 2;
2470         return 0;
2471 }
2472
2473 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2474                           struct iwl3945_frame *frame, u8 rate)
2475 {
2476         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2477         unsigned int frame_size;
2478
2479         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2480         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2481
2482         tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2483         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2484
2485         frame_size = iwl3945_fill_beacon_frame(priv,
2486                                 tx_beacon_cmd->frame,
2487                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2488
2489         BUG_ON(frame_size > MAX_MPDU_SIZE);
2490         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2491
2492         tx_beacon_cmd->tx.rate = rate;
2493         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2494                                       TX_CMD_FLG_TSF_MSK);
2495
2496         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2497         tx_beacon_cmd->tx.supp_rates[0] =
2498                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2499
2500         tx_beacon_cmd->tx.supp_rates[1] =
2501                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2502
2503         return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size;
2504 }
2505
2506 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2507 {
2508         priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2509         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2510 }
2511
2512 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2513 {
2514         INIT_DELAYED_WORK(&priv->thermal_periodic,
2515                           iwl3945_bg_reg_txpower_periodic);
2516 }
2517
2518 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2519 {
2520         cancel_delayed_work(&priv->thermal_periodic);
2521 }
2522
2523 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2524         .name = "3945BG",
2525         .fw_name_pre = IWL3945_FW_PRE,
2526         .ucode_api_max = IWL3945_UCODE_API_MAX,
2527         .ucode_api_min = IWL3945_UCODE_API_MIN,
2528         .sku = IWL_SKU_G,
2529 };
2530
2531 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2532         .name = "3945ABG",
2533         .fw_name_pre = IWL3945_FW_PRE,
2534         .ucode_api_max = IWL3945_UCODE_API_MAX,
2535         .ucode_api_min = IWL3945_UCODE_API_MIN,
2536         .sku = IWL_SKU_A|IWL_SKU_G,
2537 };
2538
2539 struct pci_device_id iwl3945_hw_card_ids[] = {
2540         {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2541         {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2542         {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2543         {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2544         {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2545         {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2546         {0}
2547 };
2548
2549 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);