drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c

   1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
   2 /*
   3  * Copyright (C) 2005-2014, 2018-2023 Intel Corporation
   4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
   5  * Copyright (C) 2016-2017 Intel Deutschland GmbH
   6  */
   7 #include <linux/types.h>
   8 #include <linux/slab.h>
   9 #include <linux/export.h>
  10 #include <linux/etherdevice.h>
  11 #include <linux/pci.h>
  12 #include <linux/firmware.h>
  13
  14 #include "iwl-drv.h"
  15 #include "iwl-modparams.h"
  16 #include "iwl-nvm-parse.h"
  17 #include "iwl-prph.h"
  18 #include "iwl-io.h"
  19 #include "iwl-csr.h"
  20 #include "fw/acpi.h"
  21 #include "fw/api/nvm-reg.h"
  22 #include "fw/api/commands.h"
  23 #include "fw/api/cmdhdr.h"
  24 #include "fw/img.h"
  25 #include "mei/iwl-mei.h"
  26
  27 /* NVM offsets (in words) definitions */
  28 enum nvm_offsets {
  29         /* NVM HW-Section offset (in words) definitions */
  30         SUBSYSTEM_ID = 0x0A,
  31         HW_ADDR = 0x15,
  32
  33         /* NVM SW-Section offset (in words) definitions */
  34         NVM_SW_SECTION = 0x1C0,
  35         NVM_VERSION = 0,
  36         RADIO_CFG = 1,
  37         SKU = 2,
  38         N_HW_ADDRS = 3,
  39         NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
  40
  41         /* NVM calibration section offset (in words) definitions */
  42         NVM_CALIB_SECTION = 0x2B8,
  43         XTAL_CALIB = 0x316 - NVM_CALIB_SECTION,
  44
  45         /* NVM REGULATORY -Section offset (in words) definitions */
  46         NVM_CHANNELS_SDP = 0,
  47 };
  48
  49 enum ext_nvm_offsets {
  50         /* NVM HW-Section offset (in words) definitions */
  51         MAC_ADDRESS_OVERRIDE_EXT_NVM = 1,
  52
  53         /* NVM SW-Section offset (in words) definitions */
  54         NVM_VERSION_EXT_NVM = 0,
  55         N_HW_ADDRS_FAMILY_8000 = 3,
  56
  57         /* NVM PHY_SKU-Section offset (in words) definitions */
  58         RADIO_CFG_FAMILY_EXT_NVM = 0,
  59         SKU_FAMILY_8000 = 2,
  60
  61         /* NVM REGULATORY -Section offset (in words) definitions */
  62         NVM_CHANNELS_EXTENDED = 0,
  63         NVM_LAR_OFFSET_OLD = 0x4C7,
  64         NVM_LAR_OFFSET = 0x507,
  65         NVM_LAR_ENABLED = 0x7,
  66 };
  67
  68 /* SKU Capabilities (actual values from NVM definition) */
  69 enum nvm_sku_bits {
  70         NVM_SKU_CAP_BAND_24GHZ          = BIT(0),
  71         NVM_SKU_CAP_BAND_52GHZ          = BIT(1),
  72         NVM_SKU_CAP_11N_ENABLE          = BIT(2),
  73         NVM_SKU_CAP_11AC_ENABLE         = BIT(3),
  74         NVM_SKU_CAP_MIMO_DISABLE        = BIT(5),
  75 };
  76
  77 /*
  78  * These are the channel numbers in the order that they are stored in the NVM
  79  */
  80 static const u16 iwl_nvm_channels[] = {
  81         /* 2.4 GHz */
  82         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
  83         /* 5 GHz */
  84         36, 40, 44, 48, 52, 56, 60, 64,
  85         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
  86         149, 153, 157, 161, 165
  87 };
  88
  89 static const u16 iwl_ext_nvm_channels[] = {
  90         /* 2.4 GHz */
  91         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
  92         /* 5 GHz */
  93         36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
  94         96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
  95         149, 153, 157, 161, 165, 169, 173, 177, 181
  96 };
  97
  98 static const u16 iwl_uhb_nvm_channels[] = {
  99         /* 2.4 GHz */
 100         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
 101         /* 5 GHz */
 102         36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
 103         96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
 104         149, 153, 157, 161, 165, 169, 173, 177, 181,
 105         /* 6-7 GHz */
 106         1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45, 49, 53, 57, 61, 65, 69,
 107         73, 77, 81, 85, 89, 93, 97, 101, 105, 109, 113, 117, 121, 125, 129,
 108         133, 137, 141, 145, 149, 153, 157, 161, 165, 169, 173, 177, 181, 185,
 109         189, 193, 197, 201, 205, 209, 213, 217, 221, 225, 229, 233
 110 };
 111
 112 #define IWL_NVM_NUM_CHANNELS            ARRAY_SIZE(iwl_nvm_channels)
 113 #define IWL_NVM_NUM_CHANNELS_EXT        ARRAY_SIZE(iwl_ext_nvm_channels)
 114 #define IWL_NVM_NUM_CHANNELS_UHB        ARRAY_SIZE(iwl_uhb_nvm_channels)
 115 #define NUM_2GHZ_CHANNELS               14
 116 #define NUM_5GHZ_CHANNELS               37
 117 #define FIRST_2GHZ_HT_MINUS             5
 118 #define LAST_2GHZ_HT_PLUS               9
 119 #define N_HW_ADDR_MASK                  0xF
 120
 121 /* rate data (static) */
 122 static struct ieee80211_rate iwl_cfg80211_rates[] = {
 123         { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
 124         { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
 125           .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
 126         { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
 127           .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
 128         { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
 129           .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
 130         { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
 131         { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
 132         { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
 133         { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
 134         { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
 135         { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
 136         { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
 137         { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
 138 };
 139 #define RATES_24_OFFS   0
 140 #define N_RATES_24      ARRAY_SIZE(iwl_cfg80211_rates)
 141 #define RATES_52_OFFS   4
 142 #define N_RATES_52      (N_RATES_24 - RATES_52_OFFS)
 143
 144 /**
 145  * enum iwl_nvm_channel_flags - channel flags in NVM
 146  * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
 147  * @NVM_CHANNEL_IBSS: usable as an IBSS channel
 148  * @NVM_CHANNEL_ACTIVE: active scanning allowed
 149  * @NVM_CHANNEL_RADAR: radar detection required
 150  * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed
 151  * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS
 152  *      on same channel on 2.4 or same UNII band on 5.2
 153  * @NVM_CHANNEL_UNIFORM: uniform spreading required
 154  * @NVM_CHANNEL_20MHZ: 20 MHz channel okay
 155  * @NVM_CHANNEL_40MHZ: 40 MHz channel okay
 156  * @NVM_CHANNEL_80MHZ: 80 MHz channel okay
 157  * @NVM_CHANNEL_160MHZ: 160 MHz channel okay
 158  * @NVM_CHANNEL_DC_HIGH: DC HIGH required/allowed (?)
 159  */
 160 enum iwl_nvm_channel_flags {
 161         NVM_CHANNEL_VALID               = BIT(0),
 162         NVM_CHANNEL_IBSS                = BIT(1),
 163         NVM_CHANNEL_ACTIVE              = BIT(3),
 164         NVM_CHANNEL_RADAR               = BIT(4),
 165         NVM_CHANNEL_INDOOR_ONLY         = BIT(5),
 166         NVM_CHANNEL_GO_CONCURRENT       = BIT(6),
 167         NVM_CHANNEL_UNIFORM             = BIT(7),
 168         NVM_CHANNEL_20MHZ               = BIT(8),
 169         NVM_CHANNEL_40MHZ               = BIT(9),
 170         NVM_CHANNEL_80MHZ               = BIT(10),
 171         NVM_CHANNEL_160MHZ              = BIT(11),
 172         NVM_CHANNEL_DC_HIGH             = BIT(12),
 173 };
 174
 175 /**
 176  * enum iwl_reg_capa_flags_v1 - global flags applied for the whole regulatory
 177  * domain.
 178  * @REG_CAPA_V1_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the
 179  *      2.4Ghz band is allowed.
 180  * @REG_CAPA_V1_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the
 181  *      5Ghz band is allowed.
 182  * @REG_CAPA_V1_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed
 183  *      for this regulatory domain (valid only in 5Ghz).
 184  * @REG_CAPA_V1_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed
 185  *      for this regulatory domain (valid only in 5Ghz).
 186  * @REG_CAPA_V1_MCS_8_ALLOWED: 11ac with MCS 8 is allowed.
 187  * @REG_CAPA_V1_MCS_9_ALLOWED: 11ac with MCS 9 is allowed.
 188  * @REG_CAPA_V1_40MHZ_FORBIDDEN: 11n channel with a width of 40Mhz is forbidden
 189  *      for this regulatory domain (valid only in 5Ghz).
 190  * @REG_CAPA_V1_DC_HIGH_ENABLED: DC HIGH allowed.
 191  * @REG_CAPA_V1_11AX_DISABLED: 11ax is forbidden for this regulatory domain.
 192  */
 193 enum iwl_reg_capa_flags_v1 {
 194         REG_CAPA_V1_BF_CCD_LOW_BAND     = BIT(0),
 195         REG_CAPA_V1_BF_CCD_HIGH_BAND    = BIT(1),
 196         REG_CAPA_V1_160MHZ_ALLOWED      = BIT(2),
 197         REG_CAPA_V1_80MHZ_ALLOWED       = BIT(3),
 198         REG_CAPA_V1_MCS_8_ALLOWED       = BIT(4),
 199         REG_CAPA_V1_MCS_9_ALLOWED       = BIT(5),
 200         REG_CAPA_V1_40MHZ_FORBIDDEN     = BIT(7),
 201         REG_CAPA_V1_DC_HIGH_ENABLED     = BIT(9),
 202         REG_CAPA_V1_11AX_DISABLED       = BIT(10),
 203 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_1 */
 204
 205 /**
 206  * enum iwl_reg_capa_flags_v2 - global flags applied for the whole regulatory
 207  * domain (version 2).
 208  * @REG_CAPA_V2_STRADDLE_DISABLED: Straddle channels (144, 142, 138) are
 209  *      disabled.
 210  * @REG_CAPA_V2_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the
 211  *      2.4Ghz band is allowed.
 212  * @REG_CAPA_V2_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the
 213  *      5Ghz band is allowed.
 214  * @REG_CAPA_V2_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed
 215  *      for this regulatory domain (valid only in 5Ghz).
 216  * @REG_CAPA_V2_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed
 217  *      for this regulatory domain (valid only in 5Ghz).
 218  * @REG_CAPA_V2_MCS_8_ALLOWED: 11ac with MCS 8 is allowed.
 219  * @REG_CAPA_V2_MCS_9_ALLOWED: 11ac with MCS 9 is allowed.
 220  * @REG_CAPA_V2_WEATHER_DISABLED: Weather radar channels (120, 124, 128, 118,
 221  *      126, 122) are disabled.
 222  * @REG_CAPA_V2_40MHZ_ALLOWED: 11n channel with a width of 40Mhz is allowed
 223  *      for this regulatory domain (uvalid only in 5Ghz).
 224  * @REG_CAPA_V2_11AX_DISABLED: 11ax is forbidden for this regulatory domain.
 225  */
 226 enum iwl_reg_capa_flags_v2 {
 227         REG_CAPA_V2_STRADDLE_DISABLED   = BIT(0),
 228         REG_CAPA_V2_BF_CCD_LOW_BAND     = BIT(1),
 229         REG_CAPA_V2_BF_CCD_HIGH_BAND    = BIT(2),
 230         REG_CAPA_V2_160MHZ_ALLOWED      = BIT(3),
 231         REG_CAPA_V2_80MHZ_ALLOWED       = BIT(4),
 232         REG_CAPA_V2_MCS_8_ALLOWED       = BIT(5),
 233         REG_CAPA_V2_MCS_9_ALLOWED       = BIT(6),
 234         REG_CAPA_V2_WEATHER_DISABLED    = BIT(7),
 235         REG_CAPA_V2_40MHZ_ALLOWED       = BIT(8),
 236         REG_CAPA_V2_11AX_DISABLED       = BIT(10),
 237 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_2 */
 238
 239 /**
 240  * enum iwl_reg_capa_flags_v4 - global flags applied for the whole regulatory
 241  * domain.
 242  * @REG_CAPA_V4_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed
 243  *      for this regulatory domain (valid only in 5Ghz).
 244  * @REG_CAPA_V4_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed
 245  *      for this regulatory domain (valid only in 5Ghz).
 246  * @REG_CAPA_V4_MCS_12_ALLOWED: 11ac with MCS 12 is allowed.
 247  * @REG_CAPA_V4_MCS_13_ALLOWED: 11ac with MCS 13 is allowed.
 248  * @REG_CAPA_V4_11BE_DISABLED: 11be is forbidden for this regulatory domain.
 249  * @REG_CAPA_V4_11AX_DISABLED: 11ax is forbidden for this regulatory domain.
 250  * @REG_CAPA_V4_320MHZ_ALLOWED: 11be channel with a width of 320Mhz is allowed
 251  *      for this regulatory domain (valid only in 5GHz).
 252  */
 253 enum iwl_reg_capa_flags_v4 {
 254         REG_CAPA_V4_160MHZ_ALLOWED              = BIT(3),
 255         REG_CAPA_V4_80MHZ_ALLOWED               = BIT(4),
 256         REG_CAPA_V4_MCS_12_ALLOWED              = BIT(5),
 257         REG_CAPA_V4_MCS_13_ALLOWED              = BIT(6),
 258         REG_CAPA_V4_11BE_DISABLED               = BIT(8),
 259         REG_CAPA_V4_11AX_DISABLED               = BIT(13),
 260         REG_CAPA_V4_320MHZ_ALLOWED              = BIT(16),
 261 }; /* GEO_CHANNEL_CAPABILITIES_API_S_VER_4 */
 262
 263 /*
 264 * API v2 for reg_capa_flags is relevant from version 6 and onwards of the
 265 * MCC update command response.
 266 */
 267 #define REG_CAPA_V2_RESP_VER    6
 268
 269 /* API v4 for reg_capa_flags is relevant from version 8 and onwards of the
 270  * MCC update command response.
 271  */
 272 #define REG_CAPA_V4_RESP_VER    8
 273
 274 /**
 275  * struct iwl_reg_capa - struct for global regulatory capabilities, Used for
 276  * handling the different APIs of reg_capa_flags.
 277  *
 278  * @allow_40mhz: 11n channel with a width of 40Mhz is allowed
 279  *      for this regulatory domain.
 280  * @allow_80mhz: 11ac channel with a width of 80Mhz is allowed
 281  *      for this regulatory domain (valid only in 5 and 6 Ghz).
 282  * @allow_160mhz: 11ac channel with a width of 160Mhz is allowed
 283  *      for this regulatory domain (valid only in 5 and 6 Ghz).
 284  * @allow_320mhz: 11be channel with a width of 320Mhz is allowed
 285  *      for this regulatory domain (valid only in 6 Ghz).
 286  * @disable_11ax: 11ax is forbidden for this regulatory domain.
 287  * @disable_11be: 11be is forbidden for this regulatory domain.
 288  */
 289 struct iwl_reg_capa {
 290         bool allow_40mhz;
 291         bool allow_80mhz;
 292         bool allow_160mhz;
 293         bool allow_320mhz;
 294         bool disable_11ax;
 295         bool disable_11be;
 296 };
 297
 298 static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level,
 299                                                int chan, u32 flags)
 300 {
 301 #define CHECK_AND_PRINT_I(x)    \
 302         ((flags & NVM_CHANNEL_##x) ? " " #x : "")
 303
 304         if (!(flags & NVM_CHANNEL_VALID)) {
 305                 IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n",
 306                               chan, flags);
 307                 return;
 308         }
 309
 310         /* Note: already can print up to 101 characters, 110 is the limit! */
 311         IWL_DEBUG_DEV(dev, level,
 312                       "Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s\n",
 313                       chan, flags,
 314                       CHECK_AND_PRINT_I(VALID),
 315                       CHECK_AND_PRINT_I(IBSS),
 316                       CHECK_AND_PRINT_I(ACTIVE),
 317                       CHECK_AND_PRINT_I(RADAR),
 318                       CHECK_AND_PRINT_I(INDOOR_ONLY),
 319                       CHECK_AND_PRINT_I(GO_CONCURRENT),
 320                       CHECK_AND_PRINT_I(UNIFORM),
 321                       CHECK_AND_PRINT_I(20MHZ),
 322                       CHECK_AND_PRINT_I(40MHZ),
 323                       CHECK_AND_PRINT_I(80MHZ),
 324                       CHECK_AND_PRINT_I(160MHZ),
 325                       CHECK_AND_PRINT_I(DC_HIGH));
 326 #undef CHECK_AND_PRINT_I
 327 }
 328
 329 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, enum nl80211_band band,
 330                                  u32 nvm_flags, const struct iwl_cfg *cfg)
 331 {
 332         u32 flags = IEEE80211_CHAN_NO_HT40;
 333
 334         if (band == NL80211_BAND_2GHZ && (nvm_flags & NVM_CHANNEL_40MHZ)) {
 335                 if (ch_num <= LAST_2GHZ_HT_PLUS)
 336                         flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
 337                 if (ch_num >= FIRST_2GHZ_HT_MINUS)
 338                         flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
 339         } else if (nvm_flags & NVM_CHANNEL_40MHZ) {
 340                 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
 341                         flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
 342                 else
 343                         flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
 344         }
 345         if (!(nvm_flags & NVM_CHANNEL_80MHZ))
 346                 flags |= IEEE80211_CHAN_NO_80MHZ;
 347         if (!(nvm_flags & NVM_CHANNEL_160MHZ))
 348                 flags |= IEEE80211_CHAN_NO_160MHZ;
 349
 350         if (!(nvm_flags & NVM_CHANNEL_IBSS))
 351                 flags |= IEEE80211_CHAN_NO_IR;
 352
 353         if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
 354                 flags |= IEEE80211_CHAN_NO_IR;
 355
 356         if (nvm_flags & NVM_CHANNEL_RADAR)
 357                 flags |= IEEE80211_CHAN_RADAR;
 358
 359         if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
 360                 flags |= IEEE80211_CHAN_INDOOR_ONLY;
 361
 362         /* Set the GO concurrent flag only in case that NO_IR is set.
 363          * Otherwise it is meaningless
 364          */
 365         if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
 366             (flags & IEEE80211_CHAN_NO_IR))
 367                 flags |= IEEE80211_CHAN_IR_CONCURRENT;
 368
 369         return flags;
 370 }
 371
 372 static enum nl80211_band iwl_nl80211_band_from_channel_idx(int ch_idx)
 373 {
 374         if (ch_idx >= NUM_2GHZ_CHANNELS + NUM_5GHZ_CHANNELS) {
 375                 return NL80211_BAND_6GHZ;
 376         }
 377
 378         if (ch_idx >= NUM_2GHZ_CHANNELS)
 379                 return NL80211_BAND_5GHZ;
 380         return NL80211_BAND_2GHZ;
 381 }
 382
 383 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
 384                                 struct iwl_nvm_data *data,
 385                                 const void * const nvm_ch_flags,
 386                                 u32 sbands_flags, bool v4)
 387 {
 388         int ch_idx;
 389         int n_channels = 0;
 390         struct ieee80211_channel *channel;
 391         u32 ch_flags;
 392         int num_of_ch;
 393         const u16 *nvm_chan;
 394
 395         if (cfg->uhb_supported) {
 396                 num_of_ch = IWL_NVM_NUM_CHANNELS_UHB;
 397                 nvm_chan = iwl_uhb_nvm_channels;
 398         } else if (cfg->nvm_type == IWL_NVM_EXT) {
 399                 num_of_ch = IWL_NVM_NUM_CHANNELS_EXT;
 400                 nvm_chan = iwl_ext_nvm_channels;
 401         } else {
 402                 num_of_ch = IWL_NVM_NUM_CHANNELS;
 403                 nvm_chan = iwl_nvm_channels;
 404         }
 405
 406         for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
 407                 enum nl80211_band band =
 408                         iwl_nl80211_band_from_channel_idx(ch_idx);
 409
 410                 if (v4)
 411                         ch_flags =
 412                                 __le32_to_cpup((const __le32 *)nvm_ch_flags + ch_idx);
 413                 else
 414                         ch_flags =
 415                                 __le16_to_cpup((const __le16 *)nvm_ch_flags + ch_idx);
 416
 417                 if (band == NL80211_BAND_5GHZ &&
 418                     !data->sku_cap_band_52ghz_enable)
 419                         continue;
 420
 421                 /* workaround to disable wide channels in 5GHz */
 422                 if ((sbands_flags & IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ) &&
 423                     band == NL80211_BAND_5GHZ) {
 424                         ch_flags &= ~(NVM_CHANNEL_40MHZ |
 425                                      NVM_CHANNEL_80MHZ |
 426                                      NVM_CHANNEL_160MHZ);
 427                 }
 428
 429                 if (ch_flags & NVM_CHANNEL_160MHZ)
 430                         data->vht160_supported = true;
 431
 432                 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR) &&
 433                     !(ch_flags & NVM_CHANNEL_VALID)) {
 434                         /*
 435                          * Channels might become valid later if lar is
 436                          * supported, hence we still want to add them to
 437                          * the list of supported channels to cfg80211.
 438                          */
 439                         iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
 440                                                     nvm_chan[ch_idx], ch_flags);
 441                         continue;
 442                 }
 443
 444                 channel = &data->channels[n_channels];
 445                 n_channels++;
 446
 447                 channel->hw_value = nvm_chan[ch_idx];
 448                 channel->band = band;
 449                 channel->center_freq =
 450                         ieee80211_channel_to_frequency(
 451                                 channel->hw_value, channel->band);
 452
 453                 /* Initialize regulatory-based run-time data */
 454
 455                 /*
 456                  * Default value - highest tx power value.  max_power
 457                  * is not used in mvm, and is used for backwards compatibility
 458                  */
 459                 channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
 460
 461                 /* don't put limitations in case we're using LAR */
 462                 if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR))
 463                         channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
 464                                                                ch_idx, band,
 465                                                                ch_flags, cfg);
 466                 else
 467                         channel->flags = 0;
 468
 469                 /* TODO: Don't put limitations on UHB devices as we still don't
 470                  * have NVM for them
 471                  */
 472                 if (cfg->uhb_supported)
 473                         channel->flags = 0;
 474                 iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
 475                                             channel->hw_value, ch_flags);
 476                 IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n",
 477                                  channel->hw_value, channel->max_power);
 478         }
 479
 480         return n_channels;
 481 }
 482
 483 static void iwl_init_vht_hw_capab(struct iwl_trans *trans,
 484                                   struct iwl_nvm_data *data,
 485                                   struct ieee80211_sta_vht_cap *vht_cap,
 486                                   u8 tx_chains, u8 rx_chains)
 487 {
 488         const struct iwl_cfg *cfg = trans->cfg;
 489         int num_rx_ants = num_of_ant(rx_chains);
 490         int num_tx_ants = num_of_ant(tx_chains);
 491
 492         vht_cap->vht_supported = true;
 493
 494         vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
 495                        IEEE80211_VHT_CAP_RXSTBC_1 |
 496                        IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
 497                        3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT |
 498                        IEEE80211_VHT_MAX_AMPDU_1024K <<
 499                        IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
 500
 501         if (!trans->cfg->ht_params->stbc)
 502                 vht_cap->cap &= ~IEEE80211_VHT_CAP_RXSTBC_MASK;
 503
 504         if (data->vht160_supported)
 505                 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
 506                                 IEEE80211_VHT_CAP_SHORT_GI_160;
 507
 508         if (cfg->vht_mu_mimo_supported)
 509                 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE;
 510
 511         if (cfg->ht_params->ldpc)
 512                 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
 513
 514         if (data->sku_cap_mimo_disabled) {
 515                 num_rx_ants = 1;
 516                 num_tx_ants = 1;
 517         }
 518
 519         if (trans->cfg->ht_params->stbc && num_tx_ants > 1)
 520                 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
 521         else
 522                 vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
 523
 524         switch (iwlwifi_mod_params.amsdu_size) {
 525         case IWL_AMSDU_DEF:
 526                 if (trans->trans_cfg->mq_rx_supported)
 527                         vht_cap->cap |=
 528                                 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
 529                 else
 530                         vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
 531                 break;
 532         case IWL_AMSDU_2K:
 533                 if (trans->trans_cfg->mq_rx_supported)
 534                         vht_cap->cap |=
 535                                 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
 536                 else
 537                         WARN(1, "RB size of 2K is not supported by this device\n");
 538                 break;
 539         case IWL_AMSDU_4K:
 540                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
 541                 break;
 542         case IWL_AMSDU_8K:
 543                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
 544                 break;
 545         case IWL_AMSDU_12K:
 546                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
 547                 break;
 548         default:
 549                 break;
 550         }
 551
 552         vht_cap->vht_mcs.rx_mcs_map =
 553                 cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
 554                             IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
 555                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
 556                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
 557                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
 558                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
 559                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
 560                             IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
 561
 562         if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) {
 563                 vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;
 564                 /* this works because NOT_SUPPORTED == 3 */
 565                 vht_cap->vht_mcs.rx_mcs_map |=
 566                         cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
 567         }
 568
 569         vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
 570
 571         vht_cap->vht_mcs.tx_highest |=
 572                 cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE);
 573 }
 574
 575 static const u8 iwl_vendor_caps[] = {
 576         0xdd,                   /* vendor element */
 577         0x06,                   /* length */
 578         0x00, 0x17, 0x35,       /* Intel OUI */
 579         0x08,                   /* type (Intel Capabilities) */
 580         /* followed by 16 bits of capabilities */
 581 #define IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE      BIT(0)
 582         IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE,
 583         0x00
 584 };
 585
 586 static const struct ieee80211_sband_iftype_data iwl_he_eht_capa[] = {
 587         {
 588                 .types_mask = BIT(NL80211_IFTYPE_STATION),
 589                 .he_cap = {
 590                         .has_he = true,
 591                         .he_cap_elem = {
 592                                 .mac_cap_info[0] =
 593                                         IEEE80211_HE_MAC_CAP0_HTC_HE,
 594                                 .mac_cap_info[1] =
 595                                         IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
 596                                         IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
 597                                 .mac_cap_info[2] =
 598                                         IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP,
 599                                 .mac_cap_info[3] =
 600                                         IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
 601                                         IEEE80211_HE_MAC_CAP3_RX_CTRL_FRAME_TO_MULTIBSS,
 602                                 .mac_cap_info[4] =
 603                                         IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU |
 604                                         IEEE80211_HE_MAC_CAP4_MULTI_TID_AGG_TX_QOS_B39,
 605                                 .mac_cap_info[5] =
 606                                         IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B40 |
 607                                         IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B41 |
 608                                         IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU |
 609                                         IEEE80211_HE_MAC_CAP5_HE_DYNAMIC_SM_PS |
 610                                         IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX,
 611                                 .phy_cap_info[1] =
 612                                         IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |
 613                                         IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
 614                                         IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD,
 615                                 .phy_cap_info[2] =
 616                                         IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
 617                                         IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ,
 618                                 .phy_cap_info[3] =
 619                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK |
 620                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 |
 621                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK |
 622                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1,
 623                                 .phy_cap_info[4] =
 624                                         IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
 625                                         IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_8 |
 626                                         IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_8,
 627                                 .phy_cap_info[6] =
 628                                         IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
 629                                         IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB |
 630                                         IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT,
 631                                 .phy_cap_info[7] =
 632                                         IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
 633                                         IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI,
 634                                 .phy_cap_info[8] =
 635                                         IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
 636                                         IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
 637                                         IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
 638                                         IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
 639                                         IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242,
 640                                 .phy_cap_info[9] =
 641                                         IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
 642                                         IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB |
 643                                         (IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED <<
 644                                         IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_POS),
 645                                 .phy_cap_info[10] =
 646                                         IEEE80211_HE_PHY_CAP10_HE_MU_M1RU_MAX_LTF,
 647                         },
 648                         /*
 649                          * Set default Tx/Rx HE MCS NSS Support field.
 650                          * Indicate support for up to 2 spatial streams and all
 651                          * MCS, without any special cases
 652                          */
 653                         .he_mcs_nss_supp = {
 654                                 .rx_mcs_80 = cpu_to_le16(0xfffa),
 655                                 .tx_mcs_80 = cpu_to_le16(0xfffa),
 656                                 .rx_mcs_160 = cpu_to_le16(0xfffa),
 657                                 .tx_mcs_160 = cpu_to_le16(0xfffa),
 658                                 .rx_mcs_80p80 = cpu_to_le16(0xffff),
 659                                 .tx_mcs_80p80 = cpu_to_le16(0xffff),
 660                         },
 661                         /*
 662                          * Set default PPE thresholds, with PPET16 set to 0,
 663                          * PPET8 set to 7
 664                          */
 665                         .ppe_thres = {0x61, 0x1c, 0xc7, 0x71},
 666                 },
 667                 .eht_cap = {
 668                         .has_eht = true,
 669                         .eht_cap_elem = {
 670                                 .mac_cap_info[0] =
 671                                         IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |
 672                                         IEEE80211_EHT_MAC_CAP0_OM_CONTROL |
 673                                         IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 |
 674                                         IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2 |
 675                                         IEEE80211_EHT_MAC_CAP0_SCS_TRAFFIC_DESC,
 676                                 .phy_cap_info[0] =
 677                                         IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ |
 678                                         IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI |
 679                                         IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO |
 680                                         IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE |
 681                                         IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK,
 682                                 .phy_cap_info[1] =
 683                                         IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK  |
 684                                         IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK,
 685                                 .phy_cap_info[3] =
 686                                         IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK |
 687                                         IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK |
 688                                         IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK |
 689                                         IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK |
 690                                         IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK |
 691                                         IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK |
 692                                         IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK,
 693
 694                                 .phy_cap_info[4] =
 695                                         IEEE80211_EHT_PHY_CAP4_PART_BW_DL_MU_MIMO |
 696                                         IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP |
 697                                         IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI,
 698                                 .phy_cap_info[5] =
 699                                         IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK |
 700                                         IEEE80211_EHT_PHY_CAP5_TX_LESS_242_TONE_RU_SUPP |
 701                                         IEEE80211_EHT_PHY_CAP5_RX_LESS_242_TONE_RU_SUPP |
 702                                         IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT,
 703                                 .phy_cap_info[6] =
 704                                         IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK |
 705                                         IEEE80211_EHT_PHY_CAP6_EHT_DUP_6GHZ_SUPP,
 706                                 .phy_cap_info[8] =
 707                                         IEEE80211_EHT_PHY_CAP8_RX_1024QAM_WIDER_BW_DL_OFDMA |
 708                                         IEEE80211_EHT_PHY_CAP8_RX_4096QAM_WIDER_BW_DL_OFDMA,
 709                         },
 710
 711                         /* For all MCS and bandwidth, set 2 NSS for both Tx and
 712                          * Rx - note we don't set the only_20mhz, but due to this
 713                          * being a union, it gets set correctly anyway.
 714                          */
 715                         .eht_mcs_nss_supp = {
 716                                 .bw._80 = {
 717                                         .rx_tx_mcs9_max_nss = 0x22,
 718                                         .rx_tx_mcs11_max_nss = 0x22,
 719                                         .rx_tx_mcs13_max_nss = 0x22,
 720                                 },
 721                                 .bw._160 = {
 722                                         .rx_tx_mcs9_max_nss = 0x22,
 723                                         .rx_tx_mcs11_max_nss = 0x22,
 724                                         .rx_tx_mcs13_max_nss = 0x22,
 725                                 },
 726                                 .bw._320 = {
 727                                         .rx_tx_mcs9_max_nss = 0x22,
 728                                         .rx_tx_mcs11_max_nss = 0x22,
 729                                         .rx_tx_mcs13_max_nss = 0x22,
 730                                 },
 731                         },
 732
 733                         /*
 734                          * PPE thresholds for NSS = 2, and RU index bitmap set
 735                          * to 0xc.
 736                          */
 737                         .eht_ppe_thres = {0xc1, 0x0e, 0xe0 }
 738                 },
 739         },
 740         {
 741                 .types_mask = BIT(NL80211_IFTYPE_AP),
 742                 .he_cap = {
 743                         .has_he = true,
 744                         .he_cap_elem = {
 745                                 .mac_cap_info[0] =
 746                                         IEEE80211_HE_MAC_CAP0_HTC_HE,
 747                                 .mac_cap_info[1] =
 748                                         IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
 749                                         IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
 750                                 .mac_cap_info[3] =
 751                                         IEEE80211_HE_MAC_CAP3_OMI_CONTROL,
 752                                 .phy_cap_info[1] =
 753                                         IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD,
 754                                 .phy_cap_info[2] =
 755                                         IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |
 756                                         IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US,
 757                                 .phy_cap_info[3] =
 758                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK |
 759                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 |
 760                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK |
 761                                         IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1,
 762                                 .phy_cap_info[6] =
 763                                         IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT,
 764                                 .phy_cap_info[7] =
 765                                         IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI,
 766                                 .phy_cap_info[8] =
 767                                         IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
 768                                         IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242,
 769                                 .phy_cap_info[9] =
 770                                         IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED
 771                                         << IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_POS,
 772                         },
 773                         /*
 774                          * Set default Tx/Rx HE MCS NSS Support field.
 775                          * Indicate support for up to 2 spatial streams and all
 776                          * MCS, without any special cases
 777                          */
 778                         .he_mcs_nss_supp = {
 779                                 .rx_mcs_80 = cpu_to_le16(0xfffa),
 780                                 .tx_mcs_80 = cpu_to_le16(0xfffa),
 781                                 .rx_mcs_160 = cpu_to_le16(0xfffa),
 782                                 .tx_mcs_160 = cpu_to_le16(0xfffa),
 783                                 .rx_mcs_80p80 = cpu_to_le16(0xffff),
 784                                 .tx_mcs_80p80 = cpu_to_le16(0xffff),
 785                         },
 786                         /*
 787                          * Set default PPE thresholds, with PPET16 set to 0,
 788                          * PPET8 set to 7
 789                          */
 790                         .ppe_thres = {0x61, 0x1c, 0xc7, 0x71},
 791                 },
 792                 .eht_cap = {
 793                         .has_eht = true,
 794                         .eht_cap_elem = {
 795                                 .mac_cap_info[0] =
 796                                         IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |
 797                                         IEEE80211_EHT_MAC_CAP0_OM_CONTROL |
 798                                         IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 |
 799                                         IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2,
 800                                 .phy_cap_info[0] =
 801                                         IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ |
 802                                         IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI,
 803                                 .phy_cap_info[5] =
 804                                         IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT,
 805                         },
 806
 807                         /* For all MCS and bandwidth, set 2 NSS for both Tx and
 808                          * Rx - note we don't set the only_20mhz, but due to this
 809                          * being a union, it gets set correctly anyway.
 810                          */
 811                         .eht_mcs_nss_supp = {
 812                                 .bw._80 = {
 813                                         .rx_tx_mcs9_max_nss = 0x22,
 814                                         .rx_tx_mcs11_max_nss = 0x22,
 815                                         .rx_tx_mcs13_max_nss = 0x22,
 816                                 },
 817                                 .bw._160 = {
 818                                         .rx_tx_mcs9_max_nss = 0x22,
 819                                         .rx_tx_mcs11_max_nss = 0x22,
 820                                         .rx_tx_mcs13_max_nss = 0x22,
 821                                 },
 822                                 .bw._320 = {
 823                                         .rx_tx_mcs9_max_nss = 0x22,
 824                                         .rx_tx_mcs11_max_nss = 0x22,
 825                                         .rx_tx_mcs13_max_nss = 0x22,
 826                                 },
 827                         },
 828
 829                         /*
 830                          * PPE thresholds for NSS = 2, and RU index bitmap set
 831                          * to 0xc.
 832                          */
 833                         .eht_ppe_thres = {0xc1, 0x0e, 0xe0 }
 834                 },
 835         },
 836 };
 837
 838 static void iwl_init_he_6ghz_capa(struct iwl_trans *trans,
 839                                   struct iwl_nvm_data *data,
 840                                   struct ieee80211_supported_band *sband,
 841                                   u8 tx_chains, u8 rx_chains)
 842 {
 843         struct ieee80211_sta_ht_cap ht_cap;
 844         struct ieee80211_sta_vht_cap vht_cap = {};
 845         struct ieee80211_sband_iftype_data *iftype_data;
 846         u16 he_6ghz_capa = 0;
 847         u32 exp;
 848         int i;
 849
 850         if (sband->band != NL80211_BAND_6GHZ)
 851                 return;
 852
 853         /* grab HT/VHT capabilities and calculate HE 6 GHz capabilities */
 854         iwl_init_ht_hw_capab(trans, data, &ht_cap, NL80211_BAND_5GHZ,
 855                              tx_chains, rx_chains);
 856         WARN_ON(!ht_cap.ht_supported);
 857         iwl_init_vht_hw_capab(trans, data, &vht_cap, tx_chains, rx_chains);
 858         WARN_ON(!vht_cap.vht_supported);
 859
 860         he_6ghz_capa |=
 861                 u16_encode_bits(ht_cap.ampdu_density,
 862                                 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START);
 863         exp = u32_get_bits(vht_cap.cap,
 864                            IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK);
 865         he_6ghz_capa |=
 866                 u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
 867         exp = u32_get_bits(vht_cap.cap, IEEE80211_VHT_CAP_MAX_MPDU_MASK);
 868         he_6ghz_capa |=
 869                 u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
 870         /* we don't support extended_ht_cap_info anywhere, so no RD_RESPONDER */
 871         if (vht_cap.cap & IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN)
 872                 he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS;
 873         if (vht_cap.cap & IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN)
 874                 he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS;
 875
 876         IWL_DEBUG_EEPROM(trans->dev, "he_6ghz_capa=0x%x\n", he_6ghz_capa);
 877
 878         /* we know it's writable - we set it before ourselves */
 879         iftype_data = (void *)(uintptr_t)sband->iftype_data;
 880         for (i = 0; i < sband->n_iftype_data; i++)
 881                 iftype_data[i].he_6ghz_capa.capa = cpu_to_le16(he_6ghz_capa);
 882 }
 883
 884 static void
 885 iwl_nvm_fixup_sband_iftd(struct iwl_trans *trans,
 886                          struct iwl_nvm_data *data,
 887                          struct ieee80211_supported_band *sband,
 888                          struct ieee80211_sband_iftype_data *iftype_data,
 889                          u8 tx_chains, u8 rx_chains,
 890                          const struct iwl_fw *fw)
 891 {
 892         bool is_ap = iftype_data->types_mask & BIT(NL80211_IFTYPE_AP);
 893         bool no_320;
 894
 895         no_320 = !trans->trans_cfg->integrated &&
 896                  trans->pcie_link_speed < PCI_EXP_LNKSTA_CLS_8_0GB;
 897
 898         if (!data->sku_cap_11be_enable || iwlwifi_mod_params.disable_11be)
 899                 iftype_data->eht_cap.has_eht = false;
 900
 901         /* Advertise an A-MPDU exponent extension based on
 902          * operating band
 903          */
 904         if (sband->band == NL80211_BAND_6GHZ && iftype_data->eht_cap.has_eht)
 905                 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |=
 906                         IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2;
 907         else if (sband->band != NL80211_BAND_2GHZ)
 908                 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |=
 909                         IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_1;
 910         else
 911                 iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |=
 912                         IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
 913
 914         switch (sband->band) {
 915         case NL80211_BAND_2GHZ:
 916                 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] |=
 917                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
 918                 iftype_data->eht_cap.eht_cap_elem.mac_cap_info[0] |=
 919                         u8_encode_bits(IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_11454,
 920                                        IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_MASK);
 921                 break;
 922         case NL80211_BAND_6GHZ:
 923                 if (!no_320) {
 924                         iftype_data->eht_cap.eht_cap_elem.phy_cap_info[0] |=
 925                                 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
 926                         iftype_data->eht_cap.eht_cap_elem.phy_cap_info[1] |=
 927                                 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK;
 928                 }
 929                 fallthrough;
 930         case NL80211_BAND_5GHZ:
 931                 iftype_data->he_cap.he_cap_elem.phy_cap_info[0] |=
 932                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
 933                         IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
 934                 break;
 935         default:
 936                 WARN_ON(1);
 937                 break;
 938         }
 939
 940         if ((tx_chains & rx_chains) == ANT_AB) {
 941                 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] |=
 942                         IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ;
 943                 iftype_data->he_cap.he_cap_elem.phy_cap_info[5] |=
 944                         IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_2 |
 945                         IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2;
 946                 if (!is_ap) {
 947                         iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |=
 948                                 IEEE80211_HE_PHY_CAP7_MAX_NC_2;
 949
 950                         if (iftype_data->eht_cap.has_eht) {
 951                                 /*
 952                                  * Set the number of sounding dimensions for each
 953                                  * bandwidth to 1 to indicate the maximal supported
 954                                  * value of TXVECTOR parameter NUM_STS of 2
 955                                  */
 956                                 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[2] |= 0x49;
 957
 958                                 /*
 959                                  * Set the MAX NC to 1 to indicate sounding feedback of
 960                                  * 2 supported by the beamfomee.
 961                                  */
 962                                 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[4] |= 0x10;
 963                         }
 964                 }
 965         } else {
 966                 struct ieee80211_he_mcs_nss_supp *he_mcs_nss_supp =
 967                         &iftype_data->he_cap.he_mcs_nss_supp;
 968
 969                 if (iftype_data->eht_cap.has_eht) {
 970                         struct ieee80211_eht_mcs_nss_supp *mcs_nss =
 971                                 &iftype_data->eht_cap.eht_mcs_nss_supp;
 972
 973                         memset(mcs_nss, 0x11, sizeof(*mcs_nss));
 974                 }
 975
 976                 if (!is_ap) {
 977                         /* If not 2x2, we need to indicate 1x1 in the
 978                          * Midamble RX Max NSTS - but not for AP mode
 979                          */
 980                         iftype_data->he_cap.he_cap_elem.phy_cap_info[1] &=
 981                                 ~IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS;
 982                         iftype_data->he_cap.he_cap_elem.phy_cap_info[2] &=
 983                                 ~IEEE80211_HE_PHY_CAP2_MIDAMBLE_RX_TX_MAX_NSTS;
 984                         iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |=
 985                                 IEEE80211_HE_PHY_CAP7_MAX_NC_1;
 986                 }
 987
 988                 he_mcs_nss_supp->rx_mcs_80 |=
 989                         cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2);
 990                 he_mcs_nss_supp->tx_mcs_80 |=
 991                         cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2);
 992                 he_mcs_nss_supp->rx_mcs_160 |=
 993                         cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2);
 994                 he_mcs_nss_supp->tx_mcs_160 |=
 995                         cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2);
 996                 he_mcs_nss_supp->rx_mcs_80p80 |=
 997                         cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2);
 998                 he_mcs_nss_supp->tx_mcs_80p80 |=
 999                         cpu_to_le16(IEEE80211_HE_MCS_NOT_SUPPORTED << 2);
1000         }
1001
1002         if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210 && !is_ap)
1003                 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] |=
1004                         IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO;
1005
1006         switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) {
1007         case IWL_CFG_RF_TYPE_GF:
1008         case IWL_CFG_RF_TYPE_MR:
1009         case IWL_CFG_RF_TYPE_MS:
1010         case IWL_CFG_RF_TYPE_FM:
1011         case IWL_CFG_RF_TYPE_WH:
1012                 iftype_data->he_cap.he_cap_elem.phy_cap_info[9] |=
1013                         IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU;
1014                 if (!is_ap)
1015                         iftype_data->he_cap.he_cap_elem.phy_cap_info[9] |=
1016                                 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU;
1017                 break;
1018         }
1019
1020         if (CSR_HW_REV_TYPE(trans->hw_rev) == IWL_CFG_MAC_TYPE_GL &&
1021             iftype_data->eht_cap.has_eht) {
1022                 iftype_data->eht_cap.eht_cap_elem.mac_cap_info[0] &=
1023                         ~(IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |
1024                           IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 |
1025                           IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2);
1026                 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[3] &=
1027                         ~(IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO |
1028                           IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK |
1029                           IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK |
1030                           IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK |
1031                           IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK |
1032                           IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK);
1033                 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[4] &=
1034                         ~(IEEE80211_EHT_PHY_CAP4_PART_BW_DL_MU_MIMO |
1035                           IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP);
1036                 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[5] &=
1037                         ~IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK;
1038                 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[6] &=
1039                         ~(IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK |
1040                           IEEE80211_EHT_PHY_CAP6_EHT_DUP_6GHZ_SUPP);
1041                 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[5] |=
1042                         IEEE80211_EHT_PHY_CAP5_SUPP_EXTRA_EHT_LTF;
1043         }
1044
1045         if (fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_BROADCAST_TWT))
1046                 iftype_data->he_cap.he_cap_elem.mac_cap_info[2] |=
1047                         IEEE80211_HE_MAC_CAP2_BCAST_TWT;
1048
1049         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000 &&
1050             !is_ap) {
1051                 iftype_data->vendor_elems.data = iwl_vendor_caps;
1052                 iftype_data->vendor_elems.len = ARRAY_SIZE(iwl_vendor_caps);
1053         }
1054
1055         if (!trans->cfg->ht_params->stbc) {
1056                 iftype_data->he_cap.he_cap_elem.phy_cap_info[2] &=
1057                         ~IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ;
1058                 iftype_data->he_cap.he_cap_elem.phy_cap_info[7] &=
1059                         ~IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ;
1060         }
1061 }
1062
1063 static void iwl_init_he_hw_capab(struct iwl_trans *trans,
1064                                  struct iwl_nvm_data *data,
1065                                  struct ieee80211_supported_band *sband,
1066                                  u8 tx_chains, u8 rx_chains,
1067                                  const struct iwl_fw *fw)
1068 {
1069         struct ieee80211_sband_iftype_data *iftype_data;
1070         int i;
1071
1072         BUILD_BUG_ON(sizeof(data->iftd.low) != sizeof(iwl_he_eht_capa));
1073         BUILD_BUG_ON(sizeof(data->iftd.high) != sizeof(iwl_he_eht_capa));
1074         BUILD_BUG_ON(sizeof(data->iftd.uhb) != sizeof(iwl_he_eht_capa));
1075
1076         switch (sband->band) {
1077         case NL80211_BAND_2GHZ:
1078                 iftype_data = data->iftd.low;
1079                 break;
1080         case NL80211_BAND_5GHZ:
1081                 iftype_data = data->iftd.high;
1082                 break;
1083         case NL80211_BAND_6GHZ:
1084                 iftype_data = data->iftd.uhb;
1085                 break;
1086         default:
1087                 WARN_ON(1);
1088                 return;
1089         }
1090
1091         memcpy(iftype_data, iwl_he_eht_capa, sizeof(iwl_he_eht_capa));
1092
1093         _ieee80211_set_sband_iftype_data(sband, iftype_data,
1094                                          ARRAY_SIZE(iwl_he_eht_capa));
1095
1096         for (i = 0; i < sband->n_iftype_data; i++)
1097                 iwl_nvm_fixup_sband_iftd(trans, data, sband, &iftype_data[i],
1098                                          tx_chains, rx_chains, fw);
1099
1100         iwl_init_he_6ghz_capa(trans, data, sband, tx_chains, rx_chains);
1101 }
1102
1103 void iwl_reinit_cab(struct iwl_trans *trans, struct iwl_nvm_data *data,
1104                     u8 tx_chains, u8 rx_chains, const struct iwl_fw *fw)
1105 {
1106         struct ieee80211_supported_band *sband;
1107
1108         sband = &data->bands[NL80211_BAND_2GHZ];
1109         iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ,
1110                              tx_chains, rx_chains);
1111
1112         if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
1113                 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains,
1114                                      fw);
1115
1116         sband = &data->bands[NL80211_BAND_5GHZ];
1117         iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ,
1118                              tx_chains, rx_chains);
1119         if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac)
1120                 iwl_init_vht_hw_capab(trans, data, &sband->vht_cap,
1121                                       tx_chains, rx_chains);
1122
1123         if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
1124                 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains,
1125                                      fw);
1126
1127         sband = &data->bands[NL80211_BAND_6GHZ];
1128         if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
1129                 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains,
1130                                      fw);
1131 }
1132 IWL_EXPORT_SYMBOL(iwl_reinit_cab);
1133
1134 static void iwl_init_sbands(struct iwl_trans *trans,
1135                             struct iwl_nvm_data *data,
1136                             const void *nvm_ch_flags, u8 tx_chains,
1137                             u8 rx_chains, u32 sbands_flags, bool v4,
1138                             const struct iwl_fw *fw)
1139 {
1140         struct device *dev = trans->dev;
1141         const struct iwl_cfg *cfg = trans->cfg;
1142         int n_channels;
1143         int n_used = 0;
1144         struct ieee80211_supported_band *sband;
1145
1146         n_channels = iwl_init_channel_map(dev, cfg, data, nvm_ch_flags,
1147                                           sbands_flags, v4);
1148         sband = &data->bands[NL80211_BAND_2GHZ];
1149         sband->band = NL80211_BAND_2GHZ;
1150         sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
1151         sband->n_bitrates = N_RATES_24;
1152         n_used += iwl_init_sband_channels(data, sband, n_channels,
1153                                           NL80211_BAND_2GHZ);
1154         iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ,
1155                              tx_chains, rx_chains);
1156
1157         if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
1158                 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains,
1159                                      fw);
1160
1161         sband = &data->bands[NL80211_BAND_5GHZ];
1162         sband->band = NL80211_BAND_5GHZ;
1163         sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
1164         sband->n_bitrates = N_RATES_52;
1165         n_used += iwl_init_sband_channels(data, sband, n_channels,
1166                                           NL80211_BAND_5GHZ);
1167         iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ,
1168                              tx_chains, rx_chains);
1169         if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac)
1170                 iwl_init_vht_hw_capab(trans, data, &sband->vht_cap,
1171                                       tx_chains, rx_chains);
1172
1173         if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
1174                 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains,
1175                                      fw);
1176
1177         /* 6GHz band. */
1178         sband = &data->bands[NL80211_BAND_6GHZ];
1179         sband->band = NL80211_BAND_6GHZ;
1180         /* use the same rates as 5GHz band */
1181         sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
1182         sband->n_bitrates = N_RATES_52;
1183         n_used += iwl_init_sband_channels(data, sband, n_channels,
1184                                           NL80211_BAND_6GHZ);
1185
1186         if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
1187                 iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains,
1188                                      fw);
1189         else
1190                 sband->n_channels = 0;
1191         if (n_channels != n_used)
1192                 IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
1193                             n_used, n_channels);
1194 }
1195
1196 static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
1197                        const __le16 *phy_sku)
1198 {
1199         if (cfg->nvm_type != IWL_NVM_EXT)
1200                 return le16_to_cpup(nvm_sw + SKU);
1201
1202         return le32_to_cpup((const __le32 *)(phy_sku + SKU_FAMILY_8000));
1203 }
1204
1205 static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
1206 {
1207         if (cfg->nvm_type != IWL_NVM_EXT)
1208                 return le16_to_cpup(nvm_sw + NVM_VERSION);
1209         else
1210                 return le32_to_cpup((const __le32 *)(nvm_sw +
1211                                                      NVM_VERSION_EXT_NVM));
1212 }
1213
1214 static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
1215                              const __le16 *phy_sku)
1216 {
1217         if (cfg->nvm_type != IWL_NVM_EXT)
1218                 return le16_to_cpup(nvm_sw + RADIO_CFG);
1219
1220         return le32_to_cpup((const __le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM));
1221
1222 }
1223
1224 static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
1225 {
1226         int n_hw_addr;
1227
1228         if (cfg->nvm_type != IWL_NVM_EXT)
1229                 return le16_to_cpup(nvm_sw + N_HW_ADDRS);
1230
1231         n_hw_addr = le32_to_cpup((const __le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
1232
1233         return n_hw_addr & N_HW_ADDR_MASK;
1234 }
1235
1236 static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
1237                               struct iwl_nvm_data *data,
1238                               u32 radio_cfg)
1239 {
1240         if (cfg->nvm_type != IWL_NVM_EXT) {
1241                 data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
1242                 data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
1243                 data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
1244                 data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
1245                 return;
1246         }
1247
1248         /* set the radio configuration for family 8000 */
1249         data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg);
1250         data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg);
1251         data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg);
1252         data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg);
1253         data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg);
1254         data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg);
1255 }
1256
1257 static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest)
1258 {
1259         const u8 *hw_addr;
1260
1261         hw_addr = (const u8 *)&mac_addr0;
1262         dest[0] = hw_addr[3];
1263         dest[1] = hw_addr[2];
1264         dest[2] = hw_addr[1];
1265         dest[3] = hw_addr[0];
1266
1267         hw_addr = (const u8 *)&mac_addr1;
1268         dest[4] = hw_addr[1];
1269         dest[5] = hw_addr[0];
1270 }
1271
1272 static void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
1273                                         struct iwl_nvm_data *data)
1274 {
1275         __le32 mac_addr0 = cpu_to_le32(iwl_read32(trans,
1276                                                   CSR_MAC_ADDR0_STRAP(trans)));
1277         __le32 mac_addr1 = cpu_to_le32(iwl_read32(trans,
1278                                                   CSR_MAC_ADDR1_STRAP(trans)));
1279
1280         iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
1281         /*
1282          * If the OEM fused a valid address, use it instead of the one in the
1283          * OTP
1284          */
1285         if (is_valid_ether_addr(data->hw_addr))
1286                 return;
1287
1288         mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP(trans)));
1289         mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP(trans)));
1290
1291         iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
1292 }
1293
1294 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans,
1295                                            const struct iwl_cfg *cfg,
1296                                            struct iwl_nvm_data *data,
1297                                            const __le16 *mac_override,
1298                                            const __be16 *nvm_hw)
1299 {
1300         const u8 *hw_addr;
1301
1302         if (mac_override) {
1303                 static const u8 reserved_mac[] = {
1304                         0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
1305                 };
1306
1307                 hw_addr = (const u8 *)(mac_override +
1308                                  MAC_ADDRESS_OVERRIDE_EXT_NVM);
1309
1310                 /*
1311                  * Store the MAC address from MAO section.
1312                  * No byte swapping is required in MAO section
1313                  */
1314                 memcpy(data->hw_addr, hw_addr, ETH_ALEN);
1315
1316                 /*
1317                  * Force the use of the OTP MAC address in case of reserved MAC
1318                  * address in the NVM, or if address is given but invalid.
1319                  */
1320                 if (is_valid_ether_addr(data->hw_addr) &&
1321                     memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0)
1322                         return;
1323
1324                 IWL_ERR(trans,
1325                         "mac address from nvm override section is not valid\n");
1326         }
1327
1328         if (nvm_hw) {
1329                 /* read the mac address from WFMP registers */
1330                 __le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans,
1331                                                 WFMP_MAC_ADDR_0));
1332                 __le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans,
1333                                                 WFMP_MAC_ADDR_1));
1334
1335                 iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
1336
1337                 return;
1338         }
1339
1340         IWL_ERR(trans, "mac address is not found\n");
1341 }
1342
1343 static int iwl_set_hw_address(struct iwl_trans *trans,
1344                               const struct iwl_cfg *cfg,
1345                               struct iwl_nvm_data *data, const __be16 *nvm_hw,
1346                               const __le16 *mac_override)
1347 {
1348         if (cfg->mac_addr_from_csr) {
1349                 iwl_set_hw_address_from_csr(trans, data);
1350         } else if (cfg->nvm_type != IWL_NVM_EXT) {
1351                 const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR);
1352
1353                 /* The byte order is little endian 16 bit, meaning 214365 */
1354                 data->hw_addr[0] = hw_addr[1];
1355                 data->hw_addr[1] = hw_addr[0];
1356                 data->hw_addr[2] = hw_addr[3];
1357                 data->hw_addr[3] = hw_addr[2];
1358                 data->hw_addr[4] = hw_addr[5];
1359                 data->hw_addr[5] = hw_addr[4];
1360         } else {
1361                 iwl_set_hw_address_family_8000(trans, cfg, data,
1362                                                mac_override, nvm_hw);
1363         }
1364
1365         if (!is_valid_ether_addr(data->hw_addr)) {
1366                 IWL_ERR(trans, "no valid mac address was found\n");
1367                 return -EINVAL;
1368         }
1369
1370         if (!trans->csme_own)
1371                 IWL_INFO(trans, "base HW address: %pM, OTP minor version: 0x%x\n",
1372                          data->hw_addr, iwl_read_prph(trans, REG_OTP_MINOR));
1373
1374         return 0;
1375 }
1376
1377 static bool
1378 iwl_nvm_no_wide_in_5ghz(struct iwl_trans *trans, const struct iwl_cfg *cfg,
1379                         const __be16 *nvm_hw)
1380 {
1381         /*
1382          * Workaround a bug in Indonesia SKUs where the regulatory in
1383          * some 7000-family OTPs erroneously allow wide channels in
1384          * 5GHz.  To check for Indonesia, we take the SKU value from
1385          * bits 1-4 in the subsystem ID and check if it is either 5 or
1386          * 9.  In those cases, we need to force-disable wide channels
1387          * in 5GHz otherwise the FW will throw a sysassert when we try
1388          * to use them.
1389          */
1390         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
1391                 /*
1392                  * Unlike the other sections in the NVM, the hw
1393                  * section uses big-endian.
1394                  */
1395                 u16 subsystem_id = be16_to_cpup(nvm_hw + SUBSYSTEM_ID);
1396                 u8 sku = (subsystem_id & 0x1e) >> 1;
1397
1398                 if (sku == 5 || sku == 9) {
1399                         IWL_DEBUG_EEPROM(trans->dev,
1400                                          "disabling wide channels in 5GHz (0x%0x %d)\n",
1401                                          subsystem_id, sku);
1402                         return true;
1403                 }
1404         }
1405
1406         return false;
1407 }
1408
1409 struct iwl_nvm_data *
1410 iwl_parse_mei_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
1411                        const struct iwl_mei_nvm *mei_nvm,
1412                        const struct iwl_fw *fw, u8 tx_ant, u8 rx_ant)
1413 {
1414         struct iwl_nvm_data *data;
1415         u32 sbands_flags = 0;
1416         u8 rx_chains = fw->valid_rx_ant;
1417         u8 tx_chains = fw->valid_rx_ant;
1418
1419         if (cfg->uhb_supported)
1420                 data = kzalloc(struct_size(data, channels,
1421                                            IWL_NVM_NUM_CHANNELS_UHB),
1422                                            GFP_KERNEL);
1423         else
1424                 data = kzalloc(struct_size(data, channels,
1425                                            IWL_NVM_NUM_CHANNELS_EXT),
1426                                            GFP_KERNEL);
1427         if (!data)
1428                 return NULL;
1429
1430         BUILD_BUG_ON(ARRAY_SIZE(mei_nvm->channels) !=
1431                      IWL_NVM_NUM_CHANNELS_UHB);
1432         data->nvm_version = mei_nvm->nvm_version;
1433
1434         iwl_set_radio_cfg(cfg, data, mei_nvm->radio_cfg);
1435         if (data->valid_tx_ant)
1436                 tx_chains &= data->valid_tx_ant;
1437         if (data->valid_rx_ant)
1438                 rx_chains &= data->valid_rx_ant;
1439         if (tx_ant)
1440                 tx_chains &= tx_ant;
1441         if (rx_ant)
1442                 rx_chains &= rx_ant;
1443
1444         data->sku_cap_mimo_disabled = false;
1445         data->sku_cap_band_24ghz_enable = true;
1446         data->sku_cap_band_52ghz_enable = true;
1447         data->sku_cap_11n_enable =
1448                 !(iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL);
1449         data->sku_cap_11ac_enable = true;
1450         data->sku_cap_11ax_enable =
1451                 mei_nvm->caps & MEI_NVM_CAPS_11AX_SUPPORT;
1452
1453         data->lar_enabled = mei_nvm->caps & MEI_NVM_CAPS_LARI_SUPPORT;
1454
1455         data->n_hw_addrs = mei_nvm->n_hw_addrs;
1456         /* If no valid mac address was found - bail out */
1457         if (iwl_set_hw_address(trans, cfg, data, NULL, NULL)) {
1458                 kfree(data);
1459                 return NULL;
1460         }
1461
1462         if (data->lar_enabled &&
1463             fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT))
1464                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
1465
1466         iwl_init_sbands(trans, data, mei_nvm->channels, tx_chains, rx_chains,
1467                         sbands_flags, true, fw);
1468
1469         return data;
1470 }
1471 IWL_EXPORT_SYMBOL(iwl_parse_mei_nvm_data);
1472
1473 struct iwl_nvm_data *
1474 iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
1475                    const struct iwl_fw *fw,
1476                    const __be16 *nvm_hw, const __le16 *nvm_sw,
1477                    const __le16 *nvm_calib, const __le16 *regulatory,
1478                    const __le16 *mac_override, const __le16 *phy_sku,
1479                    u8 tx_chains, u8 rx_chains)
1480 {
1481         struct iwl_nvm_data *data;
1482         bool lar_enabled;
1483         u32 sku, radio_cfg;
1484         u32 sbands_flags = 0;
1485         u16 lar_config;
1486         const __le16 *ch_section;
1487
1488         if (cfg->uhb_supported)
1489                 data = kzalloc(struct_size(data, channels,
1490                                            IWL_NVM_NUM_CHANNELS_UHB),
1491                                            GFP_KERNEL);
1492         else if (cfg->nvm_type != IWL_NVM_EXT)
1493                 data = kzalloc(struct_size(data, channels,
1494                                            IWL_NVM_NUM_CHANNELS),
1495                                            GFP_KERNEL);
1496         else
1497                 data = kzalloc(struct_size(data, channels,
1498                                            IWL_NVM_NUM_CHANNELS_EXT),
1499                                            GFP_KERNEL);
1500         if (!data)
1501                 return NULL;
1502
1503         data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw);
1504
1505         radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku);
1506         iwl_set_radio_cfg(cfg, data, radio_cfg);
1507         if (data->valid_tx_ant)
1508                 tx_chains &= data->valid_tx_ant;
1509         if (data->valid_rx_ant)
1510                 rx_chains &= data->valid_rx_ant;
1511
1512         sku = iwl_get_sku(cfg, nvm_sw, phy_sku);
1513         data->sku_cap_band_24ghz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
1514         data->sku_cap_band_52ghz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
1515         data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
1516         if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
1517                 data->sku_cap_11n_enable = false;
1518         data->sku_cap_11ac_enable = data->sku_cap_11n_enable &&
1519                                     (sku & NVM_SKU_CAP_11AC_ENABLE);
1520         data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE;
1521
1522         data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
1523
1524         if (cfg->nvm_type != IWL_NVM_EXT) {
1525                 /* Checking for required sections */
1526                 if (!nvm_calib) {
1527                         IWL_ERR(trans,
1528                                 "Can't parse empty Calib NVM sections\n");
1529                         kfree(data);
1530                         return NULL;
1531                 }
1532
1533                 ch_section = cfg->nvm_type == IWL_NVM_SDP ?
1534                              &regulatory[NVM_CHANNELS_SDP] :
1535                              &nvm_sw[NVM_CHANNELS];
1536
1537                 /* in family 8000 Xtal calibration values moved to OTP */
1538                 data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
1539                 data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
1540                 lar_enabled = true;
1541         } else {
1542                 u16 lar_offset = data->nvm_version < 0xE39 ?
1543                                  NVM_LAR_OFFSET_OLD :
1544                                  NVM_LAR_OFFSET;
1545
1546                 lar_config = le16_to_cpup(regulatory + lar_offset);
1547                 data->lar_enabled = !!(lar_config &
1548                                        NVM_LAR_ENABLED);
1549                 lar_enabled = data->lar_enabled;
1550                 ch_section = &regulatory[NVM_CHANNELS_EXTENDED];
1551         }
1552
1553         /* If no valid mac address was found - bail out */
1554         if (iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override)) {
1555                 kfree(data);
1556                 return NULL;
1557         }
1558
1559         if (lar_enabled &&
1560             fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT))
1561                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
1562
1563         if (iwl_nvm_no_wide_in_5ghz(trans, cfg, nvm_hw))
1564                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ;
1565
1566         iwl_init_sbands(trans, data, ch_section, tx_chains, rx_chains,
1567                         sbands_flags, false, fw);
1568         data->calib_version = 255;
1569
1570         return data;
1571 }
1572 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
1573
1574 static u32 iwl_nvm_get_regdom_bw_flags(const u16 *nvm_chan,
1575                                        int ch_idx, u16 nvm_flags,
1576                                        struct iwl_reg_capa reg_capa,
1577                                        const struct iwl_cfg *cfg)
1578 {
1579         u32 flags = NL80211_RRF_NO_HT40;
1580
1581         if (ch_idx < NUM_2GHZ_CHANNELS &&
1582             (nvm_flags & NVM_CHANNEL_40MHZ)) {
1583                 if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS)
1584                         flags &= ~NL80211_RRF_NO_HT40PLUS;
1585                 if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
1586                         flags &= ~NL80211_RRF_NO_HT40MINUS;
1587         } else if (nvm_flags & NVM_CHANNEL_40MHZ) {
1588                 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
1589                         flags &= ~NL80211_RRF_NO_HT40PLUS;
1590                 else
1591                         flags &= ~NL80211_RRF_NO_HT40MINUS;
1592         }
1593
1594         if (!(nvm_flags & NVM_CHANNEL_80MHZ))
1595                 flags |= NL80211_RRF_NO_80MHZ;
1596         if (!(nvm_flags & NVM_CHANNEL_160MHZ))
1597                 flags |= NL80211_RRF_NO_160MHZ;
1598
1599         if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
1600                 flags |= NL80211_RRF_NO_IR;
1601
1602         if (nvm_flags & NVM_CHANNEL_RADAR)
1603                 flags |= NL80211_RRF_DFS;
1604
1605         if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
1606                 flags |= NL80211_RRF_NO_OUTDOOR;
1607
1608         /* Set the GO concurrent flag only in case that NO_IR is set.
1609          * Otherwise it is meaningless
1610          */
1611         if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
1612             (flags & NL80211_RRF_NO_IR))
1613                 flags |= NL80211_RRF_GO_CONCURRENT;
1614
1615         /*
1616          * reg_capa is per regulatory domain so apply it for every channel
1617          */
1618         if (ch_idx >= NUM_2GHZ_CHANNELS) {
1619                 if (!reg_capa.allow_40mhz)
1620                         flags |= NL80211_RRF_NO_HT40;
1621
1622                 if (!reg_capa.allow_80mhz)
1623                         flags |= NL80211_RRF_NO_80MHZ;
1624
1625                 if (!reg_capa.allow_160mhz)
1626                         flags |= NL80211_RRF_NO_160MHZ;
1627
1628                 if (!reg_capa.allow_320mhz)
1629                         flags |= NL80211_RRF_NO_320MHZ;
1630         }
1631
1632         if (reg_capa.disable_11ax)
1633                 flags |= NL80211_RRF_NO_HE;
1634
1635         if (reg_capa.disable_11be)
1636                 flags |= NL80211_RRF_NO_EHT;
1637
1638         return flags;
1639 }
1640
1641 static struct iwl_reg_capa iwl_get_reg_capa(u32 flags, u8 resp_ver)
1642 {
1643         struct iwl_reg_capa reg_capa = {};
1644
1645         if (resp_ver >= REG_CAPA_V4_RESP_VER) {
1646                 reg_capa.allow_40mhz = true;
1647                 reg_capa.allow_80mhz = flags & REG_CAPA_V4_80MHZ_ALLOWED;
1648                 reg_capa.allow_160mhz = flags & REG_CAPA_V4_160MHZ_ALLOWED;
1649                 reg_capa.allow_320mhz = flags & REG_CAPA_V4_320MHZ_ALLOWED;
1650                 reg_capa.disable_11ax = flags & REG_CAPA_V4_11AX_DISABLED;
1651                 reg_capa.disable_11be = flags & REG_CAPA_V4_11BE_DISABLED;
1652         } else if (resp_ver >= REG_CAPA_V2_RESP_VER) {
1653                 reg_capa.allow_40mhz = flags & REG_CAPA_V2_40MHZ_ALLOWED;
1654                 reg_capa.allow_80mhz = flags & REG_CAPA_V2_80MHZ_ALLOWED;
1655                 reg_capa.allow_160mhz = flags & REG_CAPA_V2_160MHZ_ALLOWED;
1656                 reg_capa.disable_11ax = flags & REG_CAPA_V2_11AX_DISABLED;
1657         } else {
1658                 reg_capa.allow_40mhz = !(flags & REG_CAPA_V1_40MHZ_FORBIDDEN);
1659                 reg_capa.allow_80mhz = flags & REG_CAPA_V1_80MHZ_ALLOWED;
1660                 reg_capa.allow_160mhz = flags & REG_CAPA_V1_160MHZ_ALLOWED;
1661                 reg_capa.disable_11ax = flags & REG_CAPA_V1_11AX_DISABLED;
1662         }
1663         return reg_capa;
1664 }
1665
1666 struct ieee80211_regdomain *
1667 iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
1668                        int num_of_ch, __le32 *channels, u16 fw_mcc,
1669                        u16 geo_info, u32 cap, u8 resp_ver)
1670 {
1671         int ch_idx;
1672         u16 ch_flags;
1673         u32 reg_rule_flags, prev_reg_rule_flags = 0;
1674         const u16 *nvm_chan;
1675         struct ieee80211_regdomain *regd, *copy_rd;
1676         struct ieee80211_reg_rule *rule;
1677         enum nl80211_band band;
1678         int center_freq, prev_center_freq = 0;
1679         int valid_rules = 0;
1680         bool new_rule;
1681         int max_num_ch;
1682         struct iwl_reg_capa reg_capa;
1683
1684         if (cfg->uhb_supported) {
1685                 max_num_ch = IWL_NVM_NUM_CHANNELS_UHB;
1686                 nvm_chan = iwl_uhb_nvm_channels;
1687         } else if (cfg->nvm_type == IWL_NVM_EXT) {
1688                 max_num_ch = IWL_NVM_NUM_CHANNELS_EXT;
1689                 nvm_chan = iwl_ext_nvm_channels;
1690         } else {
1691                 max_num_ch = IWL_NVM_NUM_CHANNELS;
1692                 nvm_chan = iwl_nvm_channels;
1693         }
1694
1695         if (num_of_ch > max_num_ch) {
1696                 IWL_DEBUG_DEV(dev, IWL_DL_LAR,
1697                               "Num of channels (%d) is greater than expected. Truncating to %d\n",
1698                               num_of_ch, max_num_ch);
1699                 num_of_ch = max_num_ch;
1700         }
1701
1702         if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
1703                 return ERR_PTR(-EINVAL);
1704
1705         IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n",
1706                       num_of_ch);
1707
1708         /* build a regdomain rule for every valid channel */
1709         regd = kzalloc(struct_size(regd, reg_rules, num_of_ch), GFP_KERNEL);
1710         if (!regd)
1711                 return ERR_PTR(-ENOMEM);
1712
1713         /* set alpha2 from FW. */
1714         regd->alpha2[0] = fw_mcc >> 8;
1715         regd->alpha2[1] = fw_mcc & 0xff;
1716
1717         /* parse regulatory capability flags */
1718         reg_capa = iwl_get_reg_capa(cap, resp_ver);
1719
1720         for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
1721                 ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
1722                 band = iwl_nl80211_band_from_channel_idx(ch_idx);
1723                 center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx],
1724                                                              band);
1725                 new_rule = false;
1726
1727                 if (!(ch_flags & NVM_CHANNEL_VALID)) {
1728                         iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
1729                                                     nvm_chan[ch_idx], ch_flags);
1730                         continue;
1731                 }
1732
1733                 reg_rule_flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx,
1734                                                              ch_flags, reg_capa,
1735                                                              cfg);
1736
1737                 /* we can't continue the same rule */
1738                 if (ch_idx == 0 || prev_reg_rule_flags != reg_rule_flags ||
1739                     center_freq - prev_center_freq > 20) {
1740                         valid_rules++;
1741                         new_rule = true;
1742                 }
1743
1744                 rule = &regd->reg_rules[valid_rules - 1];
1745
1746                 if (new_rule)
1747                         rule->freq_range.start_freq_khz =
1748                                                 MHZ_TO_KHZ(center_freq - 10);
1749
1750                 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10);
1751
1752                 /* this doesn't matter - not used by FW */
1753                 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
1754                 rule->power_rule.max_eirp =
1755                         DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
1756
1757                 rule->flags = reg_rule_flags;
1758
1759                 /* rely on auto-calculation to merge BW of contiguous chans */
1760                 rule->flags |= NL80211_RRF_AUTO_BW;
1761                 rule->freq_range.max_bandwidth_khz = 0;
1762
1763                 prev_center_freq = center_freq;
1764                 prev_reg_rule_flags = reg_rule_flags;
1765
1766                 iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
1767                                             nvm_chan[ch_idx], ch_flags);
1768
1769                 if (!(geo_info & GEO_WMM_ETSI_5GHZ_INFO) ||
1770                     band == NL80211_BAND_2GHZ)
1771                         continue;
1772
1773                 reg_query_regdb_wmm(regd->alpha2, center_freq, rule);
1774         }
1775
1776         /*
1777          * Certain firmware versions might report no valid channels
1778          * if booted in RF-kill, i.e. not all calibrations etc. are
1779          * running. We'll get out of this situation later when the
1780          * rfkill is removed and we update the regdomain again, but
1781          * since cfg80211 doesn't accept an empty regdomain, add a
1782          * dummy (unusable) rule here in this case so we can init.
1783          */
1784         if (!valid_rules) {
1785                 valid_rules = 1;
1786                 rule = &regd->reg_rules[valid_rules - 1];
1787                 rule->freq_range.start_freq_khz = MHZ_TO_KHZ(2412);
1788                 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(2413);
1789                 rule->freq_range.max_bandwidth_khz = MHZ_TO_KHZ(1);
1790                 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
1791                 rule->power_rule.max_eirp =
1792                         DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
1793         }
1794
1795         regd->n_reg_rules = valid_rules;
1796
1797         /*
1798          * Narrow down regdom for unused regulatory rules to prevent hole
1799          * between reg rules to wmm rules.
1800          */
1801         copy_rd = kmemdup(regd, struct_size(regd, reg_rules, valid_rules),
1802                           GFP_KERNEL);
1803         if (!copy_rd)
1804                 copy_rd = ERR_PTR(-ENOMEM);
1805
1806         kfree(regd);
1807         return copy_rd;
1808 }
1809 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);
1810
1811 #define IWL_MAX_NVM_SECTION_SIZE        0x1b58
1812 #define IWL_MAX_EXT_NVM_SECTION_SIZE    0x1ffc
1813 #define MAX_NVM_FILE_LEN        16384
1814
1815 void iwl_nvm_fixups(u32 hw_id, unsigned int section, u8 *data,
1816                     unsigned int len)
1817 {
1818 #define IWL_4165_DEVICE_ID      0x5501
1819 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
1820
1821         if (section == NVM_SECTION_TYPE_PHY_SKU &&
1822             hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
1823             (data[4] & NVM_SKU_CAP_MIMO_DISABLE))
1824                 /* OTP 0x52 bug work around: it's a 1x1 device */
1825                 data[3] = ANT_B | (ANT_B << 4);
1826 }
1827 IWL_EXPORT_SYMBOL(iwl_nvm_fixups);
1828
1829 /*
1830  * Reads external NVM from a file into mvm->nvm_sections
1831  *
1832  * HOW TO CREATE THE NVM FILE FORMAT:
1833  * ------------------------------
1834  * 1. create hex file, format:
1835  *      3800 -> header
1836  *      0000 -> header
1837  *      5a40 -> data
1838  *
1839  *   rev - 6 bit (word1)
1840  *   len - 10 bit (word1)
1841  *   id - 4 bit (word2)
1842  *   rsv - 12 bit (word2)
1843  *
1844  * 2. flip 8bits with 8 bits per line to get the right NVM file format
1845  *
1846  * 3. create binary file from the hex file
1847  *
1848  * 4. save as "iNVM_xxx.bin" under /lib/firmware
1849  */
1850 int iwl_read_external_nvm(struct iwl_trans *trans,
1851                           const char *nvm_file_name,
1852                           struct iwl_nvm_section *nvm_sections)
1853 {
1854         int ret, section_size;
1855         u16 section_id;
1856         const struct firmware *fw_entry;
1857         const struct {
1858                 __le16 word1;
1859                 __le16 word2;
1860                 u8 data[];
1861         } *file_sec;
1862         const u8 *eof;
1863         u8 *temp;
1864         int max_section_size;
1865         const __le32 *dword_buff;
1866
1867 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
1868 #define NVM_WORD2_ID(x) (x >> 12)
1869 #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8))
1870 #define EXT_NVM_WORD1_ID(x) ((x) >> 4)
1871 #define NVM_HEADER_0    (0x2A504C54)
1872 #define NVM_HEADER_1    (0x4E564D2A)
1873 #define NVM_HEADER_SIZE (4 * sizeof(u32))
1874
1875         IWL_DEBUG_EEPROM(trans->dev, "Read from external NVM\n");
1876
1877         /* Maximal size depends on NVM version */
1878         if (trans->cfg->nvm_type != IWL_NVM_EXT)
1879                 max_section_size = IWL_MAX_NVM_SECTION_SIZE;
1880         else
1881                 max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE;
1882
1883         /*
1884          * Obtain NVM image via request_firmware. Since we already used
1885          * request_firmware_nowait() for the firmware binary load and only
1886          * get here after that we assume the NVM request can be satisfied
1887          * synchronously.
1888          */
1889         ret = request_firmware(&fw_entry, nvm_file_name, trans->dev);
1890         if (ret) {
1891                 IWL_ERR(trans, "ERROR: %s isn't available %d\n",
1892                         nvm_file_name, ret);
1893                 return ret;
1894         }
1895
1896         IWL_INFO(trans, "Loaded NVM file %s (%zu bytes)\n",
1897                  nvm_file_name, fw_entry->size);
1898
1899         if (fw_entry->size > MAX_NVM_FILE_LEN) {
1900                 IWL_ERR(trans, "NVM file too large\n");
1901                 ret = -EINVAL;
1902                 goto out;
1903         }
1904
1905         eof = fw_entry->data + fw_entry->size;
1906         dword_buff = (const __le32 *)fw_entry->data;
1907
1908         /* some NVM file will contain a header.
1909          * The header is identified by 2 dwords header as follow:
1910          * dword[0] = 0x2A504C54
1911          * dword[1] = 0x4E564D2A
1912          *
1913          * This header must be skipped when providing the NVM data to the FW.
1914          */
1915         if (fw_entry->size > NVM_HEADER_SIZE &&
1916             dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
1917             dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
1918                 file_sec = (const void *)(fw_entry->data + NVM_HEADER_SIZE);
1919                 IWL_INFO(trans, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
1920                 IWL_INFO(trans, "NVM Manufacturing date %08X\n",
1921                          le32_to_cpu(dword_buff[3]));
1922
1923                 /* nvm file validation, dword_buff[2] holds the file version */
1924                 if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_8000 &&
1925                     trans->hw_rev_step == SILICON_C_STEP &&
1926                     le32_to_cpu(dword_buff[2]) < 0xE4A) {
1927                         ret = -EFAULT;
1928                         goto out;
1929                 }
1930         } else {
1931                 file_sec = (const void *)fw_entry->data;
1932         }
1933
1934         while (true) {
1935                 if (file_sec->data > eof) {
1936                         IWL_ERR(trans,
1937                                 "ERROR - NVM file too short for section header\n");
1938                         ret = -EINVAL;
1939                         break;
1940                 }
1941
1942                 /* check for EOF marker */
1943                 if (!file_sec->word1 && !file_sec->word2) {
1944                         ret = 0;
1945                         break;
1946                 }
1947
1948                 if (trans->cfg->nvm_type != IWL_NVM_EXT) {
1949                         section_size =
1950                                 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
1951                         section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
1952                 } else {
1953                         section_size = 2 * EXT_NVM_WORD2_LEN(
1954                                                 le16_to_cpu(file_sec->word2));
1955                         section_id = EXT_NVM_WORD1_ID(
1956                                                 le16_to_cpu(file_sec->word1));
1957                 }
1958
1959                 if (section_size > max_section_size) {
1960                         IWL_ERR(trans, "ERROR - section too large (%d)\n",
1961                                 section_size);
1962                         ret = -EINVAL;
1963                         break;
1964                 }
1965
1966                 if (!section_size) {
1967                         IWL_ERR(trans, "ERROR - section empty\n");
1968                         ret = -EINVAL;
1969                         break;
1970                 }
1971
1972                 if (file_sec->data + section_size > eof) {
1973                         IWL_ERR(trans,
1974                                 "ERROR - NVM file too short for section (%d bytes)\n",
1975                                 section_size);
1976                         ret = -EINVAL;
1977                         break;
1978                 }
1979
1980                 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
1981                          "Invalid NVM section ID %d\n", section_id)) {
1982                         ret = -EINVAL;
1983                         break;
1984                 }
1985
1986                 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
1987                 if (!temp) {
1988                         ret = -ENOMEM;
1989                         break;
1990                 }
1991
1992                 iwl_nvm_fixups(trans->hw_id, section_id, temp, section_size);
1993
1994                 kfree(nvm_sections[section_id].data);
1995                 nvm_sections[section_id].data = temp;
1996                 nvm_sections[section_id].length = section_size;
1997
1998                 /* advance to the next section */
1999                 file_sec = (const void *)(file_sec->data + section_size);
2000         }
2001 out:
2002         release_firmware(fw_entry);
2003         return ret;
2004 }
2005 IWL_EXPORT_SYMBOL(iwl_read_external_nvm);
2006
2007 struct iwl_nvm_data *iwl_get_nvm(struct iwl_trans *trans,
2008                                  const struct iwl_fw *fw,
2009                                  u8 set_tx_ant, u8 set_rx_ant)
2010 {
2011         struct iwl_nvm_get_info cmd = {};
2012         struct iwl_nvm_data *nvm;
2013         struct iwl_host_cmd hcmd = {
2014                 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
2015                 .data = { &cmd, },
2016                 .len = { sizeof(cmd) },
2017                 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, NVM_GET_INFO)
2018         };
2019         int  ret;
2020         bool empty_otp;
2021         u32 mac_flags;
2022         u32 sbands_flags = 0;
2023         u8 tx_ant;
2024         u8 rx_ant;
2025
2026         /*
2027          * All the values in iwl_nvm_get_info_rsp v4 are the same as
2028          * in v3, except for the channel profile part of the
2029          * regulatory.  So we can just access the new struct, with the
2030          * exception of the latter.
2031          */
2032         struct iwl_nvm_get_info_rsp *rsp;
2033         struct iwl_nvm_get_info_rsp_v3 *rsp_v3;
2034         bool v4 = fw_has_api(&fw->ucode_capa,
2035                              IWL_UCODE_TLV_API_REGULATORY_NVM_INFO);
2036         size_t rsp_size = v4 ? sizeof(*rsp) : sizeof(*rsp_v3);
2037         void *channel_profile;
2038
2039         ret = iwl_trans_send_cmd(trans, &hcmd);
2040         if (ret)
2041                 return ERR_PTR(ret);
2042
2043         if (WARN(iwl_rx_packet_payload_len(hcmd.resp_pkt) != rsp_size,
2044                  "Invalid payload len in NVM response from FW %d",
2045                  iwl_rx_packet_payload_len(hcmd.resp_pkt))) {
2046                 ret = -EINVAL;
2047                 goto out;
2048         }
2049
2050         rsp = (void *)hcmd.resp_pkt->data;
2051         empty_otp = !!(le32_to_cpu(rsp->general.flags) &
2052                        NVM_GENERAL_FLAGS_EMPTY_OTP);
2053         if (empty_otp)
2054                 IWL_INFO(trans, "OTP is empty\n");
2055
2056         nvm = kzalloc(struct_size(nvm, channels, IWL_NUM_CHANNELS), GFP_KERNEL);
2057         if (!nvm) {
2058                 ret = -ENOMEM;
2059                 goto out;
2060         }
2061
2062         iwl_set_hw_address_from_csr(trans, nvm);
2063         /* TODO: if platform NVM has MAC address - override it here */
2064
2065         if (!is_valid_ether_addr(nvm->hw_addr)) {
2066                 IWL_ERR(trans, "no valid mac address was found\n");
2067                 ret = -EINVAL;
2068                 goto err_free;
2069         }
2070
2071         IWL_INFO(trans, "base HW address: %pM\n", nvm->hw_addr);
2072
2073         /* Initialize general data */
2074         nvm->nvm_version = le16_to_cpu(rsp->general.nvm_version);
2075         nvm->n_hw_addrs = rsp->general.n_hw_addrs;
2076         if (nvm->n_hw_addrs == 0)
2077                 IWL_WARN(trans,
2078                          "Firmware declares no reserved mac addresses. OTP is empty: %d\n",
2079                          empty_otp);
2080
2081         /* Initialize MAC sku data */
2082         mac_flags = le32_to_cpu(rsp->mac_sku.mac_sku_flags);
2083         nvm->sku_cap_11ac_enable =
2084                 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AC_ENABLED);
2085         nvm->sku_cap_11n_enable =
2086                 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11N_ENABLED);
2087         nvm->sku_cap_11ax_enable =
2088                 !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AX_ENABLED);
2089         nvm->sku_cap_band_24ghz_enable =
2090                 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_2_4_ENABLED);
2091         nvm->sku_cap_band_52ghz_enable =
2092                 !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED);
2093         nvm->sku_cap_mimo_disabled =
2094                 !!(mac_flags & NVM_MAC_SKU_FLAGS_MIMO_DISABLED);
2095         if (CSR_HW_RFID_TYPE(trans->hw_rf_id) == IWL_CFG_RF_TYPE_FM)
2096                 nvm->sku_cap_11be_enable = true;
2097
2098         /* Initialize PHY sku data */
2099         nvm->valid_tx_ant = (u8)le32_to_cpu(rsp->phy_sku.tx_chains);
2100         nvm->valid_rx_ant = (u8)le32_to_cpu(rsp->phy_sku.rx_chains);
2101
2102         if (le32_to_cpu(rsp->regulatory.lar_enabled) &&
2103             fw_has_capa(&fw->ucode_capa,
2104                         IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) {
2105                 nvm->lar_enabled = true;
2106                 sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
2107         }
2108
2109         rsp_v3 = (void *)rsp;
2110         channel_profile = v4 ? (void *)rsp->regulatory.channel_profile :
2111                           (void *)rsp_v3->regulatory.channel_profile;
2112
2113         tx_ant = nvm->valid_tx_ant & fw->valid_tx_ant;
2114         rx_ant = nvm->valid_rx_ant & fw->valid_rx_ant;
2115
2116         if (set_tx_ant)
2117                 tx_ant &= set_tx_ant;
2118         if (set_rx_ant)
2119                 rx_ant &= set_rx_ant;
2120
2121         iwl_init_sbands(trans, nvm, channel_profile, tx_ant, rx_ant,
2122                         sbands_flags, v4, fw);
2123
2124         iwl_free_resp(&hcmd);
2125         return nvm;
2126
2127 err_free:
2128         kfree(nvm);
2129 out:
2130         iwl_free_resp(&hcmd);
2131         return ERR_PTR(ret);
2132 }
2133 IWL_EXPORT_SYMBOL(iwl_get_nvm);