drivers/net/wireless/intel/iwlwifi/fw/dbg.c

   1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
   2 /*
   3  * Copyright (C) 2005-2014, 2018-2023 Intel Corporation
   4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
   5  * Copyright (C) 2015-2017 Intel Deutschland GmbH
   6  */
   7 #include <linux/devcoredump.h>
   8 #include "iwl-drv.h"
   9 #include "runtime.h"
  10 #include "dbg.h"
  11 #include "debugfs.h"
  12 #include "iwl-io.h"
  13 #include "iwl-prph.h"
  14 #include "iwl-csr.h"
  15 #include "iwl-fh.h"
  16 /**
  17  * struct iwl_fw_dump_ptrs - set of pointers needed for the fw-error-dump
  18  *
  19  * @fwrt_ptr: pointer to the buffer coming from fwrt
  20  * @trans_ptr: pointer to struct %iwl_trans_dump_data which contains the
  21  *      transport's data.
  22  * @trans_len: length of the valid data in trans_ptr
  23  * @fwrt_len: length of the valid data in fwrt_ptr
  24  */
  25 struct iwl_fw_dump_ptrs {
  26         struct iwl_trans_dump_data *trans_ptr;
  27         void *fwrt_ptr;
  28         u32 fwrt_len;
  29 };
  30
  31 #define RADIO_REG_MAX_READ 0x2ad
  32 static void iwl_read_radio_regs(struct iwl_fw_runtime *fwrt,
  33                                 struct iwl_fw_error_dump_data **dump_data)
  34 {
  35         u8 *pos = (void *)(*dump_data)->data;
  36         int i;
  37
  38         IWL_DEBUG_INFO(fwrt, "WRT radio registers dump\n");
  39
  40         if (!iwl_trans_grab_nic_access(fwrt->trans))
  41                 return;
  42
  43         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_RADIO_REG);
  44         (*dump_data)->len = cpu_to_le32(RADIO_REG_MAX_READ);
  45
  46         for (i = 0; i < RADIO_REG_MAX_READ; i++) {
  47                 u32 rd_cmd = RADIO_RSP_RD_CMD;
  48
  49                 rd_cmd |= i << RADIO_RSP_ADDR_POS;
  50                 iwl_write_prph_no_grab(fwrt->trans, RSP_RADIO_CMD, rd_cmd);
  51                 *pos = (u8)iwl_read_prph_no_grab(fwrt->trans, RSP_RADIO_RDDAT);
  52
  53                 pos++;
  54         }
  55
  56         *dump_data = iwl_fw_error_next_data(*dump_data);
  57
  58         iwl_trans_release_nic_access(fwrt->trans);
  59 }
  60
  61 static void iwl_fwrt_dump_rxf(struct iwl_fw_runtime *fwrt,
  62                               struct iwl_fw_error_dump_data **dump_data,
  63                               int size, u32 offset, int fifo_num)
  64 {
  65         struct iwl_fw_error_dump_fifo *fifo_hdr;
  66         u32 *fifo_data;
  67         u32 fifo_len;
  68         int i;
  69
  70         fifo_hdr = (void *)(*dump_data)->data;
  71         fifo_data = (void *)fifo_hdr->data;
  72         fifo_len = size;
  73
  74         /* No need to try to read the data if the length is 0 */
  75         if (fifo_len == 0)
  76                 return;
  77
  78         /* Add a TLV for the RXF */
  79         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_RXF);
  80         (*dump_data)->len = cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
  81
  82         fifo_hdr->fifo_num = cpu_to_le32(fifo_num);
  83         fifo_hdr->available_bytes =
  84                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  85                                                 RXF_RD_D_SPACE + offset));
  86         fifo_hdr->wr_ptr =
  87                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  88                                                 RXF_RD_WR_PTR + offset));
  89         fifo_hdr->rd_ptr =
  90                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  91                                                 RXF_RD_RD_PTR + offset));
  92         fifo_hdr->fence_ptr =
  93                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  94                                                 RXF_RD_FENCE_PTR + offset));
  95         fifo_hdr->fence_mode =
  96                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  97                                                 RXF_SET_FENCE_MODE + offset));
  98
  99         /* Lock fence */
 100         iwl_trans_write_prph(fwrt->trans, RXF_SET_FENCE_MODE + offset, 0x1);
 101         /* Set fence pointer to the same place like WR pointer */
 102         iwl_trans_write_prph(fwrt->trans, RXF_LD_WR2FENCE + offset, 0x1);
 103         /* Set fence offset */
 104         iwl_trans_write_prph(fwrt->trans,
 105                              RXF_LD_FENCE_OFFSET_ADDR + offset, 0x0);
 106
 107         /* Read FIFO */
 108         fifo_len /= sizeof(u32); /* Size in DWORDS */
 109         for (i = 0; i < fifo_len; i++)
 110                 fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
 111                                                  RXF_FIFO_RD_FENCE_INC +
 112                                                  offset);
 113         *dump_data = iwl_fw_error_next_data(*dump_data);
 114 }
 115
 116 static void iwl_fwrt_dump_txf(struct iwl_fw_runtime *fwrt,
 117                               struct iwl_fw_error_dump_data **dump_data,
 118                               int size, u32 offset, int fifo_num)
 119 {
 120         struct iwl_fw_error_dump_fifo *fifo_hdr;
 121         u32 *fifo_data;
 122         u32 fifo_len;
 123         int i;
 124
 125         fifo_hdr = (void *)(*dump_data)->data;
 126         fifo_data = (void *)fifo_hdr->data;
 127         fifo_len = size;
 128
 129         /* No need to try to read the data if the length is 0 */
 130         if (fifo_len == 0)
 131                 return;
 132
 133         /* Add a TLV for the FIFO */
 134         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_TXF);
 135         (*dump_data)->len = cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
 136
 137         fifo_hdr->fifo_num = cpu_to_le32(fifo_num);
 138         fifo_hdr->available_bytes =
 139                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 140                                                 TXF_FIFO_ITEM_CNT + offset));
 141         fifo_hdr->wr_ptr =
 142                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 143                                                 TXF_WR_PTR + offset));
 144         fifo_hdr->rd_ptr =
 145                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 146                                                 TXF_RD_PTR + offset));
 147         fifo_hdr->fence_ptr =
 148                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 149                                                 TXF_FENCE_PTR + offset));
 150         fifo_hdr->fence_mode =
 151                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 152                                                 TXF_LOCK_FENCE + offset));
 153
 154         /* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
 155         iwl_trans_write_prph(fwrt->trans, TXF_READ_MODIFY_ADDR + offset,
 156                              TXF_WR_PTR + offset);
 157
 158         /* Dummy-read to advance the read pointer to the head */
 159         iwl_trans_read_prph(fwrt->trans, TXF_READ_MODIFY_DATA + offset);
 160
 161         /* Read FIFO */
 162         for (i = 0; i < fifo_len / sizeof(u32); i++)
 163                 fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
 164                                                   TXF_READ_MODIFY_DATA +
 165                                                   offset);
 166
 167         if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_txf)
 168                 fwrt->sanitize_ops->frob_txf(fwrt->sanitize_ctx,
 169                                              fifo_data, fifo_len);
 170
 171         *dump_data = iwl_fw_error_next_data(*dump_data);
 172 }
 173
 174 static void iwl_fw_dump_rxf(struct iwl_fw_runtime *fwrt,
 175                             struct iwl_fw_error_dump_data **dump_data)
 176 {
 177         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
 178
 179         IWL_DEBUG_INFO(fwrt, "WRT RX FIFO dump\n");
 180
 181         if (!iwl_trans_grab_nic_access(fwrt->trans))
 182                 return;
 183
 184         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_RXF)) {
 185                 /* Pull RXF1 */
 186                 iwl_fwrt_dump_rxf(fwrt, dump_data,
 187                                   cfg->lmac[0].rxfifo1_size, 0, 0);
 188                 /* Pull RXF2 */
 189                 iwl_fwrt_dump_rxf(fwrt, dump_data, cfg->rxfifo2_size,
 190                                   RXF_DIFF_FROM_PREV +
 191                                   fwrt->trans->trans_cfg->umac_prph_offset, 1);
 192                 /* Pull LMAC2 RXF1 */
 193                 if (fwrt->smem_cfg.num_lmacs > 1)
 194                         iwl_fwrt_dump_rxf(fwrt, dump_data,
 195                                           cfg->lmac[1].rxfifo1_size,
 196                                           LMAC2_PRPH_OFFSET, 2);
 197         }
 198
 199         iwl_trans_release_nic_access(fwrt->trans);
 200 }
 201
 202 static void iwl_fw_dump_txf(struct iwl_fw_runtime *fwrt,
 203                             struct iwl_fw_error_dump_data **dump_data)
 204 {
 205         struct iwl_fw_error_dump_fifo *fifo_hdr;
 206         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
 207         u32 *fifo_data;
 208         u32 fifo_len;
 209         int i, j;
 210
 211         IWL_DEBUG_INFO(fwrt, "WRT TX FIFO dump\n");
 212
 213         if (!iwl_trans_grab_nic_access(fwrt->trans))
 214                 return;
 215
 216         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_TXF)) {
 217                 /* Pull TXF data from LMAC1 */
 218                 for (i = 0; i < fwrt->smem_cfg.num_txfifo_entries; i++) {
 219                         /* Mark the number of TXF we're pulling now */
 220                         iwl_trans_write_prph(fwrt->trans, TXF_LARC_NUM, i);
 221                         iwl_fwrt_dump_txf(fwrt, dump_data,
 222                                           cfg->lmac[0].txfifo_size[i], 0, i);
 223                 }
 224
 225                 /* Pull TXF data from LMAC2 */
 226                 if (fwrt->smem_cfg.num_lmacs > 1) {
 227                         for (i = 0; i < fwrt->smem_cfg.num_txfifo_entries;
 228                              i++) {
 229                                 /* Mark the number of TXF we're pulling now */
 230                                 iwl_trans_write_prph(fwrt->trans,
 231                                                      TXF_LARC_NUM +
 232                                                      LMAC2_PRPH_OFFSET, i);
 233                                 iwl_fwrt_dump_txf(fwrt, dump_data,
 234                                                   cfg->lmac[1].txfifo_size[i],
 235                                                   LMAC2_PRPH_OFFSET,
 236                                                   i + cfg->num_txfifo_entries);
 237                         }
 238                 }
 239         }
 240
 241         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_INTERNAL_TXF) &&
 242             fw_has_capa(&fwrt->fw->ucode_capa,
 243                         IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
 244                 /* Pull UMAC internal TXF data from all TXFs */
 245                 for (i = 0;
 246                      i < ARRAY_SIZE(fwrt->smem_cfg.internal_txfifo_size);
 247                      i++) {
 248                         fifo_hdr = (void *)(*dump_data)->data;
 249                         fifo_data = (void *)fifo_hdr->data;
 250                         fifo_len = fwrt->smem_cfg.internal_txfifo_size[i];
 251
 252                         /* No need to try to read the data if the length is 0 */
 253                         if (fifo_len == 0)
 254                                 continue;
 255
 256                         /* Add a TLV for the internal FIFOs */
 257                         (*dump_data)->type =
 258                                 cpu_to_le32(IWL_FW_ERROR_DUMP_INTERNAL_TXF);
 259                         (*dump_data)->len =
 260                                 cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
 261
 262                         fifo_hdr->fifo_num = cpu_to_le32(i);
 263
 264                         /* Mark the number of TXF we're pulling now */
 265                         iwl_trans_write_prph(fwrt->trans, TXF_CPU2_NUM, i +
 266                                 fwrt->smem_cfg.num_txfifo_entries);
 267
 268                         fifo_hdr->available_bytes =
 269                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 270                                                                 TXF_CPU2_FIFO_ITEM_CNT));
 271                         fifo_hdr->wr_ptr =
 272                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 273                                                                 TXF_CPU2_WR_PTR));
 274                         fifo_hdr->rd_ptr =
 275                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 276                                                                 TXF_CPU2_RD_PTR));
 277                         fifo_hdr->fence_ptr =
 278                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 279                                                                 TXF_CPU2_FENCE_PTR));
 280                         fifo_hdr->fence_mode =
 281                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 282                                                                 TXF_CPU2_LOCK_FENCE));
 283
 284                         /* Set TXF_CPU2_READ_MODIFY_ADDR to TXF_CPU2_WR_PTR */
 285                         iwl_trans_write_prph(fwrt->trans,
 286                                              TXF_CPU2_READ_MODIFY_ADDR,
 287                                              TXF_CPU2_WR_PTR);
 288
 289                         /* Dummy-read to advance the read pointer to head */
 290                         iwl_trans_read_prph(fwrt->trans,
 291                                             TXF_CPU2_READ_MODIFY_DATA);
 292
 293                         /* Read FIFO */
 294                         fifo_len /= sizeof(u32); /* Size in DWORDS */
 295                         for (j = 0; j < fifo_len; j++)
 296                                 fifo_data[j] =
 297                                         iwl_trans_read_prph(fwrt->trans,
 298                                                             TXF_CPU2_READ_MODIFY_DATA);
 299                         *dump_data = iwl_fw_error_next_data(*dump_data);
 300                 }
 301         }
 302
 303         iwl_trans_release_nic_access(fwrt->trans);
 304 }
 305
 306 struct iwl_prph_range {
 307         u32 start, end;
 308 };
 309
 310 static const struct iwl_prph_range iwl_prph_dump_addr_comm[] = {
 311         { .start = 0x00a00000, .end = 0x00a00000 },
 312         { .start = 0x00a0000c, .end = 0x00a00024 },
 313         { .start = 0x00a0002c, .end = 0x00a0003c },
 314         { .start = 0x00a00410, .end = 0x00a00418 },
 315         { .start = 0x00a00420, .end = 0x00a00420 },
 316         { .start = 0x00a00428, .end = 0x00a00428 },
 317         { .start = 0x00a00430, .end = 0x00a0043c },
 318         { .start = 0x00a00444, .end = 0x00a00444 },
 319         { .start = 0x00a004c0, .end = 0x00a004cc },
 320         { .start = 0x00a004d8, .end = 0x00a004d8 },
 321         { .start = 0x00a004e0, .end = 0x00a004f0 },
 322         { .start = 0x00a00840, .end = 0x00a00840 },
 323         { .start = 0x00a00850, .end = 0x00a00858 },
 324         { .start = 0x00a01004, .end = 0x00a01008 },
 325         { .start = 0x00a01010, .end = 0x00a01010 },
 326         { .start = 0x00a01018, .end = 0x00a01018 },
 327         { .start = 0x00a01024, .end = 0x00a01024 },
 328         { .start = 0x00a0102c, .end = 0x00a01034 },
 329         { .start = 0x00a0103c, .end = 0x00a01040 },
 330         { .start = 0x00a01048, .end = 0x00a01094 },
 331         { .start = 0x00a01c00, .end = 0x00a01c20 },
 332         { .start = 0x00a01c58, .end = 0x00a01c58 },
 333         { .start = 0x00a01c7c, .end = 0x00a01c7c },
 334         { .start = 0x00a01c28, .end = 0x00a01c54 },
 335         { .start = 0x00a01c5c, .end = 0x00a01c5c },
 336         { .start = 0x00a01c60, .end = 0x00a01cdc },
 337         { .start = 0x00a01ce0, .end = 0x00a01d0c },
 338         { .start = 0x00a01d18, .end = 0x00a01d20 },
 339         { .start = 0x00a01d2c, .end = 0x00a01d30 },
 340         { .start = 0x00a01d40, .end = 0x00a01d5c },
 341         { .start = 0x00a01d80, .end = 0x00a01d80 },
 342         { .start = 0x00a01d98, .end = 0x00a01d9c },
 343         { .start = 0x00a01da8, .end = 0x00a01da8 },
 344         { .start = 0x00a01db8, .end = 0x00a01df4 },
 345         { .start = 0x00a01dc0, .end = 0x00a01dfc },
 346         { .start = 0x00a01e00, .end = 0x00a01e2c },
 347         { .start = 0x00a01e40, .end = 0x00a01e60 },
 348         { .start = 0x00a01e68, .end = 0x00a01e6c },
 349         { .start = 0x00a01e74, .end = 0x00a01e74 },
 350         { .start = 0x00a01e84, .end = 0x00a01e90 },
 351         { .start = 0x00a01e9c, .end = 0x00a01ec4 },
 352         { .start = 0x00a01ed0, .end = 0x00a01ee0 },
 353         { .start = 0x00a01f00, .end = 0x00a01f1c },
 354         { .start = 0x00a01f44, .end = 0x00a01ffc },
 355         { .start = 0x00a02000, .end = 0x00a02048 },
 356         { .start = 0x00a02068, .end = 0x00a020f0 },
 357         { .start = 0x00a02100, .end = 0x00a02118 },
 358         { .start = 0x00a02140, .end = 0x00a0214c },
 359         { .start = 0x00a02168, .end = 0x00a0218c },
 360         { .start = 0x00a021c0, .end = 0x00a021c0 },
 361         { .start = 0x00a02400, .end = 0x00a02410 },
 362         { .start = 0x00a02418, .end = 0x00a02420 },
 363         { .start = 0x00a02428, .end = 0x00a0242c },
 364         { .start = 0x00a02434, .end = 0x00a02434 },
 365         { .start = 0x00a02440, .end = 0x00a02460 },
 366         { .start = 0x00a02468, .end = 0x00a024b0 },
 367         { .start = 0x00a024c8, .end = 0x00a024cc },
 368         { .start = 0x00a02500, .end = 0x00a02504 },
 369         { .start = 0x00a0250c, .end = 0x00a02510 },
 370         { .start = 0x00a02540, .end = 0x00a02554 },
 371         { .start = 0x00a02580, .end = 0x00a025f4 },
 372         { .start = 0x00a02600, .end = 0x00a0260c },
 373         { .start = 0x00a02648, .end = 0x00a02650 },
 374         { .start = 0x00a02680, .end = 0x00a02680 },
 375         { .start = 0x00a026c0, .end = 0x00a026d0 },
 376         { .start = 0x00a02700, .end = 0x00a0270c },
 377         { .start = 0x00a02804, .end = 0x00a02804 },
 378         { .start = 0x00a02818, .end = 0x00a0281c },
 379         { .start = 0x00a02c00, .end = 0x00a02db4 },
 380         { .start = 0x00a02df4, .end = 0x00a02fb0 },
 381         { .start = 0x00a03000, .end = 0x00a03014 },
 382         { .start = 0x00a0301c, .end = 0x00a0302c },
 383         { .start = 0x00a03034, .end = 0x00a03038 },
 384         { .start = 0x00a03040, .end = 0x00a03048 },
 385         { .start = 0x00a03060, .end = 0x00a03068 },
 386         { .start = 0x00a03070, .end = 0x00a03074 },
 387         { .start = 0x00a0307c, .end = 0x00a0307c },
 388         { .start = 0x00a03080, .end = 0x00a03084 },
 389         { .start = 0x00a0308c, .end = 0x00a03090 },
 390         { .start = 0x00a03098, .end = 0x00a03098 },
 391         { .start = 0x00a030a0, .end = 0x00a030a0 },
 392         { .start = 0x00a030a8, .end = 0x00a030b4 },
 393         { .start = 0x00a030bc, .end = 0x00a030bc },
 394         { .start = 0x00a030c0, .end = 0x00a0312c },
 395         { .start = 0x00a03c00, .end = 0x00a03c5c },
 396         { .start = 0x00a04400, .end = 0x00a04454 },
 397         { .start = 0x00a04460, .end = 0x00a04474 },
 398         { .start = 0x00a044c0, .end = 0x00a044ec },
 399         { .start = 0x00a04500, .end = 0x00a04504 },
 400         { .start = 0x00a04510, .end = 0x00a04538 },
 401         { .start = 0x00a04540, .end = 0x00a04548 },
 402         { .start = 0x00a04560, .end = 0x00a0457c },
 403         { .start = 0x00a04590, .end = 0x00a04598 },
 404         { .start = 0x00a045c0, .end = 0x00a045f4 },
 405 };
 406
 407 static const struct iwl_prph_range iwl_prph_dump_addr_9000[] = {
 408         { .start = 0x00a05c00, .end = 0x00a05c18 },
 409         { .start = 0x00a05400, .end = 0x00a056e8 },
 410         { .start = 0x00a08000, .end = 0x00a098bc },
 411         { .start = 0x00a02400, .end = 0x00a02758 },
 412         { .start = 0x00a04764, .end = 0x00a0476c },
 413         { .start = 0x00a04770, .end = 0x00a04774 },
 414         { .start = 0x00a04620, .end = 0x00a04624 },
 415 };
 416
 417 static const struct iwl_prph_range iwl_prph_dump_addr_22000[] = {
 418         { .start = 0x00a00000, .end = 0x00a00000 },
 419         { .start = 0x00a0000c, .end = 0x00a00024 },
 420         { .start = 0x00a0002c, .end = 0x00a00034 },
 421         { .start = 0x00a0003c, .end = 0x00a0003c },
 422         { .start = 0x00a00410, .end = 0x00a00418 },
 423         { .start = 0x00a00420, .end = 0x00a00420 },
 424         { .start = 0x00a00428, .end = 0x00a00428 },
 425         { .start = 0x00a00430, .end = 0x00a0043c },
 426         { .start = 0x00a00444, .end = 0x00a00444 },
 427         { .start = 0x00a00840, .end = 0x00a00840 },
 428         { .start = 0x00a00850, .end = 0x00a00858 },
 429         { .start = 0x00a01004, .end = 0x00a01008 },
 430         { .start = 0x00a01010, .end = 0x00a01010 },
 431         { .start = 0x00a01018, .end = 0x00a01018 },
 432         { .start = 0x00a01024, .end = 0x00a01024 },
 433         { .start = 0x00a0102c, .end = 0x00a01034 },
 434         { .start = 0x00a0103c, .end = 0x00a01040 },
 435         { .start = 0x00a01048, .end = 0x00a01050 },
 436         { .start = 0x00a01058, .end = 0x00a01058 },
 437         { .start = 0x00a01060, .end = 0x00a01070 },
 438         { .start = 0x00a0108c, .end = 0x00a0108c },
 439         { .start = 0x00a01c20, .end = 0x00a01c28 },
 440         { .start = 0x00a01d10, .end = 0x00a01d10 },
 441         { .start = 0x00a01e28, .end = 0x00a01e2c },
 442         { .start = 0x00a01e60, .end = 0x00a01e60 },
 443         { .start = 0x00a01e80, .end = 0x00a01e80 },
 444         { .start = 0x00a01ea0, .end = 0x00a01ea0 },
 445         { .start = 0x00a02000, .end = 0x00a0201c },
 446         { .start = 0x00a02024, .end = 0x00a02024 },
 447         { .start = 0x00a02040, .end = 0x00a02048 },
 448         { .start = 0x00a020c0, .end = 0x00a020e0 },
 449         { .start = 0x00a02400, .end = 0x00a02404 },
 450         { .start = 0x00a0240c, .end = 0x00a02414 },
 451         { .start = 0x00a0241c, .end = 0x00a0243c },
 452         { .start = 0x00a02448, .end = 0x00a024bc },
 453         { .start = 0x00a024c4, .end = 0x00a024cc },
 454         { .start = 0x00a02508, .end = 0x00a02508 },
 455         { .start = 0x00a02510, .end = 0x00a02514 },
 456         { .start = 0x00a0251c, .end = 0x00a0251c },
 457         { .start = 0x00a0252c, .end = 0x00a0255c },
 458         { .start = 0x00a02564, .end = 0x00a025a0 },
 459         { .start = 0x00a025a8, .end = 0x00a025b4 },
 460         { .start = 0x00a025c0, .end = 0x00a025c0 },
 461         { .start = 0x00a025e8, .end = 0x00a025f4 },
 462         { .start = 0x00a02c08, .end = 0x00a02c18 },
 463         { .start = 0x00a02c2c, .end = 0x00a02c38 },
 464         { .start = 0x00a02c68, .end = 0x00a02c78 },
 465         { .start = 0x00a03000, .end = 0x00a03000 },
 466         { .start = 0x00a03010, .end = 0x00a03014 },
 467         { .start = 0x00a0301c, .end = 0x00a0302c },
 468         { .start = 0x00a03034, .end = 0x00a03038 },
 469         { .start = 0x00a03040, .end = 0x00a03044 },
 470         { .start = 0x00a03060, .end = 0x00a03068 },
 471         { .start = 0x00a03070, .end = 0x00a03070 },
 472         { .start = 0x00a0307c, .end = 0x00a03084 },
 473         { .start = 0x00a0308c, .end = 0x00a03090 },
 474         { .start = 0x00a03098, .end = 0x00a03098 },
 475         { .start = 0x00a030a0, .end = 0x00a030a0 },
 476         { .start = 0x00a030a8, .end = 0x00a030b4 },
 477         { .start = 0x00a030bc, .end = 0x00a030c0 },
 478         { .start = 0x00a030c8, .end = 0x00a030f4 },
 479         { .start = 0x00a03100, .end = 0x00a0312c },
 480         { .start = 0x00a03c00, .end = 0x00a03c5c },
 481         { .start = 0x00a04400, .end = 0x00a04454 },
 482         { .start = 0x00a04460, .end = 0x00a04474 },
 483         { .start = 0x00a044c0, .end = 0x00a044ec },
 484         { .start = 0x00a04500, .end = 0x00a04504 },
 485         { .start = 0x00a04510, .end = 0x00a04538 },
 486         { .start = 0x00a04540, .end = 0x00a04548 },
 487         { .start = 0x00a04560, .end = 0x00a04560 },
 488         { .start = 0x00a04570, .end = 0x00a0457c },
 489         { .start = 0x00a04590, .end = 0x00a04590 },
 490         { .start = 0x00a04598, .end = 0x00a04598 },
 491         { .start = 0x00a045c0, .end = 0x00a045f4 },
 492         { .start = 0x00a05c18, .end = 0x00a05c1c },
 493         { .start = 0x00a0c000, .end = 0x00a0c018 },
 494         { .start = 0x00a0c020, .end = 0x00a0c028 },
 495         { .start = 0x00a0c038, .end = 0x00a0c094 },
 496         { .start = 0x00a0c0c0, .end = 0x00a0c104 },
 497         { .start = 0x00a0c10c, .end = 0x00a0c118 },
 498         { .start = 0x00a0c150, .end = 0x00a0c174 },
 499         { .start = 0x00a0c17c, .end = 0x00a0c188 },
 500         { .start = 0x00a0c190, .end = 0x00a0c198 },
 501         { .start = 0x00a0c1a0, .end = 0x00a0c1a8 },
 502         { .start = 0x00a0c1b0, .end = 0x00a0c1b8 },
 503 };
 504
 505 static const struct iwl_prph_range iwl_prph_dump_addr_ax210[] = {
 506         { .start = 0x00d03c00, .end = 0x00d03c64 },
 507         { .start = 0x00d05c18, .end = 0x00d05c1c },
 508         { .start = 0x00d0c000, .end = 0x00d0c174 },
 509 };
 510
 511 static void iwl_read_prph_block(struct iwl_trans *trans, u32 start,
 512                                 u32 len_bytes, __le32 *data)
 513 {
 514         u32 i;
 515
 516         for (i = 0; i < len_bytes; i += 4)
 517                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(trans, start + i));
 518 }
 519
 520 static void iwl_dump_prph(struct iwl_fw_runtime *fwrt,
 521                           const struct iwl_prph_range *iwl_prph_dump_addr,
 522                           u32 range_len, void *ptr)
 523 {
 524         struct iwl_fw_error_dump_prph *prph;
 525         struct iwl_trans *trans = fwrt->trans;
 526         struct iwl_fw_error_dump_data **data =
 527                 (struct iwl_fw_error_dump_data **)ptr;
 528         u32 i;
 529
 530         if (!data)
 531                 return;
 532
 533         IWL_DEBUG_INFO(trans, "WRT PRPH dump\n");
 534
 535         if (!iwl_trans_grab_nic_access(trans))
 536                 return;
 537
 538         for (i = 0; i < range_len; i++) {
 539                 /* The range includes both boundaries */
 540                 int num_bytes_in_chunk = iwl_prph_dump_addr[i].end -
 541                          iwl_prph_dump_addr[i].start + 4;
 542
 543                 (*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PRPH);
 544                 (*data)->len = cpu_to_le32(sizeof(*prph) +
 545                                         num_bytes_in_chunk);
 546                 prph = (void *)(*data)->data;
 547                 prph->prph_start = cpu_to_le32(iwl_prph_dump_addr[i].start);
 548
 549                 iwl_read_prph_block(trans, iwl_prph_dump_addr[i].start,
 550                                     /* our range is inclusive, hence + 4 */
 551                                     iwl_prph_dump_addr[i].end -
 552                                     iwl_prph_dump_addr[i].start + 4,
 553                                     (void *)prph->data);
 554
 555                 *data = iwl_fw_error_next_data(*data);
 556         }
 557
 558         iwl_trans_release_nic_access(trans);
 559 }
 560
 561 /*
 562  * alloc_sgtable - allocates scallerlist table in the given size,
 563  * fills it with pages and returns it
 564  * @size: the size (in bytes) of the table
 565 */
 566 static struct scatterlist *alloc_sgtable(int size)
 567 {
 568         int alloc_size, nents, i;
 569         struct page *new_page;
 570         struct scatterlist *iter;
 571         struct scatterlist *table;
 572
 573         nents = DIV_ROUND_UP(size, PAGE_SIZE);
 574         table = kcalloc(nents, sizeof(*table), GFP_KERNEL);
 575         if (!table)
 576                 return NULL;
 577         sg_init_table(table, nents);
 578         iter = table;
 579         for_each_sg(table, iter, sg_nents(table), i) {
 580                 new_page = alloc_page(GFP_KERNEL);
 581                 if (!new_page) {
 582                         /* release all previous allocated pages in the table */
 583                         iter = table;
 584                         for_each_sg(table, iter, sg_nents(table), i) {
 585                                 new_page = sg_page(iter);
 586                                 if (new_page)
 587                                         __free_page(new_page);
 588                         }
 589                         kfree(table);
 590                         return NULL;
 591                 }
 592                 alloc_size = min_t(int, size, PAGE_SIZE);
 593                 size -= PAGE_SIZE;
 594                 sg_set_page(iter, new_page, alloc_size, 0);
 595         }
 596         return table;
 597 }
 598
 599 static void iwl_fw_get_prph_len(struct iwl_fw_runtime *fwrt,
 600                                 const struct iwl_prph_range *iwl_prph_dump_addr,
 601                                 u32 range_len, void *ptr)
 602 {
 603         u32 *prph_len = (u32 *)ptr;
 604         int i, num_bytes_in_chunk;
 605
 606         if (!prph_len)
 607                 return;
 608
 609         for (i = 0; i < range_len; i++) {
 610                 /* The range includes both boundaries */
 611                 num_bytes_in_chunk =
 612                         iwl_prph_dump_addr[i].end -
 613                         iwl_prph_dump_addr[i].start + 4;
 614
 615                 *prph_len += sizeof(struct iwl_fw_error_dump_data) +
 616                         sizeof(struct iwl_fw_error_dump_prph) +
 617                         num_bytes_in_chunk;
 618         }
 619 }
 620
 621 static void iwl_fw_prph_handler(struct iwl_fw_runtime *fwrt, void *ptr,
 622                                 void (*handler)(struct iwl_fw_runtime *,
 623                                                 const struct iwl_prph_range *,
 624                                                 u32, void *))
 625 {
 626         u32 range_len;
 627
 628         if (fwrt->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
 629                 range_len = ARRAY_SIZE(iwl_prph_dump_addr_ax210);
 630                 handler(fwrt, iwl_prph_dump_addr_ax210, range_len, ptr);
 631         } else if (fwrt->trans->trans_cfg->device_family >=
 632                    IWL_DEVICE_FAMILY_22000) {
 633                 range_len = ARRAY_SIZE(iwl_prph_dump_addr_22000);
 634                 handler(fwrt, iwl_prph_dump_addr_22000, range_len, ptr);
 635         } else {
 636                 range_len = ARRAY_SIZE(iwl_prph_dump_addr_comm);
 637                 handler(fwrt, iwl_prph_dump_addr_comm, range_len, ptr);
 638
 639                 if (fwrt->trans->trans_cfg->mq_rx_supported) {
 640                         range_len = ARRAY_SIZE(iwl_prph_dump_addr_9000);
 641                         handler(fwrt, iwl_prph_dump_addr_9000, range_len, ptr);
 642                 }
 643         }
 644 }
 645
 646 static void iwl_fw_dump_mem(struct iwl_fw_runtime *fwrt,
 647                             struct iwl_fw_error_dump_data **dump_data,
 648                             u32 len, u32 ofs, u32 type)
 649 {
 650         struct iwl_fw_error_dump_mem *dump_mem;
 651
 652         if (!len)
 653                 return;
 654
 655         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
 656         (*dump_data)->len = cpu_to_le32(len + sizeof(*dump_mem));
 657         dump_mem = (void *)(*dump_data)->data;
 658         dump_mem->type = cpu_to_le32(type);
 659         dump_mem->offset = cpu_to_le32(ofs);
 660         iwl_trans_read_mem_bytes(fwrt->trans, ofs, dump_mem->data, len);
 661         *dump_data = iwl_fw_error_next_data(*dump_data);
 662
 663         if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_mem)
 664                 fwrt->sanitize_ops->frob_mem(fwrt->sanitize_ctx, ofs,
 665                                              dump_mem->data, len);
 666
 667         IWL_DEBUG_INFO(fwrt, "WRT memory dump. Type=%u\n", dump_mem->type);
 668 }
 669
 670 #define ADD_LEN(len, item_len, const_len) \
 671         do {size_t item = item_len; len += (!!item) * const_len + item; } \
 672         while (0)
 673
 674 static int iwl_fw_rxf_len(struct iwl_fw_runtime *fwrt,
 675                           struct iwl_fwrt_shared_mem_cfg *mem_cfg)
 676 {
 677         size_t hdr_len = sizeof(struct iwl_fw_error_dump_data) +
 678                          sizeof(struct iwl_fw_error_dump_fifo);
 679         u32 fifo_len = 0;
 680         int i;
 681
 682         if (!iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_RXF))
 683                 return 0;
 684
 685         /* Count RXF2 size */
 686         ADD_LEN(fifo_len, mem_cfg->rxfifo2_size, hdr_len);
 687
 688         /* Count RXF1 sizes */
 689         if (WARN_ON(mem_cfg->num_lmacs > MAX_NUM_LMAC))
 690                 mem_cfg->num_lmacs = MAX_NUM_LMAC;
 691
 692         for (i = 0; i < mem_cfg->num_lmacs; i++)
 693                 ADD_LEN(fifo_len, mem_cfg->lmac[i].rxfifo1_size, hdr_len);
 694
 695         return fifo_len;
 696 }
 697
 698 static int iwl_fw_txf_len(struct iwl_fw_runtime *fwrt,
 699                           struct iwl_fwrt_shared_mem_cfg *mem_cfg)
 700 {
 701         size_t hdr_len = sizeof(struct iwl_fw_error_dump_data) +
 702                          sizeof(struct iwl_fw_error_dump_fifo);
 703         u32 fifo_len = 0;
 704         int i;
 705
 706         if (!iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_TXF))
 707                 goto dump_internal_txf;
 708
 709         /* Count TXF sizes */
 710         if (WARN_ON(mem_cfg->num_lmacs > MAX_NUM_LMAC))
 711                 mem_cfg->num_lmacs = MAX_NUM_LMAC;
 712
 713         for (i = 0; i < mem_cfg->num_lmacs; i++) {
 714                 int j;
 715
 716                 for (j = 0; j < mem_cfg->num_txfifo_entries; j++)
 717                         ADD_LEN(fifo_len, mem_cfg->lmac[i].txfifo_size[j],
 718                                 hdr_len);
 719         }
 720
 721 dump_internal_txf:
 722         if (!(iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_INTERNAL_TXF) &&
 723               fw_has_capa(&fwrt->fw->ucode_capa,
 724                           IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)))
 725                 goto out;
 726
 727         for (i = 0; i < ARRAY_SIZE(mem_cfg->internal_txfifo_size); i++)
 728                 ADD_LEN(fifo_len, mem_cfg->internal_txfifo_size[i], hdr_len);
 729
 730 out:
 731         return fifo_len;
 732 }
 733
 734 static void iwl_dump_paging(struct iwl_fw_runtime *fwrt,
 735                             struct iwl_fw_error_dump_data **data)
 736 {
 737         int i;
 738
 739         IWL_DEBUG_INFO(fwrt, "WRT paging dump\n");
 740         for (i = 1; i < fwrt->num_of_paging_blk + 1; i++) {
 741                 struct iwl_fw_error_dump_paging *paging;
 742                 struct page *pages =
 743                         fwrt->fw_paging_db[i].fw_paging_block;
 744                 dma_addr_t addr = fwrt->fw_paging_db[i].fw_paging_phys;
 745
 746                 (*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PAGING);
 747                 (*data)->len = cpu_to_le32(sizeof(*paging) +
 748                                              PAGING_BLOCK_SIZE);
 749                 paging =  (void *)(*data)->data;
 750                 paging->index = cpu_to_le32(i);
 751                 dma_sync_single_for_cpu(fwrt->trans->dev, addr,
 752                                         PAGING_BLOCK_SIZE,
 753                                         DMA_BIDIRECTIONAL);
 754                 memcpy(paging->data, page_address(pages),
 755                        PAGING_BLOCK_SIZE);
 756                 dma_sync_single_for_device(fwrt->trans->dev, addr,
 757                                            PAGING_BLOCK_SIZE,
 758                                            DMA_BIDIRECTIONAL);
 759                 (*data) = iwl_fw_error_next_data(*data);
 760
 761                 if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_mem)
 762                         fwrt->sanitize_ops->frob_mem(fwrt->sanitize_ctx,
 763                                                      fwrt->fw_paging_db[i].fw_offs,
 764                                                      paging->data,
 765                                                      PAGING_BLOCK_SIZE);
 766         }
 767 }
 768
 769 static struct iwl_fw_error_dump_file *
 770 iwl_fw_error_dump_file(struct iwl_fw_runtime *fwrt,
 771                        struct iwl_fw_dump_ptrs *fw_error_dump,
 772                        struct iwl_fwrt_dump_data *data)
 773 {
 774         struct iwl_fw_error_dump_file *dump_file;
 775         struct iwl_fw_error_dump_data *dump_data;
 776         struct iwl_fw_error_dump_info *dump_info;
 777         struct iwl_fw_error_dump_smem_cfg *dump_smem_cfg;
 778         struct iwl_fw_error_dump_trigger_desc *dump_trig;
 779         u32 sram_len, sram_ofs;
 780         const struct iwl_fw_dbg_mem_seg_tlv *fw_mem = fwrt->fw->dbg.mem_tlv;
 781         struct iwl_fwrt_shared_mem_cfg *mem_cfg = &fwrt->smem_cfg;
 782         u32 file_len, fifo_len = 0, prph_len = 0, radio_len = 0;
 783         u32 smem_len = fwrt->fw->dbg.n_mem_tlv ? 0 : fwrt->trans->cfg->smem_len;
 784         u32 sram2_len = fwrt->fw->dbg.n_mem_tlv ?
 785                                 0 : fwrt->trans->cfg->dccm2_len;
 786         int i;
 787
 788         /* SRAM - include stack CCM if driver knows the values for it */
 789         if (!fwrt->trans->cfg->dccm_offset || !fwrt->trans->cfg->dccm_len) {
 790                 const struct fw_img *img;
 791
 792                 if (fwrt->cur_fw_img >= IWL_UCODE_TYPE_MAX)
 793                         return NULL;
 794                 img = &fwrt->fw->img[fwrt->cur_fw_img];
 795                 sram_ofs = img->sec[IWL_UCODE_SECTION_DATA].offset;
 796                 sram_len = img->sec[IWL_UCODE_SECTION_DATA].len;
 797         } else {
 798                 sram_ofs = fwrt->trans->cfg->dccm_offset;
 799                 sram_len = fwrt->trans->cfg->dccm_len;
 800         }
 801
 802         /* reading RXF/TXF sizes */
 803         if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status)) {
 804                 fifo_len = iwl_fw_rxf_len(fwrt, mem_cfg);
 805                 fifo_len += iwl_fw_txf_len(fwrt, mem_cfg);
 806
 807                 /* Make room for PRPH registers */
 808                 if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_PRPH))
 809                         iwl_fw_prph_handler(fwrt, &prph_len,
 810                                             iwl_fw_get_prph_len);
 811
 812                 if (fwrt->trans->trans_cfg->device_family ==
 813                     IWL_DEVICE_FAMILY_7000 &&
 814                     iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_RADIO_REG))
 815                         radio_len = sizeof(*dump_data) + RADIO_REG_MAX_READ;
 816         }
 817
 818         file_len = sizeof(*dump_file) + fifo_len + prph_len + radio_len;
 819
 820         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_DEV_FW_INFO))
 821                 file_len += sizeof(*dump_data) + sizeof(*dump_info);
 822         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM_CFG))
 823                 file_len += sizeof(*dump_data) + sizeof(*dump_smem_cfg);
 824
 825         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM)) {
 826                 size_t hdr_len = sizeof(*dump_data) +
 827                                  sizeof(struct iwl_fw_error_dump_mem);
 828
 829                 /* Dump SRAM only if no mem_tlvs */
 830                 if (!fwrt->fw->dbg.n_mem_tlv)
 831                         ADD_LEN(file_len, sram_len, hdr_len);
 832
 833                 /* Make room for all mem types that exist */
 834                 ADD_LEN(file_len, smem_len, hdr_len);
 835                 ADD_LEN(file_len, sram2_len, hdr_len);
 836
 837                 for (i = 0; i < fwrt->fw->dbg.n_mem_tlv; i++)
 838                         ADD_LEN(file_len, le32_to_cpu(fw_mem[i].len), hdr_len);
 839         }
 840
 841         /* Make room for fw's virtual image pages, if it exists */
 842         if (iwl_fw_dbg_is_paging_enabled(fwrt))
 843                 file_len += fwrt->num_of_paging_blk *
 844                         (sizeof(*dump_data) +
 845                          sizeof(struct iwl_fw_error_dump_paging) +
 846                          PAGING_BLOCK_SIZE);
 847
 848         if (iwl_fw_dbg_is_d3_debug_enabled(fwrt) && fwrt->dump.d3_debug_data) {
 849                 file_len += sizeof(*dump_data) +
 850                         fwrt->trans->cfg->d3_debug_data_length * 2;
 851         }
 852
 853         /* If we only want a monitor dump, reset the file length */
 854         if (data->monitor_only) {
 855                 file_len = sizeof(*dump_file) + sizeof(*dump_data) * 2 +
 856                            sizeof(*dump_info) + sizeof(*dump_smem_cfg);
 857         }
 858
 859         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_ERROR_INFO) &&
 860             data->desc)
 861                 file_len += sizeof(*dump_data) + sizeof(*dump_trig) +
 862                         data->desc->len;
 863
 864         dump_file = vzalloc(file_len);
 865         if (!dump_file)
 866                 return NULL;
 867
 868         fw_error_dump->fwrt_ptr = dump_file;
 869
 870         dump_file->barker = cpu_to_le32(IWL_FW_ERROR_DUMP_BARKER);
 871         dump_data = (void *)dump_file->data;
 872
 873         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_DEV_FW_INFO)) {
 874                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_DEV_FW_INFO);
 875                 dump_data->len = cpu_to_le32(sizeof(*dump_info));
 876                 dump_info = (void *)dump_data->data;
 877                 dump_info->hw_type =
 878                         cpu_to_le32(CSR_HW_REV_TYPE(fwrt->trans->hw_rev));
 879                 dump_info->hw_step =
 880                         cpu_to_le32(fwrt->trans->hw_rev_step);
 881                 memcpy(dump_info->fw_human_readable, fwrt->fw->human_readable,
 882                        sizeof(dump_info->fw_human_readable));
 883                 strscpy_pad(dump_info->dev_human_readable, fwrt->trans->name,
 884                         sizeof(dump_info->dev_human_readable));
 885                 strscpy_pad(dump_info->bus_human_readable, fwrt->dev->bus->name,
 886                         sizeof(dump_info->bus_human_readable));
 887                 dump_info->num_of_lmacs = fwrt->smem_cfg.num_lmacs;
 888                 dump_info->lmac_err_id[0] =
 889                         cpu_to_le32(fwrt->dump.lmac_err_id[0]);
 890                 if (fwrt->smem_cfg.num_lmacs > 1)
 891                         dump_info->lmac_err_id[1] =
 892                                 cpu_to_le32(fwrt->dump.lmac_err_id[1]);
 893                 dump_info->umac_err_id = cpu_to_le32(fwrt->dump.umac_err_id);
 894
 895                 dump_data = iwl_fw_error_next_data(dump_data);
 896         }
 897
 898         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM_CFG)) {
 899                 /* Dump shared memory configuration */
 900                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_CFG);
 901                 dump_data->len = cpu_to_le32(sizeof(*dump_smem_cfg));
 902                 dump_smem_cfg = (void *)dump_data->data;
 903                 dump_smem_cfg->num_lmacs = cpu_to_le32(mem_cfg->num_lmacs);
 904                 dump_smem_cfg->num_txfifo_entries =
 905                         cpu_to_le32(mem_cfg->num_txfifo_entries);
 906                 for (i = 0; i < MAX_NUM_LMAC; i++) {
 907                         int j;
 908                         u32 *txf_size = mem_cfg->lmac[i].txfifo_size;
 909
 910                         for (j = 0; j < TX_FIFO_MAX_NUM; j++)
 911                                 dump_smem_cfg->lmac[i].txfifo_size[j] =
 912                                         cpu_to_le32(txf_size[j]);
 913                         dump_smem_cfg->lmac[i].rxfifo1_size =
 914                                 cpu_to_le32(mem_cfg->lmac[i].rxfifo1_size);
 915                 }
 916                 dump_smem_cfg->rxfifo2_size =
 917                         cpu_to_le32(mem_cfg->rxfifo2_size);
 918                 dump_smem_cfg->internal_txfifo_addr =
 919                         cpu_to_le32(mem_cfg->internal_txfifo_addr);
 920                 for (i = 0; i < TX_FIFO_INTERNAL_MAX_NUM; i++) {
 921                         dump_smem_cfg->internal_txfifo_size[i] =
 922                                 cpu_to_le32(mem_cfg->internal_txfifo_size[i]);
 923                 }
 924
 925                 dump_data = iwl_fw_error_next_data(dump_data);
 926         }
 927
 928         /* We only dump the FIFOs if the FW is in error state */
 929         if (fifo_len) {
 930                 iwl_fw_dump_rxf(fwrt, &dump_data);
 931                 iwl_fw_dump_txf(fwrt, &dump_data);
 932         }
 933
 934         if (radio_len)
 935                 iwl_read_radio_regs(fwrt, &dump_data);
 936
 937         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_ERROR_INFO) &&
 938             data->desc) {
 939                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_ERROR_INFO);
 940                 dump_data->len = cpu_to_le32(sizeof(*dump_trig) +
 941                                              data->desc->len);
 942                 dump_trig = (void *)dump_data->data;
 943                 memcpy(dump_trig, &data->desc->trig_desc,
 944                        sizeof(*dump_trig) + data->desc->len);
 945
 946                 dump_data = iwl_fw_error_next_data(dump_data);
 947         }
 948
 949         /* In case we only want monitor dump, skip to dump trasport data */
 950         if (data->monitor_only)
 951                 goto out;
 952
 953         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM)) {
 954                 const struct iwl_fw_dbg_mem_seg_tlv *fw_dbg_mem =
 955                         fwrt->fw->dbg.mem_tlv;
 956
 957                 if (!fwrt->fw->dbg.n_mem_tlv)
 958                         iwl_fw_dump_mem(fwrt, &dump_data, sram_len, sram_ofs,
 959                                         IWL_FW_ERROR_DUMP_MEM_SRAM);
 960
 961                 for (i = 0; i < fwrt->fw->dbg.n_mem_tlv; i++) {
 962                         u32 len = le32_to_cpu(fw_dbg_mem[i].len);
 963                         u32 ofs = le32_to_cpu(fw_dbg_mem[i].ofs);
 964
 965                         iwl_fw_dump_mem(fwrt, &dump_data, len, ofs,
 966                                         le32_to_cpu(fw_dbg_mem[i].data_type));
 967                 }
 968
 969                 iwl_fw_dump_mem(fwrt, &dump_data, smem_len,
 970                                 fwrt->trans->cfg->smem_offset,
 971                                 IWL_FW_ERROR_DUMP_MEM_SMEM);
 972
 973                 iwl_fw_dump_mem(fwrt, &dump_data, sram2_len,
 974                                 fwrt->trans->cfg->dccm2_offset,
 975                                 IWL_FW_ERROR_DUMP_MEM_SRAM);
 976         }
 977
 978         if (iwl_fw_dbg_is_d3_debug_enabled(fwrt) && fwrt->dump.d3_debug_data) {
 979                 u32 addr = fwrt->trans->cfg->d3_debug_data_base_addr;
 980                 size_t data_size = fwrt->trans->cfg->d3_debug_data_length;
 981
 982                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_D3_DEBUG_DATA);
 983                 dump_data->len = cpu_to_le32(data_size * 2);
 984
 985                 memcpy(dump_data->data, fwrt->dump.d3_debug_data, data_size);
 986
 987                 kfree(fwrt->dump.d3_debug_data);
 988                 fwrt->dump.d3_debug_data = NULL;
 989
 990                 iwl_trans_read_mem_bytes(fwrt->trans, addr,
 991                                          dump_data->data + data_size,
 992                                          data_size);
 993
 994                 if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_mem)
 995                         fwrt->sanitize_ops->frob_mem(fwrt->sanitize_ctx, addr,
 996                                                      dump_data->data + data_size,
 997                                                      data_size);
 998
 999                 dump_data = iwl_fw_error_next_data(dump_data);
1000         }
1001
1002         /* Dump fw's virtual image */
1003         if (iwl_fw_dbg_is_paging_enabled(fwrt))
1004                 iwl_dump_paging(fwrt, &dump_data);
1005
1006         if (prph_len)
1007                 iwl_fw_prph_handler(fwrt, &dump_data, iwl_dump_prph);
1008
1009 out:
1010         dump_file->file_len = cpu_to_le32(file_len);
1011         return dump_file;
1012 }
1013
1014 /**
1015  * struct iwl_dump_ini_region_data - region data
1016  * @reg_tlv: region TLV
1017  * @dump_data: dump data
1018  */
1019 struct iwl_dump_ini_region_data {
1020         struct iwl_ucode_tlv *reg_tlv;
1021         struct iwl_fwrt_dump_data *dump_data;
1022 };
1023
1024 static int iwl_dump_ini_prph_mac_iter_common(struct iwl_fw_runtime *fwrt,
1025                                              void *range_ptr, u32 addr,
1026                                              __le32 size)
1027 {
1028         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1029         __le32 *val = range->data;
1030         u32 prph_val;
1031         int i;
1032
1033         range->internal_base_addr = cpu_to_le32(addr);
1034         range->range_data_size = size;
1035         for (i = 0; i < le32_to_cpu(size); i += 4) {
1036                 prph_val = iwl_read_prph(fwrt->trans, addr + i);
1037                 if (iwl_trans_is_hw_error_value(prph_val))
1038                         return -EBUSY;
1039                 *val++ = cpu_to_le32(prph_val);
1040         }
1041
1042         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1043 }
1044
1045 static int
1046 iwl_dump_ini_prph_mac_iter(struct iwl_fw_runtime *fwrt,
1047                            struct iwl_dump_ini_region_data *reg_data,
1048                            void *range_ptr, u32 range_len, int idx)
1049 {
1050         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1051         u32 addr = le32_to_cpu(reg->addrs[idx]) +
1052                    le32_to_cpu(reg->dev_addr.offset);
1053
1054         return iwl_dump_ini_prph_mac_iter_common(fwrt, range_ptr, addr,
1055                                                  reg->dev_addr.size);
1056 }
1057
1058 static int
1059 iwl_dump_ini_prph_mac_block_iter(struct iwl_fw_runtime *fwrt,
1060                                  struct iwl_dump_ini_region_data *reg_data,
1061                                  void *range_ptr, u32 range_len, int idx)
1062 {
1063         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1064         struct iwl_fw_ini_addr_size *pairs = (void *)reg->addrs;
1065         u32 addr = le32_to_cpu(reg->dev_addr_range.offset) +
1066                    le32_to_cpu(pairs[idx].addr);
1067
1068         return iwl_dump_ini_prph_mac_iter_common(fwrt, range_ptr, addr,
1069                                                  pairs[idx].size);
1070 }
1071
1072 static int iwl_dump_ini_prph_phy_iter_common(struct iwl_fw_runtime *fwrt,
1073                                              void *range_ptr, u32 addr,
1074                                              __le32 size, __le32 offset)
1075 {
1076         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1077         __le32 *val = range->data;
1078         u32 indirect_wr_addr = WMAL_INDRCT_RD_CMD1;
1079         u32 indirect_rd_addr = WMAL_MRSPF_1;
1080         u32 prph_val;
1081         u32 dphy_state;
1082         u32 dphy_addr;
1083         int i;
1084
1085         range->internal_base_addr = cpu_to_le32(addr);
1086         range->range_data_size = size;
1087
1088         if (fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
1089                 indirect_wr_addr = WMAL_INDRCT_CMD1;
1090
1091         indirect_wr_addr += le32_to_cpu(offset);
1092         indirect_rd_addr += le32_to_cpu(offset);
1093
1094         if (!iwl_trans_grab_nic_access(fwrt->trans))
1095                 return -EBUSY;
1096
1097         dphy_addr = (offset) ? WFPM_LMAC2_PS_CTL_RW : WFPM_LMAC1_PS_CTL_RW;
1098         dphy_state = iwl_read_umac_prph_no_grab(fwrt->trans, dphy_addr);
1099
1100         for (i = 0; i < le32_to_cpu(size); i += 4) {
1101                 if (dphy_state == HBUS_TIMEOUT ||
1102                     (dphy_state & WFPM_PS_CTL_RW_PHYRF_PD_FSM_CURSTATE_MSK) !=
1103                     WFPM_PHYRF_STATE_ON) {
1104                         *val++ = cpu_to_le32(WFPM_DPHY_OFF);
1105                         continue;
1106                 }
1107
1108                 iwl_write_prph_no_grab(fwrt->trans, indirect_wr_addr,
1109                                        WMAL_INDRCT_CMD(addr + i));
1110                 prph_val = iwl_read_prph_no_grab(fwrt->trans,
1111                                                  indirect_rd_addr);
1112                 *val++ = cpu_to_le32(prph_val);
1113         }
1114
1115         iwl_trans_release_nic_access(fwrt->trans);
1116         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1117 }
1118
1119 static int
1120 iwl_dump_ini_prph_phy_iter(struct iwl_fw_runtime *fwrt,
1121                            struct iwl_dump_ini_region_data *reg_data,
1122                            void *range_ptr, u32 range_len, int idx)
1123 {
1124         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1125         u32 addr = le32_to_cpu(reg->addrs[idx]);
1126
1127         return iwl_dump_ini_prph_phy_iter_common(fwrt, range_ptr, addr,
1128                                                  reg->dev_addr.size,
1129                                                  reg->dev_addr.offset);
1130 }
1131
1132 static int
1133 iwl_dump_ini_prph_phy_block_iter(struct iwl_fw_runtime *fwrt,
1134                                  struct iwl_dump_ini_region_data *reg_data,
1135                                  void *range_ptr, u32 range_len, int idx)
1136 {
1137         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1138         struct iwl_fw_ini_addr_size *pairs = (void *)reg->addrs;
1139         u32 addr = le32_to_cpu(pairs[idx].addr);
1140
1141         return iwl_dump_ini_prph_phy_iter_common(fwrt, range_ptr, addr,
1142                                                  pairs[idx].size,
1143                                                  reg->dev_addr_range.offset);
1144 }
1145
1146 static int iwl_dump_ini_csr_iter(struct iwl_fw_runtime *fwrt,
1147                                  struct iwl_dump_ini_region_data *reg_data,
1148                                  void *range_ptr, u32 range_len, int idx)
1149 {
1150         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1151         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1152         __le32 *val = range->data;
1153         u32 addr = le32_to_cpu(reg->addrs[idx]) +
1154                    le32_to_cpu(reg->dev_addr.offset);
1155         int i;
1156
1157         range->internal_base_addr = cpu_to_le32(addr);
1158         range->range_data_size = reg->dev_addr.size;
1159         for (i = 0; i < le32_to_cpu(reg->dev_addr.size); i += 4)
1160                 *val++ = cpu_to_le32(iwl_trans_read32(fwrt->trans, addr + i));
1161
1162         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1163 }
1164
1165 static int iwl_dump_ini_config_iter(struct iwl_fw_runtime *fwrt,
1166                                     struct iwl_dump_ini_region_data *reg_data,
1167                                     void *range_ptr, u32 range_len, int idx)
1168 {
1169         struct iwl_trans *trans = fwrt->trans;
1170         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1171         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1172         __le32 *val = range->data;
1173         u32 addr = le32_to_cpu(reg->addrs[idx]) +
1174                    le32_to_cpu(reg->dev_addr.offset);
1175         int i;
1176
1177         /* we shouldn't get here if the trans doesn't have read_config32 */
1178         if (WARN_ON_ONCE(!trans->ops->read_config32))
1179                 return -EOPNOTSUPP;
1180
1181         range->internal_base_addr = cpu_to_le32(addr);
1182         range->range_data_size = reg->dev_addr.size;
1183         for (i = 0; i < le32_to_cpu(reg->dev_addr.size); i += 4) {
1184                 int ret;
1185                 u32 tmp;
1186
1187                 ret = trans->ops->read_config32(trans, addr + i, &tmp);
1188                 if (ret < 0)
1189                         return ret;
1190
1191                 *val++ = cpu_to_le32(tmp);
1192         }
1193
1194         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1195 }
1196
1197 static int iwl_dump_ini_dev_mem_iter(struct iwl_fw_runtime *fwrt,
1198                                      struct iwl_dump_ini_region_data *reg_data,
1199                                      void *range_ptr, u32 range_len, int idx)
1200 {
1201         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1202         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1203         u32 addr = le32_to_cpu(reg->addrs[idx]) +
1204                    le32_to_cpu(reg->dev_addr.offset);
1205
1206         range->internal_base_addr = cpu_to_le32(addr);
1207         range->range_data_size = reg->dev_addr.size;
1208         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1209                                  le32_to_cpu(reg->dev_addr.size));
1210
1211         if (reg->sub_type == IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_HW_SMEM &&
1212             fwrt->sanitize_ops && fwrt->sanitize_ops->frob_txf)
1213                 fwrt->sanitize_ops->frob_txf(fwrt->sanitize_ctx,
1214                                              range->data,
1215                                              le32_to_cpu(reg->dev_addr.size));
1216
1217         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1218 }
1219
1220 static int _iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt,
1221                                      void *range_ptr, u32 range_len, int idx)
1222 {
1223         struct page *page = fwrt->fw_paging_db[idx].fw_paging_block;
1224         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1225         dma_addr_t addr = fwrt->fw_paging_db[idx].fw_paging_phys;
1226         u32 page_size = fwrt->fw_paging_db[idx].fw_paging_size;
1227
1228         range->page_num = cpu_to_le32(idx);
1229         range->range_data_size = cpu_to_le32(page_size);
1230         dma_sync_single_for_cpu(fwrt->trans->dev, addr, page_size,
1231                                 DMA_BIDIRECTIONAL);
1232         memcpy(range->data, page_address(page), page_size);
1233         dma_sync_single_for_device(fwrt->trans->dev, addr, page_size,
1234                                    DMA_BIDIRECTIONAL);
1235
1236         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1237 }
1238
1239 static int iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt,
1240                                     struct iwl_dump_ini_region_data *reg_data,
1241                                     void *range_ptr, u32 range_len, int idx)
1242 {
1243         struct iwl_fw_ini_error_dump_range *range;
1244         u32 page_size;
1245
1246         /* all paged index start from 1 to skip CSS section */
1247         idx++;
1248
1249         if (!fwrt->trans->trans_cfg->gen2)
1250                 return _iwl_dump_ini_paging_iter(fwrt, range_ptr, range_len, idx);
1251
1252         range = range_ptr;
1253         page_size = fwrt->trans->init_dram.paging[idx].size;
1254
1255         range->page_num = cpu_to_le32(idx);
1256         range->range_data_size = cpu_to_le32(page_size);
1257         memcpy(range->data, fwrt->trans->init_dram.paging[idx].block,
1258                page_size);
1259
1260         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1261 }
1262
1263 static int
1264 iwl_dump_ini_mon_dram_iter(struct iwl_fw_runtime *fwrt,
1265                            struct iwl_dump_ini_region_data *reg_data,
1266                            void *range_ptr, u32 range_len, int idx)
1267 {
1268         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1269         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1270         struct iwl_dram_data *frag;
1271         u32 alloc_id = le32_to_cpu(reg->dram_alloc_id);
1272
1273         frag = &fwrt->trans->dbg.fw_mon_ini[alloc_id].frags[idx];
1274
1275         range->dram_base_addr = cpu_to_le64(frag->physical);
1276         range->range_data_size = cpu_to_le32(frag->size);
1277
1278         memcpy(range->data, frag->block, frag->size);
1279
1280         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1281 }
1282
1283 static int iwl_dump_ini_mon_smem_iter(struct iwl_fw_runtime *fwrt,
1284                                       struct iwl_dump_ini_region_data *reg_data,
1285                                       void *range_ptr, u32 range_len, int idx)
1286 {
1287         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1288         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1289         u32 addr = le32_to_cpu(reg->internal_buffer.base_addr);
1290
1291         range->internal_base_addr = cpu_to_le32(addr);
1292         range->range_data_size = reg->internal_buffer.size;
1293         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1294                                  le32_to_cpu(reg->internal_buffer.size));
1295
1296         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1297 }
1298
1299 static bool iwl_ini_txf_iter(struct iwl_fw_runtime *fwrt,
1300                              struct iwl_dump_ini_region_data *reg_data, int idx)
1301 {
1302         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1303         struct iwl_txf_iter_data *iter = &fwrt->dump.txf_iter_data;
1304         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
1305         int txf_num = cfg->num_txfifo_entries;
1306         int int_txf_num = ARRAY_SIZE(cfg->internal_txfifo_size);
1307         u32 lmac_bitmap = le32_to_cpu(reg->fifos.fid[0]);
1308
1309         if (!idx) {
1310                 if (le32_to_cpu(reg->fifos.offset) && cfg->num_lmacs == 1) {
1311                         IWL_ERR(fwrt, "WRT: Invalid lmac offset 0x%x\n",
1312                                 le32_to_cpu(reg->fifos.offset));
1313                         return false;
1314                 }
1315
1316                 iter->internal_txf = 0;
1317                 iter->fifo_size = 0;
1318                 iter->fifo = -1;
1319                 if (le32_to_cpu(reg->fifos.offset))
1320                         iter->lmac = 1;
1321                 else
1322                         iter->lmac = 0;
1323         }
1324
1325         if (!iter->internal_txf) {
1326                 for (iter->fifo++; iter->fifo < txf_num; iter->fifo++) {
1327                         iter->fifo_size =
1328                                 cfg->lmac[iter->lmac].txfifo_size[iter->fifo];
1329                         if (iter->fifo_size && (lmac_bitmap & BIT(iter->fifo)))
1330                                 return true;
1331                 }
1332                 iter->fifo--;
1333         }
1334
1335         iter->internal_txf = 1;
1336
1337         if (!fw_has_capa(&fwrt->fw->ucode_capa,
1338                          IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG))
1339                 return false;
1340
1341         for (iter->fifo++; iter->fifo < int_txf_num + txf_num; iter->fifo++) {
1342                 iter->fifo_size =
1343                         cfg->internal_txfifo_size[iter->fifo - txf_num];
1344                 if (iter->fifo_size && (lmac_bitmap & BIT(iter->fifo)))
1345                         return true;
1346         }
1347
1348         return false;
1349 }
1350
1351 static int iwl_dump_ini_txf_iter(struct iwl_fw_runtime *fwrt,
1352                                  struct iwl_dump_ini_region_data *reg_data,
1353                                  void *range_ptr, u32 range_len, int idx)
1354 {
1355         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1356         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1357         struct iwl_txf_iter_data *iter = &fwrt->dump.txf_iter_data;
1358         struct iwl_fw_ini_error_dump_register *reg_dump = (void *)range->data;
1359         u32 offs = le32_to_cpu(reg->fifos.offset), addr;
1360         u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
1361         u32 registers_size = registers_num * sizeof(*reg_dump);
1362         __le32 *data;
1363         int i;
1364
1365         if (!iwl_ini_txf_iter(fwrt, reg_data, idx))
1366                 return -EIO;
1367
1368         if (!iwl_trans_grab_nic_access(fwrt->trans))
1369                 return -EBUSY;
1370
1371         range->fifo_hdr.fifo_num = cpu_to_le32(iter->fifo);
1372         range->fifo_hdr.num_of_registers = cpu_to_le32(registers_num);
1373         range->range_data_size = cpu_to_le32(iter->fifo_size + registers_size);
1374
1375         iwl_write_prph_no_grab(fwrt->trans, TXF_LARC_NUM + offs, iter->fifo);
1376
1377         /*
1378          * read txf registers. for each register, write to the dump the
1379          * register address and its value
1380          */
1381         for (i = 0; i < registers_num; i++) {
1382                 addr = le32_to_cpu(reg->addrs[i]) + offs;
1383
1384                 reg_dump->addr = cpu_to_le32(addr);
1385                 reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
1386                                                                    addr));
1387
1388                 reg_dump++;
1389         }
1390
1391         if (reg->fifos.hdr_only) {
1392                 range->range_data_size = cpu_to_le32(registers_size);
1393                 goto out;
1394         }
1395
1396         /* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
1397         iwl_write_prph_no_grab(fwrt->trans, TXF_READ_MODIFY_ADDR + offs,
1398                                TXF_WR_PTR + offs);
1399
1400         /* Dummy-read to advance the read pointer to the head */
1401         iwl_read_prph_no_grab(fwrt->trans, TXF_READ_MODIFY_DATA + offs);
1402
1403         /* Read FIFO */
1404         addr = TXF_READ_MODIFY_DATA + offs;
1405         data = (void *)reg_dump;
1406         for (i = 0; i < iter->fifo_size; i += sizeof(*data))
1407                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
1408
1409         if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_txf)
1410                 fwrt->sanitize_ops->frob_txf(fwrt->sanitize_ctx,
1411                                              reg_dump, iter->fifo_size);
1412
1413 out:
1414         iwl_trans_release_nic_access(fwrt->trans);
1415
1416         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1417 }
1418
1419 static int
1420 iwl_dump_ini_prph_snps_dphyip_iter(struct iwl_fw_runtime *fwrt,
1421                                    struct iwl_dump_ini_region_data *reg_data,
1422                                    void *range_ptr, u32 range_len, int idx)
1423 {
1424         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1425         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1426         __le32 *val = range->data;
1427         __le32 offset = reg->dev_addr.offset;
1428         u32 indirect_rd_wr_addr = DPHYIP_INDIRECT;
1429         u32 addr = le32_to_cpu(reg->addrs[idx]);
1430         u32 dphy_state, dphy_addr, prph_val;
1431         int i;
1432
1433         range->internal_base_addr = cpu_to_le32(addr);
1434         range->range_data_size = reg->dev_addr.size;
1435
1436         if (!iwl_trans_grab_nic_access(fwrt->trans))
1437                 return -EBUSY;
1438
1439         indirect_rd_wr_addr += le32_to_cpu(offset);
1440
1441         dphy_addr = offset ? WFPM_LMAC2_PS_CTL_RW : WFPM_LMAC1_PS_CTL_RW;
1442         dphy_state = iwl_read_umac_prph_no_grab(fwrt->trans, dphy_addr);
1443
1444         for (i = 0; i < le32_to_cpu(reg->dev_addr.size); i += 4) {
1445                 if (dphy_state == HBUS_TIMEOUT ||
1446                     (dphy_state & WFPM_PS_CTL_RW_PHYRF_PD_FSM_CURSTATE_MSK) !=
1447                     WFPM_PHYRF_STATE_ON) {
1448                         *val++ = cpu_to_le32(WFPM_DPHY_OFF);
1449                         continue;
1450                 }
1451
1452                 iwl_write_prph_no_grab(fwrt->trans, indirect_rd_wr_addr,
1453                                        addr + i);
1454                 /* wait a bit for value to be ready in register */
1455                 udelay(1);
1456                 prph_val = iwl_read_prph_no_grab(fwrt->trans,
1457                                                  indirect_rd_wr_addr);
1458                 *val++ = cpu_to_le32((prph_val & DPHYIP_INDIRECT_RD_MSK) >>
1459                                      DPHYIP_INDIRECT_RD_SHIFT);
1460         }
1461
1462         iwl_trans_release_nic_access(fwrt->trans);
1463         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1464 }
1465
1466 struct iwl_ini_rxf_data {
1467         u32 fifo_num;
1468         u32 size;
1469         u32 offset;
1470 };
1471
1472 static void iwl_ini_get_rxf_data(struct iwl_fw_runtime *fwrt,
1473                                  struct iwl_dump_ini_region_data *reg_data,
1474                                  struct iwl_ini_rxf_data *data)
1475 {
1476         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1477         u32 fid1 = le32_to_cpu(reg->fifos.fid[0]);
1478         u32 fid2 = le32_to_cpu(reg->fifos.fid[1]);
1479         u8 fifo_idx;
1480
1481         if (!data)
1482                 return;
1483
1484         memset(data, 0, sizeof(*data));
1485
1486         /* make sure only one bit is set in only one fid */
1487         if (WARN_ONCE(hweight_long(fid1) + hweight_long(fid2) != 1,
1488                       "fid1=%x, fid2=%x\n", fid1, fid2))
1489                 return;
1490
1491         if (fid1) {
1492                 fifo_idx = ffs(fid1) - 1;
1493                 if (WARN_ONCE(fifo_idx >= MAX_NUM_LMAC, "fifo_idx=%d\n",
1494                               fifo_idx))
1495                         return;
1496
1497                 data->size = fwrt->smem_cfg.lmac[fifo_idx].rxfifo1_size;
1498                 data->fifo_num = fifo_idx;
1499         } else {
1500                 u8 max_idx;
1501
1502                 fifo_idx = ffs(fid2) - 1;
1503                 if (iwl_fw_lookup_notif_ver(fwrt->fw, SYSTEM_GROUP,
1504                                             SHARED_MEM_CFG_CMD, 0) <= 3)
1505                         max_idx = 0;
1506                 else
1507                         max_idx = 1;
1508
1509                 if (WARN_ONCE(fifo_idx > max_idx,
1510                               "invalid umac fifo idx %d", fifo_idx))
1511                         return;
1512
1513                 /* use bit 31 to distinguish between umac and lmac rxf while
1514                  * parsing the dump
1515                  */
1516                 data->fifo_num = fifo_idx | IWL_RXF_UMAC_BIT;
1517
1518                 switch (fifo_idx) {
1519                 case 0:
1520                         data->size = fwrt->smem_cfg.rxfifo2_size;
1521                         data->offset = iwl_umac_prph(fwrt->trans,
1522                                                      RXF_DIFF_FROM_PREV);
1523                         break;
1524                 case 1:
1525                         data->size = fwrt->smem_cfg.rxfifo2_control_size;
1526                         data->offset = iwl_umac_prph(fwrt->trans,
1527                                                      RXF2C_DIFF_FROM_PREV);
1528                         break;
1529                 }
1530         }
1531 }
1532
1533 static int iwl_dump_ini_rxf_iter(struct iwl_fw_runtime *fwrt,
1534                                  struct iwl_dump_ini_region_data *reg_data,
1535                                  void *range_ptr, u32 range_len, int idx)
1536 {
1537         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1538         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1539         struct iwl_ini_rxf_data rxf_data;
1540         struct iwl_fw_ini_error_dump_register *reg_dump = (void *)range->data;
1541         u32 offs = le32_to_cpu(reg->fifos.offset), addr;
1542         u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
1543         u32 registers_size = registers_num * sizeof(*reg_dump);
1544         __le32 *data;
1545         int i;
1546
1547         iwl_ini_get_rxf_data(fwrt, reg_data, &rxf_data);
1548         if (!rxf_data.size)
1549                 return -EIO;
1550
1551         if (!iwl_trans_grab_nic_access(fwrt->trans))
1552                 return -EBUSY;
1553
1554         range->fifo_hdr.fifo_num = cpu_to_le32(rxf_data.fifo_num);
1555         range->fifo_hdr.num_of_registers = cpu_to_le32(registers_num);
1556         range->range_data_size = cpu_to_le32(rxf_data.size + registers_size);
1557
1558         /*
1559          * read rxf registers. for each register, write to the dump the
1560          * register address and its value
1561          */
1562         for (i = 0; i < registers_num; i++) {
1563                 addr = le32_to_cpu(reg->addrs[i]) + offs;
1564
1565                 reg_dump->addr = cpu_to_le32(addr);
1566                 reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
1567                                                                    addr));
1568
1569                 reg_dump++;
1570         }
1571
1572         if (reg->fifos.hdr_only) {
1573                 range->range_data_size = cpu_to_le32(registers_size);
1574                 goto out;
1575         }
1576
1577         offs = rxf_data.offset;
1578
1579         /* Lock fence */
1580         iwl_write_prph_no_grab(fwrt->trans, RXF_SET_FENCE_MODE + offs, 0x1);
1581         /* Set fence pointer to the same place like WR pointer */
1582         iwl_write_prph_no_grab(fwrt->trans, RXF_LD_WR2FENCE + offs, 0x1);
1583         /* Set fence offset */
1584         iwl_write_prph_no_grab(fwrt->trans, RXF_LD_FENCE_OFFSET_ADDR + offs,
1585                                0x0);
1586
1587         /* Read FIFO */
1588         addr =  RXF_FIFO_RD_FENCE_INC + offs;
1589         data = (void *)reg_dump;
1590         for (i = 0; i < rxf_data.size; i += sizeof(*data))
1591                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
1592
1593 out:
1594         iwl_trans_release_nic_access(fwrt->trans);
1595
1596         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1597 }
1598
1599 static int
1600 iwl_dump_ini_err_table_iter(struct iwl_fw_runtime *fwrt,
1601                             struct iwl_dump_ini_region_data *reg_data,
1602                             void *range_ptr, u32 range_len, int idx)
1603 {
1604         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1605         struct iwl_fw_ini_region_err_table *err_table = &reg->err_table;
1606         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1607         u32 addr = le32_to_cpu(err_table->base_addr) +
1608                    le32_to_cpu(err_table->offset);
1609
1610         range->internal_base_addr = cpu_to_le32(addr);
1611         range->range_data_size = err_table->size;
1612         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1613                                  le32_to_cpu(err_table->size));
1614
1615         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1616 }
1617
1618 static int
1619 iwl_dump_ini_special_mem_iter(struct iwl_fw_runtime *fwrt,
1620                               struct iwl_dump_ini_region_data *reg_data,
1621                               void *range_ptr, u32 range_len, int idx)
1622 {
1623         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1624         struct iwl_fw_ini_region_special_device_memory *special_mem =
1625                 &reg->special_mem;
1626
1627         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1628         u32 addr = le32_to_cpu(special_mem->base_addr) +
1629                    le32_to_cpu(special_mem->offset);
1630
1631         range->internal_base_addr = cpu_to_le32(addr);
1632         range->range_data_size = special_mem->size;
1633         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1634                                  le32_to_cpu(special_mem->size));
1635
1636         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1637 }
1638
1639 static int
1640 iwl_dump_ini_dbgi_sram_iter(struct iwl_fw_runtime *fwrt,
1641                             struct iwl_dump_ini_region_data *reg_data,
1642                             void *range_ptr, u32 range_len, int idx)
1643 {
1644         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1645         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1646         __le32 *val = range->data;
1647         u32 prph_data;
1648         int i;
1649
1650         if (!iwl_trans_grab_nic_access(fwrt->trans))
1651                 return -EBUSY;
1652
1653         range->range_data_size = reg->dev_addr.size;
1654         for (i = 0; i < (le32_to_cpu(reg->dev_addr.size) / 4); i++) {
1655                 prph_data = iwl_read_prph_no_grab(fwrt->trans, (i % 2) ?
1656                                           DBGI_SRAM_TARGET_ACCESS_RDATA_MSB :
1657                                           DBGI_SRAM_TARGET_ACCESS_RDATA_LSB);
1658                 if (iwl_trans_is_hw_error_value(prph_data)) {
1659                         iwl_trans_release_nic_access(fwrt->trans);
1660                         return -EBUSY;
1661                 }
1662                 *val++ = cpu_to_le32(prph_data);
1663         }
1664         iwl_trans_release_nic_access(fwrt->trans);
1665         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1666 }
1667
1668 static int iwl_dump_ini_fw_pkt_iter(struct iwl_fw_runtime *fwrt,
1669                                     struct iwl_dump_ini_region_data *reg_data,
1670                                     void *range_ptr, u32 range_len, int idx)
1671 {
1672         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1673         struct iwl_rx_packet *pkt = reg_data->dump_data->fw_pkt;
1674         u32 pkt_len;
1675
1676         if (!pkt)
1677                 return -EIO;
1678
1679         pkt_len = iwl_rx_packet_payload_len(pkt);
1680
1681         memcpy(&range->fw_pkt_hdr, &pkt->hdr, sizeof(range->fw_pkt_hdr));
1682         range->range_data_size = cpu_to_le32(pkt_len);
1683
1684         memcpy(range->data, pkt->data, pkt_len);
1685
1686         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1687 }
1688
1689 static int iwl_dump_ini_imr_iter(struct iwl_fw_runtime *fwrt,
1690                                  struct iwl_dump_ini_region_data *reg_data,
1691                                  void *range_ptr, u32 range_len, int idx)
1692 {
1693         /* read the IMR memory and DMA it to SRAM */
1694         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1695         u64 imr_curr_addr = fwrt->trans->dbg.imr_data.imr_curr_addr;
1696         u32 imr_rem_bytes = fwrt->trans->dbg.imr_data.imr2sram_remainbyte;
1697         u32 sram_addr = fwrt->trans->dbg.imr_data.sram_addr;
1698         u32 sram_size = fwrt->trans->dbg.imr_data.sram_size;
1699         u32 size_to_dump = (imr_rem_bytes > sram_size) ? sram_size : imr_rem_bytes;
1700
1701         range->range_data_size = cpu_to_le32(size_to_dump);
1702         if (iwl_trans_write_imr_mem(fwrt->trans, sram_addr,
1703                                     imr_curr_addr, size_to_dump)) {
1704                 IWL_ERR(fwrt, "WRT_DEBUG: IMR Memory transfer failed\n");
1705                 return -1;
1706         }
1707
1708         fwrt->trans->dbg.imr_data.imr_curr_addr = imr_curr_addr + size_to_dump;
1709         fwrt->trans->dbg.imr_data.imr2sram_remainbyte -= size_to_dump;
1710
1711         iwl_trans_read_mem_bytes(fwrt->trans, sram_addr, range->data,
1712                                  size_to_dump);
1713         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1714 }
1715
1716 static void *
1717 iwl_dump_ini_mem_fill_header(struct iwl_fw_runtime *fwrt,
1718                              struct iwl_dump_ini_region_data *reg_data,
1719                              void *data, u32 data_len)
1720 {
1721         struct iwl_fw_ini_error_dump *dump = data;
1722
1723         dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1724
1725         return dump->data;
1726 }
1727
1728 /**
1729  * mask_apply_and_normalize - applies mask on val and normalize the result
1730  *
1731  * The normalization is based on the first set bit in the mask
1732  *
1733  * @val: value
1734  * @mask: mask to apply and to normalize with
1735  */
1736 static u32 mask_apply_and_normalize(u32 val, u32 mask)
1737 {
1738         return (val & mask) >> (ffs(mask) - 1);
1739 }
1740
1741 static __le32 iwl_get_mon_reg(struct iwl_fw_runtime *fwrt, u32 alloc_id,
1742                               const struct iwl_fw_mon_reg *reg_info)
1743 {
1744         u32 val, offs;
1745
1746         /* The header addresses of DBGCi is calculate as follows:
1747          * DBGC1 address + (0x100 * i)
1748          */
1749         offs = (alloc_id - IWL_FW_INI_ALLOCATION_ID_DBGC1) * 0x100;
1750
1751         if (!reg_info || !reg_info->addr || !reg_info->mask)
1752                 return 0;
1753
1754         val = iwl_read_prph_no_grab(fwrt->trans, reg_info->addr + offs);
1755
1756         return cpu_to_le32(mask_apply_and_normalize(val, reg_info->mask));
1757 }
1758
1759 static void *
1760 iwl_dump_ini_mon_fill_header(struct iwl_fw_runtime *fwrt, u32 alloc_id,
1761                              struct iwl_fw_ini_monitor_dump *data,
1762                              const struct iwl_fw_mon_regs *addrs)
1763 {
1764         if (!iwl_trans_grab_nic_access(fwrt->trans)) {
1765                 IWL_ERR(fwrt, "Failed to get monitor header\n");
1766                 return NULL;
1767         }
1768
1769         data->write_ptr = iwl_get_mon_reg(fwrt, alloc_id,
1770                                           &addrs->write_ptr);
1771         if (fwrt->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
1772                 u32 wrt_ptr = le32_to_cpu(data->write_ptr);
1773
1774                 data->write_ptr = cpu_to_le32(wrt_ptr >> 2);
1775         }
1776         data->cycle_cnt = iwl_get_mon_reg(fwrt, alloc_id,
1777                                           &addrs->cycle_cnt);
1778         data->cur_frag = iwl_get_mon_reg(fwrt, alloc_id,
1779                                          &addrs->cur_frag);
1780
1781         iwl_trans_release_nic_access(fwrt->trans);
1782
1783         data->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1784
1785         return data->data;
1786 }
1787
1788 static void *
1789 iwl_dump_ini_mon_dram_fill_header(struct iwl_fw_runtime *fwrt,
1790                                   struct iwl_dump_ini_region_data *reg_data,
1791                                   void *data, u32 data_len)
1792 {
1793         struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data;
1794         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1795         u32 alloc_id = le32_to_cpu(reg->dram_alloc_id);
1796
1797         return iwl_dump_ini_mon_fill_header(fwrt, alloc_id, mon_dump,
1798                                             &fwrt->trans->cfg->mon_dram_regs);
1799 }
1800
1801 static void *
1802 iwl_dump_ini_mon_smem_fill_header(struct iwl_fw_runtime *fwrt,
1803                                   struct iwl_dump_ini_region_data *reg_data,
1804                                   void *data, u32 data_len)
1805 {
1806         struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data;
1807         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1808         u32 alloc_id = le32_to_cpu(reg->internal_buffer.alloc_id);
1809
1810         return iwl_dump_ini_mon_fill_header(fwrt, alloc_id, mon_dump,
1811                                             &fwrt->trans->cfg->mon_smem_regs);
1812 }
1813
1814 static void *
1815 iwl_dump_ini_mon_dbgi_fill_header(struct iwl_fw_runtime *fwrt,
1816                                   struct iwl_dump_ini_region_data *reg_data,
1817                                   void *data, u32 data_len)
1818 {
1819         struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data;
1820
1821         return iwl_dump_ini_mon_fill_header(fwrt,
1822                                             /* no offset calculation later */
1823                                             IWL_FW_INI_ALLOCATION_ID_DBGC1,
1824                                             mon_dump,
1825                                             &fwrt->trans->cfg->mon_dbgi_regs);
1826 }
1827
1828 static void *
1829 iwl_dump_ini_err_table_fill_header(struct iwl_fw_runtime *fwrt,
1830                                    struct iwl_dump_ini_region_data *reg_data,
1831                                    void *data, u32 data_len)
1832 {
1833         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1834         struct iwl_fw_ini_err_table_dump *dump = data;
1835
1836         dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1837         dump->version = reg->err_table.version;
1838
1839         return dump->data;
1840 }
1841
1842 static void *
1843 iwl_dump_ini_special_mem_fill_header(struct iwl_fw_runtime *fwrt,
1844                                      struct iwl_dump_ini_region_data *reg_data,
1845                                      void *data, u32 data_len)
1846 {
1847         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1848         struct iwl_fw_ini_special_device_memory *dump = data;
1849
1850         dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1851         dump->type = reg->special_mem.type;
1852         dump->version = reg->special_mem.version;
1853
1854         return dump->data;
1855 }
1856
1857 static void *
1858 iwl_dump_ini_imr_fill_header(struct iwl_fw_runtime *fwrt,
1859                              struct iwl_dump_ini_region_data *reg_data,
1860                              void *data, u32 data_len)
1861 {
1862         struct iwl_fw_ini_error_dump *dump = data;
1863
1864         dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1865
1866         return dump->data;
1867 }
1868
1869 static u32 iwl_dump_ini_mem_ranges(struct iwl_fw_runtime *fwrt,
1870                                    struct iwl_dump_ini_region_data *reg_data)
1871 {
1872         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1873
1874         return iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
1875 }
1876
1877 static u32
1878 iwl_dump_ini_mem_block_ranges(struct iwl_fw_runtime *fwrt,
1879                               struct iwl_dump_ini_region_data *reg_data)
1880 {
1881         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1882         size_t size = sizeof(struct iwl_fw_ini_addr_size);
1883
1884         return iwl_tlv_array_len_with_size(reg_data->reg_tlv, reg, size);
1885 }
1886
1887 static u32 iwl_dump_ini_paging_ranges(struct iwl_fw_runtime *fwrt,
1888                                       struct iwl_dump_ini_region_data *reg_data)
1889 {
1890         if (fwrt->trans->trans_cfg->gen2) {
1891                 if (fwrt->trans->init_dram.paging_cnt)
1892                         return fwrt->trans->init_dram.paging_cnt - 1;
1893                 else
1894                         return 0;
1895         }
1896
1897         return fwrt->num_of_paging_blk;
1898 }
1899
1900 static u32
1901 iwl_dump_ini_mon_dram_ranges(struct iwl_fw_runtime *fwrt,
1902                              struct iwl_dump_ini_region_data *reg_data)
1903 {
1904         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1905         struct iwl_fw_mon *fw_mon;
1906         u32 ranges = 0, alloc_id = le32_to_cpu(reg->dram_alloc_id);
1907         int i;
1908
1909         fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];
1910
1911         for (i = 0; i < fw_mon->num_frags; i++) {
1912                 if (!fw_mon->frags[i].size)
1913                         break;
1914
1915                 ranges++;
1916         }
1917
1918         return ranges;
1919 }
1920
1921 static u32 iwl_dump_ini_txf_ranges(struct iwl_fw_runtime *fwrt,
1922                                    struct iwl_dump_ini_region_data *reg_data)
1923 {
1924         u32 num_of_fifos = 0;
1925
1926         while (iwl_ini_txf_iter(fwrt, reg_data, num_of_fifos))
1927                 num_of_fifos++;
1928
1929         return num_of_fifos;
1930 }
1931
1932 static u32 iwl_dump_ini_single_range(struct iwl_fw_runtime *fwrt,
1933                                      struct iwl_dump_ini_region_data *reg_data)
1934 {
1935         return 1;
1936 }
1937
1938 static u32 iwl_dump_ini_imr_ranges(struct iwl_fw_runtime *fwrt,
1939                                    struct iwl_dump_ini_region_data *reg_data)
1940 {
1941         /* range is total number of pages need to copied from
1942          *IMR memory to SRAM and later from SRAM to DRAM
1943          */
1944         u32 imr_enable = fwrt->trans->dbg.imr_data.imr_enable;
1945         u32 imr_size = fwrt->trans->dbg.imr_data.imr_size;
1946         u32 sram_size = fwrt->trans->dbg.imr_data.sram_size;
1947
1948         if (imr_enable == 0 || imr_size == 0 || sram_size == 0) {
1949                 IWL_DEBUG_INFO(fwrt,
1950                                "WRT: Invalid imr data enable: %d, imr_size: %d, sram_size: %d\n",
1951                                imr_enable, imr_size, sram_size);
1952                 return 0;
1953         }
1954
1955         return((imr_size % sram_size) ? (imr_size / sram_size + 1) : (imr_size / sram_size));
1956 }
1957
1958 static u32 iwl_dump_ini_mem_get_size(struct iwl_fw_runtime *fwrt,
1959                                      struct iwl_dump_ini_region_data *reg_data)
1960 {
1961         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1962         u32 size = le32_to_cpu(reg->dev_addr.size);
1963         u32 ranges = iwl_dump_ini_mem_ranges(fwrt, reg_data);
1964
1965         if (!size || !ranges)
1966                 return 0;
1967
1968         return sizeof(struct iwl_fw_ini_error_dump) + ranges *
1969                 (size + sizeof(struct iwl_fw_ini_error_dump_range));
1970 }
1971
1972 static u32
1973 iwl_dump_ini_mem_block_get_size(struct iwl_fw_runtime *fwrt,
1974                                 struct iwl_dump_ini_region_data *reg_data)
1975 {
1976         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1977         struct iwl_fw_ini_addr_size *pairs = (void *)reg->addrs;
1978         u32 ranges = iwl_dump_ini_mem_block_ranges(fwrt, reg_data);
1979         u32 size = sizeof(struct iwl_fw_ini_error_dump);
1980         int range;
1981
1982         if (!ranges)
1983                 return 0;
1984
1985         for (range = 0; range < ranges; range++)
1986                 size += le32_to_cpu(pairs[range].size);
1987
1988         return size + ranges * sizeof(struct iwl_fw_ini_error_dump_range);
1989 }
1990
1991 static u32
1992 iwl_dump_ini_paging_get_size(struct iwl_fw_runtime *fwrt,
1993                              struct iwl_dump_ini_region_data *reg_data)
1994 {
1995         int i;
1996         u32 range_header_len = sizeof(struct iwl_fw_ini_error_dump_range);
1997         u32 size = sizeof(struct iwl_fw_ini_error_dump);
1998
1999         /* start from 1 to skip CSS section */
2000         for (i = 1; i <= iwl_dump_ini_paging_ranges(fwrt, reg_data); i++) {
2001                 size += range_header_len;
2002                 if (fwrt->trans->trans_cfg->gen2)
2003                         size += fwrt->trans->init_dram.paging[i].size;
2004                 else
2005                         size += fwrt->fw_paging_db[i].fw_paging_size;
2006         }
2007
2008         return size;
2009 }
2010
2011 static u32
2012 iwl_dump_ini_mon_dram_get_size(struct iwl_fw_runtime *fwrt,
2013                                struct iwl_dump_ini_region_data *reg_data)
2014 {
2015         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2016         struct iwl_fw_mon *fw_mon;
2017         u32 size = 0, alloc_id = le32_to_cpu(reg->dram_alloc_id);
2018         int i;
2019
2020         fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];
2021
2022         for (i = 0; i < fw_mon->num_frags; i++) {
2023                 struct iwl_dram_data *frag = &fw_mon->frags[i];
2024
2025                 if (!frag->size)
2026                         break;
2027
2028                 size += sizeof(struct iwl_fw_ini_error_dump_range) + frag->size;
2029         }
2030
2031         if (size)
2032                 size += sizeof(struct iwl_fw_ini_monitor_dump);
2033
2034         return size;
2035 }
2036
2037 static u32
2038 iwl_dump_ini_mon_smem_get_size(struct iwl_fw_runtime *fwrt,
2039                                struct iwl_dump_ini_region_data *reg_data)
2040 {
2041         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2042         u32 size;
2043
2044         size = le32_to_cpu(reg->internal_buffer.size);
2045         if (!size)
2046                 return 0;
2047
2048         size += sizeof(struct iwl_fw_ini_monitor_dump) +
2049                 sizeof(struct iwl_fw_ini_error_dump_range);
2050
2051         return size;
2052 }
2053
2054 static u32 iwl_dump_ini_mon_dbgi_get_size(struct iwl_fw_runtime *fwrt,
2055                                           struct iwl_dump_ini_region_data *reg_data)
2056 {
2057         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2058         u32 size = le32_to_cpu(reg->dev_addr.size);
2059         u32 ranges = iwl_dump_ini_mem_ranges(fwrt, reg_data);
2060
2061         if (!size || !ranges)
2062                 return 0;
2063
2064         return sizeof(struct iwl_fw_ini_monitor_dump) + ranges *
2065                 (size + sizeof(struct iwl_fw_ini_error_dump_range));
2066 }
2067
2068 static u32 iwl_dump_ini_txf_get_size(struct iwl_fw_runtime *fwrt,
2069                                      struct iwl_dump_ini_region_data *reg_data)
2070 {
2071         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2072         struct iwl_txf_iter_data *iter = &fwrt->dump.txf_iter_data;
2073         u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
2074         u32 size = 0;
2075         u32 fifo_hdr = sizeof(struct iwl_fw_ini_error_dump_range) +
2076                        registers_num *
2077                        sizeof(struct iwl_fw_ini_error_dump_register);
2078
2079         while (iwl_ini_txf_iter(fwrt, reg_data, size)) {
2080                 size += fifo_hdr;
2081                 if (!reg->fifos.hdr_only)
2082                         size += iter->fifo_size;
2083         }
2084
2085         if (!size)
2086                 return 0;
2087
2088         return size + sizeof(struct iwl_fw_ini_error_dump);
2089 }
2090
2091 static u32 iwl_dump_ini_rxf_get_size(struct iwl_fw_runtime *fwrt,
2092                                      struct iwl_dump_ini_region_data *reg_data)
2093 {
2094         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2095         struct iwl_ini_rxf_data rx_data;
2096         u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
2097         u32 size = sizeof(struct iwl_fw_ini_error_dump) +
2098                 sizeof(struct iwl_fw_ini_error_dump_range) +
2099                 registers_num * sizeof(struct iwl_fw_ini_error_dump_register);
2100
2101         if (reg->fifos.hdr_only)
2102                 return size;
2103
2104         iwl_ini_get_rxf_data(fwrt, reg_data, &rx_data);
2105         size += rx_data.size;
2106
2107         return size;
2108 }
2109
2110 static u32
2111 iwl_dump_ini_err_table_get_size(struct iwl_fw_runtime *fwrt,
2112                                 struct iwl_dump_ini_region_data *reg_data)
2113 {
2114         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2115         u32 size = le32_to_cpu(reg->err_table.size);
2116
2117         if (size)
2118                 size += sizeof(struct iwl_fw_ini_err_table_dump) +
2119                         sizeof(struct iwl_fw_ini_error_dump_range);
2120
2121         return size;
2122 }
2123
2124 static u32
2125 iwl_dump_ini_special_mem_get_size(struct iwl_fw_runtime *fwrt,
2126                                   struct iwl_dump_ini_region_data *reg_data)
2127 {
2128         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2129         u32 size = le32_to_cpu(reg->special_mem.size);
2130
2131         if (size)
2132                 size += sizeof(struct iwl_fw_ini_special_device_memory) +
2133                         sizeof(struct iwl_fw_ini_error_dump_range);
2134
2135         return size;
2136 }
2137
2138 static u32
2139 iwl_dump_ini_fw_pkt_get_size(struct iwl_fw_runtime *fwrt,
2140                              struct iwl_dump_ini_region_data *reg_data)
2141 {
2142         u32 size = 0;
2143
2144         if (!reg_data->dump_data->fw_pkt)
2145                 return 0;
2146
2147         size += iwl_rx_packet_payload_len(reg_data->dump_data->fw_pkt);
2148         if (size)
2149                 size += sizeof(struct iwl_fw_ini_error_dump) +
2150                         sizeof(struct iwl_fw_ini_error_dump_range);
2151
2152         return size;
2153 }
2154
2155 static u32
2156 iwl_dump_ini_imr_get_size(struct iwl_fw_runtime *fwrt,
2157                           struct iwl_dump_ini_region_data *reg_data)
2158 {
2159         u32 ranges = 0;
2160         u32 imr_enable = fwrt->trans->dbg.imr_data.imr_enable;
2161         u32 imr_size = fwrt->trans->dbg.imr_data.imr_size;
2162         u32 sram_size = fwrt->trans->dbg.imr_data.sram_size;
2163
2164         if (imr_enable == 0 || imr_size == 0 || sram_size == 0) {
2165                 IWL_DEBUG_INFO(fwrt,
2166                                "WRT: Invalid imr data enable: %d, imr_size: %d, sram_size: %d\n",
2167                                imr_enable, imr_size, sram_size);
2168                 return 0;
2169         }
2170         ranges = iwl_dump_ini_imr_ranges(fwrt, reg_data);
2171         if (!ranges) {
2172                 IWL_ERR(fwrt, "WRT: ranges :=%d\n", ranges);
2173                 return 0;
2174         }
2175         imr_size += sizeof(struct iwl_fw_ini_error_dump) +
2176                 ranges * sizeof(struct iwl_fw_ini_error_dump_range);
2177         return imr_size;
2178 }
2179
2180 /**
2181  * struct iwl_dump_ini_mem_ops - ini memory dump operations
2182  * @get_num_of_ranges: returns the number of memory ranges in the region.
2183  * @get_size: returns the total size of the region.
2184  * @fill_mem_hdr: fills region type specific headers and returns pointer to
2185  *      the first range or NULL if failed to fill headers.
2186  * @fill_range: copies a given memory range into the dump.
2187  *      Returns the size of the range or negative error value otherwise.
2188  */
2189 struct iwl_dump_ini_mem_ops {
2190         u32 (*get_num_of_ranges)(struct iwl_fw_runtime *fwrt,
2191                                  struct iwl_dump_ini_region_data *reg_data);
2192         u32 (*get_size)(struct iwl_fw_runtime *fwrt,
2193                         struct iwl_dump_ini_region_data *reg_data);
2194         void *(*fill_mem_hdr)(struct iwl_fw_runtime *fwrt,
2195                               struct iwl_dump_ini_region_data *reg_data,
2196                               void *data, u32 data_len);
2197         int (*fill_range)(struct iwl_fw_runtime *fwrt,
2198                           struct iwl_dump_ini_region_data *reg_data,
2199                           void *range, u32 range_len, int idx);
2200 };
2201
2202 /**
2203  * iwl_dump_ini_mem
2204  *
2205  * Creates a dump tlv and copy a memory region into it.
2206  * Returns the size of the current dump tlv or 0 if failed
2207  *
2208  * @fwrt: fw runtime struct
2209  * @list: list to add the dump tlv to
2210  * @reg_data: memory region
2211  * @ops: memory dump operations
2212  */
2213 static u32 iwl_dump_ini_mem(struct iwl_fw_runtime *fwrt, struct list_head *list,
2214                             struct iwl_dump_ini_region_data *reg_data,
2215                             const struct iwl_dump_ini_mem_ops *ops)
2216 {
2217         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2218         struct iwl_fw_ini_dump_entry *entry;
2219         struct iwl_fw_ini_error_dump_data *tlv;
2220         struct iwl_fw_ini_error_dump_header *header;
2221         u32 type = reg->type;
2222         u32 id = le32_get_bits(reg->id, IWL_FW_INI_REGION_ID_MASK);
2223         u32 num_of_ranges, i, size;
2224         u8 *range;
2225         u32 free_size;
2226         u64 header_size;
2227         u32 dump_policy = IWL_FW_INI_DUMP_VERBOSE;
2228
2229         IWL_DEBUG_FW(fwrt, "WRT: Collecting region: dump type=%d, id=%d, type=%d\n",
2230                      dump_policy, id, type);
2231
2232         if (le32_to_cpu(reg->hdr.version) >= 2) {
2233                 u32 dp = le32_get_bits(reg->id,
2234                                        IWL_FW_INI_REGION_DUMP_POLICY_MASK);
2235
2236                 if (dump_policy == IWL_FW_INI_DUMP_VERBOSE &&
2237                     !(dp & IWL_FW_INI_DEBUG_DUMP_POLICY_NO_LIMIT)) {
2238                         IWL_DEBUG_FW(fwrt,
2239                                      "WRT: no dump - type %d and policy mismatch=%d\n",
2240                                      dump_policy, dp);
2241                         return 0;
2242                 } else if (dump_policy == IWL_FW_INI_DUMP_MEDIUM &&
2243                            !(dp & IWL_FW_IWL_DEBUG_DUMP_POLICY_MAX_LIMIT_5MB)) {
2244                         IWL_DEBUG_FW(fwrt,
2245                                      "WRT: no dump - type %d and policy mismatch=%d\n",
2246                                      dump_policy, dp);
2247                         return 0;
2248                 } else if (dump_policy == IWL_FW_INI_DUMP_BRIEF &&
2249                            !(dp & IWL_FW_INI_DEBUG_DUMP_POLICY_MAX_LIMIT_600KB)) {
2250                         IWL_DEBUG_FW(fwrt,
2251                                      "WRT: no dump - type %d and policy mismatch=%d\n",
2252                                      dump_policy, dp);
2253                         return 0;
2254                 }
2255         }
2256
2257         if (!ops->get_num_of_ranges || !ops->get_size || !ops->fill_mem_hdr ||
2258             !ops->fill_range) {
2259                 IWL_DEBUG_FW(fwrt, "WRT: no ops for collecting data\n");
2260                 return 0;
2261         }
2262
2263         size = ops->get_size(fwrt, reg_data);
2264
2265         if (size < sizeof(*header)) {
2266                 IWL_DEBUG_FW(fwrt, "WRT: size didn't include space for header\n");
2267                 return 0;
2268         }
2269
2270         entry = vzalloc(sizeof(*entry) + sizeof(*tlv) + size);
2271         if (!entry)
2272                 return 0;
2273
2274         entry->size = sizeof(*tlv) + size;
2275
2276         tlv = (void *)entry->data;
2277         tlv->type = reg->type;
2278         tlv->sub_type = reg->sub_type;
2279         tlv->sub_type_ver = reg->sub_type_ver;
2280         tlv->reserved = reg->reserved;
2281         tlv->len = cpu_to_le32(size);
2282
2283         num_of_ranges = ops->get_num_of_ranges(fwrt, reg_data);
2284
2285         header = (void *)tlv->data;
2286         header->region_id = cpu_to_le32(id);
2287         header->num_of_ranges = cpu_to_le32(num_of_ranges);
2288         header->name_len = cpu_to_le32(IWL_FW_INI_MAX_NAME);
2289         memcpy(header->name, reg->name, IWL_FW_INI_MAX_NAME);
2290
2291         free_size = size;
2292         range = ops->fill_mem_hdr(fwrt, reg_data, header, free_size);
2293         if (!range) {
2294                 IWL_ERR(fwrt,
2295                         "WRT: Failed to fill region header: id=%d, type=%d\n",
2296                         id, type);
2297                 goto out_err;
2298         }
2299
2300         header_size = range - (u8 *)header;
2301
2302         if (WARN(header_size > free_size,
2303                  "header size %llu > free_size %d",
2304                  header_size, free_size)) {
2305                 IWL_ERR(fwrt,
2306                         "WRT: fill_mem_hdr used more than given free_size\n");
2307                 goto out_err;
2308         }
2309
2310         free_size -= header_size;
2311
2312         for (i = 0; i < num_of_ranges; i++) {
2313                 int range_size = ops->fill_range(fwrt, reg_data, range,
2314                                                  free_size, i);
2315
2316                 if (range_size < 0) {
2317                         IWL_ERR(fwrt,
2318                                 "WRT: Failed to dump region: id=%d, type=%d\n",
2319                                 id, type);
2320                         goto out_err;
2321                 }
2322
2323                 if (WARN(range_size > free_size, "range_size %d > free_size %d",
2324                          range_size, free_size)) {
2325                         IWL_ERR(fwrt,
2326                                 "WRT: fill_raged used more than given free_size\n");
2327                         goto out_err;
2328                 }
2329
2330                 free_size -= range_size;
2331                 range = range + range_size;
2332         }
2333
2334         list_add_tail(&entry->list, list);
2335
2336         return entry->size;
2337
2338 out_err:
2339         vfree(entry);
2340
2341         return 0;
2342 }
2343
2344 static u32 iwl_dump_ini_info(struct iwl_fw_runtime *fwrt,
2345                              struct iwl_fw_ini_trigger_tlv *trigger,
2346                              struct list_head *list)
2347 {
2348         struct iwl_fw_ini_dump_entry *entry;
2349         struct iwl_fw_error_dump_data *tlv;
2350         struct iwl_fw_ini_dump_info *dump;
2351         struct iwl_dbg_tlv_node *node;
2352         struct iwl_fw_ini_dump_cfg_name *cfg_name;
2353         u32 size = sizeof(*tlv) + sizeof(*dump);
2354         u32 num_of_cfg_names = 0;
2355         u32 hw_type;
2356
2357         list_for_each_entry(node, &fwrt->trans->dbg.debug_info_tlv_list, list) {
2358                 size += sizeof(*cfg_name);
2359                 num_of_cfg_names++;
2360         }
2361
2362         entry = vzalloc(sizeof(*entry) + size);
2363         if (!entry)
2364                 return 0;
2365
2366         entry->size = size;
2367
2368         tlv = (void *)entry->data;
2369         tlv->type = cpu_to_le32(IWL_INI_DUMP_INFO_TYPE);
2370         tlv->len = cpu_to_le32(size - sizeof(*tlv));
2371
2372         dump = (void *)tlv->data;
2373
2374         dump->version = cpu_to_le32(IWL_INI_DUMP_VER);
2375         dump->time_point = trigger->time_point;
2376         dump->trigger_reason = trigger->trigger_reason;
2377         dump->external_cfg_state =
2378                 cpu_to_le32(fwrt->trans->dbg.external_ini_cfg);
2379
2380         dump->ver_type = cpu_to_le32(fwrt->dump.fw_ver.type);
2381         dump->ver_subtype = cpu_to_le32(fwrt->dump.fw_ver.subtype);
2382
2383         dump->hw_step = cpu_to_le32(fwrt->trans->hw_rev_step);
2384
2385         /*
2386          * Several HWs all have type == 0x42, so we'll override this value
2387          * according to the detected HW
2388          */
2389         hw_type = CSR_HW_REV_TYPE(fwrt->trans->hw_rev);
2390         if (hw_type == IWL_AX210_HW_TYPE) {
2391                 u32 prph_val = iwl_read_umac_prph(fwrt->trans, WFPM_OTP_CFG1_ADDR);
2392                 u32 is_jacket = !!(prph_val & WFPM_OTP_CFG1_IS_JACKET_BIT);
2393                 u32 is_cdb = !!(prph_val & WFPM_OTP_CFG1_IS_CDB_BIT);
2394                 u32 masked_bits = is_jacket | (is_cdb << 1);
2395
2396                 /*
2397                  * The HW type depends on certain bits in this case, so add
2398                  * these bits to the HW type. We won't have collisions since we
2399                  * add these bits after the highest possible bit in the mask.
2400                  */
2401                 hw_type |= masked_bits << IWL_AX210_HW_TYPE_ADDITION_SHIFT;
2402         }
2403         dump->hw_type = cpu_to_le32(hw_type);
2404
2405         dump->rf_id_flavor =
2406                 cpu_to_le32(CSR_HW_RFID_FLAVOR(fwrt->trans->hw_rf_id));
2407         dump->rf_id_dash = cpu_to_le32(CSR_HW_RFID_DASH(fwrt->trans->hw_rf_id));
2408         dump->rf_id_step = cpu_to_le32(CSR_HW_RFID_STEP(fwrt->trans->hw_rf_id));
2409         dump->rf_id_type = cpu_to_le32(CSR_HW_RFID_TYPE(fwrt->trans->hw_rf_id));
2410
2411         dump->lmac_major = cpu_to_le32(fwrt->dump.fw_ver.lmac_major);
2412         dump->lmac_minor = cpu_to_le32(fwrt->dump.fw_ver.lmac_minor);
2413         dump->umac_major = cpu_to_le32(fwrt->dump.fw_ver.umac_major);
2414         dump->umac_minor = cpu_to_le32(fwrt->dump.fw_ver.umac_minor);
2415
2416         dump->fw_mon_mode = cpu_to_le32(fwrt->trans->dbg.ini_dest);
2417         dump->regions_mask = trigger->regions_mask &
2418                              ~cpu_to_le64(fwrt->trans->dbg.unsupported_region_msk);
2419
2420         dump->build_tag_len = cpu_to_le32(sizeof(dump->build_tag));
2421         memcpy(dump->build_tag, fwrt->fw->human_readable,
2422                sizeof(dump->build_tag));
2423
2424         cfg_name = dump->cfg_names;
2425         dump->num_of_cfg_names = cpu_to_le32(num_of_cfg_names);
2426         list_for_each_entry(node, &fwrt->trans->dbg.debug_info_tlv_list, list) {
2427                 struct iwl_fw_ini_debug_info_tlv *debug_info =
2428                         (void *)node->tlv.data;
2429
2430                 cfg_name->image_type = debug_info->image_type;
2431                 cfg_name->cfg_name_len =
2432                         cpu_to_le32(IWL_FW_INI_MAX_CFG_NAME);
2433                 memcpy(cfg_name->cfg_name, debug_info->debug_cfg_name,
2434                        sizeof(cfg_name->cfg_name));
2435                 cfg_name++;
2436         }
2437
2438         /* add dump info TLV to the beginning of the list since it needs to be
2439          * the first TLV in the dump
2440          */
2441         list_add(&entry->list, list);
2442
2443         return entry->size;
2444 }
2445
2446 static u32 iwl_dump_ini_file_name_info(struct iwl_fw_runtime *fwrt,
2447                                        struct list_head *list)
2448 {
2449         struct iwl_fw_ini_dump_entry *entry;
2450         struct iwl_dump_file_name_info *tlv;
2451         u32 len = strnlen(fwrt->trans->dbg.dump_file_name_ext,
2452                           IWL_FW_INI_MAX_NAME);
2453
2454         if (!fwrt->trans->dbg.dump_file_name_ext_valid)
2455                 return 0;
2456
2457         entry = vzalloc(sizeof(*entry) + sizeof(*tlv) + len);
2458         if (!entry)
2459                 return 0;
2460
2461         entry->size = sizeof(*tlv) + len;
2462
2463         tlv = (void *)entry->data;
2464         tlv->type = cpu_to_le32(IWL_INI_DUMP_NAME_TYPE);
2465         tlv->len = cpu_to_le32(len);
2466         memcpy(tlv->data, fwrt->trans->dbg.dump_file_name_ext, len);
2467
2468         /* add the dump file name extension tlv to the list */
2469         list_add_tail(&entry->list, list);
2470
2471         fwrt->trans->dbg.dump_file_name_ext_valid = false;
2472
2473         return entry->size;
2474 }
2475
2476 static const struct iwl_dump_ini_mem_ops iwl_dump_ini_region_ops[] = {
2477         [IWL_FW_INI_REGION_INVALID] = {},
2478         [IWL_FW_INI_REGION_INTERNAL_BUFFER] = {
2479                 .get_num_of_ranges = iwl_dump_ini_single_range,
2480                 .get_size = iwl_dump_ini_mon_smem_get_size,
2481                 .fill_mem_hdr = iwl_dump_ini_mon_smem_fill_header,
2482                 .fill_range = iwl_dump_ini_mon_smem_iter,
2483         },
2484         [IWL_FW_INI_REGION_DRAM_BUFFER] = {
2485                 .get_num_of_ranges = iwl_dump_ini_mon_dram_ranges,
2486                 .get_size = iwl_dump_ini_mon_dram_get_size,
2487                 .fill_mem_hdr = iwl_dump_ini_mon_dram_fill_header,
2488                 .fill_range = iwl_dump_ini_mon_dram_iter,
2489         },
2490         [IWL_FW_INI_REGION_TXF] = {
2491                 .get_num_of_ranges = iwl_dump_ini_txf_ranges,
2492                 .get_size = iwl_dump_ini_txf_get_size,
2493                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2494                 .fill_range = iwl_dump_ini_txf_iter,
2495         },
2496         [IWL_FW_INI_REGION_RXF] = {
2497                 .get_num_of_ranges = iwl_dump_ini_single_range,
2498                 .get_size = iwl_dump_ini_rxf_get_size,
2499                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2500                 .fill_range = iwl_dump_ini_rxf_iter,
2501         },
2502         [IWL_FW_INI_REGION_LMAC_ERROR_TABLE] = {
2503                 .get_num_of_ranges = iwl_dump_ini_single_range,
2504                 .get_size = iwl_dump_ini_err_table_get_size,
2505                 .fill_mem_hdr = iwl_dump_ini_err_table_fill_header,
2506                 .fill_range = iwl_dump_ini_err_table_iter,
2507         },
2508         [IWL_FW_INI_REGION_UMAC_ERROR_TABLE] = {
2509                 .get_num_of_ranges = iwl_dump_ini_single_range,
2510                 .get_size = iwl_dump_ini_err_table_get_size,
2511                 .fill_mem_hdr = iwl_dump_ini_err_table_fill_header,
2512                 .fill_range = iwl_dump_ini_err_table_iter,
2513         },
2514         [IWL_FW_INI_REGION_RSP_OR_NOTIF] = {
2515                 .get_num_of_ranges = iwl_dump_ini_single_range,
2516                 .get_size = iwl_dump_ini_fw_pkt_get_size,
2517                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2518                 .fill_range = iwl_dump_ini_fw_pkt_iter,
2519         },
2520         [IWL_FW_INI_REGION_DEVICE_MEMORY] = {
2521                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2522                 .get_size = iwl_dump_ini_mem_get_size,
2523                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2524                 .fill_range = iwl_dump_ini_dev_mem_iter,
2525         },
2526         [IWL_FW_INI_REGION_PERIPHERY_MAC] = {
2527                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2528                 .get_size = iwl_dump_ini_mem_get_size,
2529                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2530                 .fill_range = iwl_dump_ini_prph_mac_iter,
2531         },
2532         [IWL_FW_INI_REGION_PERIPHERY_PHY] = {
2533                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2534                 .get_size = iwl_dump_ini_mem_get_size,
2535                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2536                 .fill_range = iwl_dump_ini_prph_phy_iter,
2537         },
2538         [IWL_FW_INI_REGION_PERIPHERY_MAC_RANGE] = {
2539                 .get_num_of_ranges = iwl_dump_ini_mem_block_ranges,
2540                 .get_size = iwl_dump_ini_mem_block_get_size,
2541                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2542                 .fill_range = iwl_dump_ini_prph_mac_block_iter,
2543         },
2544         [IWL_FW_INI_REGION_PERIPHERY_PHY_RANGE] = {
2545                 .get_num_of_ranges = iwl_dump_ini_mem_block_ranges,
2546                 .get_size = iwl_dump_ini_mem_block_get_size,
2547                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2548                 .fill_range = iwl_dump_ini_prph_phy_block_iter,
2549         },
2550         [IWL_FW_INI_REGION_PERIPHERY_AUX] = {},
2551         [IWL_FW_INI_REGION_PAGING] = {
2552                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2553                 .get_num_of_ranges = iwl_dump_ini_paging_ranges,
2554                 .get_size = iwl_dump_ini_paging_get_size,
2555                 .fill_range = iwl_dump_ini_paging_iter,
2556         },
2557         [IWL_FW_INI_REGION_CSR] = {
2558                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2559                 .get_size = iwl_dump_ini_mem_get_size,
2560                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2561                 .fill_range = iwl_dump_ini_csr_iter,
2562         },
2563         [IWL_FW_INI_REGION_DRAM_IMR] = {
2564                 .get_num_of_ranges = iwl_dump_ini_imr_ranges,
2565                 .get_size = iwl_dump_ini_imr_get_size,
2566                 .fill_mem_hdr = iwl_dump_ini_imr_fill_header,
2567                 .fill_range = iwl_dump_ini_imr_iter,
2568         },
2569         [IWL_FW_INI_REGION_PCI_IOSF_CONFIG] = {
2570                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2571                 .get_size = iwl_dump_ini_mem_get_size,
2572                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2573                 .fill_range = iwl_dump_ini_config_iter,
2574         },
2575         [IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY] = {
2576                 .get_num_of_ranges = iwl_dump_ini_single_range,
2577                 .get_size = iwl_dump_ini_special_mem_get_size,
2578                 .fill_mem_hdr = iwl_dump_ini_special_mem_fill_header,
2579                 .fill_range = iwl_dump_ini_special_mem_iter,
2580         },
2581         [IWL_FW_INI_REGION_DBGI_SRAM] = {
2582                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2583                 .get_size = iwl_dump_ini_mon_dbgi_get_size,
2584                 .fill_mem_hdr = iwl_dump_ini_mon_dbgi_fill_header,
2585                 .fill_range = iwl_dump_ini_dbgi_sram_iter,
2586         },
2587         [IWL_FW_INI_REGION_PERIPHERY_SNPS_DPHYIP] = {
2588                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2589                 .get_size = iwl_dump_ini_mem_get_size,
2590                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2591                 .fill_range = iwl_dump_ini_prph_snps_dphyip_iter,
2592         },
2593 };
2594
2595 static u32 iwl_dump_ini_trigger(struct iwl_fw_runtime *fwrt,
2596                                 struct iwl_fwrt_dump_data *dump_data,
2597                                 struct list_head *list)
2598 {
2599         struct iwl_fw_ini_trigger_tlv *trigger = dump_data->trig;
2600         enum iwl_fw_ini_time_point tp_id = le32_to_cpu(trigger->time_point);
2601         struct iwl_dump_ini_region_data reg_data = {
2602                 .dump_data = dump_data,
2603         };
2604         struct iwl_dump_ini_region_data imr_reg_data = {
2605                 .dump_data = dump_data,
2606         };
2607         int i;
2608         u32 size = 0;
2609         u64 regions_mask = le64_to_cpu(trigger->regions_mask) &
2610                            ~(fwrt->trans->dbg.unsupported_region_msk);
2611
2612         BUILD_BUG_ON(sizeof(trigger->regions_mask) != sizeof(regions_mask));
2613         BUILD_BUG_ON((sizeof(trigger->regions_mask) * BITS_PER_BYTE) <
2614                      ARRAY_SIZE(fwrt->trans->dbg.active_regions));
2615
2616         for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.active_regions); i++) {
2617                 u32 reg_type;
2618                 struct iwl_fw_ini_region_tlv *reg;
2619
2620                 if (!(BIT_ULL(i) & regions_mask))
2621                         continue;
2622
2623                 reg_data.reg_tlv = fwrt->trans->dbg.active_regions[i];
2624                 if (!reg_data.reg_tlv) {
2625                         IWL_WARN(fwrt,
2626                                  "WRT: Unassigned region id %d, skipping\n", i);
2627                         continue;
2628                 }
2629
2630                 reg = (void *)reg_data.reg_tlv->data;
2631                 reg_type = reg->type;
2632                 if (reg_type >= ARRAY_SIZE(iwl_dump_ini_region_ops))
2633                         continue;
2634
2635                 if ((reg_type == IWL_FW_INI_REGION_PERIPHERY_PHY ||
2636                      reg_type == IWL_FW_INI_REGION_PERIPHERY_PHY_RANGE ||
2637                      reg_type == IWL_FW_INI_REGION_PERIPHERY_SNPS_DPHYIP) &&
2638                     tp_id != IWL_FW_INI_TIME_POINT_FW_ASSERT) {
2639                         IWL_WARN(fwrt,
2640                                  "WRT: trying to collect phy prph at time point: %d, skipping\n",
2641                                  tp_id);
2642                         continue;
2643                 }
2644                 /*
2645                  * DRAM_IMR can be collected only for FW/HW error timepoint
2646                  * when fw is not alive. In addition, it must be collected
2647                  * lastly as it overwrites SRAM that can possibly contain
2648                  * debug data which also need to be collected.
2649                  */
2650                 if (reg_type == IWL_FW_INI_REGION_DRAM_IMR) {
2651                         if (tp_id == IWL_FW_INI_TIME_POINT_FW_ASSERT ||
2652                             tp_id == IWL_FW_INI_TIME_POINT_FW_HW_ERROR)
2653                                 imr_reg_data.reg_tlv = fwrt->trans->dbg.active_regions[i];
2654                         else
2655                                 IWL_INFO(fwrt,
2656                                          "WRT: trying to collect DRAM_IMR at time point: %d, skipping\n",
2657                                          tp_id);
2658                 /* continue to next region */
2659                         continue;
2660                 }
2661
2662
2663                 size += iwl_dump_ini_mem(fwrt, list, &reg_data,
2664                                          &iwl_dump_ini_region_ops[reg_type]);
2665         }
2666         /* collect DRAM_IMR region in the last */
2667         if (imr_reg_data.reg_tlv)
2668                 size += iwl_dump_ini_mem(fwrt, list, &reg_data,
2669                                          &iwl_dump_ini_region_ops[IWL_FW_INI_REGION_DRAM_IMR]);
2670
2671         if (size) {
2672                 size += iwl_dump_ini_file_name_info(fwrt, list);
2673                 size += iwl_dump_ini_info(fwrt, trigger, list);
2674         }
2675
2676         return size;
2677 }
2678
2679 static bool iwl_fw_ini_trigger_on(struct iwl_fw_runtime *fwrt,
2680                                   struct iwl_fw_ini_trigger_tlv *trig)
2681 {
2682         enum iwl_fw_ini_time_point tp_id = le32_to_cpu(trig->time_point);
2683         u32 usec = le32_to_cpu(trig->ignore_consec);
2684
2685         if (!iwl_trans_dbg_ini_valid(fwrt->trans) ||
2686             tp_id == IWL_FW_INI_TIME_POINT_INVALID ||
2687             tp_id >= IWL_FW_INI_TIME_POINT_NUM ||
2688             iwl_fw_dbg_no_trig_window(fwrt, tp_id, usec))
2689                 return false;
2690
2691         return true;
2692 }
2693
2694 static u32 iwl_dump_ini_file_gen(struct iwl_fw_runtime *fwrt,
2695                                  struct iwl_fwrt_dump_data *dump_data,
2696                                  struct list_head *list)
2697 {
2698         struct iwl_fw_ini_trigger_tlv *trigger = dump_data->trig;
2699         struct iwl_fw_ini_dump_entry *entry;
2700         struct iwl_fw_ini_dump_file_hdr *hdr;
2701         u32 size;
2702
2703         if (!trigger || !iwl_fw_ini_trigger_on(fwrt, trigger) ||
2704             !le64_to_cpu(trigger->regions_mask))
2705                 return 0;
2706
2707         entry = vzalloc(sizeof(*entry) + sizeof(*hdr));
2708         if (!entry)
2709                 return 0;
2710
2711         entry->size = sizeof(*hdr);
2712
2713         size = iwl_dump_ini_trigger(fwrt, dump_data, list);
2714         if (!size) {
2715                 vfree(entry);
2716                 return 0;
2717         }
2718
2719         hdr = (void *)entry->data;
2720         hdr->barker = cpu_to_le32(IWL_FW_INI_ERROR_DUMP_BARKER);
2721         hdr->file_len = cpu_to_le32(size + entry->size);
2722
2723         list_add(&entry->list, list);
2724
2725         return le32_to_cpu(hdr->file_len);
2726 }
2727
2728 static inline void iwl_fw_free_dump_desc(struct iwl_fw_runtime *fwrt,
2729                                          const struct iwl_fw_dump_desc *desc)
2730 {
2731         if (desc && desc != &iwl_dump_desc_assert)
2732                 kfree(desc);
2733
2734         fwrt->dump.lmac_err_id[0] = 0;
2735         if (fwrt->smem_cfg.num_lmacs > 1)
2736                 fwrt->dump.lmac_err_id[1] = 0;
2737         fwrt->dump.umac_err_id = 0;
2738 }
2739
2740 static void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt,
2741                               struct iwl_fwrt_dump_data *dump_data)
2742 {
2743         struct iwl_fw_dump_ptrs fw_error_dump = {};
2744         struct iwl_fw_error_dump_file *dump_file;
2745         struct scatterlist *sg_dump_data;
2746         u32 file_len;
2747         u32 dump_mask = fwrt->fw->dbg.dump_mask;
2748
2749         dump_file = iwl_fw_error_dump_file(fwrt, &fw_error_dump, dump_data);
2750         if (!dump_file)
2751                 return;
2752
2753         if (dump_data->monitor_only)
2754                 dump_mask &= BIT(IWL_FW_ERROR_DUMP_FW_MONITOR);
2755
2756         fw_error_dump.trans_ptr = iwl_trans_dump_data(fwrt->trans, dump_mask,
2757                                                       fwrt->sanitize_ops,
2758                                                       fwrt->sanitize_ctx);
2759         file_len = le32_to_cpu(dump_file->file_len);
2760         fw_error_dump.fwrt_len = file_len;
2761
2762         if (fw_error_dump.trans_ptr) {
2763                 file_len += fw_error_dump.trans_ptr->len;
2764                 dump_file->file_len = cpu_to_le32(file_len);
2765         }
2766
2767         sg_dump_data = alloc_sgtable(file_len);
2768         if (sg_dump_data) {
2769                 sg_pcopy_from_buffer(sg_dump_data,
2770                                      sg_nents(sg_dump_data),
2771                                      fw_error_dump.fwrt_ptr,
2772                                      fw_error_dump.fwrt_len, 0);
2773                 if (fw_error_dump.trans_ptr)
2774                         sg_pcopy_from_buffer(sg_dump_data,
2775                                              sg_nents(sg_dump_data),
2776                                              fw_error_dump.trans_ptr->data,
2777                                              fw_error_dump.trans_ptr->len,
2778                                              fw_error_dump.fwrt_len);
2779                 dev_coredumpsg(fwrt->trans->dev, sg_dump_data, file_len,
2780                                GFP_KERNEL);
2781         }
2782         vfree(fw_error_dump.fwrt_ptr);
2783         vfree(fw_error_dump.trans_ptr);
2784 }
2785
2786 static void iwl_dump_ini_list_free(struct list_head *list)
2787 {
2788         while (!list_empty(list)) {
2789                 struct iwl_fw_ini_dump_entry *entry =
2790                         list_entry(list->next, typeof(*entry), list);
2791
2792                 list_del(&entry->list);
2793                 vfree(entry);
2794         }
2795 }
2796
2797 static void iwl_fw_error_dump_data_free(struct iwl_fwrt_dump_data *dump_data)
2798 {
2799         dump_data->trig = NULL;
2800         kfree(dump_data->fw_pkt);
2801         dump_data->fw_pkt = NULL;
2802 }
2803
2804 static void iwl_fw_error_ini_dump(struct iwl_fw_runtime *fwrt,
2805                                   struct iwl_fwrt_dump_data *dump_data)
2806 {
2807         LIST_HEAD(dump_list);
2808         struct scatterlist *sg_dump_data;
2809         u32 file_len = iwl_dump_ini_file_gen(fwrt, dump_data, &dump_list);
2810
2811         if (!file_len)
2812                 return;
2813
2814         sg_dump_data = alloc_sgtable(file_len);
2815         if (sg_dump_data) {
2816                 struct iwl_fw_ini_dump_entry *entry;
2817                 int sg_entries = sg_nents(sg_dump_data);
2818                 u32 offs = 0;
2819
2820                 list_for_each_entry(entry, &dump_list, list) {
2821                         sg_pcopy_from_buffer(sg_dump_data, sg_entries,
2822                                              entry->data, entry->size, offs);
2823                         offs += entry->size;
2824                 }
2825                 dev_coredumpsg(fwrt->trans->dev, sg_dump_data, file_len,
2826                                GFP_KERNEL);
2827         }
2828         iwl_dump_ini_list_free(&dump_list);
2829 }
2830
2831 const struct iwl_fw_dump_desc iwl_dump_desc_assert = {
2832         .trig_desc = {
2833                 .type = cpu_to_le32(FW_DBG_TRIGGER_FW_ASSERT),
2834         },
2835 };
2836 IWL_EXPORT_SYMBOL(iwl_dump_desc_assert);
2837
2838 int iwl_fw_dbg_collect_desc(struct iwl_fw_runtime *fwrt,
2839                             const struct iwl_fw_dump_desc *desc,
2840                             bool monitor_only,
2841                             unsigned int delay)
2842 {
2843         struct iwl_fwrt_wk_data *wk_data;
2844         unsigned long idx;
2845
2846         if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
2847                 iwl_fw_free_dump_desc(fwrt, desc);
2848                 return 0;
2849         }
2850
2851         /*
2852          * Check there is an available worker.
2853          * ffz return value is undefined if no zero exists,
2854          * so check against ~0UL first.
2855          */
2856         if (fwrt->dump.active_wks == ~0UL)
2857                 return -EBUSY;
2858
2859         idx = ffz(fwrt->dump.active_wks);
2860
2861         if (idx >= IWL_FW_RUNTIME_DUMP_WK_NUM ||
2862             test_and_set_bit(fwrt->dump.wks[idx].idx, &fwrt->dump.active_wks))
2863                 return -EBUSY;
2864
2865         wk_data = &fwrt->dump.wks[idx];
2866
2867         if (WARN_ON(wk_data->dump_data.desc))
2868                 iwl_fw_free_dump_desc(fwrt, wk_data->dump_data.desc);
2869
2870         wk_data->dump_data.desc = desc;
2871         wk_data->dump_data.monitor_only = monitor_only;
2872
2873         IWL_WARN(fwrt, "Collecting data: trigger %d fired.\n",
2874                  le32_to_cpu(desc->trig_desc.type));
2875
2876         schedule_delayed_work(&wk_data->wk, usecs_to_jiffies(delay));
2877
2878         return 0;
2879 }
2880 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect_desc);
2881
2882 int iwl_fw_dbg_error_collect(struct iwl_fw_runtime *fwrt,
2883                              enum iwl_fw_dbg_trigger trig_type)
2884 {
2885         if (!test_bit(STATUS_DEVICE_ENABLED, &fwrt->trans->status))
2886                 return -EIO;
2887
2888         if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
2889                 if (trig_type != FW_DBG_TRIGGER_ALIVE_TIMEOUT &&
2890                     trig_type != FW_DBG_TRIGGER_DRIVER)
2891                         return -EIO;
2892
2893                 iwl_dbg_tlv_time_point(fwrt,
2894                                        IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT,
2895                                        NULL);
2896         } else {
2897                 struct iwl_fw_dump_desc *iwl_dump_error_desc;
2898                 int ret;
2899
2900                 iwl_dump_error_desc =
2901                         kmalloc(sizeof(*iwl_dump_error_desc), GFP_KERNEL);
2902
2903                 if (!iwl_dump_error_desc)
2904                         return -ENOMEM;
2905
2906                 iwl_dump_error_desc->trig_desc.type = cpu_to_le32(trig_type);
2907                 iwl_dump_error_desc->len = 0;
2908
2909                 ret = iwl_fw_dbg_collect_desc(fwrt, iwl_dump_error_desc,
2910                                               false, 0);
2911                 if (ret) {
2912                         kfree(iwl_dump_error_desc);
2913                         return ret;
2914                 }
2915         }
2916
2917         iwl_trans_sync_nmi(fwrt->trans);
2918
2919         return 0;
2920 }
2921 IWL_EXPORT_SYMBOL(iwl_fw_dbg_error_collect);
2922
2923 int iwl_fw_dbg_collect(struct iwl_fw_runtime *fwrt,
2924                        enum iwl_fw_dbg_trigger trig,
2925                        const char *str, size_t len,
2926                        struct iwl_fw_dbg_trigger_tlv *trigger)
2927 {
2928         struct iwl_fw_dump_desc *desc;
2929         unsigned int delay = 0;
2930         bool monitor_only = false;
2931
2932         if (trigger) {
2933                 u16 occurrences = le16_to_cpu(trigger->occurrences) - 1;
2934
2935                 if (!le16_to_cpu(trigger->occurrences))
2936                         return 0;
2937
2938                 if (trigger->flags & IWL_FW_DBG_FORCE_RESTART) {
2939                         IWL_WARN(fwrt, "Force restart: trigger %d fired.\n",
2940                                  trig);
2941                         iwl_force_nmi(fwrt->trans);
2942                         return 0;
2943                 }
2944
2945                 trigger->occurrences = cpu_to_le16(occurrences);
2946                 monitor_only = trigger->mode & IWL_FW_DBG_TRIGGER_MONITOR_ONLY;
2947
2948                 /* convert msec to usec */
2949                 delay = le32_to_cpu(trigger->stop_delay) * USEC_PER_MSEC;
2950         }
2951
2952         desc = kzalloc(struct_size(desc, trig_desc.data, len), GFP_ATOMIC);
2953         if (!desc)
2954                 return -ENOMEM;
2955
2956
2957         desc->len = len;
2958         desc->trig_desc.type = cpu_to_le32(trig);
2959         memcpy(desc->trig_desc.data, str, len);
2960
2961         return iwl_fw_dbg_collect_desc(fwrt, desc, monitor_only, delay);
2962 }
2963 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect);
2964
2965 int iwl_fw_dbg_collect_trig(struct iwl_fw_runtime *fwrt,
2966                             struct iwl_fw_dbg_trigger_tlv *trigger,
2967                             const char *fmt, ...)
2968 {
2969         int ret, len = 0;
2970         char buf[64];
2971
2972         if (iwl_trans_dbg_ini_valid(fwrt->trans))
2973                 return 0;
2974
2975         if (fmt) {
2976                 va_list ap;
2977
2978                 buf[sizeof(buf) - 1] = '\0';
2979
2980                 va_start(ap, fmt);
2981                 vsnprintf(buf, sizeof(buf), fmt, ap);
2982                 va_end(ap);
2983
2984                 /* check for truncation */
2985                 if (WARN_ON_ONCE(buf[sizeof(buf) - 1]))
2986                         buf[sizeof(buf) - 1] = '\0';
2987
2988                 len = strlen(buf) + 1;
2989         }
2990
2991         ret = iwl_fw_dbg_collect(fwrt, le32_to_cpu(trigger->id), buf, len,
2992                                  trigger);
2993
2994         if (ret)
2995                 return ret;
2996
2997         return 0;
2998 }
2999 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect_trig);
3000
3001 int iwl_fw_start_dbg_conf(struct iwl_fw_runtime *fwrt, u8 conf_id)
3002 {
3003         u8 *ptr;
3004         int ret;
3005         int i;
3006
3007         if (WARN_ONCE(conf_id >= ARRAY_SIZE(fwrt->fw->dbg.conf_tlv),
3008                       "Invalid configuration %d\n", conf_id))
3009                 return -EINVAL;
3010
3011         /* EARLY START - firmware's configuration is hard coded */
3012         if ((!fwrt->fw->dbg.conf_tlv[conf_id] ||
3013              !fwrt->fw->dbg.conf_tlv[conf_id]->num_of_hcmds) &&
3014             conf_id == FW_DBG_START_FROM_ALIVE)
3015                 return 0;
3016
3017         if (!fwrt->fw->dbg.conf_tlv[conf_id])
3018                 return -EINVAL;
3019
3020         if (fwrt->dump.conf != FW_DBG_INVALID)
3021                 IWL_INFO(fwrt, "FW already configured (%d) - re-configuring\n",
3022                          fwrt->dump.conf);
3023
3024         /* Send all HCMDs for configuring the FW debug */
3025         ptr = (void *)&fwrt->fw->dbg.conf_tlv[conf_id]->hcmd;
3026         for (i = 0; i < fwrt->fw->dbg.conf_tlv[conf_id]->num_of_hcmds; i++) {
3027                 struct iwl_fw_dbg_conf_hcmd *cmd = (void *)ptr;
3028                 struct iwl_host_cmd hcmd = {
3029                         .id = cmd->id,
3030                         .len = { le16_to_cpu(cmd->len), },
3031                         .data = { cmd->data, },
3032                 };
3033
3034                 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
3035                 if (ret)
3036                         return ret;
3037
3038                 ptr += sizeof(*cmd);
3039                 ptr += le16_to_cpu(cmd->len);
3040         }
3041
3042         fwrt->dump.conf = conf_id;
3043
3044         return 0;
3045 }
3046 IWL_EXPORT_SYMBOL(iwl_fw_start_dbg_conf);
3047
3048 void iwl_send_dbg_dump_complete_cmd(struct iwl_fw_runtime *fwrt,
3049                                     u32 timepoint,
3050                                     u32 timepoint_data)
3051 {
3052         struct iwl_dbg_dump_complete_cmd hcmd_data;
3053         struct iwl_host_cmd hcmd = {
3054                 .id = WIDE_ID(DEBUG_GROUP, FW_DUMP_COMPLETE_CMD),
3055                 .data[0] = &hcmd_data,
3056                 .len[0] = sizeof(hcmd_data),
3057         };
3058
3059         if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status))
3060                 return;
3061
3062         if (fw_has_capa(&fwrt->fw->ucode_capa,
3063                         IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT)) {
3064                 hcmd_data.tp = cpu_to_le32(timepoint);
3065                 hcmd_data.tp_data = cpu_to_le32(timepoint_data);
3066                 iwl_trans_send_cmd(fwrt->trans, &hcmd);
3067         }
3068 }
3069
3070 /* this function assumes dump_start was called beforehand and dump_end will be
3071  * called afterwards
3072  */
3073 static void iwl_fw_dbg_collect_sync(struct iwl_fw_runtime *fwrt, u8 wk_idx)
3074 {
3075         struct iwl_fw_dbg_params params = {0};
3076         struct iwl_fwrt_dump_data *dump_data =
3077                 &fwrt->dump.wks[wk_idx].dump_data;
3078         u32 policy;
3079         u32 time_point;
3080         if (!test_bit(wk_idx, &fwrt->dump.active_wks))
3081                 return;
3082
3083         if (!dump_data->trig) {
3084                 IWL_ERR(fwrt, "dump trigger data is not set\n");
3085                 goto out;
3086         }
3087
3088         if (!test_bit(STATUS_DEVICE_ENABLED, &fwrt->trans->status)) {
3089                 IWL_ERR(fwrt, "Device is not enabled - cannot dump error\n");
3090                 goto out;
3091         }
3092
3093         /* there's no point in fw dump if the bus is dead */
3094         if (test_bit(STATUS_TRANS_DEAD, &fwrt->trans->status)) {
3095                 IWL_ERR(fwrt, "Skip fw error dump since bus is dead\n");
3096                 goto out;
3097         }
3098
3099         iwl_fw_dbg_stop_restart_recording(fwrt, &params, true);
3100
3101         IWL_DEBUG_FW_INFO(fwrt, "WRT: Data collection start\n");
3102         if (iwl_trans_dbg_ini_valid(fwrt->trans))
3103                 iwl_fw_error_ini_dump(fwrt, &fwrt->dump.wks[wk_idx].dump_data);
3104         else
3105                 iwl_fw_error_dump(fwrt, &fwrt->dump.wks[wk_idx].dump_data);
3106         IWL_DEBUG_FW_INFO(fwrt, "WRT: Data collection done\n");
3107
3108         iwl_fw_dbg_stop_restart_recording(fwrt, &params, false);
3109
3110         policy = le32_to_cpu(dump_data->trig->apply_policy);
3111         time_point = le32_to_cpu(dump_data->trig->time_point);
3112
3113         if (policy & IWL_FW_INI_APPLY_POLICY_DUMP_COMPLETE_CMD) {
3114                 IWL_DEBUG_FW_INFO(fwrt, "WRT: sending dump complete\n");
3115                 iwl_send_dbg_dump_complete_cmd(fwrt, time_point, 0);
3116         }
3117         if (fwrt->trans->dbg.last_tp_resetfw == IWL_FW_INI_RESET_FW_MODE_STOP_FW_ONLY)
3118                 iwl_force_nmi(fwrt->trans);
3119
3120 out:
3121         if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
3122                 iwl_fw_error_dump_data_free(dump_data);
3123         } else {
3124                 iwl_fw_free_dump_desc(fwrt, dump_data->desc);
3125                 dump_data->desc = NULL;
3126         }
3127
3128         clear_bit(wk_idx, &fwrt->dump.active_wks);
3129 }
3130
3131 int iwl_fw_dbg_ini_collect(struct iwl_fw_runtime *fwrt,
3132                            struct iwl_fwrt_dump_data *dump_data,
3133                            bool sync)
3134 {
3135         struct iwl_fw_ini_trigger_tlv *trig = dump_data->trig;
3136         enum iwl_fw_ini_time_point tp_id = le32_to_cpu(trig->time_point);
3137         u32 occur, delay;
3138         unsigned long idx;
3139
3140         if (!iwl_fw_ini_trigger_on(fwrt, trig)) {
3141                 IWL_WARN(fwrt, "WRT: Trigger %d is not active, aborting dump\n",
3142                          tp_id);
3143                 return -EINVAL;
3144         }
3145
3146         delay = le32_to_cpu(trig->dump_delay);
3147         occur = le32_to_cpu(trig->occurrences);
3148         if (!occur)
3149                 return 0;
3150
3151         trig->occurrences = cpu_to_le32(--occur);
3152
3153         /* Check there is an available worker.
3154          * ffz return value is undefined if no zero exists,
3155          * so check against ~0UL first.
3156          */
3157         if (fwrt->dump.active_wks == ~0UL)
3158                 return -EBUSY;
3159
3160         idx = ffz(fwrt->dump.active_wks);
3161
3162         if (idx >= IWL_FW_RUNTIME_DUMP_WK_NUM ||
3163             test_and_set_bit(fwrt->dump.wks[idx].idx, &fwrt->dump.active_wks))
3164                 return -EBUSY;
3165
3166         fwrt->dump.wks[idx].dump_data = *dump_data;
3167
3168         if (sync)
3169                 delay = 0;
3170
3171         IWL_WARN(fwrt,
3172                  "WRT: Collecting data: ini trigger %d fired (delay=%dms).\n",
3173                  tp_id, (u32)(delay / USEC_PER_MSEC));
3174
3175         if (sync)
3176                 iwl_fw_dbg_collect_sync(fwrt, idx);
3177         else
3178                 schedule_delayed_work(&fwrt->dump.wks[idx].wk, usecs_to_jiffies(delay));
3179
3180         return 0;
3181 }
3182
3183 void iwl_fw_error_dump_wk(struct work_struct *work)
3184 {
3185         struct iwl_fwrt_wk_data *wks =
3186                 container_of(work, typeof(*wks), wk.work);
3187         struct iwl_fw_runtime *fwrt =
3188                 container_of(wks, typeof(*fwrt), dump.wks[wks->idx]);
3189
3190         /* assumes the op mode mutex is locked in dump_start since
3191          * iwl_fw_dbg_collect_sync can't run in parallel
3192          */
3193         if (fwrt->ops && fwrt->ops->dump_start)
3194                 fwrt->ops->dump_start(fwrt->ops_ctx);
3195
3196         iwl_fw_dbg_collect_sync(fwrt, wks->idx);
3197
3198         if (fwrt->ops && fwrt->ops->dump_end)
3199                 fwrt->ops->dump_end(fwrt->ops_ctx);
3200 }
3201
3202 void iwl_fw_dbg_read_d3_debug_data(struct iwl_fw_runtime *fwrt)
3203 {
3204         const struct iwl_cfg *cfg = fwrt->trans->cfg;
3205
3206         if (!iwl_fw_dbg_is_d3_debug_enabled(fwrt))
3207                 return;
3208
3209         if (!fwrt->dump.d3_debug_data) {
3210                 fwrt->dump.d3_debug_data = kmalloc(cfg->d3_debug_data_length,
3211                                                    GFP_KERNEL);
3212                 if (!fwrt->dump.d3_debug_data) {
3213                         IWL_ERR(fwrt,
3214                                 "failed to allocate memory for D3 debug data\n");
3215                         return;
3216                 }
3217         }
3218
3219         /* if the buffer holds previous debug data it is overwritten */
3220         iwl_trans_read_mem_bytes(fwrt->trans, cfg->d3_debug_data_base_addr,
3221                                  fwrt->dump.d3_debug_data,
3222                                  cfg->d3_debug_data_length);
3223
3224         if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_mem)
3225                 fwrt->sanitize_ops->frob_mem(fwrt->sanitize_ctx,
3226                                              cfg->d3_debug_data_base_addr,
3227                                              fwrt->dump.d3_debug_data,
3228                                              cfg->d3_debug_data_length);
3229 }
3230 IWL_EXPORT_SYMBOL(iwl_fw_dbg_read_d3_debug_data);
3231
3232 void iwl_fw_dbg_stop_sync(struct iwl_fw_runtime *fwrt)
3233 {
3234         int i;
3235
3236         iwl_dbg_tlv_del_timers(fwrt->trans);
3237         for (i = 0; i < IWL_FW_RUNTIME_DUMP_WK_NUM; i++)
3238                 iwl_fw_dbg_collect_sync(fwrt, i);
3239
3240         iwl_fw_dbg_stop_restart_recording(fwrt, NULL, true);
3241 }
3242 IWL_EXPORT_SYMBOL(iwl_fw_dbg_stop_sync);
3243
3244 static int iwl_fw_dbg_suspend_resume_hcmd(struct iwl_trans *trans, bool suspend)
3245 {
3246         struct iwl_dbg_suspend_resume_cmd cmd = {
3247                 .operation = suspend ?
3248                         cpu_to_le32(DBGC_SUSPEND_CMD) :
3249                         cpu_to_le32(DBGC_RESUME_CMD),
3250         };
3251         struct iwl_host_cmd hcmd = {
3252                 .id = WIDE_ID(DEBUG_GROUP, DBGC_SUSPEND_RESUME),
3253                 .data[0] = &cmd,
3254                 .len[0] = sizeof(cmd),
3255         };
3256
3257         return iwl_trans_send_cmd(trans, &hcmd);
3258 }
3259
3260 static void iwl_fw_dbg_stop_recording(struct iwl_trans *trans,
3261                                       struct iwl_fw_dbg_params *params)
3262 {
3263         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
3264                 iwl_set_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x100);
3265                 return;
3266         }
3267
3268         if (params) {
3269                 params->in_sample = iwl_read_umac_prph(trans, DBGC_IN_SAMPLE);
3270                 params->out_ctrl = iwl_read_umac_prph(trans, DBGC_OUT_CTRL);
3271         }
3272
3273         iwl_write_umac_prph(trans, DBGC_IN_SAMPLE, 0);
3274         /* wait for the DBGC to finish writing the internal buffer to DRAM to
3275          * avoid halting the HW while writing
3276          */
3277         usleep_range(700, 1000);
3278         iwl_write_umac_prph(trans, DBGC_OUT_CTRL, 0);
3279 }
3280
3281 static int iwl_fw_dbg_restart_recording(struct iwl_trans *trans,
3282                                         struct iwl_fw_dbg_params *params)
3283 {
3284         if (!params)
3285                 return -EIO;
3286
3287         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
3288                 iwl_clear_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x100);
3289                 iwl_clear_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x1);
3290                 iwl_set_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x1);
3291         } else {
3292                 iwl_write_umac_prph(trans, DBGC_IN_SAMPLE, params->in_sample);
3293                 iwl_write_umac_prph(trans, DBGC_OUT_CTRL, params->out_ctrl);
3294         }
3295
3296         return 0;
3297 }
3298
3299 int iwl_fw_send_timestamp_marker_cmd(struct iwl_fw_runtime *fwrt)
3300 {
3301         struct iwl_mvm_marker marker = {
3302                 .dw_len = sizeof(struct iwl_mvm_marker) / 4,
3303                 .marker_id = MARKER_ID_SYNC_CLOCK,
3304         };
3305         struct iwl_host_cmd hcmd = {
3306                 .flags = CMD_ASYNC,
3307                 .id = WIDE_ID(LONG_GROUP, MARKER_CMD),
3308                 .dataflags = {},
3309         };
3310         struct iwl_mvm_marker_rsp *resp;
3311         int cmd_ver = iwl_fw_lookup_cmd_ver(fwrt->fw,
3312                                             WIDE_ID(LONG_GROUP, MARKER_CMD),
3313                                             IWL_FW_CMD_VER_UNKNOWN);
3314         int ret;
3315
3316         if (cmd_ver == 1) {
3317                 /* the real timestamp is taken from the ftrace clock
3318                  * this is for finding the match between fw and kernel logs
3319                  */
3320                 marker.timestamp = cpu_to_le64(fwrt->timestamp.seq++);
3321         } else if (cmd_ver == 2) {
3322                 marker.timestamp = cpu_to_le64(ktime_get_boottime_ns());
3323         } else {
3324                 IWL_DEBUG_INFO(fwrt,
3325                                "Invalid version of Marker CMD. Ver = %d\n",
3326                                cmd_ver);
3327                 return -EINVAL;
3328         }
3329
3330         hcmd.data[0] = &marker;
3331         hcmd.len[0] = sizeof(marker);
3332
3333         ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
3334
3335         if (cmd_ver > 1 && hcmd.resp_pkt) {
3336                 resp = (void *)hcmd.resp_pkt->data;
3337                 IWL_DEBUG_INFO(fwrt, "FW GP2 time: %u\n",
3338                                le32_to_cpu(resp->gp2));
3339         }
3340
3341         return ret;
3342 }
3343
3344 void iwl_fw_dbg_stop_restart_recording(struct iwl_fw_runtime *fwrt,
3345                                        struct iwl_fw_dbg_params *params,
3346                                        bool stop)
3347 {
3348         int ret __maybe_unused = 0;
3349
3350         if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status))
3351                 return;
3352
3353         if (fw_has_capa(&fwrt->fw->ucode_capa,
3354                         IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP)) {
3355                 if (stop)
3356                         iwl_fw_send_timestamp_marker_cmd(fwrt);
3357                 ret = iwl_fw_dbg_suspend_resume_hcmd(fwrt->trans, stop);
3358         } else if (stop) {
3359                 iwl_fw_dbg_stop_recording(fwrt->trans, params);
3360         } else {
3361                 ret = iwl_fw_dbg_restart_recording(fwrt->trans, params);
3362         }
3363 #ifdef CONFIG_IWLWIFI_DEBUGFS
3364         if (!ret) {
3365                 if (stop)
3366                         fwrt->trans->dbg.rec_on = false;
3367                 else
3368                         iwl_fw_set_dbg_rec_on(fwrt);
3369         }
3370 #endif
3371 }
3372 IWL_EXPORT_SYMBOL(iwl_fw_dbg_stop_restart_recording);
3373
3374 void iwl_fw_disable_dbg_asserts(struct iwl_fw_runtime *fwrt)
3375 {
3376         struct iwl_fw_dbg_config_cmd cmd = {
3377                 .type = cpu_to_le32(DEBUG_TOKEN_CONFIG_TYPE),
3378                 .conf = cpu_to_le32(IWL_FW_DBG_CONFIG_TOKEN),
3379         };
3380         struct iwl_host_cmd hcmd = {
3381                 .id = WIDE_ID(LONG_GROUP, LDBG_CONFIG_CMD),
3382                 .data[0] = &cmd,
3383                 .len[0] = sizeof(cmd),
3384         };
3385         u32 preset = u32_get_bits(fwrt->trans->dbg.domains_bitmap,
3386                                   GENMASK(31, IWL_FW_DBG_DOMAIN_POS + 1));
3387
3388         /* supported starting from 9000 devices */
3389         if (fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_9000)
3390                 return;
3391
3392         if (fwrt->trans->dbg.yoyo_bin_loaded || (preset && preset != 1))
3393                 return;
3394
3395         iwl_trans_send_cmd(fwrt->trans, &hcmd);
3396 }
3397 IWL_EXPORT_SYMBOL(iwl_fw_disable_dbg_asserts);
3398
3399 void iwl_fw_dbg_clear_monitor_buf(struct iwl_fw_runtime *fwrt)
3400 {
3401         struct iwl_fw_dbg_params params = {0};
3402
3403         iwl_fw_dbg_stop_sync(fwrt);
3404
3405         if (fw_has_api(&fwrt->fw->ucode_capa,
3406                        IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR)) {
3407                 struct iwl_host_cmd hcmd = {
3408                         .id = WIDE_ID(DEBUG_GROUP, FW_CLEAR_BUFFER),
3409                 };
3410                 iwl_trans_send_cmd(fwrt->trans, &hcmd);
3411         }
3412
3413         iwl_dbg_tlv_init_cfg(fwrt);
3414         iwl_fw_dbg_stop_restart_recording(fwrt, &params, false);
3415 }
3416 IWL_EXPORT_SYMBOL(iwl_fw_dbg_clear_monitor_buf);