2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/types.h>
20 #include <linux/kernel.h>
21 #include <linux/kthread.h>
22 #include <linux/printk.h>
23 #include <linux/pci_ids.h>
24 #include <linux/netdevice.h>
25 #include <linux/interrupt.h>
26 #include <linux/sched.h>
27 #include <linux/mmc/sdio.h>
28 #include <linux/mmc/sdio_func.h>
29 #include <linux/mmc/card.h>
30 #include <linux/semaphore.h>
31 #include <linux/firmware.h>
32 #include <linux/module.h>
33 #include <linux/bcma/bcma.h>
34 #include <linux/debugfs.h>
35 #include <linux/vmalloc.h>
36 #include <asm/unaligned.h>
38 #include <brcmu_wifi.h>
39 #include <brcmu_utils.h>
40 #include <brcm_hw_ids.h>
42 #include "sdio_host.h"
43 #include "sdio_chip.h"
45 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
49 #define BRCMF_TRAP_INFO_SIZE 80
51 #define CBUF_LEN (128)
53 /* Device console log buffer state */
54 #define CONSOLE_BUFFER_MAX 2024
57 __le32 buf; /* Can't be pointer on (64-bit) hosts */
60 char *_buf_compat; /* Redundant pointer for backward compat. */
65 * When there is no UART (e.g. Quickturn),
66 * the host should write a complete
67 * input line directly into cbuf and then write
68 * the length into vcons_in.
69 * This may also be used when there is a real UART
70 * (at risk of conflicting with
71 * the real UART). vcons_out is currently unused.
76 /* Output (logging) buffer
77 * Console output is written to a ring buffer log_buf at index log_idx.
78 * The host may read the output when it sees log_idx advance.
79 * Output will be lost if the output wraps around faster than the host
82 struct rte_log_le log_le;
84 /* Console input line buffer
85 * Characters are read one at a time into cbuf
86 * until <CR> is received, then
87 * the buffer is processed as a command line.
88 * Also used for virtual UART.
95 #include <chipcommon.h>
100 #define TXQLEN 2048 /* bulk tx queue length */
101 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
102 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
105 #define TXRETRIES 2 /* # of retries for tx frames */
107 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
110 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
113 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
115 #define MEMBLOCK 2048 /* Block size used for downloading
117 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
118 biggest possible glom */
120 #define BRCMF_FIRSTREAD (1 << 6)
123 /* SBSDIO_DEVICE_CTL */
125 /* 1: device will assert busy signal when receiving CMD53 */
126 #define SBSDIO_DEVCTL_SETBUSY 0x01
127 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
128 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
129 /* 1: mask all interrupts to host except the chipActive (rev 8) */
130 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
131 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
132 * sdio bus power cycle to clear (rev 9) */
133 #define SBSDIO_DEVCTL_PADS_ISO 0x08
134 /* Force SD->SB reset mapping (rev 11) */
135 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
136 /* Determined by CoreControl bit */
137 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
138 /* Force backplane reset */
139 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
140 /* Force no backplane reset */
141 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
143 /* direct(mapped) cis space */
145 /* MAPPED common CIS address */
146 #define SBSDIO_CIS_BASE_COMMON 0x1000
147 /* maximum bytes in one CIS */
148 #define SBSDIO_CIS_SIZE_LIMIT 0x200
149 /* cis offset addr is < 17 bits */
150 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
152 /* manfid tuple length, include tuple, link bytes */
153 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
156 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
157 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
158 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
159 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
160 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
161 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
162 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
163 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
164 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
165 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
166 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
167 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
168 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
169 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
170 #define I_PC (1 << 10) /* descriptor error */
171 #define I_PD (1 << 11) /* data error */
172 #define I_DE (1 << 12) /* Descriptor protocol Error */
173 #define I_RU (1 << 13) /* Receive descriptor Underflow */
174 #define I_RO (1 << 14) /* Receive fifo Overflow */
175 #define I_XU (1 << 15) /* Transmit fifo Underflow */
176 #define I_RI (1 << 16) /* Receive Interrupt */
177 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
178 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
179 #define I_XI (1 << 24) /* Transmit Interrupt */
180 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
181 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
182 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
183 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
184 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
185 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
186 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
187 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
188 #define I_DMA (I_RI | I_XI | I_ERRORS)
191 #define CC_CISRDY (1 << 0) /* CIS Ready */
192 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
193 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
194 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
195 #define CC_XMTDATAAVAIL_MODE (1 << 4)
196 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
199 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
200 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
201 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
202 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
205 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
207 /* Total length of frame header for dongle protocol */
208 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
209 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
212 * Software allocation of To SB Mailbox resources
215 /* tosbmailbox bits corresponding to intstatus bits */
216 #define SMB_NAK (1 << 0) /* Frame NAK */
217 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
218 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
219 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
221 /* tosbmailboxdata */
222 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
225 * Software allocation of To Host Mailbox resources
229 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
230 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
231 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
232 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
234 /* tohostmailboxdata */
235 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
236 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
237 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
238 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
240 #define HMB_DATA_FCDATA_MASK 0xff000000
241 #define HMB_DATA_FCDATA_SHIFT 24
243 #define HMB_DATA_VERSION_MASK 0x00ff0000
244 #define HMB_DATA_VERSION_SHIFT 16
247 * Software-defined protocol header
250 /* Current protocol version */
251 #define SDPCM_PROT_VERSION 4
253 /* SW frame header */
254 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
256 #define SDPCM_CHANNEL_MASK 0x00000f00
257 #define SDPCM_CHANNEL_SHIFT 8
258 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
260 #define SDPCM_NEXTLEN_OFFSET 2
262 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
263 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
264 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
265 #define SDPCM_DOFFSET_MASK 0xff000000
266 #define SDPCM_DOFFSET_SHIFT 24
267 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
268 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
269 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
270 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
272 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
274 /* logical channel numbers */
275 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
276 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
277 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
278 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
279 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
281 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
283 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
286 * Shared structure between dongle and the host.
287 * The structure contains pointers to trap or assert information.
289 #define SDPCM_SHARED_VERSION 0x0003
290 #define SDPCM_SHARED_VERSION_MASK 0x00FF
291 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
292 #define SDPCM_SHARED_ASSERT 0x0200
293 #define SDPCM_SHARED_TRAP 0x0400
295 /* Space for header read, limit for data packets */
296 #define MAX_HDR_READ (1 << 6)
297 #define MAX_RX_DATASZ 2048
299 /* Maximum milliseconds to wait for F2 to come up */
300 #define BRCMF_WAIT_F2RDY 3000
302 /* Bump up limit on waiting for HT to account for first startup;
303 * if the image is doing a CRC calculation before programming the PMU
304 * for HT availability, it could take a couple hundred ms more, so
305 * max out at a 1 second (1000000us).
307 #undef PMU_MAX_TRANSITION_DLY
308 #define PMU_MAX_TRANSITION_DLY 1000000
310 /* Value for ChipClockCSR during initial setup */
311 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
312 SBSDIO_ALP_AVAIL_REQ)
314 /* Flags for SDH calls */
315 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
317 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
318 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
319 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME);
320 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME);
322 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
323 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
326 #define BRCMF_IDLE_INTERVAL 1
329 * Conversion of 802.1D priority to precedence level
331 static uint prio2prec(u32 prio)
333 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
339 u32 corecontrol; /* 0x00, rev8 */
340 u32 corestatus; /* rev8 */
342 u32 biststatus; /* rev8 */
345 u16 pcmciamesportaladdr; /* 0x010, rev8 */
347 u16 pcmciamesportalmask; /* rev8 */
349 u16 pcmciawrframebc; /* rev8 */
351 u16 pcmciaunderflowtimer; /* rev8 */
355 u32 intstatus; /* 0x020, rev8 */
356 u32 hostintmask; /* rev8 */
357 u32 intmask; /* rev8 */
358 u32 sbintstatus; /* rev8 */
359 u32 sbintmask; /* rev8 */
360 u32 funcintmask; /* rev4 */
362 u32 tosbmailbox; /* 0x040, rev8 */
363 u32 tohostmailbox; /* rev8 */
364 u32 tosbmailboxdata; /* rev8 */
365 u32 tohostmailboxdata; /* rev8 */
367 /* synchronized access to registers in SDIO clock domain */
368 u32 sdioaccess; /* 0x050, rev8 */
371 /* PCMCIA frame control */
372 u8 pcmciaframectrl; /* 0x060, rev8 */
374 u8 pcmciawatermark; /* rev8 */
377 /* interrupt batching control */
378 u32 intrcvlazy; /* 0x100, rev8 */
382 u32 cmd52rd; /* 0x110, rev8 */
383 u32 cmd52wr; /* rev8 */
384 u32 cmd53rd; /* rev8 */
385 u32 cmd53wr; /* rev8 */
386 u32 abort; /* rev8 */
387 u32 datacrcerror; /* rev8 */
388 u32 rdoutofsync; /* rev8 */
389 u32 wroutofsync; /* rev8 */
390 u32 writebusy; /* rev8 */
391 u32 readwait; /* rev8 */
392 u32 readterm; /* rev8 */
393 u32 writeterm; /* rev8 */
395 u32 clockctlstatus; /* rev8 */
398 u32 PAD[128]; /* DMA engines */
400 /* SDIO/PCMCIA CIS region */
401 char cis[512]; /* 0x400-0x5ff, rev6 */
403 /* PCMCIA function control registers */
404 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
407 /* PCMCIA backplane access */
408 u16 backplanecsr; /* 0x76E, rev6 */
409 u16 backplaneaddr0; /* rev6 */
410 u16 backplaneaddr1; /* rev6 */
411 u16 backplaneaddr2; /* rev6 */
412 u16 backplaneaddr3; /* rev6 */
413 u16 backplanedata0; /* rev6 */
414 u16 backplanedata1; /* rev6 */
415 u16 backplanedata2; /* rev6 */
416 u16 backplanedata3; /* rev6 */
419 /* sprom "size" & "blank" info */
420 u16 spromstatus; /* 0x7BE, rev2 */
427 /* Device console log buffer state */
428 struct brcmf_console {
429 uint count; /* Poll interval msec counter */
430 uint log_addr; /* Log struct address (fixed) */
431 struct rte_log_le log_le; /* Log struct (host copy) */
432 uint bufsize; /* Size of log buffer */
433 u8 *buf; /* Log buffer (host copy) */
434 uint last; /* Last buffer read index */
437 struct brcmf_trap_info {
451 __le32 r9; /* sb/v6 */
452 __le32 r10; /* sl/v7 */
453 __le32 r11; /* fp/v8 */
461 struct sdpcm_shared {
465 u32 assert_file_addr;
467 u32 console_addr; /* Address of struct rte_console */
473 struct sdpcm_shared_le {
476 __le32 assert_exp_addr;
477 __le32 assert_file_addr;
479 __le32 console_addr; /* Address of struct rte_console */
480 __le32 msgtrace_addr;
486 /* misc chip info needed by some of the routines */
487 /* Private data for SDIO bus interaction */
489 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
490 struct chip_info *ci; /* Chip info struct */
491 char *vars; /* Variables (from CIS and/or other) */
492 uint varsz; /* Size of variables buffer */
494 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
496 u32 hostintmask; /* Copy of Host Interrupt Mask */
497 atomic_t intstatus; /* Intstatus bits (events) pending */
498 atomic_t fcstate; /* State of dongle flow-control */
500 uint blocksize; /* Block size of SDIO transfers */
501 uint roundup; /* Max roundup limit */
503 struct pktq txq; /* Queue length used for flow-control */
504 u8 flowcontrol; /* per prio flow control bitmask */
505 u8 tx_seq; /* Transmit sequence number (next) */
506 u8 tx_max; /* Maximum transmit sequence allowed */
508 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
509 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
510 u16 nextlen; /* Next Read Len from last header */
511 u8 rx_seq; /* Receive sequence number (expected) */
512 bool rxskip; /* Skip receive (awaiting NAK ACK) */
514 uint rxbound; /* Rx frames to read before resched */
515 uint txbound; /* Tx frames to send before resched */
518 struct sk_buff *glomd; /* Packet containing glomming descriptor */
519 struct sk_buff_head glom; /* Packet list for glommed superframe */
520 uint glomerr; /* Glom packet read errors */
522 u8 *rxbuf; /* Buffer for receiving control packets */
523 uint rxblen; /* Allocated length of rxbuf */
524 u8 *rxctl; /* Aligned pointer into rxbuf */
525 u8 *databuf; /* Buffer for receiving big glom packet */
526 u8 *dataptr; /* Aligned pointer into databuf */
527 uint rxlen; /* Length of valid data in buffer */
529 u8 sdpcm_ver; /* Bus protocol reported by dongle */
531 bool intr; /* Use interrupts */
532 bool poll; /* Use polling */
533 atomic_t ipend; /* Device interrupt is pending */
534 uint spurious; /* Count of spurious interrupts */
535 uint pollrate; /* Ticks between device polls */
536 uint polltick; /* Tick counter */
539 uint console_interval;
540 struct brcmf_console console; /* Console output polling support */
541 uint console_addr; /* Console address from shared struct */
544 uint clkstate; /* State of sd and backplane clock(s) */
545 bool activity; /* Activity flag for clock down */
546 s32 idletime; /* Control for activity timeout */
547 s32 idlecount; /* Activity timeout counter */
548 s32 idleclock; /* How to set bus driver when idle */
550 bool use_rxchain; /* If brcmf should use PKT chains */
551 bool rxflow_mode; /* Rx flow control mode */
552 bool rxflow; /* Is rx flow control on */
553 bool alp_only; /* Don't use HT clock (ALP only) */
554 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
559 bool ctrl_frame_stat;
562 wait_queue_head_t ctrl_wait;
563 wait_queue_head_t dcmd_resp_wait;
565 struct timer_list timer;
566 struct completion watchdog_wait;
567 struct task_struct *watchdog_tsk;
571 struct workqueue_struct *brcmf_wq;
572 struct work_struct datawork;
573 struct list_head dpc_tsklst;
574 spinlock_t dpc_tl_lock;
576 struct semaphore sdsem;
578 const struct firmware *firmware;
581 bool txoff; /* Transmit flow-controlled */
582 struct brcmf_sdio_count sdcnt;
588 #define CLK_PENDING 2 /* Not used yet */
592 static int qcount[NUMPRIO];
593 static int tx_packets[NUMPRIO];
596 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
598 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
600 /* Retry count for register access failures */
601 static const uint retry_limit = 2;
603 /* Limit on rounding up frames */
604 static const uint max_roundup = 512;
608 static void pkt_align(struct sk_buff *p, int len, int align)
611 datalign = (unsigned long)(p->data);
612 datalign = roundup(datalign, (align)) - datalign;
614 skb_pull(p, datalign);
618 /* To check if there's window offered */
619 static bool data_ok(struct brcmf_sdio *bus)
621 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
622 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
626 * Reads a register in the SDIO hardware block. This block occupies a series of
627 * adresses on the 32 bit backplane bus.
630 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
632 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
635 *regvar = brcmf_sdio_regrl(bus->sdiodev,
636 bus->ci->c_inf[idx].base + offset, &ret);
642 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
644 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
647 brcmf_sdio_regwl(bus->sdiodev,
648 bus->ci->c_inf[idx].base + reg_offset,
654 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
656 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
658 /* Packet free applicable unconditionally for sdio and sdspi.
659 * Conditional if bufpool was present for gspi bus.
661 static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio *bus, struct sk_buff *pkt)
664 brcmu_pkt_buf_free_skb(pkt);
667 /* Turn backplane clock on or off */
668 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
671 u8 clkctl, clkreq, devctl;
672 unsigned long timeout;
674 brcmf_dbg(TRACE, "Enter\n");
679 /* Request HT Avail */
681 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
683 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
686 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
690 /* Check current status */
691 clkctl = brcmf_sdio_regrb(bus->sdiodev,
692 SBSDIO_FUNC1_CHIPCLKCSR, &err);
694 brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);
698 /* Go to pending and await interrupt if appropriate */
699 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
700 /* Allow only clock-available interrupt */
701 devctl = brcmf_sdio_regrb(bus->sdiodev,
702 SBSDIO_DEVICE_CTL, &err);
704 brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",
709 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
710 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
712 brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
713 bus->clkstate = CLK_PENDING;
716 } else if (bus->clkstate == CLK_PENDING) {
717 /* Cancel CA-only interrupt filter */
718 devctl = brcmf_sdio_regrb(bus->sdiodev,
719 SBSDIO_DEVICE_CTL, &err);
720 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
721 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
725 /* Otherwise, wait here (polling) for HT Avail */
727 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
728 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
729 clkctl = brcmf_sdio_regrb(bus->sdiodev,
730 SBSDIO_FUNC1_CHIPCLKCSR,
732 if (time_after(jiffies, timeout))
735 usleep_range(5000, 10000);
738 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
741 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
742 brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n",
743 PMU_MAX_TRANSITION_DLY, clkctl);
747 /* Mark clock available */
748 bus->clkstate = CLK_AVAIL;
749 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
752 if (!bus->alp_only) {
753 if (SBSDIO_ALPONLY(clkctl))
754 brcmf_dbg(ERROR, "HT Clock should be on\n");
756 #endif /* defined (DEBUG) */
758 bus->activity = true;
762 if (bus->clkstate == CLK_PENDING) {
763 /* Cancel CA-only interrupt filter */
764 devctl = brcmf_sdio_regrb(bus->sdiodev,
765 SBSDIO_DEVICE_CTL, &err);
766 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
767 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
771 bus->clkstate = CLK_SDONLY;
772 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
774 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
776 brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",
784 /* Change idle/active SD state */
785 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
787 brcmf_dbg(TRACE, "Enter\n");
790 bus->clkstate = CLK_SDONLY;
792 bus->clkstate = CLK_NONE;
797 /* Transition SD and backplane clock readiness */
798 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
801 uint oldstate = bus->clkstate;
804 brcmf_dbg(TRACE, "Enter\n");
806 /* Early exit if we're already there */
807 if (bus->clkstate == target) {
808 if (target == CLK_AVAIL) {
809 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
810 bus->activity = true;
817 /* Make sure SD clock is available */
818 if (bus->clkstate == CLK_NONE)
819 brcmf_sdbrcm_sdclk(bus, true);
820 /* Now request HT Avail on the backplane */
821 brcmf_sdbrcm_htclk(bus, true, pendok);
822 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
823 bus->activity = true;
827 /* Remove HT request, or bring up SD clock */
828 if (bus->clkstate == CLK_NONE)
829 brcmf_sdbrcm_sdclk(bus, true);
830 else if (bus->clkstate == CLK_AVAIL)
831 brcmf_sdbrcm_htclk(bus, false, false);
833 brcmf_dbg(ERROR, "request for %d -> %d\n",
834 bus->clkstate, target);
835 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
839 /* Make sure to remove HT request */
840 if (bus->clkstate == CLK_AVAIL)
841 brcmf_sdbrcm_htclk(bus, false, false);
842 /* Now remove the SD clock */
843 brcmf_sdbrcm_sdclk(bus, false);
844 brcmf_sdbrcm_wd_timer(bus, 0);
848 brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
854 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
861 brcmf_dbg(TRACE, "Enter\n");
863 /* Read mailbox data and ack that we did so */
864 ret = r_sdreg32(bus, &hmb_data,
865 offsetof(struct sdpcmd_regs, tohostmailboxdata));
868 w_sdreg32(bus, SMB_INT_ACK,
869 offsetof(struct sdpcmd_regs, tosbmailbox));
870 bus->sdcnt.f1regdata += 2;
872 /* Dongle recomposed rx frames, accept them again */
873 if (hmb_data & HMB_DATA_NAKHANDLED) {
874 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
877 brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n");
880 intstatus |= I_HMB_FRAME_IND;
884 * DEVREADY does not occur with gSPI.
886 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
888 (hmb_data & HMB_DATA_VERSION_MASK) >>
889 HMB_DATA_VERSION_SHIFT;
890 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
891 brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, "
893 bus->sdpcm_ver, SDPCM_PROT_VERSION);
895 brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
900 * Flow Control has been moved into the RX headers and this out of band
901 * method isn't used any more.
902 * remaining backward compatible with older dongles.
904 if (hmb_data & HMB_DATA_FC) {
905 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
906 HMB_DATA_FCDATA_SHIFT;
908 if (fcbits & ~bus->flowcontrol)
909 bus->sdcnt.fc_xoff++;
911 if (bus->flowcontrol & ~fcbits)
914 bus->sdcnt.fc_rcvd++;
915 bus->flowcontrol = fcbits;
918 /* Shouldn't be any others */
919 if (hmb_data & ~(HMB_DATA_DEVREADY |
920 HMB_DATA_NAKHANDLED |
923 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
924 brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n",
930 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
937 brcmf_dbg(ERROR, "%sterminate frame%s\n",
938 abort ? "abort command, " : "",
939 rtx ? ", send NAK" : "");
942 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
944 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
946 bus->sdcnt.f1regdata++;
948 /* Wait until the packet has been flushed (device/FIFO stable) */
949 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
950 hi = brcmf_sdio_regrb(bus->sdiodev,
951 SBSDIO_FUNC1_RFRAMEBCHI, &err);
952 lo = brcmf_sdio_regrb(bus->sdiodev,
953 SBSDIO_FUNC1_RFRAMEBCLO, &err);
954 bus->sdcnt.f1regdata += 2;
956 if ((hi == 0) && (lo == 0))
959 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
960 brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n",
961 lastrbc, (hi << 8) + lo);
963 lastrbc = (hi << 8) + lo;
967 brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc);
969 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
973 err = w_sdreg32(bus, SMB_NAK,
974 offsetof(struct sdpcmd_regs, tosbmailbox));
976 bus->sdcnt.f1regdata++;
981 /* Clear partial in any case */
984 /* If we can't reach the device, signal failure */
986 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
989 /* copy a buffer into a pkt buffer chain */
990 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
999 skb_queue_walk(&bus->glom, p) {
1000 n = min_t(uint, p->len, len);
1001 memcpy(p->data, buf, n);
1012 /* return total length of buffer chain */
1013 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1019 skb_queue_walk(&bus->glom, p)
1024 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1026 struct sk_buff *cur, *next;
1028 skb_queue_walk_safe(&bus->glom, cur, next) {
1029 skb_unlink(cur, &bus->glom);
1030 brcmu_pkt_buf_free_skb(cur);
1034 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1040 struct sk_buff *pfirst, *pnext;
1043 u8 chan, seq, doff, sfdoff;
1047 bool usechain = bus->use_rxchain;
1049 /* If packets, issue read(s) and send up packet chain */
1050 /* Return sequence numbers consumed? */
1052 brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1053 bus->glomd, skb_peek(&bus->glom));
1055 /* If there's a descriptor, generate the packet chain */
1057 pfirst = pnext = NULL;
1058 dlen = (u16) (bus->glomd->len);
1059 dptr = bus->glomd->data;
1060 if (!dlen || (dlen & 1)) {
1061 brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n",
1066 for (totlen = num = 0; dlen; num++) {
1067 /* Get (and move past) next length */
1068 sublen = get_unaligned_le16(dptr);
1069 dlen -= sizeof(u16);
1070 dptr += sizeof(u16);
1071 if ((sublen < SDPCM_HDRLEN) ||
1072 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1073 brcmf_dbg(ERROR, "descriptor len %d bad: %d\n",
1078 if (sublen % BRCMF_SDALIGN) {
1079 brcmf_dbg(ERROR, "sublen %d not multiple of %d\n",
1080 sublen, BRCMF_SDALIGN);
1085 /* For last frame, adjust read len so total
1086 is a block multiple */
1089 (roundup(totlen, bus->blocksize) - totlen);
1090 totlen = roundup(totlen, bus->blocksize);
1093 /* Allocate/chain packet for next subframe */
1094 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1095 if (pnext == NULL) {
1096 brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1100 skb_queue_tail(&bus->glom, pnext);
1102 /* Adhere to start alignment requirements */
1103 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1106 /* If all allocations succeeded, save packet chain
1109 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1111 if (BRCMF_GLOM_ON() && bus->nextlen &&
1112 totlen != bus->nextlen) {
1113 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1114 bus->nextlen, totlen, rxseq);
1116 pfirst = pnext = NULL;
1118 brcmf_sdbrcm_free_glom(bus);
1122 /* Done with descriptor packet */
1123 brcmu_pkt_buf_free_skb(bus->glomd);
1128 /* Ok -- either we just generated a packet chain,
1129 or had one from before */
1130 if (!skb_queue_empty(&bus->glom)) {
1131 if (BRCMF_GLOM_ON()) {
1132 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1133 skb_queue_walk(&bus->glom, pnext) {
1134 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1135 pnext, (u8 *) (pnext->data),
1136 pnext->len, pnext->len);
1140 pfirst = skb_peek(&bus->glom);
1141 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1143 /* Do an SDIO read for the superframe. Configurable iovar to
1144 * read directly into the chained packet, or allocate a large
1145 * packet and and copy into the chain.
1148 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1149 bus->sdiodev->sbwad,
1150 SDIO_FUNC_2, F2SYNC, &bus->glom);
1151 } else if (bus->dataptr) {
1152 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1153 bus->sdiodev->sbwad,
1154 SDIO_FUNC_2, F2SYNC,
1155 bus->dataptr, dlen);
1156 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1157 if (sublen != dlen) {
1158 brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n",
1164 brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1168 bus->sdcnt.f2rxdata++;
1170 /* On failure, kill the superframe, allow a couple retries */
1172 brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
1174 bus->sdiodev->bus_if->dstats.rx_errors++;
1176 if (bus->glomerr++ < 3) {
1177 brcmf_sdbrcm_rxfail(bus, true, true);
1180 brcmf_sdbrcm_rxfail(bus, true, false);
1181 bus->sdcnt.rxglomfail++;
1182 brcmf_sdbrcm_free_glom(bus);
1187 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1188 pfirst->data, min_t(int, pfirst->len, 48),
1191 /* Validate the superframe header */
1192 dptr = (u8 *) (pfirst->data);
1193 sublen = get_unaligned_le16(dptr);
1194 check = get_unaligned_le16(dptr + sizeof(u16));
1196 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1197 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1198 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1199 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1200 brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n",
1204 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1205 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1208 if ((u16)~(sublen ^ check)) {
1209 brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
1212 } else if (roundup(sublen, bus->blocksize) != dlen) {
1213 brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
1214 sublen, roundup(sublen, bus->blocksize),
1217 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
1218 SDPCM_GLOM_CHANNEL) {
1219 brcmf_dbg(ERROR, "(superframe): bad channel %d\n",
1220 SDPCM_PACKET_CHANNEL(
1221 &dptr[SDPCM_FRAMETAG_LEN]));
1223 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
1224 brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n");
1226 } else if ((doff < SDPCM_HDRLEN) ||
1227 (doff > (pfirst->len - SDPCM_HDRLEN))) {
1228 brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
1229 doff, sublen, pfirst->len, SDPCM_HDRLEN);
1233 /* Check sequence number of superframe SW header */
1235 brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n",
1237 bus->sdcnt.rx_badseq++;
1241 /* Check window for sanity */
1242 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1243 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1244 txmax, bus->tx_seq);
1245 txmax = bus->tx_seq + 2;
1247 bus->tx_max = txmax;
1249 /* Remove superframe header, remember offset */
1250 skb_pull(pfirst, doff);
1254 /* Validate all the subframe headers */
1255 skb_queue_walk(&bus->glom, pnext) {
1256 /* leave when invalid subframe is found */
1260 dptr = (u8 *) (pnext->data);
1261 dlen = (u16) (pnext->len);
1262 sublen = get_unaligned_le16(dptr);
1263 check = get_unaligned_le16(dptr + sizeof(u16));
1264 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1265 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1266 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1267 dptr, 32, "subframe:\n");
1269 if ((u16)~(sublen ^ check)) {
1270 brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
1271 num, sublen, check);
1273 } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
1274 brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
1277 } else if ((chan != SDPCM_DATA_CHANNEL) &&
1278 (chan != SDPCM_EVENT_CHANNEL)) {
1279 brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n",
1282 } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
1283 brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n",
1284 num, doff, sublen, SDPCM_HDRLEN);
1287 /* increase the subframe count */
1292 /* Terminate frame on error, request
1294 if (bus->glomerr++ < 3) {
1295 /* Restore superframe header space */
1296 skb_push(pfirst, sfdoff);
1297 brcmf_sdbrcm_rxfail(bus, true, true);
1300 brcmf_sdbrcm_rxfail(bus, true, false);
1301 bus->sdcnt.rxglomfail++;
1302 brcmf_sdbrcm_free_glom(bus);
1308 /* Basic SD framing looks ok - process each packet (header) */
1310 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1311 dptr = (u8 *) (pfirst->data);
1312 sublen = get_unaligned_le16(dptr);
1313 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1314 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1315 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1317 brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
1318 num, pfirst, pfirst->data,
1319 pfirst->len, sublen, chan, seq);
1321 /* precondition: chan == SDPCM_DATA_CHANNEL ||
1322 chan == SDPCM_EVENT_CHANNEL */
1325 brcmf_dbg(GLOM, "rx_seq %d, expected %d\n",
1327 bus->sdcnt.rx_badseq++;
1332 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1333 dptr, dlen, "Rx Subframe Data:\n");
1335 __skb_trim(pfirst, sublen);
1336 skb_pull(pfirst, doff);
1338 if (pfirst->len == 0) {
1339 skb_unlink(pfirst, &bus->glom);
1340 brcmu_pkt_buf_free_skb(pfirst);
1342 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev,
1343 &ifidx, pfirst) != 0) {
1344 brcmf_dbg(ERROR, "rx protocol error\n");
1345 bus->sdiodev->bus_if->dstats.rx_errors++;
1346 skb_unlink(pfirst, &bus->glom);
1347 brcmu_pkt_buf_free_skb(pfirst);
1351 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1353 min_t(int, pfirst->len, 32),
1354 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1355 bus->glom.qlen, pfirst, pfirst->data,
1356 pfirst->len, pfirst->next,
1359 /* sent any remaining packets up */
1360 if (bus->glom.qlen) {
1362 brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom);
1366 bus->sdcnt.rxglomframes++;
1367 bus->sdcnt.rxglompkts += bus->glom.qlen;
1372 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1375 DECLARE_WAITQUEUE(wait, current);
1376 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1378 /* Wait until control frame is available */
1379 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1380 set_current_state(TASK_INTERRUPTIBLE);
1382 while (!(*condition) && (!signal_pending(current) && timeout))
1383 timeout = schedule_timeout(timeout);
1385 if (signal_pending(current))
1388 set_current_state(TASK_RUNNING);
1389 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1394 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1396 if (waitqueue_active(&bus->dcmd_resp_wait))
1397 wake_up_interruptible(&bus->dcmd_resp_wait);
1402 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1408 brcmf_dbg(TRACE, "Enter\n");
1410 /* Set rxctl for frame (w/optional alignment) */
1411 bus->rxctl = bus->rxbuf;
1412 bus->rxctl += BRCMF_FIRSTREAD;
1413 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
1415 bus->rxctl += (BRCMF_SDALIGN - pad);
1416 bus->rxctl -= BRCMF_FIRSTREAD;
1418 /* Copy the already-read portion over */
1419 memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD);
1420 if (len <= BRCMF_FIRSTREAD)
1423 /* Raise rdlen to next SDIO block to avoid tail command */
1424 rdlen = len - BRCMF_FIRSTREAD;
1425 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1426 pad = bus->blocksize - (rdlen % bus->blocksize);
1427 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1428 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1430 } else if (rdlen % BRCMF_SDALIGN) {
1431 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1434 /* Satisfy length-alignment requirements */
1435 if (rdlen & (ALIGNMENT - 1))
1436 rdlen = roundup(rdlen, ALIGNMENT);
1438 /* Drop if the read is too big or it exceeds our maximum */
1439 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1440 brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
1441 rdlen, bus->sdiodev->bus_if->maxctl);
1442 bus->sdiodev->bus_if->dstats.rx_errors++;
1443 brcmf_sdbrcm_rxfail(bus, false, false);
1447 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1448 brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1449 len, len - doff, bus->sdiodev->bus_if->maxctl);
1450 bus->sdiodev->bus_if->dstats.rx_errors++;
1451 bus->sdcnt.rx_toolong++;
1452 brcmf_sdbrcm_rxfail(bus, false, false);
1456 /* Read remainder of frame body into the rxctl buffer */
1457 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1458 bus->sdiodev->sbwad,
1460 F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen);
1461 bus->sdcnt.f2rxdata++;
1463 /* Control frame failures need retransmission */
1465 brcmf_dbg(ERROR, "read %d control bytes failed: %d\n",
1467 bus->sdcnt.rxc_errors++;
1468 brcmf_sdbrcm_rxfail(bus, true, true);
1474 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1475 bus->rxctl, len, "RxCtrl:\n");
1477 /* Point to valid data and indicate its length */
1479 bus->rxlen = len - doff;
1482 /* Awake any waiters */
1483 brcmf_sdbrcm_dcmd_resp_wake(bus);
1486 /* Pad read to blocksize for efficiency */
1487 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1489 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1490 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1491 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1492 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1494 } else if (*rdlen % BRCMF_SDALIGN) {
1495 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1500 brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen,
1501 struct sk_buff **pkt, u8 **rxbuf)
1503 int sdret; /* Return code from calls */
1505 *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
1509 pkt_align(*pkt, rdlen, BRCMF_SDALIGN);
1510 *rxbuf = (u8 *) ((*pkt)->data);
1511 /* Read the entire frame */
1512 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1513 SDIO_FUNC_2, F2SYNC, *pkt);
1514 bus->sdcnt.f2rxdata++;
1517 brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n",
1519 brcmu_pkt_buf_free_skb(*pkt);
1520 bus->sdiodev->bus_if->dstats.rx_errors++;
1521 /* Force retry w/normal header read.
1522 * Don't attempt NAK for
1525 brcmf_sdbrcm_rxfail(bus, true, true);
1530 /* Checks the header */
1532 brcmf_check_rxbuf(struct brcmf_sdio *bus, struct sk_buff *pkt, u8 *rxbuf,
1533 u8 rxseq, u16 nextlen, u16 *len)
1536 bool len_consistent; /* Result of comparing readahead len and
1539 memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
1541 /* Extract hardware header fields */
1542 *len = get_unaligned_le16(bus->rxhdr);
1543 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1545 /* All zeros means readahead info was bad */
1546 if (!(*len | check)) {
1547 brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n");
1551 /* Validate check bytes */
1552 if ((u16)~(*len ^ check)) {
1553 brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n",
1554 nextlen, *len, check);
1555 bus->sdcnt.rx_badhdr++;
1556 brcmf_sdbrcm_rxfail(bus, false, false);
1560 /* Validate frame length */
1561 if (*len < SDPCM_HDRLEN) {
1562 brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n",
1567 /* Check for consistency with readahead info */
1568 len_consistent = (nextlen != (roundup(*len, 16) >> 4));
1569 if (len_consistent) {
1570 /* Mismatch, force retry w/normal
1571 header (may be >4K) */
1572 brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n",
1573 nextlen, *len, roundup(*len, 16),
1575 brcmf_sdbrcm_rxfail(bus, true, true);
1582 brcmf_sdbrcm_pktfree2(bus, pkt);
1586 /* Return true if there may be more frames to read */
1588 brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
1590 u16 len, check; /* Extracted hardware header fields */
1591 u8 chan, seq, doff; /* Extracted software header fields */
1592 u8 fcbits; /* Extracted fcbits from software header */
1594 struct sk_buff *pkt; /* Packet for event or data frames */
1595 u16 pad; /* Number of pad bytes to read */
1596 u16 rdlen; /* Total number of bytes to read */
1597 u8 rxseq; /* Next sequence number to expect */
1598 uint rxleft = 0; /* Remaining number of frames allowed */
1599 int sdret; /* Return code from calls */
1600 u8 txmax; /* Maximum tx sequence offered */
1603 uint rxcount = 0; /* Total frames read */
1605 brcmf_dbg(TRACE, "Enter\n");
1607 /* Not finished unless we encounter no more frames indication */
1610 for (rxseq = bus->rx_seq, rxleft = maxframes;
1611 !bus->rxskip && rxleft &&
1612 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1613 rxseq++, rxleft--) {
1615 /* Handle glomming separately */
1616 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1618 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1619 bus->glomd, skb_peek(&bus->glom));
1620 cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
1621 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1623 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1627 /* Try doing single read if we can */
1629 u16 nextlen = bus->nextlen;
1632 rdlen = len = nextlen << 4;
1633 brcmf_pad(bus, &pad, &rdlen);
1636 * After the frame is received we have to
1637 * distinguish whether it is data
1638 * or non-data frame.
1640 brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf);
1642 /* Give up on data, request rtx of events */
1643 brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n",
1648 if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen,
1652 /* Extract software header fields */
1653 chan = SDPCM_PACKET_CHANNEL(
1654 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1655 seq = SDPCM_PACKET_SEQUENCE(
1656 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1657 doff = SDPCM_DOFFSET_VALUE(
1658 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1659 txmax = SDPCM_WINDOW_VALUE(
1660 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1663 bus->rxhdr[SDPCM_FRAMETAG_LEN +
1664 SDPCM_NEXTLEN_OFFSET];
1665 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1666 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1671 bus->sdcnt.rx_readahead_cnt++;
1673 /* Handle Flow Control */
1674 fcbits = SDPCM_FCMASK_VALUE(
1675 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1677 if (bus->flowcontrol != fcbits) {
1678 if (~bus->flowcontrol & fcbits)
1679 bus->sdcnt.fc_xoff++;
1681 if (bus->flowcontrol & ~fcbits)
1682 bus->sdcnt.fc_xon++;
1684 bus->sdcnt.fc_rcvd++;
1685 bus->flowcontrol = fcbits;
1688 /* Check and update sequence number */
1690 brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n",
1692 bus->sdcnt.rx_badseq++;
1696 /* Check window for sanity */
1697 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1698 brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n",
1699 txmax, bus->tx_seq);
1700 txmax = bus->tx_seq + 2;
1702 bus->tx_max = txmax;
1704 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1705 rxbuf, len, "Rx Data:\n");
1706 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1709 bus->rxhdr, SDPCM_HDRLEN,
1712 if (chan == SDPCM_CONTROL_CHANNEL) {
1713 brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n",
1715 /* Force retry w/normal header read */
1717 brcmf_sdbrcm_rxfail(bus, false, true);
1718 brcmf_sdbrcm_pktfree2(bus, pkt);
1722 /* Validate data offset */
1723 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1724 brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n",
1725 doff, len, SDPCM_HDRLEN);
1726 brcmf_sdbrcm_rxfail(bus, false, false);
1727 brcmf_sdbrcm_pktfree2(bus, pkt);
1731 /* All done with this one -- now deliver the packet */
1735 /* Read frame header (hardware and software) */
1736 sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
1737 SDIO_FUNC_2, F2SYNC, bus->rxhdr,
1739 bus->sdcnt.f2rxhdrs++;
1742 brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret);
1743 bus->sdcnt.rx_hdrfail++;
1744 brcmf_sdbrcm_rxfail(bus, true, true);
1747 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1748 bus->rxhdr, SDPCM_HDRLEN, "RxHdr:\n");
1751 /* Extract hardware header fields */
1752 len = get_unaligned_le16(bus->rxhdr);
1753 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1755 /* All zeros means no more frames */
1756 if (!(len | check)) {
1761 /* Validate check bytes */
1762 if ((u16) ~(len ^ check)) {
1763 brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n",
1765 bus->sdcnt.rx_badhdr++;
1766 brcmf_sdbrcm_rxfail(bus, false, false);
1770 /* Validate frame length */
1771 if (len < SDPCM_HDRLEN) {
1772 brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len);
1776 /* Extract software header fields */
1777 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1778 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1779 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1780 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1782 /* Validate data offset */
1783 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1784 brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n",
1785 doff, len, SDPCM_HDRLEN, seq);
1786 bus->sdcnt.rx_badhdr++;
1787 brcmf_sdbrcm_rxfail(bus, false, false);
1791 /* Save the readahead length if there is one */
1793 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1794 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1795 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1800 /* Handle Flow Control */
1801 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1803 if (bus->flowcontrol != fcbits) {
1804 if (~bus->flowcontrol & fcbits)
1805 bus->sdcnt.fc_xoff++;
1807 if (bus->flowcontrol & ~fcbits)
1808 bus->sdcnt.fc_xon++;
1810 bus->sdcnt.fc_rcvd++;
1811 bus->flowcontrol = fcbits;
1814 /* Check and update sequence number */
1816 brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq);
1817 bus->sdcnt.rx_badseq++;
1821 /* Check window for sanity */
1822 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1823 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1824 txmax, bus->tx_seq);
1825 txmax = bus->tx_seq + 2;
1827 bus->tx_max = txmax;
1829 /* Call a separate function for control frames */
1830 if (chan == SDPCM_CONTROL_CHANNEL) {
1831 brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
1835 /* precondition: chan is either SDPCM_DATA_CHANNEL,
1836 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
1837 SDPCM_GLOM_CHANNEL */
1839 /* Length to read */
1840 rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0;
1842 /* May pad read to blocksize for efficiency */
1843 if (bus->roundup && bus->blocksize &&
1844 (rdlen > bus->blocksize)) {
1845 pad = bus->blocksize - (rdlen % bus->blocksize);
1846 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1847 ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ))
1849 } else if (rdlen % BRCMF_SDALIGN) {
1850 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1853 /* Satisfy length-alignment requirements */
1854 if (rdlen & (ALIGNMENT - 1))
1855 rdlen = roundup(rdlen, ALIGNMENT);
1857 if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) {
1858 /* Too long -- skip this frame */
1859 brcmf_dbg(ERROR, "too long: len %d rdlen %d\n",
1861 bus->sdiodev->bus_if->dstats.rx_errors++;
1862 bus->sdcnt.rx_toolong++;
1863 brcmf_sdbrcm_rxfail(bus, false, false);
1867 pkt = brcmu_pkt_buf_get_skb(rdlen +
1868 BRCMF_FIRSTREAD + BRCMF_SDALIGN);
1870 /* Give up on data, request rtx of events */
1871 brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
1873 bus->sdiodev->bus_if->dstats.rx_dropped++;
1874 brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
1878 /* Leave room for what we already read, and align remainder */
1879 skb_pull(pkt, BRCMF_FIRSTREAD);
1880 pkt_align(pkt, rdlen, BRCMF_SDALIGN);
1882 /* Read the remaining frame data */
1883 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1884 SDIO_FUNC_2, F2SYNC, pkt);
1885 bus->sdcnt.f2rxdata++;
1888 brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen,
1889 ((chan == SDPCM_EVENT_CHANNEL) ? "event"
1890 : ((chan == SDPCM_DATA_CHANNEL) ? "data"
1892 brcmu_pkt_buf_free_skb(pkt);
1893 bus->sdiodev->bus_if->dstats.rx_errors++;
1894 brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
1898 /* Copy the already-read portion */
1899 skb_push(pkt, BRCMF_FIRSTREAD);
1900 memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD);
1902 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1903 pkt->data, len, "Rx Data:\n");
1906 /* Save superframe descriptor and allocate packet frame */
1907 if (chan == SDPCM_GLOM_CHANNEL) {
1908 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
1909 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1911 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1914 __skb_trim(pkt, len);
1915 skb_pull(pkt, SDPCM_HDRLEN);
1918 brcmf_dbg(ERROR, "%s: glom superframe w/o "
1919 "descriptor!\n", __func__);
1920 brcmf_sdbrcm_rxfail(bus, false, false);
1925 /* Fill in packet len and prio, deliver upward */
1926 __skb_trim(pkt, len);
1927 skb_pull(pkt, doff);
1929 if (pkt->len == 0) {
1930 brcmu_pkt_buf_free_skb(pkt);
1932 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx,
1934 brcmf_dbg(ERROR, "rx protocol error\n");
1935 brcmu_pkt_buf_free_skb(pkt);
1936 bus->sdiodev->bus_if->dstats.rx_errors++;
1940 /* Unlock during rx call */
1942 brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt);
1945 rxcount = maxframes - rxleft;
1946 /* Message if we hit the limit */
1948 brcmf_dbg(DATA, "hit rx limit of %d frames\n",
1951 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1952 /* Back off rxseq if awaiting rtx, update rx_seq */
1955 bus->rx_seq = rxseq;
1961 brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
1964 wait_event_interruptible_timeout(bus->ctrl_wait, !*lockvar, HZ * 2);
1970 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1972 if (waitqueue_active(&bus->ctrl_wait))
1973 wake_up_interruptible(&bus->ctrl_wait);
1977 /* Writes a HW/SW header into the packet and sends it. */
1978 /* Assumes: (a) header space already there, (b) caller holds lock */
1979 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
1980 uint chan, bool free_pkt)
1986 struct sk_buff *new;
1989 brcmf_dbg(TRACE, "Enter\n");
1991 frame = (u8 *) (pkt->data);
1993 /* Add alignment padding, allocate new packet if needed */
1994 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1996 if (skb_headroom(pkt) < pad) {
1997 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
1998 skb_headroom(pkt), pad);
1999 bus->sdiodev->bus_if->tx_realloc++;
2000 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
2002 brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
2003 pkt->len + BRCMF_SDALIGN);
2008 pkt_align(new, pkt->len, BRCMF_SDALIGN);
2009 memcpy(new->data, pkt->data, pkt->len);
2011 brcmu_pkt_buf_free_skb(pkt);
2012 /* free the pkt if canned one is not used */
2015 frame = (u8 *) (pkt->data);
2016 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
2020 frame = (u8 *) (pkt->data);
2021 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
2022 memset(frame, 0, pad + SDPCM_HDRLEN);
2025 /* precondition: pad < BRCMF_SDALIGN */
2027 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2028 len = (u16) (pkt->len);
2029 *(__le16 *) frame = cpu_to_le16(len);
2030 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
2032 /* Software tag: channel, sequence number, data offset */
2034 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
2036 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
2038 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2039 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2042 tx_packets[pkt->priority]++;
2045 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
2046 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2047 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)),
2048 frame, len, "Tx Frame:\n");
2049 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
2051 chan == SDPCM_CONTROL_CHANNEL) ||
2053 chan != SDPCM_CONTROL_CHANNEL))) &&
2055 frame, min_t(u16, len, 16), "TxHdr:\n");
2057 /* Raise len to next SDIO block to eliminate tail command */
2058 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2059 u16 pad = bus->blocksize - (len % bus->blocksize);
2060 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2062 } else if (len % BRCMF_SDALIGN) {
2063 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2066 /* Some controllers have trouble with odd bytes -- round to even */
2067 if (len & (ALIGNMENT - 1))
2068 len = roundup(len, ALIGNMENT);
2070 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2071 SDIO_FUNC_2, F2SYNC, pkt);
2072 bus->sdcnt.f2txdata++;
2075 /* On failure, abort the command and terminate the frame */
2076 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2078 bus->sdcnt.tx_sderrs++;
2080 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2081 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2083 bus->sdcnt.f1regdata++;
2085 for (i = 0; i < 3; i++) {
2087 hi = brcmf_sdio_regrb(bus->sdiodev,
2088 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2089 lo = brcmf_sdio_regrb(bus->sdiodev,
2090 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2091 bus->sdcnt.f1regdata += 2;
2092 if ((hi == 0) && (lo == 0))
2098 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2101 /* restore pkt buffer pointer before calling tx complete routine */
2102 skb_pull(pkt, SDPCM_HDRLEN + pad);
2104 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0);
2108 brcmu_pkt_buf_free_skb(pkt);
2113 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2115 struct sk_buff *pkt;
2117 int ret = 0, prec_out;
2122 brcmf_dbg(TRACE, "Enter\n");
2124 tx_prec_map = ~bus->flowcontrol;
2126 /* Send frames until the limit or some other event */
2127 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
2128 spin_lock_bh(&bus->txqlock);
2129 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
2131 spin_unlock_bh(&bus->txqlock);
2134 spin_unlock_bh(&bus->txqlock);
2135 datalen = pkt->len - SDPCM_HDRLEN;
2137 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
2139 bus->sdiodev->bus_if->dstats.tx_errors++;
2141 bus->sdiodev->bus_if->dstats.tx_bytes += datalen;
2143 /* In poll mode, need to check for other events */
2144 if (!bus->intr && cnt) {
2145 /* Check device status, signal pending interrupt */
2146 ret = r_sdreg32(bus, &intstatus,
2147 offsetof(struct sdpcmd_regs,
2149 bus->sdcnt.f2txdata++;
2152 if (intstatus & bus->hostintmask)
2153 atomic_set(&bus->ipend, 1);
2157 /* Deflow-control stack if needed */
2158 if (bus->sdiodev->bus_if->drvr_up &&
2159 (bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2160 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2162 brcmf_txflowblock(bus->sdiodev->dev, false);
2168 static void brcmf_sdbrcm_bus_stop(struct device *dev)
2170 u32 local_hostintmask;
2173 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2174 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2175 struct brcmf_sdio *bus = sdiodev->bus;
2177 brcmf_dbg(TRACE, "Enter\n");
2179 if (bus->watchdog_tsk) {
2180 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2181 kthread_stop(bus->watchdog_tsk);
2182 bus->watchdog_tsk = NULL;
2187 /* Enable clock for device interrupts */
2188 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2190 /* Disable and clear interrupts at the chip level also */
2191 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2192 local_hostintmask = bus->hostintmask;
2193 bus->hostintmask = 0;
2195 /* Change our idea of bus state */
2196 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2198 /* Force clocks on backplane to be sure F2 interrupt propagates */
2199 saveclk = brcmf_sdio_regrb(bus->sdiodev,
2200 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2202 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2203 (saveclk | SBSDIO_FORCE_HT), &err);
2206 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
2208 /* Turn off the bus (F2), free any pending packets */
2209 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2210 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
2213 /* Clear any pending interrupts now that F2 is disabled */
2214 w_sdreg32(bus, local_hostintmask,
2215 offsetof(struct sdpcmd_regs, intstatus));
2217 /* Turn off the backplane clock (only) */
2218 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2220 /* Clear the data packet queues */
2221 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2223 /* Clear any held glomming stuff */
2225 brcmu_pkt_buf_free_skb(bus->glomd);
2226 brcmf_sdbrcm_free_glom(bus);
2228 /* Clear rx control and wake any waiters */
2230 brcmf_sdbrcm_dcmd_resp_wake(bus);
2232 /* Reset some F2 state stuff */
2233 bus->rxskip = false;
2234 bus->tx_seq = bus->rx_seq = 0;
2239 #ifdef CONFIG_BRCMFMAC_SDIO_OOB
2240 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2242 unsigned long flags;
2244 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2245 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2246 enable_irq(bus->sdiodev->irq);
2247 bus->sdiodev->irq_en = true;
2249 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2252 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2255 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
2257 static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio *bus)
2259 struct list_head *new_hd;
2260 unsigned long flags;
2263 new_hd = kzalloc(sizeof(struct list_head), GFP_ATOMIC);
2265 new_hd = kzalloc(sizeof(struct list_head), GFP_KERNEL);
2269 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2270 list_add_tail(new_hd, &bus->dpc_tsklst);
2271 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2274 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2281 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2282 addr = bus->ci->c_inf[idx].base +
2283 offsetof(struct sdpcmd_regs, intstatus);
2285 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, false);
2286 bus->sdcnt.f1regdata++;
2290 val &= bus->hostintmask;
2291 atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2293 /* Clear interrupts */
2295 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, true);
2296 bus->sdcnt.f1regdata++;
2300 atomic_set(&bus->intstatus, 0);
2302 for_each_set_bit(n, &val, 32)
2303 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2309 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2312 unsigned long intstatus;
2313 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2314 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2315 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2316 bool rxdone = true; /* Flag for no more read data */
2319 brcmf_dbg(TRACE, "Enter\n");
2323 /* If waiting for HTAVAIL, check status */
2324 if (bus->clkstate == CLK_PENDING) {
2325 u8 clkctl, devctl = 0;
2328 /* Check for inconsistent device control */
2329 devctl = brcmf_sdio_regrb(bus->sdiodev,
2330 SBSDIO_DEVICE_CTL, &err);
2332 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
2333 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2337 /* Read CSR, if clock on switch to AVAIL, else ignore */
2338 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2339 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2341 brcmf_dbg(ERROR, "error reading CSR: %d\n",
2343 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2346 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2349 if (SBSDIO_HTAV(clkctl)) {
2350 devctl = brcmf_sdio_regrb(bus->sdiodev,
2351 SBSDIO_DEVICE_CTL, &err);
2353 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
2355 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2357 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2358 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2361 brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
2363 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2365 bus->clkstate = CLK_AVAIL;
2369 /* Make sure backplane clock is on */
2370 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2372 /* Pending interrupt indicates new device status */
2373 if (atomic_read(&bus->ipend) > 0) {
2374 atomic_set(&bus->ipend, 0);
2375 sdio_claim_host(bus->sdiodev->func[1]);
2376 err = brcmf_sdio_intr_rstatus(bus);
2377 sdio_release_host(bus->sdiodev->func[1]);
2380 /* Start with leftover status bits */
2381 intstatus = atomic_xchg(&bus->intstatus, 0);
2383 /* Handle flow-control change: read new state in case our ack
2384 * crossed another change interrupt. If change still set, assume
2385 * FC ON for safety, let next loop through do the debounce.
2387 if (intstatus & I_HMB_FC_CHANGE) {
2388 intstatus &= ~I_HMB_FC_CHANGE;
2389 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2390 offsetof(struct sdpcmd_regs, intstatus));
2392 err = r_sdreg32(bus, &newstatus,
2393 offsetof(struct sdpcmd_regs, intstatus));
2394 bus->sdcnt.f1regdata += 2;
2395 atomic_set(&bus->fcstate,
2396 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2397 intstatus |= (newstatus & bus->hostintmask);
2400 /* Handle host mailbox indication */
2401 if (intstatus & I_HMB_HOST_INT) {
2402 intstatus &= ~I_HMB_HOST_INT;
2403 intstatus |= brcmf_sdbrcm_hostmail(bus);
2406 /* Generally don't ask for these, can get CRC errors... */
2407 if (intstatus & I_WR_OOSYNC) {
2408 brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n");
2409 intstatus &= ~I_WR_OOSYNC;
2412 if (intstatus & I_RD_OOSYNC) {
2413 brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n");
2414 intstatus &= ~I_RD_OOSYNC;
2417 if (intstatus & I_SBINT) {
2418 brcmf_dbg(ERROR, "Dongle reports SBINT\n");
2419 intstatus &= ~I_SBINT;
2422 /* Would be active due to wake-wlan in gSPI */
2423 if (intstatus & I_CHIPACTIVE) {
2424 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2425 intstatus &= ~I_CHIPACTIVE;
2428 /* Ignore frame indications if rxskip is set */
2430 intstatus &= ~I_HMB_FRAME_IND;
2432 /* On frame indication, read available frames */
2433 if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2434 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
2435 if (rxdone || bus->rxskip)
2436 intstatus &= ~I_HMB_FRAME_IND;
2437 rxlimit -= min(framecnt, rxlimit);
2440 /* Keep still-pending events for next scheduling */
2442 for_each_set_bit(n, &intstatus, 32)
2443 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2446 brcmf_sdbrcm_clrintr(bus);
2448 if (data_ok(bus) && bus->ctrl_frame_stat &&
2449 (bus->clkstate == CLK_AVAIL)) {
2452 err = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2453 SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2454 (u32) bus->ctrl_frame_len);
2457 /* On failure, abort the command and
2458 terminate the frame */
2459 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2461 bus->sdcnt.tx_sderrs++;
2463 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2465 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2467 bus->sdcnt.f1regdata++;
2469 for (i = 0; i < 3; i++) {
2471 hi = brcmf_sdio_regrb(bus->sdiodev,
2472 SBSDIO_FUNC1_WFRAMEBCHI,
2474 lo = brcmf_sdio_regrb(bus->sdiodev,
2475 SBSDIO_FUNC1_WFRAMEBCLO,
2477 bus->sdcnt.f1regdata += 2;
2478 if ((hi == 0) && (lo == 0))
2483 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2485 bus->ctrl_frame_stat = false;
2486 brcmf_sdbrcm_wait_event_wakeup(bus);
2488 /* Send queued frames (limit 1 if rx may still be pending) */
2489 else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2490 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2492 framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax);
2493 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2494 txlimit -= framecnt;
2497 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2498 brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation\n");
2499 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2500 atomic_set(&bus->intstatus, 0);
2501 } else if (atomic_read(&bus->intstatus) ||
2502 atomic_read(&bus->ipend) > 0 ||
2503 (!atomic_read(&bus->fcstate) &&
2504 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2505 data_ok(bus)) || PKT_AVAILABLE()) {
2506 brcmf_sdbrcm_adddpctsk(bus);
2509 /* If we're done for now, turn off clock request. */
2510 if ((bus->clkstate != CLK_PENDING)
2511 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2512 bus->activity = false;
2513 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2519 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2523 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2524 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2525 struct brcmf_sdio *bus = sdiodev->bus;
2526 unsigned long flags;
2528 brcmf_dbg(TRACE, "Enter\n");
2532 /* Add space for the header */
2533 skb_push(pkt, SDPCM_HDRLEN);
2534 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2536 prec = prio2prec((pkt->priority & PRIOMASK));
2538 /* Check for existing queue, current flow-control,
2539 pending event, or pending clock */
2540 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2541 bus->sdcnt.fcqueued++;
2543 /* Priority based enq */
2544 spin_lock_bh(&bus->txqlock);
2545 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2546 skb_pull(pkt, SDPCM_HDRLEN);
2547 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2548 brcmu_pkt_buf_free_skb(pkt);
2549 brcmf_dbg(ERROR, "out of bus->txq !!!\n");
2554 spin_unlock_bh(&bus->txqlock);
2556 if (pktq_len(&bus->txq) >= TXHI) {
2558 brcmf_txflowblock(bus->sdiodev->dev, true);
2562 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2563 qcount[prec] = pktq_plen(&bus->txq, prec);
2566 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2567 if (list_empty(&bus->dpc_tsklst)) {
2568 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2570 brcmf_sdbrcm_adddpctsk(bus);
2571 queue_work(bus->brcmf_wq, &bus->datawork);
2573 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2580 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2587 /* Determine initial transfer parameters */
2588 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2589 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2590 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2594 sdio_claim_host(bus->sdiodev->func[1]);
2596 /* Set the backplane window to include the start address */
2597 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2599 brcmf_dbg(ERROR, "window change failed\n");
2603 /* Do the transfer(s) */
2605 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2606 write ? "write" : "read", dsize,
2607 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2608 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2609 sdaddr, data, dsize);
2611 brcmf_dbg(ERROR, "membytes transfer failed\n");
2615 /* Adjust for next transfer (if any) */
2620 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2623 brcmf_dbg(ERROR, "window change failed\n");
2627 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2632 /* Return the window to backplane enumeration space for core access */
2633 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2634 brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n",
2635 bus->sdiodev->sbwad);
2637 sdio_release_host(bus->sdiodev->func[1]);
2643 #define CONSOLE_LINE_MAX 192
2645 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2647 struct brcmf_console *c = &bus->console;
2648 u8 line[CONSOLE_LINE_MAX], ch;
2652 /* Don't do anything until FWREADY updates console address */
2653 if (bus->console_addr == 0)
2656 /* Read console log struct */
2657 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2658 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2663 /* Allocate console buffer (one time only) */
2664 if (c->buf == NULL) {
2665 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2666 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2671 idx = le32_to_cpu(c->log_le.idx);
2673 /* Protect against corrupt value */
2674 if (idx > c->bufsize)
2677 /* Skip reading the console buffer if the index pointer
2682 /* Read the console buffer */
2683 addr = le32_to_cpu(c->log_le.buf);
2684 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2688 while (c->last != idx) {
2689 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2690 if (c->last == idx) {
2691 /* This would output a partial line.
2693 * the buffer pointer and output this
2694 * line next time around.
2699 c->last = c->bufsize - n;
2702 ch = c->buf[c->last];
2703 c->last = (c->last + 1) % c->bufsize;
2710 if (line[n - 1] == '\r')
2713 pr_debug("CONSOLE: %s\n", line);
2722 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2727 bus->ctrl_frame_stat = false;
2728 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2729 SDIO_FUNC_2, F2SYNC, frame, len);
2732 /* On failure, abort the command and terminate the frame */
2733 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2735 bus->sdcnt.tx_sderrs++;
2737 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2739 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2741 bus->sdcnt.f1regdata++;
2743 for (i = 0; i < 3; i++) {
2745 hi = brcmf_sdio_regrb(bus->sdiodev,
2746 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2747 lo = brcmf_sdio_regrb(bus->sdiodev,
2748 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2749 bus->sdcnt.f1regdata += 2;
2750 if (hi == 0 && lo == 0)
2756 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2762 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2770 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2771 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2772 struct brcmf_sdio *bus = sdiodev->bus;
2773 unsigned long flags;
2775 brcmf_dbg(TRACE, "Enter\n");
2777 /* Back the pointer to make a room for bus header */
2778 frame = msg - SDPCM_HDRLEN;
2779 len = (msglen += SDPCM_HDRLEN);
2781 /* Add alignment padding (optional for ctl frames) */
2782 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2787 memset(frame, 0, doff + SDPCM_HDRLEN);
2789 /* precondition: doff < BRCMF_SDALIGN */
2790 doff += SDPCM_HDRLEN;
2792 /* Round send length to next SDIO block */
2793 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2794 u16 pad = bus->blocksize - (len % bus->blocksize);
2795 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2797 } else if (len % BRCMF_SDALIGN) {
2798 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2801 /* Satisfy length-alignment requirements */
2802 if (len & (ALIGNMENT - 1))
2803 len = roundup(len, ALIGNMENT);
2805 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2807 /* Need to lock here to protect txseq and SDIO tx calls */
2810 /* Make sure backplane clock is on */
2811 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2813 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2814 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2815 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2817 /* Software tag: channel, sequence number, data offset */
2819 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2821 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2822 SDPCM_DOFFSET_MASK);
2823 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2824 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2826 if (!data_ok(bus)) {
2827 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2828 bus->tx_max, bus->tx_seq);
2829 bus->ctrl_frame_stat = true;
2831 bus->ctrl_frame_buf = frame;
2832 bus->ctrl_frame_len = len;
2834 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
2836 if (!bus->ctrl_frame_stat) {
2837 brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2840 brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2846 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2847 frame, len, "Tx Frame:\n");
2848 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2850 frame, min_t(u16, len, 16), "TxHdr:\n");
2853 ret = brcmf_tx_frame(bus, frame, len);
2854 } while (ret < 0 && retries++ < TXRETRIES);
2857 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2858 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2859 list_empty(&bus->dpc_tsklst)) {
2860 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2862 bus->activity = false;
2863 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2865 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2871 bus->sdcnt.tx_ctlerrs++;
2873 bus->sdcnt.tx_ctlpkts++;
2875 return ret ? -EIO : 0;
2879 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2881 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2884 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2885 struct sdpcm_shared *sh)
2890 struct sdpcm_shared_le sh_le;
2893 shaddr = bus->ramsize - 4;
2896 * Read last word in socram to determine
2897 * address of sdpcm_shared structure
2899 rv = brcmf_sdbrcm_membytes(bus, false, shaddr,
2904 addr = le32_to_cpu(addr_le);
2906 brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
2909 * Check if addr is valid.
2910 * NVRAM length at the end of memory should have been overwritten.
2912 if (!brcmf_sdio_valid_shared_address(addr)) {
2913 brcmf_dbg(ERROR, "invalid sdpcm_shared address 0x%08X\n",
2918 /* Read hndrte_shared structure */
2919 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&sh_le,
2920 sizeof(struct sdpcm_shared_le));
2925 sh->flags = le32_to_cpu(sh_le.flags);
2926 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2927 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2928 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2929 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2930 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2931 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2933 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) {
2935 "sdpcm_shared version mismatch: dhd %d dongle %d\n",
2936 SDPCM_SHARED_VERSION,
2937 sh->flags & SDPCM_SHARED_VERSION_MASK);
2944 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2945 struct sdpcm_shared *sh, char __user *data,
2948 u32 addr, console_ptr, console_size, console_index;
2949 char *conbuf = NULL;
2955 /* obtain console information from device memory */
2956 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2957 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2958 (u8 *)&sh_val, sizeof(u32));
2961 console_ptr = le32_to_cpu(sh_val);
2963 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2964 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2965 (u8 *)&sh_val, sizeof(u32));
2968 console_size = le32_to_cpu(sh_val);
2970 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2971 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2972 (u8 *)&sh_val, sizeof(u32));
2975 console_index = le32_to_cpu(sh_val);
2977 /* allocate buffer for console data */
2978 if (console_size <= CONSOLE_BUFFER_MAX)
2979 conbuf = vzalloc(console_size+1);
2984 /* obtain the console data from device */
2985 conbuf[console_size] = '\0';
2986 rv = brcmf_sdbrcm_membytes(bus, false, console_ptr, (u8 *)conbuf,
2991 rv = simple_read_from_buffer(data, count, &pos,
2992 conbuf + console_index,
2993 console_size - console_index);
2998 if (console_index > 0) {
3000 rv = simple_read_from_buffer(data+nbytes, count, &pos,
3001 conbuf, console_index - 1);
3011 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
3012 char __user *data, size_t count)
3016 struct brcmf_trap_info tr;
3020 if ((sh->flags & SDPCM_SHARED_TRAP) == 0)
3023 error = brcmf_sdbrcm_membytes(bus, false, sh->trap_addr, (u8 *)&tr,
3024 sizeof(struct brcmf_trap_info));
3028 nbytes = brcmf_sdio_dump_console(bus, sh, data, count);
3032 res = scnprintf(buf, sizeof(buf),
3033 "dongle trap info: type 0x%x @ epc 0x%08x\n"
3034 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3035 " lr 0x%08x pc 0x%08x offset 0x%x\n"
3036 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
3037 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
3038 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3039 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3040 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3041 le32_to_cpu(tr.pc), sh->trap_addr,
3042 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3043 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3044 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3045 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3047 error = simple_read_from_buffer(data+nbytes, count, &pos, buf, res);
3055 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
3056 struct sdpcm_shared *sh, char __user *data,
3061 char file[80] = "?";
3062 char expr[80] = "<???>";
3066 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3067 brcmf_dbg(INFO, "firmware not built with -assert\n");
3069 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3070 brcmf_dbg(INFO, "no assert in dongle\n");
3074 if (sh->assert_file_addr != 0) {
3075 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_file_addr,
3080 if (sh->assert_exp_addr != 0) {
3081 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_exp_addr,
3087 res = scnprintf(buf, sizeof(buf),
3088 "dongle assert: %s:%d: assert(%s)\n",
3089 file, sh->assert_line, expr);
3090 return simple_read_from_buffer(data, count, &pos, buf, res);
3093 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3096 struct sdpcm_shared sh;
3099 error = brcmf_sdio_readshared(bus, &sh);
3105 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3106 brcmf_dbg(INFO, "firmware not built with -assert\n");
3107 else if (sh.flags & SDPCM_SHARED_ASSERT)
3108 brcmf_dbg(ERROR, "assertion in dongle\n");
3110 if (sh.flags & SDPCM_SHARED_TRAP)
3111 brcmf_dbg(ERROR, "firmware trap in dongle\n");
3116 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
3117 size_t count, loff_t *ppos)
3120 struct sdpcm_shared sh;
3128 error = brcmf_sdio_readshared(bus, &sh);
3132 error = brcmf_sdio_assert_info(bus, &sh, data, count);
3137 error = brcmf_sdio_trap_info(bus, &sh, data, count);
3148 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3149 size_t count, loff_t *ppos)
3151 struct brcmf_sdio *bus = f->private_data;
3154 res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
3157 return (ssize_t)res;
3160 static const struct file_operations brcmf_sdio_forensic_ops = {
3161 .owner = THIS_MODULE,
3162 .open = simple_open,
3163 .read = brcmf_sdio_forensic_read
3166 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3168 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3169 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3171 if (IS_ERR_OR_NULL(dentry))
3174 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3175 &brcmf_sdio_forensic_ops);
3176 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3179 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3184 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3190 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3195 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3196 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3197 struct brcmf_sdio *bus = sdiodev->bus;
3199 brcmf_dbg(TRACE, "Enter\n");
3201 /* Wait until control frame is available */
3202 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3206 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3211 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3213 } else if (timeleft == 0) {
3214 brcmf_dbg(ERROR, "resumed on timeout\n");
3215 brcmf_sdbrcm_checkdied(bus);
3216 } else if (pending) {
3217 brcmf_dbg(CTL, "cancelled\n");
3218 return -ERESTARTSYS;
3220 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3221 brcmf_sdbrcm_checkdied(bus);
3225 bus->sdcnt.rx_ctlpkts++;
3227 bus->sdcnt.rx_ctlerrs++;
3229 return rxlen ? (int)rxlen : -ETIMEDOUT;
3232 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
3239 char *nvram_ularray;
3242 /* Even if there are no vars are to be written, we still
3243 need to set the ramsize. */
3244 varaddr = (bus->ramsize - 4) - bus->varsz;
3247 /* Write the vars list */
3248 bcmerror = brcmf_sdbrcm_membytes(bus, true, varaddr,
3249 bus->vars, bus->varsz);
3251 /* Verify NVRAM bytes */
3252 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n",
3254 nvram_ularray = kmalloc(bus->varsz, GFP_ATOMIC);
3258 /* Upload image to verify downloaded contents. */
3259 memset(nvram_ularray, 0xaa, bus->varsz);
3261 /* Read the vars list to temp buffer for comparison */
3262 bcmerror = brcmf_sdbrcm_membytes(bus, false, varaddr,
3263 nvram_ularray, bus->varsz);
3265 brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n",
3266 bcmerror, bus->varsz, varaddr);
3268 /* Compare the org NVRAM with the one read from RAM */
3269 if (memcmp(bus->vars, nvram_ularray, bus->varsz))
3270 brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n");
3272 brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n");
3274 kfree(nvram_ularray);
3278 /* adjust to the user specified RAM */
3279 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3280 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3281 varaddr, bus->varsz);
3284 * Determine the length token:
3285 * Varsize, converted to words, in lower 16-bits, checksum
3290 varsizew_le = cpu_to_le32(0);
3292 varsizew = bus->varsz / 4;
3293 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3294 varsizew_le = cpu_to_le32(varsizew);
3297 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3298 bus->varsz, varsizew);
3300 /* Write the length token to the last word */
3301 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3302 (u8 *)&varsizew_le, 4);
3307 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3310 struct chip_info *ci = bus->ci;
3312 /* To enter download state, disable ARM and reset SOCRAM.
3313 * To exit download state, simply reset ARM (default is RAM boot).
3316 bus->alp_only = true;
3318 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3320 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3322 /* Clear the top bit of memory */
3325 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3329 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3330 brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n");
3335 bcmerror = brcmf_sdbrcm_write_vars(bus);
3337 brcmf_dbg(ERROR, "no vars written to RAM\n");
3341 w_sdreg32(bus, 0xFFFFFFFF,
3342 offsetof(struct sdpcmd_regs, intstatus));
3344 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3346 /* Allow HT Clock now that the ARM is running. */
3347 bus->alp_only = false;
3349 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3355 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3357 if (bus->firmware->size < bus->fw_ptr + len)
3358 len = bus->firmware->size - bus->fw_ptr;
3360 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3365 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3369 u8 *memblock = NULL, *memptr;
3372 brcmf_dbg(INFO, "Enter\n");
3374 ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME,
3375 &bus->sdiodev->func[2]->dev);
3377 brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret);
3382 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3383 if (memblock == NULL) {
3387 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3388 memptr += (BRCMF_SDALIGN -
3389 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3391 /* Download image */
3393 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3394 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3396 brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n",
3397 ret, MEMBLOCK, offset);
3407 release_firmware(bus->firmware);
3414 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3415 * and ending in a NUL.
3416 * Removes carriage returns, empty lines, comment lines, and converts
3418 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3422 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus)
3429 uint buf_len, n, len;
3431 len = bus->firmware->size;
3432 varbuf = vmalloc(len);
3436 memcpy(varbuf, bus->firmware->data, len);
3439 findNewline = false;
3442 for (n = 0; n < len; n++) {
3445 if (varbuf[n] == '\r')
3447 if (findNewline && varbuf[n] != '\n')
3449 findNewline = false;
3450 if (varbuf[n] == '#') {
3454 if (varbuf[n] == '\n') {
3464 buf_len = dp - varbuf;
3465 while (dp < varbuf + n)
3469 /* roundup needed for download to device */
3470 bus->varsz = roundup(buf_len + 1, 4);
3471 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3472 if (bus->vars == NULL) {
3478 /* copy the processed variables and add null termination */
3479 memcpy(bus->vars, varbuf, buf_len);
3480 bus->vars[buf_len] = 0;
3486 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3490 if (bus->sdiodev->bus_if->drvr_up)
3493 ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME,
3494 &bus->sdiodev->func[2]->dev);
3496 brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret);
3500 ret = brcmf_process_nvram_vars(bus);
3502 release_firmware(bus->firmware);
3507 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3511 /* Keep arm in reset */
3512 if (brcmf_sdbrcm_download_state(bus, true)) {
3513 brcmf_dbg(ERROR, "error placing ARM core in reset\n");
3517 /* External image takes precedence if specified */
3518 if (brcmf_sdbrcm_download_code_file(bus)) {
3519 brcmf_dbg(ERROR, "dongle image file download failed\n");
3523 /* External nvram takes precedence if specified */
3524 if (brcmf_sdbrcm_download_nvram(bus))
3525 brcmf_dbg(ERROR, "dongle nvram file download failed\n");
3527 /* Take arm out of reset */
3528 if (brcmf_sdbrcm_download_state(bus, false)) {
3529 brcmf_dbg(ERROR, "error getting out of ARM core reset\n");
3540 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3544 /* Download the firmware */
3545 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3547 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3549 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3554 static int brcmf_sdbrcm_bus_init(struct device *dev)
3556 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3557 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3558 struct brcmf_sdio *bus = sdiodev->bus;
3559 unsigned long timeout;
3564 brcmf_dbg(TRACE, "Enter\n");
3566 /* try to download image and nvram to the dongle */
3567 if (bus_if->state == BRCMF_BUS_DOWN) {
3568 if (!(brcmf_sdbrcm_download_firmware(bus)))
3572 if (!bus->sdiodev->bus_if->drvr)
3575 /* Start the watchdog timer */
3576 bus->sdcnt.tickcnt = 0;
3577 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3581 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3582 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3583 if (bus->clkstate != CLK_AVAIL)
3586 /* Force clocks on backplane to be sure F2 interrupt propagates */
3587 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3588 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3590 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3591 (saveclk | SBSDIO_FORCE_HT), &err);
3594 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3598 /* Enable function 2 (frame transfers) */
3599 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3600 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3601 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3603 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3605 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3607 while (enable != ready) {
3608 ready = brcmf_sdio_regrb(bus->sdiodev,
3609 SDIO_CCCR_IORx, NULL);
3610 if (time_after(jiffies, timeout))
3612 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3613 /* prevent busy waiting if it takes too long */
3614 msleep_interruptible(20);
3617 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3619 /* If F2 successfully enabled, set core and enable interrupts */
3620 if (ready == enable) {
3621 /* Set up the interrupt mask and enable interrupts */
3622 bus->hostintmask = HOSTINTMASK;
3623 w_sdreg32(bus, bus->hostintmask,
3624 offsetof(struct sdpcmd_regs, hostintmask));
3626 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3628 /* Disable F2 again */
3629 enable = SDIO_FUNC_ENABLE_1;
3630 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3634 /* Restore previous clock setting */
3635 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3638 ret = brcmf_sdio_intr_register(bus->sdiodev);
3640 brcmf_dbg(ERROR, "intr register failed:%d\n", ret);
3643 /* If we didn't come up, turn off backplane clock */
3644 if (bus_if->state != BRCMF_BUS_DATA)
3645 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3653 void brcmf_sdbrcm_isr(void *arg)
3655 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3657 brcmf_dbg(TRACE, "Enter\n");
3660 brcmf_dbg(ERROR, "bus is null pointer, exiting\n");
3664 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3665 brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
3668 /* Count the interrupt call */
3669 bus->sdcnt.intrcount++;
3671 atomic_set(&bus->ipend, 1);
3673 if (brcmf_sdio_intr_rstatus(bus)) {
3674 brcmf_dbg(ERROR, "failed backplane access\n");
3675 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3678 /* Disable additional interrupts (is this needed now)? */
3680 brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");
3682 brcmf_sdbrcm_adddpctsk(bus);
3683 queue_work(bus->brcmf_wq, &bus->datawork);
3686 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3689 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3691 unsigned long flags;
3693 brcmf_dbg(TIMER, "Enter\n");
3697 /* Poll period: check device if appropriate. */
3698 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3701 /* Reset poll tick */
3704 /* Check device if no interrupts */
3706 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3708 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3709 if (list_empty(&bus->dpc_tsklst)) {
3711 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3713 devpend = brcmf_sdio_regrb(bus->sdiodev,
3717 devpend & (INTR_STATUS_FUNC1 |
3720 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3724 /* If there is something, make like the ISR and
3727 bus->sdcnt.pollcnt++;
3728 atomic_set(&bus->ipend, 1);
3730 brcmf_sdbrcm_adddpctsk(bus);
3731 queue_work(bus->brcmf_wq, &bus->datawork);
3735 /* Update interrupt tracking */
3736 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3739 /* Poll for console output periodically */
3740 if (bus_if->state == BRCMF_BUS_DATA &&
3741 bus->console_interval != 0) {
3742 bus->console.count += BRCMF_WD_POLL_MS;
3743 if (bus->console.count >= bus->console_interval) {
3744 bus->console.count -= bus->console_interval;
3745 /* Make sure backplane clock is on */
3746 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3747 if (brcmf_sdbrcm_readconsole(bus) < 0)
3749 bus->console_interval = 0;
3754 /* On idle timeout clear activity flag and/or turn off clock */
3755 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3756 if (++bus->idlecount >= bus->idletime) {
3758 if (bus->activity) {
3759 bus->activity = false;
3760 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3762 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3769 return (atomic_read(&bus->ipend) > 0);
3772 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3774 if (chipid == BCM43241_CHIP_ID)
3776 if (chipid == BCM4329_CHIP_ID)
3778 if (chipid == BCM4330_CHIP_ID)
3780 if (chipid == BCM4334_CHIP_ID)
3785 static void brcmf_sdio_dataworker(struct work_struct *work)
3787 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3789 struct list_head *cur_hd, *tmp_hd;
3790 unsigned long flags;
3792 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3793 list_for_each_safe(cur_hd, tmp_hd, &bus->dpc_tsklst) {
3794 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3796 brcmf_sdbrcm_dpc(bus);
3798 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3802 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3805 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3807 brcmf_dbg(TRACE, "Enter\n");
3810 bus->rxctl = bus->rxbuf = NULL;
3813 kfree(bus->databuf);
3814 bus->databuf = NULL;
3817 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3819 brcmf_dbg(TRACE, "Enter\n");
3821 if (bus->sdiodev->bus_if->maxctl) {
3823 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3824 ALIGNMENT) + BRCMF_SDALIGN;
3825 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3830 /* Allocate buffer to receive glomed packet */
3831 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3832 if (!(bus->databuf)) {
3833 /* release rxbuf which was already located as above */
3839 /* Align the buffer */
3840 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3841 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3842 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3844 bus->dataptr = bus->databuf;
3853 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3861 bus->alp_only = true;
3863 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3864 brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3867 * Force PLL off until brcmf_sdio_chip_attach()
3868 * programs PLL control regs
3871 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3872 BRCMF_INIT_CLKCTL1, &err);
3874 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3875 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3877 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3878 brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3879 err, BRCMF_INIT_CLKCTL1, clkctl);
3883 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3884 brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n");
3888 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3889 brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip);
3893 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3894 SDIO_DRIVE_STRENGTH);
3896 /* Get info on the SOCRAM cores... */
3897 bus->ramsize = bus->ci->ramsize;
3898 if (!(bus->ramsize)) {
3899 brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n");
3903 /* Set core control so an SDIO reset does a backplane reset */
3904 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3905 reg_addr = bus->ci->c_inf[idx].base +
3906 offsetof(struct sdpcmd_regs, corecontrol);
3907 reg_val = brcmf_sdio_regrl(bus->sdiodev, reg_addr, NULL);
3908 brcmf_sdio_regwl(bus->sdiodev, reg_addr, reg_val | CC_BPRESEN, NULL);
3910 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3912 /* Locate an appropriately-aligned portion of hdrbuf */
3913 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3916 /* Set the poll and/or interrupt flags */
3928 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3930 brcmf_dbg(TRACE, "Enter\n");
3932 /* Disable F2 to clear any intermediate frame state on the dongle */
3933 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3934 SDIO_FUNC_ENABLE_1, NULL);
3936 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3937 bus->rxflow = false;
3939 /* Done with backplane-dependent accesses, can drop clock... */
3940 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3942 /* ...and initialize clock/power states */
3943 bus->clkstate = CLK_SDONLY;
3944 bus->idletime = BRCMF_IDLE_INTERVAL;
3945 bus->idleclock = BRCMF_IDLE_ACTIVE;
3947 /* Query the F2 block size, set roundup accordingly */
3948 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3949 bus->roundup = min(max_roundup, bus->blocksize);
3951 /* bus module does not support packet chaining */
3952 bus->use_rxchain = false;
3953 bus->sd_rxchain = false;
3959 brcmf_sdbrcm_watchdog_thread(void *data)
3961 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3963 allow_signal(SIGTERM);
3964 /* Run until signal received */
3966 if (kthread_should_stop())
3968 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3969 brcmf_sdbrcm_bus_watchdog(bus);
3970 /* Count the tick for reference */
3971 bus->sdcnt.tickcnt++;
3979 brcmf_sdbrcm_watchdog(unsigned long data)
3981 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3983 if (bus->watchdog_tsk) {
3984 complete(&bus->watchdog_wait);
3985 /* Reschedule the watchdog */
3986 if (bus->wd_timer_valid)
3987 mod_timer(&bus->timer,
3988 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3992 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3994 brcmf_dbg(TRACE, "Enter\n");
3997 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3998 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3999 brcmf_sdio_chip_detach(&bus->ci);
4000 if (bus->vars && bus->varsz)
4005 brcmf_dbg(TRACE, "Disconnected\n");
4008 /* Detach and free everything */
4009 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
4011 brcmf_dbg(TRACE, "Enter\n");
4014 /* De-register interrupt handler */
4015 brcmf_sdio_intr_unregister(bus->sdiodev);
4017 cancel_work_sync(&bus->datawork);
4018 destroy_workqueue(bus->brcmf_wq);
4020 if (bus->sdiodev->bus_if->drvr) {
4021 brcmf_detach(bus->sdiodev->dev);
4022 brcmf_sdbrcm_release_dongle(bus);
4025 brcmf_sdbrcm_release_malloc(bus);
4030 brcmf_dbg(TRACE, "Disconnected\n");
4033 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
4036 struct brcmf_sdio *bus;
4037 struct brcmf_bus_dcmd *dlst;
4039 u32 dngl_txglomalign;
4042 brcmf_dbg(TRACE, "Enter\n");
4044 /* We make an assumption about address window mappings:
4045 * regsva == SI_ENUM_BASE*/
4047 /* Allocate private bus interface state */
4048 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4052 bus->sdiodev = sdiodev;
4054 skb_queue_head_init(&bus->glom);
4055 bus->txbound = BRCMF_TXBOUND;
4056 bus->rxbound = BRCMF_RXBOUND;
4057 bus->txminmax = BRCMF_TXMINMAX;
4058 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
4059 bus->usebufpool = false; /* Use bufpool if allocated,
4060 else use locally malloced rxbuf */
4062 /* attempt to attach to the dongle */
4063 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
4064 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n");
4068 spin_lock_init(&bus->txqlock);
4069 init_waitqueue_head(&bus->ctrl_wait);
4070 init_waitqueue_head(&bus->dcmd_resp_wait);
4072 bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
4073 if (bus->brcmf_wq == NULL) {
4074 brcmf_dbg(ERROR, "insufficient memory to create txworkqueue\n");
4077 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4079 /* Set up the watchdog timer */
4080 init_timer(&bus->timer);
4081 bus->timer.data = (unsigned long)bus;
4082 bus->timer.function = brcmf_sdbrcm_watchdog;
4084 /* Initialize thread based operation and lock */
4085 sema_init(&bus->sdsem, 1);
4087 /* Initialize watchdog thread */
4088 init_completion(&bus->watchdog_wait);
4089 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
4090 bus, "brcmf_watchdog");
4091 if (IS_ERR(bus->watchdog_tsk)) {
4092 pr_warn("brcmf_watchdog thread failed to start\n");
4093 bus->watchdog_tsk = NULL;
4095 /* Initialize DPC thread */
4096 INIT_LIST_HEAD(&bus->dpc_tsklst);
4097 spin_lock_init(&bus->dpc_tl_lock);
4099 /* Assign bus interface call back */
4100 bus->sdiodev->bus_if->brcmf_bus_stop = brcmf_sdbrcm_bus_stop;
4101 bus->sdiodev->bus_if->brcmf_bus_init = brcmf_sdbrcm_bus_init;
4102 bus->sdiodev->bus_if->brcmf_bus_txdata = brcmf_sdbrcm_bus_txdata;
4103 bus->sdiodev->bus_if->brcmf_bus_txctl = brcmf_sdbrcm_bus_txctl;
4104 bus->sdiodev->bus_if->brcmf_bus_rxctl = brcmf_sdbrcm_bus_rxctl;
4105 /* Attach to the brcmf/OS/network interface */
4106 ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
4108 brcmf_dbg(ERROR, "brcmf_attach failed\n");
4112 /* Allocate buffers */
4113 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
4114 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n");
4118 if (!(brcmf_sdbrcm_probe_init(bus))) {
4119 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n");
4123 brcmf_sdio_debugfs_create(bus);
4124 brcmf_dbg(INFO, "completed!!\n");
4126 /* sdio bus core specific dcmd */
4127 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
4128 dlst = kzalloc(sizeof(struct brcmf_bus_dcmd), GFP_KERNEL);
4130 if (bus->ci->c_inf[idx].rev < 12) {
4131 /* for sdio core rev < 12, disable txgloming */
4133 dlst->name = "bus:txglom";
4134 dlst->param = (char *)&dngl_txglom;
4135 dlst->param_len = sizeof(u32);
4137 /* otherwise, set txglomalign */
4138 dngl_txglomalign = bus->sdiodev->bus_if->align;
4139 dlst->name = "bus:txglomalign";
4140 dlst->param = (char *)&dngl_txglomalign;
4141 dlst->param_len = sizeof(u32);
4143 list_add(&dlst->list, &bus->sdiodev->bus_if->dcmd_list);
4146 /* if firmware path present try to download and bring up bus */
4147 ret = brcmf_bus_start(bus->sdiodev->dev);
4149 if (ret == -ENOLINK) {
4150 brcmf_dbg(ERROR, "dongle is not responding\n");
4158 brcmf_sdbrcm_release(bus);
4162 void brcmf_sdbrcm_disconnect(void *ptr)
4164 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4166 brcmf_dbg(TRACE, "Enter\n");
4169 brcmf_sdbrcm_release(bus);
4171 brcmf_dbg(TRACE, "Disconnected\n");
4175 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4177 /* Totally stop the timer */
4178 if (!wdtick && bus->wd_timer_valid) {
4179 del_timer_sync(&bus->timer);
4180 bus->wd_timer_valid = false;
4181 bus->save_ms = wdtick;
4185 /* don't start the wd until fw is loaded */
4186 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4190 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4191 if (bus->wd_timer_valid)
4192 /* Stop timer and restart at new value */
4193 del_timer_sync(&bus->timer);
4195 /* Create timer again when watchdog period is
4196 dynamically changed or in the first instance
4198 bus->timer.expires =
4199 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4200 add_timer(&bus->timer);
4203 /* Re arm the timer, at last watchdog period */
4204 mod_timer(&bus->timer,
4205 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4208 bus->wd_timer_valid = true;
4209 bus->save_ms = wdtick;
projects / linux-2.6-block.git / blob