ath9k: Use atomic reference count for interrupt ops
[linux-2.6-block.git] / drivers / net / wireless / ath / ath9k / recv.c
1 /*
2  * Copyright (c) 2008-2011 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/dma-mapping.h>
18 #include "ath9k.h"
19 #include "ar9003_mac.h"
20
21 #define SKB_CB_ATHBUF(__skb)    (*((struct ath_buf **)__skb->cb))
22
23 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
24                                                int mindelta, int main_rssi_avg,
25                                                int alt_rssi_avg, int pkt_count)
26 {
27         return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
28                 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
29                 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
30 }
31
32 static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
33                                         int curr_main_set, int curr_alt_set,
34                                         int alt_rssi_avg, int main_rssi_avg)
35 {
36         bool result = false;
37         switch (div_group) {
38         case 0:
39                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
40                         result = true;
41                 break;
42         case 1:
43         case 2:
44                 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
45                         (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
46                                 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
47                         ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
48                         (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
49                                 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
50                                                         (alt_rssi_avg >= 4))
51                         result = true;
52                 else
53                         result = false;
54                 break;
55         }
56
57         return result;
58 }
59
60 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
61 {
62         return sc->ps_enabled &&
63                (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
64 }
65
66 /*
67  * Setup and link descriptors.
68  *
69  * 11N: we can no longer afford to self link the last descriptor.
70  * MAC acknowledges BA status as long as it copies frames to host
71  * buffer (or rx fifo). This can incorrectly acknowledge packets
72  * to a sender if last desc is self-linked.
73  */
74 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
75 {
76         struct ath_hw *ah = sc->sc_ah;
77         struct ath_common *common = ath9k_hw_common(ah);
78         struct ath_desc *ds;
79         struct sk_buff *skb;
80
81         ATH_RXBUF_RESET(bf);
82
83         ds = bf->bf_desc;
84         ds->ds_link = 0; /* link to null */
85         ds->ds_data = bf->bf_buf_addr;
86
87         /* virtual addr of the beginning of the buffer. */
88         skb = bf->bf_mpdu;
89         BUG_ON(skb == NULL);
90         ds->ds_vdata = skb->data;
91
92         /*
93          * setup rx descriptors. The rx_bufsize here tells the hardware
94          * how much data it can DMA to us and that we are prepared
95          * to process
96          */
97         ath9k_hw_setuprxdesc(ah, ds,
98                              common->rx_bufsize,
99                              0);
100
101         if (sc->rx.rxlink == NULL)
102                 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
103         else
104                 *sc->rx.rxlink = bf->bf_daddr;
105
106         sc->rx.rxlink = &ds->ds_link;
107 }
108
109 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
110 {
111         /* XXX block beacon interrupts */
112         ath9k_hw_setantenna(sc->sc_ah, antenna);
113         sc->rx.defant = antenna;
114         sc->rx.rxotherant = 0;
115 }
116
117 static void ath_opmode_init(struct ath_softc *sc)
118 {
119         struct ath_hw *ah = sc->sc_ah;
120         struct ath_common *common = ath9k_hw_common(ah);
121
122         u32 rfilt, mfilt[2];
123
124         /* configure rx filter */
125         rfilt = ath_calcrxfilter(sc);
126         ath9k_hw_setrxfilter(ah, rfilt);
127
128         /* configure bssid mask */
129         ath_hw_setbssidmask(common);
130
131         /* configure operational mode */
132         ath9k_hw_setopmode(ah);
133
134         /* calculate and install multicast filter */
135         mfilt[0] = mfilt[1] = ~0;
136         ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
137 }
138
139 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
140                                  enum ath9k_rx_qtype qtype)
141 {
142         struct ath_hw *ah = sc->sc_ah;
143         struct ath_rx_edma *rx_edma;
144         struct sk_buff *skb;
145         struct ath_buf *bf;
146
147         rx_edma = &sc->rx.rx_edma[qtype];
148         if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
149                 return false;
150
151         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
152         list_del_init(&bf->list);
153
154         skb = bf->bf_mpdu;
155
156         ATH_RXBUF_RESET(bf);
157         memset(skb->data, 0, ah->caps.rx_status_len);
158         dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
159                                 ah->caps.rx_status_len, DMA_TO_DEVICE);
160
161         SKB_CB_ATHBUF(skb) = bf;
162         ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
163         skb_queue_tail(&rx_edma->rx_fifo, skb);
164
165         return true;
166 }
167
168 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
169                                   enum ath9k_rx_qtype qtype, int size)
170 {
171         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
172         u32 nbuf = 0;
173
174         if (list_empty(&sc->rx.rxbuf)) {
175                 ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
176                 return;
177         }
178
179         while (!list_empty(&sc->rx.rxbuf)) {
180                 nbuf++;
181
182                 if (!ath_rx_edma_buf_link(sc, qtype))
183                         break;
184
185                 if (nbuf >= size)
186                         break;
187         }
188 }
189
190 static void ath_rx_remove_buffer(struct ath_softc *sc,
191                                  enum ath9k_rx_qtype qtype)
192 {
193         struct ath_buf *bf;
194         struct ath_rx_edma *rx_edma;
195         struct sk_buff *skb;
196
197         rx_edma = &sc->rx.rx_edma[qtype];
198
199         while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
200                 bf = SKB_CB_ATHBUF(skb);
201                 BUG_ON(!bf);
202                 list_add_tail(&bf->list, &sc->rx.rxbuf);
203         }
204 }
205
206 static void ath_rx_edma_cleanup(struct ath_softc *sc)
207 {
208         struct ath_buf *bf;
209
210         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
211         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
212
213         list_for_each_entry(bf, &sc->rx.rxbuf, list) {
214                 if (bf->bf_mpdu)
215                         dev_kfree_skb_any(bf->bf_mpdu);
216         }
217
218         INIT_LIST_HEAD(&sc->rx.rxbuf);
219
220         kfree(sc->rx.rx_bufptr);
221         sc->rx.rx_bufptr = NULL;
222 }
223
224 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
225 {
226         skb_queue_head_init(&rx_edma->rx_fifo);
227         skb_queue_head_init(&rx_edma->rx_buffers);
228         rx_edma->rx_fifo_hwsize = size;
229 }
230
231 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
232 {
233         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
234         struct ath_hw *ah = sc->sc_ah;
235         struct sk_buff *skb;
236         struct ath_buf *bf;
237         int error = 0, i;
238         u32 size;
239
240         ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
241                                     ah->caps.rx_status_len);
242
243         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
244                                ah->caps.rx_lp_qdepth);
245         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
246                                ah->caps.rx_hp_qdepth);
247
248         size = sizeof(struct ath_buf) * nbufs;
249         bf = kzalloc(size, GFP_KERNEL);
250         if (!bf)
251                 return -ENOMEM;
252
253         INIT_LIST_HEAD(&sc->rx.rxbuf);
254         sc->rx.rx_bufptr = bf;
255
256         for (i = 0; i < nbufs; i++, bf++) {
257                 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
258                 if (!skb) {
259                         error = -ENOMEM;
260                         goto rx_init_fail;
261                 }
262
263                 memset(skb->data, 0, common->rx_bufsize);
264                 bf->bf_mpdu = skb;
265
266                 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
267                                                  common->rx_bufsize,
268                                                  DMA_BIDIRECTIONAL);
269                 if (unlikely(dma_mapping_error(sc->dev,
270                                                 bf->bf_buf_addr))) {
271                                 dev_kfree_skb_any(skb);
272                                 bf->bf_mpdu = NULL;
273                                 bf->bf_buf_addr = 0;
274                                 ath_err(common,
275                                         "dma_mapping_error() on RX init\n");
276                                 error = -ENOMEM;
277                                 goto rx_init_fail;
278                 }
279
280                 list_add_tail(&bf->list, &sc->rx.rxbuf);
281         }
282
283         return 0;
284
285 rx_init_fail:
286         ath_rx_edma_cleanup(sc);
287         return error;
288 }
289
290 static void ath_edma_start_recv(struct ath_softc *sc)
291 {
292         spin_lock_bh(&sc->rx.rxbuflock);
293
294         ath9k_hw_rxena(sc->sc_ah);
295
296         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
297                               sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
298
299         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
300                               sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
301
302         ath_opmode_init(sc);
303
304         ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
305
306         spin_unlock_bh(&sc->rx.rxbuflock);
307 }
308
309 static void ath_edma_stop_recv(struct ath_softc *sc)
310 {
311         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
312         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
313 }
314
315 int ath_rx_init(struct ath_softc *sc, int nbufs)
316 {
317         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
318         struct sk_buff *skb;
319         struct ath_buf *bf;
320         int error = 0;
321
322         spin_lock_init(&sc->sc_pcu_lock);
323         sc->sc_flags &= ~SC_OP_RXFLUSH;
324         spin_lock_init(&sc->rx.rxbuflock);
325
326         common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
327                              sc->sc_ah->caps.rx_status_len;
328
329         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
330                 return ath_rx_edma_init(sc, nbufs);
331         } else {
332                 ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
333                         common->cachelsz, common->rx_bufsize);
334
335                 /* Initialize rx descriptors */
336
337                 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
338                                 "rx", nbufs, 1, 0);
339                 if (error != 0) {
340                         ath_err(common,
341                                 "failed to allocate rx descriptors: %d\n",
342                                 error);
343                         goto err;
344                 }
345
346                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
347                         skb = ath_rxbuf_alloc(common, common->rx_bufsize,
348                                               GFP_KERNEL);
349                         if (skb == NULL) {
350                                 error = -ENOMEM;
351                                 goto err;
352                         }
353
354                         bf->bf_mpdu = skb;
355                         bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
356                                         common->rx_bufsize,
357                                         DMA_FROM_DEVICE);
358                         if (unlikely(dma_mapping_error(sc->dev,
359                                                         bf->bf_buf_addr))) {
360                                 dev_kfree_skb_any(skb);
361                                 bf->bf_mpdu = NULL;
362                                 bf->bf_buf_addr = 0;
363                                 ath_err(common,
364                                         "dma_mapping_error() on RX init\n");
365                                 error = -ENOMEM;
366                                 goto err;
367                         }
368                 }
369                 sc->rx.rxlink = NULL;
370         }
371
372 err:
373         if (error)
374                 ath_rx_cleanup(sc);
375
376         return error;
377 }
378
379 void ath_rx_cleanup(struct ath_softc *sc)
380 {
381         struct ath_hw *ah = sc->sc_ah;
382         struct ath_common *common = ath9k_hw_common(ah);
383         struct sk_buff *skb;
384         struct ath_buf *bf;
385
386         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
387                 ath_rx_edma_cleanup(sc);
388                 return;
389         } else {
390                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
391                         skb = bf->bf_mpdu;
392                         if (skb) {
393                                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
394                                                 common->rx_bufsize,
395                                                 DMA_FROM_DEVICE);
396                                 dev_kfree_skb(skb);
397                                 bf->bf_buf_addr = 0;
398                                 bf->bf_mpdu = NULL;
399                         }
400                 }
401
402                 if (sc->rx.rxdma.dd_desc_len != 0)
403                         ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
404         }
405 }
406
407 /*
408  * Calculate the receive filter according to the
409  * operating mode and state:
410  *
411  * o always accept unicast, broadcast, and multicast traffic
412  * o maintain current state of phy error reception (the hal
413  *   may enable phy error frames for noise immunity work)
414  * o probe request frames are accepted only when operating in
415  *   hostap, adhoc, or monitor modes
416  * o enable promiscuous mode according to the interface state
417  * o accept beacons:
418  *   - when operating in adhoc mode so the 802.11 layer creates
419  *     node table entries for peers,
420  *   - when operating in station mode for collecting rssi data when
421  *     the station is otherwise quiet, or
422  *   - when operating as a repeater so we see repeater-sta beacons
423  *   - when scanning
424  */
425
426 u32 ath_calcrxfilter(struct ath_softc *sc)
427 {
428 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
429
430         u32 rfilt;
431
432         rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
433                 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
434                 | ATH9K_RX_FILTER_MCAST;
435
436         if (sc->rx.rxfilter & FIF_PROBE_REQ)
437                 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
438
439         /*
440          * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
441          * mode interface or when in monitor mode. AP mode does not need this
442          * since it receives all in-BSS frames anyway.
443          */
444         if (sc->sc_ah->is_monitoring)
445                 rfilt |= ATH9K_RX_FILTER_PROM;
446
447         if (sc->rx.rxfilter & FIF_CONTROL)
448                 rfilt |= ATH9K_RX_FILTER_CONTROL;
449
450         if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
451             (sc->nvifs <= 1) &&
452             !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
453                 rfilt |= ATH9K_RX_FILTER_MYBEACON;
454         else
455                 rfilt |= ATH9K_RX_FILTER_BEACON;
456
457         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
458             (sc->rx.rxfilter & FIF_PSPOLL))
459                 rfilt |= ATH9K_RX_FILTER_PSPOLL;
460
461         if (conf_is_ht(&sc->hw->conf))
462                 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
463
464         if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
465                 /* The following may also be needed for other older chips */
466                 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
467                         rfilt |= ATH9K_RX_FILTER_PROM;
468                 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
469         }
470
471         return rfilt;
472
473 #undef RX_FILTER_PRESERVE
474 }
475
476 int ath_startrecv(struct ath_softc *sc)
477 {
478         struct ath_hw *ah = sc->sc_ah;
479         struct ath_buf *bf, *tbf;
480
481         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
482                 ath_edma_start_recv(sc);
483                 return 0;
484         }
485
486         spin_lock_bh(&sc->rx.rxbuflock);
487         if (list_empty(&sc->rx.rxbuf))
488                 goto start_recv;
489
490         sc->rx.rxlink = NULL;
491         list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
492                 ath_rx_buf_link(sc, bf);
493         }
494
495         /* We could have deleted elements so the list may be empty now */
496         if (list_empty(&sc->rx.rxbuf))
497                 goto start_recv;
498
499         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
500         ath9k_hw_putrxbuf(ah, bf->bf_daddr);
501         ath9k_hw_rxena(ah);
502
503 start_recv:
504         ath_opmode_init(sc);
505         ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
506
507         spin_unlock_bh(&sc->rx.rxbuflock);
508
509         return 0;
510 }
511
512 bool ath_stoprecv(struct ath_softc *sc)
513 {
514         struct ath_hw *ah = sc->sc_ah;
515         bool stopped, reset = false;
516
517         spin_lock_bh(&sc->rx.rxbuflock);
518         ath9k_hw_abortpcurecv(ah);
519         ath9k_hw_setrxfilter(ah, 0);
520         stopped = ath9k_hw_stopdmarecv(ah, &reset);
521
522         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
523                 ath_edma_stop_recv(sc);
524         else
525                 sc->rx.rxlink = NULL;
526         spin_unlock_bh(&sc->rx.rxbuflock);
527
528         if (!(ah->ah_flags & AH_UNPLUGGED) &&
529             unlikely(!stopped)) {
530                 ath_err(ath9k_hw_common(sc->sc_ah),
531                         "Could not stop RX, we could be "
532                         "confusing the DMA engine when we start RX up\n");
533                 ATH_DBG_WARN_ON_ONCE(!stopped);
534         }
535         return stopped && !reset;
536 }
537
538 void ath_flushrecv(struct ath_softc *sc)
539 {
540         sc->sc_flags |= SC_OP_RXFLUSH;
541         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
542                 ath_rx_tasklet(sc, 1, true);
543         ath_rx_tasklet(sc, 1, false);
544         sc->sc_flags &= ~SC_OP_RXFLUSH;
545 }
546
547 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
548 {
549         /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
550         struct ieee80211_mgmt *mgmt;
551         u8 *pos, *end, id, elen;
552         struct ieee80211_tim_ie *tim;
553
554         mgmt = (struct ieee80211_mgmt *)skb->data;
555         pos = mgmt->u.beacon.variable;
556         end = skb->data + skb->len;
557
558         while (pos + 2 < end) {
559                 id = *pos++;
560                 elen = *pos++;
561                 if (pos + elen > end)
562                         break;
563
564                 if (id == WLAN_EID_TIM) {
565                         if (elen < sizeof(*tim))
566                                 break;
567                         tim = (struct ieee80211_tim_ie *) pos;
568                         if (tim->dtim_count != 0)
569                                 break;
570                         return tim->bitmap_ctrl & 0x01;
571                 }
572
573                 pos += elen;
574         }
575
576         return false;
577 }
578
579 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
580 {
581         struct ieee80211_mgmt *mgmt;
582         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
583
584         if (skb->len < 24 + 8 + 2 + 2)
585                 return;
586
587         mgmt = (struct ieee80211_mgmt *)skb->data;
588         if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) {
589                 /* TODO:  This doesn't work well if you have stations
590                  * associated to two different APs because curbssid
591                  * is just the last AP that any of the stations associated
592                  * with.
593                  */
594                 return; /* not from our current AP */
595         }
596
597         sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
598
599         if (sc->ps_flags & PS_BEACON_SYNC) {
600                 sc->ps_flags &= ~PS_BEACON_SYNC;
601                 ath_dbg(common, ATH_DBG_PS,
602                         "Reconfigure Beacon timers based on timestamp from the AP\n");
603                 ath_set_beacon(sc);
604         }
605
606         if (ath_beacon_dtim_pending_cab(skb)) {
607                 /*
608                  * Remain awake waiting for buffered broadcast/multicast
609                  * frames. If the last broadcast/multicast frame is not
610                  * received properly, the next beacon frame will work as
611                  * a backup trigger for returning into NETWORK SLEEP state,
612                  * so we are waiting for it as well.
613                  */
614                 ath_dbg(common, ATH_DBG_PS,
615                         "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
616                 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
617                 return;
618         }
619
620         if (sc->ps_flags & PS_WAIT_FOR_CAB) {
621                 /*
622                  * This can happen if a broadcast frame is dropped or the AP
623                  * fails to send a frame indicating that all CAB frames have
624                  * been delivered.
625                  */
626                 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
627                 ath_dbg(common, ATH_DBG_PS,
628                         "PS wait for CAB frames timed out\n");
629         }
630 }
631
632 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
633 {
634         struct ieee80211_hdr *hdr;
635         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
636
637         hdr = (struct ieee80211_hdr *)skb->data;
638
639         /* Process Beacon and CAB receive in PS state */
640         if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
641             && ieee80211_is_beacon(hdr->frame_control))
642                 ath_rx_ps_beacon(sc, skb);
643         else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
644                  (ieee80211_is_data(hdr->frame_control) ||
645                   ieee80211_is_action(hdr->frame_control)) &&
646                  is_multicast_ether_addr(hdr->addr1) &&
647                  !ieee80211_has_moredata(hdr->frame_control)) {
648                 /*
649                  * No more broadcast/multicast frames to be received at this
650                  * point.
651                  */
652                 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
653                 ath_dbg(common, ATH_DBG_PS,
654                         "All PS CAB frames received, back to sleep\n");
655         } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
656                    !is_multicast_ether_addr(hdr->addr1) &&
657                    !ieee80211_has_morefrags(hdr->frame_control)) {
658                 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
659                 ath_dbg(common, ATH_DBG_PS,
660                         "Going back to sleep after having received PS-Poll data (0x%lx)\n",
661                         sc->ps_flags & (PS_WAIT_FOR_BEACON |
662                                         PS_WAIT_FOR_CAB |
663                                         PS_WAIT_FOR_PSPOLL_DATA |
664                                         PS_WAIT_FOR_TX_ACK));
665         }
666 }
667
668 static bool ath_edma_get_buffers(struct ath_softc *sc,
669                                  enum ath9k_rx_qtype qtype)
670 {
671         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
672         struct ath_hw *ah = sc->sc_ah;
673         struct ath_common *common = ath9k_hw_common(ah);
674         struct sk_buff *skb;
675         struct ath_buf *bf;
676         int ret;
677
678         skb = skb_peek(&rx_edma->rx_fifo);
679         if (!skb)
680                 return false;
681
682         bf = SKB_CB_ATHBUF(skb);
683         BUG_ON(!bf);
684
685         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
686                                 common->rx_bufsize, DMA_FROM_DEVICE);
687
688         ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
689         if (ret == -EINPROGRESS) {
690                 /*let device gain the buffer again*/
691                 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
692                                 common->rx_bufsize, DMA_FROM_DEVICE);
693                 return false;
694         }
695
696         __skb_unlink(skb, &rx_edma->rx_fifo);
697         if (ret == -EINVAL) {
698                 /* corrupt descriptor, skip this one and the following one */
699                 list_add_tail(&bf->list, &sc->rx.rxbuf);
700                 ath_rx_edma_buf_link(sc, qtype);
701                 skb = skb_peek(&rx_edma->rx_fifo);
702                 if (!skb)
703                         return true;
704
705                 bf = SKB_CB_ATHBUF(skb);
706                 BUG_ON(!bf);
707
708                 __skb_unlink(skb, &rx_edma->rx_fifo);
709                 list_add_tail(&bf->list, &sc->rx.rxbuf);
710                 ath_rx_edma_buf_link(sc, qtype);
711                 return true;
712         }
713         skb_queue_tail(&rx_edma->rx_buffers, skb);
714
715         return true;
716 }
717
718 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
719                                                 struct ath_rx_status *rs,
720                                                 enum ath9k_rx_qtype qtype)
721 {
722         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
723         struct sk_buff *skb;
724         struct ath_buf *bf;
725
726         while (ath_edma_get_buffers(sc, qtype));
727         skb = __skb_dequeue(&rx_edma->rx_buffers);
728         if (!skb)
729                 return NULL;
730
731         bf = SKB_CB_ATHBUF(skb);
732         ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
733         return bf;
734 }
735
736 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
737                                            struct ath_rx_status *rs)
738 {
739         struct ath_hw *ah = sc->sc_ah;
740         struct ath_common *common = ath9k_hw_common(ah);
741         struct ath_desc *ds;
742         struct ath_buf *bf;
743         int ret;
744
745         if (list_empty(&sc->rx.rxbuf)) {
746                 sc->rx.rxlink = NULL;
747                 return NULL;
748         }
749
750         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
751         ds = bf->bf_desc;
752
753         /*
754          * Must provide the virtual address of the current
755          * descriptor, the physical address, and the virtual
756          * address of the next descriptor in the h/w chain.
757          * This allows the HAL to look ahead to see if the
758          * hardware is done with a descriptor by checking the
759          * done bit in the following descriptor and the address
760          * of the current descriptor the DMA engine is working
761          * on.  All this is necessary because of our use of
762          * a self-linked list to avoid rx overruns.
763          */
764         ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
765         if (ret == -EINPROGRESS) {
766                 struct ath_rx_status trs;
767                 struct ath_buf *tbf;
768                 struct ath_desc *tds;
769
770                 memset(&trs, 0, sizeof(trs));
771                 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
772                         sc->rx.rxlink = NULL;
773                         return NULL;
774                 }
775
776                 tbf = list_entry(bf->list.next, struct ath_buf, list);
777
778                 /*
779                  * On some hardware the descriptor status words could
780                  * get corrupted, including the done bit. Because of
781                  * this, check if the next descriptor's done bit is
782                  * set or not.
783                  *
784                  * If the next descriptor's done bit is set, the current
785                  * descriptor has been corrupted. Force s/w to discard
786                  * this descriptor and continue...
787                  */
788
789                 tds = tbf->bf_desc;
790                 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
791                 if (ret == -EINPROGRESS)
792                         return NULL;
793         }
794
795         if (!bf->bf_mpdu)
796                 return bf;
797
798         /*
799          * Synchronize the DMA transfer with CPU before
800          * 1. accessing the frame
801          * 2. requeueing the same buffer to h/w
802          */
803         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
804                         common->rx_bufsize,
805                         DMA_FROM_DEVICE);
806
807         return bf;
808 }
809
810 /* Assumes you've already done the endian to CPU conversion */
811 static bool ath9k_rx_accept(struct ath_common *common,
812                             struct ieee80211_hdr *hdr,
813                             struct ieee80211_rx_status *rxs,
814                             struct ath_rx_status *rx_stats,
815                             bool *decrypt_error)
816 {
817         bool is_mc, is_valid_tkip, strip_mic, mic_error;
818         struct ath_hw *ah = common->ah;
819         __le16 fc;
820         u8 rx_status_len = ah->caps.rx_status_len;
821
822         fc = hdr->frame_control;
823
824         is_mc = !!is_multicast_ether_addr(hdr->addr1);
825         is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID &&
826                 test_bit(rx_stats->rs_keyix, common->tkip_keymap);
827         strip_mic = is_valid_tkip && !(rx_stats->rs_status &
828                 (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC));
829
830         if (!rx_stats->rs_datalen)
831                 return false;
832         /*
833          * rs_status follows rs_datalen so if rs_datalen is too large
834          * we can take a hint that hardware corrupted it, so ignore
835          * those frames.
836          */
837         if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
838                 return false;
839
840         /* Only use error bits from the last fragment */
841         if (rx_stats->rs_more)
842                 return true;
843
844         mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) &&
845                 !ieee80211_has_morefrags(fc) &&
846                 !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
847                 (rx_stats->rs_status & ATH9K_RXERR_MIC);
848
849         /*
850          * The rx_stats->rs_status will not be set until the end of the
851          * chained descriptors so it can be ignored if rs_more is set. The
852          * rs_more will be false at the last element of the chained
853          * descriptors.
854          */
855         if (rx_stats->rs_status != 0) {
856                 if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
857                         rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
858                         mic_error = false;
859                 }
860                 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
861                         return false;
862
863                 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
864                         *decrypt_error = true;
865                         mic_error = false;
866                 }
867
868                 /*
869                  * Reject error frames with the exception of
870                  * decryption and MIC failures. For monitor mode,
871                  * we also ignore the CRC error.
872                  */
873                 if (ah->is_monitoring) {
874                         if (rx_stats->rs_status &
875                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
876                               ATH9K_RXERR_CRC))
877                                 return false;
878                 } else {
879                         if (rx_stats->rs_status &
880                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
881                                 return false;
882                         }
883                 }
884         }
885
886         /*
887          * For unicast frames the MIC error bit can have false positives,
888          * so all MIC error reports need to be validated in software.
889          * False negatives are not common, so skip software verification
890          * if the hardware considers the MIC valid.
891          */
892         if (strip_mic)
893                 rxs->flag |= RX_FLAG_MMIC_STRIPPED;
894         else if (is_mc && mic_error)
895                 rxs->flag |= RX_FLAG_MMIC_ERROR;
896
897         return true;
898 }
899
900 static int ath9k_process_rate(struct ath_common *common,
901                               struct ieee80211_hw *hw,
902                               struct ath_rx_status *rx_stats,
903                               struct ieee80211_rx_status *rxs)
904 {
905         struct ieee80211_supported_band *sband;
906         enum ieee80211_band band;
907         unsigned int i = 0;
908
909         band = hw->conf.channel->band;
910         sband = hw->wiphy->bands[band];
911
912         if (rx_stats->rs_rate & 0x80) {
913                 /* HT rate */
914                 rxs->flag |= RX_FLAG_HT;
915                 if (rx_stats->rs_flags & ATH9K_RX_2040)
916                         rxs->flag |= RX_FLAG_40MHZ;
917                 if (rx_stats->rs_flags & ATH9K_RX_GI)
918                         rxs->flag |= RX_FLAG_SHORT_GI;
919                 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
920                 return 0;
921         }
922
923         for (i = 0; i < sband->n_bitrates; i++) {
924                 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
925                         rxs->rate_idx = i;
926                         return 0;
927                 }
928                 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
929                         rxs->flag |= RX_FLAG_SHORTPRE;
930                         rxs->rate_idx = i;
931                         return 0;
932                 }
933         }
934
935         /*
936          * No valid hardware bitrate found -- we should not get here
937          * because hardware has already validated this frame as OK.
938          */
939         ath_dbg(common, ATH_DBG_XMIT,
940                 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
941                 rx_stats->rs_rate);
942
943         return -EINVAL;
944 }
945
946 static void ath9k_process_rssi(struct ath_common *common,
947                                struct ieee80211_hw *hw,
948                                struct ieee80211_hdr *hdr,
949                                struct ath_rx_status *rx_stats)
950 {
951         struct ath_softc *sc = hw->priv;
952         struct ath_hw *ah = common->ah;
953         int last_rssi;
954         __le16 fc;
955
956         if ((ah->opmode != NL80211_IFTYPE_STATION) &&
957             (ah->opmode != NL80211_IFTYPE_ADHOC))
958                 return;
959
960         fc = hdr->frame_control;
961         if (!ieee80211_is_beacon(fc) ||
962             compare_ether_addr(hdr->addr3, common->curbssid)) {
963                 /* TODO:  This doesn't work well if you have stations
964                  * associated to two different APs because curbssid
965                  * is just the last AP that any of the stations associated
966                  * with.
967                  */
968                 return;
969         }
970
971         if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
972                 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
973
974         last_rssi = sc->last_rssi;
975         if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
976                 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
977                                               ATH_RSSI_EP_MULTIPLIER);
978         if (rx_stats->rs_rssi < 0)
979                 rx_stats->rs_rssi = 0;
980
981         /* Update Beacon RSSI, this is used by ANI. */
982         ah->stats.avgbrssi = rx_stats->rs_rssi;
983 }
984
985 /*
986  * For Decrypt or Demic errors, we only mark packet status here and always push
987  * up the frame up to let mac80211 handle the actual error case, be it no
988  * decryption key or real decryption error. This let us keep statistics there.
989  */
990 static int ath9k_rx_skb_preprocess(struct ath_common *common,
991                                    struct ieee80211_hw *hw,
992                                    struct ieee80211_hdr *hdr,
993                                    struct ath_rx_status *rx_stats,
994                                    struct ieee80211_rx_status *rx_status,
995                                    bool *decrypt_error)
996 {
997         struct ath_hw *ah = common->ah;
998
999         memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
1000
1001         /*
1002          * everything but the rate is checked here, the rate check is done
1003          * separately to avoid doing two lookups for a rate for each frame.
1004          */
1005         if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
1006                 return -EINVAL;
1007
1008         /* Only use status info from the last fragment */
1009         if (rx_stats->rs_more)
1010                 return 0;
1011
1012         ath9k_process_rssi(common, hw, hdr, rx_stats);
1013
1014         if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1015                 return -EINVAL;
1016
1017         rx_status->band = hw->conf.channel->band;
1018         rx_status->freq = hw->conf.channel->center_freq;
1019         rx_status->signal = ah->noise + rx_stats->rs_rssi;
1020         rx_status->antenna = rx_stats->rs_antenna;
1021         rx_status->flag |= RX_FLAG_MACTIME_MPDU;
1022
1023         return 0;
1024 }
1025
1026 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1027                                      struct sk_buff *skb,
1028                                      struct ath_rx_status *rx_stats,
1029                                      struct ieee80211_rx_status *rxs,
1030                                      bool decrypt_error)
1031 {
1032         struct ath_hw *ah = common->ah;
1033         struct ieee80211_hdr *hdr;
1034         int hdrlen, padpos, padsize;
1035         u8 keyix;
1036         __le16 fc;
1037
1038         /* see if any padding is done by the hw and remove it */
1039         hdr = (struct ieee80211_hdr *) skb->data;
1040         hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1041         fc = hdr->frame_control;
1042         padpos = ath9k_cmn_padpos(hdr->frame_control);
1043
1044         /* The MAC header is padded to have 32-bit boundary if the
1045          * packet payload is non-zero. The general calculation for
1046          * padsize would take into account odd header lengths:
1047          * padsize = (4 - padpos % 4) % 4; However, since only
1048          * even-length headers are used, padding can only be 0 or 2
1049          * bytes and we can optimize this a bit. In addition, we must
1050          * not try to remove padding from short control frames that do
1051          * not have payload. */
1052         padsize = padpos & 3;
1053         if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1054                 memmove(skb->data + padsize, skb->data, padpos);
1055                 skb_pull(skb, padsize);
1056         }
1057
1058         keyix = rx_stats->rs_keyix;
1059
1060         if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1061             ieee80211_has_protected(fc)) {
1062                 rxs->flag |= RX_FLAG_DECRYPTED;
1063         } else if (ieee80211_has_protected(fc)
1064                    && !decrypt_error && skb->len >= hdrlen + 4) {
1065                 keyix = skb->data[hdrlen + 3] >> 6;
1066
1067                 if (test_bit(keyix, common->keymap))
1068                         rxs->flag |= RX_FLAG_DECRYPTED;
1069         }
1070         if (ah->sw_mgmt_crypto &&
1071             (rxs->flag & RX_FLAG_DECRYPTED) &&
1072             ieee80211_is_mgmt(fc))
1073                 /* Use software decrypt for management frames. */
1074                 rxs->flag &= ~RX_FLAG_DECRYPTED;
1075 }
1076
1077 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1078                                       struct ath_hw_antcomb_conf ant_conf,
1079                                       int main_rssi_avg)
1080 {
1081         antcomb->quick_scan_cnt = 0;
1082
1083         if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1084                 antcomb->rssi_lna2 = main_rssi_avg;
1085         else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1086                 antcomb->rssi_lna1 = main_rssi_avg;
1087
1088         switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1089         case 0x10: /* LNA2 A-B */
1090                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1091                 antcomb->first_quick_scan_conf =
1092                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1093                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1094                 break;
1095         case 0x20: /* LNA1 A-B */
1096                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1097                 antcomb->first_quick_scan_conf =
1098                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1099                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1100                 break;
1101         case 0x21: /* LNA1 LNA2 */
1102                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1103                 antcomb->first_quick_scan_conf =
1104                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1105                 antcomb->second_quick_scan_conf =
1106                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1107                 break;
1108         case 0x12: /* LNA2 LNA1 */
1109                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1110                 antcomb->first_quick_scan_conf =
1111                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1112                 antcomb->second_quick_scan_conf =
1113                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1114                 break;
1115         case 0x13: /* LNA2 A+B */
1116                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1117                 antcomb->first_quick_scan_conf =
1118                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1119                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1120                 break;
1121         case 0x23: /* LNA1 A+B */
1122                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1123                 antcomb->first_quick_scan_conf =
1124                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1125                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1126                 break;
1127         default:
1128                 break;
1129         }
1130 }
1131
1132 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1133                                 struct ath_hw_antcomb_conf *div_ant_conf,
1134                                 int main_rssi_avg, int alt_rssi_avg,
1135                                 int alt_ratio)
1136 {
1137         /* alt_good */
1138         switch (antcomb->quick_scan_cnt) {
1139         case 0:
1140                 /* set alt to main, and alt to first conf */
1141                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1142                 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1143                 break;
1144         case 1:
1145                 /* set alt to main, and alt to first conf */
1146                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1147                 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1148                 antcomb->rssi_first = main_rssi_avg;
1149                 antcomb->rssi_second = alt_rssi_avg;
1150
1151                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1152                         /* main is LNA1 */
1153                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1154                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1155                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1156                                                 main_rssi_avg, alt_rssi_avg,
1157                                                 antcomb->total_pkt_count))
1158                                 antcomb->first_ratio = true;
1159                         else
1160                                 antcomb->first_ratio = false;
1161                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1162                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1163                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1164                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1165                                                 main_rssi_avg, alt_rssi_avg,
1166                                                 antcomb->total_pkt_count))
1167                                 antcomb->first_ratio = true;
1168                         else
1169                                 antcomb->first_ratio = false;
1170                 } else {
1171                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1172                             (alt_rssi_avg > main_rssi_avg +
1173                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1174                             (alt_rssi_avg > main_rssi_avg)) &&
1175                             (antcomb->total_pkt_count > 50))
1176                                 antcomb->first_ratio = true;
1177                         else
1178                                 antcomb->first_ratio = false;
1179                 }
1180                 break;
1181         case 2:
1182                 antcomb->alt_good = false;
1183                 antcomb->scan_not_start = false;
1184                 antcomb->scan = false;
1185                 antcomb->rssi_first = main_rssi_avg;
1186                 antcomb->rssi_third = alt_rssi_avg;
1187
1188                 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1189                         antcomb->rssi_lna1 = alt_rssi_avg;
1190                 else if (antcomb->second_quick_scan_conf ==
1191                          ATH_ANT_DIV_COMB_LNA2)
1192                         antcomb->rssi_lna2 = alt_rssi_avg;
1193                 else if (antcomb->second_quick_scan_conf ==
1194                          ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1195                         if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1196                                 antcomb->rssi_lna2 = main_rssi_avg;
1197                         else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1198                                 antcomb->rssi_lna1 = main_rssi_avg;
1199                 }
1200
1201                 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1202                     ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1203                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1204                 else
1205                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1206
1207                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1208                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1209                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1210                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1211                                                 main_rssi_avg, alt_rssi_avg,
1212                                                 antcomb->total_pkt_count))
1213                                 antcomb->second_ratio = true;
1214                         else
1215                                 antcomb->second_ratio = false;
1216                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1217                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1218                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1219                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1220                                                 main_rssi_avg, alt_rssi_avg,
1221                                                 antcomb->total_pkt_count))
1222                                 antcomb->second_ratio = true;
1223                         else
1224                                 antcomb->second_ratio = false;
1225                 } else {
1226                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1227                             (alt_rssi_avg > main_rssi_avg +
1228                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1229                             (alt_rssi_avg > main_rssi_avg)) &&
1230                             (antcomb->total_pkt_count > 50))
1231                                 antcomb->second_ratio = true;
1232                         else
1233                                 antcomb->second_ratio = false;
1234                 }
1235
1236                 /* set alt to the conf with maximun ratio */
1237                 if (antcomb->first_ratio && antcomb->second_ratio) {
1238                         if (antcomb->rssi_second > antcomb->rssi_third) {
1239                                 /* first alt*/
1240                                 if ((antcomb->first_quick_scan_conf ==
1241                                     ATH_ANT_DIV_COMB_LNA1) ||
1242                                     (antcomb->first_quick_scan_conf ==
1243                                     ATH_ANT_DIV_COMB_LNA2))
1244                                         /* Set alt LNA1 or LNA2*/
1245                                         if (div_ant_conf->main_lna_conf ==
1246                                             ATH_ANT_DIV_COMB_LNA2)
1247                                                 div_ant_conf->alt_lna_conf =
1248                                                         ATH_ANT_DIV_COMB_LNA1;
1249                                         else
1250                                                 div_ant_conf->alt_lna_conf =
1251                                                         ATH_ANT_DIV_COMB_LNA2;
1252                                 else
1253                                         /* Set alt to A+B or A-B */
1254                                         div_ant_conf->alt_lna_conf =
1255                                                 antcomb->first_quick_scan_conf;
1256                         } else if ((antcomb->second_quick_scan_conf ==
1257                                    ATH_ANT_DIV_COMB_LNA1) ||
1258                                    (antcomb->second_quick_scan_conf ==
1259                                    ATH_ANT_DIV_COMB_LNA2)) {
1260                                 /* Set alt LNA1 or LNA2 */
1261                                 if (div_ant_conf->main_lna_conf ==
1262                                     ATH_ANT_DIV_COMB_LNA2)
1263                                         div_ant_conf->alt_lna_conf =
1264                                                 ATH_ANT_DIV_COMB_LNA1;
1265                                 else
1266                                         div_ant_conf->alt_lna_conf =
1267                                                 ATH_ANT_DIV_COMB_LNA2;
1268                         } else {
1269                                 /* Set alt to A+B or A-B */
1270                                 div_ant_conf->alt_lna_conf =
1271                                         antcomb->second_quick_scan_conf;
1272                         }
1273                 } else if (antcomb->first_ratio) {
1274                         /* first alt */
1275                         if ((antcomb->first_quick_scan_conf ==
1276                             ATH_ANT_DIV_COMB_LNA1) ||
1277                             (antcomb->first_quick_scan_conf ==
1278                             ATH_ANT_DIV_COMB_LNA2))
1279                                         /* Set alt LNA1 or LNA2 */
1280                                 if (div_ant_conf->main_lna_conf ==
1281                                     ATH_ANT_DIV_COMB_LNA2)
1282                                         div_ant_conf->alt_lna_conf =
1283                                                         ATH_ANT_DIV_COMB_LNA1;
1284                                 else
1285                                         div_ant_conf->alt_lna_conf =
1286                                                         ATH_ANT_DIV_COMB_LNA2;
1287                         else
1288                                 /* Set alt to A+B or A-B */
1289                                 div_ant_conf->alt_lna_conf =
1290                                                 antcomb->first_quick_scan_conf;
1291                 } else if (antcomb->second_ratio) {
1292                                 /* second alt */
1293                         if ((antcomb->second_quick_scan_conf ==
1294                             ATH_ANT_DIV_COMB_LNA1) ||
1295                             (antcomb->second_quick_scan_conf ==
1296                             ATH_ANT_DIV_COMB_LNA2))
1297                                 /* Set alt LNA1 or LNA2 */
1298                                 if (div_ant_conf->main_lna_conf ==
1299                                     ATH_ANT_DIV_COMB_LNA2)
1300                                         div_ant_conf->alt_lna_conf =
1301                                                 ATH_ANT_DIV_COMB_LNA1;
1302                                 else
1303                                         div_ant_conf->alt_lna_conf =
1304                                                 ATH_ANT_DIV_COMB_LNA2;
1305                         else
1306                                 /* Set alt to A+B or A-B */
1307                                 div_ant_conf->alt_lna_conf =
1308                                                 antcomb->second_quick_scan_conf;
1309                 } else {
1310                         /* main is largest */
1311                         if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1312                             (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1313                                 /* Set alt LNA1 or LNA2 */
1314                                 if (div_ant_conf->main_lna_conf ==
1315                                     ATH_ANT_DIV_COMB_LNA2)
1316                                         div_ant_conf->alt_lna_conf =
1317                                                         ATH_ANT_DIV_COMB_LNA1;
1318                                 else
1319                                         div_ant_conf->alt_lna_conf =
1320                                                         ATH_ANT_DIV_COMB_LNA2;
1321                         else
1322                                 /* Set alt to A+B or A-B */
1323                                 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1324                 }
1325                 break;
1326         default:
1327                 break;
1328         }
1329 }
1330
1331 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1332                 struct ath_ant_comb *antcomb, int alt_ratio)
1333 {
1334         if (ant_conf->div_group == 0) {
1335                 /* Adjust the fast_div_bias based on main and alt lna conf */
1336                 switch ((ant_conf->main_lna_conf << 4) |
1337                                 ant_conf->alt_lna_conf) {
1338                 case 0x01: /* A-B LNA2 */
1339                         ant_conf->fast_div_bias = 0x3b;
1340                         break;
1341                 case 0x02: /* A-B LNA1 */
1342                         ant_conf->fast_div_bias = 0x3d;
1343                         break;
1344                 case 0x03: /* A-B A+B */
1345                         ant_conf->fast_div_bias = 0x1;
1346                         break;
1347                 case 0x10: /* LNA2 A-B */
1348                         ant_conf->fast_div_bias = 0x7;
1349                         break;
1350                 case 0x12: /* LNA2 LNA1 */
1351                         ant_conf->fast_div_bias = 0x2;
1352                         break;
1353                 case 0x13: /* LNA2 A+B */
1354                         ant_conf->fast_div_bias = 0x7;
1355                         break;
1356                 case 0x20: /* LNA1 A-B */
1357                         ant_conf->fast_div_bias = 0x6;
1358                         break;
1359                 case 0x21: /* LNA1 LNA2 */
1360                         ant_conf->fast_div_bias = 0x0;
1361                         break;
1362                 case 0x23: /* LNA1 A+B */
1363                         ant_conf->fast_div_bias = 0x6;
1364                         break;
1365                 case 0x30: /* A+B A-B */
1366                         ant_conf->fast_div_bias = 0x1;
1367                         break;
1368                 case 0x31: /* A+B LNA2 */
1369                         ant_conf->fast_div_bias = 0x3b;
1370                         break;
1371                 case 0x32: /* A+B LNA1 */
1372                         ant_conf->fast_div_bias = 0x3d;
1373                         break;
1374                 default:
1375                         break;
1376                 }
1377         } else if (ant_conf->div_group == 1) {
1378                 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1379                 switch ((ant_conf->main_lna_conf << 4) |
1380                         ant_conf->alt_lna_conf) {
1381                 case 0x01: /* A-B LNA2 */
1382                         ant_conf->fast_div_bias = 0x1;
1383                         ant_conf->main_gaintb = 0;
1384                         ant_conf->alt_gaintb = 0;
1385                         break;
1386                 case 0x02: /* A-B LNA1 */
1387                         ant_conf->fast_div_bias = 0x1;
1388                         ant_conf->main_gaintb = 0;
1389                         ant_conf->alt_gaintb = 0;
1390                         break;
1391                 case 0x03: /* A-B A+B */
1392                         ant_conf->fast_div_bias = 0x1;
1393                         ant_conf->main_gaintb = 0;
1394                         ant_conf->alt_gaintb = 0;
1395                         break;
1396                 case 0x10: /* LNA2 A-B */
1397                         if (!(antcomb->scan) &&
1398                             (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1399                                 ant_conf->fast_div_bias = 0x3f;
1400                         else
1401                                 ant_conf->fast_div_bias = 0x1;
1402                         ant_conf->main_gaintb = 0;
1403                         ant_conf->alt_gaintb = 0;
1404                         break;
1405                 case 0x12: /* LNA2 LNA1 */
1406                         ant_conf->fast_div_bias = 0x1;
1407                         ant_conf->main_gaintb = 0;
1408                         ant_conf->alt_gaintb = 0;
1409                         break;
1410                 case 0x13: /* LNA2 A+B */
1411                         if (!(antcomb->scan) &&
1412                             (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1413                                 ant_conf->fast_div_bias = 0x3f;
1414                         else
1415                                 ant_conf->fast_div_bias = 0x1;
1416                         ant_conf->main_gaintb = 0;
1417                         ant_conf->alt_gaintb = 0;
1418                         break;
1419                 case 0x20: /* LNA1 A-B */
1420                         if (!(antcomb->scan) &&
1421                             (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1422                                 ant_conf->fast_div_bias = 0x3f;
1423                         else
1424                                 ant_conf->fast_div_bias = 0x1;
1425                         ant_conf->main_gaintb = 0;
1426                         ant_conf->alt_gaintb = 0;
1427                         break;
1428                 case 0x21: /* LNA1 LNA2 */
1429                         ant_conf->fast_div_bias = 0x1;
1430                         ant_conf->main_gaintb = 0;
1431                         ant_conf->alt_gaintb = 0;
1432                         break;
1433                 case 0x23: /* LNA1 A+B */
1434                         if (!(antcomb->scan) &&
1435                             (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1436                                 ant_conf->fast_div_bias = 0x3f;
1437                         else
1438                                 ant_conf->fast_div_bias = 0x1;
1439                         ant_conf->main_gaintb = 0;
1440                         ant_conf->alt_gaintb = 0;
1441                         break;
1442                 case 0x30: /* A+B A-B */
1443                         ant_conf->fast_div_bias = 0x1;
1444                         ant_conf->main_gaintb = 0;
1445                         ant_conf->alt_gaintb = 0;
1446                         break;
1447                 case 0x31: /* A+B LNA2 */
1448                         ant_conf->fast_div_bias = 0x1;
1449                         ant_conf->main_gaintb = 0;
1450                         ant_conf->alt_gaintb = 0;
1451                         break;
1452                 case 0x32: /* A+B LNA1 */
1453                         ant_conf->fast_div_bias = 0x1;
1454                         ant_conf->main_gaintb = 0;
1455                         ant_conf->alt_gaintb = 0;
1456                         break;
1457                 default:
1458                         break;
1459                 }
1460         } else if (ant_conf->div_group == 2) {
1461                 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1462                 switch ((ant_conf->main_lna_conf << 4) |
1463                                 ant_conf->alt_lna_conf) {
1464                 case 0x01: /* A-B LNA2 */
1465                         ant_conf->fast_div_bias = 0x1;
1466                         ant_conf->main_gaintb = 0;
1467                         ant_conf->alt_gaintb = 0;
1468                         break;
1469                 case 0x02: /* A-B LNA1 */
1470                         ant_conf->fast_div_bias = 0x1;
1471                         ant_conf->main_gaintb = 0;
1472                         ant_conf->alt_gaintb = 0;
1473                         break;
1474                 case 0x03: /* A-B A+B */
1475                         ant_conf->fast_div_bias = 0x1;
1476                         ant_conf->main_gaintb = 0;
1477                         ant_conf->alt_gaintb = 0;
1478                         break;
1479                 case 0x10: /* LNA2 A-B */
1480                         if (!(antcomb->scan) &&
1481                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1482                                 ant_conf->fast_div_bias = 0x1;
1483                         else
1484                                 ant_conf->fast_div_bias = 0x2;
1485                         ant_conf->main_gaintb = 0;
1486                         ant_conf->alt_gaintb = 0;
1487                         break;
1488                 case 0x12: /* LNA2 LNA1 */
1489                         ant_conf->fast_div_bias = 0x1;
1490                         ant_conf->main_gaintb = 0;
1491                         ant_conf->alt_gaintb = 0;
1492                         break;
1493                 case 0x13: /* LNA2 A+B */
1494                         if (!(antcomb->scan) &&
1495                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1496                                 ant_conf->fast_div_bias = 0x1;
1497                         else
1498                                 ant_conf->fast_div_bias = 0x2;
1499                         ant_conf->main_gaintb = 0;
1500                         ant_conf->alt_gaintb = 0;
1501                         break;
1502                 case 0x20: /* LNA1 A-B */
1503                         if (!(antcomb->scan) &&
1504                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1505                                 ant_conf->fast_div_bias = 0x1;
1506                         else
1507                                 ant_conf->fast_div_bias = 0x2;
1508                         ant_conf->main_gaintb = 0;
1509                         ant_conf->alt_gaintb = 0;
1510                         break;
1511                 case 0x21: /* LNA1 LNA2 */
1512                         ant_conf->fast_div_bias = 0x1;
1513                         ant_conf->main_gaintb = 0;
1514                         ant_conf->alt_gaintb = 0;
1515                         break;
1516                 case 0x23: /* LNA1 A+B */
1517                         if (!(antcomb->scan) &&
1518                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1519                                 ant_conf->fast_div_bias = 0x1;
1520                         else
1521                                 ant_conf->fast_div_bias = 0x2;
1522                         ant_conf->main_gaintb = 0;
1523                         ant_conf->alt_gaintb = 0;
1524                         break;
1525                 case 0x30: /* A+B A-B */
1526                         ant_conf->fast_div_bias = 0x1;
1527                         ant_conf->main_gaintb = 0;
1528                         ant_conf->alt_gaintb = 0;
1529                         break;
1530                 case 0x31: /* A+B LNA2 */
1531                         ant_conf->fast_div_bias = 0x1;
1532                         ant_conf->main_gaintb = 0;
1533                         ant_conf->alt_gaintb = 0;
1534                         break;
1535                 case 0x32: /* A+B LNA1 */
1536                         ant_conf->fast_div_bias = 0x1;
1537                         ant_conf->main_gaintb = 0;
1538                         ant_conf->alt_gaintb = 0;
1539                         break;
1540                 default:
1541                         break;
1542                 }
1543         }
1544 }
1545
1546 /* Antenna diversity and combining */
1547 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1548 {
1549         struct ath_hw_antcomb_conf div_ant_conf;
1550         struct ath_ant_comb *antcomb = &sc->ant_comb;
1551         int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1552         int curr_main_set;
1553         int main_rssi = rs->rs_rssi_ctl0;
1554         int alt_rssi = rs->rs_rssi_ctl1;
1555         int rx_ant_conf,  main_ant_conf;
1556         bool short_scan = false;
1557
1558         rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1559                        ATH_ANT_RX_MASK;
1560         main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1561                          ATH_ANT_RX_MASK;
1562
1563         /* Record packet only when both main_rssi and  alt_rssi is positive */
1564         if (main_rssi > 0 && alt_rssi > 0) {
1565                 antcomb->total_pkt_count++;
1566                 antcomb->main_total_rssi += main_rssi;
1567                 antcomb->alt_total_rssi  += alt_rssi;
1568                 if (main_ant_conf == rx_ant_conf)
1569                         antcomb->main_recv_cnt++;
1570                 else
1571                         antcomb->alt_recv_cnt++;
1572         }
1573
1574         /* Short scan check */
1575         if (antcomb->scan && antcomb->alt_good) {
1576                 if (time_after(jiffies, antcomb->scan_start_time +
1577                     msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1578                         short_scan = true;
1579                 else
1580                         if (antcomb->total_pkt_count ==
1581                             ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1582                                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1583                                             antcomb->total_pkt_count);
1584                                 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1585                                         short_scan = true;
1586                         }
1587         }
1588
1589         if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1590             rs->rs_moreaggr) && !short_scan)
1591                 return;
1592
1593         if (antcomb->total_pkt_count) {
1594                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1595                              antcomb->total_pkt_count);
1596                 main_rssi_avg = (antcomb->main_total_rssi /
1597                                  antcomb->total_pkt_count);
1598                 alt_rssi_avg = (antcomb->alt_total_rssi /
1599                                  antcomb->total_pkt_count);
1600         }
1601
1602
1603         ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1604         curr_alt_set = div_ant_conf.alt_lna_conf;
1605         curr_main_set = div_ant_conf.main_lna_conf;
1606
1607         antcomb->count++;
1608
1609         if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1610                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1611                         ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1612                                                   main_rssi_avg);
1613                         antcomb->alt_good = true;
1614                 } else {
1615                         antcomb->alt_good = false;
1616                 }
1617
1618                 antcomb->count = 0;
1619                 antcomb->scan = true;
1620                 antcomb->scan_not_start = true;
1621         }
1622
1623         if (!antcomb->scan) {
1624                 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1625                                         alt_ratio, curr_main_set, curr_alt_set,
1626                                         alt_rssi_avg, main_rssi_avg)) {
1627                         if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1628                                 /* Switch main and alt LNA */
1629                                 div_ant_conf.main_lna_conf =
1630                                                 ATH_ANT_DIV_COMB_LNA2;
1631                                 div_ant_conf.alt_lna_conf  =
1632                                                 ATH_ANT_DIV_COMB_LNA1;
1633                         } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1634                                 div_ant_conf.main_lna_conf =
1635                                                 ATH_ANT_DIV_COMB_LNA1;
1636                                 div_ant_conf.alt_lna_conf  =
1637                                                 ATH_ANT_DIV_COMB_LNA2;
1638                         }
1639
1640                         goto div_comb_done;
1641                 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1642                            (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1643                         /* Set alt to another LNA */
1644                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1645                                 div_ant_conf.alt_lna_conf =
1646                                                 ATH_ANT_DIV_COMB_LNA1;
1647                         else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1648                                 div_ant_conf.alt_lna_conf =
1649                                                 ATH_ANT_DIV_COMB_LNA2;
1650
1651                         goto div_comb_done;
1652                 }
1653
1654                 if ((alt_rssi_avg < (main_rssi_avg +
1655                                                 div_ant_conf.lna1_lna2_delta)))
1656                         goto div_comb_done;
1657         }
1658
1659         if (!antcomb->scan_not_start) {
1660                 switch (curr_alt_set) {
1661                 case ATH_ANT_DIV_COMB_LNA2:
1662                         antcomb->rssi_lna2 = alt_rssi_avg;
1663                         antcomb->rssi_lna1 = main_rssi_avg;
1664                         antcomb->scan = true;
1665                         /* set to A+B */
1666                         div_ant_conf.main_lna_conf =
1667                                 ATH_ANT_DIV_COMB_LNA1;
1668                         div_ant_conf.alt_lna_conf  =
1669                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1670                         break;
1671                 case ATH_ANT_DIV_COMB_LNA1:
1672                         antcomb->rssi_lna1 = alt_rssi_avg;
1673                         antcomb->rssi_lna2 = main_rssi_avg;
1674                         antcomb->scan = true;
1675                         /* set to A+B */
1676                         div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1677                         div_ant_conf.alt_lna_conf  =
1678                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1679                         break;
1680                 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1681                         antcomb->rssi_add = alt_rssi_avg;
1682                         antcomb->scan = true;
1683                         /* set to A-B */
1684                         div_ant_conf.alt_lna_conf =
1685                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1686                         break;
1687                 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1688                         antcomb->rssi_sub = alt_rssi_avg;
1689                         antcomb->scan = false;
1690                         if (antcomb->rssi_lna2 >
1691                             (antcomb->rssi_lna1 +
1692                             ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1693                                 /* use LNA2 as main LNA */
1694                                 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1695                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1696                                         /* set to A+B */
1697                                         div_ant_conf.main_lna_conf =
1698                                                 ATH_ANT_DIV_COMB_LNA2;
1699                                         div_ant_conf.alt_lna_conf  =
1700                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1701                                 } else if (antcomb->rssi_sub >
1702                                            antcomb->rssi_lna1) {
1703                                         /* set to A-B */
1704                                         div_ant_conf.main_lna_conf =
1705                                                 ATH_ANT_DIV_COMB_LNA2;
1706                                         div_ant_conf.alt_lna_conf =
1707                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1708                                 } else {
1709                                         /* set to LNA1 */
1710                                         div_ant_conf.main_lna_conf =
1711                                                 ATH_ANT_DIV_COMB_LNA2;
1712                                         div_ant_conf.alt_lna_conf =
1713                                                 ATH_ANT_DIV_COMB_LNA1;
1714                                 }
1715                         } else {
1716                                 /* use LNA1 as main LNA */
1717                                 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1718                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1719                                         /* set to A+B */
1720                                         div_ant_conf.main_lna_conf =
1721                                                 ATH_ANT_DIV_COMB_LNA1;
1722                                         div_ant_conf.alt_lna_conf  =
1723                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1724                                 } else if (antcomb->rssi_sub >
1725                                            antcomb->rssi_lna1) {
1726                                         /* set to A-B */
1727                                         div_ant_conf.main_lna_conf =
1728                                                 ATH_ANT_DIV_COMB_LNA1;
1729                                         div_ant_conf.alt_lna_conf =
1730                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1731                                 } else {
1732                                         /* set to LNA2 */
1733                                         div_ant_conf.main_lna_conf =
1734                                                 ATH_ANT_DIV_COMB_LNA1;
1735                                         div_ant_conf.alt_lna_conf =
1736                                                 ATH_ANT_DIV_COMB_LNA2;
1737                                 }
1738                         }
1739                         break;
1740                 default:
1741                         break;
1742                 }
1743         } else {
1744                 if (!antcomb->alt_good) {
1745                         antcomb->scan_not_start = false;
1746                         /* Set alt to another LNA */
1747                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1748                                 div_ant_conf.main_lna_conf =
1749                                                 ATH_ANT_DIV_COMB_LNA2;
1750                                 div_ant_conf.alt_lna_conf =
1751                                                 ATH_ANT_DIV_COMB_LNA1;
1752                         } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1753                                 div_ant_conf.main_lna_conf =
1754                                                 ATH_ANT_DIV_COMB_LNA1;
1755                                 div_ant_conf.alt_lna_conf =
1756                                                 ATH_ANT_DIV_COMB_LNA2;
1757                         }
1758                         goto div_comb_done;
1759                 }
1760         }
1761
1762         ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1763                                            main_rssi_avg, alt_rssi_avg,
1764                                            alt_ratio);
1765
1766         antcomb->quick_scan_cnt++;
1767
1768 div_comb_done:
1769         ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
1770         ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1771
1772         antcomb->scan_start_time = jiffies;
1773         antcomb->total_pkt_count = 0;
1774         antcomb->main_total_rssi = 0;
1775         antcomb->alt_total_rssi = 0;
1776         antcomb->main_recv_cnt = 0;
1777         antcomb->alt_recv_cnt = 0;
1778 }
1779
1780 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1781 {
1782         struct ath_buf *bf;
1783         struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
1784         struct ieee80211_rx_status *rxs;
1785         struct ath_hw *ah = sc->sc_ah;
1786         struct ath_common *common = ath9k_hw_common(ah);
1787         /*
1788          * The hw can technically differ from common->hw when using ath9k
1789          * virtual wiphy so to account for that we iterate over the active
1790          * wiphys and find the appropriate wiphy and therefore hw.
1791          */
1792         struct ieee80211_hw *hw = sc->hw;
1793         struct ieee80211_hdr *hdr;
1794         int retval;
1795         bool decrypt_error = false;
1796         struct ath_rx_status rs;
1797         enum ath9k_rx_qtype qtype;
1798         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1799         int dma_type;
1800         u8 rx_status_len = ah->caps.rx_status_len;
1801         u64 tsf = 0;
1802         u32 tsf_lower = 0;
1803         unsigned long flags;
1804
1805         if (edma)
1806                 dma_type = DMA_BIDIRECTIONAL;
1807         else
1808                 dma_type = DMA_FROM_DEVICE;
1809
1810         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1811         spin_lock_bh(&sc->rx.rxbuflock);
1812
1813         tsf = ath9k_hw_gettsf64(ah);
1814         tsf_lower = tsf & 0xffffffff;
1815
1816         do {
1817                 /* If handling rx interrupt and flush is in progress => exit */
1818                 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1819                         break;
1820
1821                 memset(&rs, 0, sizeof(rs));
1822                 if (edma)
1823                         bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1824                 else
1825                         bf = ath_get_next_rx_buf(sc, &rs);
1826
1827                 if (!bf)
1828                         break;
1829
1830                 skb = bf->bf_mpdu;
1831                 if (!skb)
1832                         continue;
1833
1834                 /*
1835                  * Take frame header from the first fragment and RX status from
1836                  * the last one.
1837                  */
1838                 if (sc->rx.frag)
1839                         hdr_skb = sc->rx.frag;
1840                 else
1841                         hdr_skb = skb;
1842
1843                 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1844                 rxs = IEEE80211_SKB_RXCB(hdr_skb);
1845
1846                 ath_debug_stat_rx(sc, &rs);
1847
1848                 /*
1849                  * If we're asked to flush receive queue, directly
1850                  * chain it back at the queue without processing it.
1851                  */
1852                 if (flush)
1853                         goto requeue_drop_frag;
1854
1855                 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1856                                                  rxs, &decrypt_error);
1857                 if (retval)
1858                         goto requeue_drop_frag;
1859
1860                 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1861                 if (rs.rs_tstamp > tsf_lower &&
1862                     unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1863                         rxs->mactime -= 0x100000000ULL;
1864
1865                 if (rs.rs_tstamp < tsf_lower &&
1866                     unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1867                         rxs->mactime += 0x100000000ULL;
1868
1869                 /* Ensure we always have an skb to requeue once we are done
1870                  * processing the current buffer's skb */
1871                 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1872
1873                 /* If there is no memory we ignore the current RX'd frame,
1874                  * tell hardware it can give us a new frame using the old
1875                  * skb and put it at the tail of the sc->rx.rxbuf list for
1876                  * processing. */
1877                 if (!requeue_skb)
1878                         goto requeue_drop_frag;
1879
1880                 /* Unmap the frame */
1881                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1882                                  common->rx_bufsize,
1883                                  dma_type);
1884
1885                 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1886                 if (ah->caps.rx_status_len)
1887                         skb_pull(skb, ah->caps.rx_status_len);
1888
1889                 if (!rs.rs_more)
1890                         ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1891                                                  rxs, decrypt_error);
1892
1893                 /* We will now give hardware our shiny new allocated skb */
1894                 bf->bf_mpdu = requeue_skb;
1895                 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1896                                                  common->rx_bufsize,
1897                                                  dma_type);
1898                 if (unlikely(dma_mapping_error(sc->dev,
1899                           bf->bf_buf_addr))) {
1900                         dev_kfree_skb_any(requeue_skb);
1901                         bf->bf_mpdu = NULL;
1902                         bf->bf_buf_addr = 0;
1903                         ath_err(common, "dma_mapping_error() on RX\n");
1904                         ieee80211_rx(hw, skb);
1905                         break;
1906                 }
1907
1908                 if (rs.rs_more) {
1909                         /*
1910                          * rs_more indicates chained descriptors which can be
1911                          * used to link buffers together for a sort of
1912                          * scatter-gather operation.
1913                          */
1914                         if (sc->rx.frag) {
1915                                 /* too many fragments - cannot handle frame */
1916                                 dev_kfree_skb_any(sc->rx.frag);
1917                                 dev_kfree_skb_any(skb);
1918                                 skb = NULL;
1919                         }
1920                         sc->rx.frag = skb;
1921                         goto requeue;
1922                 }
1923
1924                 if (sc->rx.frag) {
1925                         int space = skb->len - skb_tailroom(hdr_skb);
1926
1927                         sc->rx.frag = NULL;
1928
1929                         if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1930                                 dev_kfree_skb(skb);
1931                                 goto requeue_drop_frag;
1932                         }
1933
1934                         skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1935                                                   skb->len);
1936                         dev_kfree_skb_any(skb);
1937                         skb = hdr_skb;
1938                 }
1939
1940                 /*
1941                  * change the default rx antenna if rx diversity chooses the
1942                  * other antenna 3 times in a row.
1943                  */
1944                 if (sc->rx.defant != rs.rs_antenna) {
1945                         if (++sc->rx.rxotherant >= 3)
1946                                 ath_setdefantenna(sc, rs.rs_antenna);
1947                 } else {
1948                         sc->rx.rxotherant = 0;
1949                 }
1950
1951                 if (rxs->flag & RX_FLAG_MMIC_STRIPPED)
1952                         skb_trim(skb, skb->len - 8);
1953
1954                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1955
1956                 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
1957                                               PS_WAIT_FOR_CAB |
1958                                               PS_WAIT_FOR_PSPOLL_DATA)) ||
1959                                                 ath9k_check_auto_sleep(sc))
1960                         ath_rx_ps(sc, skb);
1961                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1962
1963                 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
1964                         ath_ant_comb_scan(sc, &rs);
1965
1966                 ieee80211_rx(hw, skb);
1967
1968 requeue_drop_frag:
1969                 if (sc->rx.frag) {
1970                         dev_kfree_skb_any(sc->rx.frag);
1971                         sc->rx.frag = NULL;
1972                 }
1973 requeue:
1974                 if (edma) {
1975                         list_add_tail(&bf->list, &sc->rx.rxbuf);
1976                         ath_rx_edma_buf_link(sc, qtype);
1977                 } else {
1978                         list_move_tail(&bf->list, &sc->rx.rxbuf);
1979                         ath_rx_buf_link(sc, bf);
1980                         ath9k_hw_rxena(ah);
1981                 }
1982         } while (1);
1983
1984         spin_unlock_bh(&sc->rx.rxbuflock);
1985
1986         return 0;
1987 }