drivers/net/wireless/ath/ath9k/recv.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "ath9k.h"
  18 #include "ar9003_mac.h"
  19
  20 #define SKB_CB_ATHBUF(__skb)    (*((struct ath_buf **)__skb->cb))
  21
  22 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
  23                                                int mindelta, int main_rssi_avg,
  24                                                int alt_rssi_avg, int pkt_count)
  25 {
  26         return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
  27                 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
  28                 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
  29 }
  30
  31 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
  32 {
  33         return sc->ps_enabled &&
  34                (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
  35 }
  36
  37 static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
  38                                              struct ieee80211_hdr *hdr)
  39 {
  40         struct ieee80211_hw *hw = sc->pri_wiphy->hw;
  41         int i;
  42
  43         spin_lock_bh(&sc->wiphy_lock);
  44         for (i = 0; i < sc->num_sec_wiphy; i++) {
  45                 struct ath_wiphy *aphy = sc->sec_wiphy[i];
  46                 if (aphy == NULL)
  47                         continue;
  48                 if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
  49                     == 0) {
  50                         hw = aphy->hw;
  51                         break;
  52                 }
  53         }
  54         spin_unlock_bh(&sc->wiphy_lock);
  55         return hw;
  56 }
  57
  58 /*
  59  * Setup and link descriptors.
  60  *
  61  * 11N: we can no longer afford to self link the last descriptor.
  62  * MAC acknowledges BA status as long as it copies frames to host
  63  * buffer (or rx fifo). This can incorrectly acknowledge packets
  64  * to a sender if last desc is self-linked.
  65  */
  66 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  67 {
  68         struct ath_hw *ah = sc->sc_ah;
  69         struct ath_common *common = ath9k_hw_common(ah);
  70         struct ath_desc *ds;
  71         struct sk_buff *skb;
  72
  73         ATH_RXBUF_RESET(bf);
  74
  75         ds = bf->bf_desc;
  76         ds->ds_link = 0; /* link to null */
  77         ds->ds_data = bf->bf_buf_addr;
  78
  79         /* virtual addr of the beginning of the buffer. */
  80         skb = bf->bf_mpdu;
  81         BUG_ON(skb == NULL);
  82         ds->ds_vdata = skb->data;
  83
  84         /*
  85          * setup rx descriptors. The rx_bufsize here tells the hardware
  86          * how much data it can DMA to us and that we are prepared
  87          * to process
  88          */
  89         ath9k_hw_setuprxdesc(ah, ds,
  90                              common->rx_bufsize,
  91                              0);
  92
  93         if (sc->rx.rxlink == NULL)
  94                 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  95         else
  96                 *sc->rx.rxlink = bf->bf_daddr;
  97
  98         sc->rx.rxlink = &ds->ds_link;
  99         ath9k_hw_rxena(ah);
 100 }
 101
 102 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
 103 {
 104         /* XXX block beacon interrupts */
 105         ath9k_hw_setantenna(sc->sc_ah, antenna);
 106         sc->rx.defant = antenna;
 107         sc->rx.rxotherant = 0;
 108 }
 109
 110 static void ath_opmode_init(struct ath_softc *sc)
 111 {
 112         struct ath_hw *ah = sc->sc_ah;
 113         struct ath_common *common = ath9k_hw_common(ah);
 114
 115         u32 rfilt, mfilt[2];
 116
 117         /* configure rx filter */
 118         rfilt = ath_calcrxfilter(sc);
 119         ath9k_hw_setrxfilter(ah, rfilt);
 120
 121         /* configure bssid mask */
 122         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
 123                 ath_hw_setbssidmask(common);
 124
 125         /* configure operational mode */
 126         ath9k_hw_setopmode(ah);
 127
 128         /* calculate and install multicast filter */
 129         mfilt[0] = mfilt[1] = ~0;
 130         ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
 131 }
 132
 133 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
 134                                  enum ath9k_rx_qtype qtype)
 135 {
 136         struct ath_hw *ah = sc->sc_ah;
 137         struct ath_rx_edma *rx_edma;
 138         struct sk_buff *skb;
 139         struct ath_buf *bf;
 140
 141         rx_edma = &sc->rx.rx_edma[qtype];
 142         if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
 143                 return false;
 144
 145         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 146         list_del_init(&bf->list);
 147
 148         skb = bf->bf_mpdu;
 149
 150         ATH_RXBUF_RESET(bf);
 151         memset(skb->data, 0, ah->caps.rx_status_len);
 152         dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 153                                 ah->caps.rx_status_len, DMA_TO_DEVICE);
 154
 155         SKB_CB_ATHBUF(skb) = bf;
 156         ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
 157         skb_queue_tail(&rx_edma->rx_fifo, skb);
 158
 159         return true;
 160 }
 161
 162 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
 163                                   enum ath9k_rx_qtype qtype, int size)
 164 {
 165         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 166         u32 nbuf = 0;
 167
 168         if (list_empty(&sc->rx.rxbuf)) {
 169                 ath_print(common, ATH_DBG_QUEUE, "No free rx buf available\n");
 170                 return;
 171         }
 172
 173         while (!list_empty(&sc->rx.rxbuf)) {
 174                 nbuf++;
 175
 176                 if (!ath_rx_edma_buf_link(sc, qtype))
 177                         break;
 178
 179                 if (nbuf >= size)
 180                         break;
 181         }
 182 }
 183
 184 static void ath_rx_remove_buffer(struct ath_softc *sc,
 185                                  enum ath9k_rx_qtype qtype)
 186 {
 187         struct ath_buf *bf;
 188         struct ath_rx_edma *rx_edma;
 189         struct sk_buff *skb;
 190
 191         rx_edma = &sc->rx.rx_edma[qtype];
 192
 193         while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
 194                 bf = SKB_CB_ATHBUF(skb);
 195                 BUG_ON(!bf);
 196                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 197         }
 198 }
 199
 200 static void ath_rx_edma_cleanup(struct ath_softc *sc)
 201 {
 202         struct ath_buf *bf;
 203
 204         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 205         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 206
 207         list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 208                 if (bf->bf_mpdu)
 209                         dev_kfree_skb_any(bf->bf_mpdu);
 210         }
 211
 212         INIT_LIST_HEAD(&sc->rx.rxbuf);
 213
 214         kfree(sc->rx.rx_bufptr);
 215         sc->rx.rx_bufptr = NULL;
 216 }
 217
 218 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
 219 {
 220         skb_queue_head_init(&rx_edma->rx_fifo);
 221         skb_queue_head_init(&rx_edma->rx_buffers);
 222         rx_edma->rx_fifo_hwsize = size;
 223 }
 224
 225 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
 226 {
 227         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 228         struct ath_hw *ah = sc->sc_ah;
 229         struct sk_buff *skb;
 230         struct ath_buf *bf;
 231         int error = 0, i;
 232         u32 size;
 233
 234
 235         common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN +
 236                                      ah->caps.rx_status_len,
 237                                      min(common->cachelsz, (u16)64));
 238
 239         ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
 240                                     ah->caps.rx_status_len);
 241
 242         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
 243                                ah->caps.rx_lp_qdepth);
 244         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
 245                                ah->caps.rx_hp_qdepth);
 246
 247         size = sizeof(struct ath_buf) * nbufs;
 248         bf = kzalloc(size, GFP_KERNEL);
 249         if (!bf)
 250                 return -ENOMEM;
 251
 252         INIT_LIST_HEAD(&sc->rx.rxbuf);
 253         sc->rx.rx_bufptr = bf;
 254
 255         for (i = 0; i < nbufs; i++, bf++) {
 256                 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
 257                 if (!skb) {
 258                         error = -ENOMEM;
 259                         goto rx_init_fail;
 260                 }
 261
 262                 memset(skb->data, 0, common->rx_bufsize);
 263                 bf->bf_mpdu = skb;
 264
 265                 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 266                                                  common->rx_bufsize,
 267                                                  DMA_BIDIRECTIONAL);
 268                 if (unlikely(dma_mapping_error(sc->dev,
 269                                                 bf->bf_buf_addr))) {
 270                                 dev_kfree_skb_any(skb);
 271                                 bf->bf_mpdu = NULL;
 272                                 ath_print(common, ATH_DBG_FATAL,
 273                                         "dma_mapping_error() on RX init\n");
 274                                 error = -ENOMEM;
 275                                 goto rx_init_fail;
 276                 }
 277
 278                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 279         }
 280
 281         return 0;
 282
 283 rx_init_fail:
 284         ath_rx_edma_cleanup(sc);
 285         return error;
 286 }
 287
 288 static void ath_edma_start_recv(struct ath_softc *sc)
 289 {
 290         spin_lock_bh(&sc->rx.rxbuflock);
 291
 292         ath9k_hw_rxena(sc->sc_ah);
 293
 294         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
 295                               sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
 296
 297         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
 298                               sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
 299
 300         spin_unlock_bh(&sc->rx.rxbuflock);
 301
 302         ath_opmode_init(sc);
 303
 304         ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_SCANNING));
 305 }
 306
 307 static void ath_edma_stop_recv(struct ath_softc *sc)
 308 {
 309         spin_lock_bh(&sc->rx.rxbuflock);
 310         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 311         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 312         spin_unlock_bh(&sc->rx.rxbuflock);
 313 }
 314
 315 int ath_rx_init(struct ath_softc *sc, int nbufs)
 316 {
 317         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 318         struct sk_buff *skb;
 319         struct ath_buf *bf;
 320         int error = 0;
 321
 322         spin_lock_init(&sc->rx.rxflushlock);
 323         sc->sc_flags &= ~SC_OP_RXFLUSH;
 324         spin_lock_init(&sc->rx.rxbuflock);
 325
 326         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 327                 return ath_rx_edma_init(sc, nbufs);
 328         } else {
 329                 common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
 330                                 min(common->cachelsz, (u16)64));
 331
 332                 ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
 333                                 common->cachelsz, common->rx_bufsize);
 334
 335                 /* Initialize rx descriptors */
 336
 337                 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
 338                                 "rx", nbufs, 1, 0);
 339                 if (error != 0) {
 340                         ath_print(common, ATH_DBG_FATAL,
 341                                   "failed to allocate rx descriptors: %d\n",
 342                                   error);
 343                         goto err;
 344                 }
 345
 346                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 347                         skb = ath_rxbuf_alloc(common, common->rx_bufsize,
 348                                               GFP_KERNEL);
 349                         if (skb == NULL) {
 350                                 error = -ENOMEM;
 351                                 goto err;
 352                         }
 353
 354                         bf->bf_mpdu = skb;
 355                         bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 356                                         common->rx_bufsize,
 357                                         DMA_FROM_DEVICE);
 358                         if (unlikely(dma_mapping_error(sc->dev,
 359                                                         bf->bf_buf_addr))) {
 360                                 dev_kfree_skb_any(skb);
 361                                 bf->bf_mpdu = NULL;
 362                                 ath_print(common, ATH_DBG_FATAL,
 363                                           "dma_mapping_error() on RX init\n");
 364                                 error = -ENOMEM;
 365                                 goto err;
 366                         }
 367                         bf->bf_dmacontext = bf->bf_buf_addr;
 368                 }
 369                 sc->rx.rxlink = NULL;
 370         }
 371
 372 err:
 373         if (error)
 374                 ath_rx_cleanup(sc);
 375
 376         return error;
 377 }
 378
 379 void ath_rx_cleanup(struct ath_softc *sc)
 380 {
 381         struct ath_hw *ah = sc->sc_ah;
 382         struct ath_common *common = ath9k_hw_common(ah);
 383         struct sk_buff *skb;
 384         struct ath_buf *bf;
 385
 386         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 387                 ath_rx_edma_cleanup(sc);
 388                 return;
 389         } else {
 390                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 391                         skb = bf->bf_mpdu;
 392                         if (skb) {
 393                                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
 394                                                 common->rx_bufsize,
 395                                                 DMA_FROM_DEVICE);
 396                                 dev_kfree_skb(skb);
 397                         }
 398                 }
 399
 400                 if (sc->rx.rxdma.dd_desc_len != 0)
 401                         ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
 402         }
 403 }
 404
 405 /*
 406  * Calculate the receive filter according to the
 407  * operating mode and state:
 408  *
 409  * o always accept unicast, broadcast, and multicast traffic
 410  * o maintain current state of phy error reception (the hal
 411  *   may enable phy error frames for noise immunity work)
 412  * o probe request frames are accepted only when operating in
 413  *   hostap, adhoc, or monitor modes
 414  * o enable promiscuous mode according to the interface state
 415  * o accept beacons:
 416  *   - when operating in adhoc mode so the 802.11 layer creates
 417  *     node table entries for peers,
 418  *   - when operating in station mode for collecting rssi data when
 419  *     the station is otherwise quiet, or
 420  *   - when operating as a repeater so we see repeater-sta beacons
 421  *   - when scanning
 422  */
 423
 424 u32 ath_calcrxfilter(struct ath_softc *sc)
 425 {
 426 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
 427
 428         u32 rfilt;
 429
 430         rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
 431                 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
 432                 | ATH9K_RX_FILTER_MCAST;
 433
 434         /* If not a STA, enable processing of Probe Requests */
 435         if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
 436                 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
 437
 438         /*
 439          * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
 440          * mode interface or when in monitor mode. AP mode does not need this
 441          * since it receives all in-BSS frames anyway.
 442          */
 443         if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
 444              (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
 445             (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
 446                 rfilt |= ATH9K_RX_FILTER_PROM;
 447
 448         if (sc->rx.rxfilter & FIF_CONTROL)
 449                 rfilt |= ATH9K_RX_FILTER_CONTROL;
 450
 451         if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
 452             !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
 453                 rfilt |= ATH9K_RX_FILTER_MYBEACON;
 454         else
 455                 rfilt |= ATH9K_RX_FILTER_BEACON;
 456
 457         if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
 458             AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
 459             (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
 460             (sc->rx.rxfilter & FIF_PSPOLL))
 461                 rfilt |= ATH9K_RX_FILTER_PSPOLL;
 462
 463         if (conf_is_ht(&sc->hw->conf))
 464                 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
 465
 466         if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
 467                 /* TODO: only needed if more than one BSSID is in use in
 468                  * station/adhoc mode */
 469                 /* The following may also be needed for other older chips */
 470                 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
 471                         rfilt |= ATH9K_RX_FILTER_PROM;
 472                 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
 473         }
 474
 475         return rfilt;
 476
 477 #undef RX_FILTER_PRESERVE
 478 }
 479
 480 int ath_startrecv(struct ath_softc *sc)
 481 {
 482         struct ath_hw *ah = sc->sc_ah;
 483         struct ath_buf *bf, *tbf;
 484
 485         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 486                 ath_edma_start_recv(sc);
 487                 return 0;
 488         }
 489
 490         spin_lock_bh(&sc->rx.rxbuflock);
 491         if (list_empty(&sc->rx.rxbuf))
 492                 goto start_recv;
 493
 494         sc->rx.rxlink = NULL;
 495         list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
 496                 ath_rx_buf_link(sc, bf);
 497         }
 498
 499         /* We could have deleted elements so the list may be empty now */
 500         if (list_empty(&sc->rx.rxbuf))
 501                 goto start_recv;
 502
 503         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 504         ath9k_hw_putrxbuf(ah, bf->bf_daddr);
 505         ath9k_hw_rxena(ah);
 506
 507 start_recv:
 508         spin_unlock_bh(&sc->rx.rxbuflock);
 509         ath_opmode_init(sc);
 510         ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_SCANNING));
 511
 512         return 0;
 513 }
 514
 515 bool ath_stoprecv(struct ath_softc *sc)
 516 {
 517         struct ath_hw *ah = sc->sc_ah;
 518         bool stopped;
 519
 520         ath9k_hw_stoppcurecv(ah);
 521         ath9k_hw_setrxfilter(ah, 0);
 522         stopped = ath9k_hw_stopdmarecv(ah);
 523
 524         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 525                 ath_edma_stop_recv(sc);
 526         else
 527                 sc->rx.rxlink = NULL;
 528
 529         return stopped;
 530 }
 531
 532 void ath_flushrecv(struct ath_softc *sc)
 533 {
 534         spin_lock_bh(&sc->rx.rxflushlock);
 535         sc->sc_flags |= SC_OP_RXFLUSH;
 536         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 537                 ath_rx_tasklet(sc, 1, true);
 538         ath_rx_tasklet(sc, 1, false);
 539         sc->sc_flags &= ~SC_OP_RXFLUSH;
 540         spin_unlock_bh(&sc->rx.rxflushlock);
 541 }
 542
 543 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
 544 {
 545         /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
 546         struct ieee80211_mgmt *mgmt;
 547         u8 *pos, *end, id, elen;
 548         struct ieee80211_tim_ie *tim;
 549
 550         mgmt = (struct ieee80211_mgmt *)skb->data;
 551         pos = mgmt->u.beacon.variable;
 552         end = skb->data + skb->len;
 553
 554         while (pos + 2 < end) {
 555                 id = *pos++;
 556                 elen = *pos++;
 557                 if (pos + elen > end)
 558                         break;
 559
 560                 if (id == WLAN_EID_TIM) {
 561                         if (elen < sizeof(*tim))
 562                                 break;
 563                         tim = (struct ieee80211_tim_ie *) pos;
 564                         if (tim->dtim_count != 0)
 565                                 break;
 566                         return tim->bitmap_ctrl & 0x01;
 567                 }
 568
 569                 pos += elen;
 570         }
 571
 572         return false;
 573 }
 574
 575 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
 576 {
 577         struct ieee80211_mgmt *mgmt;
 578         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 579
 580         if (skb->len < 24 + 8 + 2 + 2)
 581                 return;
 582
 583         mgmt = (struct ieee80211_mgmt *)skb->data;
 584         if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
 585                 return; /* not from our current AP */
 586
 587         sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
 588
 589         if (sc->ps_flags & PS_BEACON_SYNC) {
 590                 sc->ps_flags &= ~PS_BEACON_SYNC;
 591                 ath_print(common, ATH_DBG_PS,
 592                           "Reconfigure Beacon timers based on "
 593                           "timestamp from the AP\n");
 594                 ath_beacon_config(sc, NULL);
 595         }
 596
 597         if (ath_beacon_dtim_pending_cab(skb)) {
 598                 /*
 599                  * Remain awake waiting for buffered broadcast/multicast
 600                  * frames. If the last broadcast/multicast frame is not
 601                  * received properly, the next beacon frame will work as
 602                  * a backup trigger for returning into NETWORK SLEEP state,
 603                  * so we are waiting for it as well.
 604                  */
 605                 ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
 606                           "buffered broadcast/multicast frame(s)\n");
 607                 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
 608                 return;
 609         }
 610
 611         if (sc->ps_flags & PS_WAIT_FOR_CAB) {
 612                 /*
 613                  * This can happen if a broadcast frame is dropped or the AP
 614                  * fails to send a frame indicating that all CAB frames have
 615                  * been delivered.
 616                  */
 617                 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
 618                 ath_print(common, ATH_DBG_PS,
 619                           "PS wait for CAB frames timed out\n");
 620         }
 621 }
 622
 623 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
 624 {
 625         struct ieee80211_hdr *hdr;
 626         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 627
 628         hdr = (struct ieee80211_hdr *)skb->data;
 629
 630         /* Process Beacon and CAB receive in PS state */
 631         if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
 632             && ieee80211_is_beacon(hdr->frame_control))
 633                 ath_rx_ps_beacon(sc, skb);
 634         else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
 635                  (ieee80211_is_data(hdr->frame_control) ||
 636                   ieee80211_is_action(hdr->frame_control)) &&
 637                  is_multicast_ether_addr(hdr->addr1) &&
 638                  !ieee80211_has_moredata(hdr->frame_control)) {
 639                 /*
 640                  * No more broadcast/multicast frames to be received at this
 641                  * point.
 642                  */
 643                 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
 644                 ath_print(common, ATH_DBG_PS,
 645                           "All PS CAB frames received, back to sleep\n");
 646         } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
 647                    !is_multicast_ether_addr(hdr->addr1) &&
 648                    !ieee80211_has_morefrags(hdr->frame_control)) {
 649                 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
 650                 ath_print(common, ATH_DBG_PS,
 651                           "Going back to sleep after having received "
 652                           "PS-Poll data (0x%lx)\n",
 653                         sc->ps_flags & (PS_WAIT_FOR_BEACON |
 654                                         PS_WAIT_FOR_CAB |
 655                                         PS_WAIT_FOR_PSPOLL_DATA |
 656                                         PS_WAIT_FOR_TX_ACK));
 657         }
 658 }
 659
 660 static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
 661                                     struct ath_softc *sc, struct sk_buff *skb,
 662                                     struct ieee80211_rx_status *rxs)
 663 {
 664         struct ieee80211_hdr *hdr;
 665
 666         hdr = (struct ieee80211_hdr *)skb->data;
 667
 668         /* Send the frame to mac80211 */
 669         if (is_multicast_ether_addr(hdr->addr1)) {
 670                 int i;
 671                 /*
 672                  * Deliver broadcast/multicast frames to all suitable
 673                  * virtual wiphys.
 674                  */
 675                 /* TODO: filter based on channel configuration */
 676                 for (i = 0; i < sc->num_sec_wiphy; i++) {
 677                         struct ath_wiphy *aphy = sc->sec_wiphy[i];
 678                         struct sk_buff *nskb;
 679                         if (aphy == NULL)
 680                                 continue;
 681                         nskb = skb_copy(skb, GFP_ATOMIC);
 682                         if (!nskb)
 683                                 continue;
 684                         ieee80211_rx(aphy->hw, nskb);
 685                 }
 686                 ieee80211_rx(sc->hw, skb);
 687         } else
 688                 /* Deliver unicast frames based on receiver address */
 689                 ieee80211_rx(hw, skb);
 690 }
 691
 692 static bool ath_edma_get_buffers(struct ath_softc *sc,
 693                                  enum ath9k_rx_qtype qtype)
 694 {
 695         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 696         struct ath_hw *ah = sc->sc_ah;
 697         struct ath_common *common = ath9k_hw_common(ah);
 698         struct sk_buff *skb;
 699         struct ath_buf *bf;
 700         int ret;
 701
 702         skb = skb_peek(&rx_edma->rx_fifo);
 703         if (!skb)
 704                 return false;
 705
 706         bf = SKB_CB_ATHBUF(skb);
 707         BUG_ON(!bf);
 708
 709         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
 710                                 common->rx_bufsize, DMA_FROM_DEVICE);
 711
 712         ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
 713         if (ret == -EINPROGRESS) {
 714                 /*let device gain the buffer again*/
 715                 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 716                                 common->rx_bufsize, DMA_FROM_DEVICE);
 717                 return false;
 718         }
 719
 720         __skb_unlink(skb, &rx_edma->rx_fifo);
 721         if (ret == -EINVAL) {
 722                 /* corrupt descriptor, skip this one and the following one */
 723                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 724                 ath_rx_edma_buf_link(sc, qtype);
 725                 skb = skb_peek(&rx_edma->rx_fifo);
 726                 if (!skb)
 727                         return true;
 728
 729                 bf = SKB_CB_ATHBUF(skb);
 730                 BUG_ON(!bf);
 731
 732                 __skb_unlink(skb, &rx_edma->rx_fifo);
 733                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 734                 ath_rx_edma_buf_link(sc, qtype);
 735                 return true;
 736         }
 737         skb_queue_tail(&rx_edma->rx_buffers, skb);
 738
 739         return true;
 740 }
 741
 742 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
 743                                                 struct ath_rx_status *rs,
 744                                                 enum ath9k_rx_qtype qtype)
 745 {
 746         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 747         struct sk_buff *skb;
 748         struct ath_buf *bf;
 749
 750         while (ath_edma_get_buffers(sc, qtype));
 751         skb = __skb_dequeue(&rx_edma->rx_buffers);
 752         if (!skb)
 753                 return NULL;
 754
 755         bf = SKB_CB_ATHBUF(skb);
 756         ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
 757         return bf;
 758 }
 759
 760 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
 761                                            struct ath_rx_status *rs)
 762 {
 763         struct ath_hw *ah = sc->sc_ah;
 764         struct ath_common *common = ath9k_hw_common(ah);
 765         struct ath_desc *ds;
 766         struct ath_buf *bf;
 767         int ret;
 768
 769         if (list_empty(&sc->rx.rxbuf)) {
 770                 sc->rx.rxlink = NULL;
 771                 return NULL;
 772         }
 773
 774         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 775         ds = bf->bf_desc;
 776
 777         /*
 778          * Must provide the virtual address of the current
 779          * descriptor, the physical address, and the virtual
 780          * address of the next descriptor in the h/w chain.
 781          * This allows the HAL to look ahead to see if the
 782          * hardware is done with a descriptor by checking the
 783          * done bit in the following descriptor and the address
 784          * of the current descriptor the DMA engine is working
 785          * on.  All this is necessary because of our use of
 786          * a self-linked list to avoid rx overruns.
 787          */
 788         ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
 789         if (ret == -EINPROGRESS) {
 790                 struct ath_rx_status trs;
 791                 struct ath_buf *tbf;
 792                 struct ath_desc *tds;
 793
 794                 memset(&trs, 0, sizeof(trs));
 795                 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
 796                         sc->rx.rxlink = NULL;
 797                         return NULL;
 798                 }
 799
 800                 tbf = list_entry(bf->list.next, struct ath_buf, list);
 801
 802                 /*
 803                  * On some hardware the descriptor status words could
 804                  * get corrupted, including the done bit. Because of
 805                  * this, check if the next descriptor's done bit is
 806                  * set or not.
 807                  *
 808                  * If the next descriptor's done bit is set, the current
 809                  * descriptor has been corrupted. Force s/w to discard
 810                  * this descriptor and continue...
 811                  */
 812
 813                 tds = tbf->bf_desc;
 814                 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
 815                 if (ret == -EINPROGRESS)
 816                         return NULL;
 817         }
 818
 819         if (!bf->bf_mpdu)
 820                 return bf;
 821
 822         /*
 823          * Synchronize the DMA transfer with CPU before
 824          * 1. accessing the frame
 825          * 2. requeueing the same buffer to h/w
 826          */
 827         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
 828                         common->rx_bufsize,
 829                         DMA_FROM_DEVICE);
 830
 831         return bf;
 832 }
 833
 834 /* Assumes you've already done the endian to CPU conversion */
 835 static bool ath9k_rx_accept(struct ath_common *common,
 836                             struct ieee80211_hdr *hdr,
 837                             struct ieee80211_rx_status *rxs,
 838                             struct ath_rx_status *rx_stats,
 839                             bool *decrypt_error)
 840 {
 841         struct ath_hw *ah = common->ah;
 842         __le16 fc;
 843         u8 rx_status_len = ah->caps.rx_status_len;
 844
 845         fc = hdr->frame_control;
 846
 847         if (!rx_stats->rs_datalen)
 848                 return false;
 849         /*
 850          * rs_status follows rs_datalen so if rs_datalen is too large
 851          * we can take a hint that hardware corrupted it, so ignore
 852          * those frames.
 853          */
 854         if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
 855                 return false;
 856
 857         /*
 858          * rs_more indicates chained descriptors which can be used
 859          * to link buffers together for a sort of scatter-gather
 860          * operation.
 861          * reject the frame, we don't support scatter-gather yet and
 862          * the frame is probably corrupt anyway
 863          */
 864         if (rx_stats->rs_more)
 865                 return false;
 866
 867         /*
 868          * The rx_stats->rs_status will not be set until the end of the
 869          * chained descriptors so it can be ignored if rs_more is set. The
 870          * rs_more will be false at the last element of the chained
 871          * descriptors.
 872          */
 873         if (rx_stats->rs_status != 0) {
 874                 if (rx_stats->rs_status & ATH9K_RXERR_CRC)
 875                         rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
 876                 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
 877                         return false;
 878
 879                 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
 880                         *decrypt_error = true;
 881                 } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
 882                         /*
 883                          * The MIC error bit is only valid if the frame
 884                          * is not a control frame or fragment, and it was
 885                          * decrypted using a valid TKIP key.
 886                          */
 887                         if (!ieee80211_is_ctl(fc) &&
 888                             !ieee80211_has_morefrags(fc) &&
 889                             !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
 890                             test_bit(rx_stats->rs_keyix, common->tkip_keymap))
 891                                 rxs->flag |= RX_FLAG_MMIC_ERROR;
 892                         else
 893                                 rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
 894                 }
 895                 /*
 896                  * Reject error frames with the exception of
 897                  * decryption and MIC failures. For monitor mode,
 898                  * we also ignore the CRC error.
 899                  */
 900                 if (ah->opmode == NL80211_IFTYPE_MONITOR) {
 901                         if (rx_stats->rs_status &
 902                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
 903                               ATH9K_RXERR_CRC))
 904                                 return false;
 905                 } else {
 906                         if (rx_stats->rs_status &
 907                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
 908                                 return false;
 909                         }
 910                 }
 911         }
 912         return true;
 913 }
 914
 915 static int ath9k_process_rate(struct ath_common *common,
 916                               struct ieee80211_hw *hw,
 917                               struct ath_rx_status *rx_stats,
 918                               struct ieee80211_rx_status *rxs)
 919 {
 920         struct ieee80211_supported_band *sband;
 921         enum ieee80211_band band;
 922         unsigned int i = 0;
 923
 924         band = hw->conf.channel->band;
 925         sband = hw->wiphy->bands[band];
 926
 927         if (rx_stats->rs_rate & 0x80) {
 928                 /* HT rate */
 929                 rxs->flag |= RX_FLAG_HT;
 930                 if (rx_stats->rs_flags & ATH9K_RX_2040)
 931                         rxs->flag |= RX_FLAG_40MHZ;
 932                 if (rx_stats->rs_flags & ATH9K_RX_GI)
 933                         rxs->flag |= RX_FLAG_SHORT_GI;
 934                 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
 935                 return 0;
 936         }
 937
 938         for (i = 0; i < sband->n_bitrates; i++) {
 939                 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
 940                         rxs->rate_idx = i;
 941                         return 0;
 942                 }
 943                 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
 944                         rxs->flag |= RX_FLAG_SHORTPRE;
 945                         rxs->rate_idx = i;
 946                         return 0;
 947                 }
 948         }
 949
 950         /*
 951          * No valid hardware bitrate found -- we should not get here
 952          * because hardware has already validated this frame as OK.
 953          */
 954         ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected "
 955                   "0x%02x using 1 Mbit\n", rx_stats->rs_rate);
 956
 957         return -EINVAL;
 958 }
 959
 960 static void ath9k_process_rssi(struct ath_common *common,
 961                                struct ieee80211_hw *hw,
 962                                struct ieee80211_hdr *hdr,
 963                                struct ath_rx_status *rx_stats)
 964 {
 965         struct ath_hw *ah = common->ah;
 966         struct ieee80211_sta *sta;
 967         struct ath_node *an;
 968         int last_rssi = ATH_RSSI_DUMMY_MARKER;
 969         __le16 fc;
 970
 971         fc = hdr->frame_control;
 972
 973         rcu_read_lock();
 974         /*
 975          * XXX: use ieee80211_find_sta! This requires quite a bit of work
 976          * under the current ath9k virtual wiphy implementation as we have
 977          * no way of tying a vif to wiphy. Typically vifs are attached to
 978          * at least one sdata of a wiphy on mac80211 but with ath9k virtual
 979          * wiphy you'd have to iterate over every wiphy and each sdata.
 980          */
 981         sta = ieee80211_find_sta_by_hw(hw, hdr->addr2);
 982         if (sta) {
 983                 an = (struct ath_node *) sta->drv_priv;
 984                 if (rx_stats->rs_rssi != ATH9K_RSSI_BAD &&
 985                    !rx_stats->rs_moreaggr)
 986                         ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi);
 987                 last_rssi = an->last_rssi;
 988         }
 989         rcu_read_unlock();
 990
 991         if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
 992                 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
 993                                               ATH_RSSI_EP_MULTIPLIER);
 994         if (rx_stats->rs_rssi < 0)
 995                 rx_stats->rs_rssi = 0;
 996
 997         /* Update Beacon RSSI, this is used by ANI. */
 998         if (ieee80211_is_beacon(fc))
 999                 ah->stats.avgbrssi = rx_stats->rs_rssi;
1000 }
1001
1002 /*
1003  * For Decrypt or Demic errors, we only mark packet status here and always push
1004  * up the frame up to let mac80211 handle the actual error case, be it no
1005  * decryption key or real decryption error. This let us keep statistics there.
1006  */
1007 static int ath9k_rx_skb_preprocess(struct ath_common *common,
1008                                    struct ieee80211_hw *hw,
1009                                    struct ieee80211_hdr *hdr,
1010                                    struct ath_rx_status *rx_stats,
1011                                    struct ieee80211_rx_status *rx_status,
1012                                    bool *decrypt_error)
1013 {
1014         memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
1015
1016         /*
1017          * everything but the rate is checked here, the rate check is done
1018          * separately to avoid doing two lookups for a rate for each frame.
1019          */
1020         if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
1021                 return -EINVAL;
1022
1023         ath9k_process_rssi(common, hw, hdr, rx_stats);
1024
1025         if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1026                 return -EINVAL;
1027
1028         rx_status->band = hw->conf.channel->band;
1029         rx_status->freq = hw->conf.channel->center_freq;
1030         rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
1031         rx_status->antenna = rx_stats->rs_antenna;
1032         rx_status->flag |= RX_FLAG_TSFT;
1033
1034         return 0;
1035 }
1036
1037 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1038                                      struct sk_buff *skb,
1039                                      struct ath_rx_status *rx_stats,
1040                                      struct ieee80211_rx_status *rxs,
1041                                      bool decrypt_error)
1042 {
1043         struct ath_hw *ah = common->ah;
1044         struct ieee80211_hdr *hdr;
1045         int hdrlen, padpos, padsize;
1046         u8 keyix;
1047         __le16 fc;
1048
1049         /* see if any padding is done by the hw and remove it */
1050         hdr = (struct ieee80211_hdr *) skb->data;
1051         hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1052         fc = hdr->frame_control;
1053         padpos = ath9k_cmn_padpos(hdr->frame_control);
1054
1055         /* The MAC header is padded to have 32-bit boundary if the
1056          * packet payload is non-zero. The general calculation for
1057          * padsize would take into account odd header lengths:
1058          * padsize = (4 - padpos % 4) % 4; However, since only
1059          * even-length headers are used, padding can only be 0 or 2
1060          * bytes and we can optimize this a bit. In addition, we must
1061          * not try to remove padding from short control frames that do
1062          * not have payload. */
1063         padsize = padpos & 3;
1064         if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1065                 memmove(skb->data + padsize, skb->data, padpos);
1066                 skb_pull(skb, padsize);
1067         }
1068
1069         keyix = rx_stats->rs_keyix;
1070
1071         if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1072             ieee80211_has_protected(fc)) {
1073                 rxs->flag |= RX_FLAG_DECRYPTED;
1074         } else if (ieee80211_has_protected(fc)
1075                    && !decrypt_error && skb->len >= hdrlen + 4) {
1076                 keyix = skb->data[hdrlen + 3] >> 6;
1077
1078                 if (test_bit(keyix, common->keymap))
1079                         rxs->flag |= RX_FLAG_DECRYPTED;
1080         }
1081         if (ah->sw_mgmt_crypto &&
1082             (rxs->flag & RX_FLAG_DECRYPTED) &&
1083             ieee80211_is_mgmt(fc))
1084                 /* Use software decrypt for management frames. */
1085                 rxs->flag &= ~RX_FLAG_DECRYPTED;
1086 }
1087
1088 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1089                                       struct ath_hw_antcomb_conf ant_conf,
1090                                       int main_rssi_avg)
1091 {
1092         antcomb->quick_scan_cnt = 0;
1093
1094         if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1095                 antcomb->rssi_lna2 = main_rssi_avg;
1096         else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1097                 antcomb->rssi_lna1 = main_rssi_avg;
1098
1099         switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1100         case (0x10): /* LNA2 A-B */
1101                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1102                 antcomb->first_quick_scan_conf =
1103                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1104                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1105                 break;
1106         case (0x20): /* LNA1 A-B */
1107                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1108                 antcomb->first_quick_scan_conf =
1109                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1110                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1111                 break;
1112         case (0x21): /* LNA1 LNA2 */
1113                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1114                 antcomb->first_quick_scan_conf =
1115                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1116                 antcomb->second_quick_scan_conf =
1117                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1118                 break;
1119         case (0x12): /* LNA2 LNA1 */
1120                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1121                 antcomb->first_quick_scan_conf =
1122                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1123                 antcomb->second_quick_scan_conf =
1124                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1125                 break;
1126         case (0x13): /* LNA2 A+B */
1127                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1128                 antcomb->first_quick_scan_conf =
1129                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1130                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1131                 break;
1132         case (0x23): /* LNA1 A+B */
1133                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1134                 antcomb->first_quick_scan_conf =
1135                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1136                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1137                 break;
1138         default:
1139                 break;
1140         }
1141 }
1142
1143 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1144                                 struct ath_hw_antcomb_conf *div_ant_conf,
1145                                 int main_rssi_avg, int alt_rssi_avg,
1146                                 int alt_ratio)
1147 {
1148         /* alt_good */
1149         switch (antcomb->quick_scan_cnt) {
1150         case 0:
1151                 /* set alt to main, and alt to first conf */
1152                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1153                 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1154                 break;
1155         case 1:
1156                 /* set alt to main, and alt to first conf */
1157                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1158                 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1159                 antcomb->rssi_first = main_rssi_avg;
1160                 antcomb->rssi_second = alt_rssi_avg;
1161
1162                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1163                         /* main is LNA1 */
1164                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1165                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1166                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1167                                                 main_rssi_avg, alt_rssi_avg,
1168                                                 antcomb->total_pkt_count))
1169                                 antcomb->first_ratio = true;
1170                         else
1171                                 antcomb->first_ratio = false;
1172                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1173                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1174                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1175                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1176                                                 main_rssi_avg, alt_rssi_avg,
1177                                                 antcomb->total_pkt_count))
1178                                 antcomb->first_ratio = true;
1179                         else
1180                                 antcomb->first_ratio = false;
1181                 } else {
1182                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1183                             (alt_rssi_avg > main_rssi_avg +
1184                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1185                             (alt_rssi_avg > main_rssi_avg)) &&
1186                             (antcomb->total_pkt_count > 50))
1187                                 antcomb->first_ratio = true;
1188                         else
1189                                 antcomb->first_ratio = false;
1190                 }
1191                 break;
1192         case 2:
1193                 antcomb->alt_good = false;
1194                 antcomb->scan_not_start = false;
1195                 antcomb->scan = false;
1196                 antcomb->rssi_first = main_rssi_avg;
1197                 antcomb->rssi_third = alt_rssi_avg;
1198
1199                 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1200                         antcomb->rssi_lna1 = alt_rssi_avg;
1201                 else if (antcomb->second_quick_scan_conf ==
1202                          ATH_ANT_DIV_COMB_LNA2)
1203                         antcomb->rssi_lna2 = alt_rssi_avg;
1204                 else if (antcomb->second_quick_scan_conf ==
1205                          ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1206                         if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1207                                 antcomb->rssi_lna2 = main_rssi_avg;
1208                         else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1209                                 antcomb->rssi_lna1 = main_rssi_avg;
1210                 }
1211
1212                 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1213                     ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1214                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1215                 else
1216                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1217
1218                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1219                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1220                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1221                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1222                                                 main_rssi_avg, alt_rssi_avg,
1223                                                 antcomb->total_pkt_count))
1224                                 antcomb->second_ratio = true;
1225                         else
1226                                 antcomb->second_ratio = false;
1227                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1228                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1229                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1230                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1231                                                 main_rssi_avg, alt_rssi_avg,
1232                                                 antcomb->total_pkt_count))
1233                                 antcomb->second_ratio = true;
1234                         else
1235                                 antcomb->second_ratio = false;
1236                 } else {
1237                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1238                             (alt_rssi_avg > main_rssi_avg +
1239                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1240                             (alt_rssi_avg > main_rssi_avg)) &&
1241                             (antcomb->total_pkt_count > 50))
1242                                 antcomb->second_ratio = true;
1243                         else
1244                                 antcomb->second_ratio = false;
1245                 }
1246
1247                 /* set alt to the conf with maximun ratio */
1248                 if (antcomb->first_ratio && antcomb->second_ratio) {
1249                         if (antcomb->rssi_second > antcomb->rssi_third) {
1250                                 /* first alt*/
1251                                 if ((antcomb->first_quick_scan_conf ==
1252                                     ATH_ANT_DIV_COMB_LNA1) ||
1253                                     (antcomb->first_quick_scan_conf ==
1254                                     ATH_ANT_DIV_COMB_LNA2))
1255                                         /* Set alt LNA1 or LNA2*/
1256                                         if (div_ant_conf->main_lna_conf ==
1257                                             ATH_ANT_DIV_COMB_LNA2)
1258                                                 div_ant_conf->alt_lna_conf =
1259                                                         ATH_ANT_DIV_COMB_LNA1;
1260                                         else
1261                                                 div_ant_conf->alt_lna_conf =
1262                                                         ATH_ANT_DIV_COMB_LNA2;
1263                                 else
1264                                         /* Set alt to A+B or A-B */
1265                                         div_ant_conf->alt_lna_conf =
1266                                                 antcomb->first_quick_scan_conf;
1267                         } else if ((antcomb->second_quick_scan_conf ==
1268                                    ATH_ANT_DIV_COMB_LNA1) ||
1269                                    (antcomb->second_quick_scan_conf ==
1270                                    ATH_ANT_DIV_COMB_LNA2)) {
1271                                 /* Set alt LNA1 or LNA2 */
1272                                 if (div_ant_conf->main_lna_conf ==
1273                                     ATH_ANT_DIV_COMB_LNA2)
1274                                         div_ant_conf->alt_lna_conf =
1275                                                 ATH_ANT_DIV_COMB_LNA1;
1276                                 else
1277                                         div_ant_conf->alt_lna_conf =
1278                                                 ATH_ANT_DIV_COMB_LNA2;
1279                         } else {
1280                                 /* Set alt to A+B or A-B */
1281                                 div_ant_conf->alt_lna_conf =
1282                                         antcomb->second_quick_scan_conf;
1283                         }
1284                 } else if (antcomb->first_ratio) {
1285                         /* first alt */
1286                         if ((antcomb->first_quick_scan_conf ==
1287                             ATH_ANT_DIV_COMB_LNA1) ||
1288                             (antcomb->first_quick_scan_conf ==
1289                             ATH_ANT_DIV_COMB_LNA2))
1290                                         /* Set alt LNA1 or LNA2 */
1291                                 if (div_ant_conf->main_lna_conf ==
1292                                     ATH_ANT_DIV_COMB_LNA2)
1293                                         div_ant_conf->alt_lna_conf =
1294                                                         ATH_ANT_DIV_COMB_LNA1;
1295                                 else
1296                                         div_ant_conf->alt_lna_conf =
1297                                                         ATH_ANT_DIV_COMB_LNA2;
1298                         else
1299                                 /* Set alt to A+B or A-B */
1300                                 div_ant_conf->alt_lna_conf =
1301                                                 antcomb->first_quick_scan_conf;
1302                 } else if (antcomb->second_ratio) {
1303                                 /* second alt */
1304                         if ((antcomb->second_quick_scan_conf ==
1305                             ATH_ANT_DIV_COMB_LNA1) ||
1306                             (antcomb->second_quick_scan_conf ==
1307                             ATH_ANT_DIV_COMB_LNA2))
1308                                 /* Set alt LNA1 or LNA2 */
1309                                 if (div_ant_conf->main_lna_conf ==
1310                                     ATH_ANT_DIV_COMB_LNA2)
1311                                         div_ant_conf->alt_lna_conf =
1312                                                 ATH_ANT_DIV_COMB_LNA1;
1313                                 else
1314                                         div_ant_conf->alt_lna_conf =
1315                                                 ATH_ANT_DIV_COMB_LNA2;
1316                         else
1317                                 /* Set alt to A+B or A-B */
1318                                 div_ant_conf->alt_lna_conf =
1319                                                 antcomb->second_quick_scan_conf;
1320                 } else {
1321                         /* main is largest */
1322                         if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1323                             (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1324                                 /* Set alt LNA1 or LNA2 */
1325                                 if (div_ant_conf->main_lna_conf ==
1326                                     ATH_ANT_DIV_COMB_LNA2)
1327                                         div_ant_conf->alt_lna_conf =
1328                                                         ATH_ANT_DIV_COMB_LNA1;
1329                                 else
1330                                         div_ant_conf->alt_lna_conf =
1331                                                         ATH_ANT_DIV_COMB_LNA2;
1332                         else
1333                                 /* Set alt to A+B or A-B */
1334                                 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1335                 }
1336                 break;
1337         default:
1338                 break;
1339         }
1340 }
1341
1342 void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf)
1343 {
1344         /* Adjust the fast_div_bias based on main and alt lna conf */
1345         switch ((ant_conf->main_lna_conf << 4) | ant_conf->alt_lna_conf) {
1346         case (0x01): /* A-B LNA2 */
1347                 ant_conf->fast_div_bias = 0x3b;
1348                 break;
1349         case (0x02): /* A-B LNA1 */
1350                 ant_conf->fast_div_bias = 0x3d;
1351                 break;
1352         case (0x03): /* A-B A+B */
1353                 ant_conf->fast_div_bias = 0x1;
1354                 break;
1355         case (0x10): /* LNA2 A-B */
1356                 ant_conf->fast_div_bias = 0x7;
1357                 break;
1358         case (0x12): /* LNA2 LNA1 */
1359                 ant_conf->fast_div_bias = 0x2;
1360                 break;
1361         case (0x13): /* LNA2 A+B */
1362                 ant_conf->fast_div_bias = 0x7;
1363                 break;
1364         case (0x20): /* LNA1 A-B */
1365                 ant_conf->fast_div_bias = 0x6;
1366                 break;
1367         case (0x21): /* LNA1 LNA2 */
1368                 ant_conf->fast_div_bias = 0x0;
1369                 break;
1370         case (0x23): /* LNA1 A+B */
1371                 ant_conf->fast_div_bias = 0x6;
1372                 break;
1373         case (0x30): /* A+B A-B */
1374                 ant_conf->fast_div_bias = 0x1;
1375                 break;
1376         case (0x31): /* A+B LNA2 */
1377                 ant_conf->fast_div_bias = 0x3b;
1378                 break;
1379         case (0x32): /* A+B LNA1 */
1380                 ant_conf->fast_div_bias = 0x3d;
1381                 break;
1382         default:
1383                 break;
1384         }
1385 }
1386
1387 /* Antenna diversity and combining */
1388 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1389 {
1390         struct ath_hw_antcomb_conf div_ant_conf;
1391         struct ath_ant_comb *antcomb = &sc->ant_comb;
1392         int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1393         int curr_main_set, curr_bias;
1394         int main_rssi = rs->rs_rssi_ctl0;
1395         int alt_rssi = rs->rs_rssi_ctl1;
1396         int rx_ant_conf,  main_ant_conf;
1397         bool short_scan = false;
1398
1399         rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1400                        ATH_ANT_RX_MASK;
1401         main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1402                          ATH_ANT_RX_MASK;
1403
1404         /* Record packet only when alt_rssi is positive */
1405         if (alt_rssi > 0) {
1406                 antcomb->total_pkt_count++;
1407                 antcomb->main_total_rssi += main_rssi;
1408                 antcomb->alt_total_rssi  += alt_rssi;
1409                 if (main_ant_conf == rx_ant_conf)
1410                         antcomb->main_recv_cnt++;
1411                 else
1412                         antcomb->alt_recv_cnt++;
1413         }
1414
1415         /* Short scan check */
1416         if (antcomb->scan && antcomb->alt_good) {
1417                 if (time_after(jiffies, antcomb->scan_start_time +
1418                     msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1419                         short_scan = true;
1420                 else
1421                         if (antcomb->total_pkt_count ==
1422                             ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1423                                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1424                                             antcomb->total_pkt_count);
1425                                 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1426                                         short_scan = true;
1427                         }
1428         }
1429
1430         if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1431             rs->rs_moreaggr) && !short_scan)
1432                 return;
1433
1434         if (antcomb->total_pkt_count) {
1435                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1436                              antcomb->total_pkt_count);
1437                 main_rssi_avg = (antcomb->main_total_rssi /
1438                                  antcomb->total_pkt_count);
1439                 alt_rssi_avg = (antcomb->alt_total_rssi /
1440                                  antcomb->total_pkt_count);
1441         }
1442
1443
1444         ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1445         curr_alt_set = div_ant_conf.alt_lna_conf;
1446         curr_main_set = div_ant_conf.main_lna_conf;
1447         curr_bias = div_ant_conf.fast_div_bias;
1448
1449         antcomb->count++;
1450
1451         if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1452                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1453                         ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1454                                                   main_rssi_avg);
1455                         antcomb->alt_good = true;
1456                 } else {
1457                         antcomb->alt_good = false;
1458                 }
1459
1460                 antcomb->count = 0;
1461                 antcomb->scan = true;
1462                 antcomb->scan_not_start = true;
1463         }
1464
1465         if (!antcomb->scan) {
1466                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1467                         if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1468                                 /* Switch main and alt LNA */
1469                                 div_ant_conf.main_lna_conf =
1470                                                 ATH_ANT_DIV_COMB_LNA2;
1471                                 div_ant_conf.alt_lna_conf  =
1472                                                 ATH_ANT_DIV_COMB_LNA1;
1473                         } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1474                                 div_ant_conf.main_lna_conf =
1475                                                 ATH_ANT_DIV_COMB_LNA1;
1476                                 div_ant_conf.alt_lna_conf  =
1477                                                 ATH_ANT_DIV_COMB_LNA2;
1478                         }
1479
1480                         goto div_comb_done;
1481                 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1482                            (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1483                         /* Set alt to another LNA */
1484                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1485                                 div_ant_conf.alt_lna_conf =
1486                                                 ATH_ANT_DIV_COMB_LNA1;
1487                         else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1488                                 div_ant_conf.alt_lna_conf =
1489                                                 ATH_ANT_DIV_COMB_LNA2;
1490
1491                         goto div_comb_done;
1492                 }
1493
1494                 if ((alt_rssi_avg < (main_rssi_avg +
1495                     ATH_ANT_DIV_COMB_LNA1_LNA2_DELTA)))
1496                         goto div_comb_done;
1497         }
1498
1499         if (!antcomb->scan_not_start) {
1500                 switch (curr_alt_set) {
1501                 case ATH_ANT_DIV_COMB_LNA2:
1502                         antcomb->rssi_lna2 = alt_rssi_avg;
1503                         antcomb->rssi_lna1 = main_rssi_avg;
1504                         antcomb->scan = true;
1505                         /* set to A+B */
1506                         div_ant_conf.main_lna_conf =
1507                                 ATH_ANT_DIV_COMB_LNA1;
1508                         div_ant_conf.alt_lna_conf  =
1509                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1510                         break;
1511                 case ATH_ANT_DIV_COMB_LNA1:
1512                         antcomb->rssi_lna1 = alt_rssi_avg;
1513                         antcomb->rssi_lna2 = main_rssi_avg;
1514                         antcomb->scan = true;
1515                         /* set to A+B */
1516                         div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1517                         div_ant_conf.alt_lna_conf  =
1518                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1519                         break;
1520                 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1521                         antcomb->rssi_add = alt_rssi_avg;
1522                         antcomb->scan = true;
1523                         /* set to A-B */
1524                         div_ant_conf.alt_lna_conf =
1525                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1526                         break;
1527                 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1528                         antcomb->rssi_sub = alt_rssi_avg;
1529                         antcomb->scan = false;
1530                         if (antcomb->rssi_lna2 >
1531                             (antcomb->rssi_lna1 +
1532                             ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1533                                 /* use LNA2 as main LNA */
1534                                 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1535                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1536                                         /* set to A+B */
1537                                         div_ant_conf.main_lna_conf =
1538                                                 ATH_ANT_DIV_COMB_LNA2;
1539                                         div_ant_conf.alt_lna_conf  =
1540                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1541                                 } else if (antcomb->rssi_sub >
1542                                            antcomb->rssi_lna1) {
1543                                         /* set to A-B */
1544                                         div_ant_conf.main_lna_conf =
1545                                                 ATH_ANT_DIV_COMB_LNA2;
1546                                         div_ant_conf.alt_lna_conf =
1547                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1548                                 } else {
1549                                         /* set to LNA1 */
1550                                         div_ant_conf.main_lna_conf =
1551                                                 ATH_ANT_DIV_COMB_LNA2;
1552                                         div_ant_conf.alt_lna_conf =
1553                                                 ATH_ANT_DIV_COMB_LNA1;
1554                                 }
1555                         } else {
1556                                 /* use LNA1 as main LNA */
1557                                 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1558                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1559                                         /* set to A+B */
1560                                         div_ant_conf.main_lna_conf =
1561                                                 ATH_ANT_DIV_COMB_LNA1;
1562                                         div_ant_conf.alt_lna_conf  =
1563                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1564                                 } else if (antcomb->rssi_sub >
1565                                            antcomb->rssi_lna1) {
1566                                         /* set to A-B */
1567                                         div_ant_conf.main_lna_conf =
1568                                                 ATH_ANT_DIV_COMB_LNA1;
1569                                         div_ant_conf.alt_lna_conf =
1570                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1571                                 } else {
1572                                         /* set to LNA2 */
1573                                         div_ant_conf.main_lna_conf =
1574                                                 ATH_ANT_DIV_COMB_LNA1;
1575                                         div_ant_conf.alt_lna_conf =
1576                                                 ATH_ANT_DIV_COMB_LNA2;
1577                                 }
1578                         }
1579                         break;
1580                 default:
1581                         break;
1582                 }
1583         } else {
1584                 if (!antcomb->alt_good) {
1585                         antcomb->scan_not_start = false;
1586                         /* Set alt to another LNA */
1587                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1588                                 div_ant_conf.main_lna_conf =
1589                                                 ATH_ANT_DIV_COMB_LNA2;
1590                                 div_ant_conf.alt_lna_conf =
1591                                                 ATH_ANT_DIV_COMB_LNA1;
1592                         } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1593                                 div_ant_conf.main_lna_conf =
1594                                                 ATH_ANT_DIV_COMB_LNA1;
1595                                 div_ant_conf.alt_lna_conf =
1596                                                 ATH_ANT_DIV_COMB_LNA2;
1597                         }
1598                         goto div_comb_done;
1599                 }
1600         }
1601
1602         ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1603                                            main_rssi_avg, alt_rssi_avg,
1604                                            alt_ratio);
1605
1606         antcomb->quick_scan_cnt++;
1607
1608 div_comb_done:
1609         ath_ant_div_conf_fast_divbias(&div_ant_conf);
1610
1611         ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1612
1613         antcomb->scan_start_time = jiffies;
1614         antcomb->total_pkt_count = 0;
1615         antcomb->main_total_rssi = 0;
1616         antcomb->alt_total_rssi = 0;
1617         antcomb->main_recv_cnt = 0;
1618         antcomb->alt_recv_cnt = 0;
1619 }
1620
1621 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1622 {
1623         struct ath_buf *bf;
1624         struct sk_buff *skb = NULL, *requeue_skb;
1625         struct ieee80211_rx_status *rxs;
1626         struct ath_hw *ah = sc->sc_ah;
1627         struct ath_common *common = ath9k_hw_common(ah);
1628         /*
1629          * The hw can techncically differ from common->hw when using ath9k
1630          * virtual wiphy so to account for that we iterate over the active
1631          * wiphys and find the appropriate wiphy and therefore hw.
1632          */
1633         struct ieee80211_hw *hw = NULL;
1634         struct ieee80211_hdr *hdr;
1635         int retval;
1636         bool decrypt_error = false;
1637         struct ath_rx_status rs;
1638         enum ath9k_rx_qtype qtype;
1639         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1640         int dma_type;
1641         u8 rx_status_len = ah->caps.rx_status_len;
1642         u64 tsf = 0;
1643         u32 tsf_lower = 0;
1644
1645         if (edma)
1646                 dma_type = DMA_BIDIRECTIONAL;
1647         else
1648                 dma_type = DMA_FROM_DEVICE;
1649
1650         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1651         spin_lock_bh(&sc->rx.rxbuflock);
1652
1653         tsf = ath9k_hw_gettsf64(ah);
1654         tsf_lower = tsf & 0xffffffff;
1655
1656         do {
1657                 /* If handling rx interrupt and flush is in progress => exit */
1658                 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1659                         break;
1660
1661                 memset(&rs, 0, sizeof(rs));
1662                 if (edma)
1663                         bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1664                 else
1665                         bf = ath_get_next_rx_buf(sc, &rs);
1666
1667                 if (!bf)
1668                         break;
1669
1670                 skb = bf->bf_mpdu;
1671                 if (!skb)
1672                         continue;
1673
1674                 hdr = (struct ieee80211_hdr *) (skb->data + rx_status_len);
1675                 rxs =  IEEE80211_SKB_RXCB(skb);
1676
1677                 hw = ath_get_virt_hw(sc, hdr);
1678
1679                 ath_debug_stat_rx(sc, &rs);
1680
1681                 /*
1682                  * If we're asked to flush receive queue, directly
1683                  * chain it back at the queue without processing it.
1684                  */
1685                 if (flush)
1686                         goto requeue;
1687
1688                 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1689                                                  rxs, &decrypt_error);
1690                 if (retval)
1691                         goto requeue;
1692
1693                 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1694                 if (rs.rs_tstamp > tsf_lower &&
1695                     unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1696                         rxs->mactime -= 0x100000000ULL;
1697
1698                 if (rs.rs_tstamp < tsf_lower &&
1699                     unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1700                         rxs->mactime += 0x100000000ULL;
1701
1702                 /* Ensure we always have an skb to requeue once we are done
1703                  * processing the current buffer's skb */
1704                 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1705
1706                 /* If there is no memory we ignore the current RX'd frame,
1707                  * tell hardware it can give us a new frame using the old
1708                  * skb and put it at the tail of the sc->rx.rxbuf list for
1709                  * processing. */
1710                 if (!requeue_skb)
1711                         goto requeue;
1712
1713                 /* Unmap the frame */
1714                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1715                                  common->rx_bufsize,
1716                                  dma_type);
1717
1718                 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1719                 if (ah->caps.rx_status_len)
1720                         skb_pull(skb, ah->caps.rx_status_len);
1721
1722                 ath9k_rx_skb_postprocess(common, skb, &rs,
1723                                          rxs, decrypt_error);
1724
1725                 /* We will now give hardware our shiny new allocated skb */
1726                 bf->bf_mpdu = requeue_skb;
1727                 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1728                                                  common->rx_bufsize,
1729                                                  dma_type);
1730                 if (unlikely(dma_mapping_error(sc->dev,
1731                           bf->bf_buf_addr))) {
1732                         dev_kfree_skb_any(requeue_skb);
1733                         bf->bf_mpdu = NULL;
1734                         ath_print(common, ATH_DBG_FATAL,
1735                                   "dma_mapping_error() on RX\n");
1736                         ath_rx_send_to_mac80211(hw, sc, skb, rxs);
1737                         break;
1738                 }
1739                 bf->bf_dmacontext = bf->bf_buf_addr;
1740
1741                 /*
1742                  * change the default rx antenna if rx diversity chooses the
1743                  * other antenna 3 times in a row.
1744                  */
1745                 if (sc->rx.defant != rs.rs_antenna) {
1746                         if (++sc->rx.rxotherant >= 3)
1747                                 ath_setdefantenna(sc, rs.rs_antenna);
1748                 } else {
1749                         sc->rx.rxotherant = 0;
1750                 }
1751
1752                 if (unlikely(ath9k_check_auto_sleep(sc) ||
1753                              (sc->ps_flags & (PS_WAIT_FOR_BEACON |
1754                                               PS_WAIT_FOR_CAB |
1755                                               PS_WAIT_FOR_PSPOLL_DATA))))
1756                         ath_rx_ps(sc, skb);
1757
1758                 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
1759                         ath_ant_comb_scan(sc, &rs);
1760
1761                 ath_rx_send_to_mac80211(hw, sc, skb, rxs);
1762
1763 requeue:
1764                 if (edma) {
1765                         list_add_tail(&bf->list, &sc->rx.rxbuf);
1766                         ath_rx_edma_buf_link(sc, qtype);
1767                 } else {
1768                         list_move_tail(&bf->list, &sc->rx.rxbuf);
1769                         ath_rx_buf_link(sc, bf);
1770                 }
1771         } while (1);
1772
1773         spin_unlock_bh(&sc->rx.rxbuflock);
1774
1775         return 0;
1776 }