2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 static void ath9k_set_assoc_state(struct ath_softc *sc,
23 struct ieee80211_vif *vif);
25 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
28 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
29 * 0 for no restriction
38 switch (mpdudensity) {
44 /* Our lower layer calculations limit our precision to
60 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
64 spin_lock_bh(&txq->axq_lock);
66 if (txq->axq_depth || !list_empty(&txq->axq_acq))
69 spin_unlock_bh(&txq->axq_lock);
73 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
78 spin_lock_irqsave(&sc->sc_pm_lock, flags);
79 ret = ath9k_hw_setpower(sc->sc_ah, mode);
80 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
85 void ath_ps_full_sleep(unsigned long data)
87 struct ath_softc *sc = (struct ath_softc *) data;
88 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
91 spin_lock(&common->cc_lock);
92 ath_hw_cycle_counters_update(common);
93 spin_unlock(&common->cc_lock);
95 ath9k_hw_setrxabort(sc->sc_ah, 1);
96 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
98 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
101 void ath9k_ps_wakeup(struct ath_softc *sc)
103 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
105 enum ath9k_power_mode power_mode;
107 spin_lock_irqsave(&sc->sc_pm_lock, flags);
108 if (++sc->ps_usecount != 1)
111 del_timer_sync(&sc->sleep_timer);
112 power_mode = sc->sc_ah->power_mode;
113 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
116 * While the hardware is asleep, the cycle counters contain no
117 * useful data. Better clear them now so that they don't mess up
118 * survey data results.
120 if (power_mode != ATH9K_PM_AWAKE) {
121 spin_lock(&common->cc_lock);
122 ath_hw_cycle_counters_update(common);
123 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
124 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
125 spin_unlock(&common->cc_lock);
129 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
132 void ath9k_ps_restore(struct ath_softc *sc)
134 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
135 enum ath9k_power_mode mode;
138 spin_lock_irqsave(&sc->sc_pm_lock, flags);
139 if (--sc->ps_usecount != 0)
143 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
147 if (sc->ps_enabled &&
148 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
150 PS_WAIT_FOR_PSPOLL_DATA |
153 mode = ATH9K_PM_NETWORK_SLEEP;
154 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
155 ath9k_btcoex_stop_gen_timer(sc);
160 spin_lock(&common->cc_lock);
161 ath_hw_cycle_counters_update(common);
162 spin_unlock(&common->cc_lock);
164 ath9k_hw_setpower(sc->sc_ah, mode);
167 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
170 static void __ath_cancel_work(struct ath_softc *sc)
172 cancel_work_sync(&sc->paprd_work);
173 cancel_delayed_work_sync(&sc->tx_complete_work);
174 cancel_delayed_work_sync(&sc->hw_pll_work);
176 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
177 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
178 cancel_work_sync(&sc->mci_work);
182 void ath_cancel_work(struct ath_softc *sc)
184 __ath_cancel_work(sc);
185 cancel_work_sync(&sc->hw_reset_work);
188 void ath_restart_work(struct ath_softc *sc)
190 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
192 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
193 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
194 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
199 static bool ath_prepare_reset(struct ath_softc *sc)
201 struct ath_hw *ah = sc->sc_ah;
204 ieee80211_stop_queues(sc->hw);
206 ath9k_hw_disable_interrupts(ah);
208 if (!ath_drain_all_txq(sc))
211 if (!ath_stoprecv(sc))
217 static bool ath_complete_reset(struct ath_softc *sc, bool start)
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
224 if (ath_startrecv(sc) != 0) {
225 ath_err(common, "Unable to restart recv logic\n");
229 ath9k_cmn_update_txpow(ah, sc->curtxpow,
230 sc->config.txpowlimit, &sc->curtxpow);
232 clear_bit(ATH_OP_HW_RESET, &common->op_flags);
233 ath9k_hw_set_interrupts(ah);
234 ath9k_hw_enable_interrupts(ah);
236 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) {
237 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
240 if (ah->opmode == NL80211_IFTYPE_STATION &&
241 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
242 spin_lock_irqsave(&sc->sc_pm_lock, flags);
243 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
244 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
246 ath9k_set_beacon(sc);
249 ath_restart_work(sc);
251 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
252 if (!ATH_TXQ_SETUP(sc, i))
255 spin_lock_bh(&sc->tx.txq[i].axq_lock);
256 ath_txq_schedule(sc, &sc->tx.txq[i]);
257 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
262 ieee80211_wake_queues(sc->hw);
267 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
269 struct ath_hw *ah = sc->sc_ah;
270 struct ath_common *common = ath9k_hw_common(ah);
271 struct ath9k_hw_cal_data *caldata = NULL;
275 __ath_cancel_work(sc);
277 tasklet_disable(&sc->intr_tq);
278 spin_lock_bh(&sc->sc_pcu_lock);
280 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
282 caldata = &sc->caldata;
290 if (!ath_prepare_reset(sc))
293 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
294 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
296 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
299 "Unable to reset channel, reset status %d\n", r);
301 ath9k_hw_enable_interrupts(ah);
302 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
307 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
308 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
309 ath9k_mci_set_txpower(sc, true, false);
311 if (!ath_complete_reset(sc, true))
315 spin_unlock_bh(&sc->sc_pcu_lock);
316 tasklet_enable(&sc->intr_tq);
323 * Set/change channels. If the channel is really being changed, it's done
324 * by reseting the chip. To accomplish this we must first cleanup any pending
325 * DMA, then restart stuff.
327 static int ath_set_channel(struct ath_softc *sc, struct cfg80211_chan_def *chandef)
329 struct ath_hw *ah = sc->sc_ah;
330 struct ath_common *common = ath9k_hw_common(ah);
331 struct ieee80211_hw *hw = sc->hw;
332 struct ath9k_channel *hchan;
333 struct ieee80211_channel *chan = chandef->chan;
335 int pos = chan->hw_value;
339 if (test_bit(ATH_OP_INVALID, &common->op_flags))
342 offchannel = !!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL);
345 old_pos = ah->curchan - &ah->channels[0];
347 ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n",
348 chan->center_freq, chandef->width);
350 /* update survey stats for the old channel before switching */
351 spin_lock_bh(&common->cc_lock);
352 ath_update_survey_stats(sc);
353 spin_unlock_bh(&common->cc_lock);
355 ath9k_cmn_get_channel(hw, ah, chandef);
358 * If the operating channel changes, change the survey in-use flags
360 * Reset the survey data for the new channel, unless we're switching
361 * back to the operating channel from an off-channel operation.
363 if (!offchannel && sc->cur_survey != &sc->survey[pos]) {
365 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
367 sc->cur_survey = &sc->survey[pos];
369 memset(sc->cur_survey, 0, sizeof(struct survey_info));
370 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
371 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
372 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
375 hchan = &sc->sc_ah->channels[pos];
376 r = ath_reset_internal(sc, hchan);
381 * The most recent snapshot of channel->noisefloor for the old
382 * channel is only available after the hardware reset. Copy it to
383 * the survey stats now.
386 ath_update_survey_nf(sc, old_pos);
389 * Enable radar pulse detection if on a DFS channel. Spectral
390 * scanning and radar detection can not be used concurrently.
392 if (hw->conf.radar_enabled) {
395 /* set HW specific DFS configuration */
396 ath9k_hw_set_radar_params(ah);
397 rxfilter = ath9k_hw_getrxfilter(ah);
398 rxfilter |= ATH9K_RX_FILTER_PHYRADAR |
399 ATH9K_RX_FILTER_PHYERR;
400 ath9k_hw_setrxfilter(ah, rxfilter);
401 ath_dbg(common, DFS, "DFS enabled at freq %d\n",
404 /* perform spectral scan if requested. */
405 if (test_bit(ATH_OP_SCANNING, &common->op_flags) &&
406 sc->spectral_mode == SPECTRAL_CHANSCAN)
407 ath9k_spectral_scan_trigger(hw);
413 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
414 struct ieee80211_vif *vif)
417 an = (struct ath_node *)sta->drv_priv;
423 ath_tx_node_init(sc, an);
426 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
428 struct ath_node *an = (struct ath_node *)sta->drv_priv;
429 ath_tx_node_cleanup(sc, an);
432 void ath9k_tasklet(unsigned long data)
434 struct ath_softc *sc = (struct ath_softc *)data;
435 struct ath_hw *ah = sc->sc_ah;
436 struct ath_common *common = ath9k_hw_common(ah);
437 enum ath_reset_type type;
439 u32 status = sc->intrstatus;
443 spin_lock(&sc->sc_pcu_lock);
445 if (status & ATH9K_INT_FATAL) {
446 type = RESET_TYPE_FATAL_INT;
447 ath9k_queue_reset(sc, type);
450 * Increment the ref. counter here so that
451 * interrupts are enabled in the reset routine.
453 atomic_inc(&ah->intr_ref_cnt);
454 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
458 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
459 (status & ATH9K_INT_BB_WATCHDOG)) {
460 spin_lock(&common->cc_lock);
461 ath_hw_cycle_counters_update(common);
462 ar9003_hw_bb_watchdog_dbg_info(ah);
463 spin_unlock(&common->cc_lock);
465 if (ar9003_hw_bb_watchdog_check(ah)) {
466 type = RESET_TYPE_BB_WATCHDOG;
467 ath9k_queue_reset(sc, type);
470 * Increment the ref. counter here so that
471 * interrupts are enabled in the reset routine.
473 atomic_inc(&ah->intr_ref_cnt);
474 ath_dbg(common, RESET,
475 "BB_WATCHDOG: Skipping interrupts\n");
480 if (status & ATH9K_INT_GTT) {
483 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
484 type = RESET_TYPE_TX_GTT;
485 ath9k_queue_reset(sc, type);
486 atomic_inc(&ah->intr_ref_cnt);
487 ath_dbg(common, RESET,
488 "GTT: Skipping interrupts\n");
493 spin_lock_irqsave(&sc->sc_pm_lock, flags);
494 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
496 * TSF sync does not look correct; remain awake to sync with
499 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
500 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
502 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
504 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
505 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
508 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
510 if (status & rxmask) {
511 /* Check for high priority Rx first */
512 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
513 (status & ATH9K_INT_RXHP))
514 ath_rx_tasklet(sc, 0, true);
516 ath_rx_tasklet(sc, 0, false);
519 if (status & ATH9K_INT_TX) {
520 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
522 * For EDMA chips, TX completion is enabled for the
523 * beacon queue, so if a beacon has been transmitted
524 * successfully after a GTT interrupt, the GTT counter
525 * gets reset to zero here.
529 ath_tx_edma_tasklet(sc);
534 wake_up(&sc->tx_wait);
537 if (status & ATH9K_INT_GENTIMER)
538 ath_gen_timer_isr(sc->sc_ah);
540 ath9k_btcoex_handle_interrupt(sc, status);
542 /* re-enable hardware interrupt */
543 ath9k_hw_enable_interrupts(ah);
545 spin_unlock(&sc->sc_pcu_lock);
546 ath9k_ps_restore(sc);
549 irqreturn_t ath_isr(int irq, void *dev)
551 #define SCHED_INTR ( \
553 ATH9K_INT_BB_WATCHDOG | \
564 ATH9K_INT_GENTIMER | \
567 struct ath_softc *sc = dev;
568 struct ath_hw *ah = sc->sc_ah;
569 struct ath_common *common = ath9k_hw_common(ah);
570 enum ath9k_int status;
575 * The hardware is not ready/present, don't
576 * touch anything. Note this can happen early
577 * on if the IRQ is shared.
579 if (test_bit(ATH_OP_INVALID, &common->op_flags))
582 /* shared irq, not for us */
584 if (!ath9k_hw_intrpend(ah))
587 if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
588 ath9k_hw_kill_interrupts(ah);
593 * Figure out the reason(s) for the interrupt. Note
594 * that the hal returns a pseudo-ISR that may include
595 * bits we haven't explicitly enabled so we mask the
596 * value to insure we only process bits we requested.
598 ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
599 ath9k_debug_sync_cause(sc, sync_cause);
600 status &= ah->imask; /* discard unasked-for bits */
603 * If there are no status bits set, then this interrupt was not
604 * for me (should have been caught above).
609 /* Cache the status */
610 sc->intrstatus = status;
612 if (status & SCHED_INTR)
616 * If a FATAL or RXORN interrupt is received, we have to reset the
619 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
620 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
623 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
624 (status & ATH9K_INT_BB_WATCHDOG))
627 #ifdef CONFIG_ATH9K_WOW
628 if (status & ATH9K_INT_BMISS) {
629 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
630 atomic_inc(&sc->wow_got_bmiss_intr);
631 atomic_dec(&sc->wow_sleep_proc_intr);
636 if (status & ATH9K_INT_SWBA)
637 tasklet_schedule(&sc->bcon_tasklet);
639 if (status & ATH9K_INT_TXURN)
640 ath9k_hw_updatetxtriglevel(ah, true);
642 if (status & ATH9K_INT_RXEOL) {
643 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
644 ath9k_hw_set_interrupts(ah);
647 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
648 if (status & ATH9K_INT_TIM_TIMER) {
649 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
651 /* Clear RxAbort bit so that we can
653 ath9k_setpower(sc, ATH9K_PM_AWAKE);
654 spin_lock(&sc->sc_pm_lock);
655 ath9k_hw_setrxabort(sc->sc_ah, 0);
656 sc->ps_flags |= PS_WAIT_FOR_BEACON;
657 spin_unlock(&sc->sc_pm_lock);
662 ath_debug_stat_interrupt(sc, status);
665 /* turn off every interrupt */
666 ath9k_hw_disable_interrupts(ah);
667 tasklet_schedule(&sc->intr_tq);
675 int ath_reset(struct ath_softc *sc)
680 r = ath_reset_internal(sc, NULL);
681 ath9k_ps_restore(sc);
686 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
688 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
689 #ifdef CONFIG_ATH9K_DEBUGFS
690 RESET_STAT_INC(sc, type);
692 set_bit(ATH_OP_HW_RESET, &common->op_flags);
693 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
696 void ath_reset_work(struct work_struct *work)
698 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
703 /**********************/
704 /* mac80211 callbacks */
705 /**********************/
707 static int ath9k_start(struct ieee80211_hw *hw)
709 struct ath_softc *sc = hw->priv;
710 struct ath_hw *ah = sc->sc_ah;
711 struct ath_common *common = ath9k_hw_common(ah);
712 struct ieee80211_channel *curchan = hw->conf.chandef.chan;
713 struct ath9k_channel *init_channel;
716 ath_dbg(common, CONFIG,
717 "Starting driver with initial channel: %d MHz\n",
718 curchan->center_freq);
721 mutex_lock(&sc->mutex);
723 init_channel = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef);
725 /* Reset SERDES registers */
726 ath9k_hw_configpcipowersave(ah, false);
729 * The basic interface to setting the hardware in a good
730 * state is ``reset''. On return the hardware is known to
731 * be powered up and with interrupts disabled. This must
732 * be followed by initialization of the appropriate bits
733 * and then setup of the interrupt mask.
735 spin_lock_bh(&sc->sc_pcu_lock);
737 atomic_set(&ah->intr_ref_cnt, -1);
739 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
742 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
743 r, curchan->center_freq);
744 ah->reset_power_on = false;
747 /* Setup our intr mask. */
748 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
749 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
752 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
753 ah->imask |= ATH9K_INT_RXHP |
756 ah->imask |= ATH9K_INT_RX;
758 if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
759 ah->imask |= ATH9K_INT_BB_WATCHDOG;
762 * Enable GTT interrupts only for AR9003/AR9004 chips
765 if (AR_SREV_9300_20_OR_LATER(ah))
766 ah->imask |= ATH9K_INT_GTT;
768 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
769 ah->imask |= ATH9K_INT_CST;
773 clear_bit(ATH_OP_INVALID, &common->op_flags);
774 sc->sc_ah->is_monitoring = false;
776 if (!ath_complete_reset(sc, false))
777 ah->reset_power_on = false;
779 if (ah->led_pin >= 0) {
780 ath9k_hw_cfg_output(ah, ah->led_pin,
781 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
782 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
786 * Reset key cache to sane defaults (all entries cleared) instead of
787 * semi-random values after suspend/resume.
789 ath9k_cmn_init_crypto(sc->sc_ah);
791 ath9k_hw_reset_tsf(ah);
793 spin_unlock_bh(&sc->sc_pcu_lock);
795 mutex_unlock(&sc->mutex);
797 ath9k_ps_restore(sc);
802 static void ath9k_tx(struct ieee80211_hw *hw,
803 struct ieee80211_tx_control *control,
806 struct ath_softc *sc = hw->priv;
807 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
808 struct ath_tx_control txctl;
809 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
812 if (sc->ps_enabled) {
814 * mac80211 does not set PM field for normal data frames, so we
815 * need to update that based on the current PS mode.
817 if (ieee80211_is_data(hdr->frame_control) &&
818 !ieee80211_is_nullfunc(hdr->frame_control) &&
819 !ieee80211_has_pm(hdr->frame_control)) {
821 "Add PM=1 for a TX frame while in PS mode\n");
822 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
826 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
828 * We are using PS-Poll and mac80211 can request TX while in
829 * power save mode. Need to wake up hardware for the TX to be
830 * completed and if needed, also for RX of buffered frames.
833 spin_lock_irqsave(&sc->sc_pm_lock, flags);
834 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
835 ath9k_hw_setrxabort(sc->sc_ah, 0);
836 if (ieee80211_is_pspoll(hdr->frame_control)) {
838 "Sending PS-Poll to pick a buffered frame\n");
839 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
841 ath_dbg(common, PS, "Wake up to complete TX\n");
842 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
845 * The actual restore operation will happen only after
846 * the ps_flags bit is cleared. We are just dropping
847 * the ps_usecount here.
849 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
850 ath9k_ps_restore(sc);
854 * Cannot tx while the hardware is in full sleep, it first needs a full
855 * chip reset to recover from that
857 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
858 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
862 memset(&txctl, 0, sizeof(struct ath_tx_control));
863 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
864 txctl.sta = control->sta;
866 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
868 if (ath_tx_start(hw, skb, &txctl) != 0) {
869 ath_dbg(common, XMIT, "TX failed\n");
870 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
876 ieee80211_free_txskb(hw, skb);
879 static void ath9k_stop(struct ieee80211_hw *hw)
881 struct ath_softc *sc = hw->priv;
882 struct ath_hw *ah = sc->sc_ah;
883 struct ath_common *common = ath9k_hw_common(ah);
886 mutex_lock(&sc->mutex);
890 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
891 ath_dbg(common, ANY, "Device not present\n");
892 mutex_unlock(&sc->mutex);
896 /* Ensure HW is awake when we try to shut it down. */
899 spin_lock_bh(&sc->sc_pcu_lock);
901 /* prevent tasklets to enable interrupts once we disable them */
902 ah->imask &= ~ATH9K_INT_GLOBAL;
904 /* make sure h/w will not generate any interrupt
905 * before setting the invalid flag. */
906 ath9k_hw_disable_interrupts(ah);
908 spin_unlock_bh(&sc->sc_pcu_lock);
910 /* we can now sync irq and kill any running tasklets, since we already
911 * disabled interrupts and not holding a spin lock */
912 synchronize_irq(sc->irq);
913 tasklet_kill(&sc->intr_tq);
914 tasklet_kill(&sc->bcon_tasklet);
916 prev_idle = sc->ps_idle;
919 spin_lock_bh(&sc->sc_pcu_lock);
921 if (ah->led_pin >= 0) {
922 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
923 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
926 ath_prepare_reset(sc);
929 dev_kfree_skb_any(sc->rx.frag);
934 ah->curchan = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef);
936 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
937 ath9k_hw_phy_disable(ah);
939 ath9k_hw_configpcipowersave(ah, true);
941 spin_unlock_bh(&sc->sc_pcu_lock);
943 ath9k_ps_restore(sc);
945 set_bit(ATH_OP_INVALID, &common->op_flags);
946 sc->ps_idle = prev_idle;
948 mutex_unlock(&sc->mutex);
950 ath_dbg(common, CONFIG, "Driver halt\n");
953 static bool ath9k_uses_beacons(int type)
956 case NL80211_IFTYPE_AP:
957 case NL80211_IFTYPE_ADHOC:
958 case NL80211_IFTYPE_MESH_POINT:
965 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
967 struct ath9k_vif_iter_data *iter_data = data;
970 if (iter_data->has_hw_macaddr) {
971 for (i = 0; i < ETH_ALEN; i++)
972 iter_data->mask[i] &=
973 ~(iter_data->hw_macaddr[i] ^ mac[i]);
975 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
976 iter_data->has_hw_macaddr = true;
980 case NL80211_IFTYPE_AP:
983 case NL80211_IFTYPE_STATION:
984 iter_data->nstations++;
986 case NL80211_IFTYPE_ADHOC:
987 iter_data->nadhocs++;
989 case NL80211_IFTYPE_MESH_POINT:
990 iter_data->nmeshes++;
992 case NL80211_IFTYPE_WDS:
1000 static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1002 struct ath_softc *sc = data;
1003 struct ath_vif *avp = (void *)vif->drv_priv;
1005 if (vif->type != NL80211_IFTYPE_STATION)
1008 if (avp->primary_sta_vif)
1009 ath9k_set_assoc_state(sc, vif);
1012 /* Called with sc->mutex held. */
1013 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1014 struct ieee80211_vif *vif,
1015 struct ath9k_vif_iter_data *iter_data)
1017 struct ath_softc *sc = hw->priv;
1018 struct ath_hw *ah = sc->sc_ah;
1019 struct ath_common *common = ath9k_hw_common(ah);
1022 * Pick the MAC address of the first interface as the new hardware
1023 * MAC address. The hardware will use it together with the BSSID mask
1024 * when matching addresses.
1026 memset(iter_data, 0, sizeof(*iter_data));
1027 memset(&iter_data->mask, 0xff, ETH_ALEN);
1030 ath9k_vif_iter(iter_data, vif->addr, vif);
1032 /* Get list of all active MAC addresses */
1033 ieee80211_iterate_active_interfaces_atomic(
1034 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1035 ath9k_vif_iter, iter_data);
1037 memcpy(common->macaddr, iter_data->hw_macaddr, ETH_ALEN);
1040 /* Called with sc->mutex held. */
1041 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1042 struct ieee80211_vif *vif)
1044 struct ath_softc *sc = hw->priv;
1045 struct ath_hw *ah = sc->sc_ah;
1046 struct ath_common *common = ath9k_hw_common(ah);
1047 struct ath9k_vif_iter_data iter_data;
1048 enum nl80211_iftype old_opmode = ah->opmode;
1050 ath9k_calculate_iter_data(hw, vif, &iter_data);
1052 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1053 ath_hw_setbssidmask(common);
1055 if (iter_data.naps > 0) {
1056 ath9k_hw_set_tsfadjust(ah, true);
1057 ah->opmode = NL80211_IFTYPE_AP;
1059 ath9k_hw_set_tsfadjust(ah, false);
1061 if (iter_data.nmeshes)
1062 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1063 else if (iter_data.nwds)
1064 ah->opmode = NL80211_IFTYPE_AP;
1065 else if (iter_data.nadhocs)
1066 ah->opmode = NL80211_IFTYPE_ADHOC;
1068 ah->opmode = NL80211_IFTYPE_STATION;
1071 ath9k_hw_setopmode(ah);
1073 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1074 ah->imask |= ATH9K_INT_TSFOOR;
1076 ah->imask &= ~ATH9K_INT_TSFOOR;
1078 ath9k_hw_set_interrupts(ah);
1081 * If we are changing the opmode to STATION,
1082 * a beacon sync needs to be done.
1084 if (ah->opmode == NL80211_IFTYPE_STATION &&
1085 old_opmode == NL80211_IFTYPE_AP &&
1086 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
1087 ieee80211_iterate_active_interfaces_atomic(
1088 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1089 ath9k_sta_vif_iter, sc);
1093 static int ath9k_add_interface(struct ieee80211_hw *hw,
1094 struct ieee80211_vif *vif)
1096 struct ath_softc *sc = hw->priv;
1097 struct ath_hw *ah = sc->sc_ah;
1098 struct ath_common *common = ath9k_hw_common(ah);
1099 struct ath_vif *avp = (void *)vif->drv_priv;
1100 struct ath_node *an = &avp->mcast_node;
1102 mutex_lock(&sc->mutex);
1104 if (config_enabled(CONFIG_ATH9K_TX99)) {
1105 if (sc->nvifs >= 1) {
1106 mutex_unlock(&sc->mutex);
1112 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1115 ath9k_ps_wakeup(sc);
1116 ath9k_calculate_summary_state(hw, vif);
1117 ath9k_ps_restore(sc);
1119 if (ath9k_uses_beacons(vif->type))
1120 ath9k_beacon_assign_slot(sc, vif);
1125 an->no_ps_filter = true;
1126 ath_tx_node_init(sc, an);
1128 mutex_unlock(&sc->mutex);
1132 static int ath9k_change_interface(struct ieee80211_hw *hw,
1133 struct ieee80211_vif *vif,
1134 enum nl80211_iftype new_type,
1137 struct ath_softc *sc = hw->priv;
1138 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1140 mutex_lock(&sc->mutex);
1142 if (config_enabled(CONFIG_ATH9K_TX99)) {
1143 mutex_unlock(&sc->mutex);
1147 ath_dbg(common, CONFIG, "Change Interface\n");
1149 if (ath9k_uses_beacons(vif->type))
1150 ath9k_beacon_remove_slot(sc, vif);
1152 vif->type = new_type;
1155 ath9k_ps_wakeup(sc);
1156 ath9k_calculate_summary_state(hw, vif);
1157 ath9k_ps_restore(sc);
1159 if (ath9k_uses_beacons(vif->type))
1160 ath9k_beacon_assign_slot(sc, vif);
1162 mutex_unlock(&sc->mutex);
1166 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1167 struct ieee80211_vif *vif)
1169 struct ath_softc *sc = hw->priv;
1170 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1171 struct ath_vif *avp = (void *)vif->drv_priv;
1173 ath_dbg(common, CONFIG, "Detach Interface\n");
1175 mutex_lock(&sc->mutex);
1178 sc->tx99_vif = NULL;
1180 if (ath9k_uses_beacons(vif->type))
1181 ath9k_beacon_remove_slot(sc, vif);
1183 ath9k_ps_wakeup(sc);
1184 ath9k_calculate_summary_state(hw, NULL);
1185 ath9k_ps_restore(sc);
1187 ath_tx_node_cleanup(sc, &avp->mcast_node);
1189 mutex_unlock(&sc->mutex);
1192 static void ath9k_enable_ps(struct ath_softc *sc)
1194 struct ath_hw *ah = sc->sc_ah;
1195 struct ath_common *common = ath9k_hw_common(ah);
1197 if (config_enabled(CONFIG_ATH9K_TX99))
1200 sc->ps_enabled = true;
1201 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1202 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1203 ah->imask |= ATH9K_INT_TIM_TIMER;
1204 ath9k_hw_set_interrupts(ah);
1206 ath9k_hw_setrxabort(ah, 1);
1208 ath_dbg(common, PS, "PowerSave enabled\n");
1211 static void ath9k_disable_ps(struct ath_softc *sc)
1213 struct ath_hw *ah = sc->sc_ah;
1214 struct ath_common *common = ath9k_hw_common(ah);
1216 if (config_enabled(CONFIG_ATH9K_TX99))
1219 sc->ps_enabled = false;
1220 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1221 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1222 ath9k_hw_setrxabort(ah, 0);
1223 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1225 PS_WAIT_FOR_PSPOLL_DATA |
1226 PS_WAIT_FOR_TX_ACK);
1227 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1228 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1229 ath9k_hw_set_interrupts(ah);
1232 ath_dbg(common, PS, "PowerSave disabled\n");
1235 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1237 struct ath_softc *sc = hw->priv;
1238 struct ath_hw *ah = sc->sc_ah;
1239 struct ath_common *common = ath9k_hw_common(ah);
1242 if (config_enabled(CONFIG_ATH9K_TX99))
1245 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1246 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1250 ath9k_ps_wakeup(sc);
1251 rxfilter = ath9k_hw_getrxfilter(ah);
1252 ath9k_hw_setrxfilter(ah, rxfilter |
1253 ATH9K_RX_FILTER_PHYRADAR |
1254 ATH9K_RX_FILTER_PHYERR);
1256 /* TODO: usually this should not be neccesary, but for some reason
1257 * (or in some mode?) the trigger must be called after the
1258 * configuration, otherwise the register will have its values reset
1259 * (on my ar9220 to value 0x01002310)
1261 ath9k_spectral_scan_config(hw, sc->spectral_mode);
1262 ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1263 ath9k_ps_restore(sc);
1266 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1267 enum spectral_mode spectral_mode)
1269 struct ath_softc *sc = hw->priv;
1270 struct ath_hw *ah = sc->sc_ah;
1271 struct ath_common *common = ath9k_hw_common(ah);
1273 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1274 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1278 switch (spectral_mode) {
1279 case SPECTRAL_DISABLED:
1280 sc->spec_config.enabled = 0;
1282 case SPECTRAL_BACKGROUND:
1283 /* send endless samples.
1284 * TODO: is this really useful for "background"?
1286 sc->spec_config.endless = 1;
1287 sc->spec_config.enabled = 1;
1289 case SPECTRAL_CHANSCAN:
1290 case SPECTRAL_MANUAL:
1291 sc->spec_config.endless = 0;
1292 sc->spec_config.enabled = 1;
1298 ath9k_ps_wakeup(sc);
1299 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1300 ath9k_ps_restore(sc);
1302 sc->spectral_mode = spectral_mode;
1307 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1309 struct ath_softc *sc = hw->priv;
1310 struct ath_hw *ah = sc->sc_ah;
1311 struct ath_common *common = ath9k_hw_common(ah);
1312 struct ieee80211_conf *conf = &hw->conf;
1313 bool reset_channel = false;
1315 ath9k_ps_wakeup(sc);
1316 mutex_lock(&sc->mutex);
1318 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1319 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1321 ath_cancel_work(sc);
1322 ath9k_stop_btcoex(sc);
1324 ath9k_start_btcoex(sc);
1326 * The chip needs a reset to properly wake up from
1329 reset_channel = ah->chip_fullsleep;
1334 * We just prepare to enable PS. We have to wait until our AP has
1335 * ACK'd our null data frame to disable RX otherwise we'll ignore
1336 * those ACKs and end up retransmitting the same null data frames.
1337 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1339 if (changed & IEEE80211_CONF_CHANGE_PS) {
1340 unsigned long flags;
1341 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1342 if (conf->flags & IEEE80211_CONF_PS)
1343 ath9k_enable_ps(sc);
1345 ath9k_disable_ps(sc);
1346 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1349 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1350 if (conf->flags & IEEE80211_CONF_MONITOR) {
1351 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1352 sc->sc_ah->is_monitoring = true;
1354 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1355 sc->sc_ah->is_monitoring = false;
1359 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1360 if (ath_set_channel(sc, &hw->conf.chandef) < 0) {
1361 ath_err(common, "Unable to set channel\n");
1362 mutex_unlock(&sc->mutex);
1363 ath9k_ps_restore(sc);
1368 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1369 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1370 sc->config.txpowlimit = 2 * conf->power_level;
1371 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1372 sc->config.txpowlimit, &sc->curtxpow);
1375 mutex_unlock(&sc->mutex);
1376 ath9k_ps_restore(sc);
1381 #define SUPPORTED_FILTERS \
1382 (FIF_PROMISC_IN_BSS | \
1387 FIF_BCN_PRBRESP_PROMISC | \
1391 /* FIXME: sc->sc_full_reset ? */
1392 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1393 unsigned int changed_flags,
1394 unsigned int *total_flags,
1397 struct ath_softc *sc = hw->priv;
1400 changed_flags &= SUPPORTED_FILTERS;
1401 *total_flags &= SUPPORTED_FILTERS;
1403 sc->rx.rxfilter = *total_flags;
1404 ath9k_ps_wakeup(sc);
1405 rfilt = ath_calcrxfilter(sc);
1406 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1407 ath9k_ps_restore(sc);
1409 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1413 static int ath9k_sta_add(struct ieee80211_hw *hw,
1414 struct ieee80211_vif *vif,
1415 struct ieee80211_sta *sta)
1417 struct ath_softc *sc = hw->priv;
1418 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1419 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1420 struct ieee80211_key_conf ps_key = { };
1423 ath_node_attach(sc, sta, vif);
1425 if (vif->type != NL80211_IFTYPE_AP &&
1426 vif->type != NL80211_IFTYPE_AP_VLAN)
1429 key = ath_key_config(common, vif, sta, &ps_key);
1436 static void ath9k_del_ps_key(struct ath_softc *sc,
1437 struct ieee80211_vif *vif,
1438 struct ieee80211_sta *sta)
1440 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1441 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1442 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1447 ath_key_delete(common, &ps_key);
1451 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1452 struct ieee80211_vif *vif,
1453 struct ieee80211_sta *sta)
1455 struct ath_softc *sc = hw->priv;
1457 ath9k_del_ps_key(sc, vif, sta);
1458 ath_node_detach(sc, sta);
1463 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1464 struct ieee80211_vif *vif,
1465 enum sta_notify_cmd cmd,
1466 struct ieee80211_sta *sta)
1468 struct ath_softc *sc = hw->priv;
1469 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1472 case STA_NOTIFY_SLEEP:
1473 an->sleeping = true;
1474 ath_tx_aggr_sleep(sta, sc, an);
1476 case STA_NOTIFY_AWAKE:
1477 an->sleeping = false;
1478 ath_tx_aggr_wakeup(sc, an);
1483 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1484 struct ieee80211_vif *vif, u16 queue,
1485 const struct ieee80211_tx_queue_params *params)
1487 struct ath_softc *sc = hw->priv;
1488 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1489 struct ath_txq *txq;
1490 struct ath9k_tx_queue_info qi;
1493 if (queue >= IEEE80211_NUM_ACS)
1496 txq = sc->tx.txq_map[queue];
1498 ath9k_ps_wakeup(sc);
1499 mutex_lock(&sc->mutex);
1501 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1503 qi.tqi_aifs = params->aifs;
1504 qi.tqi_cwmin = params->cw_min;
1505 qi.tqi_cwmax = params->cw_max;
1506 qi.tqi_burstTime = params->txop * 32;
1508 ath_dbg(common, CONFIG,
1509 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1510 queue, txq->axq_qnum, params->aifs, params->cw_min,
1511 params->cw_max, params->txop);
1513 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1514 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1516 ath_err(common, "TXQ Update failed\n");
1518 mutex_unlock(&sc->mutex);
1519 ath9k_ps_restore(sc);
1524 static int ath9k_set_key(struct ieee80211_hw *hw,
1525 enum set_key_cmd cmd,
1526 struct ieee80211_vif *vif,
1527 struct ieee80211_sta *sta,
1528 struct ieee80211_key_conf *key)
1530 struct ath_softc *sc = hw->priv;
1531 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1534 if (ath9k_modparam_nohwcrypt)
1537 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1538 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1539 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1540 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1541 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1543 * For now, disable hw crypto for the RSN IBSS group keys. This
1544 * could be optimized in the future to use a modified key cache
1545 * design to support per-STA RX GTK, but until that gets
1546 * implemented, use of software crypto for group addressed
1547 * frames is a acceptable to allow RSN IBSS to be used.
1552 mutex_lock(&sc->mutex);
1553 ath9k_ps_wakeup(sc);
1554 ath_dbg(common, CONFIG, "Set HW Key\n");
1559 ath9k_del_ps_key(sc, vif, sta);
1561 ret = ath_key_config(common, vif, sta, key);
1563 key->hw_key_idx = ret;
1564 /* push IV and Michael MIC generation to stack */
1565 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1566 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1567 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1568 if (sc->sc_ah->sw_mgmt_crypto &&
1569 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1570 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1575 ath_key_delete(common, key);
1581 ath9k_ps_restore(sc);
1582 mutex_unlock(&sc->mutex);
1587 static void ath9k_set_assoc_state(struct ath_softc *sc,
1588 struct ieee80211_vif *vif)
1590 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1591 struct ath_vif *avp = (void *)vif->drv_priv;
1592 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1593 unsigned long flags;
1595 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1596 avp->primary_sta_vif = true;
1599 * Set the AID, BSSID and do beacon-sync only when
1600 * the HW opmode is STATION.
1602 * But the primary bit is set above in any case.
1604 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1607 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1608 common->curaid = bss_conf->aid;
1609 ath9k_hw_write_associd(sc->sc_ah);
1611 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1612 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1614 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1615 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1616 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1618 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1619 ath9k_mci_update_wlan_channels(sc, false);
1621 ath_dbg(common, CONFIG,
1622 "Primary Station interface: %pM, BSSID: %pM\n",
1623 vif->addr, common->curbssid);
1626 static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1628 struct ath_softc *sc = data;
1629 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1630 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1632 if (test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags))
1635 if (bss_conf->assoc)
1636 ath9k_set_assoc_state(sc, vif);
1639 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1640 struct ieee80211_vif *vif,
1641 struct ieee80211_bss_conf *bss_conf,
1645 (BSS_CHANGED_ASSOC | \
1646 BSS_CHANGED_IBSS | \
1647 BSS_CHANGED_BEACON_ENABLED)
1649 struct ath_softc *sc = hw->priv;
1650 struct ath_hw *ah = sc->sc_ah;
1651 struct ath_common *common = ath9k_hw_common(ah);
1652 struct ath_vif *avp = (void *)vif->drv_priv;
1655 ath9k_ps_wakeup(sc);
1656 mutex_lock(&sc->mutex);
1658 if (changed & BSS_CHANGED_ASSOC) {
1659 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1660 bss_conf->bssid, bss_conf->assoc);
1662 if (avp->primary_sta_vif && !bss_conf->assoc) {
1663 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1664 avp->primary_sta_vif = false;
1666 if (ah->opmode == NL80211_IFTYPE_STATION)
1667 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1670 ieee80211_iterate_active_interfaces_atomic(
1671 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1672 ath9k_bss_assoc_iter, sc);
1674 if (!test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags) &&
1675 ah->opmode == NL80211_IFTYPE_STATION) {
1676 memset(common->curbssid, 0, ETH_ALEN);
1678 ath9k_hw_write_associd(sc->sc_ah);
1679 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1680 ath9k_mci_update_wlan_channels(sc, true);
1684 if (changed & BSS_CHANGED_IBSS) {
1685 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1686 common->curaid = bss_conf->aid;
1687 ath9k_hw_write_associd(sc->sc_ah);
1690 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1691 (changed & BSS_CHANGED_BEACON_INT))
1692 ath9k_beacon_config(sc, vif, changed);
1694 if (changed & BSS_CHANGED_ERP_SLOT) {
1695 if (bss_conf->use_short_slot)
1699 if (vif->type == NL80211_IFTYPE_AP) {
1701 * Defer update, so that connected stations can adjust
1702 * their settings at the same time.
1703 * See beacon.c for more details
1705 sc->beacon.slottime = slottime;
1706 sc->beacon.updateslot = UPDATE;
1708 ah->slottime = slottime;
1709 ath9k_hw_init_global_settings(ah);
1713 if (changed & CHECK_ANI)
1716 mutex_unlock(&sc->mutex);
1717 ath9k_ps_restore(sc);
1722 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1724 struct ath_softc *sc = hw->priv;
1727 mutex_lock(&sc->mutex);
1728 ath9k_ps_wakeup(sc);
1729 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1730 ath9k_ps_restore(sc);
1731 mutex_unlock(&sc->mutex);
1736 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1737 struct ieee80211_vif *vif,
1740 struct ath_softc *sc = hw->priv;
1742 mutex_lock(&sc->mutex);
1743 ath9k_ps_wakeup(sc);
1744 ath9k_hw_settsf64(sc->sc_ah, tsf);
1745 ath9k_ps_restore(sc);
1746 mutex_unlock(&sc->mutex);
1749 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1751 struct ath_softc *sc = hw->priv;
1753 mutex_lock(&sc->mutex);
1755 ath9k_ps_wakeup(sc);
1756 ath9k_hw_reset_tsf(sc->sc_ah);
1757 ath9k_ps_restore(sc);
1759 mutex_unlock(&sc->mutex);
1762 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1763 struct ieee80211_vif *vif,
1764 enum ieee80211_ampdu_mlme_action action,
1765 struct ieee80211_sta *sta,
1766 u16 tid, u16 *ssn, u8 buf_size)
1768 struct ath_softc *sc = hw->priv;
1772 mutex_lock(&sc->mutex);
1775 case IEEE80211_AMPDU_RX_START:
1777 case IEEE80211_AMPDU_RX_STOP:
1779 case IEEE80211_AMPDU_TX_START:
1780 ath9k_ps_wakeup(sc);
1781 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1783 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1784 ath9k_ps_restore(sc);
1786 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1787 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1789 case IEEE80211_AMPDU_TX_STOP_CONT:
1790 ath9k_ps_wakeup(sc);
1791 ath_tx_aggr_stop(sc, sta, tid);
1793 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1794 ath9k_ps_restore(sc);
1796 case IEEE80211_AMPDU_TX_OPERATIONAL:
1797 ath9k_ps_wakeup(sc);
1798 ath_tx_aggr_resume(sc, sta, tid);
1799 ath9k_ps_restore(sc);
1802 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1805 mutex_unlock(&sc->mutex);
1810 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1811 struct survey_info *survey)
1813 struct ath_softc *sc = hw->priv;
1814 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1815 struct ieee80211_supported_band *sband;
1816 struct ieee80211_channel *chan;
1819 if (config_enabled(CONFIG_ATH9K_TX99))
1822 spin_lock_bh(&common->cc_lock);
1824 ath_update_survey_stats(sc);
1826 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1827 if (sband && idx >= sband->n_channels) {
1828 idx -= sband->n_channels;
1833 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1835 if (!sband || idx >= sband->n_channels) {
1836 spin_unlock_bh(&common->cc_lock);
1840 chan = &sband->channels[idx];
1841 pos = chan->hw_value;
1842 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1843 survey->channel = chan;
1844 spin_unlock_bh(&common->cc_lock);
1849 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1851 struct ath_softc *sc = hw->priv;
1852 struct ath_hw *ah = sc->sc_ah;
1854 if (config_enabled(CONFIG_ATH9K_TX99))
1857 mutex_lock(&sc->mutex);
1858 ah->coverage_class = coverage_class;
1860 ath9k_ps_wakeup(sc);
1861 ath9k_hw_init_global_settings(ah);
1862 ath9k_ps_restore(sc);
1864 mutex_unlock(&sc->mutex);
1867 static bool ath9k_has_tx_pending(struct ath_softc *sc)
1871 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1872 if (!ATH_TXQ_SETUP(sc, i))
1875 if (!sc->tx.txq[i].axq_depth)
1878 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1886 static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1888 struct ath_softc *sc = hw->priv;
1889 struct ath_hw *ah = sc->sc_ah;
1890 struct ath_common *common = ath9k_hw_common(ah);
1891 int timeout = HZ / 5; /* 200 ms */
1894 mutex_lock(&sc->mutex);
1895 cancel_delayed_work_sync(&sc->tx_complete_work);
1897 if (ah->ah_flags & AH_UNPLUGGED) {
1898 ath_dbg(common, ANY, "Device has been unplugged!\n");
1899 mutex_unlock(&sc->mutex);
1903 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
1904 ath_dbg(common, ANY, "Device not present\n");
1905 mutex_unlock(&sc->mutex);
1909 if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc),
1914 ath9k_ps_wakeup(sc);
1915 spin_lock_bh(&sc->sc_pcu_lock);
1916 drain_txq = ath_drain_all_txq(sc);
1917 spin_unlock_bh(&sc->sc_pcu_lock);
1922 ath9k_ps_restore(sc);
1923 ieee80211_wake_queues(hw);
1926 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
1927 mutex_unlock(&sc->mutex);
1930 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
1932 struct ath_softc *sc = hw->priv;
1935 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1936 if (!ATH_TXQ_SETUP(sc, i))
1939 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
1945 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
1947 struct ath_softc *sc = hw->priv;
1948 struct ath_hw *ah = sc->sc_ah;
1949 struct ieee80211_vif *vif;
1950 struct ath_vif *avp;
1952 struct ath_tx_status ts;
1953 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1956 vif = sc->beacon.bslot[0];
1960 if (!vif->bss_conf.enable_beacon)
1963 avp = (void *)vif->drv_priv;
1965 if (!sc->beacon.tx_processed && !edma) {
1966 tasklet_disable(&sc->bcon_tasklet);
1969 if (!bf || !bf->bf_mpdu)
1972 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
1973 if (status == -EINPROGRESS)
1976 sc->beacon.tx_processed = true;
1977 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
1980 tasklet_enable(&sc->bcon_tasklet);
1983 return sc->beacon.tx_last;
1986 static int ath9k_get_stats(struct ieee80211_hw *hw,
1987 struct ieee80211_low_level_stats *stats)
1989 struct ath_softc *sc = hw->priv;
1990 struct ath_hw *ah = sc->sc_ah;
1991 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
1993 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
1994 stats->dot11RTSFailureCount = mib_stats->rts_bad;
1995 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
1996 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2000 static u32 fill_chainmask(u32 cap, u32 new)
2005 for (i = 0; cap && new; i++, cap >>= 1) {
2006 if (!(cap & BIT(0)))
2018 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2020 if (AR_SREV_9300_20_OR_LATER(ah))
2023 switch (val & 0x7) {
2029 return (ah->caps.rx_chainmask == 1);
2035 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2037 struct ath_softc *sc = hw->priv;
2038 struct ath_hw *ah = sc->sc_ah;
2040 if (ah->caps.rx_chainmask != 1)
2043 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2046 sc->ant_rx = rx_ant;
2047 sc->ant_tx = tx_ant;
2049 if (ah->caps.rx_chainmask == 1)
2052 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2053 if (AR_SREV_9100(ah))
2054 ah->rxchainmask = 0x7;
2056 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2058 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2059 ath9k_cmn_reload_chainmask(ah);
2064 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2066 struct ath_softc *sc = hw->priv;
2068 *tx_ant = sc->ant_tx;
2069 *rx_ant = sc->ant_rx;
2073 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2075 struct ath_softc *sc = hw->priv;
2076 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2077 set_bit(ATH_OP_SCANNING, &common->op_flags);
2080 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2082 struct ath_softc *sc = hw->priv;
2083 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2084 clear_bit(ATH_OP_SCANNING, &common->op_flags);
2087 static void ath9k_channel_switch_beacon(struct ieee80211_hw *hw,
2088 struct ieee80211_vif *vif,
2089 struct cfg80211_chan_def *chandef)
2091 /* depend on vif->csa_active only */
2095 struct ieee80211_ops ath9k_ops = {
2097 .start = ath9k_start,
2099 .add_interface = ath9k_add_interface,
2100 .change_interface = ath9k_change_interface,
2101 .remove_interface = ath9k_remove_interface,
2102 .config = ath9k_config,
2103 .configure_filter = ath9k_configure_filter,
2104 .sta_add = ath9k_sta_add,
2105 .sta_remove = ath9k_sta_remove,
2106 .sta_notify = ath9k_sta_notify,
2107 .conf_tx = ath9k_conf_tx,
2108 .bss_info_changed = ath9k_bss_info_changed,
2109 .set_key = ath9k_set_key,
2110 .get_tsf = ath9k_get_tsf,
2111 .set_tsf = ath9k_set_tsf,
2112 .reset_tsf = ath9k_reset_tsf,
2113 .ampdu_action = ath9k_ampdu_action,
2114 .get_survey = ath9k_get_survey,
2115 .rfkill_poll = ath9k_rfkill_poll_state,
2116 .set_coverage_class = ath9k_set_coverage_class,
2117 .flush = ath9k_flush,
2118 .tx_frames_pending = ath9k_tx_frames_pending,
2119 .tx_last_beacon = ath9k_tx_last_beacon,
2120 .release_buffered_frames = ath9k_release_buffered_frames,
2121 .get_stats = ath9k_get_stats,
2122 .set_antenna = ath9k_set_antenna,
2123 .get_antenna = ath9k_get_antenna,
2125 #ifdef CONFIG_ATH9K_WOW
2126 .suspend = ath9k_suspend,
2127 .resume = ath9k_resume,
2128 .set_wakeup = ath9k_set_wakeup,
2131 #ifdef CONFIG_ATH9K_DEBUGFS
2132 .get_et_sset_count = ath9k_get_et_sset_count,
2133 .get_et_stats = ath9k_get_et_stats,
2134 .get_et_strings = ath9k_get_et_strings,
2137 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2138 .sta_add_debugfs = ath9k_sta_add_debugfs,
2140 .sw_scan_start = ath9k_sw_scan_start,
2141 .sw_scan_complete = ath9k_sw_scan_complete,
2142 .channel_switch_beacon = ath9k_channel_switch_beacon,