2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 static void ath9k_set_assoc_state(struct ath_softc *sc,
23 struct ieee80211_vif *vif);
25 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
28 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
29 * 0 for no restriction
38 switch (mpdudensity) {
44 /* Our lower layer calculations limit our precision to
60 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
64 spin_lock_bh(&txq->axq_lock);
66 if (txq->axq_depth || !list_empty(&txq->axq_acq))
69 spin_unlock_bh(&txq->axq_lock);
73 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
78 spin_lock_irqsave(&sc->sc_pm_lock, flags);
79 ret = ath9k_hw_setpower(sc->sc_ah, mode);
80 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
85 void ath_ps_full_sleep(unsigned long data)
87 struct ath_softc *sc = (struct ath_softc *) data;
88 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
91 spin_lock(&common->cc_lock);
92 ath_hw_cycle_counters_update(common);
93 spin_unlock(&common->cc_lock);
95 ath9k_hw_setrxabort(sc->sc_ah, 1);
96 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
98 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
101 void ath9k_ps_wakeup(struct ath_softc *sc)
103 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
105 enum ath9k_power_mode power_mode;
107 spin_lock_irqsave(&sc->sc_pm_lock, flags);
108 if (++sc->ps_usecount != 1)
111 del_timer_sync(&sc->sleep_timer);
112 power_mode = sc->sc_ah->power_mode;
113 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
116 * While the hardware is asleep, the cycle counters contain no
117 * useful data. Better clear them now so that they don't mess up
118 * survey data results.
120 if (power_mode != ATH9K_PM_AWAKE) {
121 spin_lock(&common->cc_lock);
122 ath_hw_cycle_counters_update(common);
123 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
124 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
125 spin_unlock(&common->cc_lock);
129 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
132 void ath9k_ps_restore(struct ath_softc *sc)
134 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
135 enum ath9k_power_mode mode;
138 spin_lock_irqsave(&sc->sc_pm_lock, flags);
139 if (--sc->ps_usecount != 0)
143 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
147 if (sc->ps_enabled &&
148 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
150 PS_WAIT_FOR_PSPOLL_DATA |
153 mode = ATH9K_PM_NETWORK_SLEEP;
154 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
155 ath9k_btcoex_stop_gen_timer(sc);
160 spin_lock(&common->cc_lock);
161 ath_hw_cycle_counters_update(common);
162 spin_unlock(&common->cc_lock);
164 ath9k_hw_setpower(sc->sc_ah, mode);
167 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
170 static void __ath_cancel_work(struct ath_softc *sc)
172 cancel_work_sync(&sc->paprd_work);
173 cancel_delayed_work_sync(&sc->tx_complete_work);
174 cancel_delayed_work_sync(&sc->hw_pll_work);
176 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
177 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
178 cancel_work_sync(&sc->mci_work);
182 void ath_cancel_work(struct ath_softc *sc)
184 __ath_cancel_work(sc);
185 cancel_work_sync(&sc->hw_reset_work);
188 void ath_restart_work(struct ath_softc *sc)
190 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
192 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
193 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
194 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
199 static bool ath_prepare_reset(struct ath_softc *sc)
201 struct ath_hw *ah = sc->sc_ah;
204 ieee80211_stop_queues(sc->hw);
206 ath9k_hw_disable_interrupts(ah);
208 if (!ath_drain_all_txq(sc))
211 if (!ath_stoprecv(sc))
217 static bool ath_complete_reset(struct ath_softc *sc, bool start)
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
224 if (ath_startrecv(sc) != 0) {
225 ath_err(common, "Unable to restart recv logic\n");
229 ath9k_cmn_update_txpow(ah, sc->curtxpow,
230 sc->config.txpowlimit, &sc->curtxpow);
232 clear_bit(ATH_OP_HW_RESET, &common->op_flags);
233 ath9k_hw_set_interrupts(ah);
234 ath9k_hw_enable_interrupts(ah);
236 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) {
237 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
240 if (ah->opmode == NL80211_IFTYPE_STATION &&
241 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
242 spin_lock_irqsave(&sc->sc_pm_lock, flags);
243 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
244 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
246 ath9k_set_beacon(sc);
249 ath_restart_work(sc);
251 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
252 if (!ATH_TXQ_SETUP(sc, i))
255 spin_lock_bh(&sc->tx.txq[i].axq_lock);
256 ath_txq_schedule(sc, &sc->tx.txq[i]);
257 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
262 ieee80211_wake_queues(sc->hw);
264 ath9k_p2p_ps_timer(sc);
269 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
271 struct ath_hw *ah = sc->sc_ah;
272 struct ath_common *common = ath9k_hw_common(ah);
273 struct ath9k_hw_cal_data *caldata = NULL;
277 __ath_cancel_work(sc);
279 tasklet_disable(&sc->intr_tq);
280 spin_lock_bh(&sc->sc_pcu_lock);
282 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
284 caldata = &sc->caldata;
292 if (!ath_prepare_reset(sc))
295 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
296 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
298 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
301 "Unable to reset channel, reset status %d\n", r);
303 ath9k_hw_enable_interrupts(ah);
304 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
309 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
310 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
311 ath9k_mci_set_txpower(sc, true, false);
313 if (!ath_complete_reset(sc, true))
317 spin_unlock_bh(&sc->sc_pcu_lock);
318 tasklet_enable(&sc->intr_tq);
325 * Set/change channels. If the channel is really being changed, it's done
326 * by reseting the chip. To accomplish this we must first cleanup any pending
327 * DMA, then restart stuff.
329 static int ath_set_channel(struct ath_softc *sc, struct cfg80211_chan_def *chandef)
331 struct ath_hw *ah = sc->sc_ah;
332 struct ath_common *common = ath9k_hw_common(ah);
333 struct ieee80211_hw *hw = sc->hw;
334 struct ath9k_channel *hchan;
335 struct ieee80211_channel *chan = chandef->chan;
337 int pos = chan->hw_value;
341 if (test_bit(ATH_OP_INVALID, &common->op_flags))
344 offchannel = !!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL);
347 old_pos = ah->curchan - &ah->channels[0];
349 ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n",
350 chan->center_freq, chandef->width);
352 /* update survey stats for the old channel before switching */
353 spin_lock_bh(&common->cc_lock);
354 ath_update_survey_stats(sc);
355 spin_unlock_bh(&common->cc_lock);
357 ath9k_cmn_get_channel(hw, ah, chandef);
360 * If the operating channel changes, change the survey in-use flags
362 * Reset the survey data for the new channel, unless we're switching
363 * back to the operating channel from an off-channel operation.
365 if (!offchannel && sc->cur_survey != &sc->survey[pos]) {
367 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
369 sc->cur_survey = &sc->survey[pos];
371 memset(sc->cur_survey, 0, sizeof(struct survey_info));
372 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
373 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
374 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
377 hchan = &sc->sc_ah->channels[pos];
378 r = ath_reset_internal(sc, hchan);
383 * The most recent snapshot of channel->noisefloor for the old
384 * channel is only available after the hardware reset. Copy it to
385 * the survey stats now.
388 ath_update_survey_nf(sc, old_pos);
391 * Enable radar pulse detection if on a DFS channel. Spectral
392 * scanning and radar detection can not be used concurrently.
394 if (hw->conf.radar_enabled) {
397 /* set HW specific DFS configuration */
398 ath9k_hw_set_radar_params(ah);
399 rxfilter = ath9k_hw_getrxfilter(ah);
400 rxfilter |= ATH9K_RX_FILTER_PHYRADAR |
401 ATH9K_RX_FILTER_PHYERR;
402 ath9k_hw_setrxfilter(ah, rxfilter);
403 ath_dbg(common, DFS, "DFS enabled at freq %d\n",
406 /* perform spectral scan if requested. */
407 if (test_bit(ATH_OP_SCANNING, &common->op_flags) &&
408 sc->spectral_mode == SPECTRAL_CHANSCAN)
409 ath9k_spectral_scan_trigger(hw);
415 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
416 struct ieee80211_vif *vif)
419 an = (struct ath_node *)sta->drv_priv;
425 ath_tx_node_init(sc, an);
428 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
430 struct ath_node *an = (struct ath_node *)sta->drv_priv;
431 ath_tx_node_cleanup(sc, an);
434 void ath9k_tasklet(unsigned long data)
436 struct ath_softc *sc = (struct ath_softc *)data;
437 struct ath_hw *ah = sc->sc_ah;
438 struct ath_common *common = ath9k_hw_common(ah);
439 enum ath_reset_type type;
441 u32 status = sc->intrstatus;
445 spin_lock(&sc->sc_pcu_lock);
447 if (status & ATH9K_INT_FATAL) {
448 type = RESET_TYPE_FATAL_INT;
449 ath9k_queue_reset(sc, type);
452 * Increment the ref. counter here so that
453 * interrupts are enabled in the reset routine.
455 atomic_inc(&ah->intr_ref_cnt);
456 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
460 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
461 (status & ATH9K_INT_BB_WATCHDOG)) {
462 spin_lock(&common->cc_lock);
463 ath_hw_cycle_counters_update(common);
464 ar9003_hw_bb_watchdog_dbg_info(ah);
465 spin_unlock(&common->cc_lock);
467 if (ar9003_hw_bb_watchdog_check(ah)) {
468 type = RESET_TYPE_BB_WATCHDOG;
469 ath9k_queue_reset(sc, type);
472 * Increment the ref. counter here so that
473 * interrupts are enabled in the reset routine.
475 atomic_inc(&ah->intr_ref_cnt);
476 ath_dbg(common, RESET,
477 "BB_WATCHDOG: Skipping interrupts\n");
482 if (status & ATH9K_INT_GTT) {
485 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
486 type = RESET_TYPE_TX_GTT;
487 ath9k_queue_reset(sc, type);
488 atomic_inc(&ah->intr_ref_cnt);
489 ath_dbg(common, RESET,
490 "GTT: Skipping interrupts\n");
495 spin_lock_irqsave(&sc->sc_pm_lock, flags);
496 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
498 * TSF sync does not look correct; remain awake to sync with
501 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
502 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
504 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
506 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
507 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
510 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
512 if (status & rxmask) {
513 /* Check for high priority Rx first */
514 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
515 (status & ATH9K_INT_RXHP))
516 ath_rx_tasklet(sc, 0, true);
518 ath_rx_tasklet(sc, 0, false);
521 if (status & ATH9K_INT_TX) {
522 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
524 * For EDMA chips, TX completion is enabled for the
525 * beacon queue, so if a beacon has been transmitted
526 * successfully after a GTT interrupt, the GTT counter
527 * gets reset to zero here.
531 ath_tx_edma_tasklet(sc);
536 wake_up(&sc->tx_wait);
539 if (status & ATH9K_INT_GENTIMER)
540 ath_gen_timer_isr(sc->sc_ah);
542 ath9k_btcoex_handle_interrupt(sc, status);
544 /* re-enable hardware interrupt */
545 ath9k_hw_enable_interrupts(ah);
547 spin_unlock(&sc->sc_pcu_lock);
548 ath9k_ps_restore(sc);
551 irqreturn_t ath_isr(int irq, void *dev)
553 #define SCHED_INTR ( \
555 ATH9K_INT_BB_WATCHDOG | \
566 ATH9K_INT_GENTIMER | \
569 struct ath_softc *sc = dev;
570 struct ath_hw *ah = sc->sc_ah;
571 struct ath_common *common = ath9k_hw_common(ah);
572 enum ath9k_int status;
577 * The hardware is not ready/present, don't
578 * touch anything. Note this can happen early
579 * on if the IRQ is shared.
581 if (test_bit(ATH_OP_INVALID, &common->op_flags))
584 /* shared irq, not for us */
586 if (!ath9k_hw_intrpend(ah))
589 if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
590 ath9k_hw_kill_interrupts(ah);
595 * Figure out the reason(s) for the interrupt. Note
596 * that the hal returns a pseudo-ISR that may include
597 * bits we haven't explicitly enabled so we mask the
598 * value to insure we only process bits we requested.
600 ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
601 ath9k_debug_sync_cause(sc, sync_cause);
602 status &= ah->imask; /* discard unasked-for bits */
605 * If there are no status bits set, then this interrupt was not
606 * for me (should have been caught above).
611 /* Cache the status */
612 sc->intrstatus = status;
614 if (status & SCHED_INTR)
618 * If a FATAL or RXORN interrupt is received, we have to reset the
621 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
622 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
625 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
626 (status & ATH9K_INT_BB_WATCHDOG))
629 #ifdef CONFIG_ATH9K_WOW
630 if (status & ATH9K_INT_BMISS) {
631 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
632 atomic_inc(&sc->wow_got_bmiss_intr);
633 atomic_dec(&sc->wow_sleep_proc_intr);
638 if (status & ATH9K_INT_SWBA)
639 tasklet_schedule(&sc->bcon_tasklet);
641 if (status & ATH9K_INT_TXURN)
642 ath9k_hw_updatetxtriglevel(ah, true);
644 if (status & ATH9K_INT_RXEOL) {
645 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
646 ath9k_hw_set_interrupts(ah);
649 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
650 if (status & ATH9K_INT_TIM_TIMER) {
651 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
653 /* Clear RxAbort bit so that we can
655 ath9k_setpower(sc, ATH9K_PM_AWAKE);
656 spin_lock(&sc->sc_pm_lock);
657 ath9k_hw_setrxabort(sc->sc_ah, 0);
658 sc->ps_flags |= PS_WAIT_FOR_BEACON;
659 spin_unlock(&sc->sc_pm_lock);
664 ath_debug_stat_interrupt(sc, status);
667 /* turn off every interrupt */
668 ath9k_hw_disable_interrupts(ah);
669 tasklet_schedule(&sc->intr_tq);
677 int ath_reset(struct ath_softc *sc)
682 r = ath_reset_internal(sc, NULL);
683 ath9k_ps_restore(sc);
688 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
690 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
691 #ifdef CONFIG_ATH9K_DEBUGFS
692 RESET_STAT_INC(sc, type);
694 set_bit(ATH_OP_HW_RESET, &common->op_flags);
695 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
698 void ath_reset_work(struct work_struct *work)
700 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
705 /**********************/
706 /* mac80211 callbacks */
707 /**********************/
709 static int ath9k_start(struct ieee80211_hw *hw)
711 struct ath_softc *sc = hw->priv;
712 struct ath_hw *ah = sc->sc_ah;
713 struct ath_common *common = ath9k_hw_common(ah);
714 struct ieee80211_channel *curchan = hw->conf.chandef.chan;
715 struct ath9k_channel *init_channel;
718 ath_dbg(common, CONFIG,
719 "Starting driver with initial channel: %d MHz\n",
720 curchan->center_freq);
723 mutex_lock(&sc->mutex);
725 init_channel = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef);
727 /* Reset SERDES registers */
728 ath9k_hw_configpcipowersave(ah, false);
731 * The basic interface to setting the hardware in a good
732 * state is ``reset''. On return the hardware is known to
733 * be powered up and with interrupts disabled. This must
734 * be followed by initialization of the appropriate bits
735 * and then setup of the interrupt mask.
737 spin_lock_bh(&sc->sc_pcu_lock);
739 atomic_set(&ah->intr_ref_cnt, -1);
741 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
744 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
745 r, curchan->center_freq);
746 ah->reset_power_on = false;
749 /* Setup our intr mask. */
750 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
751 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
754 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
755 ah->imask |= ATH9K_INT_RXHP |
758 ah->imask |= ATH9K_INT_RX;
760 if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
761 ah->imask |= ATH9K_INT_BB_WATCHDOG;
764 * Enable GTT interrupts only for AR9003/AR9004 chips
767 if (AR_SREV_9300_20_OR_LATER(ah))
768 ah->imask |= ATH9K_INT_GTT;
770 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
771 ah->imask |= ATH9K_INT_CST;
775 clear_bit(ATH_OP_INVALID, &common->op_flags);
776 sc->sc_ah->is_monitoring = false;
778 if (!ath_complete_reset(sc, false))
779 ah->reset_power_on = false;
781 if (ah->led_pin >= 0) {
782 ath9k_hw_cfg_output(ah, ah->led_pin,
783 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
784 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
788 * Reset key cache to sane defaults (all entries cleared) instead of
789 * semi-random values after suspend/resume.
791 ath9k_cmn_init_crypto(sc->sc_ah);
793 ath9k_hw_reset_tsf(ah);
795 spin_unlock_bh(&sc->sc_pcu_lock);
797 mutex_unlock(&sc->mutex);
799 ath9k_ps_restore(sc);
804 static void ath9k_tx(struct ieee80211_hw *hw,
805 struct ieee80211_tx_control *control,
808 struct ath_softc *sc = hw->priv;
809 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
810 struct ath_tx_control txctl;
811 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
814 if (sc->ps_enabled) {
816 * mac80211 does not set PM field for normal data frames, so we
817 * need to update that based on the current PS mode.
819 if (ieee80211_is_data(hdr->frame_control) &&
820 !ieee80211_is_nullfunc(hdr->frame_control) &&
821 !ieee80211_has_pm(hdr->frame_control)) {
823 "Add PM=1 for a TX frame while in PS mode\n");
824 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
828 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
830 * We are using PS-Poll and mac80211 can request TX while in
831 * power save mode. Need to wake up hardware for the TX to be
832 * completed and if needed, also for RX of buffered frames.
835 spin_lock_irqsave(&sc->sc_pm_lock, flags);
836 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
837 ath9k_hw_setrxabort(sc->sc_ah, 0);
838 if (ieee80211_is_pspoll(hdr->frame_control)) {
840 "Sending PS-Poll to pick a buffered frame\n");
841 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
843 ath_dbg(common, PS, "Wake up to complete TX\n");
844 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
847 * The actual restore operation will happen only after
848 * the ps_flags bit is cleared. We are just dropping
849 * the ps_usecount here.
851 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
852 ath9k_ps_restore(sc);
856 * Cannot tx while the hardware is in full sleep, it first needs a full
857 * chip reset to recover from that
859 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
860 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
864 memset(&txctl, 0, sizeof(struct ath_tx_control));
865 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
866 txctl.sta = control->sta;
868 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
870 if (ath_tx_start(hw, skb, &txctl) != 0) {
871 ath_dbg(common, XMIT, "TX failed\n");
872 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
878 ieee80211_free_txskb(hw, skb);
881 static void ath9k_stop(struct ieee80211_hw *hw)
883 struct ath_softc *sc = hw->priv;
884 struct ath_hw *ah = sc->sc_ah;
885 struct ath_common *common = ath9k_hw_common(ah);
888 mutex_lock(&sc->mutex);
892 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
893 ath_dbg(common, ANY, "Device not present\n");
894 mutex_unlock(&sc->mutex);
898 /* Ensure HW is awake when we try to shut it down. */
901 spin_lock_bh(&sc->sc_pcu_lock);
903 /* prevent tasklets to enable interrupts once we disable them */
904 ah->imask &= ~ATH9K_INT_GLOBAL;
906 /* make sure h/w will not generate any interrupt
907 * before setting the invalid flag. */
908 ath9k_hw_disable_interrupts(ah);
910 spin_unlock_bh(&sc->sc_pcu_lock);
912 /* we can now sync irq and kill any running tasklets, since we already
913 * disabled interrupts and not holding a spin lock */
914 synchronize_irq(sc->irq);
915 tasklet_kill(&sc->intr_tq);
916 tasklet_kill(&sc->bcon_tasklet);
918 prev_idle = sc->ps_idle;
921 spin_lock_bh(&sc->sc_pcu_lock);
923 if (ah->led_pin >= 0) {
924 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
925 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
928 ath_prepare_reset(sc);
931 dev_kfree_skb_any(sc->rx.frag);
936 ah->curchan = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef);
938 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
939 ath9k_hw_phy_disable(ah);
941 ath9k_hw_configpcipowersave(ah, true);
943 spin_unlock_bh(&sc->sc_pcu_lock);
945 ath9k_ps_restore(sc);
947 set_bit(ATH_OP_INVALID, &common->op_flags);
948 sc->ps_idle = prev_idle;
950 mutex_unlock(&sc->mutex);
952 ath_dbg(common, CONFIG, "Driver halt\n");
955 static bool ath9k_uses_beacons(int type)
958 case NL80211_IFTYPE_AP:
959 case NL80211_IFTYPE_ADHOC:
960 case NL80211_IFTYPE_MESH_POINT:
967 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
969 struct ath9k_vif_iter_data *iter_data = data;
972 if (iter_data->has_hw_macaddr) {
973 for (i = 0; i < ETH_ALEN; i++)
974 iter_data->mask[i] &=
975 ~(iter_data->hw_macaddr[i] ^ mac[i]);
977 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
978 iter_data->has_hw_macaddr = true;
982 case NL80211_IFTYPE_AP:
985 case NL80211_IFTYPE_STATION:
986 iter_data->nstations++;
988 case NL80211_IFTYPE_ADHOC:
989 iter_data->nadhocs++;
991 case NL80211_IFTYPE_MESH_POINT:
992 iter_data->nmeshes++;
994 case NL80211_IFTYPE_WDS:
1002 static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1004 struct ath_softc *sc = data;
1005 struct ath_vif *avp = (void *)vif->drv_priv;
1007 if (vif->type != NL80211_IFTYPE_STATION)
1010 if (avp->primary_sta_vif)
1011 ath9k_set_assoc_state(sc, vif);
1014 /* Called with sc->mutex held. */
1015 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1016 struct ieee80211_vif *vif,
1017 struct ath9k_vif_iter_data *iter_data)
1019 struct ath_softc *sc = hw->priv;
1020 struct ath_hw *ah = sc->sc_ah;
1021 struct ath_common *common = ath9k_hw_common(ah);
1024 * Pick the MAC address of the first interface as the new hardware
1025 * MAC address. The hardware will use it together with the BSSID mask
1026 * when matching addresses.
1028 memset(iter_data, 0, sizeof(*iter_data));
1029 memset(&iter_data->mask, 0xff, ETH_ALEN);
1032 ath9k_vif_iter(iter_data, vif->addr, vif);
1034 /* Get list of all active MAC addresses */
1035 ieee80211_iterate_active_interfaces_atomic(
1036 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1037 ath9k_vif_iter, iter_data);
1039 memcpy(common->macaddr, iter_data->hw_macaddr, ETH_ALEN);
1042 /* Called with sc->mutex held. */
1043 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1044 struct ieee80211_vif *vif)
1046 struct ath_softc *sc = hw->priv;
1047 struct ath_hw *ah = sc->sc_ah;
1048 struct ath_common *common = ath9k_hw_common(ah);
1049 struct ath9k_vif_iter_data iter_data;
1050 enum nl80211_iftype old_opmode = ah->opmode;
1052 ath9k_calculate_iter_data(hw, vif, &iter_data);
1054 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1055 ath_hw_setbssidmask(common);
1057 if (iter_data.naps > 0) {
1058 ath9k_hw_set_tsfadjust(ah, true);
1059 ah->opmode = NL80211_IFTYPE_AP;
1061 ath9k_hw_set_tsfadjust(ah, false);
1063 if (iter_data.nmeshes)
1064 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1065 else if (iter_data.nwds)
1066 ah->opmode = NL80211_IFTYPE_AP;
1067 else if (iter_data.nadhocs)
1068 ah->opmode = NL80211_IFTYPE_ADHOC;
1070 ah->opmode = NL80211_IFTYPE_STATION;
1073 ath9k_hw_setopmode(ah);
1075 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1076 ah->imask |= ATH9K_INT_TSFOOR;
1078 ah->imask &= ~ATH9K_INT_TSFOOR;
1080 ath9k_hw_set_interrupts(ah);
1083 * If we are changing the opmode to STATION,
1084 * a beacon sync needs to be done.
1086 if (ah->opmode == NL80211_IFTYPE_STATION &&
1087 old_opmode == NL80211_IFTYPE_AP &&
1088 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
1089 ieee80211_iterate_active_interfaces_atomic(
1090 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1091 ath9k_sta_vif_iter, sc);
1095 static int ath9k_add_interface(struct ieee80211_hw *hw,
1096 struct ieee80211_vif *vif)
1098 struct ath_softc *sc = hw->priv;
1099 struct ath_hw *ah = sc->sc_ah;
1100 struct ath_common *common = ath9k_hw_common(ah);
1101 struct ath_vif *avp = (void *)vif->drv_priv;
1102 struct ath_node *an = &avp->mcast_node;
1104 mutex_lock(&sc->mutex);
1106 if (config_enabled(CONFIG_ATH9K_TX99)) {
1107 if (sc->nvifs >= 1) {
1108 mutex_unlock(&sc->mutex);
1114 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1117 ath9k_ps_wakeup(sc);
1118 ath9k_calculate_summary_state(hw, vif);
1119 ath9k_ps_restore(sc);
1121 if (ath9k_uses_beacons(vif->type))
1122 ath9k_beacon_assign_slot(sc, vif);
1129 an->no_ps_filter = true;
1130 ath_tx_node_init(sc, an);
1132 mutex_unlock(&sc->mutex);
1136 static int ath9k_change_interface(struct ieee80211_hw *hw,
1137 struct ieee80211_vif *vif,
1138 enum nl80211_iftype new_type,
1141 struct ath_softc *sc = hw->priv;
1142 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1144 mutex_lock(&sc->mutex);
1146 if (config_enabled(CONFIG_ATH9K_TX99)) {
1147 mutex_unlock(&sc->mutex);
1151 ath_dbg(common, CONFIG, "Change Interface\n");
1153 if (ath9k_uses_beacons(vif->type))
1154 ath9k_beacon_remove_slot(sc, vif);
1156 vif->type = new_type;
1159 ath9k_ps_wakeup(sc);
1160 ath9k_calculate_summary_state(hw, vif);
1161 ath9k_ps_restore(sc);
1163 if (ath9k_uses_beacons(vif->type))
1164 ath9k_beacon_assign_slot(sc, vif);
1166 mutex_unlock(&sc->mutex);
1171 ath9k_update_p2p_ps_timer(struct ath_softc *sc, struct ath_vif *avp)
1173 struct ath_hw *ah = sc->sc_ah;
1174 s32 tsf, target_tsf;
1176 if (!avp || !avp->noa.has_next_tsf)
1179 ath9k_hw_gen_timer_stop(ah, sc->p2p_ps_timer);
1181 tsf = ath9k_hw_gettsf32(sc->sc_ah);
1183 target_tsf = avp->noa.next_tsf;
1184 if (!avp->noa.absent)
1185 target_tsf -= ATH_P2P_PS_STOP_TIME;
1187 if (target_tsf - tsf < ATH_P2P_PS_STOP_TIME)
1188 target_tsf = tsf + ATH_P2P_PS_STOP_TIME;
1190 ath9k_hw_gen_timer_start(ah, sc->p2p_ps_timer, (u32) target_tsf, 1000000);
1193 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1194 struct ieee80211_vif *vif)
1196 struct ath_softc *sc = hw->priv;
1197 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1198 struct ath_vif *avp = (void *)vif->drv_priv;
1200 ath_dbg(common, CONFIG, "Detach Interface\n");
1202 mutex_lock(&sc->mutex);
1204 spin_lock_bh(&sc->sc_pcu_lock);
1205 if (avp == sc->p2p_ps_vif) {
1206 sc->p2p_ps_vif = NULL;
1207 ath9k_update_p2p_ps_timer(sc, NULL);
1209 spin_unlock_bh(&sc->sc_pcu_lock);
1212 sc->tx99_vif = NULL;
1214 if (ath9k_uses_beacons(vif->type))
1215 ath9k_beacon_remove_slot(sc, vif);
1217 ath9k_ps_wakeup(sc);
1218 ath9k_calculate_summary_state(hw, NULL);
1219 ath9k_ps_restore(sc);
1221 ath_tx_node_cleanup(sc, &avp->mcast_node);
1223 mutex_unlock(&sc->mutex);
1226 static void ath9k_enable_ps(struct ath_softc *sc)
1228 struct ath_hw *ah = sc->sc_ah;
1229 struct ath_common *common = ath9k_hw_common(ah);
1231 if (config_enabled(CONFIG_ATH9K_TX99))
1234 sc->ps_enabled = true;
1235 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1236 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1237 ah->imask |= ATH9K_INT_TIM_TIMER;
1238 ath9k_hw_set_interrupts(ah);
1240 ath9k_hw_setrxabort(ah, 1);
1242 ath_dbg(common, PS, "PowerSave enabled\n");
1245 static void ath9k_disable_ps(struct ath_softc *sc)
1247 struct ath_hw *ah = sc->sc_ah;
1248 struct ath_common *common = ath9k_hw_common(ah);
1250 if (config_enabled(CONFIG_ATH9K_TX99))
1253 sc->ps_enabled = false;
1254 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1255 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1256 ath9k_hw_setrxabort(ah, 0);
1257 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1259 PS_WAIT_FOR_PSPOLL_DATA |
1260 PS_WAIT_FOR_TX_ACK);
1261 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1262 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1263 ath9k_hw_set_interrupts(ah);
1266 ath_dbg(common, PS, "PowerSave disabled\n");
1269 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1271 struct ath_softc *sc = hw->priv;
1272 struct ath_hw *ah = sc->sc_ah;
1273 struct ath_common *common = ath9k_hw_common(ah);
1276 if (config_enabled(CONFIG_ATH9K_TX99))
1279 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1280 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1284 ath9k_ps_wakeup(sc);
1285 rxfilter = ath9k_hw_getrxfilter(ah);
1286 ath9k_hw_setrxfilter(ah, rxfilter |
1287 ATH9K_RX_FILTER_PHYRADAR |
1288 ATH9K_RX_FILTER_PHYERR);
1290 /* TODO: usually this should not be neccesary, but for some reason
1291 * (or in some mode?) the trigger must be called after the
1292 * configuration, otherwise the register will have its values reset
1293 * (on my ar9220 to value 0x01002310)
1295 ath9k_spectral_scan_config(hw, sc->spectral_mode);
1296 ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1297 ath9k_ps_restore(sc);
1300 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1301 enum spectral_mode spectral_mode)
1303 struct ath_softc *sc = hw->priv;
1304 struct ath_hw *ah = sc->sc_ah;
1305 struct ath_common *common = ath9k_hw_common(ah);
1307 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1308 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1312 switch (spectral_mode) {
1313 case SPECTRAL_DISABLED:
1314 sc->spec_config.enabled = 0;
1316 case SPECTRAL_BACKGROUND:
1317 /* send endless samples.
1318 * TODO: is this really useful for "background"?
1320 sc->spec_config.endless = 1;
1321 sc->spec_config.enabled = 1;
1323 case SPECTRAL_CHANSCAN:
1324 case SPECTRAL_MANUAL:
1325 sc->spec_config.endless = 0;
1326 sc->spec_config.enabled = 1;
1332 ath9k_ps_wakeup(sc);
1333 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1334 ath9k_ps_restore(sc);
1336 sc->spectral_mode = spectral_mode;
1341 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1343 struct ath_softc *sc = hw->priv;
1344 struct ath_hw *ah = sc->sc_ah;
1345 struct ath_common *common = ath9k_hw_common(ah);
1346 struct ieee80211_conf *conf = &hw->conf;
1347 bool reset_channel = false;
1349 ath9k_ps_wakeup(sc);
1350 mutex_lock(&sc->mutex);
1352 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1353 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1355 ath_cancel_work(sc);
1356 ath9k_stop_btcoex(sc);
1358 ath9k_start_btcoex(sc);
1360 * The chip needs a reset to properly wake up from
1363 reset_channel = ah->chip_fullsleep;
1368 * We just prepare to enable PS. We have to wait until our AP has
1369 * ACK'd our null data frame to disable RX otherwise we'll ignore
1370 * those ACKs and end up retransmitting the same null data frames.
1371 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1373 if (changed & IEEE80211_CONF_CHANGE_PS) {
1374 unsigned long flags;
1375 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1376 if (conf->flags & IEEE80211_CONF_PS)
1377 ath9k_enable_ps(sc);
1379 ath9k_disable_ps(sc);
1380 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1383 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1384 if (conf->flags & IEEE80211_CONF_MONITOR) {
1385 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1386 sc->sc_ah->is_monitoring = true;
1388 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1389 sc->sc_ah->is_monitoring = false;
1393 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1394 if (ath_set_channel(sc, &hw->conf.chandef) < 0) {
1395 ath_err(common, "Unable to set channel\n");
1396 mutex_unlock(&sc->mutex);
1397 ath9k_ps_restore(sc);
1402 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1403 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1404 sc->config.txpowlimit = 2 * conf->power_level;
1405 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1406 sc->config.txpowlimit, &sc->curtxpow);
1409 mutex_unlock(&sc->mutex);
1410 ath9k_ps_restore(sc);
1415 #define SUPPORTED_FILTERS \
1416 (FIF_PROMISC_IN_BSS | \
1421 FIF_BCN_PRBRESP_PROMISC | \
1425 /* FIXME: sc->sc_full_reset ? */
1426 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1427 unsigned int changed_flags,
1428 unsigned int *total_flags,
1431 struct ath_softc *sc = hw->priv;
1434 changed_flags &= SUPPORTED_FILTERS;
1435 *total_flags &= SUPPORTED_FILTERS;
1437 sc->rx.rxfilter = *total_flags;
1438 ath9k_ps_wakeup(sc);
1439 rfilt = ath_calcrxfilter(sc);
1440 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1441 ath9k_ps_restore(sc);
1443 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1447 static int ath9k_sta_add(struct ieee80211_hw *hw,
1448 struct ieee80211_vif *vif,
1449 struct ieee80211_sta *sta)
1451 struct ath_softc *sc = hw->priv;
1452 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1453 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1454 struct ieee80211_key_conf ps_key = { };
1457 ath_node_attach(sc, sta, vif);
1459 if (vif->type != NL80211_IFTYPE_AP &&
1460 vif->type != NL80211_IFTYPE_AP_VLAN)
1463 key = ath_key_config(common, vif, sta, &ps_key);
1470 static void ath9k_del_ps_key(struct ath_softc *sc,
1471 struct ieee80211_vif *vif,
1472 struct ieee80211_sta *sta)
1474 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1475 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1476 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1481 ath_key_delete(common, &ps_key);
1485 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1486 struct ieee80211_vif *vif,
1487 struct ieee80211_sta *sta)
1489 struct ath_softc *sc = hw->priv;
1491 ath9k_del_ps_key(sc, vif, sta);
1492 ath_node_detach(sc, sta);
1497 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1498 struct ieee80211_vif *vif,
1499 enum sta_notify_cmd cmd,
1500 struct ieee80211_sta *sta)
1502 struct ath_softc *sc = hw->priv;
1503 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1506 case STA_NOTIFY_SLEEP:
1507 an->sleeping = true;
1508 ath_tx_aggr_sleep(sta, sc, an);
1510 case STA_NOTIFY_AWAKE:
1511 an->sleeping = false;
1512 ath_tx_aggr_wakeup(sc, an);
1517 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1518 struct ieee80211_vif *vif, u16 queue,
1519 const struct ieee80211_tx_queue_params *params)
1521 struct ath_softc *sc = hw->priv;
1522 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1523 struct ath_txq *txq;
1524 struct ath9k_tx_queue_info qi;
1527 if (queue >= IEEE80211_NUM_ACS)
1530 txq = sc->tx.txq_map[queue];
1532 ath9k_ps_wakeup(sc);
1533 mutex_lock(&sc->mutex);
1535 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1537 qi.tqi_aifs = params->aifs;
1538 qi.tqi_cwmin = params->cw_min;
1539 qi.tqi_cwmax = params->cw_max;
1540 qi.tqi_burstTime = params->txop * 32;
1542 ath_dbg(common, CONFIG,
1543 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1544 queue, txq->axq_qnum, params->aifs, params->cw_min,
1545 params->cw_max, params->txop);
1547 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1548 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1550 ath_err(common, "TXQ Update failed\n");
1552 mutex_unlock(&sc->mutex);
1553 ath9k_ps_restore(sc);
1558 static int ath9k_set_key(struct ieee80211_hw *hw,
1559 enum set_key_cmd cmd,
1560 struct ieee80211_vif *vif,
1561 struct ieee80211_sta *sta,
1562 struct ieee80211_key_conf *key)
1564 struct ath_softc *sc = hw->priv;
1565 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1568 if (ath9k_modparam_nohwcrypt)
1571 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1572 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1573 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1574 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1575 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1577 * For now, disable hw crypto for the RSN IBSS group keys. This
1578 * could be optimized in the future to use a modified key cache
1579 * design to support per-STA RX GTK, but until that gets
1580 * implemented, use of software crypto for group addressed
1581 * frames is a acceptable to allow RSN IBSS to be used.
1586 mutex_lock(&sc->mutex);
1587 ath9k_ps_wakeup(sc);
1588 ath_dbg(common, CONFIG, "Set HW Key\n");
1593 ath9k_del_ps_key(sc, vif, sta);
1595 ret = ath_key_config(common, vif, sta, key);
1597 key->hw_key_idx = ret;
1598 /* push IV and Michael MIC generation to stack */
1599 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1600 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1601 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1602 if (sc->sc_ah->sw_mgmt_crypto &&
1603 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1604 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1609 ath_key_delete(common, key);
1615 ath9k_ps_restore(sc);
1616 mutex_unlock(&sc->mutex);
1621 static void ath9k_set_assoc_state(struct ath_softc *sc,
1622 struct ieee80211_vif *vif)
1624 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1625 struct ath_vif *avp = (void *)vif->drv_priv;
1626 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1627 unsigned long flags;
1629 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1630 avp->primary_sta_vif = true;
1633 * Set the AID, BSSID and do beacon-sync only when
1634 * the HW opmode is STATION.
1636 * But the primary bit is set above in any case.
1638 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1641 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1642 common->curaid = bss_conf->aid;
1643 ath9k_hw_write_associd(sc->sc_ah);
1645 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1646 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1648 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1649 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1650 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1652 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1653 ath9k_mci_update_wlan_channels(sc, false);
1655 ath_dbg(common, CONFIG,
1656 "Primary Station interface: %pM, BSSID: %pM\n",
1657 vif->addr, common->curbssid);
1660 static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1662 struct ath_softc *sc = data;
1663 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1664 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1666 if (test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags))
1669 if (bss_conf->assoc)
1670 ath9k_set_assoc_state(sc, vif);
1673 void ath9k_p2p_ps_timer(void *priv)
1675 struct ath_softc *sc = priv;
1676 struct ath_vif *avp = sc->p2p_ps_vif;
1677 struct ieee80211_vif *vif;
1678 struct ieee80211_sta *sta;
1679 struct ath_node *an;
1685 tsf = ath9k_hw_gettsf32(sc->sc_ah);
1686 if (!avp->noa.absent)
1687 tsf += ATH_P2P_PS_STOP_TIME;
1689 if (!avp->noa.has_next_tsf ||
1690 avp->noa.next_tsf - tsf > BIT(31))
1691 ieee80211_update_p2p_noa(&avp->noa, tsf);
1693 ath9k_update_p2p_ps_timer(sc, avp);
1698 sta = ieee80211_find_sta(vif, vif->bss_conf.bssid);
1702 an = (void *) sta->drv_priv;
1703 if (an->sleeping == !!avp->noa.absent)
1706 an->sleeping = avp->noa.absent;
1708 ath_tx_aggr_sleep(sta, sc, an);
1710 ath_tx_aggr_wakeup(sc, an);
1716 void ath9k_update_p2p_ps(struct ath_softc *sc, struct ieee80211_vif *vif)
1718 struct ath_vif *avp = (void *)vif->drv_priv;
1719 unsigned long flags;
1722 if (!sc->p2p_ps_timer)
1725 if (vif->type != NL80211_IFTYPE_STATION || !vif->p2p)
1728 sc->p2p_ps_vif = avp;
1730 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1731 if (!(sc->ps_flags & PS_BEACON_SYNC)) {
1732 tsf = ath9k_hw_gettsf32(sc->sc_ah);
1733 ieee80211_parse_p2p_noa(&vif->bss_conf.p2p_noa_attr, &avp->noa, tsf);
1734 ath9k_update_p2p_ps_timer(sc, avp);
1736 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1739 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1740 struct ieee80211_vif *vif,
1741 struct ieee80211_bss_conf *bss_conf,
1745 (BSS_CHANGED_ASSOC | \
1746 BSS_CHANGED_IBSS | \
1747 BSS_CHANGED_BEACON_ENABLED)
1749 struct ath_softc *sc = hw->priv;
1750 struct ath_hw *ah = sc->sc_ah;
1751 struct ath_common *common = ath9k_hw_common(ah);
1752 struct ath_vif *avp = (void *)vif->drv_priv;
1755 ath9k_ps_wakeup(sc);
1756 mutex_lock(&sc->mutex);
1758 if (changed & BSS_CHANGED_ASSOC) {
1759 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1760 bss_conf->bssid, bss_conf->assoc);
1762 if (avp->primary_sta_vif && !bss_conf->assoc) {
1763 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1764 avp->primary_sta_vif = false;
1766 if (ah->opmode == NL80211_IFTYPE_STATION)
1767 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1770 ieee80211_iterate_active_interfaces_atomic(
1771 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1772 ath9k_bss_assoc_iter, sc);
1774 if (!test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags) &&
1775 ah->opmode == NL80211_IFTYPE_STATION) {
1776 memset(common->curbssid, 0, ETH_ALEN);
1778 ath9k_hw_write_associd(sc->sc_ah);
1779 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1780 ath9k_mci_update_wlan_channels(sc, true);
1784 if (changed & BSS_CHANGED_IBSS) {
1785 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1786 common->curaid = bss_conf->aid;
1787 ath9k_hw_write_associd(sc->sc_ah);
1790 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1791 (changed & BSS_CHANGED_BEACON_INT))
1792 ath9k_beacon_config(sc, vif, changed);
1794 if (changed & BSS_CHANGED_ERP_SLOT) {
1795 if (bss_conf->use_short_slot)
1799 if (vif->type == NL80211_IFTYPE_AP) {
1801 * Defer update, so that connected stations can adjust
1802 * their settings at the same time.
1803 * See beacon.c for more details
1805 sc->beacon.slottime = slottime;
1806 sc->beacon.updateslot = UPDATE;
1808 ah->slottime = slottime;
1809 ath9k_hw_init_global_settings(ah);
1813 if (changed & BSS_CHANGED_P2P_PS) {
1814 spin_lock_bh(&sc->sc_pcu_lock);
1815 ath9k_update_p2p_ps(sc, vif);
1816 spin_unlock_bh(&sc->sc_pcu_lock);
1819 if (changed & CHECK_ANI)
1822 mutex_unlock(&sc->mutex);
1823 ath9k_ps_restore(sc);
1828 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1830 struct ath_softc *sc = hw->priv;
1833 mutex_lock(&sc->mutex);
1834 ath9k_ps_wakeup(sc);
1835 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1836 ath9k_ps_restore(sc);
1837 mutex_unlock(&sc->mutex);
1842 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1843 struct ieee80211_vif *vif,
1846 struct ath_softc *sc = hw->priv;
1848 mutex_lock(&sc->mutex);
1849 ath9k_ps_wakeup(sc);
1850 ath9k_hw_settsf64(sc->sc_ah, tsf);
1851 ath9k_ps_restore(sc);
1852 mutex_unlock(&sc->mutex);
1855 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1857 struct ath_softc *sc = hw->priv;
1859 mutex_lock(&sc->mutex);
1861 ath9k_ps_wakeup(sc);
1862 ath9k_hw_reset_tsf(sc->sc_ah);
1863 ath9k_ps_restore(sc);
1865 mutex_unlock(&sc->mutex);
1868 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1869 struct ieee80211_vif *vif,
1870 enum ieee80211_ampdu_mlme_action action,
1871 struct ieee80211_sta *sta,
1872 u16 tid, u16 *ssn, u8 buf_size)
1874 struct ath_softc *sc = hw->priv;
1878 mutex_lock(&sc->mutex);
1881 case IEEE80211_AMPDU_RX_START:
1883 case IEEE80211_AMPDU_RX_STOP:
1885 case IEEE80211_AMPDU_TX_START:
1886 ath9k_ps_wakeup(sc);
1887 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1889 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1890 ath9k_ps_restore(sc);
1892 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1893 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1895 case IEEE80211_AMPDU_TX_STOP_CONT:
1896 ath9k_ps_wakeup(sc);
1897 ath_tx_aggr_stop(sc, sta, tid);
1899 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1900 ath9k_ps_restore(sc);
1902 case IEEE80211_AMPDU_TX_OPERATIONAL:
1903 ath9k_ps_wakeup(sc);
1904 ath_tx_aggr_resume(sc, sta, tid);
1905 ath9k_ps_restore(sc);
1908 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1911 mutex_unlock(&sc->mutex);
1916 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1917 struct survey_info *survey)
1919 struct ath_softc *sc = hw->priv;
1920 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1921 struct ieee80211_supported_band *sband;
1922 struct ieee80211_channel *chan;
1925 if (config_enabled(CONFIG_ATH9K_TX99))
1928 spin_lock_bh(&common->cc_lock);
1930 ath_update_survey_stats(sc);
1932 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1933 if (sband && idx >= sband->n_channels) {
1934 idx -= sband->n_channels;
1939 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1941 if (!sband || idx >= sband->n_channels) {
1942 spin_unlock_bh(&common->cc_lock);
1946 chan = &sband->channels[idx];
1947 pos = chan->hw_value;
1948 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1949 survey->channel = chan;
1950 spin_unlock_bh(&common->cc_lock);
1955 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1957 struct ath_softc *sc = hw->priv;
1958 struct ath_hw *ah = sc->sc_ah;
1960 if (config_enabled(CONFIG_ATH9K_TX99))
1963 mutex_lock(&sc->mutex);
1964 ah->coverage_class = coverage_class;
1966 ath9k_ps_wakeup(sc);
1967 ath9k_hw_init_global_settings(ah);
1968 ath9k_ps_restore(sc);
1970 mutex_unlock(&sc->mutex);
1973 static bool ath9k_has_tx_pending(struct ath_softc *sc)
1977 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1978 if (!ATH_TXQ_SETUP(sc, i))
1981 if (!sc->tx.txq[i].axq_depth)
1984 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1992 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1993 u32 queues, bool drop)
1995 struct ath_softc *sc = hw->priv;
1996 struct ath_hw *ah = sc->sc_ah;
1997 struct ath_common *common = ath9k_hw_common(ah);
1998 int timeout = HZ / 5; /* 200 ms */
2001 mutex_lock(&sc->mutex);
2002 cancel_delayed_work_sync(&sc->tx_complete_work);
2004 if (ah->ah_flags & AH_UNPLUGGED) {
2005 ath_dbg(common, ANY, "Device has been unplugged!\n");
2006 mutex_unlock(&sc->mutex);
2010 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2011 ath_dbg(common, ANY, "Device not present\n");
2012 mutex_unlock(&sc->mutex);
2016 if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc),
2021 ath9k_ps_wakeup(sc);
2022 spin_lock_bh(&sc->sc_pcu_lock);
2023 drain_txq = ath_drain_all_txq(sc);
2024 spin_unlock_bh(&sc->sc_pcu_lock);
2029 ath9k_ps_restore(sc);
2030 ieee80211_wake_queues(hw);
2033 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2034 mutex_unlock(&sc->mutex);
2037 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2039 struct ath_softc *sc = hw->priv;
2042 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2043 if (!ATH_TXQ_SETUP(sc, i))
2046 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2052 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2054 struct ath_softc *sc = hw->priv;
2055 struct ath_hw *ah = sc->sc_ah;
2056 struct ieee80211_vif *vif;
2057 struct ath_vif *avp;
2059 struct ath_tx_status ts;
2060 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2063 vif = sc->beacon.bslot[0];
2067 if (!vif->bss_conf.enable_beacon)
2070 avp = (void *)vif->drv_priv;
2072 if (!sc->beacon.tx_processed && !edma) {
2073 tasklet_disable(&sc->bcon_tasklet);
2076 if (!bf || !bf->bf_mpdu)
2079 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2080 if (status == -EINPROGRESS)
2083 sc->beacon.tx_processed = true;
2084 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2087 tasklet_enable(&sc->bcon_tasklet);
2090 return sc->beacon.tx_last;
2093 static int ath9k_get_stats(struct ieee80211_hw *hw,
2094 struct ieee80211_low_level_stats *stats)
2096 struct ath_softc *sc = hw->priv;
2097 struct ath_hw *ah = sc->sc_ah;
2098 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2100 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2101 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2102 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2103 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2107 static u32 fill_chainmask(u32 cap, u32 new)
2112 for (i = 0; cap && new; i++, cap >>= 1) {
2113 if (!(cap & BIT(0)))
2125 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2127 if (AR_SREV_9300_20_OR_LATER(ah))
2130 switch (val & 0x7) {
2136 return (ah->caps.rx_chainmask == 1);
2142 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2144 struct ath_softc *sc = hw->priv;
2145 struct ath_hw *ah = sc->sc_ah;
2147 if (ah->caps.rx_chainmask != 1)
2150 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2153 sc->ant_rx = rx_ant;
2154 sc->ant_tx = tx_ant;
2156 if (ah->caps.rx_chainmask == 1)
2159 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2160 if (AR_SREV_9100(ah))
2161 ah->rxchainmask = 0x7;
2163 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2165 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2166 ath9k_cmn_reload_chainmask(ah);
2171 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2173 struct ath_softc *sc = hw->priv;
2175 *tx_ant = sc->ant_tx;
2176 *rx_ant = sc->ant_rx;
2180 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2182 struct ath_softc *sc = hw->priv;
2183 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2184 set_bit(ATH_OP_SCANNING, &common->op_flags);
2187 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2189 struct ath_softc *sc = hw->priv;
2190 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2191 clear_bit(ATH_OP_SCANNING, &common->op_flags);
2194 static void ath9k_channel_switch_beacon(struct ieee80211_hw *hw,
2195 struct ieee80211_vif *vif,
2196 struct cfg80211_chan_def *chandef)
2198 /* depend on vif->csa_active only */
2202 struct ieee80211_ops ath9k_ops = {
2204 .start = ath9k_start,
2206 .add_interface = ath9k_add_interface,
2207 .change_interface = ath9k_change_interface,
2208 .remove_interface = ath9k_remove_interface,
2209 .config = ath9k_config,
2210 .configure_filter = ath9k_configure_filter,
2211 .sta_add = ath9k_sta_add,
2212 .sta_remove = ath9k_sta_remove,
2213 .sta_notify = ath9k_sta_notify,
2214 .conf_tx = ath9k_conf_tx,
2215 .bss_info_changed = ath9k_bss_info_changed,
2216 .set_key = ath9k_set_key,
2217 .get_tsf = ath9k_get_tsf,
2218 .set_tsf = ath9k_set_tsf,
2219 .reset_tsf = ath9k_reset_tsf,
2220 .ampdu_action = ath9k_ampdu_action,
2221 .get_survey = ath9k_get_survey,
2222 .rfkill_poll = ath9k_rfkill_poll_state,
2223 .set_coverage_class = ath9k_set_coverage_class,
2224 .flush = ath9k_flush,
2225 .tx_frames_pending = ath9k_tx_frames_pending,
2226 .tx_last_beacon = ath9k_tx_last_beacon,
2227 .release_buffered_frames = ath9k_release_buffered_frames,
2228 .get_stats = ath9k_get_stats,
2229 .set_antenna = ath9k_set_antenna,
2230 .get_antenna = ath9k_get_antenna,
2232 #ifdef CONFIG_ATH9K_WOW
2233 .suspend = ath9k_suspend,
2234 .resume = ath9k_resume,
2235 .set_wakeup = ath9k_set_wakeup,
2238 #ifdef CONFIG_ATH9K_DEBUGFS
2239 .get_et_sset_count = ath9k_get_et_sset_count,
2240 .get_et_stats = ath9k_get_et_stats,
2241 .get_et_strings = ath9k_get_et_strings,
2244 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2245 .sta_add_debugfs = ath9k_sta_add_debugfs,
2247 .sw_scan_start = ath9k_sw_scan_start,
2248 .sw_scan_complete = ath9k_sw_scan_complete,
2249 .channel_switch_beacon = ath9k_channel_switch_beacon,