2 * Copyright (c) 2010-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21 MODULE_AUTHOR("Atheros Communications");
22 MODULE_LICENSE("Dual BSD/GPL");
23 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
25 static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
26 module_param_named(debug, ath9k_debug, uint, 0);
27 MODULE_PARM_DESC(debug, "Debugging mask");
29 int htc_modparam_nohwcrypt;
30 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
31 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
33 static int ath9k_htc_btcoex_enable;
34 module_param_named(btcoex_enable, ath9k_htc_btcoex_enable, int, 0444);
35 MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence");
37 static int ath9k_ps_enable;
38 module_param_named(ps_enable, ath9k_ps_enable, int, 0444);
39 MODULE_PARM_DESC(ps_enable, "Enable WLAN PowerSave");
41 #ifdef CONFIG_MAC80211_LEDS
42 int ath9k_htc_led_blink = 1;
43 module_param_named(blink, ath9k_htc_led_blink, int, 0444);
44 MODULE_PARM_DESC(blink, "Enable LED blink on activity");
46 static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = {
47 { .throughput = 0 * 1024, .blink_time = 334 },
48 { .throughput = 1 * 1024, .blink_time = 260 },
49 { .throughput = 5 * 1024, .blink_time = 220 },
50 { .throughput = 10 * 1024, .blink_time = 190 },
51 { .throughput = 20 * 1024, .blink_time = 170 },
52 { .throughput = 50 * 1024, .blink_time = 150 },
53 { .throughput = 70 * 1024, .blink_time = 130 },
54 { .throughput = 100 * 1024, .blink_time = 110 },
55 { .throughput = 200 * 1024, .blink_time = 80 },
56 { .throughput = 300 * 1024, .blink_time = 50 },
60 static void ath9k_htc_op_ps_wakeup(struct ath_common *common)
62 ath9k_htc_ps_wakeup((struct ath9k_htc_priv *) common->priv);
65 static void ath9k_htc_op_ps_restore(struct ath_common *common)
67 ath9k_htc_ps_restore((struct ath9k_htc_priv *) common->priv);
70 static struct ath_ps_ops ath9k_htc_ps_ops = {
71 .wakeup = ath9k_htc_op_ps_wakeup,
72 .restore = ath9k_htc_op_ps_restore,
75 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
79 if (atomic_read(&priv->htc->tgt_ready) > 0) {
80 atomic_dec(&priv->htc->tgt_ready);
84 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
85 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
87 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
91 atomic_dec(&priv->htc->tgt_ready);
96 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
98 ath9k_hw_deinit(priv->ah);
103 static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
105 struct ieee80211_hw *hw = priv->hw;
107 wiphy_rfkill_stop_polling(hw->wiphy);
108 ath9k_deinit_leds(priv);
109 ath9k_htc_deinit_debug(priv);
110 ieee80211_unregister_hw(hw);
111 ath9k_rx_cleanup(priv);
112 ath9k_tx_cleanup(priv);
113 ath9k_deinit_priv(priv);
116 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
120 enum htc_endpoint_id,
122 enum htc_endpoint_id *ep_id)
124 struct htc_service_connreq req;
126 memset(&req, 0, sizeof(struct htc_service_connreq));
128 req.service_id = service_id;
129 req.ep_callbacks.priv = priv;
130 req.ep_callbacks.rx = ath9k_htc_rxep;
131 req.ep_callbacks.tx = tx;
133 return htc_connect_service(priv->htc, &req, ep_id);
136 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
142 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
147 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
153 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
160 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
166 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
172 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
178 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
184 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
190 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
196 * Setup required credits before initializing HTC.
197 * This is a bit hacky, but, since queuing is done in
198 * the HIF layer, shouldn't matter much.
201 if (IS_AR7010_DEVICE(drv_info))
202 priv->htc->credits = 45;
204 priv->htc->credits = 33;
206 ret = htc_init(priv->htc);
210 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
216 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
220 static void ath9k_reg_notifier(struct wiphy *wiphy,
221 struct regulatory_request *request)
223 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
224 struct ath9k_htc_priv *priv = hw->priv;
226 ath_reg_notifier_apply(wiphy, request,
227 ath9k_hw_regulatory(priv->ah));
230 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
232 struct ath_hw *ah = (struct ath_hw *) hw_priv;
233 struct ath_common *common = ath9k_hw_common(ah);
234 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
235 __be32 val, reg = cpu_to_be32(reg_offset);
238 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
239 (u8 *) ®, sizeof(reg),
240 (u8 *) &val, sizeof(val),
243 ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n",
248 return be32_to_cpu(val);
251 static void ath9k_multi_regread(void *hw_priv, u32 *addr,
254 struct ath_hw *ah = (struct ath_hw *) hw_priv;
255 struct ath_common *common = ath9k_hw_common(ah);
256 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
261 for (i = 0; i < count; i++) {
262 tmpaddr[i] = cpu_to_be32(addr[i]);
265 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
266 (u8 *)tmpaddr , sizeof(u32) * count,
267 (u8 *)tmpval, sizeof(u32) * count,
271 "Multiple REGISTER READ FAILED (count: %d)\n", count);
274 for (i = 0; i < count; i++) {
275 val[i] = be32_to_cpu(tmpval[i]);
279 static void ath9k_regwrite_multi(struct ath_common *common)
281 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
285 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
286 (u8 *) &priv->wmi->multi_write,
287 sizeof(struct register_write) * priv->wmi->multi_write_idx,
288 (u8 *) &rsp_status, sizeof(rsp_status),
292 "REGISTER WRITE FAILED, multi len: %d\n",
293 priv->wmi->multi_write_idx);
295 priv->wmi->multi_write_idx = 0;
298 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
300 struct ath_hw *ah = (struct ath_hw *) hw_priv;
301 struct ath_common *common = ath9k_hw_common(ah);
302 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
303 const __be32 buf[2] = {
304 cpu_to_be32(reg_offset),
309 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
310 (u8 *) &buf, sizeof(buf),
311 (u8 *) &val, sizeof(val),
314 ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n",
319 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
321 struct ath_hw *ah = (struct ath_hw *) hw_priv;
322 struct ath_common *common = ath9k_hw_common(ah);
323 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
325 mutex_lock(&priv->wmi->multi_write_mutex);
327 /* Store the register/value */
328 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
329 cpu_to_be32(reg_offset);
330 priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
333 priv->wmi->multi_write_idx++;
335 /* If the buffer is full, send it out. */
336 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER)
337 ath9k_regwrite_multi(common);
339 mutex_unlock(&priv->wmi->multi_write_mutex);
342 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
344 struct ath_hw *ah = (struct ath_hw *) hw_priv;
345 struct ath_common *common = ath9k_hw_common(ah);
346 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
348 if (atomic_read(&priv->wmi->mwrite_cnt))
349 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
351 ath9k_regwrite_single(hw_priv, val, reg_offset);
354 static void ath9k_enable_regwrite_buffer(void *hw_priv)
356 struct ath_hw *ah = (struct ath_hw *) hw_priv;
357 struct ath_common *common = ath9k_hw_common(ah);
358 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
360 atomic_inc(&priv->wmi->mwrite_cnt);
363 static void ath9k_regwrite_flush(void *hw_priv)
365 struct ath_hw *ah = (struct ath_hw *) hw_priv;
366 struct ath_common *common = ath9k_hw_common(ah);
367 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
369 atomic_dec(&priv->wmi->mwrite_cnt);
371 mutex_lock(&priv->wmi->multi_write_mutex);
373 if (priv->wmi->multi_write_idx)
374 ath9k_regwrite_multi(common);
376 mutex_unlock(&priv->wmi->multi_write_mutex);
379 static void ath9k_reg_rmw_buffer(void *hw_priv,
380 u32 reg_offset, u32 set, u32 clr)
382 struct ath_hw *ah = (struct ath_hw *) hw_priv;
383 struct ath_common *common = ath9k_hw_common(ah);
384 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
388 mutex_lock(&priv->wmi->multi_rmw_mutex);
390 /* Store the register/value */
391 priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].reg =
392 cpu_to_be32(reg_offset);
393 priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].set =
395 priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].clr =
398 priv->wmi->multi_rmw_idx++;
400 /* If the buffer is full, send it out. */
401 if (priv->wmi->multi_rmw_idx == MAX_RMW_CMD_NUMBER) {
402 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
403 (u8 *) &priv->wmi->multi_rmw,
404 sizeof(struct register_write) * priv->wmi->multi_rmw_idx,
405 (u8 *) &rsp_status, sizeof(rsp_status),
409 "REGISTER RMW FAILED, multi len: %d\n",
410 priv->wmi->multi_rmw_idx);
412 priv->wmi->multi_rmw_idx = 0;
415 mutex_unlock(&priv->wmi->multi_rmw_mutex);
418 static void ath9k_reg_rmw_flush(void *hw_priv)
420 struct ath_hw *ah = (struct ath_hw *) hw_priv;
421 struct ath_common *common = ath9k_hw_common(ah);
422 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
426 if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags))
429 atomic_dec(&priv->wmi->m_rmw_cnt);
431 mutex_lock(&priv->wmi->multi_rmw_mutex);
433 if (priv->wmi->multi_rmw_idx) {
434 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
435 (u8 *) &priv->wmi->multi_rmw,
436 sizeof(struct register_rmw) * priv->wmi->multi_rmw_idx,
437 (u8 *) &rsp_status, sizeof(rsp_status),
441 "REGISTER RMW FAILED, multi len: %d\n",
442 priv->wmi->multi_rmw_idx);
444 priv->wmi->multi_rmw_idx = 0;
447 mutex_unlock(&priv->wmi->multi_rmw_mutex);
450 static void ath9k_enable_rmw_buffer(void *hw_priv)
452 struct ath_hw *ah = (struct ath_hw *) hw_priv;
453 struct ath_common *common = ath9k_hw_common(ah);
454 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
456 if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags))
459 atomic_inc(&priv->wmi->m_rmw_cnt);
462 static u32 ath9k_reg_rmw_single(void *hw_priv,
463 u32 reg_offset, u32 set, u32 clr)
465 struct ath_hw *ah = (struct ath_hw *) hw_priv;
466 struct ath_common *common = ath9k_hw_common(ah);
467 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
468 struct register_rmw buf, buf_ret;
472 buf.reg = cpu_to_be32(reg_offset);
473 buf.set = cpu_to_be32(set);
474 buf.clr = cpu_to_be32(clr);
476 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
477 (u8 *) &buf, sizeof(buf),
478 (u8 *) &buf_ret, sizeof(buf_ret),
481 ath_dbg(common, WMI, "REGISTER RMW FAILED:(0x%04x, %d)\n",
487 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
489 struct ath_hw *ah = (struct ath_hw *) hw_priv;
490 struct ath_common *common = ath9k_hw_common(ah);
491 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
493 if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags)) {
496 val = REG_READ(ah, reg_offset);
499 REG_WRITE(ah, reg_offset, val);
504 if (atomic_read(&priv->wmi->m_rmw_cnt))
505 ath9k_reg_rmw_buffer(hw_priv, reg_offset, set, clr);
507 ath9k_reg_rmw_single(hw_priv, reg_offset, set, clr);
512 static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
514 *csz = L1_CACHE_BYTES >> 2;
517 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
519 struct ath_hw *ah = (struct ath_hw *) common->ah;
521 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
523 if (!ath9k_hw_wait(ah,
524 AR_EEPROM_STATUS_DATA,
525 AR_EEPROM_STATUS_DATA_BUSY |
526 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
530 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
531 AR_EEPROM_STATUS_DATA_VAL);
536 static const struct ath_bus_ops ath9k_usb_bus_ops = {
537 .ath_bus_type = ATH_USB,
538 .read_cachesize = ath_usb_read_cachesize,
539 .eeprom_read = ath_usb_eeprom_read,
542 static int ath9k_init_queues(struct ath9k_htc_priv *priv)
544 struct ath_common *common = ath9k_hw_common(priv->ah);
547 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
548 priv->hwq_map[i] = -1;
550 priv->beacon.beaconq = ath9k_hw_beaconq_setup(priv->ah);
551 if (priv->beacon.beaconq == -1) {
552 ath_err(common, "Unable to setup BEACON xmit queue\n");
556 priv->cabq = ath9k_htc_cabq_setup(priv);
557 if (priv->cabq == -1) {
558 ath_err(common, "Unable to setup CAB xmit queue\n");
562 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BE)) {
563 ath_err(common, "Unable to setup xmit queue for BE traffic\n");
567 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BK)) {
568 ath_err(common, "Unable to setup xmit queue for BK traffic\n");
571 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VI)) {
572 ath_err(common, "Unable to setup xmit queue for VI traffic\n");
575 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VO)) {
576 ath_err(common, "Unable to setup xmit queue for VO traffic\n");
586 static void ath9k_init_misc(struct ath9k_htc_priv *priv)
588 struct ath_common *common = ath9k_hw_common(priv->ah);
590 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
592 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
593 priv->ah->opmode = NL80211_IFTYPE_STATION;
595 priv->spec_priv.ah = priv->ah;
596 priv->spec_priv.spec_config.enabled = 0;
597 priv->spec_priv.spec_config.short_repeat = true;
598 priv->spec_priv.spec_config.count = 8;
599 priv->spec_priv.spec_config.endless = false;
600 priv->spec_priv.spec_config.period = 0x12;
601 priv->spec_priv.spec_config.fft_period = 0x02;
604 static int ath9k_init_priv(struct ath9k_htc_priv *priv,
605 u16 devid, char *product,
608 struct ath_hw *ah = NULL;
609 struct ath_common *common;
610 int i, ret = 0, csz = 0;
612 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
618 ah->hw_version.devid = devid;
619 ah->hw_version.usbdev = drv_info;
620 ah->ah_flags |= AH_USE_EEPROM;
621 ah->reg_ops.read = ath9k_regread;
622 ah->reg_ops.multi_read = ath9k_multi_regread;
623 ah->reg_ops.write = ath9k_regwrite;
624 ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer;
625 ah->reg_ops.write_flush = ath9k_regwrite_flush;
626 ah->reg_ops.enable_rmw_buffer = ath9k_enable_rmw_buffer;
627 ah->reg_ops.rmw_flush = ath9k_reg_rmw_flush;
628 ah->reg_ops.rmw = ath9k_reg_rmw;
631 common = ath9k_hw_common(ah);
632 common->ops = &ah->reg_ops;
633 common->ps_ops = &ath9k_htc_ps_ops;
634 common->bus_ops = &ath9k_usb_bus_ops;
636 common->hw = priv->hw;
638 common->debug_mask = ath9k_debug;
639 common->btcoex_enabled = ath9k_htc_btcoex_enable == 1;
640 set_bit(ATH_OP_INVALID, &common->op_flags);
642 spin_lock_init(&priv->beacon_lock);
643 spin_lock_init(&priv->tx.tx_lock);
644 mutex_init(&priv->mutex);
645 mutex_init(&priv->htc_pm_lock);
646 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
647 (unsigned long)priv);
648 tasklet_init(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet,
649 (unsigned long)priv);
650 INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work);
651 INIT_WORK(&priv->ps_work, ath9k_ps_work);
652 INIT_WORK(&priv->fatal_work, ath9k_fatal_work);
653 setup_timer(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer,
654 (unsigned long)priv);
657 * Cache line size is used to size and align various
658 * structures used to communicate with the hardware.
660 ath_read_cachesize(common, &csz);
661 common->cachelsz = csz << 2; /* convert to bytes */
663 ret = ath9k_hw_init(ah);
666 "Unable to initialize hardware; initialization status: %d\n",
671 ret = ath9k_init_queues(priv);
675 for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++)
676 priv->beacon.bslot[i] = NULL;
677 priv->beacon.slottime = ATH9K_SLOT_TIME_9;
679 ath9k_cmn_init_channels_rates(common);
680 ath9k_cmn_init_crypto(ah);
681 ath9k_init_misc(priv);
682 ath9k_htc_init_btcoex(priv, product);
696 static const struct ieee80211_iface_limit if_limits[] = {
697 { .max = 2, .types = BIT(NL80211_IFTYPE_STATION) |
698 BIT(NL80211_IFTYPE_P2P_CLIENT) },
699 { .max = 2, .types = BIT(NL80211_IFTYPE_AP) |
700 #ifdef CONFIG_MAC80211_MESH
701 BIT(NL80211_IFTYPE_MESH_POINT) |
703 BIT(NL80211_IFTYPE_P2P_GO) },
706 static const struct ieee80211_iface_combination if_comb = {
708 .n_limits = ARRAY_SIZE(if_limits),
710 .num_different_channels = 1,
713 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
714 struct ieee80211_hw *hw)
716 struct ath_hw *ah = priv->ah;
717 struct ath_common *common = ath9k_hw_common(priv->ah);
718 struct base_eep_header *pBase;
720 ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
721 ieee80211_hw_set(hw, MFP_CAPABLE);
722 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
723 ieee80211_hw_set(hw, PS_NULLFUNC_STACK);
724 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
725 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
726 ieee80211_hw_set(hw, SPECTRUM_MGMT);
727 ieee80211_hw_set(hw, SIGNAL_DBM);
728 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
731 ieee80211_hw_set(hw, SUPPORTS_PS);
733 hw->wiphy->interface_modes =
734 BIT(NL80211_IFTYPE_STATION) |
735 BIT(NL80211_IFTYPE_ADHOC) |
736 BIT(NL80211_IFTYPE_AP) |
737 BIT(NL80211_IFTYPE_P2P_GO) |
738 BIT(NL80211_IFTYPE_P2P_CLIENT) |
739 BIT(NL80211_IFTYPE_MESH_POINT);
741 hw->wiphy->iface_combinations = &if_comb;
742 hw->wiphy->n_iface_combinations = 1;
744 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
746 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN |
747 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
748 WIPHY_FLAG_HAS_CHANNEL_SWITCH;
750 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS;
753 hw->max_listen_interval = 1;
755 hw->vif_data_size = sizeof(struct ath9k_htc_vif);
756 hw->sta_data_size = sizeof(struct ath9k_htc_sta);
758 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
759 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
760 sizeof(struct htc_frame_hdr) + 4;
762 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
763 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
764 &common->sbands[IEEE80211_BAND_2GHZ];
765 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
766 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
767 &common->sbands[IEEE80211_BAND_5GHZ];
769 ath9k_cmn_reload_chainmask(ah);
771 pBase = ath9k_htc_get_eeprom_base(priv);
773 hw->wiphy->available_antennas_rx = pBase->rxMask;
774 hw->wiphy->available_antennas_tx = pBase->txMask;
777 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
780 static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv)
782 struct ieee80211_hw *hw = priv->hw;
783 struct wmi_fw_version cmd_rsp;
786 memset(&cmd_rsp, 0, sizeof(cmd_rsp));
788 WMI_CMD(WMI_GET_FW_VERSION);
792 priv->fw_version_major = be16_to_cpu(cmd_rsp.major);
793 priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor);
795 snprintf(hw->wiphy->fw_version, sizeof(hw->wiphy->fw_version), "%d.%d",
796 priv->fw_version_major,
797 priv->fw_version_minor);
799 dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n",
800 priv->fw_version_major,
801 priv->fw_version_minor);
804 * Check if the available FW matches the driver's
807 if (priv->fw_version_major != MAJOR_VERSION_REQ ||
808 priv->fw_version_minor < MINOR_VERSION_REQ) {
809 dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n",
810 MAJOR_VERSION_REQ, MINOR_VERSION_REQ);
814 if (priv->fw_version_major == 1 && priv->fw_version_minor < 4)
815 set_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags);
817 dev_info(priv->dev, "FW RMW support: %s\n",
818 test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags) ? "Off" : "On");
823 static int ath9k_init_device(struct ath9k_htc_priv *priv,
824 u16 devid, char *product, u32 drv_info)
826 struct ieee80211_hw *hw = priv->hw;
827 struct ath_common *common;
830 struct ath_regulatory *reg;
833 /* Bring up device */
834 error = ath9k_init_priv(priv, devid, product, drv_info);
839 common = ath9k_hw_common(ah);
840 ath9k_set_hw_capab(priv, hw);
842 error = ath9k_init_firmware_version(priv);
846 /* Initialize regulatory */
847 error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
852 reg = &common->regulatory;
855 error = ath9k_tx_init(priv);
860 error = ath9k_rx_init(priv);
864 ath9k_hw_disable(priv->ah);
865 #ifdef CONFIG_MAC80211_LEDS
866 /* must be initialized before ieee80211_register_hw */
867 priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw,
868 IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink,
869 ARRAY_SIZE(ath9k_htc_tpt_blink));
872 /* Register with mac80211 */
873 error = ieee80211_register_hw(hw);
877 /* Handle world regulatory */
878 if (!ath_is_world_regd(reg)) {
879 error = regulatory_hint(hw->wiphy, reg->alpha2);
884 error = ath9k_htc_init_debug(priv->ah);
886 ath_err(common, "Unable to create debugfs files\n");
890 ath_dbg(common, CONFIG,
891 "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, BE:%d, BK:%d, VI:%d, VO:%d\n",
902 ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name));
903 wiphy_info(hw->wiphy, "%s\n", hw_name);
905 ath9k_init_leds(priv);
906 ath9k_start_rfkill_poll(priv);
911 ieee80211_unregister_hw(hw);
913 ath9k_rx_cleanup(priv);
915 ath9k_tx_cleanup(priv);
921 ath9k_deinit_priv(priv);
926 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
927 u16 devid, char *product, u32 drv_info)
929 struct ieee80211_hw *hw;
930 struct ath9k_htc_priv *priv;
933 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
939 priv->htc = htc_handle;
941 htc_handle->drv_priv = priv;
942 SET_IEEE80211_DEV(hw, priv->dev);
944 ret = ath9k_htc_wait_for_target(priv);
948 priv->wmi = ath9k_init_wmi(priv);
954 ret = ath9k_init_htc_services(priv, devid, drv_info);
958 ret = ath9k_init_device(priv, devid, product, drv_info);
965 ath9k_deinit_wmi(priv);
967 ieee80211_free_hw(hw);
971 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
973 if (htc_handle->drv_priv) {
975 /* Check if the device has been yanked out. */
977 htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED;
979 ath9k_deinit_device(htc_handle->drv_priv);
980 ath9k_deinit_wmi(htc_handle->drv_priv);
981 ieee80211_free_hw(htc_handle->drv_priv->hw);
987 void ath9k_htc_suspend(struct htc_target *htc_handle)
989 ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
992 int ath9k_htc_resume(struct htc_target *htc_handle)
994 struct ath9k_htc_priv *priv = htc_handle->drv_priv;
997 ret = ath9k_htc_wait_for_target(priv);
1001 ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
1002 priv->ah->hw_version.usbdev);
1003 ath9k_configure_leds(priv);
1009 static int __init ath9k_htc_init(void)
1011 if (ath9k_hif_usb_init() < 0) {
1012 pr_err("No USB devices found, driver not installed\n");
1018 module_init(ath9k_htc_init);
1020 static void __exit ath9k_htc_exit(void)
1022 ath9k_hif_usb_exit();
1023 pr_info("Driver unloaded\n");
1025 module_exit(ath9k_htc_exit);