2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/leds.h>
23 #include <linux/completion.h>
24 #include <linux/pm_qos_params.h>
30 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
31 * should rely on this file or its contents.
36 /* Macro to expand scalars to 64-bit objects */
38 #define ito64(x) (sizeof(x) == 1) ? \
39 (((unsigned long long int)(x)) & (0xff)) : \
41 (((unsigned long long int)(x)) & 0xffff) : \
43 (((unsigned long long int)(x)) & 0xffffffff) : \
44 (unsigned long long int)(x))
46 /* increment with wrap-around */
47 #define INCR(_l, _sz) do { \
49 (_l) &= ((_sz) - 1); \
52 /* decrement with wrap-around */
53 #define DECR(_l, _sz) do { \
55 (_l) &= ((_sz) - 1); \
58 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
60 #define TSF_TO_TU(_h,_l) \
61 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
63 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
71 /*************************/
72 /* Descriptor Management */
73 /*************************/
75 #define ATH_TXBUF_RESET(_bf) do { \
76 (_bf)->bf_stale = false; \
77 (_bf)->bf_lastbf = NULL; \
78 (_bf)->bf_next = NULL; \
79 memset(&((_bf)->bf_state), 0, \
80 sizeof(struct ath_buf_state)); \
83 #define ATH_RXBUF_RESET(_bf) do { \
84 (_bf)->bf_stale = false; \
88 * enum buffer_type - Buffer type flags
90 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
91 * @BUF_AGGR: Indicates whether the buffer can be aggregated
92 * (used in aggregation scheduling)
93 * @BUF_XRETRY: To denote excessive retries of the buffer
101 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
102 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
103 #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
105 #define ATH_TXSTATUS_RING_SIZE 64
109 dma_addr_t dd_desc_paddr;
111 struct ath_buf *dd_bufptr;
114 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
115 struct list_head *head, const char *name,
116 int nbuf, int ndesc, bool is_tx);
117 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
118 struct list_head *head);
124 #define ATH_MAX_ANTENNA 3
125 #define ATH_RXBUF 512
126 #define ATH_TXBUF 512
127 #define ATH_TXBUF_RESERVE 5
128 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
129 #define ATH_TXMAXTRY 13
130 #define ATH_MGT_TXMAXTRY 4
132 #define TID_TO_WME_AC(_tid) \
133 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
134 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
135 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
138 #define ADDBA_EXCHANGE_ATTEMPTS 10
139 #define ATH_AGGR_DELIM_SZ 4
140 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
141 /* number of delimiters for encryption padding */
142 #define ATH_AGGR_ENCRYPTDELIM 10
143 /* minimum h/w qdepth to be sustained to maximize aggregation */
144 #define ATH_AGGR_MIN_QDEPTH 2
145 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
147 #define IEEE80211_SEQ_SEQ_SHIFT 4
148 #define IEEE80211_SEQ_MAX 4096
149 #define IEEE80211_WEP_IVLEN 3
150 #define IEEE80211_WEP_KIDLEN 1
151 #define IEEE80211_WEP_CRCLEN 4
152 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
153 (IEEE80211_WEP_IVLEN + \
154 IEEE80211_WEP_KIDLEN + \
155 IEEE80211_WEP_CRCLEN))
157 /* return whether a bit at index _n in bitmap _bm is set
158 * _sz is the size of the bitmap */
159 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
160 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
162 /* return block-ack bitmap index given sequence and starting sequence */
163 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
165 /* returns delimiter padding required given the packet length */
166 #define ATH_AGGR_GET_NDELIM(_len) \
167 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
168 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
170 #define BAW_WITHIN(_start, _bawsz, _seqno) \
171 ((((_seqno) - (_start)) & 4095) < (_bawsz))
173 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
175 #define ATH_TX_COMPLETE_POLL_INT 1000
177 enum ATH_AGGR_STATUS {
183 #define ATH_TXFIFO_DEPTH 8
187 struct list_head axq_q;
191 bool axq_tx_inprogress;
192 struct list_head axq_acq;
193 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
194 struct list_head txq_fifo_pending;
203 struct list_head list;
204 struct list_head tid_q;
207 struct ath_frame_info {
210 enum ath9k_key_type keytype;
215 struct ath_buf_state {
218 enum ath9k_internal_frame_type bfs_ftype;
222 struct list_head list;
223 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
225 struct ath_buf *bf_next; /* next subframe in the aggregate */
226 struct sk_buff *bf_mpdu; /* enclosing frame structure */
227 void *bf_desc; /* virtual addr of desc */
228 dma_addr_t bf_daddr; /* physical addr of desc */
229 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
232 struct ath_buf_state bf_state;
233 struct ath_wiphy *aphy;
237 struct list_head list;
238 struct list_head buf_q;
240 struct ath_atx_ac *ac;
241 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
246 int baw_head; /* first un-acked tx buffer */
247 int baw_tail; /* next unused tx buffer slot */
254 struct ath_common *common;
255 struct ath_atx_tid tid[WME_NUM_TID];
256 struct ath_atx_ac ac[WME_NUM_AC];
261 #define AGGR_CLEANUP BIT(1)
262 #define AGGR_ADDBA_COMPLETE BIT(2)
263 #define AGGR_ADDBA_PROGRESS BIT(3)
265 struct ath_tx_control {
269 enum ath9k_internal_frame_type frame_type;
273 #define ATH_TX_ERROR 0x01
274 #define ATH_TX_XRETRY 0x02
275 #define ATH_TX_BAR 0x04
280 spinlock_t txbuflock;
281 struct list_head txbuf;
282 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
283 struct ath_descdma txdma;
284 struct ath_txq *txq_map[WME_NUM_AC];
288 struct sk_buff_head rx_fifo;
289 struct sk_buff_head rx_buffers;
297 unsigned int rxfilter;
298 spinlock_t rxbuflock;
299 struct list_head rxbuf;
300 struct ath_descdma rxdma;
301 struct ath_buf *rx_bufptr;
302 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
305 int ath_startrecv(struct ath_softc *sc);
306 bool ath_stoprecv(struct ath_softc *sc);
307 void ath_flushrecv(struct ath_softc *sc);
308 u32 ath_calcrxfilter(struct ath_softc *sc);
309 int ath_rx_init(struct ath_softc *sc, int nbufs);
310 void ath_rx_cleanup(struct ath_softc *sc);
311 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
312 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
313 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
314 void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
315 void ath_draintxq(struct ath_softc *sc,
316 struct ath_txq *txq, bool retry_tx);
317 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
318 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
319 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
320 int ath_tx_init(struct ath_softc *sc, int nbufs);
321 void ath_tx_cleanup(struct ath_softc *sc);
322 int ath_txq_update(struct ath_softc *sc, int qnum,
323 struct ath9k_tx_queue_info *q);
324 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
325 struct ath_tx_control *txctl);
326 void ath_tx_tasklet(struct ath_softc *sc);
327 void ath_tx_edma_tasklet(struct ath_softc *sc);
328 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
330 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
331 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
339 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
340 enum nl80211_iftype av_opmode;
341 struct ath_buf *av_bcbuf;
342 struct ath_tx_control av_btxctl;
343 u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */
346 /*******************/
347 /* Beacon Handling */
348 /*******************/
351 * Regardless of the number of beacons we stagger, (i.e. regardless of the
352 * number of BSSIDs) if a given beacon does not go out even after waiting this
353 * number of beacon intervals, the game's up.
355 #define BSTUCK_THRESH (9 * ATH_BCBUF)
357 #define ATH_DEFAULT_BINTVAL 100 /* TU */
358 #define ATH_DEFAULT_BMISS_LIMIT 10
359 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
361 struct ath_beacon_config {
371 OK, /* no change needed */
372 UPDATE, /* update pending */
373 COMMIT /* beacon sent, commit change */
374 } updateslot; /* slot time update fsm */
380 struct ieee80211_vif *bslot[ATH_BCBUF];
381 struct ath_wiphy *bslot_aphy[ATH_BCBUF];
384 struct ath9k_tx_queue_info beacon_qi;
385 struct ath_descdma bdma;
386 struct ath_txq *cabq;
387 struct list_head bbuf;
390 void ath_beacon_tasklet(unsigned long data);
391 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
392 int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif);
393 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
394 int ath_beaconq_config(struct ath_softc *sc);
400 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
401 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
402 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
403 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
404 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
405 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
406 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
408 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
410 void ath_hw_check(struct work_struct *work);
411 void ath_paprd_calibrate(struct work_struct *work);
412 void ath_ani_calibrate(unsigned long data);
419 bool hw_timer_enabled;
420 spinlock_t btcoex_lock;
421 struct timer_list period_timer; /* Timer for BT period */
423 unsigned long bt_priority_time;
424 int bt_stomp_type; /* Types of BT stomping */
425 u32 btcoex_no_stomp; /* in usec */
426 u32 btcoex_period; /* in usec */
427 u32 btscan_no_stomp; /* in usec */
428 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
431 int ath_init_btcoex_timer(struct ath_softc *sc);
432 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
433 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
435 /********************/
437 /********************/
439 #define ATH_LED_PIN_DEF 1
440 #define ATH_LED_PIN_9287 8
441 #define ATH_LED_ON_DURATION_IDLE 350 /* in msecs */
442 #define ATH_LED_OFF_DURATION_IDLE 250 /* in msecs */
452 struct ath_softc *sc;
453 struct led_classdev led_cdev;
454 enum ath_led_type led_type;
459 void ath_init_leds(struct ath_softc *sc);
460 void ath_deinit_leds(struct ath_softc *sc);
462 /* Antenna diversity/combining */
463 #define ATH_ANT_RX_CURRENT_SHIFT 4
464 #define ATH_ANT_RX_MAIN_SHIFT 2
465 #define ATH_ANT_RX_MASK 0x3
467 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
468 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
469 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
470 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
471 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
472 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
473 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
475 #define ATH_ANT_DIV_COMB_LNA1_LNA2_DELTA -3
476 #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1
477 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
478 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
479 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
481 enum ath9k_ant_div_comb_lna_conf {
482 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2,
483 ATH_ANT_DIV_COMB_LNA2,
484 ATH_ANT_DIV_COMB_LNA1,
485 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2,
488 struct ath_ant_comb {
507 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
508 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
513 unsigned long scan_start_time;
516 /********************/
517 /* Main driver core */
518 /********************/
521 * Default cache line size, in bytes.
522 * Used when PCI device not fully initialized by bootrom/BIOS
524 #define DEFAULT_CACHELINE 32
525 #define ATH_REGCLASSIDS_MAX 10
526 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
527 #define ATH_MAX_SW_RETRIES 10
528 #define ATH_CHAN_MAX 255
529 #define IEEE80211_WEP_NKID 4 /* number of key ids */
531 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
532 #define ATH_RATE_DUMMY_MARKER 0
534 #define SC_OP_INVALID BIT(0)
535 #define SC_OP_BEACONS BIT(1)
536 #define SC_OP_RXAGGR BIT(2)
537 #define SC_OP_TXAGGR BIT(3)
538 #define SC_OP_OFFCHANNEL BIT(4)
539 #define SC_OP_PREAMBLE_SHORT BIT(5)
540 #define SC_OP_PROTECT_ENABLE BIT(6)
541 #define SC_OP_RXFLUSH BIT(7)
542 #define SC_OP_LED_ASSOCIATED BIT(8)
543 #define SC_OP_LED_ON BIT(9)
544 #define SC_OP_TSF_RESET BIT(11)
545 #define SC_OP_BT_PRIORITY_DETECTED BIT(12)
546 #define SC_OP_BT_SCAN BIT(13)
547 #define SC_OP_ANI_RUN BIT(14)
548 #define SC_OP_ENABLE_APM BIT(15)
550 /* Powersave flags */
551 #define PS_WAIT_FOR_BEACON BIT(0)
552 #define PS_WAIT_FOR_CAB BIT(1)
553 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
554 #define PS_WAIT_FOR_TX_ACK BIT(3)
555 #define PS_BEACON_SYNC BIT(4)
558 struct ath_rate_table;
561 struct ieee80211_hw *hw;
564 spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */
565 struct ath_wiphy *pri_wiphy;
566 struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may
567 * have NULL entries */
568 int num_sec_wiphy; /* number of sec_wiphy pointers in the array */
571 struct ath_wiphy *next_wiphy;
572 struct work_struct chan_work;
573 int wiphy_select_failures;
574 unsigned long wiphy_select_first_fail;
575 struct delayed_work wiphy_work;
576 unsigned long wiphy_scheduler_int;
577 int wiphy_scheduler_index;
578 struct survey_info *cur_survey;
579 struct survey_info survey[ATH9K_NUM_CHANNELS];
581 struct tasklet_struct intr_tq;
582 struct tasklet_struct bcon_tasklet;
583 struct ath_hw *sc_ah;
586 spinlock_t sc_serial_rw;
587 spinlock_t sc_pm_lock;
588 spinlock_t sc_pcu_lock;
590 struct work_struct paprd_work;
591 struct work_struct hw_check_work;
592 struct completion paprd_complete;
596 u32 sc_flags; /* SC_OP_* */
597 u16 ps_flags; /* PS_* */
603 unsigned long ps_usecount;
605 struct ath_config config;
608 struct ath_beacon beacon;
609 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
611 struct ath_led radio_led;
612 struct ath_led assoc_led;
613 struct ath_led tx_led;
614 struct ath_led rx_led;
615 struct delayed_work ath_led_blink_work;
617 int led_off_duration;
623 #ifdef CONFIG_ATH9K_DEBUGFS
624 struct ath9k_debug debug;
626 struct ath_beacon_config cur_beacon_conf;
627 struct delayed_work tx_complete_work;
628 struct ath_btcoex btcoex;
630 struct ath_descdma txsdma;
632 struct ath_ant_comb ant_comb;
634 struct pm_qos_request_list pm_qos_req;
638 struct ath_softc *sc; /* shared for all virtual wiphys */
639 struct ieee80211_hw *hw;
640 struct ath9k_hw_cal_data caldata;
641 enum ath_wiphy_state {
654 void ath9k_tasklet(unsigned long data);
655 int ath_reset(struct ath_softc *sc, bool retry_tx);
656 int ath_cabq_update(struct ath_softc *);
658 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
660 common->bus_ops->read_cachesize(common, csz);
663 extern struct ieee80211_ops ath9k_ops;
664 extern int modparam_nohwcrypt;
665 extern int led_blink;
667 irqreturn_t ath_isr(int irq, void *dev);
668 int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
669 const struct ath_bus_ops *bus_ops);
670 void ath9k_deinit_device(struct ath_softc *sc);
671 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
672 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
673 struct ath9k_channel *ichan);
674 void ath_update_chainmask(struct ath_softc *sc, int is_ht);
675 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
676 struct ath9k_channel *hchan);
678 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw);
679 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
680 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode);
683 int ath_pci_init(void);
684 void ath_pci_exit(void);
686 static inline int ath_pci_init(void) { return 0; };
687 static inline void ath_pci_exit(void) {};
690 #ifdef CONFIG_ATHEROS_AR71XX
691 int ath_ahb_init(void);
692 void ath_ahb_exit(void);
694 static inline int ath_ahb_init(void) { return 0; };
695 static inline void ath_ahb_exit(void) {};
698 void ath9k_ps_wakeup(struct ath_softc *sc);
699 void ath9k_ps_restore(struct ath_softc *sc);
701 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
703 void ath9k_set_bssid_mask(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
704 int ath9k_wiphy_add(struct ath_softc *sc);
705 int ath9k_wiphy_del(struct ath_wiphy *aphy);
706 void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb, int ftype);
707 int ath9k_wiphy_pause(struct ath_wiphy *aphy);
708 int ath9k_wiphy_unpause(struct ath_wiphy *aphy);
709 int ath9k_wiphy_select(struct ath_wiphy *aphy);
710 void ath9k_wiphy_set_scheduler(struct ath_softc *sc, unsigned int msec_int);
711 void ath9k_wiphy_chan_work(struct work_struct *work);
712 bool ath9k_wiphy_started(struct ath_softc *sc);
713 void ath9k_wiphy_pause_all_forced(struct ath_softc *sc,
714 struct ath_wiphy *selected);
715 bool ath9k_wiphy_scanning(struct ath_softc *sc);
716 void ath9k_wiphy_work(struct work_struct *work);
717 bool ath9k_all_wiphys_idle(struct ath_softc *sc);
718 void ath9k_set_wiphy_idle(struct ath_wiphy *aphy, bool idle);
720 void ath_mac80211_stop_queue(struct ath_softc *sc, u16 skb_queue);
721 bool ath_mac80211_start_queue(struct ath_softc *sc, u16 skb_queue);
723 void ath_start_rfkill_poll(struct ath_softc *sc);
724 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);