3 * Copyright (c) 2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21 #include <linux/moduleparam.h>
22 #include <linux/errno.h>
23 #include <linux/export.h>
25 #include <linux/mmc/sdio_func.h>
26 #include <linux/vmalloc.h>
35 static const struct ath6kl_hw hw_list[] = {
37 .id = AR6003_HW_2_0_VERSION,
38 .name = "ar6003 hw 2.0",
39 .dataset_patch_addr = 0x57e884,
40 .app_load_addr = 0x543180,
41 .board_ext_data_addr = 0x57e500,
42 .reserved_ram_size = 6912,
43 .refclk_hz = 26000000,
47 /* hw2.0 needs override address hardcoded */
48 .app_start_override_addr = 0x944C00,
51 .dir = AR6003_HW_2_0_FW_DIR,
52 .otp = AR6003_HW_2_0_OTP_FILE,
53 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
54 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
55 .patch = AR6003_HW_2_0_PATCH_FILE,
58 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
59 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
62 .id = AR6003_HW_2_1_1_VERSION,
63 .name = "ar6003 hw 2.1.1",
64 .dataset_patch_addr = 0x57ff74,
65 .app_load_addr = 0x1234,
66 .board_ext_data_addr = 0x542330,
67 .reserved_ram_size = 512,
68 .refclk_hz = 26000000,
70 .testscript_addr = 0x57ef74,
74 .dir = AR6003_HW_2_1_1_FW_DIR,
75 .otp = AR6003_HW_2_1_1_OTP_FILE,
76 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
77 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
78 .patch = AR6003_HW_2_1_1_PATCH_FILE,
79 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
80 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
83 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
84 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
87 .id = AR6004_HW_1_0_VERSION,
88 .name = "ar6004 hw 1.0",
89 .dataset_patch_addr = 0x57e884,
90 .app_load_addr = 0x1234,
91 .board_ext_data_addr = 0x437000,
92 .reserved_ram_size = 19456,
93 .board_addr = 0x433900,
94 .refclk_hz = 26000000,
96 .flags = ATH6KL_HW_FLAG_64BIT_RATES,
99 .dir = AR6004_HW_1_0_FW_DIR,
100 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
103 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
104 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
107 .id = AR6004_HW_1_1_VERSION,
108 .name = "ar6004 hw 1.1",
109 .dataset_patch_addr = 0x57e884,
110 .app_load_addr = 0x1234,
111 .board_ext_data_addr = 0x437000,
112 .reserved_ram_size = 11264,
113 .board_addr = 0x43d400,
114 .refclk_hz = 40000000,
116 .flags = ATH6KL_HW_FLAG_64BIT_RATES,
119 .dir = AR6004_HW_1_1_FW_DIR,
120 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
123 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
124 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
127 .id = AR6004_HW_1_2_VERSION,
128 .name = "ar6004 hw 1.2",
129 .dataset_patch_addr = 0x436ecc,
130 .app_load_addr = 0x1234,
131 .board_ext_data_addr = 0x437000,
132 .reserved_ram_size = 9216,
133 .board_addr = 0x435c00,
134 .refclk_hz = 40000000,
136 .flags = ATH6KL_HW_FLAG_64BIT_RATES,
139 .dir = AR6004_HW_1_2_FW_DIR,
140 .fw = AR6004_HW_1_2_FIRMWARE_FILE,
142 .fw_board = AR6004_HW_1_2_BOARD_DATA_FILE,
143 .fw_default_board = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,
146 .id = AR6004_HW_1_3_VERSION,
147 .name = "ar6004 hw 1.3",
148 .dataset_patch_addr = 0x437860,
149 .app_load_addr = 0x1234,
150 .board_ext_data_addr = 0x437000,
151 .reserved_ram_size = 7168,
152 .board_addr = 0x436400,
153 .refclk_hz = 40000000,
155 .flags = ATH6KL_HW_FLAG_64BIT_RATES,
158 .dir = AR6004_HW_1_3_FW_DIR,
159 .fw = AR6004_HW_1_3_FIRMWARE_FILE,
162 .fw_board = AR6004_HW_1_3_BOARD_DATA_FILE,
163 .fw_default_board = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE,
168 * Include definitions here that can be used to tune the WLAN module
169 * behavior. Different customers can tune the behavior as per their needs,
174 * This configuration item enable/disable keepalive support.
175 * Keepalive support: In the absence of any data traffic to AP, null
176 * frames will be sent to the AP at periodic interval, to keep the association
177 * active. This configuration item defines the periodic interval.
178 * Use value of zero to disable keepalive support
179 * Default: 60 seconds
181 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
184 * This configuration item sets the value of disconnect timeout
185 * Firmware delays sending the disconnec event to the host for this
186 * timeout after is gets disconnected from the current AP.
187 * If the firmware successly roams within the disconnect timeout
188 * it sends a new connect event
190 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
193 #define ATH6KL_DATA_OFFSET 64
194 struct sk_buff *ath6kl_buf_alloc(int size)
199 /* Add chacheline space at front and back of buffer */
200 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
201 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
202 skb = dev_alloc_skb(size + reserved);
205 skb_reserve(skb, reserved - L1_CACHE_BYTES);
209 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
212 memset(vif->ssid, 0, sizeof(vif->ssid));
214 vif->dot11_auth_mode = OPEN_AUTH;
215 vif->auth_mode = NONE_AUTH;
216 vif->prwise_crypto = NONE_CRYPT;
217 vif->prwise_crypto_len = 0;
218 vif->grp_crypto = NONE_CRYPT;
219 vif->grp_crypto_len = 0;
220 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
221 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
222 memset(vif->bssid, 0, sizeof(vif->bssid));
226 static int ath6kl_set_host_app_area(struct ath6kl *ar)
229 struct host_app_area host_app_area;
231 /* Fetch the address of the host_app_area_s
232 * instance in the host interest area */
233 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
234 address = TARG_VTOP(ar->target_type, address);
236 if (ath6kl_diag_read32(ar, address, &data))
239 address = TARG_VTOP(ar->target_type, data);
240 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
241 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
242 sizeof(struct host_app_area)))
248 static inline void set_ac2_ep_map(struct ath6kl *ar,
250 enum htc_endpoint_id ep)
252 ar->ac2ep_map[ac] = ep;
253 ar->ep2ac_map[ep] = ac;
256 /* connect to a service */
257 static int ath6kl_connectservice(struct ath6kl *ar,
258 struct htc_service_connect_req *con_req,
262 struct htc_service_connect_resp response;
264 memset(&response, 0, sizeof(response));
266 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
268 ath6kl_err("failed to connect to %s service status:%d\n",
273 switch (con_req->svc_id) {
274 case WMI_CONTROL_SVC:
275 if (test_bit(WMI_ENABLED, &ar->flag))
276 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
277 ar->ctrl_ep = response.endpoint;
279 case WMI_DATA_BE_SVC:
280 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
282 case WMI_DATA_BK_SVC:
283 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
285 case WMI_DATA_VI_SVC:
286 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
288 case WMI_DATA_VO_SVC:
289 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
292 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
299 static int ath6kl_init_service_ep(struct ath6kl *ar)
301 struct htc_service_connect_req connect;
303 memset(&connect, 0, sizeof(connect));
305 /* these fields are the same for all service endpoints */
306 connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
307 connect.ep_cb.rx = ath6kl_rx;
308 connect.ep_cb.rx_refill = ath6kl_rx_refill;
309 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
312 * Set the max queue depth so that our ath6kl_tx_queue_full handler
315 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
316 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
317 if (!connect.ep_cb.rx_refill_thresh)
318 connect.ep_cb.rx_refill_thresh++;
320 /* connect to control service */
321 connect.svc_id = WMI_CONTROL_SVC;
322 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
325 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
328 * Limit the HTC message size on the send path, although e can
329 * receive A-MSDU frames of 4K, we will only send ethernet-sized
330 * (802.3) frames on the send path.
332 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
335 * To reduce the amount of committed memory for larger A_MSDU
336 * frames, use the recv-alloc threshold mechanism for larger
339 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
340 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
343 * For the remaining data services set the connection flag to
344 * reduce dribbling, if configured to do so.
346 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
347 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
348 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
350 connect.svc_id = WMI_DATA_BE_SVC;
352 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
355 /* connect to back-ground map this to WMI LOW_PRI */
356 connect.svc_id = WMI_DATA_BK_SVC;
357 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
360 /* connect to Video service, map this to to HI PRI */
361 connect.svc_id = WMI_DATA_VI_SVC;
362 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
366 * Connect to VO service, this is currently not mapped to a WMI
367 * priority stream due to historical reasons. WMI originally
368 * defined 3 priorities over 3 mailboxes We can change this when
369 * WMI is reworked so that priorities are not dependent on
372 connect.svc_id = WMI_DATA_VO_SVC;
373 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
379 void ath6kl_init_control_info(struct ath6kl_vif *vif)
381 ath6kl_init_profile_info(vif);
382 vif->def_txkey_index = 0;
383 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
388 * Set HTC/Mbox operational parameters, this can only be called when the
389 * target is in the BMI phase.
391 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
397 blk_size = ar->mbox_info.block_size;
400 blk_size |= ((u32)htc_ctrl_buf) << 16;
402 /* set the host interest area for the block size */
403 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
405 ath6kl_err("bmi_write_memory for IO block size failed\n");
409 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
411 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
413 if (mbox_isr_yield_val) {
414 /* set the host interest area for the mbox ISR yield limit */
415 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
418 ath6kl_err("bmi_write_memory for yield limit failed\n");
427 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
432 * Configure the device for rx dot11 header rules. "0,0" are the
433 * default values. Required if checksum offload is needed. Set
434 * RxMetaVersion to 2.
436 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
437 ar->rx_meta_ver, 0, 0);
439 ath6kl_err("unable to set the rx frame format: %d\n", ret);
443 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
444 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
445 IGNORE_PS_FAIL_DURING_SCAN);
447 ath6kl_err("unable to set power save fail event policy: %d\n",
453 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
454 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
455 WMI_FOLLOW_BARKER_IN_ERP);
457 ath6kl_err("unable to set barker preamble policy: %d\n",
463 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
464 WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
466 ath6kl_err("unable to set keep alive interval: %d\n", ret);
470 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
471 WLAN_CONFIG_DISCONNECT_TIMEOUT);
473 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
477 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
478 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
480 ath6kl_err("unable to set txop bursting: %d\n", ret);
485 if (ar->p2p && (ar->vif_max == 1 || idx)) {
486 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
487 P2P_FLAG_CAPABILITIES_REQ |
488 P2P_FLAG_MACADDR_REQ |
489 P2P_FLAG_HMODEL_REQ);
491 ath6kl_dbg(ATH6KL_DBG_TRC,
492 "failed to request P2P capabilities (%d) - assuming P2P not supported\n",
498 if (ar->p2p && (ar->vif_max == 1 || idx)) {
499 /* Enable Probe Request reporting for P2P */
500 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
502 ath6kl_dbg(ATH6KL_DBG_TRC,
503 "failed to enable Probe Request reporting (%d)\n",
511 int ath6kl_configure_target(struct ath6kl *ar)
513 u32 param, ram_reserved_size;
514 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
517 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
518 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
519 ath6kl_err("bmi_write_memory for uart debug failed\n");
524 * Note: Even though the firmware interface type is
525 * chosen as BSS_STA for all three interfaces, can
526 * be configured to IBSS/AP as long as the fw submode
527 * remains normal mode (0 - AP, STA and IBSS). But
528 * due to an target assert in firmware only one interface is
529 * configured for now.
531 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
533 for (i = 0; i < ar->vif_max; i++)
534 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
537 * Submodes when fw does not support dynamic interface
539 * vif[0] - AP/STA/IBSS
540 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
541 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
542 * Otherwise, All the interface are initialized to p2p dev.
545 if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
546 ar->fw_capabilities)) {
547 for (i = 0; i < ar->vif_max; i++)
548 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
549 (i * HI_OPTION_FW_SUBMODE_BITS);
551 for (i = 0; i < ar->max_norm_iface; i++)
552 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
553 (i * HI_OPTION_FW_SUBMODE_BITS);
555 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
556 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
557 (i * HI_OPTION_FW_SUBMODE_BITS);
559 if (ar->p2p && ar->vif_max == 1)
560 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
563 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
564 HTC_PROTOCOL_VERSION) != 0) {
565 ath6kl_err("bmi_write_memory for htc version failed\n");
569 /* set the firmware mode to STA/IBSS/AP */
572 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, ¶m) != 0) {
573 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
577 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
578 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
579 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
581 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
582 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
584 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
585 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
589 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
592 * Hardcode the address use for the extended board data
593 * Ideally this should be pre-allocate by the OS at boot time
594 * But since it is a new feature and board data is loaded
595 * at init time, we have to workaround this from host.
596 * It is difficult to patch the firmware boot code,
597 * but possible in theory.
600 if (ar->target_type == TARGET_TYPE_AR6003) {
601 param = ar->hw.board_ext_data_addr;
602 ram_reserved_size = ar->hw.reserved_ram_size;
604 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
605 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
609 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
610 ram_reserved_size) != 0) {
611 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
616 /* set the block size for the target */
617 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
618 /* use default number of control buffers */
621 /* Configure GPIO AR600x UART */
622 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
627 /* Configure target refclk_hz */
628 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz);
635 /* firmware upload */
636 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
637 u8 **fw, size_t *fw_len)
639 const struct firmware *fw_entry;
642 ret = request_firmware(&fw_entry, filename, ar->dev);
646 *fw_len = fw_entry->size;
647 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
652 release_firmware(fw_entry);
659 * Check the device tree for a board-id and use it to construct
660 * the pathname to the firmware file. Used (for now) to find a
661 * fallback to the "bdata.bin" file--typically a symlink to the
662 * appropriate board-specific file.
664 static bool check_device_tree(struct ath6kl *ar)
666 static const char *board_id_prop = "atheros,board-id";
667 struct device_node *node;
668 char board_filename[64];
669 const char *board_id;
672 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
673 board_id = of_get_property(node, board_id_prop, NULL);
674 if (board_id == NULL) {
675 ath6kl_warn("No \"%s\" property on %s node.\n",
676 board_id_prop, node->name);
679 snprintf(board_filename, sizeof(board_filename),
680 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
682 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
685 ath6kl_err("Failed to get DT board file %s: %d\n",
686 board_filename, ret);
694 static bool check_device_tree(struct ath6kl *ar)
698 #endif /* CONFIG_OF */
700 static int ath6kl_fetch_board_file(struct ath6kl *ar)
702 const char *filename;
705 if (ar->fw_board != NULL)
708 if (WARN_ON(ar->hw.fw_board == NULL))
711 filename = ar->hw.fw_board;
713 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
716 /* managed to get proper board file */
720 if (check_device_tree(ar)) {
721 /* got board file from device tree */
725 /* there was no proper board file, try to use default instead */
726 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
729 filename = ar->hw.fw_default_board;
731 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
734 ath6kl_err("Failed to get default board file %s: %d\n",
739 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
740 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
745 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
750 if (ar->fw_otp != NULL)
753 if (ar->hw.fw.otp == NULL) {
754 ath6kl_dbg(ATH6KL_DBG_BOOT,
755 "no OTP file configured for this hw\n");
759 snprintf(filename, sizeof(filename), "%s/%s",
760 ar->hw.fw.dir, ar->hw.fw.otp);
762 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
765 ath6kl_err("Failed to get OTP file %s: %d\n",
773 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
778 if (ar->testmode == 0)
781 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
783 if (ar->testmode == 2) {
784 if (ar->hw.fw.utf == NULL) {
785 ath6kl_warn("testmode 2 not supported\n");
789 snprintf(filename, sizeof(filename), "%s/%s",
790 ar->hw.fw.dir, ar->hw.fw.utf);
792 if (ar->hw.fw.tcmd == NULL) {
793 ath6kl_warn("testmode 1 not supported\n");
797 snprintf(filename, sizeof(filename), "%s/%s",
798 ar->hw.fw.dir, ar->hw.fw.tcmd);
801 set_bit(TESTMODE, &ar->flag);
803 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
805 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
806 ar->testmode, filename, ret);
813 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
821 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
822 if (WARN_ON(ar->hw.fw.fw == NULL))
825 snprintf(filename, sizeof(filename), "%s/%s",
826 ar->hw.fw.dir, ar->hw.fw.fw);
828 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
830 ath6kl_err("Failed to get firmware file %s: %d\n",
838 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
843 if (ar->fw_patch != NULL)
846 if (ar->hw.fw.patch == NULL)
849 snprintf(filename, sizeof(filename), "%s/%s",
850 ar->hw.fw.dir, ar->hw.fw.patch);
852 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
855 ath6kl_err("Failed to get patch file %s: %d\n",
863 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
868 if (ar->testmode != 2)
871 if (ar->fw_testscript != NULL)
874 if (ar->hw.fw.testscript == NULL)
877 snprintf(filename, sizeof(filename), "%s/%s",
878 ar->hw.fw.dir, ar->hw.fw.testscript);
880 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
881 &ar->fw_testscript_len);
883 ath6kl_err("Failed to get testscript file %s: %d\n",
891 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
895 ret = ath6kl_fetch_otp_file(ar);
899 ret = ath6kl_fetch_fw_file(ar);
903 ret = ath6kl_fetch_patch_file(ar);
907 ret = ath6kl_fetch_testscript_file(ar);
914 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
916 size_t magic_len, len, ie_len;
917 const struct firmware *fw;
918 struct ath6kl_fw_ie *hdr;
921 int ret, ie_id, i, index, bit;
924 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
926 ret = request_firmware(&fw, filename, ar->dev);
933 /* magic also includes the null byte, check that as well */
934 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
936 if (len < magic_len) {
941 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
950 while (len > sizeof(struct ath6kl_fw_ie)) {
951 /* hdr is unaligned! */
952 hdr = (struct ath6kl_fw_ie *) data;
954 ie_id = le32_to_cpup(&hdr->id);
955 ie_len = le32_to_cpup(&hdr->len);
958 data += sizeof(*hdr);
966 case ATH6KL_FW_IE_FW_VERSION:
967 strlcpy(ar->wiphy->fw_version, data,
968 sizeof(ar->wiphy->fw_version));
970 ath6kl_dbg(ATH6KL_DBG_BOOT,
971 "found fw version %s\n",
972 ar->wiphy->fw_version);
974 case ATH6KL_FW_IE_OTP_IMAGE:
975 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
978 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
980 if (ar->fw_otp == NULL) {
985 ar->fw_otp_len = ie_len;
987 case ATH6KL_FW_IE_FW_IMAGE:
988 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
991 /* in testmode we already might have a fw file */
995 ar->fw = vmalloc(ie_len);
997 if (ar->fw == NULL) {
1002 memcpy(ar->fw, data, ie_len);
1003 ar->fw_len = ie_len;
1005 case ATH6KL_FW_IE_PATCH_IMAGE:
1006 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
1009 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
1011 if (ar->fw_patch == NULL) {
1016 ar->fw_patch_len = ie_len;
1018 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
1019 val = (__le32 *) data;
1020 ar->hw.reserved_ram_size = le32_to_cpup(val);
1022 ath6kl_dbg(ATH6KL_DBG_BOOT,
1023 "found reserved ram size ie 0x%d\n",
1024 ar->hw.reserved_ram_size);
1026 case ATH6KL_FW_IE_CAPABILITIES:
1027 ath6kl_dbg(ATH6KL_DBG_BOOT,
1028 "found firmware capabilities ie (%zd B)\n",
1031 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1035 if (index == ie_len)
1038 if (data[index] & (1 << bit))
1039 __set_bit(i, ar->fw_capabilities);
1042 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
1043 ar->fw_capabilities,
1044 sizeof(ar->fw_capabilities));
1046 case ATH6KL_FW_IE_PATCH_ADDR:
1047 if (ie_len != sizeof(*val))
1050 val = (__le32 *) data;
1051 ar->hw.dataset_patch_addr = le32_to_cpup(val);
1053 ath6kl_dbg(ATH6KL_DBG_BOOT,
1054 "found patch address ie 0x%x\n",
1055 ar->hw.dataset_patch_addr);
1057 case ATH6KL_FW_IE_BOARD_ADDR:
1058 if (ie_len != sizeof(*val))
1061 val = (__le32 *) data;
1062 ar->hw.board_addr = le32_to_cpup(val);
1064 ath6kl_dbg(ATH6KL_DBG_BOOT,
1065 "found board address ie 0x%x\n",
1068 case ATH6KL_FW_IE_VIF_MAX:
1069 if (ie_len != sizeof(*val))
1072 val = (__le32 *) data;
1073 ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1076 if (ar->vif_max > 1 && !ar->p2p)
1077 ar->max_norm_iface = 2;
1079 ath6kl_dbg(ATH6KL_DBG_BOOT,
1080 "found vif max ie %d\n", ar->vif_max);
1083 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1084 le32_to_cpup(&hdr->id));
1094 release_firmware(fw);
1099 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1103 ret = ath6kl_fetch_board_file(ar);
1107 ret = ath6kl_fetch_testmode_file(ar);
1111 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE);
1117 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1123 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1129 ret = ath6kl_fetch_fw_api1(ar);
1136 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1141 static int ath6kl_upload_board_file(struct ath6kl *ar)
1143 u32 board_address, board_ext_address, param;
1144 u32 board_data_size, board_ext_data_size;
1147 if (WARN_ON(ar->fw_board == NULL))
1151 * Determine where in Target RAM to write Board Data.
1152 * For AR6004, host determine Target RAM address for
1153 * writing board data.
1155 if (ar->hw.board_addr != 0) {
1156 board_address = ar->hw.board_addr;
1157 ath6kl_bmi_write_hi32(ar, hi_board_data,
1160 ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1163 /* determine where in target ram to write extended board data */
1164 ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1166 if (ar->target_type == TARGET_TYPE_AR6003 &&
1167 board_ext_address == 0) {
1168 ath6kl_err("Failed to get board file target address.\n");
1172 switch (ar->target_type) {
1173 case TARGET_TYPE_AR6003:
1174 board_data_size = AR6003_BOARD_DATA_SZ;
1175 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1176 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1177 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1179 case TARGET_TYPE_AR6004:
1180 board_data_size = AR6004_BOARD_DATA_SZ;
1181 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1189 if (board_ext_address &&
1190 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1192 /* write extended board data */
1193 ath6kl_dbg(ATH6KL_DBG_BOOT,
1194 "writing extended board data to 0x%x (%d B)\n",
1195 board_ext_address, board_ext_data_size);
1197 ret = ath6kl_bmi_write(ar, board_ext_address,
1198 ar->fw_board + board_data_size,
1199 board_ext_data_size);
1201 ath6kl_err("Failed to write extended board data: %d\n",
1206 /* record that extended board data is initialized */
1207 param = (board_ext_data_size << 16) | 1;
1209 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1212 if (ar->fw_board_len < board_data_size) {
1213 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1218 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1219 board_address, board_data_size);
1221 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1225 ath6kl_err("Board file bmi write failed: %d\n", ret);
1229 /* record the fact that Board Data IS initialized */
1230 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1);
1235 static int ath6kl_upload_otp(struct ath6kl *ar)
1238 bool from_hw = false;
1241 if (ar->fw_otp == NULL)
1244 address = ar->hw.app_load_addr;
1246 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1249 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1252 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1256 /* read firmware start address */
1257 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1260 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1264 if (ar->hw.app_start_override_addr == 0) {
1265 ar->hw.app_start_override_addr = address;
1269 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1270 from_hw ? " (from hw)" : "",
1271 ar->hw.app_start_override_addr);
1273 /* execute the OTP code */
1274 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1275 ar->hw.app_start_override_addr);
1277 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m);
1282 static int ath6kl_upload_firmware(struct ath6kl *ar)
1287 if (WARN_ON(ar->fw == NULL))
1290 address = ar->hw.app_load_addr;
1292 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1293 address, ar->fw_len);
1295 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1298 ath6kl_err("Failed to write firmware: %d\n", ret);
1303 * Set starting address for firmware
1304 * Don't need to setup app_start override addr on AR6004
1306 if (ar->target_type != TARGET_TYPE_AR6004) {
1307 address = ar->hw.app_start_override_addr;
1308 ath6kl_bmi_set_app_start(ar, address);
1313 static int ath6kl_upload_patch(struct ath6kl *ar)
1318 if (ar->fw_patch == NULL)
1321 address = ar->hw.dataset_patch_addr;
1323 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1324 address, ar->fw_patch_len);
1326 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1328 ath6kl_err("Failed to write patch file: %d\n", ret);
1332 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1337 static int ath6kl_upload_testscript(struct ath6kl *ar)
1342 if (ar->testmode != 2)
1345 if (ar->fw_testscript == NULL)
1348 address = ar->hw.testscript_addr;
1350 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1351 address, ar->fw_testscript_len);
1353 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1354 ar->fw_testscript_len);
1356 ath6kl_err("Failed to write testscript file: %d\n", ret);
1360 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1361 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1362 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1367 static int ath6kl_init_upload(struct ath6kl *ar)
1369 u32 param, options, sleep, address;
1372 if (ar->target_type != TARGET_TYPE_AR6003 &&
1373 ar->target_type != TARGET_TYPE_AR6004)
1376 /* temporarily disable system sleep */
1377 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1378 status = ath6kl_bmi_reg_read(ar, address, ¶m);
1384 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1385 status = ath6kl_bmi_reg_write(ar, address, param);
1389 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1390 status = ath6kl_bmi_reg_read(ar, address, ¶m);
1396 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1397 status = ath6kl_bmi_reg_write(ar, address, param);
1401 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1404 /* program analog PLL register */
1405 /* no need to control 40/44MHz clock on AR6004 */
1406 if (ar->target_type != TARGET_TYPE_AR6004) {
1407 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1413 /* Run at 80/88MHz by default */
1414 param = SM(CPU_CLOCK_STANDARD, 1);
1416 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1417 status = ath6kl_bmi_reg_write(ar, address, param);
1423 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1424 param = SM(LPO_CAL_ENABLE, 1);
1425 status = ath6kl_bmi_reg_write(ar, address, param);
1429 /* WAR to avoid SDIO CRC err */
1430 if (ar->version.target_ver == AR6003_HW_2_0_VERSION ||
1431 ar->version.target_ver == AR6003_HW_2_1_1_VERSION) {
1432 ath6kl_err("temporary war to avoid sdio crc error\n");
1435 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
1436 status = ath6kl_bmi_reg_write(ar, address, param);
1442 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1443 status = ath6kl_bmi_reg_write(ar, address, param);
1447 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1448 status = ath6kl_bmi_reg_write(ar, address, param);
1452 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1453 status = ath6kl_bmi_reg_write(ar, address, param);
1457 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1458 status = ath6kl_bmi_reg_write(ar, address, param);
1463 /* write EEPROM data to Target RAM */
1464 status = ath6kl_upload_board_file(ar);
1468 /* transfer One time Programmable data */
1469 status = ath6kl_upload_otp(ar);
1473 /* Download Target firmware */
1474 status = ath6kl_upload_firmware(ar);
1478 status = ath6kl_upload_patch(ar);
1482 /* Download the test script */
1483 status = ath6kl_upload_testscript(ar);
1487 /* Restore system sleep */
1488 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1489 status = ath6kl_bmi_reg_write(ar, address, sleep);
1493 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1494 param = options | 0x20;
1495 status = ath6kl_bmi_reg_write(ar, address, param);
1502 int ath6kl_init_hw_params(struct ath6kl *ar)
1504 const struct ath6kl_hw *uninitialized_var(hw);
1507 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1510 if (hw->id == ar->version.target_ver)
1514 if (i == ARRAY_SIZE(hw_list)) {
1515 ath6kl_err("Unsupported hardware version: 0x%x\n",
1516 ar->version.target_ver);
1522 ath6kl_dbg(ATH6KL_DBG_BOOT,
1523 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1524 ar->version.target_ver, ar->target_type,
1525 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1526 ath6kl_dbg(ATH6KL_DBG_BOOT,
1527 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1528 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1529 ar->hw.reserved_ram_size);
1530 ath6kl_dbg(ATH6KL_DBG_BOOT,
1531 "refclk_hz %d uarttx_pin %d",
1532 ar->hw.refclk_hz, ar->hw.uarttx_pin);
1537 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1540 case ATH6KL_HIF_TYPE_SDIO:
1542 case ATH6KL_HIF_TYPE_USB:
1549 static int __ath6kl_init_hw_start(struct ath6kl *ar)
1554 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1556 ret = ath6kl_hif_power_on(ar);
1560 ret = ath6kl_configure_target(ar);
1564 ret = ath6kl_init_upload(ar);
1568 /* Do we need to finish the BMI phase */
1569 /* FIXME: return error from ath6kl_bmi_done() */
1570 if (ath6kl_bmi_done(ar)) {
1576 * The reason we have to wait for the target here is that the
1577 * driver layer has to init BMI in order to set the host block
1580 if (ath6kl_htc_wait_target(ar->htc_target)) {
1585 if (ath6kl_init_service_ep(ar)) {
1587 goto err_cleanup_scatter;
1590 /* setup credit distribution */
1591 ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info);
1594 ret = ath6kl_htc_start(ar->htc_target);
1596 /* FIXME: call this */
1597 ath6kl_cookie_cleanup(ar);
1598 goto err_cleanup_scatter;
1601 /* Wait for Wmi event to be ready */
1602 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1607 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1610 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1611 ath6kl_info("%s %s fw %s api %d%s\n",
1613 ath6kl_init_get_hif_name(ar->hif_type),
1614 ar->wiphy->fw_version,
1616 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1619 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1620 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1621 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1626 if (!timeleft || signal_pending(current)) {
1627 ath6kl_err("wmi is not ready or wait was interrupted\n");
1632 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1634 /* communicate the wmi protocol verision to the target */
1635 /* FIXME: return error */
1636 if ((ath6kl_set_host_app_area(ar)) != 0)
1637 ath6kl_err("unable to set the host app area\n");
1639 for (i = 0; i < ar->vif_max; i++) {
1640 ret = ath6kl_target_config_wlan_params(ar, i);
1648 ath6kl_htc_stop(ar->htc_target);
1649 err_cleanup_scatter:
1650 ath6kl_hif_cleanup_scatter(ar);
1652 ath6kl_hif_power_off(ar);
1657 int ath6kl_init_hw_start(struct ath6kl *ar)
1661 err = __ath6kl_init_hw_start(ar);
1664 ar->state = ATH6KL_STATE_ON;
1668 static int __ath6kl_init_hw_stop(struct ath6kl *ar)
1672 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1674 ath6kl_htc_stop(ar->htc_target);
1676 ath6kl_hif_stop(ar);
1678 ath6kl_bmi_reset(ar);
1680 ret = ath6kl_hif_power_off(ar);
1682 ath6kl_warn("failed to power off hif: %d\n", ret);
1687 int ath6kl_init_hw_stop(struct ath6kl *ar)
1691 err = __ath6kl_init_hw_stop(ar);
1694 ar->state = ATH6KL_STATE_OFF;
1698 void ath6kl_init_hw_restart(struct ath6kl *ar)
1700 clear_bit(WMI_READY, &ar->flag);
1702 ath6kl_cfg80211_stop_all(ar);
1704 if (__ath6kl_init_hw_stop(ar)) {
1705 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n");
1709 if (__ath6kl_init_hw_start(ar)) {
1710 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n");
1715 /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */
1716 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
1718 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1721 netif_stop_queue(vif->ndev);
1723 clear_bit(WLAN_ENABLED, &vif->flags);
1726 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1727 test_bit(CONNECT_PEND, &vif->flags);
1728 ath6kl_disconnect(vif);
1729 del_timer(&vif->disconnect_timer);
1732 ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1733 (vif->nw_type & AP_NETWORK) ?
1734 bcast_mac : vif->bssid,
1738 if (vif->scan_req) {
1739 cfg80211_scan_done(vif->scan_req, true);
1740 vif->scan_req = NULL;
1743 /* need to clean up enhanced bmiss detection fw state */
1744 ath6kl_cfg80211_sta_bmiss_enhance(vif, false);
1747 void ath6kl_stop_txrx(struct ath6kl *ar)
1749 struct ath6kl_vif *vif, *tmp_vif;
1752 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1754 if (down_interruptible(&ar->sem)) {
1755 ath6kl_err("down_interruptible failed\n");
1759 for (i = 0; i < AP_MAX_NUM_STA; i++)
1760 aggr_reset_state(ar->sta_list[i].aggr_conn);
1762 spin_lock_bh(&ar->list_lock);
1763 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1764 list_del(&vif->list);
1765 spin_unlock_bh(&ar->list_lock);
1766 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
1768 ath6kl_cfg80211_vif_cleanup(vif);
1770 spin_lock_bh(&ar->list_lock);
1772 spin_unlock_bh(&ar->list_lock);
1774 clear_bit(WMI_READY, &ar->flag);
1777 * After wmi_shudown all WMI events will be dropped. We
1778 * need to cleanup the buffers allocated in AP mode and
1779 * give disconnect notification to stack, which usually
1780 * happens in the disconnect_event. Simulate the disconnect
1781 * event by calling the function directly. Sometimes
1782 * disconnect_event will be received when the debug logs
1785 ath6kl_wmi_shutdown(ar->wmi);
1787 clear_bit(WMI_ENABLED, &ar->flag);
1788 if (ar->htc_target) {
1789 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1790 ath6kl_htc_stop(ar->htc_target);
1794 * Try to reset the device if we can. The driver may have been
1795 * configure NOT to reset the target during a debug session.
1797 ath6kl_dbg(ATH6KL_DBG_TRC,
1798 "attempting to reset target on instance destroy\n");
1799 ath6kl_reset_device(ar, ar->target_type, true, true);
1801 clear_bit(WLAN_ENABLED, &ar->flag);
1805 EXPORT_SYMBOL(ath6kl_stop_txrx);