1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
6 #include <linux/signal.h>
7 #include <linux/slab.h>
8 #include <linux/module.h>
9 #include <linux/netdevice.h>
10 #include <linux/etherdevice.h>
11 #include <linux/mii.h>
12 #include <linux/ethtool.h>
13 #include <linux/usb.h>
14 #include <linux/crc32.h>
15 #include <linux/if_vlan.h>
16 #include <linux/uaccess.h>
17 #include <linux/list.h>
19 #include <linux/ipv6.h>
20 #include <net/ip6_checksum.h>
21 #include <uapi/linux/mdio.h>
22 #include <linux/mdio.h>
23 #include <linux/usb/cdc.h>
24 #include <linux/suspend.h>
25 #include <linux/atomic.h>
26 #include <linux/acpi.h>
28 /* Information for net-next */
29 #define NETNEXT_VERSION "10"
31 /* Information for net */
32 #define NET_VERSION "10"
34 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
35 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
36 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
37 #define MODULENAME "r8152"
39 #define R8152_PHY_ID 32
41 #define PLA_IDR 0xc000
42 #define PLA_RCR 0xc010
43 #define PLA_RMS 0xc016
44 #define PLA_RXFIFO_CTRL0 0xc0a0
45 #define PLA_RXFIFO_CTRL1 0xc0a4
46 #define PLA_RXFIFO_CTRL2 0xc0a8
47 #define PLA_DMY_REG0 0xc0b0
48 #define PLA_FMC 0xc0b4
49 #define PLA_CFG_WOL 0xc0b6
50 #define PLA_TEREDO_CFG 0xc0bc
51 #define PLA_TEREDO_WAKE_BASE 0xc0c4
52 #define PLA_MAR 0xcd00
53 #define PLA_BACKUP 0xd000
54 #define PLA_BDC_CR 0xd1a0
55 #define PLA_TEREDO_TIMER 0xd2cc
56 #define PLA_REALWOW_TIMER 0xd2e8
57 #define PLA_SUSPEND_FLAG 0xd38a
58 #define PLA_INDICATE_FALG 0xd38c
59 #define PLA_EXTRA_STATUS 0xd398
60 #define PLA_EFUSE_DATA 0xdd00
61 #define PLA_EFUSE_CMD 0xdd02
62 #define PLA_LEDSEL 0xdd90
63 #define PLA_LED_FEATURE 0xdd92
64 #define PLA_PHYAR 0xde00
65 #define PLA_BOOT_CTRL 0xe004
66 #define PLA_GPHY_INTR_IMR 0xe022
67 #define PLA_EEE_CR 0xe040
68 #define PLA_EEEP_CR 0xe080
69 #define PLA_MAC_PWR_CTRL 0xe0c0
70 #define PLA_MAC_PWR_CTRL2 0xe0ca
71 #define PLA_MAC_PWR_CTRL3 0xe0cc
72 #define PLA_MAC_PWR_CTRL4 0xe0ce
73 #define PLA_WDT6_CTRL 0xe428
74 #define PLA_TCR0 0xe610
75 #define PLA_TCR1 0xe612
76 #define PLA_MTPS 0xe615
77 #define PLA_TXFIFO_CTRL 0xe618
78 #define PLA_RSTTALLY 0xe800
80 #define PLA_CRWECR 0xe81c
81 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
82 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
83 #define PLA_CONFIG5 0xe822
84 #define PLA_PHY_PWR 0xe84c
85 #define PLA_OOB_CTRL 0xe84f
86 #define PLA_CPCR 0xe854
87 #define PLA_MISC_0 0xe858
88 #define PLA_MISC_1 0xe85a
89 #define PLA_OCP_GPHY_BASE 0xe86c
90 #define PLA_TALLYCNT 0xe890
91 #define PLA_SFF_STS_7 0xe8de
92 #define PLA_PHYSTATUS 0xe908
93 #define PLA_BP_BA 0xfc26
94 #define PLA_BP_0 0xfc28
95 #define PLA_BP_1 0xfc2a
96 #define PLA_BP_2 0xfc2c
97 #define PLA_BP_3 0xfc2e
98 #define PLA_BP_4 0xfc30
99 #define PLA_BP_5 0xfc32
100 #define PLA_BP_6 0xfc34
101 #define PLA_BP_7 0xfc36
102 #define PLA_BP_EN 0xfc38
104 #define USB_USB2PHY 0xb41e
105 #define USB_SSPHYLINK2 0xb428
106 #define USB_U2P3_CTRL 0xb460
107 #define USB_CSR_DUMMY1 0xb464
108 #define USB_CSR_DUMMY2 0xb466
109 #define USB_DEV_STAT 0xb808
110 #define USB_CONNECT_TIMER 0xcbf8
111 #define USB_MSC_TIMER 0xcbfc
112 #define USB_BURST_SIZE 0xcfc0
113 #define USB_LPM_CONFIG 0xcfd8
114 #define USB_USB_CTRL 0xd406
115 #define USB_PHY_CTRL 0xd408
116 #define USB_TX_AGG 0xd40a
117 #define USB_RX_BUF_TH 0xd40c
118 #define USB_USB_TIMER 0xd428
119 #define USB_RX_EARLY_TIMEOUT 0xd42c
120 #define USB_RX_EARLY_SIZE 0xd42e
121 #define USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */
122 #define USB_RX_EXTRA_AGGR_TMR 0xd432 /* RTL8153B */
123 #define USB_TX_DMA 0xd434
124 #define USB_UPT_RXDMA_OWN 0xd437
125 #define USB_TOLERANCE 0xd490
126 #define USB_LPM_CTRL 0xd41a
127 #define USB_BMU_RESET 0xd4b0
128 #define USB_U1U2_TIMER 0xd4da
129 #define USB_UPS_CTRL 0xd800
130 #define USB_POWER_CUT 0xd80a
131 #define USB_MISC_0 0xd81a
132 #define USB_MISC_1 0xd81f
133 #define USB_AFE_CTRL2 0xd824
134 #define USB_UPS_CFG 0xd842
135 #define USB_UPS_FLAGS 0xd848
136 #define USB_WDT11_CTRL 0xe43c
137 #define USB_BP_BA 0xfc26
138 #define USB_BP_0 0xfc28
139 #define USB_BP_1 0xfc2a
140 #define USB_BP_2 0xfc2c
141 #define USB_BP_3 0xfc2e
142 #define USB_BP_4 0xfc30
143 #define USB_BP_5 0xfc32
144 #define USB_BP_6 0xfc34
145 #define USB_BP_7 0xfc36
146 #define USB_BP_EN 0xfc38
147 #define USB_BP_8 0xfc38
148 #define USB_BP_9 0xfc3a
149 #define USB_BP_10 0xfc3c
150 #define USB_BP_11 0xfc3e
151 #define USB_BP_12 0xfc40
152 #define USB_BP_13 0xfc42
153 #define USB_BP_14 0xfc44
154 #define USB_BP_15 0xfc46
155 #define USB_BP2_EN 0xfc48
158 #define OCP_ALDPS_CONFIG 0x2010
159 #define OCP_EEE_CONFIG1 0x2080
160 #define OCP_EEE_CONFIG2 0x2092
161 #define OCP_EEE_CONFIG3 0x2094
162 #define OCP_BASE_MII 0xa400
163 #define OCP_EEE_AR 0xa41a
164 #define OCP_EEE_DATA 0xa41c
165 #define OCP_PHY_STATUS 0xa420
166 #define OCP_NCTL_CFG 0xa42c
167 #define OCP_POWER_CFG 0xa430
168 #define OCP_EEE_CFG 0xa432
169 #define OCP_SRAM_ADDR 0xa436
170 #define OCP_SRAM_DATA 0xa438
171 #define OCP_DOWN_SPEED 0xa442
172 #define OCP_EEE_ABLE 0xa5c4
173 #define OCP_EEE_ADV 0xa5d0
174 #define OCP_EEE_LPABLE 0xa5d2
175 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
176 #define OCP_PHY_PATCH_STAT 0xb800
177 #define OCP_PHY_PATCH_CMD 0xb820
178 #define OCP_ADC_IOFFSET 0xbcfc
179 #define OCP_ADC_CFG 0xbc06
180 #define OCP_SYSCLK_CFG 0xc416
183 #define SRAM_GREEN_CFG 0x8011
184 #define SRAM_LPF_CFG 0x8012
185 #define SRAM_10M_AMP1 0x8080
186 #define SRAM_10M_AMP2 0x8082
187 #define SRAM_IMPEDANCE 0x8084
190 #define RCR_AAP 0x00000001
191 #define RCR_APM 0x00000002
192 #define RCR_AM 0x00000004
193 #define RCR_AB 0x00000008
194 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
196 /* PLA_RXFIFO_CTRL0 */
197 #define RXFIFO_THR1_NORMAL 0x00080002
198 #define RXFIFO_THR1_OOB 0x01800003
200 /* PLA_RXFIFO_CTRL1 */
201 #define RXFIFO_THR2_FULL 0x00000060
202 #define RXFIFO_THR2_HIGH 0x00000038
203 #define RXFIFO_THR2_OOB 0x0000004a
204 #define RXFIFO_THR2_NORMAL 0x00a0
206 /* PLA_RXFIFO_CTRL2 */
207 #define RXFIFO_THR3_FULL 0x00000078
208 #define RXFIFO_THR3_HIGH 0x00000048
209 #define RXFIFO_THR3_OOB 0x0000005a
210 #define RXFIFO_THR3_NORMAL 0x0110
212 /* PLA_TXFIFO_CTRL */
213 #define TXFIFO_THR_NORMAL 0x00400008
214 #define TXFIFO_THR_NORMAL2 0x01000008
217 #define ECM_ALDPS 0x0002
220 #define FMC_FCR_MCU_EN 0x0001
223 #define EEEP_CR_EEEP_TX 0x0002
226 #define WDT6_SET_MODE 0x0010
229 #define TCR0_TX_EMPTY 0x0800
230 #define TCR0_AUTO_FIFO 0x0080
233 #define VERSION_MASK 0x7cf0
236 #define MTPS_JUMBO (12 * 1024 / 64)
237 #define MTPS_DEFAULT (6 * 1024 / 64)
240 #define TALLY_RESET 0x0001
248 #define CRWECR_NORAML 0x00
249 #define CRWECR_CONFIG 0xc0
252 #define NOW_IS_OOB 0x80
253 #define TXFIFO_EMPTY 0x20
254 #define RXFIFO_EMPTY 0x10
255 #define LINK_LIST_READY 0x02
256 #define DIS_MCU_CLROOB 0x01
257 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
260 #define RXDY_GATED_EN 0x0008
263 #define RE_INIT_LL 0x8000
264 #define MCU_BORW_EN 0x4000
267 #define CPCR_RX_VLAN 0x0040
270 #define MAGIC_EN 0x0001
273 #define TEREDO_SEL 0x8000
274 #define TEREDO_WAKE_MASK 0x7f00
275 #define TEREDO_RS_EVENT_MASK 0x00fe
276 #define OOB_TEREDO_EN 0x0001
279 #define ALDPS_PROXY_MODE 0x0001
282 #define EFUSE_READ_CMD BIT(15)
283 #define EFUSE_DATA_BIT16 BIT(7)
286 #define LINK_ON_WAKE_EN 0x0010
287 #define LINK_OFF_WAKE_EN 0x0008
290 #define BWF_EN 0x0040
291 #define MWF_EN 0x0020
292 #define UWF_EN 0x0010
293 #define LAN_WAKE_EN 0x0002
295 /* PLA_LED_FEATURE */
296 #define LED_MODE_MASK 0x0700
299 #define TX_10M_IDLE_EN 0x0080
300 #define PFM_PWM_SWITCH 0x0040
302 /* PLA_MAC_PWR_CTRL */
303 #define D3_CLK_GATED_EN 0x00004000
304 #define MCU_CLK_RATIO 0x07010f07
305 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
306 #define ALDPS_SPDWN_RATIO 0x0f87
308 /* PLA_MAC_PWR_CTRL2 */
309 #define EEE_SPDWN_RATIO 0x8007
310 #define MAC_CLK_SPDWN_EN BIT(15)
312 /* PLA_MAC_PWR_CTRL3 */
313 #define PKT_AVAIL_SPDWN_EN 0x0100
314 #define SUSPEND_SPDWN_EN 0x0004
315 #define U1U2_SPDWN_EN 0x0002
316 #define L1_SPDWN_EN 0x0001
318 /* PLA_MAC_PWR_CTRL4 */
319 #define PWRSAVE_SPDWN_EN 0x1000
320 #define RXDV_SPDWN_EN 0x0800
321 #define TX10MIDLE_EN 0x0100
322 #define TP100_SPDWN_EN 0x0020
323 #define TP500_SPDWN_EN 0x0010
324 #define TP1000_SPDWN_EN 0x0008
325 #define EEE_SPDWN_EN 0x0001
327 /* PLA_GPHY_INTR_IMR */
328 #define GPHY_STS_MSK 0x0001
329 #define SPEED_DOWN_MSK 0x0002
330 #define SPDWN_RXDV_MSK 0x0004
331 #define SPDWN_LINKCHG_MSK 0x0008
334 #define PHYAR_FLAG 0x80000000
337 #define EEE_RX_EN 0x0001
338 #define EEE_TX_EN 0x0002
341 #define AUTOLOAD_DONE 0x0002
343 /* PLA_SUSPEND_FLAG */
344 #define LINK_CHG_EVENT BIT(0)
346 /* PLA_INDICATE_FALG */
347 #define UPCOMING_RUNTIME_D3 BIT(0)
349 /* PLA_EXTRA_STATUS */
350 #define LINK_CHANGE_FLAG BIT(8)
353 #define USB2PHY_SUSPEND 0x0001
354 #define USB2PHY_L1 0x0002
357 #define pwd_dn_scale_mask 0x3ffe
358 #define pwd_dn_scale(x) ((x) << 1)
361 #define DYNAMIC_BURST 0x0001
364 #define EP4_FULL_FC 0x0001
367 #define STAT_SPEED_MASK 0x0006
368 #define STAT_SPEED_HIGH 0x0000
369 #define STAT_SPEED_FULL 0x0002
372 #define LPM_U1U2_EN BIT(0)
375 #define TX_AGG_MAX_THRESHOLD 0x03
378 #define RX_THR_SUPPER 0x0c350180
379 #define RX_THR_HIGH 0x7a120180
380 #define RX_THR_SLOW 0xffff0180
381 #define RX_THR_B 0x00010001
384 #define TEST_MODE_DISABLE 0x00000001
385 #define TX_SIZE_ADJUST1 0x00000100
388 #define BMU_RESET_EP_IN 0x01
389 #define BMU_RESET_EP_OUT 0x02
391 /* USB_UPT_RXDMA_OWN */
392 #define OWN_UPDATE BIT(0)
393 #define OWN_CLEAR BIT(1)
396 #define POWER_CUT 0x0100
398 /* USB_PM_CTRL_STATUS */
399 #define RESUME_INDICATE 0x0001
402 #define RX_AGG_DISABLE 0x0010
403 #define RX_ZERO_EN 0x0080
406 #define U2P3_ENABLE 0x0001
409 #define PWR_EN 0x0001
410 #define PHASE2_EN 0x0008
411 #define UPS_EN BIT(4)
412 #define USP_PREWAKE BIT(5)
415 #define PCUT_STATUS 0x0001
417 /* USB_RX_EARLY_TIMEOUT */
418 #define COALESCE_SUPER 85000U
419 #define COALESCE_HIGH 250000U
420 #define COALESCE_SLOW 524280U
423 #define TIMER11_EN 0x0001
426 /* bit 4 ~ 5: fifo empty boundary */
427 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
428 /* bit 2 ~ 3: LMP timer */
429 #define LPM_TIMER_MASK 0x0c
430 #define LPM_TIMER_500MS 0x04 /* 500 ms */
431 #define LPM_TIMER_500US 0x0c /* 500 us */
432 #define ROK_EXIT_LPM 0x02
435 #define SEN_VAL_MASK 0xf800
436 #define SEN_VAL_NORMAL 0xa000
437 #define SEL_RXIDLE 0x0100
440 #define SAW_CNT_1MS_MASK 0x0fff
443 #define UPS_FLAGS_R_TUNE BIT(0)
444 #define UPS_FLAGS_EN_10M_CKDIV BIT(1)
445 #define UPS_FLAGS_250M_CKDIV BIT(2)
446 #define UPS_FLAGS_EN_ALDPS BIT(3)
447 #define UPS_FLAGS_CTAP_SHORT_DIS BIT(4)
448 #define ups_flags_speed(x) ((x) << 16)
449 #define UPS_FLAGS_EN_EEE BIT(20)
450 #define UPS_FLAGS_EN_500M_EEE BIT(21)
451 #define UPS_FLAGS_EN_EEE_CKDIV BIT(22)
452 #define UPS_FLAGS_EEE_PLLOFF_100 BIT(23)
453 #define UPS_FLAGS_EEE_PLLOFF_GIGA BIT(24)
454 #define UPS_FLAGS_EEE_CMOD_LV_EN BIT(25)
455 #define UPS_FLAGS_EN_GREEN BIT(26)
456 #define UPS_FLAGS_EN_FLOW_CTR BIT(27)
470 /* OCP_ALDPS_CONFIG */
471 #define ENPWRSAVE 0x8000
472 #define ENPDNPS 0x0200
473 #define LINKENA 0x0100
474 #define DIS_SDSAVE 0x0010
477 #define PHY_STAT_MASK 0x0007
478 #define PHY_STAT_EXT_INIT 2
479 #define PHY_STAT_LAN_ON 3
480 #define PHY_STAT_PWRDN 5
483 #define PGA_RETURN_EN BIT(1)
486 #define EEE_CLKDIV_EN 0x8000
487 #define EN_ALDPS 0x0004
488 #define EN_10M_PLLOFF 0x0001
490 /* OCP_EEE_CONFIG1 */
491 #define RG_TXLPI_MSK_HFDUP 0x8000
492 #define RG_MATCLR_EN 0x4000
493 #define EEE_10_CAP 0x2000
494 #define EEE_NWAY_EN 0x1000
495 #define TX_QUIET_EN 0x0200
496 #define RX_QUIET_EN 0x0100
497 #define sd_rise_time_mask 0x0070
498 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
499 #define RG_RXLPI_MSK_HFDUP 0x0008
500 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
502 /* OCP_EEE_CONFIG2 */
503 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
504 #define RG_DACQUIET_EN 0x0400
505 #define RG_LDVQUIET_EN 0x0200
506 #define RG_CKRSEL 0x0020
507 #define RG_EEEPRG_EN 0x0010
509 /* OCP_EEE_CONFIG3 */
510 #define fast_snr_mask 0xff80
511 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
512 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
513 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
516 /* bit[15:14] function */
517 #define FUN_ADDR 0x0000
518 #define FUN_DATA 0x4000
519 /* bit[4:0] device addr */
522 #define CTAP_SHORT_EN 0x0040
523 #define EEE10_EN 0x0010
526 #define EN_EEE_CMODE BIT(14)
527 #define EN_EEE_1000 BIT(13)
528 #define EN_EEE_100 BIT(12)
529 #define EN_10M_CLKDIV BIT(11)
530 #define EN_10M_BGOFF 0x0080
533 #define TXDIS_STATE 0x01
534 #define ABD_STATE 0x02
536 /* OCP_PHY_PATCH_STAT */
537 #define PATCH_READY BIT(6)
539 /* OCP_PHY_PATCH_CMD */
540 #define PATCH_REQUEST BIT(4)
543 #define CKADSEL_L 0x0100
544 #define ADC_EN 0x0080
545 #define EN_EMI_L 0x0040
548 #define clk_div_expo(x) (min(x, 5) << 8)
551 #define GREEN_ETH_EN BIT(15)
552 #define R_TUNE_EN BIT(11)
555 #define LPF_AUTO_TUNE 0x8000
558 #define GDAC_IB_UPALL 0x0008
561 #define AMP_DN 0x0200
564 #define RX_DRIVING_MASK 0x6000
567 #define AD_MASK 0xfee0
568 #define BND_MASK 0x0004
569 #define BD_MASK 0x0001
571 #define PASS_THRU_MASK 0x1
573 enum rtl_register_content {
581 #define RTL8152_MAX_TX 4
582 #define RTL8152_MAX_RX 10
587 #define RTL8152_RX_MAX_PENDING 4096
588 #define RTL8152_RXFG_HEADSZ 256
590 #define INTR_LINK 0x0004
592 #define RTL8152_REQT_READ 0xc0
593 #define RTL8152_REQT_WRITE 0x40
594 #define RTL8152_REQ_GET_REGS 0x05
595 #define RTL8152_REQ_SET_REGS 0x05
597 #define BYTE_EN_DWORD 0xff
598 #define BYTE_EN_WORD 0x33
599 #define BYTE_EN_BYTE 0x11
600 #define BYTE_EN_SIX_BYTES 0x3f
601 #define BYTE_EN_START_MASK 0x0f
602 #define BYTE_EN_END_MASK 0xf0
604 #define RTL8153_MAX_PACKET 9216 /* 9K */
605 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - \
607 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
608 #define RTL8153_RMS RTL8153_MAX_PACKET
609 #define RTL8152_TX_TIMEOUT (5 * HZ)
610 #define RTL8152_NAPI_WEIGHT 64
611 #define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + ETH_FCS_LEN + \
612 sizeof(struct rx_desc) + RX_ALIGN)
627 /* Define these values to match your device */
628 #define VENDOR_ID_REALTEK 0x0bda
629 #define VENDOR_ID_MICROSOFT 0x045e
630 #define VENDOR_ID_SAMSUNG 0x04e8
631 #define VENDOR_ID_LENOVO 0x17ef
632 #define VENDOR_ID_LINKSYS 0x13b1
633 #define VENDOR_ID_NVIDIA 0x0955
634 #define VENDOR_ID_TPLINK 0x2357
636 #define MCU_TYPE_PLA 0x0100
637 #define MCU_TYPE_USB 0x0000
639 struct tally_counter {
646 __le32 tx_one_collision;
647 __le32 tx_multi_collision;
657 #define RX_LEN_MASK 0x7fff
660 #define RD_UDP_CS BIT(23)
661 #define RD_TCP_CS BIT(22)
662 #define RD_IPV6_CS BIT(20)
663 #define RD_IPV4_CS BIT(19)
666 #define IPF BIT(23) /* IP checksum fail */
667 #define UDPF BIT(22) /* UDP checksum fail */
668 #define TCPF BIT(21) /* TCP checksum fail */
669 #define RX_VLAN_TAG BIT(16)
678 #define TX_FS BIT(31) /* First segment of a packet */
679 #define TX_LS BIT(30) /* Final segment of a packet */
680 #define GTSENDV4 BIT(28)
681 #define GTSENDV6 BIT(27)
682 #define GTTCPHO_SHIFT 18
683 #define GTTCPHO_MAX 0x7fU
684 #define TX_LEN_MAX 0x3ffffU
687 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
688 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
689 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
690 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
692 #define MSS_MAX 0x7ffU
693 #define TCPHO_SHIFT 17
694 #define TCPHO_MAX 0x7ffU
695 #define TX_VLAN_TAG BIT(16)
701 struct list_head list, info_list;
703 struct r8152 *context;
709 struct list_head list;
711 struct r8152 *context;
720 struct usb_device *udev;
721 struct napi_struct napi;
722 struct usb_interface *intf;
723 struct net_device *netdev;
724 struct urb *intr_urb;
725 struct tx_agg tx_info[RTL8152_MAX_TX];
726 struct list_head rx_info, rx_used;
727 struct list_head rx_done, tx_free;
728 struct sk_buff_head tx_queue, rx_queue;
729 spinlock_t rx_lock, tx_lock;
730 struct delayed_work schedule, hw_phy_work;
731 struct mii_if_info mii;
732 struct mutex control; /* use for hw setting */
733 #ifdef CONFIG_PM_SLEEP
734 struct notifier_block pm_notifier;
736 struct tasklet_struct tx_tl;
739 void (*init)(struct r8152 *);
740 int (*enable)(struct r8152 *);
741 void (*disable)(struct r8152 *);
742 void (*up)(struct r8152 *);
743 void (*down)(struct r8152 *);
744 void (*unload)(struct r8152 *);
745 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
746 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
747 bool (*in_nway)(struct r8152 *);
748 void (*hw_phy_cfg)(struct r8152 *);
749 void (*autosuspend_en)(struct r8152 *tp, bool enable);
761 u32 eee_plloff_100:1;
762 u32 eee_plloff_giga:1;
766 u32 ctap_short_off:1;
811 #define RTL_ADVERTISED_10_HALF BIT(0)
812 #define RTL_ADVERTISED_10_FULL BIT(1)
813 #define RTL_ADVERTISED_100_HALF BIT(2)
814 #define RTL_ADVERTISED_100_FULL BIT(3)
815 #define RTL_ADVERTISED_1000_HALF BIT(4)
816 #define RTL_ADVERTISED_1000_FULL BIT(5)
818 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
819 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
821 static const int multicast_filter_limit = 32;
822 static unsigned int agg_buf_sz = 16384;
824 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
825 VLAN_ETH_HLEN - ETH_FCS_LEN)
828 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
833 tmp = kmalloc(size, GFP_KERNEL);
837 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
838 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
839 value, index, tmp, size, 500);
841 memset(data, 0xff, size);
843 memcpy(data, tmp, size);
851 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
856 tmp = kmemdup(data, size, GFP_KERNEL);
860 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
861 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
862 value, index, tmp, size, 500);
869 static void rtl_set_unplug(struct r8152 *tp)
871 if (tp->udev->state == USB_STATE_NOTATTACHED) {
872 set_bit(RTL8152_UNPLUG, &tp->flags);
873 smp_mb__after_atomic();
877 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
878 void *data, u16 type)
883 if (test_bit(RTL8152_UNPLUG, &tp->flags))
886 /* both size and indix must be 4 bytes align */
887 if ((size & 3) || !size || (index & 3) || !data)
890 if ((u32)index + (u32)size > 0xffff)
895 ret = get_registers(tp, index, type, limit, data);
903 ret = get_registers(tp, index, type, size, data);
920 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
921 u16 size, void *data, u16 type)
924 u16 byteen_start, byteen_end, byen;
927 if (test_bit(RTL8152_UNPLUG, &tp->flags))
930 /* both size and indix must be 4 bytes align */
931 if ((size & 3) || !size || (index & 3) || !data)
934 if ((u32)index + (u32)size > 0xffff)
937 byteen_start = byteen & BYTE_EN_START_MASK;
938 byteen_end = byteen & BYTE_EN_END_MASK;
940 byen = byteen_start | (byteen_start << 4);
941 ret = set_registers(tp, index, type | byen, 4, data);
954 ret = set_registers(tp, index,
955 type | BYTE_EN_DWORD,
964 ret = set_registers(tp, index,
965 type | BYTE_EN_DWORD,
977 byen = byteen_end | (byteen_end >> 4);
978 ret = set_registers(tp, index, type | byen, 4, data);
991 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
993 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
997 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
999 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
1003 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
1005 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
1008 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
1012 generic_ocp_read(tp, index, sizeof(data), &data, type);
1014 return __le32_to_cpu(data);
1017 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
1019 __le32 tmp = __cpu_to_le32(data);
1021 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
1024 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
1028 u16 byen = BYTE_EN_WORD;
1029 u8 shift = index & 2;
1034 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type | byen);
1036 data = __le32_to_cpu(tmp);
1037 data >>= (shift * 8);
1043 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
1047 u16 byen = BYTE_EN_WORD;
1048 u8 shift = index & 2;
1054 mask <<= (shift * 8);
1055 data <<= (shift * 8);
1059 tmp = __cpu_to_le32(data);
1061 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
1064 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
1068 u8 shift = index & 3;
1072 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
1074 data = __le32_to_cpu(tmp);
1075 data >>= (shift * 8);
1081 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
1085 u16 byen = BYTE_EN_BYTE;
1086 u8 shift = index & 3;
1092 mask <<= (shift * 8);
1093 data <<= (shift * 8);
1097 tmp = __cpu_to_le32(data);
1099 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
1102 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
1104 u16 ocp_base, ocp_index;
1106 ocp_base = addr & 0xf000;
1107 if (ocp_base != tp->ocp_base) {
1108 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
1109 tp->ocp_base = ocp_base;
1112 ocp_index = (addr & 0x0fff) | 0xb000;
1113 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
1116 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
1118 u16 ocp_base, ocp_index;
1120 ocp_base = addr & 0xf000;
1121 if (ocp_base != tp->ocp_base) {
1122 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
1123 tp->ocp_base = ocp_base;
1126 ocp_index = (addr & 0x0fff) | 0xb000;
1127 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
1130 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
1132 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
1135 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
1137 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
1140 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
1142 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
1143 ocp_reg_write(tp, OCP_SRAM_DATA, data);
1146 static u16 sram_read(struct r8152 *tp, u16 addr)
1148 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
1149 return ocp_reg_read(tp, OCP_SRAM_DATA);
1152 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
1154 struct r8152 *tp = netdev_priv(netdev);
1157 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1160 if (phy_id != R8152_PHY_ID)
1163 ret = r8152_mdio_read(tp, reg);
1169 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1171 struct r8152 *tp = netdev_priv(netdev);
1173 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1176 if (phy_id != R8152_PHY_ID)
1179 r8152_mdio_write(tp, reg, val);
1183 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1185 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1187 struct r8152 *tp = netdev_priv(netdev);
1188 struct sockaddr *addr = p;
1189 int ret = -EADDRNOTAVAIL;
1191 if (!is_valid_ether_addr(addr->sa_data))
1194 ret = usb_autopm_get_interface(tp->intf);
1198 mutex_lock(&tp->control);
1200 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1202 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1203 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1204 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1206 mutex_unlock(&tp->control);
1208 usb_autopm_put_interface(tp->intf);
1213 /* Devices containing proper chips can support a persistent
1214 * host system provided MAC address.
1215 * Examples of this are Dell TB15 and Dell WD15 docks
1217 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1220 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1221 union acpi_object *obj;
1224 unsigned char buf[6];
1226 /* test for -AD variant of RTL8153 */
1227 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1228 if ((ocp_data & AD_MASK) == 0x1000) {
1229 /* test for MAC address pass-through bit */
1230 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1231 if ((ocp_data & PASS_THRU_MASK) != 1) {
1232 netif_dbg(tp, probe, tp->netdev,
1233 "No efuse for RTL8153-AD MAC pass through\n");
1237 /* test for RTL8153-BND and RTL8153-BD */
1238 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_MISC_1);
1239 if ((ocp_data & BND_MASK) == 0 && (ocp_data & BD_MASK) == 0) {
1240 netif_dbg(tp, probe, tp->netdev,
1241 "Invalid variant for MAC pass through\n");
1246 /* returns _AUXMAC_#AABBCCDDEEFF# */
1247 status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1248 obj = (union acpi_object *)buffer.pointer;
1249 if (!ACPI_SUCCESS(status))
1251 if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1252 netif_warn(tp, probe, tp->netdev,
1253 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1254 obj->type, obj->string.length);
1257 if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1258 strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1259 netif_warn(tp, probe, tp->netdev,
1260 "Invalid header when reading pass-thru MAC addr\n");
1263 ret = hex2bin(buf, obj->string.pointer + 9, 6);
1264 if (!(ret == 0 && is_valid_ether_addr(buf))) {
1265 netif_warn(tp, probe, tp->netdev,
1266 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1271 memcpy(sa->sa_data, buf, 6);
1272 netif_info(tp, probe, tp->netdev,
1273 "Using pass-thru MAC addr %pM\n", sa->sa_data);
1280 static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa)
1282 struct net_device *dev = tp->netdev;
1285 sa->sa_family = dev->type;
1287 if (tp->version == RTL_VER_01) {
1288 ret = pla_ocp_read(tp, PLA_IDR, 8, sa->sa_data);
1290 /* if device doesn't support MAC pass through this will
1291 * be expected to be non-zero
1293 ret = vendor_mac_passthru_addr_read(tp, sa);
1295 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa->sa_data);
1299 netif_err(tp, probe, dev, "Get ether addr fail\n");
1300 } else if (!is_valid_ether_addr(sa->sa_data)) {
1301 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1303 eth_hw_addr_random(dev);
1304 ether_addr_copy(sa->sa_data, dev->dev_addr);
1305 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1313 static int set_ethernet_addr(struct r8152 *tp)
1315 struct net_device *dev = tp->netdev;
1319 ret = determine_ethernet_addr(tp, &sa);
1323 if (tp->version == RTL_VER_01)
1324 ether_addr_copy(dev->dev_addr, sa.sa_data);
1326 ret = rtl8152_set_mac_address(dev, &sa);
1331 static void read_bulk_callback(struct urb *urb)
1333 struct net_device *netdev;
1334 int status = urb->status;
1337 unsigned long flags;
1347 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1350 if (!test_bit(WORK_ENABLE, &tp->flags))
1353 netdev = tp->netdev;
1355 /* When link down, the driver would cancel all bulks. */
1356 /* This avoid the re-submitting bulk */
1357 if (!netif_carrier_ok(netdev))
1360 usb_mark_last_busy(tp->udev);
1364 if (urb->actual_length < ETH_ZLEN)
1367 spin_lock_irqsave(&tp->rx_lock, flags);
1368 list_add_tail(&agg->list, &tp->rx_done);
1369 spin_unlock_irqrestore(&tp->rx_lock, flags);
1370 napi_schedule(&tp->napi);
1374 netif_device_detach(tp->netdev);
1377 return; /* the urb is in unlink state */
1379 if (net_ratelimit())
1380 netdev_warn(netdev, "maybe reset is needed?\n");
1383 if (net_ratelimit())
1384 netdev_warn(netdev, "Rx status %d\n", status);
1388 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1391 static void write_bulk_callback(struct urb *urb)
1393 struct net_device_stats *stats;
1394 struct net_device *netdev;
1397 unsigned long flags;
1398 int status = urb->status;
1408 netdev = tp->netdev;
1409 stats = &netdev->stats;
1411 if (net_ratelimit())
1412 netdev_warn(netdev, "Tx status %d\n", status);
1413 stats->tx_errors += agg->skb_num;
1415 stats->tx_packets += agg->skb_num;
1416 stats->tx_bytes += agg->skb_len;
1419 spin_lock_irqsave(&tp->tx_lock, flags);
1420 list_add_tail(&agg->list, &tp->tx_free);
1421 spin_unlock_irqrestore(&tp->tx_lock, flags);
1423 usb_autopm_put_interface_async(tp->intf);
1425 if (!netif_carrier_ok(netdev))
1428 if (!test_bit(WORK_ENABLE, &tp->flags))
1431 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1434 if (!skb_queue_empty(&tp->tx_queue))
1435 tasklet_schedule(&tp->tx_tl);
1438 static void intr_callback(struct urb *urb)
1442 int status = urb->status;
1449 if (!test_bit(WORK_ENABLE, &tp->flags))
1452 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1456 case 0: /* success */
1458 case -ECONNRESET: /* unlink */
1460 netif_device_detach(tp->netdev);
1464 netif_info(tp, intr, tp->netdev,
1465 "Stop submitting intr, status %d\n", status);
1468 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1470 /* -EPIPE: should clear the halt */
1472 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1476 d = urb->transfer_buffer;
1477 if (INTR_LINK & __le16_to_cpu(d[0])) {
1478 if (!netif_carrier_ok(tp->netdev)) {
1479 set_bit(RTL8152_LINK_CHG, &tp->flags);
1480 schedule_delayed_work(&tp->schedule, 0);
1483 if (netif_carrier_ok(tp->netdev)) {
1484 netif_stop_queue(tp->netdev);
1485 set_bit(RTL8152_LINK_CHG, &tp->flags);
1486 schedule_delayed_work(&tp->schedule, 0);
1491 res = usb_submit_urb(urb, GFP_ATOMIC);
1492 if (res == -ENODEV) {
1494 netif_device_detach(tp->netdev);
1496 netif_err(tp, intr, tp->netdev,
1497 "can't resubmit intr, status %d\n", res);
1501 static inline void *rx_agg_align(void *data)
1503 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1506 static inline void *tx_agg_align(void *data)
1508 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1511 static void free_rx_agg(struct r8152 *tp, struct rx_agg *agg)
1513 list_del(&agg->info_list);
1515 usb_free_urb(agg->urb);
1516 put_page(agg->page);
1519 atomic_dec(&tp->rx_count);
1522 static struct rx_agg *alloc_rx_agg(struct r8152 *tp, gfp_t mflags)
1524 struct net_device *netdev = tp->netdev;
1525 int node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1526 unsigned int order = get_order(tp->rx_buf_sz);
1527 struct rx_agg *rx_agg;
1528 unsigned long flags;
1530 rx_agg = kmalloc_node(sizeof(*rx_agg), mflags, node);
1534 rx_agg->page = alloc_pages(mflags | __GFP_COMP, order);
1538 rx_agg->buffer = page_address(rx_agg->page);
1540 rx_agg->urb = usb_alloc_urb(0, mflags);
1544 rx_agg->context = tp;
1546 INIT_LIST_HEAD(&rx_agg->list);
1547 INIT_LIST_HEAD(&rx_agg->info_list);
1548 spin_lock_irqsave(&tp->rx_lock, flags);
1549 list_add_tail(&rx_agg->info_list, &tp->rx_info);
1550 spin_unlock_irqrestore(&tp->rx_lock, flags);
1552 atomic_inc(&tp->rx_count);
1557 __free_pages(rx_agg->page, order);
1563 static void free_all_mem(struct r8152 *tp)
1565 struct rx_agg *agg, *agg_next;
1566 unsigned long flags;
1569 spin_lock_irqsave(&tp->rx_lock, flags);
1571 list_for_each_entry_safe(agg, agg_next, &tp->rx_info, info_list)
1572 free_rx_agg(tp, agg);
1574 spin_unlock_irqrestore(&tp->rx_lock, flags);
1576 WARN_ON(atomic_read(&tp->rx_count));
1578 for (i = 0; i < RTL8152_MAX_TX; i++) {
1579 usb_free_urb(tp->tx_info[i].urb);
1580 tp->tx_info[i].urb = NULL;
1582 kfree(tp->tx_info[i].buffer);
1583 tp->tx_info[i].buffer = NULL;
1584 tp->tx_info[i].head = NULL;
1587 usb_free_urb(tp->intr_urb);
1588 tp->intr_urb = NULL;
1590 kfree(tp->intr_buff);
1591 tp->intr_buff = NULL;
1594 static int alloc_all_mem(struct r8152 *tp)
1596 struct net_device *netdev = tp->netdev;
1597 struct usb_interface *intf = tp->intf;
1598 struct usb_host_interface *alt = intf->cur_altsetting;
1599 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1602 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1604 spin_lock_init(&tp->rx_lock);
1605 spin_lock_init(&tp->tx_lock);
1606 INIT_LIST_HEAD(&tp->rx_info);
1607 INIT_LIST_HEAD(&tp->tx_free);
1608 INIT_LIST_HEAD(&tp->rx_done);
1609 skb_queue_head_init(&tp->tx_queue);
1610 skb_queue_head_init(&tp->rx_queue);
1611 atomic_set(&tp->rx_count, 0);
1613 for (i = 0; i < RTL8152_MAX_RX; i++) {
1614 if (!alloc_rx_agg(tp, GFP_KERNEL))
1618 for (i = 0; i < RTL8152_MAX_TX; i++) {
1622 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1626 if (buf != tx_agg_align(buf)) {
1628 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1634 urb = usb_alloc_urb(0, GFP_KERNEL);
1640 INIT_LIST_HEAD(&tp->tx_info[i].list);
1641 tp->tx_info[i].context = tp;
1642 tp->tx_info[i].urb = urb;
1643 tp->tx_info[i].buffer = buf;
1644 tp->tx_info[i].head = tx_agg_align(buf);
1646 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1649 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1653 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1657 tp->intr_interval = (int)ep_intr->desc.bInterval;
1658 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1659 tp->intr_buff, INTBUFSIZE, intr_callback,
1660 tp, tp->intr_interval);
1669 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1671 struct tx_agg *agg = NULL;
1672 unsigned long flags;
1674 if (list_empty(&tp->tx_free))
1677 spin_lock_irqsave(&tp->tx_lock, flags);
1678 if (!list_empty(&tp->tx_free)) {
1679 struct list_head *cursor;
1681 cursor = tp->tx_free.next;
1682 list_del_init(cursor);
1683 agg = list_entry(cursor, struct tx_agg, list);
1685 spin_unlock_irqrestore(&tp->tx_lock, flags);
1690 /* r8152_csum_workaround()
1691 * The hw limites the value the transport offset. When the offset is out of the
1692 * range, calculate the checksum by sw.
1694 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1695 struct sk_buff_head *list)
1697 if (skb_shinfo(skb)->gso_size) {
1698 netdev_features_t features = tp->netdev->features;
1699 struct sk_buff_head seg_list;
1700 struct sk_buff *segs, *nskb;
1702 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1703 segs = skb_gso_segment(skb, features);
1704 if (IS_ERR(segs) || !segs)
1707 __skb_queue_head_init(&seg_list);
1713 __skb_queue_tail(&seg_list, nskb);
1716 skb_queue_splice(&seg_list, list);
1718 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1719 if (skb_checksum_help(skb) < 0)
1722 __skb_queue_head(list, skb);
1724 struct net_device_stats *stats;
1727 stats = &tp->netdev->stats;
1728 stats->tx_dropped++;
1733 /* msdn_giant_send_check()
1734 * According to the document of microsoft, the TCP Pseudo Header excludes the
1735 * packet length for IPv6 TCP large packets.
1737 static int msdn_giant_send_check(struct sk_buff *skb)
1739 const struct ipv6hdr *ipv6h;
1743 ret = skb_cow_head(skb, 0);
1747 ipv6h = ipv6_hdr(skb);
1751 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1756 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1758 if (skb_vlan_tag_present(skb)) {
1761 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1762 desc->opts2 |= cpu_to_le32(opts2);
1766 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1768 u32 opts2 = le32_to_cpu(desc->opts2);
1770 if (opts2 & RX_VLAN_TAG)
1771 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1772 swab16(opts2 & 0xffff));
1775 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1776 struct sk_buff *skb, u32 len, u32 transport_offset)
1778 u32 mss = skb_shinfo(skb)->gso_size;
1779 u32 opts1, opts2 = 0;
1780 int ret = TX_CSUM_SUCCESS;
1782 WARN_ON_ONCE(len > TX_LEN_MAX);
1784 opts1 = len | TX_FS | TX_LS;
1787 if (transport_offset > GTTCPHO_MAX) {
1788 netif_warn(tp, tx_err, tp->netdev,
1789 "Invalid transport offset 0x%x for TSO\n",
1795 switch (vlan_get_protocol(skb)) {
1796 case htons(ETH_P_IP):
1800 case htons(ETH_P_IPV6):
1801 if (msdn_giant_send_check(skb)) {
1813 opts1 |= transport_offset << GTTCPHO_SHIFT;
1814 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1815 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1818 if (transport_offset > TCPHO_MAX) {
1819 netif_warn(tp, tx_err, tp->netdev,
1820 "Invalid transport offset 0x%x\n",
1826 switch (vlan_get_protocol(skb)) {
1827 case htons(ETH_P_IP):
1829 ip_protocol = ip_hdr(skb)->protocol;
1832 case htons(ETH_P_IPV6):
1834 ip_protocol = ipv6_hdr(skb)->nexthdr;
1838 ip_protocol = IPPROTO_RAW;
1842 if (ip_protocol == IPPROTO_TCP)
1844 else if (ip_protocol == IPPROTO_UDP)
1849 opts2 |= transport_offset << TCPHO_SHIFT;
1852 desc->opts2 = cpu_to_le32(opts2);
1853 desc->opts1 = cpu_to_le32(opts1);
1859 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1861 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1865 __skb_queue_head_init(&skb_head);
1866 spin_lock(&tx_queue->lock);
1867 skb_queue_splice_init(tx_queue, &skb_head);
1868 spin_unlock(&tx_queue->lock);
1870 tx_data = agg->head;
1873 remain = agg_buf_sz;
1875 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1876 struct tx_desc *tx_desc;
1877 struct sk_buff *skb;
1881 skb = __skb_dequeue(&skb_head);
1885 len = skb->len + sizeof(*tx_desc);
1888 __skb_queue_head(&skb_head, skb);
1892 tx_data = tx_agg_align(tx_data);
1893 tx_desc = (struct tx_desc *)tx_data;
1895 offset = (u32)skb_transport_offset(skb);
1897 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1898 r8152_csum_workaround(tp, skb, &skb_head);
1902 rtl_tx_vlan_tag(tx_desc, skb);
1904 tx_data += sizeof(*tx_desc);
1907 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1908 struct net_device_stats *stats = &tp->netdev->stats;
1910 stats->tx_dropped++;
1911 dev_kfree_skb_any(skb);
1912 tx_data -= sizeof(*tx_desc);
1917 agg->skb_len += len;
1918 agg->skb_num += skb_shinfo(skb)->gso_segs ?: 1;
1920 dev_kfree_skb_any(skb);
1922 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1924 if (test_bit(DELL_TB_RX_AGG_BUG, &tp->flags))
1928 if (!skb_queue_empty(&skb_head)) {
1929 spin_lock(&tx_queue->lock);
1930 skb_queue_splice(&skb_head, tx_queue);
1931 spin_unlock(&tx_queue->lock);
1934 netif_tx_lock(tp->netdev);
1936 if (netif_queue_stopped(tp->netdev) &&
1937 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1938 netif_wake_queue(tp->netdev);
1940 netif_tx_unlock(tp->netdev);
1942 ret = usb_autopm_get_interface_async(tp->intf);
1946 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1947 agg->head, (int)(tx_data - (u8 *)agg->head),
1948 (usb_complete_t)write_bulk_callback, agg);
1950 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1952 usb_autopm_put_interface_async(tp->intf);
1958 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1960 u8 checksum = CHECKSUM_NONE;
1963 if (!(tp->netdev->features & NETIF_F_RXCSUM))
1966 opts2 = le32_to_cpu(rx_desc->opts2);
1967 opts3 = le32_to_cpu(rx_desc->opts3);
1969 if (opts2 & RD_IPV4_CS) {
1971 checksum = CHECKSUM_NONE;
1972 else if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1973 checksum = CHECKSUM_UNNECESSARY;
1974 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1975 checksum = CHECKSUM_UNNECESSARY;
1976 } else if (opts2 & RD_IPV6_CS) {
1977 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1978 checksum = CHECKSUM_UNNECESSARY;
1979 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1980 checksum = CHECKSUM_UNNECESSARY;
1987 static inline bool rx_count_exceed(struct r8152 *tp)
1989 return atomic_read(&tp->rx_count) > RTL8152_MAX_RX;
1992 static inline int agg_offset(struct rx_agg *agg, void *addr)
1994 return (int)(addr - agg->buffer);
1997 static struct rx_agg *rtl_get_free_rx(struct r8152 *tp, gfp_t mflags)
1999 struct rx_agg *agg, *agg_next, *agg_free = NULL;
2000 unsigned long flags;
2002 spin_lock_irqsave(&tp->rx_lock, flags);
2004 list_for_each_entry_safe(agg, agg_next, &tp->rx_used, list) {
2005 if (page_count(agg->page) == 1) {
2007 list_del_init(&agg->list);
2011 if (rx_count_exceed(tp)) {
2012 list_del_init(&agg->list);
2013 free_rx_agg(tp, agg);
2019 spin_unlock_irqrestore(&tp->rx_lock, flags);
2021 if (!agg_free && atomic_read(&tp->rx_count) < tp->rx_pending)
2022 agg_free = alloc_rx_agg(tp, mflags);
2027 static int rx_bottom(struct r8152 *tp, int budget)
2029 unsigned long flags;
2030 struct list_head *cursor, *next, rx_queue;
2031 int ret = 0, work_done = 0;
2032 struct napi_struct *napi = &tp->napi;
2034 if (!skb_queue_empty(&tp->rx_queue)) {
2035 while (work_done < budget) {
2036 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
2037 struct net_device *netdev = tp->netdev;
2038 struct net_device_stats *stats = &netdev->stats;
2039 unsigned int pkt_len;
2045 napi_gro_receive(napi, skb);
2047 stats->rx_packets++;
2048 stats->rx_bytes += pkt_len;
2052 if (list_empty(&tp->rx_done))
2055 INIT_LIST_HEAD(&rx_queue);
2056 spin_lock_irqsave(&tp->rx_lock, flags);
2057 list_splice_init(&tp->rx_done, &rx_queue);
2058 spin_unlock_irqrestore(&tp->rx_lock, flags);
2060 list_for_each_safe(cursor, next, &rx_queue) {
2061 struct rx_desc *rx_desc;
2062 struct rx_agg *agg, *agg_free;
2067 list_del_init(cursor);
2069 agg = list_entry(cursor, struct rx_agg, list);
2071 if (urb->actual_length < ETH_ZLEN)
2074 agg_free = rtl_get_free_rx(tp, GFP_ATOMIC);
2076 rx_desc = agg->buffer;
2077 rx_data = agg->buffer;
2078 len_used += sizeof(struct rx_desc);
2080 while (urb->actual_length > len_used) {
2081 struct net_device *netdev = tp->netdev;
2082 struct net_device_stats *stats = &netdev->stats;
2083 unsigned int pkt_len, rx_frag_head_sz;
2084 struct sk_buff *skb;
2086 /* limite the skb numbers for rx_queue */
2087 if (unlikely(skb_queue_len(&tp->rx_queue) >= 1000))
2090 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
2091 if (pkt_len < ETH_ZLEN)
2094 len_used += pkt_len;
2095 if (urb->actual_length < len_used)
2098 pkt_len -= ETH_FCS_LEN;
2099 rx_data += sizeof(struct rx_desc);
2101 if (!agg_free || tp->rx_copybreak > pkt_len)
2102 rx_frag_head_sz = pkt_len;
2104 rx_frag_head_sz = tp->rx_copybreak;
2106 skb = napi_alloc_skb(napi, rx_frag_head_sz);
2108 stats->rx_dropped++;
2112 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
2113 memcpy(skb->data, rx_data, rx_frag_head_sz);
2114 skb_put(skb, rx_frag_head_sz);
2115 pkt_len -= rx_frag_head_sz;
2116 rx_data += rx_frag_head_sz;
2118 skb_add_rx_frag(skb, 0, agg->page,
2119 agg_offset(agg, rx_data),
2121 SKB_DATA_ALIGN(pkt_len));
2122 get_page(agg->page);
2125 skb->protocol = eth_type_trans(skb, netdev);
2126 rtl_rx_vlan_tag(rx_desc, skb);
2127 if (work_done < budget) {
2129 stats->rx_packets++;
2130 stats->rx_bytes += skb->len;
2131 napi_gro_receive(napi, skb);
2133 __skb_queue_tail(&tp->rx_queue, skb);
2137 rx_data = rx_agg_align(rx_data + pkt_len + ETH_FCS_LEN);
2138 rx_desc = (struct rx_desc *)rx_data;
2139 len_used = agg_offset(agg, rx_data);
2140 len_used += sizeof(struct rx_desc);
2143 WARN_ON(!agg_free && page_count(agg->page) > 1);
2146 spin_lock_irqsave(&tp->rx_lock, flags);
2147 if (page_count(agg->page) == 1) {
2148 list_add(&agg_free->list, &tp->rx_used);
2150 list_add_tail(&agg->list, &tp->rx_used);
2154 spin_unlock_irqrestore(&tp->rx_lock, flags);
2159 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
2161 urb->actual_length = 0;
2162 list_add_tail(&agg->list, next);
2166 if (!list_empty(&rx_queue)) {
2167 spin_lock_irqsave(&tp->rx_lock, flags);
2168 list_splice_tail(&rx_queue, &tp->rx_done);
2169 spin_unlock_irqrestore(&tp->rx_lock, flags);
2176 static void tx_bottom(struct r8152 *tp)
2183 if (skb_queue_empty(&tp->tx_queue))
2186 agg = r8152_get_tx_agg(tp);
2190 res = r8152_tx_agg_fill(tp, agg);
2192 struct net_device *netdev = tp->netdev;
2194 if (res == -ENODEV) {
2196 netif_device_detach(netdev);
2198 struct net_device_stats *stats = &netdev->stats;
2199 unsigned long flags;
2201 netif_warn(tp, tx_err, netdev,
2202 "failed tx_urb %d\n", res);
2203 stats->tx_dropped += agg->skb_num;
2205 spin_lock_irqsave(&tp->tx_lock, flags);
2206 list_add_tail(&agg->list, &tp->tx_free);
2207 spin_unlock_irqrestore(&tp->tx_lock, flags);
2213 static void bottom_half(unsigned long data)
2217 tp = (struct r8152 *)data;
2219 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2222 if (!test_bit(WORK_ENABLE, &tp->flags))
2225 /* When link down, the driver would cancel all bulks. */
2226 /* This avoid the re-submitting bulk */
2227 if (!netif_carrier_ok(tp->netdev))
2230 clear_bit(SCHEDULE_TASKLET, &tp->flags);
2235 static int r8152_poll(struct napi_struct *napi, int budget)
2237 struct r8152 *tp = container_of(napi, struct r8152, napi);
2240 work_done = rx_bottom(tp, budget);
2242 if (work_done < budget) {
2243 if (!napi_complete_done(napi, work_done))
2245 if (!list_empty(&tp->rx_done))
2246 napi_schedule(napi);
2254 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
2258 /* The rx would be stopped, so skip submitting */
2259 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
2260 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
2263 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
2264 agg->buffer, tp->rx_buf_sz,
2265 (usb_complete_t)read_bulk_callback, agg);
2267 ret = usb_submit_urb(agg->urb, mem_flags);
2268 if (ret == -ENODEV) {
2270 netif_device_detach(tp->netdev);
2272 struct urb *urb = agg->urb;
2273 unsigned long flags;
2275 urb->actual_length = 0;
2276 spin_lock_irqsave(&tp->rx_lock, flags);
2277 list_add_tail(&agg->list, &tp->rx_done);
2278 spin_unlock_irqrestore(&tp->rx_lock, flags);
2280 netif_err(tp, rx_err, tp->netdev,
2281 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
2283 napi_schedule(&tp->napi);
2289 static void rtl_drop_queued_tx(struct r8152 *tp)
2291 struct net_device_stats *stats = &tp->netdev->stats;
2292 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
2293 struct sk_buff *skb;
2295 if (skb_queue_empty(tx_queue))
2298 __skb_queue_head_init(&skb_head);
2299 spin_lock_bh(&tx_queue->lock);
2300 skb_queue_splice_init(tx_queue, &skb_head);
2301 spin_unlock_bh(&tx_queue->lock);
2303 while ((skb = __skb_dequeue(&skb_head))) {
2305 stats->tx_dropped++;
2309 static void rtl8152_tx_timeout(struct net_device *netdev)
2311 struct r8152 *tp = netdev_priv(netdev);
2313 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2315 usb_queue_reset_device(tp->intf);
2318 static void rtl8152_set_rx_mode(struct net_device *netdev)
2320 struct r8152 *tp = netdev_priv(netdev);
2322 if (netif_carrier_ok(netdev)) {
2323 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2324 schedule_delayed_work(&tp->schedule, 0);
2328 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2330 struct r8152 *tp = netdev_priv(netdev);
2331 u32 mc_filter[2]; /* Multicast hash filter */
2335 netif_stop_queue(netdev);
2336 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2337 ocp_data &= ~RCR_ACPT_ALL;
2338 ocp_data |= RCR_AB | RCR_APM;
2340 if (netdev->flags & IFF_PROMISC) {
2341 /* Unconditionally log net taps. */
2342 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2343 ocp_data |= RCR_AM | RCR_AAP;
2344 mc_filter[1] = 0xffffffff;
2345 mc_filter[0] = 0xffffffff;
2346 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2347 (netdev->flags & IFF_ALLMULTI)) {
2348 /* Too many to filter perfectly -- accept all multicasts. */
2350 mc_filter[1] = 0xffffffff;
2351 mc_filter[0] = 0xffffffff;
2353 struct netdev_hw_addr *ha;
2357 netdev_for_each_mc_addr(ha, netdev) {
2358 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2360 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2365 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2366 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2368 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2369 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2370 netif_wake_queue(netdev);
2373 static netdev_features_t
2374 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2375 netdev_features_t features)
2377 u32 mss = skb_shinfo(skb)->gso_size;
2378 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2379 int offset = skb_transport_offset(skb);
2381 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2382 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2383 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2384 features &= ~NETIF_F_GSO_MASK;
2389 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2390 struct net_device *netdev)
2392 struct r8152 *tp = netdev_priv(netdev);
2394 skb_tx_timestamp(skb);
2396 skb_queue_tail(&tp->tx_queue, skb);
2398 if (!list_empty(&tp->tx_free)) {
2399 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2400 set_bit(SCHEDULE_TASKLET, &tp->flags);
2401 schedule_delayed_work(&tp->schedule, 0);
2403 usb_mark_last_busy(tp->udev);
2404 tasklet_schedule(&tp->tx_tl);
2406 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2407 netif_stop_queue(netdev);
2410 return NETDEV_TX_OK;
2413 static void r8152b_reset_packet_filter(struct r8152 *tp)
2417 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2418 ocp_data &= ~FMC_FCR_MCU_EN;
2419 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2420 ocp_data |= FMC_FCR_MCU_EN;
2421 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2424 static void rtl8152_nic_reset(struct r8152 *tp)
2428 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2430 for (i = 0; i < 1000; i++) {
2431 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2433 usleep_range(100, 400);
2437 static void set_tx_qlen(struct r8152 *tp)
2439 struct net_device *netdev = tp->netdev;
2441 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN +
2442 sizeof(struct tx_desc));
2445 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2447 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2450 static void rtl_set_eee_plus(struct r8152 *tp)
2455 speed = rtl8152_get_speed(tp);
2456 if (speed & _10bps) {
2457 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2458 ocp_data |= EEEP_CR_EEEP_TX;
2459 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2461 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2462 ocp_data &= ~EEEP_CR_EEEP_TX;
2463 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2467 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2471 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2473 ocp_data |= RXDY_GATED_EN;
2475 ocp_data &= ~RXDY_GATED_EN;
2476 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2479 static int rtl_start_rx(struct r8152 *tp)
2481 struct rx_agg *agg, *agg_next;
2482 struct list_head tmp_list;
2483 unsigned long flags;
2486 INIT_LIST_HEAD(&tmp_list);
2488 spin_lock_irqsave(&tp->rx_lock, flags);
2490 INIT_LIST_HEAD(&tp->rx_done);
2491 INIT_LIST_HEAD(&tp->rx_used);
2493 list_splice_init(&tp->rx_info, &tmp_list);
2495 spin_unlock_irqrestore(&tp->rx_lock, flags);
2497 list_for_each_entry_safe(agg, agg_next, &tmp_list, info_list) {
2498 INIT_LIST_HEAD(&agg->list);
2500 /* Only RTL8152_MAX_RX rx_agg need to be submitted. */
2501 if (++i > RTL8152_MAX_RX) {
2502 spin_lock_irqsave(&tp->rx_lock, flags);
2503 list_add_tail(&agg->list, &tp->rx_used);
2504 spin_unlock_irqrestore(&tp->rx_lock, flags);
2505 } else if (unlikely(ret < 0)) {
2506 spin_lock_irqsave(&tp->rx_lock, flags);
2507 list_add_tail(&agg->list, &tp->rx_done);
2508 spin_unlock_irqrestore(&tp->rx_lock, flags);
2510 ret = r8152_submit_rx(tp, agg, GFP_KERNEL);
2514 spin_lock_irqsave(&tp->rx_lock, flags);
2515 WARN_ON(!list_empty(&tp->rx_info));
2516 list_splice(&tmp_list, &tp->rx_info);
2517 spin_unlock_irqrestore(&tp->rx_lock, flags);
2522 static int rtl_stop_rx(struct r8152 *tp)
2524 struct rx_agg *agg, *agg_next;
2525 struct list_head tmp_list;
2526 unsigned long flags;
2528 INIT_LIST_HEAD(&tmp_list);
2530 /* The usb_kill_urb() couldn't be used in atomic.
2531 * Therefore, move the list of rx_info to a tmp one.
2532 * Then, list_for_each_entry_safe could be used without
2536 spin_lock_irqsave(&tp->rx_lock, flags);
2537 list_splice_init(&tp->rx_info, &tmp_list);
2538 spin_unlock_irqrestore(&tp->rx_lock, flags);
2540 list_for_each_entry_safe(agg, agg_next, &tmp_list, info_list) {
2541 /* At least RTL8152_MAX_RX rx_agg have the page_count being
2542 * equal to 1, so the other ones could be freed safely.
2544 if (page_count(agg->page) > 1)
2545 free_rx_agg(tp, agg);
2547 usb_kill_urb(agg->urb);
2550 /* Move back the list of temp to the rx_info */
2551 spin_lock_irqsave(&tp->rx_lock, flags);
2552 WARN_ON(!list_empty(&tp->rx_info));
2553 list_splice(&tmp_list, &tp->rx_info);
2554 spin_unlock_irqrestore(&tp->rx_lock, flags);
2556 while (!skb_queue_empty(&tp->rx_queue))
2557 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2562 static inline void r8153b_rx_agg_chg_indicate(struct r8152 *tp)
2564 ocp_write_byte(tp, MCU_TYPE_USB, USB_UPT_RXDMA_OWN,
2565 OWN_UPDATE | OWN_CLEAR);
2568 static int rtl_enable(struct r8152 *tp)
2572 r8152b_reset_packet_filter(tp);
2574 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2575 ocp_data |= CR_RE | CR_TE;
2576 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2578 switch (tp->version) {
2581 r8153b_rx_agg_chg_indicate(tp);
2587 rxdy_gated_en(tp, false);
2592 static int rtl8152_enable(struct r8152 *tp)
2594 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2598 rtl_set_eee_plus(tp);
2600 return rtl_enable(tp);
2603 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2605 u32 ocp_data = tp->coalesce / 8;
2607 switch (tp->version) {
2612 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
2618 /* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout
2619 * primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 128ns.
2621 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
2623 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EXTRA_AGGR_TMR,
2632 static void r8153_set_rx_early_size(struct r8152 *tp)
2634 u32 ocp_data = tp->rx_buf_sz - rx_reserved_size(tp->netdev->mtu);
2636 switch (tp->version) {
2641 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE,
2646 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE,
2655 static int rtl8153_enable(struct r8152 *tp)
2657 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2661 rtl_set_eee_plus(tp);
2662 r8153_set_rx_early_timeout(tp);
2663 r8153_set_rx_early_size(tp);
2665 return rtl_enable(tp);
2668 static void rtl_disable(struct r8152 *tp)
2673 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2674 rtl_drop_queued_tx(tp);
2678 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2679 ocp_data &= ~RCR_ACPT_ALL;
2680 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2682 rtl_drop_queued_tx(tp);
2684 for (i = 0; i < RTL8152_MAX_TX; i++)
2685 usb_kill_urb(tp->tx_info[i].urb);
2687 rxdy_gated_en(tp, true);
2689 for (i = 0; i < 1000; i++) {
2690 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2691 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2693 usleep_range(1000, 2000);
2696 for (i = 0; i < 1000; i++) {
2697 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2699 usleep_range(1000, 2000);
2704 rtl8152_nic_reset(tp);
2707 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2711 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2713 ocp_data |= POWER_CUT;
2715 ocp_data &= ~POWER_CUT;
2716 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2718 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2719 ocp_data &= ~RESUME_INDICATE;
2720 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2723 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2727 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2729 ocp_data |= CPCR_RX_VLAN;
2731 ocp_data &= ~CPCR_RX_VLAN;
2732 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2735 static int rtl8152_set_features(struct net_device *dev,
2736 netdev_features_t features)
2738 netdev_features_t changed = features ^ dev->features;
2739 struct r8152 *tp = netdev_priv(dev);
2742 ret = usb_autopm_get_interface(tp->intf);
2746 mutex_lock(&tp->control);
2748 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2749 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2750 rtl_rx_vlan_en(tp, true);
2752 rtl_rx_vlan_en(tp, false);
2755 mutex_unlock(&tp->control);
2757 usb_autopm_put_interface(tp->intf);
2763 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2765 static u32 __rtl_get_wol(struct r8152 *tp)
2770 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2771 if (ocp_data & LINK_ON_WAKE_EN)
2772 wolopts |= WAKE_PHY;
2774 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2775 if (ocp_data & UWF_EN)
2776 wolopts |= WAKE_UCAST;
2777 if (ocp_data & BWF_EN)
2778 wolopts |= WAKE_BCAST;
2779 if (ocp_data & MWF_EN)
2780 wolopts |= WAKE_MCAST;
2782 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2783 if (ocp_data & MAGIC_EN)
2784 wolopts |= WAKE_MAGIC;
2789 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2793 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2795 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2796 ocp_data &= ~LINK_ON_WAKE_EN;
2797 if (wolopts & WAKE_PHY)
2798 ocp_data |= LINK_ON_WAKE_EN;
2799 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2801 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2802 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2803 if (wolopts & WAKE_UCAST)
2805 if (wolopts & WAKE_BCAST)
2807 if (wolopts & WAKE_MCAST)
2809 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2811 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2813 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2814 ocp_data &= ~MAGIC_EN;
2815 if (wolopts & WAKE_MAGIC)
2816 ocp_data |= MAGIC_EN;
2817 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2819 if (wolopts & WAKE_ANY)
2820 device_set_wakeup_enable(&tp->udev->dev, true);
2822 device_set_wakeup_enable(&tp->udev->dev, false);
2825 static void r8153_mac_clk_spd(struct r8152 *tp, bool enable)
2827 /* MAC clock speed down */
2829 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL,
2831 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2,
2833 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
2834 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
2835 U1U2_SPDWN_EN | L1_SPDWN_EN);
2836 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
2837 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
2838 TP100_SPDWN_EN | TP500_SPDWN_EN | EEE_SPDWN_EN |
2841 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
2842 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
2843 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
2844 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
2848 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2853 memset(u1u2, 0xff, sizeof(u1u2));
2855 memset(u1u2, 0x00, sizeof(u1u2));
2857 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2860 static void r8153b_u1u2en(struct r8152 *tp, bool enable)
2864 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG);
2866 ocp_data |= LPM_U1U2_EN;
2868 ocp_data &= ~LPM_U1U2_EN;
2870 ocp_write_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG, ocp_data);
2873 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2877 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2879 ocp_data |= U2P3_ENABLE;
2881 ocp_data &= ~U2P3_ENABLE;
2882 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2885 static void r8153b_ups_flags(struct r8152 *tp)
2889 if (tp->ups_info.green)
2890 ups_flags |= UPS_FLAGS_EN_GREEN;
2892 if (tp->ups_info.aldps)
2893 ups_flags |= UPS_FLAGS_EN_ALDPS;
2895 if (tp->ups_info.eee)
2896 ups_flags |= UPS_FLAGS_EN_EEE;
2898 if (tp->ups_info.flow_control)
2899 ups_flags |= UPS_FLAGS_EN_FLOW_CTR;
2901 if (tp->ups_info.eee_ckdiv)
2902 ups_flags |= UPS_FLAGS_EN_EEE_CKDIV;
2904 if (tp->ups_info.eee_cmod_lv)
2905 ups_flags |= UPS_FLAGS_EEE_CMOD_LV_EN;
2907 if (tp->ups_info._10m_ckdiv)
2908 ups_flags |= UPS_FLAGS_EN_10M_CKDIV;
2910 if (tp->ups_info.eee_plloff_100)
2911 ups_flags |= UPS_FLAGS_EEE_PLLOFF_100;
2913 if (tp->ups_info.eee_plloff_giga)
2914 ups_flags |= UPS_FLAGS_EEE_PLLOFF_GIGA;
2916 if (tp->ups_info._250m_ckdiv)
2917 ups_flags |= UPS_FLAGS_250M_CKDIV;
2919 if (tp->ups_info.ctap_short_off)
2920 ups_flags |= UPS_FLAGS_CTAP_SHORT_DIS;
2922 switch (tp->ups_info.speed_duplex) {
2924 ups_flags |= ups_flags_speed(1);
2927 ups_flags |= ups_flags_speed(2);
2929 case NWAY_100M_HALF:
2930 ups_flags |= ups_flags_speed(3);
2932 case NWAY_100M_FULL:
2933 ups_flags |= ups_flags_speed(4);
2935 case NWAY_1000M_FULL:
2936 ups_flags |= ups_flags_speed(5);
2938 case FORCE_10M_HALF:
2939 ups_flags |= ups_flags_speed(6);
2941 case FORCE_10M_FULL:
2942 ups_flags |= ups_flags_speed(7);
2944 case FORCE_100M_HALF:
2945 ups_flags |= ups_flags_speed(8);
2947 case FORCE_100M_FULL:
2948 ups_flags |= ups_flags_speed(9);
2954 ocp_write_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS, ups_flags);
2957 static void r8153b_green_en(struct r8152 *tp, bool enable)
2962 sram_write(tp, 0x8045, 0); /* 10M abiq&ldvbias */
2963 sram_write(tp, 0x804d, 0x1222); /* 100M short abiq&ldvbias */
2964 sram_write(tp, 0x805d, 0x0022); /* 1000M short abiq&ldvbias */
2966 sram_write(tp, 0x8045, 0x2444); /* 10M abiq&ldvbias */
2967 sram_write(tp, 0x804d, 0x2444); /* 100M short abiq&ldvbias */
2968 sram_write(tp, 0x805d, 0x2444); /* 1000M short abiq&ldvbias */
2971 data = sram_read(tp, SRAM_GREEN_CFG);
2972 data |= GREEN_ETH_EN;
2973 sram_write(tp, SRAM_GREEN_CFG, data);
2975 tp->ups_info.green = enable;
2978 static u16 r8153_phy_status(struct r8152 *tp, u16 desired)
2983 for (i = 0; i < 500; i++) {
2984 data = ocp_reg_read(tp, OCP_PHY_STATUS);
2985 data &= PHY_STAT_MASK;
2987 if (data == desired)
2989 } else if (data == PHY_STAT_LAN_ON || data == PHY_STAT_PWRDN ||
2990 data == PHY_STAT_EXT_INIT) {
3000 static void r8153b_ups_en(struct r8152 *tp, bool enable)
3002 u32 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_POWER_CUT);
3005 r8153b_ups_flags(tp);
3007 ocp_data |= UPS_EN | USP_PREWAKE | PHASE2_EN;
3008 ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
3010 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, 0xcfff);
3012 ocp_write_byte(tp, MCU_TYPE_USB, 0xcfff, ocp_data);
3016 ocp_data &= ~(UPS_EN | USP_PREWAKE);
3017 ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
3019 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, 0xcfff);
3020 ocp_data &= ~BIT(0);
3021 ocp_write_byte(tp, MCU_TYPE_USB, 0xcfff, ocp_data);
3023 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
3024 ocp_data &= ~PCUT_STATUS;
3025 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
3027 data = r8153_phy_status(tp, 0);
3030 case PHY_STAT_PWRDN:
3031 case PHY_STAT_EXT_INIT:
3033 test_bit(GREEN_ETHERNET, &tp->flags));
3035 data = r8152_mdio_read(tp, MII_BMCR);
3036 data &= ~BMCR_PDOWN;
3038 r8152_mdio_write(tp, MII_BMCR, data);
3040 data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
3044 if (data != PHY_STAT_LAN_ON)
3045 netif_warn(tp, link, tp->netdev,
3052 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
3056 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
3058 ocp_data |= PWR_EN | PHASE2_EN;
3060 ocp_data &= ~(PWR_EN | PHASE2_EN);
3061 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
3063 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
3064 ocp_data &= ~PCUT_STATUS;
3065 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
3068 static void r8153b_power_cut_en(struct r8152 *tp, bool enable)
3072 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
3074 ocp_data |= PWR_EN | PHASE2_EN;
3076 ocp_data &= ~PWR_EN;
3077 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
3079 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
3080 ocp_data &= ~PCUT_STATUS;
3081 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
3084 static void r8153_queue_wake(struct r8152 *tp, bool enable)
3088 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_INDICATE_FALG);
3090 ocp_data |= UPCOMING_RUNTIME_D3;
3092 ocp_data &= ~UPCOMING_RUNTIME_D3;
3093 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_INDICATE_FALG, ocp_data);
3095 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_SUSPEND_FLAG);
3096 ocp_data &= ~LINK_CHG_EVENT;
3097 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_SUSPEND_FLAG, ocp_data);
3099 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS);
3100 ocp_data &= ~LINK_CHANGE_FLAG;
3101 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS, ocp_data);
3104 static bool rtl_can_wakeup(struct r8152 *tp)
3106 struct usb_device *udev = tp->udev;
3108 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
3111 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
3116 __rtl_set_wol(tp, WAKE_ANY);
3118 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
3120 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
3121 ocp_data |= LINK_OFF_WAKE_EN;
3122 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
3124 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
3128 __rtl_set_wol(tp, tp->saved_wolopts);
3130 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
3132 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
3133 ocp_data &= ~LINK_OFF_WAKE_EN;
3134 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
3136 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
3140 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
3143 r8153_u1u2en(tp, false);
3144 r8153_u2p3en(tp, false);
3145 r8153_mac_clk_spd(tp, true);
3146 rtl_runtime_suspend_enable(tp, true);
3148 rtl_runtime_suspend_enable(tp, false);
3149 r8153_mac_clk_spd(tp, false);
3151 switch (tp->version) {
3158 r8153_u2p3en(tp, true);
3162 r8153_u1u2en(tp, true);
3166 static void rtl8153b_runtime_enable(struct r8152 *tp, bool enable)
3169 r8153_queue_wake(tp, true);
3170 r8153b_u1u2en(tp, false);
3171 r8153_u2p3en(tp, false);
3172 rtl_runtime_suspend_enable(tp, true);
3173 r8153b_ups_en(tp, true);
3175 r8153b_ups_en(tp, false);
3176 r8153_queue_wake(tp, false);
3177 rtl_runtime_suspend_enable(tp, false);
3178 r8153_u2p3en(tp, true);
3179 r8153b_u1u2en(tp, true);
3183 static void r8153_teredo_off(struct r8152 *tp)
3187 switch (tp->version) {
3195 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
3196 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK |
3198 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
3203 /* The bit 0 ~ 7 are relative with teredo settings. They are
3204 * W1C (write 1 to clear), so set all 1 to disable it.
3206 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, 0xff);
3213 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
3214 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
3215 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
3218 static void rtl_reset_bmu(struct r8152 *tp)
3222 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
3223 ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
3224 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
3225 ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
3226 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
3229 static void r8152_aldps_en(struct r8152 *tp, bool enable)
3232 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
3233 LINKENA | DIS_SDSAVE);
3235 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
3241 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3243 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3244 ocp_reg_write(tp, OCP_EEE_DATA, reg);
3245 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3248 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3252 r8152_mmd_indirect(tp, dev, reg);
3253 data = ocp_reg_read(tp, OCP_EEE_DATA);
3254 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3259 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3261 r8152_mmd_indirect(tp, dev, reg);
3262 ocp_reg_write(tp, OCP_EEE_DATA, data);
3263 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3266 static void r8152_eee_en(struct r8152 *tp, bool enable)
3268 u16 config1, config2, config3;
3271 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3272 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3273 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3274 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3277 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3278 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3279 config1 |= sd_rise_time(1);
3280 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3281 config3 |= fast_snr(42);
3283 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3284 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3286 config1 |= sd_rise_time(7);
3287 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3288 config3 |= fast_snr(511);
3291 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3292 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3293 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3294 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3297 static void r8153_eee_en(struct r8152 *tp, bool enable)
3302 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3303 config = ocp_reg_read(tp, OCP_EEE_CFG);
3306 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3309 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3310 config &= ~EEE10_EN;
3313 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3314 ocp_reg_write(tp, OCP_EEE_CFG, config);
3316 tp->ups_info.eee = enable;
3319 static void rtl_eee_enable(struct r8152 *tp, bool enable)
3321 switch (tp->version) {
3326 r8152_eee_en(tp, true);
3327 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV,
3330 r8152_eee_en(tp, false);
3331 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0);
3341 r8153_eee_en(tp, true);
3342 ocp_reg_write(tp, OCP_EEE_ADV, tp->eee_adv);
3344 r8153_eee_en(tp, false);
3345 ocp_reg_write(tp, OCP_EEE_ADV, 0);
3353 static void r8152b_enable_fc(struct r8152 *tp)
3357 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3358 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3359 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3361 tp->ups_info.flow_control = true;
3364 static void rtl8152_disable(struct r8152 *tp)
3366 r8152_aldps_en(tp, false);
3368 r8152_aldps_en(tp, true);
3371 static void r8152b_hw_phy_cfg(struct r8152 *tp)
3373 rtl_eee_enable(tp, tp->eee_en);
3374 r8152_aldps_en(tp, true);
3375 r8152b_enable_fc(tp);
3377 set_bit(PHY_RESET, &tp->flags);
3380 static void r8152b_exit_oob(struct r8152 *tp)
3385 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3386 ocp_data &= ~RCR_ACPT_ALL;
3387 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3389 rxdy_gated_en(tp, true);
3390 r8153_teredo_off(tp);
3391 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
3392 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
3394 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3395 ocp_data &= ~NOW_IS_OOB;
3396 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3398 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3399 ocp_data &= ~MCU_BORW_EN;
3400 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3402 for (i = 0; i < 1000; i++) {
3403 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3404 if (ocp_data & LINK_LIST_READY)
3406 usleep_range(1000, 2000);
3409 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3410 ocp_data |= RE_INIT_LL;
3411 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3413 for (i = 0; i < 1000; i++) {
3414 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3415 if (ocp_data & LINK_LIST_READY)
3417 usleep_range(1000, 2000);
3420 rtl8152_nic_reset(tp);
3422 /* rx share fifo credit full threshold */
3423 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
3425 if (tp->udev->speed == USB_SPEED_FULL ||
3426 tp->udev->speed == USB_SPEED_LOW) {
3427 /* rx share fifo credit near full threshold */
3428 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
3430 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
3433 /* rx share fifo credit near full threshold */
3434 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
3436 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
3440 /* TX share fifo free credit full threshold */
3441 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
3443 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
3444 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
3445 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
3446 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
3448 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
3450 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
3452 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
3453 ocp_data |= TCR0_AUTO_FIFO;
3454 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
3457 static void r8152b_enter_oob(struct r8152 *tp)
3462 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3463 ocp_data &= ~NOW_IS_OOB;
3464 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3466 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
3467 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
3468 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
3472 for (i = 0; i < 1000; i++) {
3473 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3474 if (ocp_data & LINK_LIST_READY)
3476 usleep_range(1000, 2000);
3479 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3480 ocp_data |= RE_INIT_LL;
3481 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3483 for (i = 0; i < 1000; i++) {
3484 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3485 if (ocp_data & LINK_LIST_READY)
3487 usleep_range(1000, 2000);
3490 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
3492 rtl_rx_vlan_en(tp, true);
3494 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_BDC_CR);
3495 ocp_data |= ALDPS_PROXY_MODE;
3496 ocp_write_word(tp, MCU_TYPE_PLA, PLA_BDC_CR, ocp_data);
3498 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3499 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
3500 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3502 rxdy_gated_en(tp, false);
3504 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3505 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
3506 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3509 static int r8153_patch_request(struct r8152 *tp, bool request)
3514 data = ocp_reg_read(tp, OCP_PHY_PATCH_CMD);
3516 data |= PATCH_REQUEST;
3518 data &= ~PATCH_REQUEST;
3519 ocp_reg_write(tp, OCP_PHY_PATCH_CMD, data);
3521 for (i = 0; request && i < 5000; i++) {
3522 usleep_range(1000, 2000);
3523 if (ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)
3527 if (request && !(ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)) {
3528 netif_err(tp, drv, tp->netdev, "patch request fail\n");
3529 r8153_patch_request(tp, false);
3536 static void r8153_aldps_en(struct r8152 *tp, bool enable)
3540 data = ocp_reg_read(tp, OCP_POWER_CFG);
3543 ocp_reg_write(tp, OCP_POWER_CFG, data);
3548 ocp_reg_write(tp, OCP_POWER_CFG, data);
3549 for (i = 0; i < 20; i++) {
3550 usleep_range(1000, 2000);
3551 if (ocp_read_word(tp, MCU_TYPE_PLA, 0xe000) & 0x0100)
3556 tp->ups_info.aldps = enable;
3559 static void r8153_hw_phy_cfg(struct r8152 *tp)
3564 /* disable ALDPS before updating the PHY parameters */
3565 r8153_aldps_en(tp, false);
3567 /* disable EEE before updating the PHY parameters */
3568 rtl_eee_enable(tp, false);
3570 if (tp->version == RTL_VER_03) {
3571 data = ocp_reg_read(tp, OCP_EEE_CFG);
3572 data &= ~CTAP_SHORT_EN;
3573 ocp_reg_write(tp, OCP_EEE_CFG, data);
3576 data = ocp_reg_read(tp, OCP_POWER_CFG);
3577 data |= EEE_CLKDIV_EN;
3578 ocp_reg_write(tp, OCP_POWER_CFG, data);
3580 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
3581 data |= EN_10M_BGOFF;
3582 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
3583 data = ocp_reg_read(tp, OCP_POWER_CFG);
3584 data |= EN_10M_PLLOFF;
3585 ocp_reg_write(tp, OCP_POWER_CFG, data);
3586 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
3588 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3589 ocp_data |= PFM_PWM_SWITCH;
3590 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3592 /* Enable LPF corner auto tune */
3593 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
3595 /* Adjust 10M Amplitude */
3596 sram_write(tp, SRAM_10M_AMP1, 0x00af);
3597 sram_write(tp, SRAM_10M_AMP2, 0x0208);
3600 rtl_eee_enable(tp, true);
3602 r8153_aldps_en(tp, true);
3603 r8152b_enable_fc(tp);
3605 switch (tp->version) {
3612 r8153_u2p3en(tp, true);
3616 set_bit(PHY_RESET, &tp->flags);
3619 static u32 r8152_efuse_read(struct r8152 *tp, u8 addr)
3623 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD, EFUSE_READ_CMD | addr);
3624 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD);
3625 ocp_data = (ocp_data & EFUSE_DATA_BIT16) << 9; /* data of bit16 */
3626 ocp_data |= ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_DATA);
3631 static void r8153b_hw_phy_cfg(struct r8152 *tp)
3636 /* disable ALDPS before updating the PHY parameters */
3637 r8153_aldps_en(tp, false);
3639 /* disable EEE before updating the PHY parameters */
3640 rtl_eee_enable(tp, false);
3642 r8153b_green_en(tp, test_bit(GREEN_ETHERNET, &tp->flags));
3644 data = sram_read(tp, SRAM_GREEN_CFG);
3646 sram_write(tp, SRAM_GREEN_CFG, data);
3647 data = ocp_reg_read(tp, OCP_NCTL_CFG);
3648 data |= PGA_RETURN_EN;
3649 ocp_reg_write(tp, OCP_NCTL_CFG, data);
3651 /* ADC Bias Calibration:
3652 * read efuse offset 0x7d to get a 17-bit data. Remove the dummy/fake
3653 * bit (bit3) to rebuild the real 16-bit data. Write the data to the
3656 ocp_data = r8152_efuse_read(tp, 0x7d);
3657 data = (u16)(((ocp_data & 0x1fff0) >> 1) | (ocp_data & 0x7));
3659 ocp_reg_write(tp, OCP_ADC_IOFFSET, data);
3661 /* ups mode tx-link-pulse timing adjustment:
3662 * rg_saw_cnt = OCP reg 0xC426 Bit[13:0]
3663 * swr_cnt_1ms_ini = 16000000 / rg_saw_cnt
3665 ocp_data = ocp_reg_read(tp, 0xc426);
3668 u32 swr_cnt_1ms_ini;
3670 swr_cnt_1ms_ini = (16000000 / ocp_data) & SAW_CNT_1MS_MASK;
3671 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CFG);
3672 ocp_data = (ocp_data & ~SAW_CNT_1MS_MASK) | swr_cnt_1ms_ini;
3673 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CFG, ocp_data);
3676 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3677 ocp_data |= PFM_PWM_SWITCH;
3678 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3681 if (!r8153_patch_request(tp, true)) {
3682 data = ocp_reg_read(tp, OCP_POWER_CFG);
3683 data |= EEE_CLKDIV_EN;
3684 ocp_reg_write(tp, OCP_POWER_CFG, data);
3685 tp->ups_info.eee_ckdiv = true;
3687 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
3688 data |= EN_EEE_CMODE | EN_EEE_1000 | EN_10M_CLKDIV;
3689 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
3690 tp->ups_info.eee_cmod_lv = true;
3691 tp->ups_info._10m_ckdiv = true;
3692 tp->ups_info.eee_plloff_giga = true;
3694 ocp_reg_write(tp, OCP_SYSCLK_CFG, 0);
3695 ocp_reg_write(tp, OCP_SYSCLK_CFG, clk_div_expo(5));
3696 tp->ups_info._250m_ckdiv = true;
3698 r8153_patch_request(tp, false);
3702 rtl_eee_enable(tp, true);
3704 r8153_aldps_en(tp, true);
3705 r8152b_enable_fc(tp);
3706 r8153_u2p3en(tp, true);
3708 set_bit(PHY_RESET, &tp->flags);
3711 static void r8153_first_init(struct r8152 *tp)
3716 r8153_mac_clk_spd(tp, false);
3717 rxdy_gated_en(tp, true);
3718 r8153_teredo_off(tp);
3720 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3721 ocp_data &= ~RCR_ACPT_ALL;
3722 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3724 rtl8152_nic_reset(tp);
3727 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3728 ocp_data &= ~NOW_IS_OOB;
3729 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3731 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3732 ocp_data &= ~MCU_BORW_EN;
3733 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3735 for (i = 0; i < 1000; i++) {
3736 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3737 if (ocp_data & LINK_LIST_READY)
3739 usleep_range(1000, 2000);
3742 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3743 ocp_data |= RE_INIT_LL;
3744 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3746 for (i = 0; i < 1000; i++) {
3747 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3748 if (ocp_data & LINK_LIST_READY)
3750 usleep_range(1000, 2000);
3753 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
3755 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
3756 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
3757 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
3759 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
3760 ocp_data |= TCR0_AUTO_FIFO;
3761 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
3763 rtl8152_nic_reset(tp);
3765 /* rx share fifo credit full threshold */
3766 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
3767 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
3768 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
3769 /* TX share fifo free credit full threshold */
3770 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
3773 static void r8153_enter_oob(struct r8152 *tp)
3778 r8153_mac_clk_spd(tp, true);
3780 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3781 ocp_data &= ~NOW_IS_OOB;
3782 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3787 for (i = 0; i < 1000; i++) {
3788 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3789 if (ocp_data & LINK_LIST_READY)
3791 usleep_range(1000, 2000);
3794 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3795 ocp_data |= RE_INIT_LL;
3796 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3798 for (i = 0; i < 1000; i++) {
3799 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3800 if (ocp_data & LINK_LIST_READY)
3802 usleep_range(1000, 2000);
3805 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
3806 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
3808 switch (tp->version) {
3813 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
3814 ocp_data &= ~TEREDO_WAKE_MASK;
3815 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
3820 /* Clear teredo wake event. bit[15:8] is the teredo wakeup
3821 * type. Set it to zero. bits[7:0] are the W1C bits about
3822 * the events. Set them to all 1 to clear them.
3824 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_WAKE_BASE, 0x00ff);
3831 rtl_rx_vlan_en(tp, true);
3833 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_BDC_CR);
3834 ocp_data |= ALDPS_PROXY_MODE;
3835 ocp_write_word(tp, MCU_TYPE_PLA, PLA_BDC_CR, ocp_data);
3837 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3838 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
3839 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3841 rxdy_gated_en(tp, false);
3843 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3844 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
3845 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3848 static void rtl8153_disable(struct r8152 *tp)
3850 r8153_aldps_en(tp, false);
3853 r8153_aldps_en(tp, true);
3856 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u32 speed, u8 duplex,
3862 if (autoneg == AUTONEG_DISABLE) {
3863 if (duplex != DUPLEX_HALF && duplex != DUPLEX_FULL)
3868 bmcr = BMCR_SPEED10;
3869 if (duplex == DUPLEX_FULL) {
3870 bmcr |= BMCR_FULLDPLX;
3871 tp->ups_info.speed_duplex = FORCE_10M_FULL;
3873 tp->ups_info.speed_duplex = FORCE_10M_HALF;
3877 bmcr = BMCR_SPEED100;
3878 if (duplex == DUPLEX_FULL) {
3879 bmcr |= BMCR_FULLDPLX;
3880 tp->ups_info.speed_duplex = FORCE_100M_FULL;
3882 tp->ups_info.speed_duplex = FORCE_100M_HALF;
3886 if (tp->mii.supports_gmii) {
3887 bmcr = BMCR_SPEED1000 | BMCR_FULLDPLX;
3888 tp->ups_info.speed_duplex = NWAY_1000M_FULL;
3897 if (duplex == DUPLEX_FULL)
3898 tp->mii.full_duplex = 1;
3900 tp->mii.full_duplex = 0;
3902 tp->mii.force_media = 1;
3907 support = RTL_ADVERTISED_10_HALF | RTL_ADVERTISED_10_FULL |
3908 RTL_ADVERTISED_100_HALF | RTL_ADVERTISED_100_FULL;
3910 if (tp->mii.supports_gmii)
3911 support |= RTL_ADVERTISED_1000_FULL;
3913 if (!(advertising & support))
3916 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3917 tmp1 = anar & ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
3918 ADVERTISE_100HALF | ADVERTISE_100FULL);
3919 if (advertising & RTL_ADVERTISED_10_HALF) {
3920 tmp1 |= ADVERTISE_10HALF;
3921 tp->ups_info.speed_duplex = NWAY_10M_HALF;
3923 if (advertising & RTL_ADVERTISED_10_FULL) {
3924 tmp1 |= ADVERTISE_10FULL;
3925 tp->ups_info.speed_duplex = NWAY_10M_FULL;
3928 if (advertising & RTL_ADVERTISED_100_HALF) {
3929 tmp1 |= ADVERTISE_100HALF;
3930 tp->ups_info.speed_duplex = NWAY_100M_HALF;
3932 if (advertising & RTL_ADVERTISED_100_FULL) {
3933 tmp1 |= ADVERTISE_100FULL;
3934 tp->ups_info.speed_duplex = NWAY_100M_FULL;
3938 r8152_mdio_write(tp, MII_ADVERTISE, tmp1);
3939 tp->mii.advertising = tmp1;
3942 if (tp->mii.supports_gmii) {
3945 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
3946 tmp1 = gbcr & ~(ADVERTISE_1000FULL |
3947 ADVERTISE_1000HALF);
3949 if (advertising & RTL_ADVERTISED_1000_FULL) {
3950 tmp1 |= ADVERTISE_1000FULL;
3951 tp->ups_info.speed_duplex = NWAY_1000M_FULL;
3955 r8152_mdio_write(tp, MII_CTRL1000, tmp1);
3958 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3960 tp->mii.force_media = 0;
3963 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3966 r8152_mdio_write(tp, MII_BMCR, bmcr);
3968 if (bmcr & BMCR_RESET) {
3971 for (i = 0; i < 50; i++) {
3973 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3982 static void rtl8152_up(struct r8152 *tp)
3984 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3987 r8152_aldps_en(tp, false);
3988 r8152b_exit_oob(tp);
3989 r8152_aldps_en(tp, true);
3992 static void rtl8152_down(struct r8152 *tp)
3994 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3995 rtl_drop_queued_tx(tp);
3999 r8152_power_cut_en(tp, false);
4000 r8152_aldps_en(tp, false);
4001 r8152b_enter_oob(tp);
4002 r8152_aldps_en(tp, true);
4005 static void rtl8153_up(struct r8152 *tp)
4007 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4010 r8153_u1u2en(tp, false);
4011 r8153_u2p3en(tp, false);
4012 r8153_aldps_en(tp, false);
4013 r8153_first_init(tp);
4014 r8153_aldps_en(tp, true);
4016 switch (tp->version) {
4023 r8153_u2p3en(tp, true);
4027 r8153_u1u2en(tp, true);
4030 static void rtl8153_down(struct r8152 *tp)
4032 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
4033 rtl_drop_queued_tx(tp);
4037 r8153_u1u2en(tp, false);
4038 r8153_u2p3en(tp, false);
4039 r8153_power_cut_en(tp, false);
4040 r8153_aldps_en(tp, false);
4041 r8153_enter_oob(tp);
4042 r8153_aldps_en(tp, true);
4045 static void rtl8153b_up(struct r8152 *tp)
4047 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4050 r8153b_u1u2en(tp, false);
4051 r8153_u2p3en(tp, false);
4052 r8153_aldps_en(tp, false);
4054 r8153_first_init(tp);
4055 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_B);
4057 r8153_aldps_en(tp, true);
4058 r8153_u2p3en(tp, true);
4059 r8153b_u1u2en(tp, true);
4062 static void rtl8153b_down(struct r8152 *tp)
4064 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
4065 rtl_drop_queued_tx(tp);
4069 r8153b_u1u2en(tp, false);
4070 r8153_u2p3en(tp, false);
4071 r8153b_power_cut_en(tp, false);
4072 r8153_aldps_en(tp, false);
4073 r8153_enter_oob(tp);
4074 r8153_aldps_en(tp, true);
4077 static bool rtl8152_in_nway(struct r8152 *tp)
4081 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
4082 tp->ocp_base = 0x2000;
4083 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
4084 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
4086 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
4087 if (nway_state & 0xc000)
4093 static bool rtl8153_in_nway(struct r8152 *tp)
4095 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
4097 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
4103 static void set_carrier(struct r8152 *tp)
4105 struct net_device *netdev = tp->netdev;
4106 struct napi_struct *napi = &tp->napi;
4109 speed = rtl8152_get_speed(tp);
4111 if (speed & LINK_STATUS) {
4112 if (!netif_carrier_ok(netdev)) {
4113 tp->rtl_ops.enable(tp);
4114 netif_stop_queue(netdev);
4116 netif_carrier_on(netdev);
4118 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
4119 _rtl8152_set_rx_mode(netdev);
4120 napi_enable(&tp->napi);
4121 netif_wake_queue(netdev);
4122 netif_info(tp, link, netdev, "carrier on\n");
4123 } else if (netif_queue_stopped(netdev) &&
4124 skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
4125 netif_wake_queue(netdev);
4128 if (netif_carrier_ok(netdev)) {
4129 netif_carrier_off(netdev);
4130 tasklet_disable(&tp->tx_tl);
4132 tp->rtl_ops.disable(tp);
4134 tasklet_enable(&tp->tx_tl);
4135 netif_info(tp, link, netdev, "carrier off\n");
4140 static void rtl_work_func_t(struct work_struct *work)
4142 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
4144 /* If the device is unplugged or !netif_running(), the workqueue
4145 * doesn't need to wake the device, and could return directly.
4147 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
4150 if (usb_autopm_get_interface(tp->intf) < 0)
4153 if (!test_bit(WORK_ENABLE, &tp->flags))
4156 if (!mutex_trylock(&tp->control)) {
4157 schedule_delayed_work(&tp->schedule, 0);
4161 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
4164 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
4165 _rtl8152_set_rx_mode(tp->netdev);
4167 /* don't schedule tasket before linking */
4168 if (test_and_clear_bit(SCHEDULE_TASKLET, &tp->flags) &&
4169 netif_carrier_ok(tp->netdev))
4170 tasklet_schedule(&tp->tx_tl);
4172 mutex_unlock(&tp->control);
4175 usb_autopm_put_interface(tp->intf);
4178 static void rtl_hw_phy_work_func_t(struct work_struct *work)
4180 struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
4182 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4185 if (usb_autopm_get_interface(tp->intf) < 0)
4188 mutex_lock(&tp->control);
4190 tp->rtl_ops.hw_phy_cfg(tp);
4192 rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex,
4195 mutex_unlock(&tp->control);
4197 usb_autopm_put_interface(tp->intf);
4200 #ifdef CONFIG_PM_SLEEP
4201 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
4204 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
4207 case PM_HIBERNATION_PREPARE:
4208 case PM_SUSPEND_PREPARE:
4209 usb_autopm_get_interface(tp->intf);
4212 case PM_POST_HIBERNATION:
4213 case PM_POST_SUSPEND:
4214 usb_autopm_put_interface(tp->intf);
4217 case PM_POST_RESTORE:
4218 case PM_RESTORE_PREPARE:
4227 static int rtl8152_open(struct net_device *netdev)
4229 struct r8152 *tp = netdev_priv(netdev);
4232 res = alloc_all_mem(tp);
4236 res = usb_autopm_get_interface(tp->intf);
4240 mutex_lock(&tp->control);
4244 netif_carrier_off(netdev);
4245 netif_start_queue(netdev);
4246 set_bit(WORK_ENABLE, &tp->flags);
4248 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
4251 netif_device_detach(tp->netdev);
4252 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
4256 napi_enable(&tp->napi);
4257 tasklet_enable(&tp->tx_tl);
4259 mutex_unlock(&tp->control);
4261 usb_autopm_put_interface(tp->intf);
4262 #ifdef CONFIG_PM_SLEEP
4263 tp->pm_notifier.notifier_call = rtl_notifier;
4264 register_pm_notifier(&tp->pm_notifier);
4269 mutex_unlock(&tp->control);
4270 usb_autopm_put_interface(tp->intf);
4277 static int rtl8152_close(struct net_device *netdev)
4279 struct r8152 *tp = netdev_priv(netdev);
4282 #ifdef CONFIG_PM_SLEEP
4283 unregister_pm_notifier(&tp->pm_notifier);
4285 tasklet_disable(&tp->tx_tl);
4286 napi_disable(&tp->napi);
4287 clear_bit(WORK_ENABLE, &tp->flags);
4288 usb_kill_urb(tp->intr_urb);
4289 cancel_delayed_work_sync(&tp->schedule);
4290 netif_stop_queue(netdev);
4292 res = usb_autopm_get_interface(tp->intf);
4293 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
4294 rtl_drop_queued_tx(tp);
4297 mutex_lock(&tp->control);
4299 tp->rtl_ops.down(tp);
4301 mutex_unlock(&tp->control);
4303 usb_autopm_put_interface(tp->intf);
4311 static void rtl_tally_reset(struct r8152 *tp)
4315 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
4316 ocp_data |= TALLY_RESET;
4317 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
4320 static void r8152b_init(struct r8152 *tp)
4325 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4328 data = r8152_mdio_read(tp, MII_BMCR);
4329 if (data & BMCR_PDOWN) {
4330 data &= ~BMCR_PDOWN;
4331 r8152_mdio_write(tp, MII_BMCR, data);
4334 r8152_aldps_en(tp, false);
4336 if (tp->version == RTL_VER_01) {
4337 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
4338 ocp_data &= ~LED_MODE_MASK;
4339 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
4342 r8152_power_cut_en(tp, false);
4344 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
4345 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
4346 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
4347 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
4348 ocp_data &= ~MCU_CLK_RATIO_MASK;
4349 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
4350 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
4351 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
4352 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
4353 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
4355 rtl_tally_reset(tp);
4357 /* enable rx aggregation */
4358 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
4359 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
4360 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
4363 static void r8153_init(struct r8152 *tp)
4369 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4372 r8153_u1u2en(tp, false);
4374 for (i = 0; i < 500; i++) {
4375 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
4381 data = r8153_phy_status(tp, 0);
4383 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
4384 tp->version == RTL_VER_05)
4385 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
4387 data = r8152_mdio_read(tp, MII_BMCR);
4388 if (data & BMCR_PDOWN) {
4389 data &= ~BMCR_PDOWN;
4390 r8152_mdio_write(tp, MII_BMCR, data);
4393 data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
4395 r8153_u2p3en(tp, false);
4397 if (tp->version == RTL_VER_04) {
4398 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
4399 ocp_data &= ~pwd_dn_scale_mask;
4400 ocp_data |= pwd_dn_scale(96);
4401 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
4403 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
4404 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
4405 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
4406 } else if (tp->version == RTL_VER_05) {
4407 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
4408 ocp_data &= ~ECM_ALDPS;
4409 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
4411 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
4412 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
4413 ocp_data &= ~DYNAMIC_BURST;
4415 ocp_data |= DYNAMIC_BURST;
4416 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
4417 } else if (tp->version == RTL_VER_06) {
4418 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
4419 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
4420 ocp_data &= ~DYNAMIC_BURST;
4422 ocp_data |= DYNAMIC_BURST;
4423 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
4426 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
4427 ocp_data |= EP4_FULL_FC;
4428 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
4430 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
4431 ocp_data &= ~TIMER11_EN;
4432 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
4434 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
4435 ocp_data &= ~LED_MODE_MASK;
4436 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
4438 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
4439 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
4440 ocp_data |= LPM_TIMER_500MS;
4442 ocp_data |= LPM_TIMER_500US;
4443 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
4445 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
4446 ocp_data &= ~SEN_VAL_MASK;
4447 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
4448 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
4450 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
4452 r8153_power_cut_en(tp, false);
4453 r8153_u1u2en(tp, true);
4454 r8153_mac_clk_spd(tp, false);
4455 usb_enable_lpm(tp->udev);
4457 /* rx aggregation */
4458 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
4459 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
4460 if (test_bit(DELL_TB_RX_AGG_BUG, &tp->flags))
4461 ocp_data |= RX_AGG_DISABLE;
4463 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
4465 rtl_tally_reset(tp);
4467 switch (tp->udev->speed) {
4468 case USB_SPEED_SUPER:
4469 case USB_SPEED_SUPER_PLUS:
4470 tp->coalesce = COALESCE_SUPER;
4472 case USB_SPEED_HIGH:
4473 tp->coalesce = COALESCE_HIGH;
4476 tp->coalesce = COALESCE_SLOW;
4481 static void r8153b_init(struct r8152 *tp)
4487 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4490 r8153b_u1u2en(tp, false);
4492 for (i = 0; i < 500; i++) {
4493 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
4499 data = r8153_phy_status(tp, 0);
4501 data = r8152_mdio_read(tp, MII_BMCR);
4502 if (data & BMCR_PDOWN) {
4503 data &= ~BMCR_PDOWN;
4504 r8152_mdio_write(tp, MII_BMCR, data);
4507 data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
4509 r8153_u2p3en(tp, false);
4511 /* MSC timer = 0xfff * 8ms = 32760 ms */
4512 ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff);
4514 /* U1/U2/L1 idle timer. 500 us */
4515 ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500);
4517 r8153b_power_cut_en(tp, false);
4518 r8153b_ups_en(tp, false);
4519 r8153_queue_wake(tp, false);
4520 rtl_runtime_suspend_enable(tp, false);
4521 r8153b_u1u2en(tp, true);
4522 usb_enable_lpm(tp->udev);
4524 /* MAC clock speed down */
4525 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2);
4526 ocp_data |= MAC_CLK_SPDWN_EN;
4527 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, ocp_data);
4529 set_bit(GREEN_ETHERNET, &tp->flags);
4531 /* rx aggregation */
4532 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
4533 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
4534 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
4536 rtl_tally_reset(tp);
4538 tp->coalesce = 15000; /* 15 us */
4541 static int rtl8152_pre_reset(struct usb_interface *intf)
4543 struct r8152 *tp = usb_get_intfdata(intf);
4544 struct net_device *netdev;
4549 netdev = tp->netdev;
4550 if (!netif_running(netdev))
4553 netif_stop_queue(netdev);
4554 tasklet_disable(&tp->tx_tl);
4555 napi_disable(&tp->napi);
4556 clear_bit(WORK_ENABLE, &tp->flags);
4557 usb_kill_urb(tp->intr_urb);
4558 cancel_delayed_work_sync(&tp->schedule);
4559 if (netif_carrier_ok(netdev)) {
4560 mutex_lock(&tp->control);
4561 tp->rtl_ops.disable(tp);
4562 mutex_unlock(&tp->control);
4568 static int rtl8152_post_reset(struct usb_interface *intf)
4570 struct r8152 *tp = usb_get_intfdata(intf);
4571 struct net_device *netdev;
4577 /* reset the MAC adddress in case of policy change */
4578 if (determine_ethernet_addr(tp, &sa) >= 0) {
4580 dev_set_mac_address (tp->netdev, &sa, NULL);
4584 netdev = tp->netdev;
4585 if (!netif_running(netdev))
4588 set_bit(WORK_ENABLE, &tp->flags);
4589 if (netif_carrier_ok(netdev)) {
4590 mutex_lock(&tp->control);
4591 tp->rtl_ops.enable(tp);
4593 _rtl8152_set_rx_mode(netdev);
4594 mutex_unlock(&tp->control);
4597 napi_enable(&tp->napi);
4598 tasklet_enable(&tp->tx_tl);
4599 netif_wake_queue(netdev);
4600 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
4602 if (!list_empty(&tp->rx_done))
4603 napi_schedule(&tp->napi);
4608 static bool delay_autosuspend(struct r8152 *tp)
4610 bool sw_linking = !!netif_carrier_ok(tp->netdev);
4611 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
4613 /* This means a linking change occurs and the driver doesn't detect it,
4614 * yet. If the driver has disabled tx/rx and hw is linking on, the
4615 * device wouldn't wake up by receiving any packet.
4617 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
4620 /* If the linking down is occurred by nway, the device may miss the
4621 * linking change event. And it wouldn't wake when linking on.
4623 if (!sw_linking && tp->rtl_ops.in_nway(tp))
4625 else if (!skb_queue_empty(&tp->tx_queue))
4631 static int rtl8152_runtime_resume(struct r8152 *tp)
4633 struct net_device *netdev = tp->netdev;
4635 if (netif_running(netdev) && netdev->flags & IFF_UP) {
4636 struct napi_struct *napi = &tp->napi;
4638 tp->rtl_ops.autosuspend_en(tp, false);
4640 set_bit(WORK_ENABLE, &tp->flags);
4642 if (netif_carrier_ok(netdev)) {
4643 if (rtl8152_get_speed(tp) & LINK_STATUS) {
4646 netif_carrier_off(netdev);
4647 tp->rtl_ops.disable(tp);
4648 netif_info(tp, link, netdev, "linking down\n");
4653 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
4654 smp_mb__after_atomic();
4656 if (!list_empty(&tp->rx_done))
4657 napi_schedule(&tp->napi);
4659 usb_submit_urb(tp->intr_urb, GFP_NOIO);
4661 if (netdev->flags & IFF_UP)
4662 tp->rtl_ops.autosuspend_en(tp, false);
4664 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
4670 static int rtl8152_system_resume(struct r8152 *tp)
4672 struct net_device *netdev = tp->netdev;
4674 netif_device_attach(netdev);
4676 if (netif_running(netdev) && netdev->flags & IFF_UP) {
4678 netif_carrier_off(netdev);
4679 set_bit(WORK_ENABLE, &tp->flags);
4680 usb_submit_urb(tp->intr_urb, GFP_NOIO);
4686 static int rtl8152_runtime_suspend(struct r8152 *tp)
4688 struct net_device *netdev = tp->netdev;
4691 set_bit(SELECTIVE_SUSPEND, &tp->flags);
4692 smp_mb__after_atomic();
4694 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
4697 if (netif_carrier_ok(netdev)) {
4700 rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
4701 ocp_data = rcr & ~RCR_ACPT_ALL;
4702 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
4703 rxdy_gated_en(tp, true);
4704 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
4706 if (!(ocp_data & RXFIFO_EMPTY)) {
4707 rxdy_gated_en(tp, false);
4708 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
4709 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
4710 smp_mb__after_atomic();
4716 clear_bit(WORK_ENABLE, &tp->flags);
4717 usb_kill_urb(tp->intr_urb);
4719 tp->rtl_ops.autosuspend_en(tp, true);
4721 if (netif_carrier_ok(netdev)) {
4722 struct napi_struct *napi = &tp->napi;
4726 rxdy_gated_en(tp, false);
4727 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
4731 if (delay_autosuspend(tp)) {
4732 rtl8152_runtime_resume(tp);
4741 static int rtl8152_system_suspend(struct r8152 *tp)
4743 struct net_device *netdev = tp->netdev;
4745 netif_device_detach(netdev);
4747 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
4748 struct napi_struct *napi = &tp->napi;
4750 clear_bit(WORK_ENABLE, &tp->flags);
4751 usb_kill_urb(tp->intr_urb);
4752 tasklet_disable(&tp->tx_tl);
4754 cancel_delayed_work_sync(&tp->schedule);
4755 tp->rtl_ops.down(tp);
4757 tasklet_enable(&tp->tx_tl);
4763 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
4765 struct r8152 *tp = usb_get_intfdata(intf);
4768 mutex_lock(&tp->control);
4770 if (PMSG_IS_AUTO(message))
4771 ret = rtl8152_runtime_suspend(tp);
4773 ret = rtl8152_system_suspend(tp);
4775 mutex_unlock(&tp->control);
4780 static int rtl8152_resume(struct usb_interface *intf)
4782 struct r8152 *tp = usb_get_intfdata(intf);
4785 mutex_lock(&tp->control);
4787 if (test_bit(SELECTIVE_SUSPEND, &tp->flags))
4788 ret = rtl8152_runtime_resume(tp);
4790 ret = rtl8152_system_resume(tp);
4792 mutex_unlock(&tp->control);
4797 static int rtl8152_reset_resume(struct usb_interface *intf)
4799 struct r8152 *tp = usb_get_intfdata(intf);
4801 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
4802 tp->rtl_ops.init(tp);
4803 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4804 set_ethernet_addr(tp);
4805 return rtl8152_resume(intf);
4808 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
4810 struct r8152 *tp = netdev_priv(dev);
4812 if (usb_autopm_get_interface(tp->intf) < 0)
4815 if (!rtl_can_wakeup(tp)) {
4819 mutex_lock(&tp->control);
4820 wol->supported = WAKE_ANY;
4821 wol->wolopts = __rtl_get_wol(tp);
4822 mutex_unlock(&tp->control);
4825 usb_autopm_put_interface(tp->intf);
4828 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
4830 struct r8152 *tp = netdev_priv(dev);
4833 if (!rtl_can_wakeup(tp))
4836 if (wol->wolopts & ~WAKE_ANY)
4839 ret = usb_autopm_get_interface(tp->intf);
4843 mutex_lock(&tp->control);
4845 __rtl_set_wol(tp, wol->wolopts);
4846 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
4848 mutex_unlock(&tp->control);
4850 usb_autopm_put_interface(tp->intf);
4856 static u32 rtl8152_get_msglevel(struct net_device *dev)
4858 struct r8152 *tp = netdev_priv(dev);
4860 return tp->msg_enable;
4863 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
4865 struct r8152 *tp = netdev_priv(dev);
4867 tp->msg_enable = value;
4870 static void rtl8152_get_drvinfo(struct net_device *netdev,
4871 struct ethtool_drvinfo *info)
4873 struct r8152 *tp = netdev_priv(netdev);
4875 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
4876 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
4877 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
4881 int rtl8152_get_link_ksettings(struct net_device *netdev,
4882 struct ethtool_link_ksettings *cmd)
4884 struct r8152 *tp = netdev_priv(netdev);
4887 if (!tp->mii.mdio_read)
4890 ret = usb_autopm_get_interface(tp->intf);
4894 mutex_lock(&tp->control);
4896 mii_ethtool_get_link_ksettings(&tp->mii, cmd);
4898 mutex_unlock(&tp->control);
4900 usb_autopm_put_interface(tp->intf);
4906 static int rtl8152_set_link_ksettings(struct net_device *dev,
4907 const struct ethtool_link_ksettings *cmd)
4909 struct r8152 *tp = netdev_priv(dev);
4910 u32 advertising = 0;
4913 ret = usb_autopm_get_interface(tp->intf);
4917 if (test_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT,
4918 cmd->link_modes.advertising))
4919 advertising |= RTL_ADVERTISED_10_HALF;
4921 if (test_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
4922 cmd->link_modes.advertising))
4923 advertising |= RTL_ADVERTISED_10_FULL;
4925 if (test_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT,
4926 cmd->link_modes.advertising))
4927 advertising |= RTL_ADVERTISED_100_HALF;
4929 if (test_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT,
4930 cmd->link_modes.advertising))
4931 advertising |= RTL_ADVERTISED_100_FULL;
4933 if (test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
4934 cmd->link_modes.advertising))
4935 advertising |= RTL_ADVERTISED_1000_HALF;
4937 if (test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
4938 cmd->link_modes.advertising))
4939 advertising |= RTL_ADVERTISED_1000_FULL;
4941 mutex_lock(&tp->control);
4943 ret = rtl8152_set_speed(tp, cmd->base.autoneg, cmd->base.speed,
4944 cmd->base.duplex, advertising);
4946 tp->autoneg = cmd->base.autoneg;
4947 tp->speed = cmd->base.speed;
4948 tp->duplex = cmd->base.duplex;
4949 tp->advertising = advertising;
4952 mutex_unlock(&tp->control);
4954 usb_autopm_put_interface(tp->intf);
4960 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
4967 "tx_single_collisions",
4968 "tx_multi_collisions",
4976 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
4980 return ARRAY_SIZE(rtl8152_gstrings);
4986 static void rtl8152_get_ethtool_stats(struct net_device *dev,
4987 struct ethtool_stats *stats, u64 *data)
4989 struct r8152 *tp = netdev_priv(dev);
4990 struct tally_counter tally;
4992 if (usb_autopm_get_interface(tp->intf) < 0)
4995 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
4997 usb_autopm_put_interface(tp->intf);
4999 data[0] = le64_to_cpu(tally.tx_packets);
5000 data[1] = le64_to_cpu(tally.rx_packets);
5001 data[2] = le64_to_cpu(tally.tx_errors);
5002 data[3] = le32_to_cpu(tally.rx_errors);
5003 data[4] = le16_to_cpu(tally.rx_missed);
5004 data[5] = le16_to_cpu(tally.align_errors);
5005 data[6] = le32_to_cpu(tally.tx_one_collision);
5006 data[7] = le32_to_cpu(tally.tx_multi_collision);
5007 data[8] = le64_to_cpu(tally.rx_unicast);
5008 data[9] = le64_to_cpu(tally.rx_broadcast);
5009 data[10] = le32_to_cpu(tally.rx_multicast);
5010 data[11] = le16_to_cpu(tally.tx_aborted);
5011 data[12] = le16_to_cpu(tally.tx_underrun);
5014 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5016 switch (stringset) {
5018 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
5023 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
5025 u32 lp, adv, supported = 0;
5028 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
5029 supported = mmd_eee_cap_to_ethtool_sup_t(val);
5031 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
5032 adv = mmd_eee_adv_to_ethtool_adv_t(val);
5034 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
5035 lp = mmd_eee_adv_to_ethtool_adv_t(val);
5037 eee->eee_enabled = tp->eee_en;
5038 eee->eee_active = !!(supported & adv & lp);
5039 eee->supported = supported;
5040 eee->advertised = tp->eee_adv;
5041 eee->lp_advertised = lp;
5046 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
5048 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
5050 tp->eee_en = eee->eee_enabled;
5053 rtl_eee_enable(tp, tp->eee_en);
5058 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
5060 u32 lp, adv, supported = 0;
5063 val = ocp_reg_read(tp, OCP_EEE_ABLE);
5064 supported = mmd_eee_cap_to_ethtool_sup_t(val);
5066 val = ocp_reg_read(tp, OCP_EEE_ADV);
5067 adv = mmd_eee_adv_to_ethtool_adv_t(val);
5069 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
5070 lp = mmd_eee_adv_to_ethtool_adv_t(val);
5072 eee->eee_enabled = tp->eee_en;
5073 eee->eee_active = !!(supported & adv & lp);
5074 eee->supported = supported;
5075 eee->advertised = tp->eee_adv;
5076 eee->lp_advertised = lp;
5082 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
5084 struct r8152 *tp = netdev_priv(net);
5087 ret = usb_autopm_get_interface(tp->intf);
5091 mutex_lock(&tp->control);
5093 ret = tp->rtl_ops.eee_get(tp, edata);
5095 mutex_unlock(&tp->control);
5097 usb_autopm_put_interface(tp->intf);
5104 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
5106 struct r8152 *tp = netdev_priv(net);
5109 ret = usb_autopm_get_interface(tp->intf);
5113 mutex_lock(&tp->control);
5115 ret = tp->rtl_ops.eee_set(tp, edata);
5117 ret = mii_nway_restart(&tp->mii);
5119 mutex_unlock(&tp->control);
5121 usb_autopm_put_interface(tp->intf);
5127 static int rtl8152_nway_reset(struct net_device *dev)
5129 struct r8152 *tp = netdev_priv(dev);
5132 ret = usb_autopm_get_interface(tp->intf);
5136 mutex_lock(&tp->control);
5138 ret = mii_nway_restart(&tp->mii);
5140 mutex_unlock(&tp->control);
5142 usb_autopm_put_interface(tp->intf);
5148 static int rtl8152_get_coalesce(struct net_device *netdev,
5149 struct ethtool_coalesce *coalesce)
5151 struct r8152 *tp = netdev_priv(netdev);
5153 switch (tp->version) {
5162 coalesce->rx_coalesce_usecs = tp->coalesce;
5167 static int rtl8152_set_coalesce(struct net_device *netdev,
5168 struct ethtool_coalesce *coalesce)
5170 struct r8152 *tp = netdev_priv(netdev);
5173 switch (tp->version) {
5182 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
5185 ret = usb_autopm_get_interface(tp->intf);
5189 mutex_lock(&tp->control);
5191 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
5192 tp->coalesce = coalesce->rx_coalesce_usecs;
5194 if (netif_running(netdev) && netif_carrier_ok(netdev)) {
5195 netif_stop_queue(netdev);
5196 napi_disable(&tp->napi);
5197 tp->rtl_ops.disable(tp);
5198 tp->rtl_ops.enable(tp);
5200 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
5201 _rtl8152_set_rx_mode(netdev);
5202 napi_enable(&tp->napi);
5203 netif_wake_queue(netdev);
5207 mutex_unlock(&tp->control);
5209 usb_autopm_put_interface(tp->intf);
5214 static int rtl8152_get_tunable(struct net_device *netdev,
5215 const struct ethtool_tunable *tunable, void *d)
5217 struct r8152 *tp = netdev_priv(netdev);
5219 switch (tunable->id) {
5220 case ETHTOOL_RX_COPYBREAK:
5221 *(u32 *)d = tp->rx_copybreak;
5230 static int rtl8152_set_tunable(struct net_device *netdev,
5231 const struct ethtool_tunable *tunable,
5234 struct r8152 *tp = netdev_priv(netdev);
5237 switch (tunable->id) {
5238 case ETHTOOL_RX_COPYBREAK:
5240 if (val < ETH_ZLEN) {
5241 netif_err(tp, rx_err, netdev,
5242 "Invalid rx copy break value\n");
5246 if (tp->rx_copybreak != val) {
5247 napi_disable(&tp->napi);
5248 tp->rx_copybreak = val;
5249 napi_enable(&tp->napi);
5259 static void rtl8152_get_ringparam(struct net_device *netdev,
5260 struct ethtool_ringparam *ring)
5262 struct r8152 *tp = netdev_priv(netdev);
5264 ring->rx_max_pending = RTL8152_RX_MAX_PENDING;
5265 ring->rx_pending = tp->rx_pending;
5268 static int rtl8152_set_ringparam(struct net_device *netdev,
5269 struct ethtool_ringparam *ring)
5271 struct r8152 *tp = netdev_priv(netdev);
5273 if (ring->rx_pending < (RTL8152_MAX_RX * 2))
5276 if (tp->rx_pending != ring->rx_pending) {
5277 napi_disable(&tp->napi);
5278 tp->rx_pending = ring->rx_pending;
5279 napi_enable(&tp->napi);
5285 static const struct ethtool_ops ops = {
5286 .get_drvinfo = rtl8152_get_drvinfo,
5287 .get_link = ethtool_op_get_link,
5288 .nway_reset = rtl8152_nway_reset,
5289 .get_msglevel = rtl8152_get_msglevel,
5290 .set_msglevel = rtl8152_set_msglevel,
5291 .get_wol = rtl8152_get_wol,
5292 .set_wol = rtl8152_set_wol,
5293 .get_strings = rtl8152_get_strings,
5294 .get_sset_count = rtl8152_get_sset_count,
5295 .get_ethtool_stats = rtl8152_get_ethtool_stats,
5296 .get_coalesce = rtl8152_get_coalesce,
5297 .set_coalesce = rtl8152_set_coalesce,
5298 .get_eee = rtl_ethtool_get_eee,
5299 .set_eee = rtl_ethtool_set_eee,
5300 .get_link_ksettings = rtl8152_get_link_ksettings,
5301 .set_link_ksettings = rtl8152_set_link_ksettings,
5302 .get_tunable = rtl8152_get_tunable,
5303 .set_tunable = rtl8152_set_tunable,
5304 .get_ringparam = rtl8152_get_ringparam,
5305 .set_ringparam = rtl8152_set_ringparam,
5308 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
5310 struct r8152 *tp = netdev_priv(netdev);
5311 struct mii_ioctl_data *data = if_mii(rq);
5314 if (test_bit(RTL8152_UNPLUG, &tp->flags))
5317 res = usb_autopm_get_interface(tp->intf);
5323 data->phy_id = R8152_PHY_ID; /* Internal PHY */
5327 mutex_lock(&tp->control);
5328 data->val_out = r8152_mdio_read(tp, data->reg_num);
5329 mutex_unlock(&tp->control);
5333 if (!capable(CAP_NET_ADMIN)) {
5337 mutex_lock(&tp->control);
5338 r8152_mdio_write(tp, data->reg_num, data->val_in);
5339 mutex_unlock(&tp->control);
5346 usb_autopm_put_interface(tp->intf);
5352 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
5354 struct r8152 *tp = netdev_priv(dev);
5357 switch (tp->version) {
5367 ret = usb_autopm_get_interface(tp->intf);
5371 mutex_lock(&tp->control);
5375 if (netif_running(dev)) {
5376 u32 rms = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
5378 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rms);
5380 if (netif_carrier_ok(dev))
5381 r8153_set_rx_early_size(tp);
5384 mutex_unlock(&tp->control);
5386 usb_autopm_put_interface(tp->intf);
5391 static const struct net_device_ops rtl8152_netdev_ops = {
5392 .ndo_open = rtl8152_open,
5393 .ndo_stop = rtl8152_close,
5394 .ndo_do_ioctl = rtl8152_ioctl,
5395 .ndo_start_xmit = rtl8152_start_xmit,
5396 .ndo_tx_timeout = rtl8152_tx_timeout,
5397 .ndo_set_features = rtl8152_set_features,
5398 .ndo_set_rx_mode = rtl8152_set_rx_mode,
5399 .ndo_set_mac_address = rtl8152_set_mac_address,
5400 .ndo_change_mtu = rtl8152_change_mtu,
5401 .ndo_validate_addr = eth_validate_addr,
5402 .ndo_features_check = rtl8152_features_check,
5405 static void rtl8152_unload(struct r8152 *tp)
5407 if (test_bit(RTL8152_UNPLUG, &tp->flags))
5410 if (tp->version != RTL_VER_01)
5411 r8152_power_cut_en(tp, true);
5414 static void rtl8153_unload(struct r8152 *tp)
5416 if (test_bit(RTL8152_UNPLUG, &tp->flags))
5419 r8153_power_cut_en(tp, false);
5422 static void rtl8153b_unload(struct r8152 *tp)
5424 if (test_bit(RTL8152_UNPLUG, &tp->flags))
5427 r8153b_power_cut_en(tp, false);
5430 static int rtl_ops_init(struct r8152 *tp)
5432 struct rtl_ops *ops = &tp->rtl_ops;
5435 switch (tp->version) {
5439 ops->init = r8152b_init;
5440 ops->enable = rtl8152_enable;
5441 ops->disable = rtl8152_disable;
5442 ops->up = rtl8152_up;
5443 ops->down = rtl8152_down;
5444 ops->unload = rtl8152_unload;
5445 ops->eee_get = r8152_get_eee;
5446 ops->eee_set = r8152_set_eee;
5447 ops->in_nway = rtl8152_in_nway;
5448 ops->hw_phy_cfg = r8152b_hw_phy_cfg;
5449 ops->autosuspend_en = rtl_runtime_suspend_enable;
5450 tp->rx_buf_sz = 16 * 1024;
5452 tp->eee_adv = MDIO_EEE_100TX;
5459 ops->init = r8153_init;
5460 ops->enable = rtl8153_enable;
5461 ops->disable = rtl8153_disable;
5462 ops->up = rtl8153_up;
5463 ops->down = rtl8153_down;
5464 ops->unload = rtl8153_unload;
5465 ops->eee_get = r8153_get_eee;
5466 ops->eee_set = r8152_set_eee;
5467 ops->in_nway = rtl8153_in_nway;
5468 ops->hw_phy_cfg = r8153_hw_phy_cfg;
5469 ops->autosuspend_en = rtl8153_runtime_enable;
5470 tp->rx_buf_sz = 32 * 1024;
5472 tp->eee_adv = MDIO_EEE_1000T | MDIO_EEE_100TX;
5477 ops->init = r8153b_init;
5478 ops->enable = rtl8153_enable;
5479 ops->disable = rtl8153_disable;
5480 ops->up = rtl8153b_up;
5481 ops->down = rtl8153b_down;
5482 ops->unload = rtl8153b_unload;
5483 ops->eee_get = r8153_get_eee;
5484 ops->eee_set = r8152_set_eee;
5485 ops->in_nway = rtl8153_in_nway;
5486 ops->hw_phy_cfg = r8153b_hw_phy_cfg;
5487 ops->autosuspend_en = rtl8153b_runtime_enable;
5488 tp->rx_buf_sz = 32 * 1024;
5490 tp->eee_adv = MDIO_EEE_1000T | MDIO_EEE_100TX;
5495 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
5502 static u8 rtl_get_version(struct usb_interface *intf)
5504 struct usb_device *udev = interface_to_usbdev(intf);
5510 tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
5514 ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
5515 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
5516 PLA_TCR0, MCU_TYPE_PLA, tmp, sizeof(*tmp), 500);
5518 ocp_data = (__le32_to_cpu(*tmp) >> 16) & VERSION_MASK;
5524 version = RTL_VER_01;
5527 version = RTL_VER_02;
5530 version = RTL_VER_03;
5533 version = RTL_VER_04;
5536 version = RTL_VER_05;
5539 version = RTL_VER_06;
5542 version = RTL_VER_07;
5545 version = RTL_VER_08;
5548 version = RTL_VER_09;
5551 version = RTL_VER_UNKNOWN;
5552 dev_info(&intf->dev, "Unknown version 0x%04x\n", ocp_data);
5556 dev_dbg(&intf->dev, "Detected version 0x%04x\n", version);
5561 static int rtl8152_probe(struct usb_interface *intf,
5562 const struct usb_device_id *id)
5564 struct usb_device *udev = interface_to_usbdev(intf);
5565 u8 version = rtl_get_version(intf);
5567 struct net_device *netdev;
5570 if (version == RTL_VER_UNKNOWN)
5573 if (udev->actconfig->desc.bConfigurationValue != 1) {
5574 usb_driver_set_configuration(udev, 1);
5578 usb_reset_device(udev);
5579 netdev = alloc_etherdev(sizeof(struct r8152));
5581 dev_err(&intf->dev, "Out of memory\n");
5585 SET_NETDEV_DEV(netdev, &intf->dev);
5586 tp = netdev_priv(netdev);
5587 tp->msg_enable = 0x7FFF;
5590 tp->netdev = netdev;
5592 tp->version = version;
5598 tp->mii.supports_gmii = 0;
5601 tp->mii.supports_gmii = 1;
5605 ret = rtl_ops_init(tp);
5609 mutex_init(&tp->control);
5610 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
5611 INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
5612 tasklet_init(&tp->tx_tl, bottom_half, (unsigned long)tp);
5613 tasklet_disable(&tp->tx_tl);
5615 netdev->netdev_ops = &rtl8152_netdev_ops;
5616 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
5618 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
5619 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
5620 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
5621 NETIF_F_HW_VLAN_CTAG_TX;
5622 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
5623 NETIF_F_TSO | NETIF_F_FRAGLIST |
5624 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
5625 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
5626 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
5627 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
5628 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
5630 if (tp->version == RTL_VER_01) {
5631 netdev->features &= ~NETIF_F_RXCSUM;
5632 netdev->hw_features &= ~NETIF_F_RXCSUM;
5635 if (le16_to_cpu(udev->descriptor.bcdDevice) == 0x3011 && udev->serial &&
5636 (!strcmp(udev->serial, "000001000000") || !strcmp(udev->serial, "000002000000"))) {
5637 dev_info(&udev->dev, "Dell TB16 Dock, disable RX aggregation");
5638 set_bit(DELL_TB_RX_AGG_BUG, &tp->flags);
5641 netdev->ethtool_ops = &ops;
5642 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
5644 /* MTU range: 68 - 1500 or 9194 */
5645 netdev->min_mtu = ETH_MIN_MTU;
5646 switch (tp->version) {
5649 netdev->max_mtu = ETH_DATA_LEN;
5652 netdev->max_mtu = RTL8153_MAX_MTU;
5656 tp->mii.dev = netdev;
5657 tp->mii.mdio_read = read_mii_word;
5658 tp->mii.mdio_write = write_mii_word;
5659 tp->mii.phy_id_mask = 0x3f;
5660 tp->mii.reg_num_mask = 0x1f;
5661 tp->mii.phy_id = R8152_PHY_ID;
5663 tp->autoneg = AUTONEG_ENABLE;
5664 tp->speed = SPEED_100;
5665 tp->advertising = RTL_ADVERTISED_10_HALF | RTL_ADVERTISED_10_FULL |
5666 RTL_ADVERTISED_100_HALF | RTL_ADVERTISED_100_FULL;
5667 if (tp->mii.supports_gmii) {
5668 tp->speed = SPEED_1000;
5669 tp->advertising |= RTL_ADVERTISED_1000_FULL;
5671 tp->duplex = DUPLEX_FULL;
5673 tp->rx_copybreak = RTL8152_RXFG_HEADSZ;
5674 tp->rx_pending = 10 * RTL8152_MAX_RX;
5676 intf->needs_remote_wakeup = 1;
5678 tp->rtl_ops.init(tp);
5679 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
5680 set_ethernet_addr(tp);
5682 usb_set_intfdata(intf, tp);
5683 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
5685 ret = register_netdev(netdev);
5687 netif_err(tp, probe, netdev, "couldn't register the device\n");
5691 if (!rtl_can_wakeup(tp))
5692 __rtl_set_wol(tp, 0);
5694 tp->saved_wolopts = __rtl_get_wol(tp);
5695 if (tp->saved_wolopts)
5696 device_set_wakeup_enable(&udev->dev, true);
5698 device_set_wakeup_enable(&udev->dev, false);
5700 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
5705 tasklet_kill(&tp->tx_tl);
5706 usb_set_intfdata(intf, NULL);
5708 free_netdev(netdev);
5712 static void rtl8152_disconnect(struct usb_interface *intf)
5714 struct r8152 *tp = usb_get_intfdata(intf);
5716 usb_set_intfdata(intf, NULL);
5720 unregister_netdev(tp->netdev);
5721 tasklet_kill(&tp->tx_tl);
5722 cancel_delayed_work_sync(&tp->hw_phy_work);
5723 tp->rtl_ops.unload(tp);
5724 free_netdev(tp->netdev);
5728 #define REALTEK_USB_DEVICE(vend, prod) \
5729 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
5730 USB_DEVICE_ID_MATCH_INT_CLASS, \
5731 .idVendor = (vend), \
5732 .idProduct = (prod), \
5733 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
5736 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
5737 USB_DEVICE_ID_MATCH_DEVICE, \
5738 .idVendor = (vend), \
5739 .idProduct = (prod), \
5740 .bInterfaceClass = USB_CLASS_COMM, \
5741 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
5742 .bInterfaceProtocol = USB_CDC_PROTO_NONE
5744 /* table of devices that work with this driver */
5745 static const struct usb_device_id rtl8152_table[] = {
5746 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8050)},
5747 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
5748 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
5749 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07ab)},
5750 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07c6)},
5751 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
5752 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
5753 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3062)},
5754 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3069)},
5755 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
5756 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x720c)},
5757 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7214)},
5758 {REALTEK_USB_DEVICE(VENDOR_ID_LINKSYS, 0x0041)},
5759 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
5760 {REALTEK_USB_DEVICE(VENDOR_ID_TPLINK, 0x0601)},
5764 MODULE_DEVICE_TABLE(usb, rtl8152_table);
5766 static struct usb_driver rtl8152_driver = {
5768 .id_table = rtl8152_table,
5769 .probe = rtl8152_probe,
5770 .disconnect = rtl8152_disconnect,
5771 .suspend = rtl8152_suspend,
5772 .resume = rtl8152_resume,
5773 .reset_resume = rtl8152_reset_resume,
5774 .pre_reset = rtl8152_pre_reset,
5775 .post_reset = rtl8152_post_reset,
5776 .supports_autosuspend = 1,
5777 .disable_hub_initiated_lpm = 1,
5780 module_usb_driver(rtl8152_driver);
5782 MODULE_AUTHOR(DRIVER_AUTHOR);
5783 MODULE_DESCRIPTION(DRIVER_DESC);
5784 MODULE_LICENSE("GPL");
5785 MODULE_VERSION(DRIVER_VERSION);