drivers/net/usb/r8152.c

   1 /*
   2  *  Copyright (c) 2013 Realtek Semiconductor Corp. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License
   6  * version 2 as published by the Free Software Foundation.
   7  *
   8  */
   9
  10 #include <linux/init.h>
  11 #include <linux/signal.h>
  12 #include <linux/slab.h>
  13 #include <linux/module.h>
  14 #include <linux/netdevice.h>
  15 #include <linux/etherdevice.h>
  16 #include <linux/mii.h>
  17 #include <linux/ethtool.h>
  18 #include <linux/usb.h>
  19 #include <linux/crc32.h>
  20 #include <linux/if_vlan.h>
  21 #include <linux/uaccess.h>
  22 #include <linux/list.h>
  23 #include <linux/ip.h>
  24 #include <linux/ipv6.h>
  25
  26 /* Version Information */
  27 #define DRIVER_VERSION "v1.02.0 (2013/10/28)"
  28 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
  29 #define DRIVER_DESC "Realtek RTL8152 Based USB 2.0 Ethernet Adapters"
  30 #define MODULENAME "r8152"
  31
  32 #define R8152_PHY_ID            32
  33
  34 #define PLA_IDR                 0xc000
  35 #define PLA_RCR                 0xc010
  36 #define PLA_RMS                 0xc016
  37 #define PLA_RXFIFO_CTRL0        0xc0a0
  38 #define PLA_RXFIFO_CTRL1        0xc0a4
  39 #define PLA_RXFIFO_CTRL2        0xc0a8
  40 #define PLA_FMC                 0xc0b4
  41 #define PLA_CFG_WOL             0xc0b6
  42 #define PLA_MAR                 0xcd00
  43 #define PAL_BDC_CR              0xd1a0
  44 #define PLA_LEDSEL              0xdd90
  45 #define PLA_LED_FEATURE         0xdd92
  46 #define PLA_PHYAR               0xde00
  47 #define PLA_GPHY_INTR_IMR       0xe022
  48 #define PLA_EEE_CR              0xe040
  49 #define PLA_EEEP_CR             0xe080
  50 #define PLA_MAC_PWR_CTRL        0xe0c0
  51 #define PLA_TCR0                0xe610
  52 #define PLA_TCR1                0xe612
  53 #define PLA_TXFIFO_CTRL         0xe618
  54 #define PLA_RSTTELLY            0xe800
  55 #define PLA_CR                  0xe813
  56 #define PLA_CRWECR              0xe81c
  57 #define PLA_CONFIG5             0xe822
  58 #define PLA_PHY_PWR             0xe84c
  59 #define PLA_OOB_CTRL            0xe84f
  60 #define PLA_CPCR                0xe854
  61 #define PLA_MISC_0              0xe858
  62 #define PLA_MISC_1              0xe85a
  63 #define PLA_OCP_GPHY_BASE       0xe86c
  64 #define PLA_TELLYCNT            0xe890
  65 #define PLA_SFF_STS_7           0xe8de
  66 #define PLA_PHYSTATUS           0xe908
  67 #define PLA_BP_BA               0xfc26
  68 #define PLA_BP_0                0xfc28
  69 #define PLA_BP_1                0xfc2a
  70 #define PLA_BP_2                0xfc2c
  71 #define PLA_BP_3                0xfc2e
  72 #define PLA_BP_4                0xfc30
  73 #define PLA_BP_5                0xfc32
  74 #define PLA_BP_6                0xfc34
  75 #define PLA_BP_7                0xfc36
  76
  77 #define USB_DEV_STAT            0xb808
  78 #define USB_USB_CTRL            0xd406
  79 #define USB_PHY_CTRL            0xd408
  80 #define USB_TX_AGG              0xd40a
  81 #define USB_RX_BUF_TH           0xd40c
  82 #define USB_USB_TIMER           0xd428
  83 #define USB_PM_CTRL_STATUS      0xd432
  84 #define USB_TX_DMA              0xd434
  85 #define USB_UPS_CTRL            0xd800
  86 #define USB_BP_BA               0xfc26
  87 #define USB_BP_0                0xfc28
  88 #define USB_BP_1                0xfc2a
  89 #define USB_BP_2                0xfc2c
  90 #define USB_BP_3                0xfc2e
  91 #define USB_BP_4                0xfc30
  92 #define USB_BP_5                0xfc32
  93 #define USB_BP_6                0xfc34
  94 #define USB_BP_7                0xfc36
  95
  96 /* OCP Registers */
  97 #define OCP_ALDPS_CONFIG        0x2010
  98 #define OCP_EEE_CONFIG1         0x2080
  99 #define OCP_EEE_CONFIG2         0x2092
 100 #define OCP_EEE_CONFIG3         0x2094
 101 #define OCP_BASE_MII            0xa400
 102 #define OCP_EEE_AR              0xa41a
 103 #define OCP_EEE_DATA            0xa41c
 104
 105 /* PLA_RCR */
 106 #define RCR_AAP                 0x00000001
 107 #define RCR_APM                 0x00000002
 108 #define RCR_AM                  0x00000004
 109 #define RCR_AB                  0x00000008
 110 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
 111
 112 /* PLA_RXFIFO_CTRL0 */
 113 #define RXFIFO_THR1_NORMAL      0x00080002
 114 #define RXFIFO_THR1_OOB         0x01800003
 115
 116 /* PLA_RXFIFO_CTRL1 */
 117 #define RXFIFO_THR2_FULL        0x00000060
 118 #define RXFIFO_THR2_HIGH        0x00000038
 119 #define RXFIFO_THR2_OOB         0x0000004a
 120
 121 /* PLA_RXFIFO_CTRL2 */
 122 #define RXFIFO_THR3_FULL        0x00000078
 123 #define RXFIFO_THR3_HIGH        0x00000048
 124 #define RXFIFO_THR3_OOB         0x0000005a
 125
 126 /* PLA_TXFIFO_CTRL */
 127 #define TXFIFO_THR_NORMAL       0x00400008
 128
 129 /* PLA_FMC */
 130 #define FMC_FCR_MCU_EN          0x0001
 131
 132 /* PLA_EEEP_CR */
 133 #define EEEP_CR_EEEP_TX         0x0002
 134
 135 /* PLA_TCR0 */
 136 #define TCR0_TX_EMPTY           0x0800
 137 #define TCR0_AUTO_FIFO          0x0080
 138
 139 /* PLA_TCR1 */
 140 #define VERSION_MASK            0x7cf0
 141
 142 /* PLA_CR */
 143 #define CR_RST                  0x10
 144 #define CR_RE                   0x08
 145 #define CR_TE                   0x04
 146
 147 /* PLA_CRWECR */
 148 #define CRWECR_NORAML           0x00
 149 #define CRWECR_CONFIG           0xc0
 150
 151 /* PLA_OOB_CTRL */
 152 #define NOW_IS_OOB              0x80
 153 #define TXFIFO_EMPTY            0x20
 154 #define RXFIFO_EMPTY            0x10
 155 #define LINK_LIST_READY         0x02
 156 #define DIS_MCU_CLROOB          0x01
 157 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
 158
 159 /* PLA_MISC_1 */
 160 #define RXDY_GATED_EN           0x0008
 161
 162 /* PLA_SFF_STS_7 */
 163 #define RE_INIT_LL              0x8000
 164 #define MCU_BORW_EN             0x4000
 165
 166 /* PLA_CPCR */
 167 #define CPCR_RX_VLAN            0x0040
 168
 169 /* PLA_CFG_WOL */
 170 #define MAGIC_EN                0x0001
 171
 172 /* PAL_BDC_CR */
 173 #define ALDPS_PROXY_MODE        0x0001
 174
 175 /* PLA_CONFIG5 */
 176 #define LAN_WAKE_EN             0x0002
 177
 178 /* PLA_LED_FEATURE */
 179 #define LED_MODE_MASK           0x0700
 180
 181 /* PLA_PHY_PWR */
 182 #define TX_10M_IDLE_EN          0x0080
 183 #define PFM_PWM_SWITCH          0x0040
 184
 185 /* PLA_MAC_PWR_CTRL */
 186 #define D3_CLK_GATED_EN         0x00004000
 187 #define MCU_CLK_RATIO           0x07010f07
 188 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
 189
 190 /* PLA_GPHY_INTR_IMR */
 191 #define GPHY_STS_MSK            0x0001
 192 #define SPEED_DOWN_MSK          0x0002
 193 #define SPDWN_RXDV_MSK          0x0004
 194 #define SPDWN_LINKCHG_MSK       0x0008
 195
 196 /* PLA_PHYAR */
 197 #define PHYAR_FLAG              0x80000000
 198
 199 /* PLA_EEE_CR */
 200 #define EEE_RX_EN               0x0001
 201 #define EEE_TX_EN               0x0002
 202
 203 /* USB_DEV_STAT */
 204 #define STAT_SPEED_MASK         0x0006
 205 #define STAT_SPEED_HIGH         0x0000
 206 #define STAT_SPEED_FULL         0x0001
 207
 208 /* USB_TX_AGG */
 209 #define TX_AGG_MAX_THRESHOLD    0x03
 210
 211 /* USB_RX_BUF_TH */
 212 #define RX_THR_HIGH             0x7a120180
 213
 214 /* USB_TX_DMA */
 215 #define TEST_MODE_DISABLE       0x00000001
 216 #define TX_SIZE_ADJUST1         0x00000100
 217
 218 /* USB_UPS_CTRL */
 219 #define POWER_CUT               0x0100
 220
 221 /* USB_PM_CTRL_STATUS */
 222 #define RESUME_INDICATE         0x0001
 223
 224 /* USB_USB_CTRL */
 225 #define RX_AGG_DISABLE          0x0010
 226
 227 /* OCP_ALDPS_CONFIG */
 228 #define ENPWRSAVE               0x8000
 229 #define ENPDNPS                 0x0200
 230 #define LINKENA                 0x0100
 231 #define DIS_SDSAVE              0x0010
 232
 233 /* OCP_EEE_CONFIG1 */
 234 #define RG_TXLPI_MSK_HFDUP      0x8000
 235 #define RG_MATCLR_EN            0x4000
 236 #define EEE_10_CAP              0x2000
 237 #define EEE_NWAY_EN             0x1000
 238 #define TX_QUIET_EN             0x0200
 239 #define RX_QUIET_EN             0x0100
 240 #define SDRISETIME              0x0010  /* bit 4 ~ 6 */
 241 #define RG_RXLPI_MSK_HFDUP      0x0008
 242 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
 243
 244 /* OCP_EEE_CONFIG2 */
 245 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
 246 #define RG_DACQUIET_EN          0x0400
 247 #define RG_LDVQUIET_EN          0x0200
 248 #define RG_CKRSEL               0x0020
 249 #define RG_EEEPRG_EN            0x0010
 250
 251 /* OCP_EEE_CONFIG3 */
 252 #define FST_SNR_EYE_R           0x1500  /* bit 7 ~ 15 */
 253 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
 254 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
 255
 256 /* OCP_EEE_AR */
 257 /* bit[15:14] function */
 258 #define FUN_ADDR                0x0000
 259 #define FUN_DATA                0x4000
 260 /* bit[4:0] device addr */
 261 #define DEVICE_ADDR             0x0007
 262
 263 /* OCP_EEE_DATA */
 264 #define EEE_ADDR                0x003C
 265 #define EEE_DATA                0x0002
 266
 267 enum rtl_register_content {
 268         _100bps         = 0x08,
 269         _10bps          = 0x04,
 270         LINK_STATUS     = 0x02,
 271         FULL_DUP        = 0x01,
 272 };
 273
 274 #define RTL8152_MAX_TX          10
 275 #define RTL8152_MAX_RX          10
 276 #define INTBUFSIZE              2
 277 #define CRC_SIZE                4
 278 #define TX_ALIGN                4
 279 #define RX_ALIGN                8
 280
 281 #define INTR_LINK               0x0004
 282
 283 #define RTL8152_REQT_READ       0xc0
 284 #define RTL8152_REQT_WRITE      0x40
 285 #define RTL8152_REQ_GET_REGS    0x05
 286 #define RTL8152_REQ_SET_REGS    0x05
 287
 288 #define BYTE_EN_DWORD           0xff
 289 #define BYTE_EN_WORD            0x33
 290 #define BYTE_EN_BYTE            0x11
 291 #define BYTE_EN_SIX_BYTES       0x3f
 292 #define BYTE_EN_START_MASK      0x0f
 293 #define BYTE_EN_END_MASK        0xf0
 294
 295 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
 296 #define RTL8152_TX_TIMEOUT      (HZ)
 297
 298 /* rtl8152 flags */
 299 enum rtl8152_flags {
 300         RTL8152_UNPLUG = 0,
 301         RTL8152_SET_RX_MODE,
 302         WORK_ENABLE,
 303         RTL8152_LINK_CHG,
 304 };
 305
 306 /* Define these values to match your device */
 307 #define VENDOR_ID_REALTEK               0x0bda
 308 #define PRODUCT_ID_RTL8152              0x8152
 309
 310 #define MCU_TYPE_PLA                    0x0100
 311 #define MCU_TYPE_USB                    0x0000
 312
 313 struct rx_desc {
 314         __le32 opts1;
 315 #define RX_LEN_MASK                     0x7fff
 316         __le32 opts2;
 317         __le32 opts3;
 318         __le32 opts4;
 319         __le32 opts5;
 320         __le32 opts6;
 321 };
 322
 323 struct tx_desc {
 324         __le32 opts1;
 325 #define TX_FS                   (1 << 31) /* First segment of a packet */
 326 #define TX_LS                   (1 << 30) /* Final segment of a packet */
 327 #define TX_LEN_MASK             0x3ffff
 328
 329         __le32 opts2;
 330 #define UDP_CS                  (1 << 31) /* Calculate UDP/IP checksum */
 331 #define TCP_CS                  (1 << 30) /* Calculate TCP/IP checksum */
 332 #define IPV4_CS                 (1 << 29) /* Calculate IPv4 checksum */
 333 #define IPV6_CS                 (1 << 28) /* Calculate IPv6 checksum */
 334 };
 335
 336 struct r8152;
 337
 338 struct rx_agg {
 339         struct list_head list;
 340         struct urb *urb;
 341         struct r8152 *context;
 342         void *buffer;
 343         void *head;
 344 };
 345
 346 struct tx_agg {
 347         struct list_head list;
 348         struct urb *urb;
 349         struct r8152 *context;
 350         void *buffer;
 351         void *head;
 352         u32 skb_num;
 353         u32 skb_len;
 354 };
 355
 356 struct r8152 {
 357         unsigned long flags;
 358         struct usb_device *udev;
 359         struct tasklet_struct tl;
 360         struct usb_interface *intf;
 361         struct net_device *netdev;
 362         struct urb *intr_urb;
 363         struct tx_agg tx_info[RTL8152_MAX_TX];
 364         struct rx_agg rx_info[RTL8152_MAX_RX];
 365         struct list_head rx_done, tx_free;
 366         struct sk_buff_head tx_queue;
 367         spinlock_t rx_lock, tx_lock;
 368         struct delayed_work schedule;
 369         struct mii_if_info mii;
 370
 371         struct rtl_ops {
 372                 void (*init)(struct r8152 *);
 373                 int (*enable)(struct r8152 *);
 374                 void (*disable)(struct r8152 *);
 375                 void (*down)(struct r8152 *);
 376                 void (*unload)(struct r8152 *);
 377         } rtl_ops;
 378
 379         int intr_interval;
 380         u32 msg_enable;
 381         u32 tx_qlen;
 382         u16 ocp_base;
 383         u8 *intr_buff;
 384         u8 version;
 385         u8 speed;
 386 };
 387
 388 enum rtl_version {
 389         RTL_VER_UNKNOWN = 0,
 390         RTL_VER_01,
 391         RTL_VER_02
 392 };
 393
 394 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
 395  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
 396  */
 397 static const int multicast_filter_limit = 32;
 398 static unsigned int rx_buf_sz = 16384;
 399
 400 static
 401 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
 402 {
 403         int ret;
 404         void *tmp;
 405
 406         tmp = kmalloc(size, GFP_KERNEL);
 407         if (!tmp)
 408                 return -ENOMEM;
 409
 410         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
 411                                RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
 412                                value, index, tmp, size, 500);
 413
 414         memcpy(data, tmp, size);
 415         kfree(tmp);
 416
 417         return ret;
 418 }
 419
 420 static
 421 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
 422 {
 423         int ret;
 424         void *tmp;
 425
 426         tmp = kmalloc(size, GFP_KERNEL);
 427         if (!tmp)
 428                 return -ENOMEM;
 429
 430         memcpy(tmp, data, size);
 431
 432         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
 433                                RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
 434                                value, index, tmp, size, 500);
 435
 436         kfree(tmp);
 437         return ret;
 438 }
 439
 440 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
 441                                 void *data, u16 type)
 442 {
 443         u16     limit = 64;
 444         int     ret = 0;
 445
 446         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 447                 return -ENODEV;
 448
 449         /* both size and indix must be 4 bytes align */
 450         if ((size & 3) || !size || (index & 3) || !data)
 451                 return -EPERM;
 452
 453         if ((u32)index + (u32)size > 0xffff)
 454                 return -EPERM;
 455
 456         while (size) {
 457                 if (size > limit) {
 458                         ret = get_registers(tp, index, type, limit, data);
 459                         if (ret < 0)
 460                                 break;
 461
 462                         index += limit;
 463                         data += limit;
 464                         size -= limit;
 465                 } else {
 466                         ret = get_registers(tp, index, type, size, data);
 467                         if (ret < 0)
 468                                 break;
 469
 470                         index += size;
 471                         data += size;
 472                         size = 0;
 473                         break;
 474                 }
 475         }
 476
 477         return ret;
 478 }
 479
 480 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
 481                                 u16 size, void *data, u16 type)
 482 {
 483         int     ret;
 484         u16     byteen_start, byteen_end, byen;
 485         u16     limit = 512;
 486
 487         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 488                 return -ENODEV;
 489
 490         /* both size and indix must be 4 bytes align */
 491         if ((size & 3) || !size || (index & 3) || !data)
 492                 return -EPERM;
 493
 494         if ((u32)index + (u32)size > 0xffff)
 495                 return -EPERM;
 496
 497         byteen_start = byteen & BYTE_EN_START_MASK;
 498         byteen_end = byteen & BYTE_EN_END_MASK;
 499
 500         byen = byteen_start | (byteen_start << 4);
 501         ret = set_registers(tp, index, type | byen, 4, data);
 502         if (ret < 0)
 503                 goto error1;
 504
 505         index += 4;
 506         data += 4;
 507         size -= 4;
 508
 509         if (size) {
 510                 size -= 4;
 511
 512                 while (size) {
 513                         if (size > limit) {
 514                                 ret = set_registers(tp, index,
 515                                         type | BYTE_EN_DWORD,
 516                                         limit, data);
 517                                 if (ret < 0)
 518                                         goto error1;
 519
 520                                 index += limit;
 521                                 data += limit;
 522                                 size -= limit;
 523                         } else {
 524                                 ret = set_registers(tp, index,
 525                                         type | BYTE_EN_DWORD,
 526                                         size, data);
 527                                 if (ret < 0)
 528                                         goto error1;
 529
 530                                 index += size;
 531                                 data += size;
 532                                 size = 0;
 533                                 break;
 534                         }
 535                 }
 536
 537                 byen = byteen_end | (byteen_end >> 4);
 538                 ret = set_registers(tp, index, type | byen, 4, data);
 539                 if (ret < 0)
 540                         goto error1;
 541         }
 542
 543 error1:
 544         return ret;
 545 }
 546
 547 static inline
 548 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
 549 {
 550         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
 551 }
 552
 553 static inline
 554 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
 555 {
 556         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
 557 }
 558
 559 static inline
 560 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
 561 {
 562         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
 563 }
 564
 565 static inline
 566 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
 567 {
 568         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
 569 }
 570
 571 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
 572 {
 573         __le32 data;
 574
 575         generic_ocp_read(tp, index, sizeof(data), &data, type);
 576
 577         return __le32_to_cpu(data);
 578 }
 579
 580 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
 581 {
 582         __le32 tmp = __cpu_to_le32(data);
 583
 584         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
 585 }
 586
 587 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
 588 {
 589         u32 data;
 590         __le32 tmp;
 591         u8 shift = index & 2;
 592
 593         index &= ~3;
 594
 595         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 596
 597         data = __le32_to_cpu(tmp);
 598         data >>= (shift * 8);
 599         data &= 0xffff;
 600
 601         return (u16)data;
 602 }
 603
 604 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
 605 {
 606         u32 mask = 0xffff;
 607         __le32 tmp;
 608         u16 byen = BYTE_EN_WORD;
 609         u8 shift = index & 2;
 610
 611         data &= mask;
 612
 613         if (index & 2) {
 614                 byen <<= shift;
 615                 mask <<= (shift * 8);
 616                 data <<= (shift * 8);
 617                 index &= ~3;
 618         }
 619
 620         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 621
 622         data |= __le32_to_cpu(tmp) & ~mask;
 623         tmp = __cpu_to_le32(data);
 624
 625         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
 626 }
 627
 628 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
 629 {
 630         u32 data;
 631         __le32 tmp;
 632         u8 shift = index & 3;
 633
 634         index &= ~3;
 635
 636         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 637
 638         data = __le32_to_cpu(tmp);
 639         data >>= (shift * 8);
 640         data &= 0xff;
 641
 642         return (u8)data;
 643 }
 644
 645 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
 646 {
 647         u32 mask = 0xff;
 648         __le32 tmp;
 649         u16 byen = BYTE_EN_BYTE;
 650         u8 shift = index & 3;
 651
 652         data &= mask;
 653
 654         if (index & 3) {
 655                 byen <<= shift;
 656                 mask <<= (shift * 8);
 657                 data <<= (shift * 8);
 658                 index &= ~3;
 659         }
 660
 661         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 662
 663         data |= __le32_to_cpu(tmp) & ~mask;
 664         tmp = __cpu_to_le32(data);
 665
 666         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
 667 }
 668
 669 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
 670 {
 671         u16 ocp_base, ocp_index;
 672
 673         ocp_base = addr & 0xf000;
 674         if (ocp_base != tp->ocp_base) {
 675                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
 676                 tp->ocp_base = ocp_base;
 677         }
 678
 679         ocp_index = (addr & 0x0fff) | 0xb000;
 680         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
 681 }
 682
 683 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
 684 {
 685         u16 ocp_base, ocp_index;
 686
 687         ocp_base = addr & 0xf000;
 688         if (ocp_base != tp->ocp_base) {
 689                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
 690                 tp->ocp_base = ocp_base;
 691         }
 692
 693         ocp_index = (addr & 0x0fff) | 0xb000;
 694         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
 695 }
 696
 697 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
 698 {
 699         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
 700 }
 701
 702 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
 703 {
 704         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
 705 }
 706
 707 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
 708 {
 709         struct r8152 *tp = netdev_priv(netdev);
 710
 711         if (phy_id != R8152_PHY_ID)
 712                 return -EINVAL;
 713
 714         return r8152_mdio_read(tp, reg);
 715 }
 716
 717 static
 718 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
 719 {
 720         struct r8152 *tp = netdev_priv(netdev);
 721
 722         if (phy_id != R8152_PHY_ID)
 723                 return;
 724
 725         r8152_mdio_write(tp, reg, val);
 726 }
 727
 728 static
 729 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
 730
 731 static inline void set_ethernet_addr(struct r8152 *tp)
 732 {
 733         struct net_device *dev = tp->netdev;
 734         u8 node_id[8] = {0};
 735
 736         if (pla_ocp_read(tp, PLA_IDR, sizeof(node_id), node_id) < 0)
 737                 netif_notice(tp, probe, dev, "inet addr fail\n");
 738         else {
 739                 memcpy(dev->dev_addr, node_id, dev->addr_len);
 740                 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
 741         }
 742 }
 743
 744 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
 745 {
 746         struct r8152 *tp = netdev_priv(netdev);
 747         struct sockaddr *addr = p;
 748
 749         if (!is_valid_ether_addr(addr->sa_data))
 750                 return -EADDRNOTAVAIL;
 751
 752         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
 753
 754         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
 755         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
 756         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
 757
 758         return 0;
 759 }
 760
 761 static struct net_device_stats *rtl8152_get_stats(struct net_device *dev)
 762 {
 763         return &dev->stats;
 764 }
 765
 766 static void read_bulk_callback(struct urb *urb)
 767 {
 768         struct net_device *netdev;
 769         unsigned long flags;
 770         int status = urb->status;
 771         struct rx_agg *agg;
 772         struct r8152 *tp;
 773         int result;
 774
 775         agg = urb->context;
 776         if (!agg)
 777                 return;
 778
 779         tp = agg->context;
 780         if (!tp)
 781                 return;
 782
 783         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 784                 return;
 785
 786         if (!test_bit(WORK_ENABLE, &tp->flags))
 787                 return;
 788
 789         netdev = tp->netdev;
 790
 791         /* When link down, the driver would cancel all bulks. */
 792         /* This avoid the re-submitting bulk */
 793         if (!netif_carrier_ok(netdev))
 794                 return;
 795
 796         switch (status) {
 797         case 0:
 798                 if (urb->actual_length < ETH_ZLEN)
 799                         break;
 800
 801                 spin_lock_irqsave(&tp->rx_lock, flags);
 802                 list_add_tail(&agg->list, &tp->rx_done);
 803                 spin_unlock_irqrestore(&tp->rx_lock, flags);
 804                 tasklet_schedule(&tp->tl);
 805                 return;
 806         case -ESHUTDOWN:
 807                 set_bit(RTL8152_UNPLUG, &tp->flags);
 808                 netif_device_detach(tp->netdev);
 809                 return;
 810         case -ENOENT:
 811                 return; /* the urb is in unlink state */
 812         case -ETIME:
 813                 pr_warn_ratelimited("may be reset is needed?..\n");
 814                 break;
 815         default:
 816                 pr_warn_ratelimited("Rx status %d\n", status);
 817                 break;
 818         }
 819
 820         result = r8152_submit_rx(tp, agg, GFP_ATOMIC);
 821         if (result == -ENODEV) {
 822                 netif_device_detach(tp->netdev);
 823         } else if (result) {
 824                 spin_lock_irqsave(&tp->rx_lock, flags);
 825                 list_add_tail(&agg->list, &tp->rx_done);
 826                 spin_unlock_irqrestore(&tp->rx_lock, flags);
 827                 tasklet_schedule(&tp->tl);
 828         }
 829 }
 830
 831 static void write_bulk_callback(struct urb *urb)
 832 {
 833         struct net_device_stats *stats;
 834         unsigned long flags;
 835         struct tx_agg *agg;
 836         struct r8152 *tp;
 837         int status = urb->status;
 838
 839         agg = urb->context;
 840         if (!agg)
 841                 return;
 842
 843         tp = agg->context;
 844         if (!tp)
 845                 return;
 846
 847         stats = rtl8152_get_stats(tp->netdev);
 848         if (status) {
 849                 pr_warn_ratelimited("Tx status %d\n", status);
 850                 stats->tx_errors += agg->skb_num;
 851         } else {
 852                 stats->tx_packets += agg->skb_num;
 853                 stats->tx_bytes += agg->skb_len;
 854         }
 855
 856         spin_lock_irqsave(&tp->tx_lock, flags);
 857         list_add_tail(&agg->list, &tp->tx_free);
 858         spin_unlock_irqrestore(&tp->tx_lock, flags);
 859
 860         if (!netif_carrier_ok(tp->netdev))
 861                 return;
 862
 863         if (!test_bit(WORK_ENABLE, &tp->flags))
 864                 return;
 865
 866         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 867                 return;
 868
 869         if (!skb_queue_empty(&tp->tx_queue))
 870                 tasklet_schedule(&tp->tl);
 871 }
 872
 873 static void intr_callback(struct urb *urb)
 874 {
 875         struct r8152 *tp;
 876         __le16 *d;
 877         int status = urb->status;
 878         int res;
 879
 880         tp = urb->context;
 881         if (!tp)
 882                 return;
 883
 884         if (!test_bit(WORK_ENABLE, &tp->flags))
 885                 return;
 886
 887         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 888                 return;
 889
 890         switch (status) {
 891         case 0:                 /* success */
 892                 break;
 893         case -ECONNRESET:       /* unlink */
 894         case -ESHUTDOWN:
 895                 netif_device_detach(tp->netdev);
 896         case -ENOENT:
 897                 return;
 898         case -EOVERFLOW:
 899                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
 900                 goto resubmit;
 901         /* -EPIPE:  should clear the halt */
 902         default:
 903                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
 904                 goto resubmit;
 905         }
 906
 907         d = urb->transfer_buffer;
 908         if (INTR_LINK & __le16_to_cpu(d[0])) {
 909                 if (!(tp->speed & LINK_STATUS)) {
 910                         set_bit(RTL8152_LINK_CHG, &tp->flags);
 911                         schedule_delayed_work(&tp->schedule, 0);
 912                 }
 913         } else {
 914                 if (tp->speed & LINK_STATUS) {
 915                         set_bit(RTL8152_LINK_CHG, &tp->flags);
 916                         schedule_delayed_work(&tp->schedule, 0);
 917                 }
 918         }
 919
 920 resubmit:
 921         res = usb_submit_urb(urb, GFP_ATOMIC);
 922         if (res == -ENODEV)
 923                 netif_device_detach(tp->netdev);
 924         else if (res)
 925                 netif_err(tp, intr, tp->netdev,
 926                         "can't resubmit intr, status %d\n", res);
 927 }
 928
 929 static inline void *rx_agg_align(void *data)
 930 {
 931         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
 932 }
 933
 934 static inline void *tx_agg_align(void *data)
 935 {
 936         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
 937 }
 938
 939 static void free_all_mem(struct r8152 *tp)
 940 {
 941         int i;
 942
 943         for (i = 0; i < RTL8152_MAX_RX; i++) {
 944                 if (tp->rx_info[i].urb) {
 945                         usb_free_urb(tp->rx_info[i].urb);
 946                         tp->rx_info[i].urb = NULL;
 947                 }
 948
 949                 if (tp->rx_info[i].buffer) {
 950                         kfree(tp->rx_info[i].buffer);
 951                         tp->rx_info[i].buffer = NULL;
 952                         tp->rx_info[i].head = NULL;
 953                 }
 954         }
 955
 956         for (i = 0; i < RTL8152_MAX_TX; i++) {
 957                 if (tp->tx_info[i].urb) {
 958                         usb_free_urb(tp->tx_info[i].urb);
 959                         tp->tx_info[i].urb = NULL;
 960                 }
 961
 962                 if (tp->tx_info[i].buffer) {
 963                         kfree(tp->tx_info[i].buffer);
 964                         tp->tx_info[i].buffer = NULL;
 965                         tp->tx_info[i].head = NULL;
 966                 }
 967         }
 968
 969         if (tp->intr_urb) {
 970                 usb_free_urb(tp->intr_urb);
 971                 tp->intr_urb = NULL;
 972         }
 973
 974         if (tp->intr_buff) {
 975                 kfree(tp->intr_buff);
 976                 tp->intr_buff = NULL;
 977         }
 978 }
 979
 980 static int alloc_all_mem(struct r8152 *tp)
 981 {
 982         struct net_device *netdev = tp->netdev;
 983         struct usb_interface *intf = tp->intf;
 984         struct usb_host_interface *alt = intf->cur_altsetting;
 985         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
 986         struct urb *urb;
 987         int node, i;
 988         u8 *buf;
 989
 990         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
 991
 992         spin_lock_init(&tp->rx_lock);
 993         spin_lock_init(&tp->tx_lock);
 994         INIT_LIST_HEAD(&tp->rx_done);
 995         INIT_LIST_HEAD(&tp->tx_free);
 996         skb_queue_head_init(&tp->tx_queue);
 997
 998         for (i = 0; i < RTL8152_MAX_RX; i++) {
 999                 buf = kmalloc_node(rx_buf_sz, GFP_KERNEL, node);
1000                 if (!buf)
1001                         goto err1;
1002
1003                 if (buf != rx_agg_align(buf)) {
1004                         kfree(buf);
1005                         buf = kmalloc_node(rx_buf_sz + RX_ALIGN, GFP_KERNEL,
1006                                            node);
1007                         if (!buf)
1008                                 goto err1;
1009                 }
1010
1011                 urb = usb_alloc_urb(0, GFP_KERNEL);
1012                 if (!urb) {
1013                         kfree(buf);
1014                         goto err1;
1015                 }
1016
1017                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1018                 tp->rx_info[i].context = tp;
1019                 tp->rx_info[i].urb = urb;
1020                 tp->rx_info[i].buffer = buf;
1021                 tp->rx_info[i].head = rx_agg_align(buf);
1022         }
1023
1024         for (i = 0; i < RTL8152_MAX_TX; i++) {
1025                 buf = kmalloc_node(rx_buf_sz, GFP_KERNEL, node);
1026                 if (!buf)
1027                         goto err1;
1028
1029                 if (buf != tx_agg_align(buf)) {
1030                         kfree(buf);
1031                         buf = kmalloc_node(rx_buf_sz + TX_ALIGN, GFP_KERNEL,
1032                                            node);
1033                         if (!buf)
1034                                 goto err1;
1035                 }
1036
1037                 urb = usb_alloc_urb(0, GFP_KERNEL);
1038                 if (!urb) {
1039                         kfree(buf);
1040                         goto err1;
1041                 }
1042
1043                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1044                 tp->tx_info[i].context = tp;
1045                 tp->tx_info[i].urb = urb;
1046                 tp->tx_info[i].buffer = buf;
1047                 tp->tx_info[i].head = tx_agg_align(buf);
1048
1049                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1050         }
1051
1052         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1053         if (!tp->intr_urb)
1054                 goto err1;
1055
1056         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1057         if (!tp->intr_buff)
1058                 goto err1;
1059
1060         tp->intr_interval = (int)ep_intr->desc.bInterval;
1061         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1062                      tp->intr_buff, INTBUFSIZE, intr_callback,
1063                      tp, tp->intr_interval);
1064
1065         return 0;
1066
1067 err1:
1068         free_all_mem(tp);
1069         return -ENOMEM;
1070 }
1071
1072 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1073 {
1074         struct tx_agg *agg = NULL;
1075         unsigned long flags;
1076
1077         spin_lock_irqsave(&tp->tx_lock, flags);
1078         if (!list_empty(&tp->tx_free)) {
1079                 struct list_head *cursor;
1080
1081                 cursor = tp->tx_free.next;
1082                 list_del_init(cursor);
1083                 agg = list_entry(cursor, struct tx_agg, list);
1084         }
1085         spin_unlock_irqrestore(&tp->tx_lock, flags);
1086
1087         return agg;
1088 }
1089
1090 static void
1091 r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc, struct sk_buff *skb)
1092 {
1093         memset(desc, 0, sizeof(*desc));
1094
1095         desc->opts1 = cpu_to_le32((skb->len & TX_LEN_MASK) | TX_FS | TX_LS);
1096
1097         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1098                 __be16 protocol;
1099                 u8 ip_protocol;
1100                 u32 opts2 = 0;
1101
1102                 if (skb->protocol == htons(ETH_P_8021Q))
1103                         protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1104                 else
1105                         protocol = skb->protocol;
1106
1107                 switch (protocol) {
1108                 case htons(ETH_P_IP):
1109                         opts2 |= IPV4_CS;
1110                         ip_protocol = ip_hdr(skb)->protocol;
1111                         break;
1112
1113                 case htons(ETH_P_IPV6):
1114                         opts2 |= IPV6_CS;
1115                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1116                         break;
1117
1118                 default:
1119                         ip_protocol = IPPROTO_RAW;
1120                         break;
1121                 }
1122
1123                 if (ip_protocol == IPPROTO_TCP) {
1124                         opts2 |= TCP_CS;
1125                         opts2 |= (skb_transport_offset(skb) & 0x7fff) << 17;
1126                 } else if (ip_protocol == IPPROTO_UDP) {
1127                         opts2 |= UDP_CS;
1128                 } else {
1129                         WARN_ON_ONCE(1);
1130                 }
1131
1132                 desc->opts2 = cpu_to_le32(opts2);
1133         }
1134 }
1135
1136 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1137 {
1138         int remain;
1139         u8 *tx_data;
1140
1141         tx_data = agg->head;
1142         agg->skb_num = agg->skb_len = 0;
1143         remain = rx_buf_sz;
1144
1145         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1146                 struct tx_desc *tx_desc;
1147                 struct sk_buff *skb;
1148                 unsigned int len;
1149
1150                 skb = skb_dequeue(&tp->tx_queue);
1151                 if (!skb)
1152                         break;
1153
1154                 remain -= sizeof(*tx_desc);
1155                 len = skb->len;
1156                 if (remain < len) {
1157                         skb_queue_head(&tp->tx_queue, skb);
1158                         break;
1159                 }
1160
1161                 tx_data = tx_agg_align(tx_data);
1162                 tx_desc = (struct tx_desc *)tx_data;
1163                 tx_data += sizeof(*tx_desc);
1164
1165                 r8152_tx_csum(tp, tx_desc, skb);
1166                 memcpy(tx_data, skb->data, len);
1167                 agg->skb_num++;
1168                 agg->skb_len += len;
1169                 dev_kfree_skb_any(skb);
1170
1171                 tx_data += len;
1172                 remain = rx_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1173         }
1174
1175         netif_tx_lock(tp->netdev);
1176
1177         if (netif_queue_stopped(tp->netdev) &&
1178             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1179                 netif_wake_queue(tp->netdev);
1180
1181         netif_tx_unlock(tp->netdev);
1182
1183         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1184                           agg->head, (int)(tx_data - (u8 *)agg->head),
1185                           (usb_complete_t)write_bulk_callback, agg);
1186
1187         return usb_submit_urb(agg->urb, GFP_ATOMIC);
1188 }
1189
1190 static void rx_bottom(struct r8152 *tp)
1191 {
1192         unsigned long flags;
1193         struct list_head *cursor, *next;
1194
1195         spin_lock_irqsave(&tp->rx_lock, flags);
1196         list_for_each_safe(cursor, next, &tp->rx_done) {
1197                 struct rx_desc *rx_desc;
1198                 struct rx_agg *agg;
1199                 int len_used = 0;
1200                 struct urb *urb;
1201                 u8 *rx_data;
1202                 int ret;
1203
1204                 list_del_init(cursor);
1205                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1206
1207                 agg = list_entry(cursor, struct rx_agg, list);
1208                 urb = agg->urb;
1209                 if (urb->actual_length < ETH_ZLEN)
1210                         goto submit;
1211
1212                 rx_desc = agg->head;
1213                 rx_data = agg->head;
1214                 len_used += sizeof(struct rx_desc);
1215
1216                 while (urb->actual_length > len_used) {
1217                         struct net_device *netdev = tp->netdev;
1218                         struct net_device_stats *stats;
1219                         unsigned int pkt_len;
1220                         struct sk_buff *skb;
1221
1222                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1223                         if (pkt_len < ETH_ZLEN)
1224                                 break;
1225
1226                         len_used += pkt_len;
1227                         if (urb->actual_length < len_used)
1228                                 break;
1229
1230                         stats = rtl8152_get_stats(netdev);
1231
1232                         pkt_len -= CRC_SIZE;
1233                         rx_data += sizeof(struct rx_desc);
1234
1235                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1236                         if (!skb) {
1237                                 stats->rx_dropped++;
1238                                 break;
1239                         }
1240                         memcpy(skb->data, rx_data, pkt_len);
1241                         skb_put(skb, pkt_len);
1242                         skb->protocol = eth_type_trans(skb, netdev);
1243                         netif_rx(skb);
1244                         stats->rx_packets++;
1245                         stats->rx_bytes += pkt_len;
1246
1247                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1248                         rx_desc = (struct rx_desc *)rx_data;
1249                         len_used = (int)(rx_data - (u8 *)agg->head);
1250                         len_used += sizeof(struct rx_desc);
1251                 }
1252
1253 submit:
1254                 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1255                 spin_lock_irqsave(&tp->rx_lock, flags);
1256                 if (ret && ret != -ENODEV) {
1257                         list_add_tail(&agg->list, next);
1258                         tasklet_schedule(&tp->tl);
1259                 }
1260         }
1261         spin_unlock_irqrestore(&tp->rx_lock, flags);
1262 }
1263
1264 static void tx_bottom(struct r8152 *tp)
1265 {
1266         int res;
1267
1268         do {
1269                 struct tx_agg *agg;
1270
1271                 if (skb_queue_empty(&tp->tx_queue))
1272                         break;
1273
1274                 agg = r8152_get_tx_agg(tp);
1275                 if (!agg)
1276                         break;
1277
1278                 res = r8152_tx_agg_fill(tp, agg);
1279                 if (res) {
1280                         struct net_device_stats *stats;
1281                         struct net_device *netdev;
1282                         unsigned long flags;
1283
1284                         netdev = tp->netdev;
1285                         stats = rtl8152_get_stats(netdev);
1286
1287                         if (res == -ENODEV) {
1288                                 netif_device_detach(netdev);
1289                         } else {
1290                                 netif_warn(tp, tx_err, netdev,
1291                                            "failed tx_urb %d\n", res);
1292                                 stats->tx_dropped += agg->skb_num;
1293                                 spin_lock_irqsave(&tp->tx_lock, flags);
1294                                 list_add_tail(&agg->list, &tp->tx_free);
1295                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1296                         }
1297                 }
1298         } while (res == 0);
1299 }
1300
1301 static void bottom_half(unsigned long data)
1302 {
1303         struct r8152 *tp;
1304
1305         tp = (struct r8152 *)data;
1306
1307         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1308                 return;
1309
1310         if (!test_bit(WORK_ENABLE, &tp->flags))
1311                 return;
1312
1313         /* When link down, the driver would cancel all bulks. */
1314         /* This avoid the re-submitting bulk */
1315         if (!netif_carrier_ok(tp->netdev))
1316                 return;
1317
1318         rx_bottom(tp);
1319         tx_bottom(tp);
1320 }
1321
1322 static
1323 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1324 {
1325         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1326                       agg->head, rx_buf_sz,
1327                       (usb_complete_t)read_bulk_callback, agg);
1328
1329         return usb_submit_urb(agg->urb, mem_flags);
1330 }
1331
1332 static void rtl8152_tx_timeout(struct net_device *netdev)
1333 {
1334         struct r8152 *tp = netdev_priv(netdev);
1335         int i;
1336
1337         netif_warn(tp, tx_err, netdev, "Tx timeout.\n");
1338         for (i = 0; i < RTL8152_MAX_TX; i++)
1339                 usb_unlink_urb(tp->tx_info[i].urb);
1340 }
1341
1342 static void rtl8152_set_rx_mode(struct net_device *netdev)
1343 {
1344         struct r8152 *tp = netdev_priv(netdev);
1345
1346         if (tp->speed & LINK_STATUS) {
1347                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1348                 schedule_delayed_work(&tp->schedule, 0);
1349         }
1350 }
1351
1352 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1353 {
1354         struct r8152 *tp = netdev_priv(netdev);
1355         u32 mc_filter[2];       /* Multicast hash filter */
1356         __le32 tmp[2];
1357         u32 ocp_data;
1358
1359         clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1360         netif_stop_queue(netdev);
1361         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1362         ocp_data &= ~RCR_ACPT_ALL;
1363         ocp_data |= RCR_AB | RCR_APM;
1364
1365         if (netdev->flags & IFF_PROMISC) {
1366                 /* Unconditionally log net taps. */
1367                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1368                 ocp_data |= RCR_AM | RCR_AAP;
1369                 mc_filter[1] = mc_filter[0] = 0xffffffff;
1370         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1371                    (netdev->flags & IFF_ALLMULTI)) {
1372                 /* Too many to filter perfectly -- accept all multicasts. */
1373                 ocp_data |= RCR_AM;
1374                 mc_filter[1] = mc_filter[0] = 0xffffffff;
1375         } else {
1376                 struct netdev_hw_addr *ha;
1377
1378                 mc_filter[1] = mc_filter[0] = 0;
1379                 netdev_for_each_mc_addr(ha, netdev) {
1380                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1381                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1382                         ocp_data |= RCR_AM;
1383                 }
1384         }
1385
1386         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1387         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1388
1389         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1390         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1391         netif_wake_queue(netdev);
1392 }
1393
1394 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1395                                             struct net_device *netdev)
1396 {
1397         struct r8152 *tp = netdev_priv(netdev);
1398
1399         skb_tx_timestamp(skb);
1400
1401         skb_queue_tail(&tp->tx_queue, skb);
1402
1403         if (list_empty(&tp->tx_free) &&
1404             skb_queue_len(&tp->tx_queue) > tp->tx_qlen)
1405                 netif_stop_queue(netdev);
1406
1407         if (!list_empty(&tp->tx_free))
1408                 tasklet_schedule(&tp->tl);
1409
1410         return NETDEV_TX_OK;
1411 }
1412
1413 static void r8152b_reset_packet_filter(struct r8152 *tp)
1414 {
1415         u32     ocp_data;
1416
1417         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1418         ocp_data &= ~FMC_FCR_MCU_EN;
1419         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1420         ocp_data |= FMC_FCR_MCU_EN;
1421         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1422 }
1423
1424 static void rtl8152_nic_reset(struct r8152 *tp)
1425 {
1426         int     i;
1427
1428         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1429
1430         for (i = 0; i < 1000; i++) {
1431                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1432                         break;
1433                 udelay(100);
1434         }
1435 }
1436
1437 static void set_tx_qlen(struct r8152 *tp)
1438 {
1439         struct net_device *netdev = tp->netdev;
1440
1441         tp->tx_qlen = rx_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
1442                                    sizeof(struct tx_desc));
1443 }
1444
1445 static inline u8 rtl8152_get_speed(struct r8152 *tp)
1446 {
1447         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1448 }
1449
1450 static void rtl_set_eee_plus(struct r8152 *tp)
1451 {
1452         u32 ocp_data;
1453         u8 speed;
1454
1455         speed = rtl8152_get_speed(tp);
1456         if (speed & _10bps) {
1457                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1458                 ocp_data |= EEEP_CR_EEEP_TX;
1459                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1460         } else {
1461                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1462                 ocp_data &= ~EEEP_CR_EEEP_TX;
1463                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1464         }
1465 }
1466
1467 static int rtl_enable(struct r8152 *tp)
1468 {
1469         u32 ocp_data;
1470         int i, ret;
1471
1472         r8152b_reset_packet_filter(tp);
1473
1474         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
1475         ocp_data |= CR_RE | CR_TE;
1476         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
1477
1478         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1479         ocp_data &= ~RXDY_GATED_EN;
1480         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1481
1482         INIT_LIST_HEAD(&tp->rx_done);
1483         ret = 0;
1484         for (i = 0; i < RTL8152_MAX_RX; i++) {
1485                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1486                 ret |= r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
1487         }
1488
1489         return ret;
1490 }
1491
1492 static int rtl8152_enable(struct r8152 *tp)
1493 {
1494         set_tx_qlen(tp);
1495         rtl_set_eee_plus(tp);
1496
1497         return rtl_enable(tp);
1498 }
1499
1500 static void rtl8152_disable(struct r8152 *tp)
1501 {
1502         struct net_device_stats *stats = rtl8152_get_stats(tp->netdev);
1503         struct sk_buff *skb;
1504         u32 ocp_data;
1505         int i;
1506
1507         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1508         ocp_data &= ~RCR_ACPT_ALL;
1509         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1510
1511         while ((skb = skb_dequeue(&tp->tx_queue))) {
1512                 dev_kfree_skb(skb);
1513                 stats->tx_dropped++;
1514         }
1515
1516         for (i = 0; i < RTL8152_MAX_TX; i++)
1517                 usb_kill_urb(tp->tx_info[i].urb);
1518
1519         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1520         ocp_data |= RXDY_GATED_EN;
1521         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1522
1523         for (i = 0; i < 1000; i++) {
1524                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1525                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
1526                         break;
1527                 mdelay(1);
1528         }
1529
1530         for (i = 0; i < 1000; i++) {
1531                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
1532                         break;
1533                 mdelay(1);
1534         }
1535
1536         for (i = 0; i < RTL8152_MAX_RX; i++)
1537                 usb_kill_urb(tp->rx_info[i].urb);
1538
1539         rtl8152_nic_reset(tp);
1540 }
1541
1542 static void r8152b_exit_oob(struct r8152 *tp)
1543 {
1544         u32     ocp_data;
1545         int     i;
1546
1547         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1548         ocp_data &= ~RCR_ACPT_ALL;
1549         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1550
1551         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1552         ocp_data |= RXDY_GATED_EN;
1553         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1554
1555         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1556         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
1557
1558         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1559         ocp_data &= ~NOW_IS_OOB;
1560         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
1561
1562         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
1563         ocp_data &= ~MCU_BORW_EN;
1564         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
1565
1566         for (i = 0; i < 1000; i++) {
1567                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1568                 if (ocp_data & LINK_LIST_READY)
1569                         break;
1570                 mdelay(1);
1571         }
1572
1573         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
1574         ocp_data |= RE_INIT_LL;
1575         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
1576
1577         for (i = 0; i < 1000; i++) {
1578                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1579                 if (ocp_data & LINK_LIST_READY)
1580                         break;
1581                 mdelay(1);
1582         }
1583
1584         rtl8152_nic_reset(tp);
1585
1586         /* rx share fifo credit full threshold */
1587         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
1588
1589         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_DEV_STAT);
1590         ocp_data &= STAT_SPEED_MASK;
1591         if (ocp_data == STAT_SPEED_FULL) {
1592                 /* rx share fifo credit near full threshold */
1593                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
1594                                 RXFIFO_THR2_FULL);
1595                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
1596                                 RXFIFO_THR3_FULL);
1597         } else {
1598                 /* rx share fifo credit near full threshold */
1599                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
1600                                 RXFIFO_THR2_HIGH);
1601                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
1602                                 RXFIFO_THR3_HIGH);
1603         }
1604
1605         /* TX share fifo free credit full threshold */
1606         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
1607
1608         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
1609         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
1610         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
1611                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
1612
1613         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
1614         ocp_data &= ~CPCR_RX_VLAN;
1615         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
1616
1617         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
1618
1619         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
1620         ocp_data |= TCR0_AUTO_FIFO;
1621         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
1622 }
1623
1624 static void r8152b_enter_oob(struct r8152 *tp)
1625 {
1626         u32     ocp_data;
1627         int     i;
1628
1629         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1630         ocp_data &= ~NOW_IS_OOB;
1631         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
1632
1633         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
1634         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
1635         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
1636
1637         rtl8152_disable(tp);
1638
1639         for (i = 0; i < 1000; i++) {
1640                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1641                 if (ocp_data & LINK_LIST_READY)
1642                         break;
1643                 mdelay(1);
1644         }
1645
1646         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
1647         ocp_data |= RE_INIT_LL;
1648         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
1649
1650         for (i = 0; i < 1000; i++) {
1651                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1652                 if (ocp_data & LINK_LIST_READY)
1653                         break;
1654                 mdelay(1);
1655         }
1656
1657         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
1658
1659         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
1660         ocp_data |= MAGIC_EN;
1661         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
1662
1663         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
1664         ocp_data |= CPCR_RX_VLAN;
1665         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
1666
1667         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
1668         ocp_data |= ALDPS_PROXY_MODE;
1669         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
1670
1671         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1672         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
1673         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
1674
1675         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5, LAN_WAKE_EN);
1676
1677         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1678         ocp_data &= ~RXDY_GATED_EN;
1679         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1680
1681         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1682         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
1683         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1684 }
1685
1686 static void r8152b_disable_aldps(struct r8152 *tp)
1687 {
1688         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
1689         msleep(20);
1690 }
1691
1692 static inline void r8152b_enable_aldps(struct r8152 *tp)
1693 {
1694         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
1695                                             LINKENA | DIS_SDSAVE);
1696 }
1697
1698 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
1699 {
1700         u16 bmcr, anar;
1701         int ret = 0;
1702
1703         cancel_delayed_work_sync(&tp->schedule);
1704         anar = r8152_mdio_read(tp, MII_ADVERTISE);
1705         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
1706                   ADVERTISE_100HALF | ADVERTISE_100FULL);
1707
1708         if (autoneg == AUTONEG_DISABLE) {
1709                 if (speed == SPEED_10) {
1710                         bmcr = 0;
1711                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
1712                 } else if (speed == SPEED_100) {
1713                         bmcr = BMCR_SPEED100;
1714                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
1715                 } else {
1716                         ret = -EINVAL;
1717                         goto out;
1718                 }
1719
1720                 if (duplex == DUPLEX_FULL)
1721                         bmcr |= BMCR_FULLDPLX;
1722         } else {
1723                 if (speed == SPEED_10) {
1724                         if (duplex == DUPLEX_FULL)
1725                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
1726                         else
1727                                 anar |= ADVERTISE_10HALF;
1728                 } else if (speed == SPEED_100) {
1729                         if (duplex == DUPLEX_FULL) {
1730                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
1731                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
1732                         } else {
1733                                 anar |= ADVERTISE_10HALF;
1734                                 anar |= ADVERTISE_100HALF;
1735                         }
1736                 } else {
1737                         ret = -EINVAL;
1738                         goto out;
1739                 }
1740
1741                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
1742         }
1743
1744         r8152_mdio_write(tp, MII_ADVERTISE, anar);
1745         r8152_mdio_write(tp, MII_BMCR, bmcr);
1746
1747 out:
1748
1749         return ret;
1750 }
1751
1752 static void rtl8152_down(struct r8152 *tp)
1753 {
1754         u32     ocp_data;
1755
1756         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
1757         ocp_data &= ~POWER_CUT;
1758         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
1759
1760         r8152b_disable_aldps(tp);
1761         r8152b_enter_oob(tp);
1762         r8152b_enable_aldps(tp);
1763 }
1764
1765 static void set_carrier(struct r8152 *tp)
1766 {
1767         struct net_device *netdev = tp->netdev;
1768         u8 speed;
1769
1770         clear_bit(RTL8152_LINK_CHG, &tp->flags);
1771         speed = rtl8152_get_speed(tp);
1772
1773         if (speed & LINK_STATUS) {
1774                 if (!(tp->speed & LINK_STATUS)) {
1775                         tp->rtl_ops.enable(tp);
1776                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1777                         netif_carrier_on(netdev);
1778                 }
1779         } else {
1780                 if (tp->speed & LINK_STATUS) {
1781                         netif_carrier_off(netdev);
1782                         tasklet_disable(&tp->tl);
1783                         tp->rtl_ops.disable(tp);
1784                         tasklet_enable(&tp->tl);
1785                 }
1786         }
1787         tp->speed = speed;
1788 }
1789
1790 static void rtl_work_func_t(struct work_struct *work)
1791 {
1792         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
1793
1794         if (!test_bit(WORK_ENABLE, &tp->flags))
1795                 goto out1;
1796
1797         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1798                 goto out1;
1799
1800         if (test_bit(RTL8152_LINK_CHG, &tp->flags))
1801                 set_carrier(tp);
1802
1803         if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
1804                 _rtl8152_set_rx_mode(tp->netdev);
1805
1806 out1:
1807         return;
1808 }
1809
1810 static int rtl8152_open(struct net_device *netdev)
1811 {
1812         struct r8152 *tp = netdev_priv(netdev);
1813         int res = 0;
1814
1815         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
1816         if (res) {
1817                 if (res == -ENODEV)
1818                         netif_device_detach(tp->netdev);
1819                 netif_warn(tp, ifup, netdev,
1820                         "intr_urb submit failed: %d\n", res);
1821                 return res;
1822         }
1823
1824         rtl8152_set_speed(tp, AUTONEG_ENABLE, SPEED_100, DUPLEX_FULL);
1825         tp->speed = 0;
1826         netif_carrier_off(netdev);
1827         netif_start_queue(netdev);
1828         set_bit(WORK_ENABLE, &tp->flags);
1829
1830         return res;
1831 }
1832
1833 static int rtl8152_close(struct net_device *netdev)
1834 {
1835         struct r8152 *tp = netdev_priv(netdev);
1836         int res = 0;
1837
1838         usb_kill_urb(tp->intr_urb);
1839         clear_bit(WORK_ENABLE, &tp->flags);
1840         cancel_delayed_work_sync(&tp->schedule);
1841         netif_stop_queue(netdev);
1842         tasklet_disable(&tp->tl);
1843         tp->rtl_ops.disable(tp);
1844         tasklet_enable(&tp->tl);
1845
1846         return res;
1847 }
1848
1849 static void rtl_clear_bp(struct r8152 *tp)
1850 {
1851         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_0, 0);
1852         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_2, 0);
1853         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_4, 0);
1854         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_6, 0);
1855         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_0, 0);
1856         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_2, 0);
1857         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_4, 0);
1858         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_6, 0);
1859         mdelay(3);
1860         ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_BA, 0);
1861         ocp_write_word(tp, MCU_TYPE_USB, USB_BP_BA, 0);
1862 }
1863
1864 static void r8152b_enable_eee(struct r8152 *tp)
1865 {
1866         u32     ocp_data;
1867
1868         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
1869         ocp_data |= EEE_RX_EN | EEE_TX_EN;
1870         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
1871         ocp_reg_write(tp, OCP_EEE_CONFIG1, RG_TXLPI_MSK_HFDUP | RG_MATCLR_EN |
1872                                            EEE_10_CAP | EEE_NWAY_EN |
1873                                            TX_QUIET_EN | RX_QUIET_EN |
1874                                            SDRISETIME | RG_RXLPI_MSK_HFDUP |
1875                                            SDFALLTIME);
1876         ocp_reg_write(tp, OCP_EEE_CONFIG2, RG_LPIHYS_NUM | RG_DACQUIET_EN |
1877                                            RG_LDVQUIET_EN | RG_CKRSEL |
1878                                            RG_EEEPRG_EN);
1879         ocp_reg_write(tp, OCP_EEE_CONFIG3, FST_SNR_EYE_R | RG_LFS_SEL | MSK_PH);
1880         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | DEVICE_ADDR);
1881         ocp_reg_write(tp, OCP_EEE_DATA, EEE_ADDR);
1882         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | DEVICE_ADDR);
1883         ocp_reg_write(tp, OCP_EEE_DATA, EEE_DATA);
1884         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
1885 }
1886
1887 static void r8152b_enable_fc(struct r8152 *tp)
1888 {
1889         u16 anar;
1890
1891         anar = r8152_mdio_read(tp, MII_ADVERTISE);
1892         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1893         r8152_mdio_write(tp, MII_ADVERTISE, anar);
1894 }
1895
1896 static void r8152b_hw_phy_cfg(struct r8152 *tp)
1897 {
1898         r8152_mdio_write(tp, MII_BMCR, BMCR_ANENABLE);
1899         r8152b_disable_aldps(tp);
1900 }
1901
1902 static void r8152b_init(struct r8152 *tp)
1903 {
1904         u32 ocp_data;
1905         int i;
1906
1907         rtl_clear_bp(tp);
1908
1909         if (tp->version == RTL_VER_01) {
1910                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
1911                 ocp_data &= ~LED_MODE_MASK;
1912                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
1913         }
1914
1915         r8152b_hw_phy_cfg(tp);
1916
1917         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
1918         ocp_data &= ~POWER_CUT;
1919         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
1920
1921         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
1922         ocp_data &= ~RESUME_INDICATE;
1923         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
1924
1925         r8152b_exit_oob(tp);
1926
1927         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
1928         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
1929         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
1930         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
1931         ocp_data &= ~MCU_CLK_RATIO_MASK;
1932         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
1933         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
1934         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
1935                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
1936         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
1937
1938         r8152b_enable_eee(tp);
1939         r8152b_enable_aldps(tp);
1940         r8152b_enable_fc(tp);
1941
1942         r8152_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE |
1943                                        BMCR_ANRESTART);
1944         for (i = 0; i < 100; i++) {
1945                 udelay(100);
1946                 if (!(r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET))
1947                         break;
1948         }
1949
1950         /* enable rx aggregation */
1951         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
1952         ocp_data &= ~RX_AGG_DISABLE;
1953         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
1954 }
1955
1956 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
1957 {
1958         struct r8152 *tp = usb_get_intfdata(intf);
1959
1960         netif_device_detach(tp->netdev);
1961
1962         if (netif_running(tp->netdev)) {
1963                 clear_bit(WORK_ENABLE, &tp->flags);
1964                 usb_kill_urb(tp->intr_urb);
1965                 cancel_delayed_work_sync(&tp->schedule);
1966                 tasklet_disable(&tp->tl);
1967         }
1968
1969         tp->rtl_ops.down(tp);
1970
1971         return 0;
1972 }
1973
1974 static int rtl8152_resume(struct usb_interface *intf)
1975 {
1976         struct r8152 *tp = usb_get_intfdata(intf);
1977
1978         tp->rtl_ops.init(tp);
1979         netif_device_attach(tp->netdev);
1980         if (netif_running(tp->netdev)) {
1981                 rtl8152_set_speed(tp, AUTONEG_ENABLE, SPEED_100, DUPLEX_FULL);
1982                 tp->speed = 0;
1983                 netif_carrier_off(tp->netdev);
1984                 set_bit(WORK_ENABLE, &tp->flags);
1985                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
1986                 tasklet_enable(&tp->tl);
1987         }
1988
1989         return 0;
1990 }
1991
1992 static void rtl8152_get_drvinfo(struct net_device *netdev,
1993                                 struct ethtool_drvinfo *info)
1994 {
1995         struct r8152 *tp = netdev_priv(netdev);
1996
1997         strncpy(info->driver, MODULENAME, ETHTOOL_BUSINFO_LEN);
1998         strncpy(info->version, DRIVER_VERSION, ETHTOOL_BUSINFO_LEN);
1999         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
2000 }
2001
2002 static
2003 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
2004 {
2005         struct r8152 *tp = netdev_priv(netdev);
2006
2007         if (!tp->mii.mdio_read)
2008                 return -EOPNOTSUPP;
2009
2010         return mii_ethtool_gset(&tp->mii, cmd);
2011 }
2012
2013 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2014 {
2015         struct r8152 *tp = netdev_priv(dev);
2016
2017         return rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
2018 }
2019
2020 static struct ethtool_ops ops = {
2021         .get_drvinfo = rtl8152_get_drvinfo,
2022         .get_settings = rtl8152_get_settings,
2023         .set_settings = rtl8152_set_settings,
2024         .get_link = ethtool_op_get_link,
2025 };
2026
2027 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
2028 {
2029         struct r8152 *tp = netdev_priv(netdev);
2030         struct mii_ioctl_data *data = if_mii(rq);
2031         int res = 0;
2032
2033         switch (cmd) {
2034         case SIOCGMIIPHY:
2035                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
2036                 break;
2037
2038         case SIOCGMIIREG:
2039                 data->val_out = r8152_mdio_read(tp, data->reg_num);
2040                 break;
2041
2042         case SIOCSMIIREG:
2043                 if (!capable(CAP_NET_ADMIN)) {
2044                         res = -EPERM;
2045                         break;
2046                 }
2047                 r8152_mdio_write(tp, data->reg_num, data->val_in);
2048                 break;
2049
2050         default:
2051                 res = -EOPNOTSUPP;
2052         }
2053
2054         return res;
2055 }
2056
2057 static const struct net_device_ops rtl8152_netdev_ops = {
2058         .ndo_open               = rtl8152_open,
2059         .ndo_stop               = rtl8152_close,
2060         .ndo_do_ioctl           = rtl8152_ioctl,
2061         .ndo_start_xmit         = rtl8152_start_xmit,
2062         .ndo_tx_timeout         = rtl8152_tx_timeout,
2063         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
2064         .ndo_set_mac_address    = rtl8152_set_mac_address,
2065
2066         .ndo_change_mtu         = eth_change_mtu,
2067         .ndo_validate_addr      = eth_validate_addr,
2068 };
2069
2070 static void r8152b_get_version(struct r8152 *tp)
2071 {
2072         u32     ocp_data;
2073         u16     version;
2074
2075         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
2076         version = (u16)(ocp_data & VERSION_MASK);
2077
2078         switch (version) {
2079         case 0x4c00:
2080                 tp->version = RTL_VER_01;
2081                 break;
2082         case 0x4c10:
2083                 tp->version = RTL_VER_02;
2084                 break;
2085         default:
2086                 netif_info(tp, probe, tp->netdev,
2087                            "Unknown version 0x%04x\n", version);
2088                 break;
2089         }
2090 }
2091
2092 static void rtl8152_unload(struct r8152 *tp)
2093 {
2094         u32     ocp_data;
2095
2096         if (tp->version != RTL_VER_01) {
2097                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2098                 ocp_data |= POWER_CUT;
2099                 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2100         }
2101
2102         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2103         ocp_data &= ~RESUME_INDICATE;
2104         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2105 }
2106
2107 static bool rtl_ops_init(struct r8152 *tp, const struct usb_device_id *id)
2108 {
2109         struct rtl_ops *ops = &tp->rtl_ops;
2110         bool ret = true;
2111
2112         switch (id->idVendor) {
2113         case VENDOR_ID_REALTEK:
2114                 switch (id->idProduct) {
2115                 case PRODUCT_ID_RTL8152:
2116                         ops->init               = r8152b_init;
2117                         ops->enable             = rtl8152_enable;
2118                         ops->disable            = rtl8152_disable;
2119                         ops->down               = rtl8152_down;
2120                         ops->unload             = rtl8152_unload;
2121                         break;
2122                 default:
2123                         ret = false;
2124                         break;
2125                 }
2126                 break;
2127
2128         default:
2129                 ret = false;
2130                 break;
2131         }
2132
2133         return ret;
2134 }
2135
2136 static int rtl8152_probe(struct usb_interface *intf,
2137                          const struct usb_device_id *id)
2138 {
2139         struct usb_device *udev = interface_to_usbdev(intf);
2140         struct r8152 *tp;
2141         struct net_device *netdev;
2142         int ret;
2143
2144         if (udev->actconfig->desc.bConfigurationValue != 1) {
2145                 usb_driver_set_configuration(udev, 1);
2146                 return -ENODEV;
2147         }
2148
2149         netdev = alloc_etherdev(sizeof(struct r8152));
2150         if (!netdev) {
2151                 dev_err(&intf->dev, "Out of memory");
2152                 return -ENOMEM;
2153         }
2154
2155         SET_NETDEV_DEV(netdev, &intf->dev);
2156         tp = netdev_priv(netdev);
2157         tp->msg_enable = 0x7FFF;
2158
2159         if (!rtl_ops_init(tp, id)) {
2160                 netif_err(tp, probe, netdev, "Unknown Device");
2161                 return -ENODEV;
2162         }
2163
2164         tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
2165         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
2166
2167         tp->udev = udev;
2168         tp->netdev = netdev;
2169         tp->intf = intf;
2170         netdev->netdev_ops = &rtl8152_netdev_ops;
2171         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
2172
2173         netdev->features |= NETIF_F_IP_CSUM;
2174         netdev->hw_features = NETIF_F_IP_CSUM;
2175         SET_ETHTOOL_OPS(netdev, &ops);
2176
2177         tp->mii.dev = netdev;
2178         tp->mii.mdio_read = read_mii_word;
2179         tp->mii.mdio_write = write_mii_word;
2180         tp->mii.phy_id_mask = 0x3f;
2181         tp->mii.reg_num_mask = 0x1f;
2182         tp->mii.phy_id = R8152_PHY_ID;
2183         tp->mii.supports_gmii = 0;
2184
2185         r8152b_get_version(tp);
2186         tp->rtl_ops.init(tp);
2187         set_ethernet_addr(tp);
2188
2189         ret = alloc_all_mem(tp);
2190         if (ret)
2191                 goto out;
2192
2193         usb_set_intfdata(intf, tp);
2194
2195         ret = register_netdev(netdev);
2196         if (ret != 0) {
2197                 netif_err(tp, probe, netdev, "couldn't register the device");
2198                 goto out1;
2199         }
2200
2201         netif_info(tp, probe, netdev, "%s", DRIVER_VERSION);
2202
2203         return 0;
2204
2205 out1:
2206         usb_set_intfdata(intf, NULL);
2207 out:
2208         free_netdev(netdev);
2209         return ret;
2210 }
2211
2212 static void rtl8152_disconnect(struct usb_interface *intf)
2213 {
2214         struct r8152 *tp = usb_get_intfdata(intf);
2215
2216         usb_set_intfdata(intf, NULL);
2217         if (tp) {
2218                 set_bit(RTL8152_UNPLUG, &tp->flags);
2219                 tasklet_kill(&tp->tl);
2220                 unregister_netdev(tp->netdev);
2221                 tp->rtl_ops.unload(tp);
2222                 free_all_mem(tp);
2223                 free_netdev(tp->netdev);
2224         }
2225 }
2226
2227 /* table of devices that work with this driver */
2228 static struct usb_device_id rtl8152_table[] = {
2229         {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)},
2230         {}
2231 };
2232
2233 MODULE_DEVICE_TABLE(usb, rtl8152_table);
2234
2235 static struct usb_driver rtl8152_driver = {
2236         .name =         MODULENAME,
2237         .id_table =     rtl8152_table,
2238         .probe =        rtl8152_probe,
2239         .disconnect =   rtl8152_disconnect,
2240         .suspend =      rtl8152_suspend,
2241         .resume =       rtl8152_resume,
2242         .reset_resume = rtl8152_resume,
2243 };
2244
2245 module_usb_driver(rtl8152_driver);
2246
2247 MODULE_AUTHOR(DRIVER_AUTHOR);
2248 MODULE_DESCRIPTION(DRIVER_DESC);
2249 MODULE_LICENSE("GPL");