2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
31 /* Information for net-next */
32 #define NETNEXT_VERSION "08"
34 /* Information for net */
35 #define NET_VERSION "9"
37 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
42 #define R8152_PHY_ID 32
44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RMS 0xc016
47 #define PLA_RXFIFO_CTRL0 0xc0a0
48 #define PLA_RXFIFO_CTRL1 0xc0a4
49 #define PLA_RXFIFO_CTRL2 0xc0a8
50 #define PLA_DMY_REG0 0xc0b0
51 #define PLA_FMC 0xc0b4
52 #define PLA_CFG_WOL 0xc0b6
53 #define PLA_TEREDO_CFG 0xc0bc
54 #define PLA_MAR 0xcd00
55 #define PLA_BACKUP 0xd000
56 #define PAL_BDC_CR 0xd1a0
57 #define PLA_TEREDO_TIMER 0xd2cc
58 #define PLA_REALWOW_TIMER 0xd2e8
59 #define PLA_LEDSEL 0xdd90
60 #define PLA_LED_FEATURE 0xdd92
61 #define PLA_PHYAR 0xde00
62 #define PLA_BOOT_CTRL 0xe004
63 #define PLA_GPHY_INTR_IMR 0xe022
64 #define PLA_EEE_CR 0xe040
65 #define PLA_EEEP_CR 0xe080
66 #define PLA_MAC_PWR_CTRL 0xe0c0
67 #define PLA_MAC_PWR_CTRL2 0xe0ca
68 #define PLA_MAC_PWR_CTRL3 0xe0cc
69 #define PLA_MAC_PWR_CTRL4 0xe0ce
70 #define PLA_WDT6_CTRL 0xe428
71 #define PLA_TCR0 0xe610
72 #define PLA_TCR1 0xe612
73 #define PLA_MTPS 0xe615
74 #define PLA_TXFIFO_CTRL 0xe618
75 #define PLA_RSTTALLY 0xe800
77 #define PLA_CRWECR 0xe81c
78 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5 0xe822
81 #define PLA_PHY_PWR 0xe84c
82 #define PLA_OOB_CTRL 0xe84f
83 #define PLA_CPCR 0xe854
84 #define PLA_MISC_0 0xe858
85 #define PLA_MISC_1 0xe85a
86 #define PLA_OCP_GPHY_BASE 0xe86c
87 #define PLA_TALLYCNT 0xe890
88 #define PLA_SFF_STS_7 0xe8de
89 #define PLA_PHYSTATUS 0xe908
90 #define PLA_BP_BA 0xfc26
91 #define PLA_BP_0 0xfc28
92 #define PLA_BP_1 0xfc2a
93 #define PLA_BP_2 0xfc2c
94 #define PLA_BP_3 0xfc2e
95 #define PLA_BP_4 0xfc30
96 #define PLA_BP_5 0xfc32
97 #define PLA_BP_6 0xfc34
98 #define PLA_BP_7 0xfc36
99 #define PLA_BP_EN 0xfc38
101 #define USB_USB2PHY 0xb41e
102 #define USB_SSPHYLINK2 0xb428
103 #define USB_U2P3_CTRL 0xb460
104 #define USB_CSR_DUMMY1 0xb464
105 #define USB_CSR_DUMMY2 0xb466
106 #define USB_DEV_STAT 0xb808
107 #define USB_CONNECT_TIMER 0xcbf8
108 #define USB_BURST_SIZE 0xcfc0
109 #define USB_USB_CTRL 0xd406
110 #define USB_PHY_CTRL 0xd408
111 #define USB_TX_AGG 0xd40a
112 #define USB_RX_BUF_TH 0xd40c
113 #define USB_USB_TIMER 0xd428
114 #define USB_RX_EARLY_TIMEOUT 0xd42c
115 #define USB_RX_EARLY_SIZE 0xd42e
116 #define USB_PM_CTRL_STATUS 0xd432
117 #define USB_TX_DMA 0xd434
118 #define USB_TOLERANCE 0xd490
119 #define USB_LPM_CTRL 0xd41a
120 #define USB_BMU_RESET 0xd4b0
121 #define USB_UPS_CTRL 0xd800
122 #define USB_MISC_0 0xd81a
123 #define USB_POWER_CUT 0xd80a
124 #define USB_AFE_CTRL2 0xd824
125 #define USB_WDT11_CTRL 0xe43c
126 #define USB_BP_BA 0xfc26
127 #define USB_BP_0 0xfc28
128 #define USB_BP_1 0xfc2a
129 #define USB_BP_2 0xfc2c
130 #define USB_BP_3 0xfc2e
131 #define USB_BP_4 0xfc30
132 #define USB_BP_5 0xfc32
133 #define USB_BP_6 0xfc34
134 #define USB_BP_7 0xfc36
135 #define USB_BP_EN 0xfc38
138 #define OCP_ALDPS_CONFIG 0x2010
139 #define OCP_EEE_CONFIG1 0x2080
140 #define OCP_EEE_CONFIG2 0x2092
141 #define OCP_EEE_CONFIG3 0x2094
142 #define OCP_BASE_MII 0xa400
143 #define OCP_EEE_AR 0xa41a
144 #define OCP_EEE_DATA 0xa41c
145 #define OCP_PHY_STATUS 0xa420
146 #define OCP_POWER_CFG 0xa430
147 #define OCP_EEE_CFG 0xa432
148 #define OCP_SRAM_ADDR 0xa436
149 #define OCP_SRAM_DATA 0xa438
150 #define OCP_DOWN_SPEED 0xa442
151 #define OCP_EEE_ABLE 0xa5c4
152 #define OCP_EEE_ADV 0xa5d0
153 #define OCP_EEE_LPABLE 0xa5d2
154 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
155 #define OCP_ADC_CFG 0xbc06
158 #define SRAM_LPF_CFG 0x8012
159 #define SRAM_10M_AMP1 0x8080
160 #define SRAM_10M_AMP2 0x8082
161 #define SRAM_IMPEDANCE 0x8084
164 #define RCR_AAP 0x00000001
165 #define RCR_APM 0x00000002
166 #define RCR_AM 0x00000004
167 #define RCR_AB 0x00000008
168 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL 0x00080002
172 #define RXFIFO_THR1_OOB 0x01800003
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL 0x00000060
176 #define RXFIFO_THR2_HIGH 0x00000038
177 #define RXFIFO_THR2_OOB 0x0000004a
178 #define RXFIFO_THR2_NORMAL 0x00a0
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL 0x00000078
182 #define RXFIFO_THR3_HIGH 0x00000048
183 #define RXFIFO_THR3_OOB 0x0000005a
184 #define RXFIFO_THR3_NORMAL 0x0110
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL 0x00400008
188 #define TXFIFO_THR_NORMAL2 0x01000008
191 #define ECM_ALDPS 0x0002
194 #define FMC_FCR_MCU_EN 0x0001
197 #define EEEP_CR_EEEP_TX 0x0002
200 #define WDT6_SET_MODE 0x0010
203 #define TCR0_TX_EMPTY 0x0800
204 #define TCR0_AUTO_FIFO 0x0080
207 #define VERSION_MASK 0x7cf0
210 #define MTPS_JUMBO (12 * 1024 / 64)
211 #define MTPS_DEFAULT (6 * 1024 / 64)
214 #define TALLY_RESET 0x0001
222 #define CRWECR_NORAML 0x00
223 #define CRWECR_CONFIG 0xc0
226 #define NOW_IS_OOB 0x80
227 #define TXFIFO_EMPTY 0x20
228 #define RXFIFO_EMPTY 0x10
229 #define LINK_LIST_READY 0x02
230 #define DIS_MCU_CLROOB 0x01
231 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
234 #define RXDY_GATED_EN 0x0008
237 #define RE_INIT_LL 0x8000
238 #define MCU_BORW_EN 0x4000
241 #define CPCR_RX_VLAN 0x0040
244 #define MAGIC_EN 0x0001
247 #define TEREDO_SEL 0x8000
248 #define TEREDO_WAKE_MASK 0x7f00
249 #define TEREDO_RS_EVENT_MASK 0x00fe
250 #define OOB_TEREDO_EN 0x0001
253 #define ALDPS_PROXY_MODE 0x0001
256 #define LINK_ON_WAKE_EN 0x0010
257 #define LINK_OFF_WAKE_EN 0x0008
260 #define BWF_EN 0x0040
261 #define MWF_EN 0x0020
262 #define UWF_EN 0x0010
263 #define LAN_WAKE_EN 0x0002
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK 0x0700
269 #define TX_10M_IDLE_EN 0x0080
270 #define PFM_PWM_SWITCH 0x0040
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN 0x00004000
274 #define MCU_CLK_RATIO 0x07010f07
275 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO 0x0f87
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO 0x8007
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN 0x0100
283 #define SUSPEND_SPDWN_EN 0x0004
284 #define U1U2_SPDWN_EN 0x0002
285 #define L1_SPDWN_EN 0x0001
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN 0x1000
289 #define RXDV_SPDWN_EN 0x0800
290 #define TX10MIDLE_EN 0x0100
291 #define TP100_SPDWN_EN 0x0020
292 #define TP500_SPDWN_EN 0x0010
293 #define TP1000_SPDWN_EN 0x0008
294 #define EEE_SPDWN_EN 0x0001
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK 0x0001
298 #define SPEED_DOWN_MSK 0x0002
299 #define SPDWN_RXDV_MSK 0x0004
300 #define SPDWN_LINKCHG_MSK 0x0008
303 #define PHYAR_FLAG 0x80000000
306 #define EEE_RX_EN 0x0001
307 #define EEE_TX_EN 0x0002
310 #define AUTOLOAD_DONE 0x0002
313 #define USB2PHY_SUSPEND 0x0001
314 #define USB2PHY_L1 0x0002
317 #define pwd_dn_scale_mask 0x3ffe
318 #define pwd_dn_scale(x) ((x) << 1)
321 #define DYNAMIC_BURST 0x0001
324 #define EP4_FULL_FC 0x0001
327 #define STAT_SPEED_MASK 0x0006
328 #define STAT_SPEED_HIGH 0x0000
329 #define STAT_SPEED_FULL 0x0002
332 #define TX_AGG_MAX_THRESHOLD 0x03
335 #define RX_THR_SUPPER 0x0c350180
336 #define RX_THR_HIGH 0x7a120180
337 #define RX_THR_SLOW 0xffff0180
340 #define TEST_MODE_DISABLE 0x00000001
341 #define TX_SIZE_ADJUST1 0x00000100
344 #define BMU_RESET_EP_IN 0x01
345 #define BMU_RESET_EP_OUT 0x02
348 #define POWER_CUT 0x0100
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE 0x0001
354 #define RX_AGG_DISABLE 0x0010
355 #define RX_ZERO_EN 0x0080
358 #define U2P3_ENABLE 0x0001
361 #define PWR_EN 0x0001
362 #define PHASE2_EN 0x0008
365 #define PCUT_STATUS 0x0001
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER 85000U
369 #define COALESCE_HIGH 250000U
370 #define COALESCE_SLOW 524280U
373 #define TIMER11_EN 0x0001
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK 0x0c
380 #define LPM_TIMER_500MS 0x04 /* 500 ms */
381 #define LPM_TIMER_500US 0x0c /* 500 us */
382 #define ROK_EXIT_LPM 0x02
385 #define SEN_VAL_MASK 0xf800
386 #define SEN_VAL_NORMAL 0xa000
387 #define SEL_RXIDLE 0x0100
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE 0x8000
391 #define ENPDNPS 0x0200
392 #define LINKENA 0x0100
393 #define DIS_SDSAVE 0x0010
396 #define PHY_STAT_MASK 0x0007
397 #define PHY_STAT_LAN_ON 3
398 #define PHY_STAT_PWRDN 5
401 #define EEE_CLKDIV_EN 0x8000
402 #define EN_ALDPS 0x0004
403 #define EN_10M_PLLOFF 0x0001
405 /* OCP_EEE_CONFIG1 */
406 #define RG_TXLPI_MSK_HFDUP 0x8000
407 #define RG_MATCLR_EN 0x4000
408 #define EEE_10_CAP 0x2000
409 #define EEE_NWAY_EN 0x1000
410 #define TX_QUIET_EN 0x0200
411 #define RX_QUIET_EN 0x0100
412 #define sd_rise_time_mask 0x0070
413 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
414 #define RG_RXLPI_MSK_HFDUP 0x0008
415 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
417 /* OCP_EEE_CONFIG2 */
418 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
419 #define RG_DACQUIET_EN 0x0400
420 #define RG_LDVQUIET_EN 0x0200
421 #define RG_CKRSEL 0x0020
422 #define RG_EEEPRG_EN 0x0010
424 /* OCP_EEE_CONFIG3 */
425 #define fast_snr_mask 0xff80
426 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
427 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
428 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
431 /* bit[15:14] function */
432 #define FUN_ADDR 0x0000
433 #define FUN_DATA 0x4000
434 /* bit[4:0] device addr */
437 #define CTAP_SHORT_EN 0x0040
438 #define EEE10_EN 0x0010
441 #define EN_10M_BGOFF 0x0080
444 #define TXDIS_STATE 0x01
445 #define ABD_STATE 0x02
448 #define CKADSEL_L 0x0100
449 #define ADC_EN 0x0080
450 #define EN_EMI_L 0x0040
453 #define LPF_AUTO_TUNE 0x8000
456 #define GDAC_IB_UPALL 0x0008
459 #define AMP_DN 0x0200
462 #define RX_DRIVING_MASK 0x6000
465 #define AD_MASK 0xfee0
467 #define PASS_THRU_MASK 0x1
469 enum rtl_register_content {
477 #define RTL8152_MAX_TX 4
478 #define RTL8152_MAX_RX 10
484 #define INTR_LINK 0x0004
486 #define RTL8152_REQT_READ 0xc0
487 #define RTL8152_REQT_WRITE 0x40
488 #define RTL8152_REQ_GET_REGS 0x05
489 #define RTL8152_REQ_SET_REGS 0x05
491 #define BYTE_EN_DWORD 0xff
492 #define BYTE_EN_WORD 0x33
493 #define BYTE_EN_BYTE 0x11
494 #define BYTE_EN_SIX_BYTES 0x3f
495 #define BYTE_EN_START_MASK 0x0f
496 #define BYTE_EN_END_MASK 0xf0
498 #define RTL8153_MAX_PACKET 9216 /* 9K */
499 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
500 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
501 #define RTL8153_RMS RTL8153_MAX_PACKET
502 #define RTL8152_TX_TIMEOUT (5 * HZ)
503 #define RTL8152_NAPI_WEIGHT 64
504 #define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + CRC_SIZE + \
505 sizeof(struct rx_desc) + RX_ALIGN)
518 /* Define these values to match your device */
519 #define VENDOR_ID_REALTEK 0x0bda
520 #define VENDOR_ID_SAMSUNG 0x04e8
521 #define VENDOR_ID_LENOVO 0x17ef
522 #define VENDOR_ID_NVIDIA 0x0955
524 #define MCU_TYPE_PLA 0x0100
525 #define MCU_TYPE_USB 0x0000
527 struct tally_counter {
534 __le32 tx_one_collision;
535 __le32 tx_multi_collision;
545 #define RX_LEN_MASK 0x7fff
548 #define RD_UDP_CS BIT(23)
549 #define RD_TCP_CS BIT(22)
550 #define RD_IPV6_CS BIT(20)
551 #define RD_IPV4_CS BIT(19)
554 #define IPF BIT(23) /* IP checksum fail */
555 #define UDPF BIT(22) /* UDP checksum fail */
556 #define TCPF BIT(21) /* TCP checksum fail */
557 #define RX_VLAN_TAG BIT(16)
566 #define TX_FS BIT(31) /* First segment of a packet */
567 #define TX_LS BIT(30) /* Final segment of a packet */
568 #define GTSENDV4 BIT(28)
569 #define GTSENDV6 BIT(27)
570 #define GTTCPHO_SHIFT 18
571 #define GTTCPHO_MAX 0x7fU
572 #define TX_LEN_MAX 0x3ffffU
575 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
576 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
577 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
578 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
580 #define MSS_MAX 0x7ffU
581 #define TCPHO_SHIFT 17
582 #define TCPHO_MAX 0x7ffU
583 #define TX_VLAN_TAG BIT(16)
589 struct list_head list;
591 struct r8152 *context;
597 struct list_head list;
599 struct r8152 *context;
608 struct usb_device *udev;
609 struct napi_struct napi;
610 struct usb_interface *intf;
611 struct net_device *netdev;
612 struct urb *intr_urb;
613 struct tx_agg tx_info[RTL8152_MAX_TX];
614 struct rx_agg rx_info[RTL8152_MAX_RX];
615 struct list_head rx_done, tx_free;
616 struct sk_buff_head tx_queue, rx_queue;
617 spinlock_t rx_lock, tx_lock;
618 struct delayed_work schedule, hw_phy_work;
619 struct mii_if_info mii;
620 struct mutex control; /* use for hw setting */
621 #ifdef CONFIG_PM_SLEEP
622 struct notifier_block pm_notifier;
626 void (*init)(struct r8152 *);
627 int (*enable)(struct r8152 *);
628 void (*disable)(struct r8152 *);
629 void (*up)(struct r8152 *);
630 void (*down)(struct r8152 *);
631 void (*unload)(struct r8152 *);
632 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
633 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
634 bool (*in_nway)(struct r8152 *);
635 void (*hw_phy_cfg)(struct r8152 *);
636 void (*autosuspend_en)(struct r8152 *tp, bool enable);
669 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
670 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
672 static const int multicast_filter_limit = 32;
673 static unsigned int agg_buf_sz = 16384;
675 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
676 VLAN_ETH_HLEN - VLAN_HLEN)
679 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
684 tmp = kmalloc(size, GFP_KERNEL);
688 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
689 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
690 value, index, tmp, size, 500);
692 memcpy(data, tmp, size);
699 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
704 tmp = kmemdup(data, size, GFP_KERNEL);
708 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
709 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
710 value, index, tmp, size, 500);
717 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
718 void *data, u16 type)
723 if (test_bit(RTL8152_UNPLUG, &tp->flags))
726 /* both size and indix must be 4 bytes align */
727 if ((size & 3) || !size || (index & 3) || !data)
730 if ((u32)index + (u32)size > 0xffff)
735 ret = get_registers(tp, index, type, limit, data);
743 ret = get_registers(tp, index, type, size, data);
755 set_bit(RTL8152_UNPLUG, &tp->flags);
760 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
761 u16 size, void *data, u16 type)
764 u16 byteen_start, byteen_end, byen;
767 if (test_bit(RTL8152_UNPLUG, &tp->flags))
770 /* both size and indix must be 4 bytes align */
771 if ((size & 3) || !size || (index & 3) || !data)
774 if ((u32)index + (u32)size > 0xffff)
777 byteen_start = byteen & BYTE_EN_START_MASK;
778 byteen_end = byteen & BYTE_EN_END_MASK;
780 byen = byteen_start | (byteen_start << 4);
781 ret = set_registers(tp, index, type | byen, 4, data);
794 ret = set_registers(tp, index,
795 type | BYTE_EN_DWORD,
804 ret = set_registers(tp, index,
805 type | BYTE_EN_DWORD,
817 byen = byteen_end | (byteen_end >> 4);
818 ret = set_registers(tp, index, type | byen, 4, data);
825 set_bit(RTL8152_UNPLUG, &tp->flags);
831 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
833 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
837 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
839 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
843 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
845 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
849 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
851 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
854 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
858 generic_ocp_read(tp, index, sizeof(data), &data, type);
860 return __le32_to_cpu(data);
863 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
865 __le32 tmp = __cpu_to_le32(data);
867 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
870 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
874 u8 shift = index & 2;
878 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
880 data = __le32_to_cpu(tmp);
881 data >>= (shift * 8);
887 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
891 u16 byen = BYTE_EN_WORD;
892 u8 shift = index & 2;
898 mask <<= (shift * 8);
899 data <<= (shift * 8);
903 tmp = __cpu_to_le32(data);
905 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
908 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
912 u8 shift = index & 3;
916 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
918 data = __le32_to_cpu(tmp);
919 data >>= (shift * 8);
925 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
929 u16 byen = BYTE_EN_BYTE;
930 u8 shift = index & 3;
936 mask <<= (shift * 8);
937 data <<= (shift * 8);
941 tmp = __cpu_to_le32(data);
943 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
946 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
948 u16 ocp_base, ocp_index;
950 ocp_base = addr & 0xf000;
951 if (ocp_base != tp->ocp_base) {
952 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
953 tp->ocp_base = ocp_base;
956 ocp_index = (addr & 0x0fff) | 0xb000;
957 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
960 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
962 u16 ocp_base, ocp_index;
964 ocp_base = addr & 0xf000;
965 if (ocp_base != tp->ocp_base) {
966 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
967 tp->ocp_base = ocp_base;
970 ocp_index = (addr & 0x0fff) | 0xb000;
971 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
974 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
976 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
979 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
981 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
984 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
986 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
987 ocp_reg_write(tp, OCP_SRAM_DATA, data);
990 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
992 struct r8152 *tp = netdev_priv(netdev);
995 if (test_bit(RTL8152_UNPLUG, &tp->flags))
998 if (phy_id != R8152_PHY_ID)
1001 ret = r8152_mdio_read(tp, reg);
1007 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1009 struct r8152 *tp = netdev_priv(netdev);
1011 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1014 if (phy_id != R8152_PHY_ID)
1017 r8152_mdio_write(tp, reg, val);
1021 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1023 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1025 struct r8152 *tp = netdev_priv(netdev);
1026 struct sockaddr *addr = p;
1027 int ret = -EADDRNOTAVAIL;
1029 if (!is_valid_ether_addr(addr->sa_data))
1032 ret = usb_autopm_get_interface(tp->intf);
1036 mutex_lock(&tp->control);
1038 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1040 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1041 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1042 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1044 mutex_unlock(&tp->control);
1046 usb_autopm_put_interface(tp->intf);
1051 /* Devices containing RTL8153-AD can support a persistent
1052 * host system provided MAC address.
1053 * Examples of this are Dell TB15 and Dell WD15 docks
1055 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1058 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1059 union acpi_object *obj;
1062 unsigned char buf[6];
1064 /* test for -AD variant of RTL8153 */
1065 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1066 if ((ocp_data & AD_MASK) != 0x1000)
1069 /* test for MAC address pass-through bit */
1070 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1071 if ((ocp_data & PASS_THRU_MASK) != 1)
1074 /* returns _AUXMAC_#AABBCCDDEEFF# */
1075 status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1076 obj = (union acpi_object *)buffer.pointer;
1077 if (!ACPI_SUCCESS(status))
1079 if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1080 netif_warn(tp, probe, tp->netdev,
1081 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1082 obj->type, obj->string.length);
1085 if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1086 strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1087 netif_warn(tp, probe, tp->netdev,
1088 "Invalid header when reading pass-thru MAC addr\n");
1091 ret = hex2bin(buf, obj->string.pointer + 9, 6);
1092 if (!(ret == 0 && is_valid_ether_addr(buf))) {
1093 netif_warn(tp, probe, tp->netdev,
1094 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1099 memcpy(sa->sa_data, buf, 6);
1100 ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1101 netif_info(tp, probe, tp->netdev,
1102 "Using pass-thru MAC addr %pM\n", sa->sa_data);
1109 static int set_ethernet_addr(struct r8152 *tp)
1111 struct net_device *dev = tp->netdev;
1115 if (tp->version == RTL_VER_01) {
1116 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1118 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1119 * or system doesn't provide valid _SB.AMAC this will be
1120 * be expected to non-zero
1122 ret = vendor_mac_passthru_addr_read(tp, &sa);
1124 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1128 netif_err(tp, probe, dev, "Get ether addr fail\n");
1129 } else if (!is_valid_ether_addr(sa.sa_data)) {
1130 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1132 eth_hw_addr_random(dev);
1133 ether_addr_copy(sa.sa_data, dev->dev_addr);
1134 ret = rtl8152_set_mac_address(dev, &sa);
1135 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1138 if (tp->version == RTL_VER_01)
1139 ether_addr_copy(dev->dev_addr, sa.sa_data);
1141 ret = rtl8152_set_mac_address(dev, &sa);
1147 static void read_bulk_callback(struct urb *urb)
1149 struct net_device *netdev;
1150 int status = urb->status;
1162 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1165 if (!test_bit(WORK_ENABLE, &tp->flags))
1168 netdev = tp->netdev;
1170 /* When link down, the driver would cancel all bulks. */
1171 /* This avoid the re-submitting bulk */
1172 if (!netif_carrier_ok(netdev))
1175 usb_mark_last_busy(tp->udev);
1179 if (urb->actual_length < ETH_ZLEN)
1182 spin_lock(&tp->rx_lock);
1183 list_add_tail(&agg->list, &tp->rx_done);
1184 spin_unlock(&tp->rx_lock);
1185 napi_schedule(&tp->napi);
1188 set_bit(RTL8152_UNPLUG, &tp->flags);
1189 netif_device_detach(tp->netdev);
1192 return; /* the urb is in unlink state */
1194 if (net_ratelimit())
1195 netdev_warn(netdev, "maybe reset is needed?\n");
1198 if (net_ratelimit())
1199 netdev_warn(netdev, "Rx status %d\n", status);
1203 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1206 static void write_bulk_callback(struct urb *urb)
1208 struct net_device_stats *stats;
1209 struct net_device *netdev;
1212 int status = urb->status;
1222 netdev = tp->netdev;
1223 stats = &netdev->stats;
1225 if (net_ratelimit())
1226 netdev_warn(netdev, "Tx status %d\n", status);
1227 stats->tx_errors += agg->skb_num;
1229 stats->tx_packets += agg->skb_num;
1230 stats->tx_bytes += agg->skb_len;
1233 spin_lock(&tp->tx_lock);
1234 list_add_tail(&agg->list, &tp->tx_free);
1235 spin_unlock(&tp->tx_lock);
1237 usb_autopm_put_interface_async(tp->intf);
1239 if (!netif_carrier_ok(netdev))
1242 if (!test_bit(WORK_ENABLE, &tp->flags))
1245 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1248 if (!skb_queue_empty(&tp->tx_queue))
1249 napi_schedule(&tp->napi);
1252 static void intr_callback(struct urb *urb)
1256 int status = urb->status;
1263 if (!test_bit(WORK_ENABLE, &tp->flags))
1266 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1270 case 0: /* success */
1272 case -ECONNRESET: /* unlink */
1274 netif_device_detach(tp->netdev);
1277 netif_info(tp, intr, tp->netdev,
1278 "Stop submitting intr, status %d\n", status);
1281 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1283 /* -EPIPE: should clear the halt */
1285 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1289 d = urb->transfer_buffer;
1290 if (INTR_LINK & __le16_to_cpu(d[0])) {
1291 if (!netif_carrier_ok(tp->netdev)) {
1292 set_bit(RTL8152_LINK_CHG, &tp->flags);
1293 schedule_delayed_work(&tp->schedule, 0);
1296 if (netif_carrier_ok(tp->netdev)) {
1297 set_bit(RTL8152_LINK_CHG, &tp->flags);
1298 schedule_delayed_work(&tp->schedule, 0);
1303 res = usb_submit_urb(urb, GFP_ATOMIC);
1304 if (res == -ENODEV) {
1305 set_bit(RTL8152_UNPLUG, &tp->flags);
1306 netif_device_detach(tp->netdev);
1308 netif_err(tp, intr, tp->netdev,
1309 "can't resubmit intr, status %d\n", res);
1313 static inline void *rx_agg_align(void *data)
1315 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1318 static inline void *tx_agg_align(void *data)
1320 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1323 static void free_all_mem(struct r8152 *tp)
1327 for (i = 0; i < RTL8152_MAX_RX; i++) {
1328 usb_free_urb(tp->rx_info[i].urb);
1329 tp->rx_info[i].urb = NULL;
1331 kfree(tp->rx_info[i].buffer);
1332 tp->rx_info[i].buffer = NULL;
1333 tp->rx_info[i].head = NULL;
1336 for (i = 0; i < RTL8152_MAX_TX; i++) {
1337 usb_free_urb(tp->tx_info[i].urb);
1338 tp->tx_info[i].urb = NULL;
1340 kfree(tp->tx_info[i].buffer);
1341 tp->tx_info[i].buffer = NULL;
1342 tp->tx_info[i].head = NULL;
1345 usb_free_urb(tp->intr_urb);
1346 tp->intr_urb = NULL;
1348 kfree(tp->intr_buff);
1349 tp->intr_buff = NULL;
1352 static int alloc_all_mem(struct r8152 *tp)
1354 struct net_device *netdev = tp->netdev;
1355 struct usb_interface *intf = tp->intf;
1356 struct usb_host_interface *alt = intf->cur_altsetting;
1357 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1362 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1364 spin_lock_init(&tp->rx_lock);
1365 spin_lock_init(&tp->tx_lock);
1366 INIT_LIST_HEAD(&tp->tx_free);
1367 INIT_LIST_HEAD(&tp->rx_done);
1368 skb_queue_head_init(&tp->tx_queue);
1369 skb_queue_head_init(&tp->rx_queue);
1371 for (i = 0; i < RTL8152_MAX_RX; i++) {
1372 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1376 if (buf != rx_agg_align(buf)) {
1378 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1384 urb = usb_alloc_urb(0, GFP_KERNEL);
1390 INIT_LIST_HEAD(&tp->rx_info[i].list);
1391 tp->rx_info[i].context = tp;
1392 tp->rx_info[i].urb = urb;
1393 tp->rx_info[i].buffer = buf;
1394 tp->rx_info[i].head = rx_agg_align(buf);
1397 for (i = 0; i < RTL8152_MAX_TX; i++) {
1398 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1402 if (buf != tx_agg_align(buf)) {
1404 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1410 urb = usb_alloc_urb(0, GFP_KERNEL);
1416 INIT_LIST_HEAD(&tp->tx_info[i].list);
1417 tp->tx_info[i].context = tp;
1418 tp->tx_info[i].urb = urb;
1419 tp->tx_info[i].buffer = buf;
1420 tp->tx_info[i].head = tx_agg_align(buf);
1422 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1425 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1429 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1433 tp->intr_interval = (int)ep_intr->desc.bInterval;
1434 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1435 tp->intr_buff, INTBUFSIZE, intr_callback,
1436 tp, tp->intr_interval);
1445 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1447 struct tx_agg *agg = NULL;
1448 unsigned long flags;
1450 if (list_empty(&tp->tx_free))
1453 spin_lock_irqsave(&tp->tx_lock, flags);
1454 if (!list_empty(&tp->tx_free)) {
1455 struct list_head *cursor;
1457 cursor = tp->tx_free.next;
1458 list_del_init(cursor);
1459 agg = list_entry(cursor, struct tx_agg, list);
1461 spin_unlock_irqrestore(&tp->tx_lock, flags);
1466 /* r8152_csum_workaround()
1467 * The hw limites the value the transport offset. When the offset is out of the
1468 * range, calculate the checksum by sw.
1470 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1471 struct sk_buff_head *list)
1473 if (skb_shinfo(skb)->gso_size) {
1474 netdev_features_t features = tp->netdev->features;
1475 struct sk_buff_head seg_list;
1476 struct sk_buff *segs, *nskb;
1478 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1479 segs = skb_gso_segment(skb, features);
1480 if (IS_ERR(segs) || !segs)
1483 __skb_queue_head_init(&seg_list);
1489 __skb_queue_tail(&seg_list, nskb);
1492 skb_queue_splice(&seg_list, list);
1494 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1495 if (skb_checksum_help(skb) < 0)
1498 __skb_queue_head(list, skb);
1500 struct net_device_stats *stats;
1503 stats = &tp->netdev->stats;
1504 stats->tx_dropped++;
1509 /* msdn_giant_send_check()
1510 * According to the document of microsoft, the TCP Pseudo Header excludes the
1511 * packet length for IPv6 TCP large packets.
1513 static int msdn_giant_send_check(struct sk_buff *skb)
1515 const struct ipv6hdr *ipv6h;
1519 ret = skb_cow_head(skb, 0);
1523 ipv6h = ipv6_hdr(skb);
1527 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1532 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1534 if (skb_vlan_tag_present(skb)) {
1537 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1538 desc->opts2 |= cpu_to_le32(opts2);
1542 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1544 u32 opts2 = le32_to_cpu(desc->opts2);
1546 if (opts2 & RX_VLAN_TAG)
1547 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1548 swab16(opts2 & 0xffff));
1551 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1552 struct sk_buff *skb, u32 len, u32 transport_offset)
1554 u32 mss = skb_shinfo(skb)->gso_size;
1555 u32 opts1, opts2 = 0;
1556 int ret = TX_CSUM_SUCCESS;
1558 WARN_ON_ONCE(len > TX_LEN_MAX);
1560 opts1 = len | TX_FS | TX_LS;
1563 if (transport_offset > GTTCPHO_MAX) {
1564 netif_warn(tp, tx_err, tp->netdev,
1565 "Invalid transport offset 0x%x for TSO\n",
1571 switch (vlan_get_protocol(skb)) {
1572 case htons(ETH_P_IP):
1576 case htons(ETH_P_IPV6):
1577 if (msdn_giant_send_check(skb)) {
1589 opts1 |= transport_offset << GTTCPHO_SHIFT;
1590 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1591 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1594 if (transport_offset > TCPHO_MAX) {
1595 netif_warn(tp, tx_err, tp->netdev,
1596 "Invalid transport offset 0x%x\n",
1602 switch (vlan_get_protocol(skb)) {
1603 case htons(ETH_P_IP):
1605 ip_protocol = ip_hdr(skb)->protocol;
1608 case htons(ETH_P_IPV6):
1610 ip_protocol = ipv6_hdr(skb)->nexthdr;
1614 ip_protocol = IPPROTO_RAW;
1618 if (ip_protocol == IPPROTO_TCP)
1620 else if (ip_protocol == IPPROTO_UDP)
1625 opts2 |= transport_offset << TCPHO_SHIFT;
1628 desc->opts2 = cpu_to_le32(opts2);
1629 desc->opts1 = cpu_to_le32(opts1);
1635 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1637 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1641 __skb_queue_head_init(&skb_head);
1642 spin_lock(&tx_queue->lock);
1643 skb_queue_splice_init(tx_queue, &skb_head);
1644 spin_unlock(&tx_queue->lock);
1646 tx_data = agg->head;
1649 remain = agg_buf_sz;
1651 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1652 struct tx_desc *tx_desc;
1653 struct sk_buff *skb;
1657 skb = __skb_dequeue(&skb_head);
1661 len = skb->len + sizeof(*tx_desc);
1664 __skb_queue_head(&skb_head, skb);
1668 tx_data = tx_agg_align(tx_data);
1669 tx_desc = (struct tx_desc *)tx_data;
1671 offset = (u32)skb_transport_offset(skb);
1673 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1674 r8152_csum_workaround(tp, skb, &skb_head);
1678 rtl_tx_vlan_tag(tx_desc, skb);
1680 tx_data += sizeof(*tx_desc);
1683 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1684 struct net_device_stats *stats = &tp->netdev->stats;
1686 stats->tx_dropped++;
1687 dev_kfree_skb_any(skb);
1688 tx_data -= sizeof(*tx_desc);
1693 agg->skb_len += len;
1696 dev_kfree_skb_any(skb);
1698 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1701 if (!skb_queue_empty(&skb_head)) {
1702 spin_lock(&tx_queue->lock);
1703 skb_queue_splice(&skb_head, tx_queue);
1704 spin_unlock(&tx_queue->lock);
1707 netif_tx_lock(tp->netdev);
1709 if (netif_queue_stopped(tp->netdev) &&
1710 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1711 netif_wake_queue(tp->netdev);
1713 netif_tx_unlock(tp->netdev);
1715 ret = usb_autopm_get_interface_async(tp->intf);
1719 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1720 agg->head, (int)(tx_data - (u8 *)agg->head),
1721 (usb_complete_t)write_bulk_callback, agg);
1723 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1725 usb_autopm_put_interface_async(tp->intf);
1731 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1733 u8 checksum = CHECKSUM_NONE;
1736 if (!(tp->netdev->features & NETIF_F_RXCSUM))
1739 opts2 = le32_to_cpu(rx_desc->opts2);
1740 opts3 = le32_to_cpu(rx_desc->opts3);
1742 if (opts2 & RD_IPV4_CS) {
1744 checksum = CHECKSUM_NONE;
1745 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1746 checksum = CHECKSUM_NONE;
1747 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1748 checksum = CHECKSUM_NONE;
1750 checksum = CHECKSUM_UNNECESSARY;
1751 } else if (opts2 & RD_IPV6_CS) {
1752 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1753 checksum = CHECKSUM_UNNECESSARY;
1754 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1755 checksum = CHECKSUM_UNNECESSARY;
1762 static int rx_bottom(struct r8152 *tp, int budget)
1764 unsigned long flags;
1765 struct list_head *cursor, *next, rx_queue;
1766 int ret = 0, work_done = 0;
1767 struct napi_struct *napi = &tp->napi;
1769 if (!skb_queue_empty(&tp->rx_queue)) {
1770 while (work_done < budget) {
1771 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1772 struct net_device *netdev = tp->netdev;
1773 struct net_device_stats *stats = &netdev->stats;
1774 unsigned int pkt_len;
1780 napi_gro_receive(napi, skb);
1782 stats->rx_packets++;
1783 stats->rx_bytes += pkt_len;
1787 if (list_empty(&tp->rx_done))
1790 INIT_LIST_HEAD(&rx_queue);
1791 spin_lock_irqsave(&tp->rx_lock, flags);
1792 list_splice_init(&tp->rx_done, &rx_queue);
1793 spin_unlock_irqrestore(&tp->rx_lock, flags);
1795 list_for_each_safe(cursor, next, &rx_queue) {
1796 struct rx_desc *rx_desc;
1802 list_del_init(cursor);
1804 agg = list_entry(cursor, struct rx_agg, list);
1806 if (urb->actual_length < ETH_ZLEN)
1809 rx_desc = agg->head;
1810 rx_data = agg->head;
1811 len_used += sizeof(struct rx_desc);
1813 while (urb->actual_length > len_used) {
1814 struct net_device *netdev = tp->netdev;
1815 struct net_device_stats *stats = &netdev->stats;
1816 unsigned int pkt_len;
1817 struct sk_buff *skb;
1819 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1820 if (pkt_len < ETH_ZLEN)
1823 len_used += pkt_len;
1824 if (urb->actual_length < len_used)
1827 pkt_len -= CRC_SIZE;
1828 rx_data += sizeof(struct rx_desc);
1830 skb = napi_alloc_skb(napi, pkt_len);
1832 stats->rx_dropped++;
1836 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1837 memcpy(skb->data, rx_data, pkt_len);
1838 skb_put(skb, pkt_len);
1839 skb->protocol = eth_type_trans(skb, netdev);
1840 rtl_rx_vlan_tag(rx_desc, skb);
1841 if (work_done < budget) {
1842 napi_gro_receive(napi, skb);
1844 stats->rx_packets++;
1845 stats->rx_bytes += pkt_len;
1847 __skb_queue_tail(&tp->rx_queue, skb);
1851 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1852 rx_desc = (struct rx_desc *)rx_data;
1853 len_used = (int)(rx_data - (u8 *)agg->head);
1854 len_used += sizeof(struct rx_desc);
1859 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1861 urb->actual_length = 0;
1862 list_add_tail(&agg->list, next);
1866 if (!list_empty(&rx_queue)) {
1867 spin_lock_irqsave(&tp->rx_lock, flags);
1868 list_splice_tail(&rx_queue, &tp->rx_done);
1869 spin_unlock_irqrestore(&tp->rx_lock, flags);
1876 static void tx_bottom(struct r8152 *tp)
1883 if (skb_queue_empty(&tp->tx_queue))
1886 agg = r8152_get_tx_agg(tp);
1890 res = r8152_tx_agg_fill(tp, agg);
1892 struct net_device *netdev = tp->netdev;
1894 if (res == -ENODEV) {
1895 set_bit(RTL8152_UNPLUG, &tp->flags);
1896 netif_device_detach(netdev);
1898 struct net_device_stats *stats = &netdev->stats;
1899 unsigned long flags;
1901 netif_warn(tp, tx_err, netdev,
1902 "failed tx_urb %d\n", res);
1903 stats->tx_dropped += agg->skb_num;
1905 spin_lock_irqsave(&tp->tx_lock, flags);
1906 list_add_tail(&agg->list, &tp->tx_free);
1907 spin_unlock_irqrestore(&tp->tx_lock, flags);
1913 static void bottom_half(struct r8152 *tp)
1915 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1918 if (!test_bit(WORK_ENABLE, &tp->flags))
1921 /* When link down, the driver would cancel all bulks. */
1922 /* This avoid the re-submitting bulk */
1923 if (!netif_carrier_ok(tp->netdev))
1926 clear_bit(SCHEDULE_NAPI, &tp->flags);
1931 static int r8152_poll(struct napi_struct *napi, int budget)
1933 struct r8152 *tp = container_of(napi, struct r8152, napi);
1936 work_done = rx_bottom(tp, budget);
1939 if (work_done < budget) {
1940 napi_complete(napi);
1941 if (!list_empty(&tp->rx_done))
1942 napi_schedule(napi);
1943 else if (!skb_queue_empty(&tp->tx_queue) &&
1944 !list_empty(&tp->tx_free))
1945 napi_schedule(napi);
1952 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1956 /* The rx would be stopped, so skip submitting */
1957 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1958 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1961 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1962 agg->head, agg_buf_sz,
1963 (usb_complete_t)read_bulk_callback, agg);
1965 ret = usb_submit_urb(agg->urb, mem_flags);
1966 if (ret == -ENODEV) {
1967 set_bit(RTL8152_UNPLUG, &tp->flags);
1968 netif_device_detach(tp->netdev);
1970 struct urb *urb = agg->urb;
1971 unsigned long flags;
1973 urb->actual_length = 0;
1974 spin_lock_irqsave(&tp->rx_lock, flags);
1975 list_add_tail(&agg->list, &tp->rx_done);
1976 spin_unlock_irqrestore(&tp->rx_lock, flags);
1978 netif_err(tp, rx_err, tp->netdev,
1979 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1981 napi_schedule(&tp->napi);
1987 static void rtl_drop_queued_tx(struct r8152 *tp)
1989 struct net_device_stats *stats = &tp->netdev->stats;
1990 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1991 struct sk_buff *skb;
1993 if (skb_queue_empty(tx_queue))
1996 __skb_queue_head_init(&skb_head);
1997 spin_lock_bh(&tx_queue->lock);
1998 skb_queue_splice_init(tx_queue, &skb_head);
1999 spin_unlock_bh(&tx_queue->lock);
2001 while ((skb = __skb_dequeue(&skb_head))) {
2003 stats->tx_dropped++;
2007 static void rtl8152_tx_timeout(struct net_device *netdev)
2009 struct r8152 *tp = netdev_priv(netdev);
2011 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2013 usb_queue_reset_device(tp->intf);
2016 static void rtl8152_set_rx_mode(struct net_device *netdev)
2018 struct r8152 *tp = netdev_priv(netdev);
2020 if (netif_carrier_ok(netdev)) {
2021 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2022 schedule_delayed_work(&tp->schedule, 0);
2026 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2028 struct r8152 *tp = netdev_priv(netdev);
2029 u32 mc_filter[2]; /* Multicast hash filter */
2033 netif_stop_queue(netdev);
2034 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2035 ocp_data &= ~RCR_ACPT_ALL;
2036 ocp_data |= RCR_AB | RCR_APM;
2038 if (netdev->flags & IFF_PROMISC) {
2039 /* Unconditionally log net taps. */
2040 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2041 ocp_data |= RCR_AM | RCR_AAP;
2042 mc_filter[1] = 0xffffffff;
2043 mc_filter[0] = 0xffffffff;
2044 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2045 (netdev->flags & IFF_ALLMULTI)) {
2046 /* Too many to filter perfectly -- accept all multicasts. */
2048 mc_filter[1] = 0xffffffff;
2049 mc_filter[0] = 0xffffffff;
2051 struct netdev_hw_addr *ha;
2055 netdev_for_each_mc_addr(ha, netdev) {
2056 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2058 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2063 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2064 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2066 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2067 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2068 netif_wake_queue(netdev);
2071 static netdev_features_t
2072 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2073 netdev_features_t features)
2075 u32 mss = skb_shinfo(skb)->gso_size;
2076 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2077 int offset = skb_transport_offset(skb);
2079 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2080 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2081 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2082 features &= ~NETIF_F_GSO_MASK;
2087 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2088 struct net_device *netdev)
2090 struct r8152 *tp = netdev_priv(netdev);
2092 skb_tx_timestamp(skb);
2094 skb_queue_tail(&tp->tx_queue, skb);
2096 if (!list_empty(&tp->tx_free)) {
2097 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2098 set_bit(SCHEDULE_NAPI, &tp->flags);
2099 schedule_delayed_work(&tp->schedule, 0);
2101 usb_mark_last_busy(tp->udev);
2102 napi_schedule(&tp->napi);
2104 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2105 netif_stop_queue(netdev);
2108 return NETDEV_TX_OK;
2111 static void r8152b_reset_packet_filter(struct r8152 *tp)
2115 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2116 ocp_data &= ~FMC_FCR_MCU_EN;
2117 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2118 ocp_data |= FMC_FCR_MCU_EN;
2119 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2122 static void rtl8152_nic_reset(struct r8152 *tp)
2126 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2128 for (i = 0; i < 1000; i++) {
2129 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2131 usleep_range(100, 400);
2135 static void set_tx_qlen(struct r8152 *tp)
2137 struct net_device *netdev = tp->netdev;
2139 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2140 sizeof(struct tx_desc));
2143 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2145 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2148 static void rtl_set_eee_plus(struct r8152 *tp)
2153 speed = rtl8152_get_speed(tp);
2154 if (speed & _10bps) {
2155 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2156 ocp_data |= EEEP_CR_EEEP_TX;
2157 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2159 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2160 ocp_data &= ~EEEP_CR_EEEP_TX;
2161 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2165 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2169 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2171 ocp_data |= RXDY_GATED_EN;
2173 ocp_data &= ~RXDY_GATED_EN;
2174 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2177 static int rtl_start_rx(struct r8152 *tp)
2181 INIT_LIST_HEAD(&tp->rx_done);
2182 for (i = 0; i < RTL8152_MAX_RX; i++) {
2183 INIT_LIST_HEAD(&tp->rx_info[i].list);
2184 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2189 if (ret && ++i < RTL8152_MAX_RX) {
2190 struct list_head rx_queue;
2191 unsigned long flags;
2193 INIT_LIST_HEAD(&rx_queue);
2196 struct rx_agg *agg = &tp->rx_info[i++];
2197 struct urb *urb = agg->urb;
2199 urb->actual_length = 0;
2200 list_add_tail(&agg->list, &rx_queue);
2201 } while (i < RTL8152_MAX_RX);
2203 spin_lock_irqsave(&tp->rx_lock, flags);
2204 list_splice_tail(&rx_queue, &tp->rx_done);
2205 spin_unlock_irqrestore(&tp->rx_lock, flags);
2211 static int rtl_stop_rx(struct r8152 *tp)
2215 for (i = 0; i < RTL8152_MAX_RX; i++)
2216 usb_kill_urb(tp->rx_info[i].urb);
2218 while (!skb_queue_empty(&tp->rx_queue))
2219 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2224 static int rtl_enable(struct r8152 *tp)
2228 r8152b_reset_packet_filter(tp);
2230 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2231 ocp_data |= CR_RE | CR_TE;
2232 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2234 rxdy_gated_en(tp, false);
2239 static int rtl8152_enable(struct r8152 *tp)
2241 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2245 rtl_set_eee_plus(tp);
2247 return rtl_enable(tp);
2250 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2252 u32 ocp_data = tp->coalesce / 8;
2254 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2257 static void r8153_set_rx_early_size(struct r8152 *tp)
2259 u32 ocp_data = (agg_buf_sz - rx_reserved_size(tp->netdev->mtu)) / 4;
2261 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2264 static int rtl8153_enable(struct r8152 *tp)
2266 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2269 usb_disable_lpm(tp->udev);
2271 rtl_set_eee_plus(tp);
2272 r8153_set_rx_early_timeout(tp);
2273 r8153_set_rx_early_size(tp);
2275 return rtl_enable(tp);
2278 static void rtl_disable(struct r8152 *tp)
2283 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2284 rtl_drop_queued_tx(tp);
2288 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2289 ocp_data &= ~RCR_ACPT_ALL;
2290 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2292 rtl_drop_queued_tx(tp);
2294 for (i = 0; i < RTL8152_MAX_TX; i++)
2295 usb_kill_urb(tp->tx_info[i].urb);
2297 rxdy_gated_en(tp, true);
2299 for (i = 0; i < 1000; i++) {
2300 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2301 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2303 usleep_range(1000, 2000);
2306 for (i = 0; i < 1000; i++) {
2307 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2309 usleep_range(1000, 2000);
2314 rtl8152_nic_reset(tp);
2317 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2321 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2323 ocp_data |= POWER_CUT;
2325 ocp_data &= ~POWER_CUT;
2326 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2328 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2329 ocp_data &= ~RESUME_INDICATE;
2330 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2333 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2337 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2339 ocp_data |= CPCR_RX_VLAN;
2341 ocp_data &= ~CPCR_RX_VLAN;
2342 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2345 static int rtl8152_set_features(struct net_device *dev,
2346 netdev_features_t features)
2348 netdev_features_t changed = features ^ dev->features;
2349 struct r8152 *tp = netdev_priv(dev);
2352 ret = usb_autopm_get_interface(tp->intf);
2356 mutex_lock(&tp->control);
2358 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2359 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2360 rtl_rx_vlan_en(tp, true);
2362 rtl_rx_vlan_en(tp, false);
2365 mutex_unlock(&tp->control);
2367 usb_autopm_put_interface(tp->intf);
2373 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2375 static u32 __rtl_get_wol(struct r8152 *tp)
2380 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2381 if (ocp_data & LINK_ON_WAKE_EN)
2382 wolopts |= WAKE_PHY;
2384 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2385 if (ocp_data & UWF_EN)
2386 wolopts |= WAKE_UCAST;
2387 if (ocp_data & BWF_EN)
2388 wolopts |= WAKE_BCAST;
2389 if (ocp_data & MWF_EN)
2390 wolopts |= WAKE_MCAST;
2392 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2393 if (ocp_data & MAGIC_EN)
2394 wolopts |= WAKE_MAGIC;
2399 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2403 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2405 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2406 ocp_data &= ~LINK_ON_WAKE_EN;
2407 if (wolopts & WAKE_PHY)
2408 ocp_data |= LINK_ON_WAKE_EN;
2409 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2411 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2412 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2413 if (wolopts & WAKE_UCAST)
2415 if (wolopts & WAKE_BCAST)
2417 if (wolopts & WAKE_MCAST)
2419 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2421 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2423 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2424 ocp_data &= ~MAGIC_EN;
2425 if (wolopts & WAKE_MAGIC)
2426 ocp_data |= MAGIC_EN;
2427 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2429 if (wolopts & WAKE_ANY)
2430 device_set_wakeup_enable(&tp->udev->dev, true);
2432 device_set_wakeup_enable(&tp->udev->dev, false);
2435 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2440 memset(u1u2, 0xff, sizeof(u1u2));
2442 memset(u1u2, 0x00, sizeof(u1u2));
2444 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2447 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2451 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2452 if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2453 ocp_data |= U2P3_ENABLE;
2455 ocp_data &= ~U2P3_ENABLE;
2456 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2459 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2463 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2465 ocp_data |= PWR_EN | PHASE2_EN;
2467 ocp_data &= ~(PWR_EN | PHASE2_EN);
2468 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2470 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2471 ocp_data &= ~PCUT_STATUS;
2472 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2475 static bool rtl_can_wakeup(struct r8152 *tp)
2477 struct usb_device *udev = tp->udev;
2479 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2482 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2487 __rtl_set_wol(tp, WAKE_ANY);
2489 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2491 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2492 ocp_data |= LINK_OFF_WAKE_EN;
2493 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2495 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2499 __rtl_set_wol(tp, tp->saved_wolopts);
2501 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2503 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2504 ocp_data &= ~LINK_OFF_WAKE_EN;
2505 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2507 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2511 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2513 rtl_runtime_suspend_enable(tp, enable);
2516 r8153_u1u2en(tp, false);
2517 r8153_u2p3en(tp, false);
2519 r8153_u2p3en(tp, true);
2520 r8153_u1u2en(tp, true);
2524 static void r8153_teredo_off(struct r8152 *tp)
2528 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2529 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2530 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2532 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2533 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2534 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2537 static void rtl_reset_bmu(struct r8152 *tp)
2541 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2542 ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2543 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2544 ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2545 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2548 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2551 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2552 LINKENA | DIS_SDSAVE);
2554 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2560 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2562 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2563 ocp_reg_write(tp, OCP_EEE_DATA, reg);
2564 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2567 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2571 r8152_mmd_indirect(tp, dev, reg);
2572 data = ocp_reg_read(tp, OCP_EEE_DATA);
2573 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2578 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2580 r8152_mmd_indirect(tp, dev, reg);
2581 ocp_reg_write(tp, OCP_EEE_DATA, data);
2582 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2585 static void r8152_eee_en(struct r8152 *tp, bool enable)
2587 u16 config1, config2, config3;
2590 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2591 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2592 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2593 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2596 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2597 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2598 config1 |= sd_rise_time(1);
2599 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2600 config3 |= fast_snr(42);
2602 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2603 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2605 config1 |= sd_rise_time(7);
2606 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2607 config3 |= fast_snr(511);
2610 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2611 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2612 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2613 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2616 static void r8152b_enable_eee(struct r8152 *tp)
2618 r8152_eee_en(tp, true);
2619 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2622 static void r8152b_enable_fc(struct r8152 *tp)
2626 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2627 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2628 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2631 static void rtl8152_disable(struct r8152 *tp)
2633 r8152_aldps_en(tp, false);
2635 r8152_aldps_en(tp, true);
2638 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2640 r8152b_enable_eee(tp);
2641 r8152_aldps_en(tp, true);
2642 r8152b_enable_fc(tp);
2644 set_bit(PHY_RESET, &tp->flags);
2647 static void r8152b_exit_oob(struct r8152 *tp)
2652 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2653 ocp_data &= ~RCR_ACPT_ALL;
2654 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2656 rxdy_gated_en(tp, true);
2657 r8153_teredo_off(tp);
2658 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2659 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2661 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2662 ocp_data &= ~NOW_IS_OOB;
2663 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2665 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2666 ocp_data &= ~MCU_BORW_EN;
2667 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2669 for (i = 0; i < 1000; i++) {
2670 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2671 if (ocp_data & LINK_LIST_READY)
2673 usleep_range(1000, 2000);
2676 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2677 ocp_data |= RE_INIT_LL;
2678 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2680 for (i = 0; i < 1000; i++) {
2681 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2682 if (ocp_data & LINK_LIST_READY)
2684 usleep_range(1000, 2000);
2687 rtl8152_nic_reset(tp);
2689 /* rx share fifo credit full threshold */
2690 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2692 if (tp->udev->speed == USB_SPEED_FULL ||
2693 tp->udev->speed == USB_SPEED_LOW) {
2694 /* rx share fifo credit near full threshold */
2695 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2697 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2700 /* rx share fifo credit near full threshold */
2701 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2703 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2707 /* TX share fifo free credit full threshold */
2708 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2710 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2711 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2712 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2713 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2715 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2717 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2719 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2720 ocp_data |= TCR0_AUTO_FIFO;
2721 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2724 static void r8152b_enter_oob(struct r8152 *tp)
2729 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2730 ocp_data &= ~NOW_IS_OOB;
2731 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2733 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2734 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2735 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2739 for (i = 0; i < 1000; i++) {
2740 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2741 if (ocp_data & LINK_LIST_READY)
2743 usleep_range(1000, 2000);
2746 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2747 ocp_data |= RE_INIT_LL;
2748 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2750 for (i = 0; i < 1000; i++) {
2751 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2752 if (ocp_data & LINK_LIST_READY)
2754 usleep_range(1000, 2000);
2757 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2759 rtl_rx_vlan_en(tp, true);
2761 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2762 ocp_data |= ALDPS_PROXY_MODE;
2763 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2765 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2766 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2767 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2769 rxdy_gated_en(tp, false);
2771 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2772 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2773 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2776 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2780 data = ocp_reg_read(tp, OCP_POWER_CFG);
2783 ocp_reg_write(tp, OCP_POWER_CFG, data);
2786 ocp_reg_write(tp, OCP_POWER_CFG, data);
2791 static void r8153_eee_en(struct r8152 *tp, bool enable)
2796 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2797 config = ocp_reg_read(tp, OCP_EEE_CFG);
2800 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2803 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2804 config &= ~EEE10_EN;
2807 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2808 ocp_reg_write(tp, OCP_EEE_CFG, config);
2811 static void r8153_hw_phy_cfg(struct r8152 *tp)
2816 /* disable ALDPS before updating the PHY parameters */
2817 r8153_aldps_en(tp, false);
2819 /* disable EEE before updating the PHY parameters */
2820 r8153_eee_en(tp, false);
2821 ocp_reg_write(tp, OCP_EEE_ADV, 0);
2823 if (tp->version == RTL_VER_03) {
2824 data = ocp_reg_read(tp, OCP_EEE_CFG);
2825 data &= ~CTAP_SHORT_EN;
2826 ocp_reg_write(tp, OCP_EEE_CFG, data);
2829 data = ocp_reg_read(tp, OCP_POWER_CFG);
2830 data |= EEE_CLKDIV_EN;
2831 ocp_reg_write(tp, OCP_POWER_CFG, data);
2833 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2834 data |= EN_10M_BGOFF;
2835 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2836 data = ocp_reg_read(tp, OCP_POWER_CFG);
2837 data |= EN_10M_PLLOFF;
2838 ocp_reg_write(tp, OCP_POWER_CFG, data);
2839 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2841 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2842 ocp_data |= PFM_PWM_SWITCH;
2843 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2845 /* Enable LPF corner auto tune */
2846 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2848 /* Adjust 10M Amplitude */
2849 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2850 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2852 r8153_eee_en(tp, true);
2853 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
2855 r8153_aldps_en(tp, true);
2856 r8152b_enable_fc(tp);
2858 set_bit(PHY_RESET, &tp->flags);
2861 static void r8153_first_init(struct r8152 *tp)
2866 rxdy_gated_en(tp, true);
2867 r8153_teredo_off(tp);
2869 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2870 ocp_data &= ~RCR_ACPT_ALL;
2871 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2873 rtl8152_nic_reset(tp);
2876 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2877 ocp_data &= ~NOW_IS_OOB;
2878 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2880 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2881 ocp_data &= ~MCU_BORW_EN;
2882 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2884 for (i = 0; i < 1000; i++) {
2885 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2886 if (ocp_data & LINK_LIST_READY)
2888 usleep_range(1000, 2000);
2891 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2892 ocp_data |= RE_INIT_LL;
2893 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2895 for (i = 0; i < 1000; i++) {
2896 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2897 if (ocp_data & LINK_LIST_READY)
2899 usleep_range(1000, 2000);
2902 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2904 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
2905 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
2906 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2908 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2909 ocp_data |= TCR0_AUTO_FIFO;
2910 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2912 rtl8152_nic_reset(tp);
2914 /* rx share fifo credit full threshold */
2915 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2916 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2917 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2918 /* TX share fifo free credit full threshold */
2919 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2921 /* rx aggregation */
2922 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2923 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2924 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2927 static void r8153_enter_oob(struct r8152 *tp)
2932 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2933 ocp_data &= ~NOW_IS_OOB;
2934 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2939 for (i = 0; i < 1000; i++) {
2940 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2941 if (ocp_data & LINK_LIST_READY)
2943 usleep_range(1000, 2000);
2946 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2947 ocp_data |= RE_INIT_LL;
2948 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2950 for (i = 0; i < 1000; i++) {
2951 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2952 if (ocp_data & LINK_LIST_READY)
2954 usleep_range(1000, 2000);
2957 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
2958 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
2960 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2961 ocp_data &= ~TEREDO_WAKE_MASK;
2962 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2964 rtl_rx_vlan_en(tp, true);
2966 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2967 ocp_data |= ALDPS_PROXY_MODE;
2968 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2970 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2971 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2972 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2974 rxdy_gated_en(tp, false);
2976 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2977 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2978 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2981 static void rtl8153_disable(struct r8152 *tp)
2983 r8153_aldps_en(tp, false);
2986 r8153_aldps_en(tp, true);
2987 usb_enable_lpm(tp->udev);
2990 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2992 u16 bmcr, anar, gbcr;
2995 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2996 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2997 ADVERTISE_100HALF | ADVERTISE_100FULL);
2998 if (tp->mii.supports_gmii) {
2999 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
3000 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
3005 if (autoneg == AUTONEG_DISABLE) {
3006 if (speed == SPEED_10) {
3008 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3009 } else if (speed == SPEED_100) {
3010 bmcr = BMCR_SPEED100;
3011 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3012 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3013 bmcr = BMCR_SPEED1000;
3014 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3020 if (duplex == DUPLEX_FULL)
3021 bmcr |= BMCR_FULLDPLX;
3023 if (speed == SPEED_10) {
3024 if (duplex == DUPLEX_FULL)
3025 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3027 anar |= ADVERTISE_10HALF;
3028 } else if (speed == SPEED_100) {
3029 if (duplex == DUPLEX_FULL) {
3030 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3031 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3033 anar |= ADVERTISE_10HALF;
3034 anar |= ADVERTISE_100HALF;
3036 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3037 if (duplex == DUPLEX_FULL) {
3038 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3039 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3040 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3042 anar |= ADVERTISE_10HALF;
3043 anar |= ADVERTISE_100HALF;
3044 gbcr |= ADVERTISE_1000HALF;
3051 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3054 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3057 if (tp->mii.supports_gmii)
3058 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3060 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3061 r8152_mdio_write(tp, MII_BMCR, bmcr);
3063 if (bmcr & BMCR_RESET) {
3066 for (i = 0; i < 50; i++) {
3068 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3077 static void rtl8152_up(struct r8152 *tp)
3079 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3082 r8152_aldps_en(tp, false);
3083 r8152b_exit_oob(tp);
3084 r8152_aldps_en(tp, true);
3087 static void rtl8152_down(struct r8152 *tp)
3089 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3090 rtl_drop_queued_tx(tp);
3094 r8152_power_cut_en(tp, false);
3095 r8152_aldps_en(tp, false);
3096 r8152b_enter_oob(tp);
3097 r8152_aldps_en(tp, true);
3100 static void rtl8153_up(struct r8152 *tp)
3102 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3105 r8153_u1u2en(tp, false);
3106 r8153_aldps_en(tp, false);
3107 r8153_first_init(tp);
3108 r8153_aldps_en(tp, true);
3109 r8153_u2p3en(tp, true);
3110 r8153_u1u2en(tp, true);
3111 usb_enable_lpm(tp->udev);
3114 static void rtl8153_down(struct r8152 *tp)
3116 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3117 rtl_drop_queued_tx(tp);
3121 r8153_u1u2en(tp, false);
3122 r8153_u2p3en(tp, false);
3123 r8153_power_cut_en(tp, false);
3124 r8153_aldps_en(tp, false);
3125 r8153_enter_oob(tp);
3126 r8153_aldps_en(tp, true);
3129 static bool rtl8152_in_nway(struct r8152 *tp)
3133 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3134 tp->ocp_base = 0x2000;
3135 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
3136 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3138 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3139 if (nway_state & 0xc000)
3145 static bool rtl8153_in_nway(struct r8152 *tp)
3147 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3149 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3155 static void set_carrier(struct r8152 *tp)
3157 struct net_device *netdev = tp->netdev;
3158 struct napi_struct *napi = &tp->napi;
3161 speed = rtl8152_get_speed(tp);
3163 if (speed & LINK_STATUS) {
3164 if (!netif_carrier_ok(netdev)) {
3165 tp->rtl_ops.enable(tp);
3166 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3167 netif_stop_queue(netdev);
3169 netif_carrier_on(netdev);
3171 napi_enable(&tp->napi);
3172 netif_wake_queue(netdev);
3173 netif_info(tp, link, netdev, "carrier on\n");
3176 if (netif_carrier_ok(netdev)) {
3177 netif_carrier_off(netdev);
3179 tp->rtl_ops.disable(tp);
3181 netif_info(tp, link, netdev, "carrier off\n");
3186 static void rtl_work_func_t(struct work_struct *work)
3188 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3190 /* If the device is unplugged or !netif_running(), the workqueue
3191 * doesn't need to wake the device, and could return directly.
3193 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3196 if (usb_autopm_get_interface(tp->intf) < 0)
3199 if (!test_bit(WORK_ENABLE, &tp->flags))
3202 if (!mutex_trylock(&tp->control)) {
3203 schedule_delayed_work(&tp->schedule, 0);
3207 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3210 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3211 _rtl8152_set_rx_mode(tp->netdev);
3213 /* don't schedule napi before linking */
3214 if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3215 netif_carrier_ok(tp->netdev))
3216 napi_schedule(&tp->napi);
3218 mutex_unlock(&tp->control);
3221 usb_autopm_put_interface(tp->intf);
3224 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3226 struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3228 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3231 if (usb_autopm_get_interface(tp->intf) < 0)
3234 mutex_lock(&tp->control);
3236 tp->rtl_ops.hw_phy_cfg(tp);
3238 rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3240 mutex_unlock(&tp->control);
3242 usb_autopm_put_interface(tp->intf);
3245 #ifdef CONFIG_PM_SLEEP
3246 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3249 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3252 case PM_HIBERNATION_PREPARE:
3253 case PM_SUSPEND_PREPARE:
3254 usb_autopm_get_interface(tp->intf);
3257 case PM_POST_HIBERNATION:
3258 case PM_POST_SUSPEND:
3259 usb_autopm_put_interface(tp->intf);
3262 case PM_POST_RESTORE:
3263 case PM_RESTORE_PREPARE:
3272 static int rtl8152_open(struct net_device *netdev)
3274 struct r8152 *tp = netdev_priv(netdev);
3277 res = alloc_all_mem(tp);
3281 res = usb_autopm_get_interface(tp->intf);
3285 mutex_lock(&tp->control);
3289 netif_carrier_off(netdev);
3290 netif_start_queue(netdev);
3291 set_bit(WORK_ENABLE, &tp->flags);
3293 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3296 netif_device_detach(tp->netdev);
3297 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3301 napi_enable(&tp->napi);
3303 mutex_unlock(&tp->control);
3305 usb_autopm_put_interface(tp->intf);
3306 #ifdef CONFIG_PM_SLEEP
3307 tp->pm_notifier.notifier_call = rtl_notifier;
3308 register_pm_notifier(&tp->pm_notifier);
3313 mutex_unlock(&tp->control);
3314 usb_autopm_put_interface(tp->intf);
3321 static int rtl8152_close(struct net_device *netdev)
3323 struct r8152 *tp = netdev_priv(netdev);
3326 #ifdef CONFIG_PM_SLEEP
3327 unregister_pm_notifier(&tp->pm_notifier);
3329 napi_disable(&tp->napi);
3330 clear_bit(WORK_ENABLE, &tp->flags);
3331 usb_kill_urb(tp->intr_urb);
3332 cancel_delayed_work_sync(&tp->schedule);
3333 netif_stop_queue(netdev);
3335 res = usb_autopm_get_interface(tp->intf);
3336 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3337 rtl_drop_queued_tx(tp);
3340 mutex_lock(&tp->control);
3342 tp->rtl_ops.down(tp);
3344 mutex_unlock(&tp->control);
3346 usb_autopm_put_interface(tp->intf);
3354 static void rtl_tally_reset(struct r8152 *tp)
3358 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3359 ocp_data |= TALLY_RESET;
3360 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3363 static void r8152b_init(struct r8152 *tp)
3368 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3371 data = r8152_mdio_read(tp, MII_BMCR);
3372 if (data & BMCR_PDOWN) {
3373 data &= ~BMCR_PDOWN;
3374 r8152_mdio_write(tp, MII_BMCR, data);
3377 r8152_aldps_en(tp, false);
3379 if (tp->version == RTL_VER_01) {
3380 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3381 ocp_data &= ~LED_MODE_MASK;
3382 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3385 r8152_power_cut_en(tp, false);
3387 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3388 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3389 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3390 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3391 ocp_data &= ~MCU_CLK_RATIO_MASK;
3392 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3393 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3394 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3395 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3396 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3398 rtl_tally_reset(tp);
3400 /* enable rx aggregation */
3401 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3402 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3403 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3406 static void r8153_init(struct r8152 *tp)
3412 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3415 r8153_u1u2en(tp, false);
3417 for (i = 0; i < 500; i++) {
3418 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3424 for (i = 0; i < 500; i++) {
3425 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3426 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3431 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
3432 tp->version == RTL_VER_05)
3433 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
3435 data = r8152_mdio_read(tp, MII_BMCR);
3436 if (data & BMCR_PDOWN) {
3437 data &= ~BMCR_PDOWN;
3438 r8152_mdio_write(tp, MII_BMCR, data);
3441 for (i = 0; i < 500; i++) {
3442 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3443 if (ocp_data == PHY_STAT_LAN_ON)
3448 usb_disable_lpm(tp->udev);
3449 r8153_u2p3en(tp, false);
3451 if (tp->version == RTL_VER_04) {
3452 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3453 ocp_data &= ~pwd_dn_scale_mask;
3454 ocp_data |= pwd_dn_scale(96);
3455 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3457 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3458 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3459 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3460 } else if (tp->version == RTL_VER_05) {
3461 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3462 ocp_data &= ~ECM_ALDPS;
3463 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3465 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3466 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3467 ocp_data &= ~DYNAMIC_BURST;
3469 ocp_data |= DYNAMIC_BURST;
3470 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3471 } else if (tp->version == RTL_VER_06) {
3472 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3473 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3474 ocp_data &= ~DYNAMIC_BURST;
3476 ocp_data |= DYNAMIC_BURST;
3477 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3480 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3481 ocp_data |= EP4_FULL_FC;
3482 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3484 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3485 ocp_data &= ~TIMER11_EN;
3486 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3488 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3489 ocp_data &= ~LED_MODE_MASK;
3490 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3492 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3493 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3494 ocp_data |= LPM_TIMER_500MS;
3496 ocp_data |= LPM_TIMER_500US;
3497 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3499 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3500 ocp_data &= ~SEN_VAL_MASK;
3501 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3502 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3504 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3506 r8153_power_cut_en(tp, false);
3507 r8153_u1u2en(tp, true);
3509 /* MAC clock speed down */
3510 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
3511 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
3512 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
3513 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
3515 rtl_tally_reset(tp);
3516 r8153_u2p3en(tp, true);
3519 static int rtl8152_pre_reset(struct usb_interface *intf)
3521 struct r8152 *tp = usb_get_intfdata(intf);
3522 struct net_device *netdev;
3527 netdev = tp->netdev;
3528 if (!netif_running(netdev))
3531 netif_stop_queue(netdev);
3532 napi_disable(&tp->napi);
3533 clear_bit(WORK_ENABLE, &tp->flags);
3534 usb_kill_urb(tp->intr_urb);
3535 cancel_delayed_work_sync(&tp->schedule);
3536 if (netif_carrier_ok(netdev)) {
3537 mutex_lock(&tp->control);
3538 tp->rtl_ops.disable(tp);
3539 mutex_unlock(&tp->control);
3545 static int rtl8152_post_reset(struct usb_interface *intf)
3547 struct r8152 *tp = usb_get_intfdata(intf);
3548 struct net_device *netdev;
3553 netdev = tp->netdev;
3554 if (!netif_running(netdev))
3557 set_bit(WORK_ENABLE, &tp->flags);
3558 if (netif_carrier_ok(netdev)) {
3559 mutex_lock(&tp->control);
3560 tp->rtl_ops.enable(tp);
3562 rtl8152_set_rx_mode(netdev);
3563 mutex_unlock(&tp->control);
3566 napi_enable(&tp->napi);
3567 netif_wake_queue(netdev);
3568 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3570 if (!list_empty(&tp->rx_done))
3571 napi_schedule(&tp->napi);
3576 static bool delay_autosuspend(struct r8152 *tp)
3578 bool sw_linking = !!netif_carrier_ok(tp->netdev);
3579 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3581 /* This means a linking change occurs and the driver doesn't detect it,
3582 * yet. If the driver has disabled tx/rx and hw is linking on, the
3583 * device wouldn't wake up by receiving any packet.
3585 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3588 /* If the linking down is occurred by nway, the device may miss the
3589 * linking change event. And it wouldn't wake when linking on.
3591 if (!sw_linking && tp->rtl_ops.in_nway(tp))
3593 else if (!skb_queue_empty(&tp->tx_queue))
3599 static int rtl8152_runtime_suspend(struct r8152 *tp)
3601 struct net_device *netdev = tp->netdev;
3604 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3605 smp_mb__after_atomic();
3607 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3610 if (delay_autosuspend(tp)) {
3611 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3612 smp_mb__after_atomic();
3617 if (netif_carrier_ok(netdev)) {
3620 rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3621 ocp_data = rcr & ~RCR_ACPT_ALL;
3622 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3623 rxdy_gated_en(tp, true);
3624 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
3626 if (!(ocp_data & RXFIFO_EMPTY)) {
3627 rxdy_gated_en(tp, false);
3628 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3629 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3630 smp_mb__after_atomic();
3636 clear_bit(WORK_ENABLE, &tp->flags);
3637 usb_kill_urb(tp->intr_urb);
3639 tp->rtl_ops.autosuspend_en(tp, true);
3641 if (netif_carrier_ok(netdev)) {
3642 struct napi_struct *napi = &tp->napi;
3646 rxdy_gated_en(tp, false);
3647 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3656 static int rtl8152_system_suspend(struct r8152 *tp)
3658 struct net_device *netdev = tp->netdev;
3661 netif_device_detach(netdev);
3663 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3664 struct napi_struct *napi = &tp->napi;
3666 clear_bit(WORK_ENABLE, &tp->flags);
3667 usb_kill_urb(tp->intr_urb);
3669 cancel_delayed_work_sync(&tp->schedule);
3670 tp->rtl_ops.down(tp);
3677 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3679 struct r8152 *tp = usb_get_intfdata(intf);
3682 mutex_lock(&tp->control);
3684 if (PMSG_IS_AUTO(message))
3685 ret = rtl8152_runtime_suspend(tp);
3687 ret = rtl8152_system_suspend(tp);
3689 mutex_unlock(&tp->control);
3694 static int rtl8152_resume(struct usb_interface *intf)
3696 struct r8152 *tp = usb_get_intfdata(intf);
3697 struct net_device *netdev = tp->netdev;
3699 mutex_lock(&tp->control);
3701 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3702 tp->rtl_ops.init(tp);
3703 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3704 netif_device_attach(netdev);
3707 if (netif_running(netdev) && netdev->flags & IFF_UP) {
3708 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3709 struct napi_struct *napi = &tp->napi;
3711 tp->rtl_ops.autosuspend_en(tp, false);
3713 set_bit(WORK_ENABLE, &tp->flags);
3714 if (netif_carrier_ok(netdev))
3717 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3718 smp_mb__after_atomic();
3719 if (!list_empty(&tp->rx_done))
3720 napi_schedule(&tp->napi);
3723 netif_carrier_off(netdev);
3724 set_bit(WORK_ENABLE, &tp->flags);
3726 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3727 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3728 if (netdev->flags & IFF_UP)
3729 tp->rtl_ops.autosuspend_en(tp, false);
3730 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3733 mutex_unlock(&tp->control);
3738 static int rtl8152_reset_resume(struct usb_interface *intf)
3740 struct r8152 *tp = usb_get_intfdata(intf);
3742 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3743 return rtl8152_resume(intf);
3746 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3748 struct r8152 *tp = netdev_priv(dev);
3750 if (usb_autopm_get_interface(tp->intf) < 0)
3753 if (!rtl_can_wakeup(tp)) {
3757 mutex_lock(&tp->control);
3758 wol->supported = WAKE_ANY;
3759 wol->wolopts = __rtl_get_wol(tp);
3760 mutex_unlock(&tp->control);
3763 usb_autopm_put_interface(tp->intf);
3766 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3768 struct r8152 *tp = netdev_priv(dev);
3771 if (!rtl_can_wakeup(tp))
3774 ret = usb_autopm_get_interface(tp->intf);
3778 mutex_lock(&tp->control);
3780 __rtl_set_wol(tp, wol->wolopts);
3781 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3783 mutex_unlock(&tp->control);
3785 usb_autopm_put_interface(tp->intf);
3791 static u32 rtl8152_get_msglevel(struct net_device *dev)
3793 struct r8152 *tp = netdev_priv(dev);
3795 return tp->msg_enable;
3798 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3800 struct r8152 *tp = netdev_priv(dev);
3802 tp->msg_enable = value;
3805 static void rtl8152_get_drvinfo(struct net_device *netdev,
3806 struct ethtool_drvinfo *info)
3808 struct r8152 *tp = netdev_priv(netdev);
3810 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3811 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3812 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3816 int rtl8152_get_link_ksettings(struct net_device *netdev,
3817 struct ethtool_link_ksettings *cmd)
3819 struct r8152 *tp = netdev_priv(netdev);
3822 if (!tp->mii.mdio_read)
3825 ret = usb_autopm_get_interface(tp->intf);
3829 mutex_lock(&tp->control);
3831 ret = mii_ethtool_get_link_ksettings(&tp->mii, cmd);
3833 mutex_unlock(&tp->control);
3835 usb_autopm_put_interface(tp->intf);
3841 static int rtl8152_set_link_ksettings(struct net_device *dev,
3842 const struct ethtool_link_ksettings *cmd)
3844 struct r8152 *tp = netdev_priv(dev);
3847 ret = usb_autopm_get_interface(tp->intf);
3851 mutex_lock(&tp->control);
3853 ret = rtl8152_set_speed(tp, cmd->base.autoneg, cmd->base.speed,
3856 tp->autoneg = cmd->base.autoneg;
3857 tp->speed = cmd->base.speed;
3858 tp->duplex = cmd->base.duplex;
3861 mutex_unlock(&tp->control);
3863 usb_autopm_put_interface(tp->intf);
3869 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3876 "tx_single_collisions",
3877 "tx_multi_collisions",
3885 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3889 return ARRAY_SIZE(rtl8152_gstrings);
3895 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3896 struct ethtool_stats *stats, u64 *data)
3898 struct r8152 *tp = netdev_priv(dev);
3899 struct tally_counter tally;
3901 if (usb_autopm_get_interface(tp->intf) < 0)
3904 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3906 usb_autopm_put_interface(tp->intf);
3908 data[0] = le64_to_cpu(tally.tx_packets);
3909 data[1] = le64_to_cpu(tally.rx_packets);
3910 data[2] = le64_to_cpu(tally.tx_errors);
3911 data[3] = le32_to_cpu(tally.rx_errors);
3912 data[4] = le16_to_cpu(tally.rx_missed);
3913 data[5] = le16_to_cpu(tally.align_errors);
3914 data[6] = le32_to_cpu(tally.tx_one_collision);
3915 data[7] = le32_to_cpu(tally.tx_multi_collision);
3916 data[8] = le64_to_cpu(tally.rx_unicast);
3917 data[9] = le64_to_cpu(tally.rx_broadcast);
3918 data[10] = le32_to_cpu(tally.rx_multicast);
3919 data[11] = le16_to_cpu(tally.tx_aborted);
3920 data[12] = le16_to_cpu(tally.tx_underrun);
3923 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3925 switch (stringset) {
3927 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3932 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3934 u32 ocp_data, lp, adv, supported = 0;
3937 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3938 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3940 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3941 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3943 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3944 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3946 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3947 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3949 eee->eee_enabled = !!ocp_data;
3950 eee->eee_active = !!(supported & adv & lp);
3951 eee->supported = supported;
3952 eee->advertised = adv;
3953 eee->lp_advertised = lp;
3958 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3960 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3962 r8152_eee_en(tp, eee->eee_enabled);
3964 if (!eee->eee_enabled)
3967 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3972 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3974 u32 ocp_data, lp, adv, supported = 0;
3977 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3978 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3980 val = ocp_reg_read(tp, OCP_EEE_ADV);
3981 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3983 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3984 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3986 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3987 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3989 eee->eee_enabled = !!ocp_data;
3990 eee->eee_active = !!(supported & adv & lp);
3991 eee->supported = supported;
3992 eee->advertised = adv;
3993 eee->lp_advertised = lp;
3998 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4000 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4002 r8153_eee_en(tp, eee->eee_enabled);
4004 if (!eee->eee_enabled)
4007 ocp_reg_write(tp, OCP_EEE_ADV, val);
4013 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
4015 struct r8152 *tp = netdev_priv(net);
4018 ret = usb_autopm_get_interface(tp->intf);
4022 mutex_lock(&tp->control);
4024 ret = tp->rtl_ops.eee_get(tp, edata);
4026 mutex_unlock(&tp->control);
4028 usb_autopm_put_interface(tp->intf);
4035 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
4037 struct r8152 *tp = netdev_priv(net);
4040 ret = usb_autopm_get_interface(tp->intf);
4044 mutex_lock(&tp->control);
4046 ret = tp->rtl_ops.eee_set(tp, edata);
4048 ret = mii_nway_restart(&tp->mii);
4050 mutex_unlock(&tp->control);
4052 usb_autopm_put_interface(tp->intf);
4058 static int rtl8152_nway_reset(struct net_device *dev)
4060 struct r8152 *tp = netdev_priv(dev);
4063 ret = usb_autopm_get_interface(tp->intf);
4067 mutex_lock(&tp->control);
4069 ret = mii_nway_restart(&tp->mii);
4071 mutex_unlock(&tp->control);
4073 usb_autopm_put_interface(tp->intf);
4079 static int rtl8152_get_coalesce(struct net_device *netdev,
4080 struct ethtool_coalesce *coalesce)
4082 struct r8152 *tp = netdev_priv(netdev);
4084 switch (tp->version) {
4092 coalesce->rx_coalesce_usecs = tp->coalesce;
4097 static int rtl8152_set_coalesce(struct net_device *netdev,
4098 struct ethtool_coalesce *coalesce)
4100 struct r8152 *tp = netdev_priv(netdev);
4103 switch (tp->version) {
4111 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4114 ret = usb_autopm_get_interface(tp->intf);
4118 mutex_lock(&tp->control);
4120 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4121 tp->coalesce = coalesce->rx_coalesce_usecs;
4123 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4124 r8153_set_rx_early_timeout(tp);
4127 mutex_unlock(&tp->control);
4129 usb_autopm_put_interface(tp->intf);
4134 static const struct ethtool_ops ops = {
4135 .get_drvinfo = rtl8152_get_drvinfo,
4136 .get_link = ethtool_op_get_link,
4137 .nway_reset = rtl8152_nway_reset,
4138 .get_msglevel = rtl8152_get_msglevel,
4139 .set_msglevel = rtl8152_set_msglevel,
4140 .get_wol = rtl8152_get_wol,
4141 .set_wol = rtl8152_set_wol,
4142 .get_strings = rtl8152_get_strings,
4143 .get_sset_count = rtl8152_get_sset_count,
4144 .get_ethtool_stats = rtl8152_get_ethtool_stats,
4145 .get_coalesce = rtl8152_get_coalesce,
4146 .set_coalesce = rtl8152_set_coalesce,
4147 .get_eee = rtl_ethtool_get_eee,
4148 .set_eee = rtl_ethtool_set_eee,
4149 .get_link_ksettings = rtl8152_get_link_ksettings,
4150 .set_link_ksettings = rtl8152_set_link_ksettings,
4153 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4155 struct r8152 *tp = netdev_priv(netdev);
4156 struct mii_ioctl_data *data = if_mii(rq);
4159 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4162 res = usb_autopm_get_interface(tp->intf);
4168 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4172 mutex_lock(&tp->control);
4173 data->val_out = r8152_mdio_read(tp, data->reg_num);
4174 mutex_unlock(&tp->control);
4178 if (!capable(CAP_NET_ADMIN)) {
4182 mutex_lock(&tp->control);
4183 r8152_mdio_write(tp, data->reg_num, data->val_in);
4184 mutex_unlock(&tp->control);
4191 usb_autopm_put_interface(tp->intf);
4197 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4199 struct r8152 *tp = netdev_priv(dev);
4202 switch (tp->version) {
4211 ret = usb_autopm_get_interface(tp->intf);
4215 mutex_lock(&tp->control);
4219 if (netif_running(dev)) {
4220 u32 rms = new_mtu + VLAN_ETH_HLEN + CRC_SIZE;
4222 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rms);
4224 if (netif_carrier_ok(dev))
4225 r8153_set_rx_early_size(tp);
4228 mutex_unlock(&tp->control);
4230 usb_autopm_put_interface(tp->intf);
4235 static const struct net_device_ops rtl8152_netdev_ops = {
4236 .ndo_open = rtl8152_open,
4237 .ndo_stop = rtl8152_close,
4238 .ndo_do_ioctl = rtl8152_ioctl,
4239 .ndo_start_xmit = rtl8152_start_xmit,
4240 .ndo_tx_timeout = rtl8152_tx_timeout,
4241 .ndo_set_features = rtl8152_set_features,
4242 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4243 .ndo_set_mac_address = rtl8152_set_mac_address,
4244 .ndo_change_mtu = rtl8152_change_mtu,
4245 .ndo_validate_addr = eth_validate_addr,
4246 .ndo_features_check = rtl8152_features_check,
4249 static void rtl8152_unload(struct r8152 *tp)
4251 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4254 if (tp->version != RTL_VER_01)
4255 r8152_power_cut_en(tp, true);
4258 static void rtl8153_unload(struct r8152 *tp)
4260 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4263 r8153_power_cut_en(tp, false);
4266 static int rtl_ops_init(struct r8152 *tp)
4268 struct rtl_ops *ops = &tp->rtl_ops;
4271 switch (tp->version) {
4274 ops->init = r8152b_init;
4275 ops->enable = rtl8152_enable;
4276 ops->disable = rtl8152_disable;
4277 ops->up = rtl8152_up;
4278 ops->down = rtl8152_down;
4279 ops->unload = rtl8152_unload;
4280 ops->eee_get = r8152_get_eee;
4281 ops->eee_set = r8152_set_eee;
4282 ops->in_nway = rtl8152_in_nway;
4283 ops->hw_phy_cfg = r8152b_hw_phy_cfg;
4284 ops->autosuspend_en = rtl_runtime_suspend_enable;
4291 ops->init = r8153_init;
4292 ops->enable = rtl8153_enable;
4293 ops->disable = rtl8153_disable;
4294 ops->up = rtl8153_up;
4295 ops->down = rtl8153_down;
4296 ops->unload = rtl8153_unload;
4297 ops->eee_get = r8153_get_eee;
4298 ops->eee_set = r8153_set_eee;
4299 ops->in_nway = rtl8153_in_nway;
4300 ops->hw_phy_cfg = r8153_hw_phy_cfg;
4301 ops->autosuspend_en = rtl8153_runtime_enable;
4306 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4313 static u8 rtl_get_version(struct usb_interface *intf)
4315 struct usb_device *udev = interface_to_usbdev(intf);
4321 tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
4325 ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
4326 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
4327 PLA_TCR0, MCU_TYPE_PLA, tmp, sizeof(*tmp), 500);
4329 ocp_data = (__le32_to_cpu(*tmp) >> 16) & VERSION_MASK;
4335 version = RTL_VER_01;
4338 version = RTL_VER_02;
4341 version = RTL_VER_03;
4344 version = RTL_VER_04;
4347 version = RTL_VER_05;
4350 version = RTL_VER_06;
4353 version = RTL_VER_UNKNOWN;
4354 dev_info(&intf->dev, "Unknown version 0x%04x\n", ocp_data);
4361 static int rtl8152_probe(struct usb_interface *intf,
4362 const struct usb_device_id *id)
4364 struct usb_device *udev = interface_to_usbdev(intf);
4365 u8 version = rtl_get_version(intf);
4367 struct net_device *netdev;
4370 if (version == RTL_VER_UNKNOWN)
4373 if (udev->actconfig->desc.bConfigurationValue != 1) {
4374 usb_driver_set_configuration(udev, 1);
4378 usb_reset_device(udev);
4379 netdev = alloc_etherdev(sizeof(struct r8152));
4381 dev_err(&intf->dev, "Out of memory\n");
4385 SET_NETDEV_DEV(netdev, &intf->dev);
4386 tp = netdev_priv(netdev);
4387 tp->msg_enable = 0x7FFF;
4390 tp->netdev = netdev;
4392 tp->version = version;
4397 tp->mii.supports_gmii = 0;
4400 tp->mii.supports_gmii = 1;
4404 ret = rtl_ops_init(tp);
4408 mutex_init(&tp->control);
4409 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4410 INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4412 netdev->netdev_ops = &rtl8152_netdev_ops;
4413 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4415 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4416 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4417 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4418 NETIF_F_HW_VLAN_CTAG_TX;
4419 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4420 NETIF_F_TSO | NETIF_F_FRAGLIST |
4421 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4422 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4423 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4424 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4425 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4427 if (tp->version == RTL_VER_01) {
4428 netdev->features &= ~NETIF_F_RXCSUM;
4429 netdev->hw_features &= ~NETIF_F_RXCSUM;
4432 netdev->ethtool_ops = &ops;
4433 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4435 /* MTU range: 68 - 1500 or 9194 */
4436 netdev->min_mtu = ETH_MIN_MTU;
4437 switch (tp->version) {
4440 netdev->max_mtu = ETH_DATA_LEN;
4443 netdev->max_mtu = RTL8153_MAX_MTU;
4447 tp->mii.dev = netdev;
4448 tp->mii.mdio_read = read_mii_word;
4449 tp->mii.mdio_write = write_mii_word;
4450 tp->mii.phy_id_mask = 0x3f;
4451 tp->mii.reg_num_mask = 0x1f;
4452 tp->mii.phy_id = R8152_PHY_ID;
4454 switch (udev->speed) {
4455 case USB_SPEED_SUPER:
4456 case USB_SPEED_SUPER_PLUS:
4457 tp->coalesce = COALESCE_SUPER;
4459 case USB_SPEED_HIGH:
4460 tp->coalesce = COALESCE_HIGH;
4463 tp->coalesce = COALESCE_SLOW;
4467 tp->autoneg = AUTONEG_ENABLE;
4468 tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
4469 tp->duplex = DUPLEX_FULL;
4471 intf->needs_remote_wakeup = 1;
4473 tp->rtl_ops.init(tp);
4474 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4475 set_ethernet_addr(tp);
4477 usb_set_intfdata(intf, tp);
4478 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4480 ret = register_netdev(netdev);
4482 netif_err(tp, probe, netdev, "couldn't register the device\n");
4486 if (!rtl_can_wakeup(tp))
4487 __rtl_set_wol(tp, 0);
4489 tp->saved_wolopts = __rtl_get_wol(tp);
4490 if (tp->saved_wolopts)
4491 device_set_wakeup_enable(&udev->dev, true);
4493 device_set_wakeup_enable(&udev->dev, false);
4495 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4500 netif_napi_del(&tp->napi);
4501 usb_set_intfdata(intf, NULL);
4503 free_netdev(netdev);
4507 static void rtl8152_disconnect(struct usb_interface *intf)
4509 struct r8152 *tp = usb_get_intfdata(intf);
4511 usb_set_intfdata(intf, NULL);
4513 struct usb_device *udev = tp->udev;
4515 if (udev->state == USB_STATE_NOTATTACHED)
4516 set_bit(RTL8152_UNPLUG, &tp->flags);
4518 netif_napi_del(&tp->napi);
4519 unregister_netdev(tp->netdev);
4520 cancel_delayed_work_sync(&tp->hw_phy_work);
4521 tp->rtl_ops.unload(tp);
4522 free_netdev(tp->netdev);
4526 #define REALTEK_USB_DEVICE(vend, prod) \
4527 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4528 USB_DEVICE_ID_MATCH_INT_CLASS, \
4529 .idVendor = (vend), \
4530 .idProduct = (prod), \
4531 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4534 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4535 USB_DEVICE_ID_MATCH_DEVICE, \
4536 .idVendor = (vend), \
4537 .idProduct = (prod), \
4538 .bInterfaceClass = USB_CLASS_COMM, \
4539 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4540 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4542 /* table of devices that work with this driver */
4543 static struct usb_device_id rtl8152_table[] = {
4544 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4545 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4546 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4547 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
4548 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3062)},
4549 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3069)},
4550 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
4551 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x720c)},
4552 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7214)},
4553 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
4557 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4559 static struct usb_driver rtl8152_driver = {
4561 .id_table = rtl8152_table,
4562 .probe = rtl8152_probe,
4563 .disconnect = rtl8152_disconnect,
4564 .suspend = rtl8152_suspend,
4565 .resume = rtl8152_resume,
4566 .reset_resume = rtl8152_reset_resume,
4567 .pre_reset = rtl8152_pre_reset,
4568 .post_reset = rtl8152_post_reset,
4569 .supports_autosuspend = 1,
4570 .disable_hub_initiated_lpm = 1,
4573 module_usb_driver(rtl8152_driver);
4575 MODULE_AUTHOR(DRIVER_AUTHOR);
4576 MODULE_DESCRIPTION(DRIVER_DESC);
4577 MODULE_LICENSE("GPL");
4578 MODULE_VERSION(DRIVER_VERSION);