2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
26 /* Version Information */
27 #define DRIVER_VERSION "v1.06.0 (2014/03/03)"
28 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
29 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
30 #define MODULENAME "r8152"
32 #define R8152_PHY_ID 32
34 #define PLA_IDR 0xc000
35 #define PLA_RCR 0xc010
36 #define PLA_RMS 0xc016
37 #define PLA_RXFIFO_CTRL0 0xc0a0
38 #define PLA_RXFIFO_CTRL1 0xc0a4
39 #define PLA_RXFIFO_CTRL2 0xc0a8
40 #define PLA_FMC 0xc0b4
41 #define PLA_CFG_WOL 0xc0b6
42 #define PLA_TEREDO_CFG 0xc0bc
43 #define PLA_MAR 0xcd00
44 #define PLA_BACKUP 0xd000
45 #define PAL_BDC_CR 0xd1a0
46 #define PLA_TEREDO_TIMER 0xd2cc
47 #define PLA_REALWOW_TIMER 0xd2e8
48 #define PLA_LEDSEL 0xdd90
49 #define PLA_LED_FEATURE 0xdd92
50 #define PLA_PHYAR 0xde00
51 #define PLA_BOOT_CTRL 0xe004
52 #define PLA_GPHY_INTR_IMR 0xe022
53 #define PLA_EEE_CR 0xe040
54 #define PLA_EEEP_CR 0xe080
55 #define PLA_MAC_PWR_CTRL 0xe0c0
56 #define PLA_MAC_PWR_CTRL2 0xe0ca
57 #define PLA_MAC_PWR_CTRL3 0xe0cc
58 #define PLA_MAC_PWR_CTRL4 0xe0ce
59 #define PLA_WDT6_CTRL 0xe428
60 #define PLA_TCR0 0xe610
61 #define PLA_TCR1 0xe612
62 #define PLA_MTPS 0xe615
63 #define PLA_TXFIFO_CTRL 0xe618
64 #define PLA_RSTTALLY 0xe800
66 #define PLA_CRWECR 0xe81c
67 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
68 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
69 #define PLA_CONFIG5 0xe822
70 #define PLA_PHY_PWR 0xe84c
71 #define PLA_OOB_CTRL 0xe84f
72 #define PLA_CPCR 0xe854
73 #define PLA_MISC_0 0xe858
74 #define PLA_MISC_1 0xe85a
75 #define PLA_OCP_GPHY_BASE 0xe86c
76 #define PLA_TALLYCNT 0xe890
77 #define PLA_SFF_STS_7 0xe8de
78 #define PLA_PHYSTATUS 0xe908
79 #define PLA_BP_BA 0xfc26
80 #define PLA_BP_0 0xfc28
81 #define PLA_BP_1 0xfc2a
82 #define PLA_BP_2 0xfc2c
83 #define PLA_BP_3 0xfc2e
84 #define PLA_BP_4 0xfc30
85 #define PLA_BP_5 0xfc32
86 #define PLA_BP_6 0xfc34
87 #define PLA_BP_7 0xfc36
88 #define PLA_BP_EN 0xfc38
90 #define USB_U2P3_CTRL 0xb460
91 #define USB_DEV_STAT 0xb808
92 #define USB_USB_CTRL 0xd406
93 #define USB_PHY_CTRL 0xd408
94 #define USB_TX_AGG 0xd40a
95 #define USB_RX_BUF_TH 0xd40c
96 #define USB_USB_TIMER 0xd428
97 #define USB_RX_EARLY_AGG 0xd42c
98 #define USB_PM_CTRL_STATUS 0xd432
99 #define USB_TX_DMA 0xd434
100 #define USB_TOLERANCE 0xd490
101 #define USB_LPM_CTRL 0xd41a
102 #define USB_UPS_CTRL 0xd800
103 #define USB_MISC_0 0xd81a
104 #define USB_POWER_CUT 0xd80a
105 #define USB_AFE_CTRL2 0xd824
106 #define USB_WDT11_CTRL 0xe43c
107 #define USB_BP_BA 0xfc26
108 #define USB_BP_0 0xfc28
109 #define USB_BP_1 0xfc2a
110 #define USB_BP_2 0xfc2c
111 #define USB_BP_3 0xfc2e
112 #define USB_BP_4 0xfc30
113 #define USB_BP_5 0xfc32
114 #define USB_BP_6 0xfc34
115 #define USB_BP_7 0xfc36
116 #define USB_BP_EN 0xfc38
119 #define OCP_ALDPS_CONFIG 0x2010
120 #define OCP_EEE_CONFIG1 0x2080
121 #define OCP_EEE_CONFIG2 0x2092
122 #define OCP_EEE_CONFIG3 0x2094
123 #define OCP_BASE_MII 0xa400
124 #define OCP_EEE_AR 0xa41a
125 #define OCP_EEE_DATA 0xa41c
126 #define OCP_PHY_STATUS 0xa420
127 #define OCP_POWER_CFG 0xa430
128 #define OCP_EEE_CFG 0xa432
129 #define OCP_SRAM_ADDR 0xa436
130 #define OCP_SRAM_DATA 0xa438
131 #define OCP_DOWN_SPEED 0xa442
132 #define OCP_EEE_CFG2 0xa5d0
133 #define OCP_ADC_CFG 0xbc06
136 #define SRAM_LPF_CFG 0x8012
137 #define SRAM_10M_AMP1 0x8080
138 #define SRAM_10M_AMP2 0x8082
139 #define SRAM_IMPEDANCE 0x8084
142 #define RCR_AAP 0x00000001
143 #define RCR_APM 0x00000002
144 #define RCR_AM 0x00000004
145 #define RCR_AB 0x00000008
146 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
148 /* PLA_RXFIFO_CTRL0 */
149 #define RXFIFO_THR1_NORMAL 0x00080002
150 #define RXFIFO_THR1_OOB 0x01800003
152 /* PLA_RXFIFO_CTRL1 */
153 #define RXFIFO_THR2_FULL 0x00000060
154 #define RXFIFO_THR2_HIGH 0x00000038
155 #define RXFIFO_THR2_OOB 0x0000004a
156 #define RXFIFO_THR2_NORMAL 0x00a0
158 /* PLA_RXFIFO_CTRL2 */
159 #define RXFIFO_THR3_FULL 0x00000078
160 #define RXFIFO_THR3_HIGH 0x00000048
161 #define RXFIFO_THR3_OOB 0x0000005a
162 #define RXFIFO_THR3_NORMAL 0x0110
164 /* PLA_TXFIFO_CTRL */
165 #define TXFIFO_THR_NORMAL 0x00400008
166 #define TXFIFO_THR_NORMAL2 0x01000008
169 #define FMC_FCR_MCU_EN 0x0001
172 #define EEEP_CR_EEEP_TX 0x0002
175 #define WDT6_SET_MODE 0x0010
178 #define TCR0_TX_EMPTY 0x0800
179 #define TCR0_AUTO_FIFO 0x0080
182 #define VERSION_MASK 0x7cf0
185 #define MTPS_JUMBO (12 * 1024 / 64)
186 #define MTPS_DEFAULT (6 * 1024 / 64)
189 #define TALLY_RESET 0x0001
197 #define CRWECR_NORAML 0x00
198 #define CRWECR_CONFIG 0xc0
201 #define NOW_IS_OOB 0x80
202 #define TXFIFO_EMPTY 0x20
203 #define RXFIFO_EMPTY 0x10
204 #define LINK_LIST_READY 0x02
205 #define DIS_MCU_CLROOB 0x01
206 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
209 #define RXDY_GATED_EN 0x0008
212 #define RE_INIT_LL 0x8000
213 #define MCU_BORW_EN 0x4000
216 #define CPCR_RX_VLAN 0x0040
219 #define MAGIC_EN 0x0001
222 #define TEREDO_SEL 0x8000
223 #define TEREDO_WAKE_MASK 0x7f00
224 #define TEREDO_RS_EVENT_MASK 0x00fe
225 #define OOB_TEREDO_EN 0x0001
228 #define ALDPS_PROXY_MODE 0x0001
231 #define LINK_ON_WAKE_EN 0x0010
232 #define LINK_OFF_WAKE_EN 0x0008
235 #define BWF_EN 0x0040
236 #define MWF_EN 0x0020
237 #define UWF_EN 0x0010
238 #define LAN_WAKE_EN 0x0002
240 /* PLA_LED_FEATURE */
241 #define LED_MODE_MASK 0x0700
244 #define TX_10M_IDLE_EN 0x0080
245 #define PFM_PWM_SWITCH 0x0040
247 /* PLA_MAC_PWR_CTRL */
248 #define D3_CLK_GATED_EN 0x00004000
249 #define MCU_CLK_RATIO 0x07010f07
250 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
251 #define ALDPS_SPDWN_RATIO 0x0f87
253 /* PLA_MAC_PWR_CTRL2 */
254 #define EEE_SPDWN_RATIO 0x8007
256 /* PLA_MAC_PWR_CTRL3 */
257 #define PKT_AVAIL_SPDWN_EN 0x0100
258 #define SUSPEND_SPDWN_EN 0x0004
259 #define U1U2_SPDWN_EN 0x0002
260 #define L1_SPDWN_EN 0x0001
262 /* PLA_MAC_PWR_CTRL4 */
263 #define PWRSAVE_SPDWN_EN 0x1000
264 #define RXDV_SPDWN_EN 0x0800
265 #define TX10MIDLE_EN 0x0100
266 #define TP100_SPDWN_EN 0x0020
267 #define TP500_SPDWN_EN 0x0010
268 #define TP1000_SPDWN_EN 0x0008
269 #define EEE_SPDWN_EN 0x0001
271 /* PLA_GPHY_INTR_IMR */
272 #define GPHY_STS_MSK 0x0001
273 #define SPEED_DOWN_MSK 0x0002
274 #define SPDWN_RXDV_MSK 0x0004
275 #define SPDWN_LINKCHG_MSK 0x0008
278 #define PHYAR_FLAG 0x80000000
281 #define EEE_RX_EN 0x0001
282 #define EEE_TX_EN 0x0002
285 #define AUTOLOAD_DONE 0x0002
288 #define STAT_SPEED_MASK 0x0006
289 #define STAT_SPEED_HIGH 0x0000
290 #define STAT_SPEED_FULL 0x0002
293 #define TX_AGG_MAX_THRESHOLD 0x03
296 #define RX_THR_SUPPER 0x0c350180
297 #define RX_THR_HIGH 0x7a120180
298 #define RX_THR_SLOW 0xffff0180
301 #define TEST_MODE_DISABLE 0x00000001
302 #define TX_SIZE_ADJUST1 0x00000100
305 #define POWER_CUT 0x0100
307 /* USB_PM_CTRL_STATUS */
308 #define RESUME_INDICATE 0x0001
311 #define RX_AGG_DISABLE 0x0010
314 #define U2P3_ENABLE 0x0001
317 #define PWR_EN 0x0001
318 #define PHASE2_EN 0x0008
321 #define PCUT_STATUS 0x0001
323 /* USB_RX_EARLY_AGG */
324 #define EARLY_AGG_SUPPER 0x0e832981
325 #define EARLY_AGG_HIGH 0x0e837a12
326 #define EARLY_AGG_SLOW 0x0e83ffff
329 #define TIMER11_EN 0x0001
332 #define LPM_TIMER_MASK 0x0c
333 #define LPM_TIMER_500MS 0x04 /* 500 ms */
334 #define LPM_TIMER_500US 0x0c /* 500 us */
337 #define SEN_VAL_MASK 0xf800
338 #define SEN_VAL_NORMAL 0xa000
339 #define SEL_RXIDLE 0x0100
341 /* OCP_ALDPS_CONFIG */
342 #define ENPWRSAVE 0x8000
343 #define ENPDNPS 0x0200
344 #define LINKENA 0x0100
345 #define DIS_SDSAVE 0x0010
348 #define PHY_STAT_MASK 0x0007
349 #define PHY_STAT_LAN_ON 3
350 #define PHY_STAT_PWRDN 5
353 #define EEE_CLKDIV_EN 0x8000
354 #define EN_ALDPS 0x0004
355 #define EN_10M_PLLOFF 0x0001
357 /* OCP_EEE_CONFIG1 */
358 #define RG_TXLPI_MSK_HFDUP 0x8000
359 #define RG_MATCLR_EN 0x4000
360 #define EEE_10_CAP 0x2000
361 #define EEE_NWAY_EN 0x1000
362 #define TX_QUIET_EN 0x0200
363 #define RX_QUIET_EN 0x0100
364 #define SDRISETIME 0x0010 /* bit 4 ~ 6 */
365 #define RG_RXLPI_MSK_HFDUP 0x0008
366 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
368 /* OCP_EEE_CONFIG2 */
369 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
370 #define RG_DACQUIET_EN 0x0400
371 #define RG_LDVQUIET_EN 0x0200
372 #define RG_CKRSEL 0x0020
373 #define RG_EEEPRG_EN 0x0010
375 /* OCP_EEE_CONFIG3 */
376 #define FST_SNR_EYE_R 0x1500 /* bit 7 ~ 15 */
377 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
378 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
381 /* bit[15:14] function */
382 #define FUN_ADDR 0x0000
383 #define FUN_DATA 0x4000
384 /* bit[4:0] device addr */
385 #define DEVICE_ADDR 0x0007
388 #define EEE_ADDR 0x003C
389 #define EEE_DATA 0x0002
392 #define CTAP_SHORT_EN 0x0040
393 #define EEE10_EN 0x0010
396 #define EN_10M_BGOFF 0x0080
399 #define MY1000_EEE 0x0004
400 #define MY100_EEE 0x0002
403 #define CKADSEL_L 0x0100
404 #define ADC_EN 0x0080
405 #define EN_EMI_L 0x0040
408 #define LPF_AUTO_TUNE 0x8000
411 #define GDAC_IB_UPALL 0x0008
414 #define AMP_DN 0x0200
417 #define RX_DRIVING_MASK 0x6000
419 enum rtl_register_content {
427 #define RTL8152_MAX_TX 4
428 #define RTL8152_MAX_RX 10
434 #define INTR_LINK 0x0004
436 #define RTL8152_REQT_READ 0xc0
437 #define RTL8152_REQT_WRITE 0x40
438 #define RTL8152_REQ_GET_REGS 0x05
439 #define RTL8152_REQ_SET_REGS 0x05
441 #define BYTE_EN_DWORD 0xff
442 #define BYTE_EN_WORD 0x33
443 #define BYTE_EN_BYTE 0x11
444 #define BYTE_EN_SIX_BYTES 0x3f
445 #define BYTE_EN_START_MASK 0x0f
446 #define BYTE_EN_END_MASK 0xf0
448 #define RTL8153_MAX_PACKET 9216 /* 9K */
449 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
450 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
451 #define RTL8153_RMS RTL8153_MAX_PACKET
452 #define RTL8152_TX_TIMEOUT (5 * HZ)
465 /* Define these values to match your device */
466 #define VENDOR_ID_REALTEK 0x0bda
467 #define PRODUCT_ID_RTL8152 0x8152
468 #define PRODUCT_ID_RTL8153 0x8153
470 #define VENDOR_ID_SAMSUNG 0x04e8
471 #define PRODUCT_ID_SAMSUNG 0xa101
473 #define MCU_TYPE_PLA 0x0100
474 #define MCU_TYPE_USB 0x0000
476 #define REALTEK_USB_DEVICE(vend, prod) \
477 USB_DEVICE_INTERFACE_CLASS(vend, prod, USB_CLASS_VENDOR_SPEC)
479 struct tally_counter {
486 __le32 tx_one_collision;
487 __le32 tx_multi_collision;
497 #define RX_LEN_MASK 0x7fff
500 #define RD_UDP_CS (1 << 23)
501 #define RD_TCP_CS (1 << 22)
502 #define RD_IPV6_CS (1 << 20)
503 #define RD_IPV4_CS (1 << 19)
506 #define IPF (1 << 23) /* IP checksum fail */
507 #define UDPF (1 << 22) /* UDP checksum fail */
508 #define TCPF (1 << 21) /* TCP checksum fail */
509 #define RX_VLAN_TAG (1 << 16)
518 #define TX_FS (1 << 31) /* First segment of a packet */
519 #define TX_LS (1 << 30) /* Final segment of a packet */
520 #define GTSENDV4 (1 << 28)
521 #define GTSENDV6 (1 << 27)
522 #define GTTCPHO_SHIFT 18
523 #define GTTCPHO_MAX 0x7fU
524 #define TX_LEN_MAX 0x3ffffU
527 #define UDP_CS (1 << 31) /* Calculate UDP/IP checksum */
528 #define TCP_CS (1 << 30) /* Calculate TCP/IP checksum */
529 #define IPV4_CS (1 << 29) /* Calculate IPv4 checksum */
530 #define IPV6_CS (1 << 28) /* Calculate IPv6 checksum */
532 #define MSS_MAX 0x7ffU
533 #define TCPHO_SHIFT 17
534 #define TCPHO_MAX 0x7ffU
535 #define TX_VLAN_TAG (1 << 16)
541 struct list_head list;
543 struct r8152 *context;
549 struct list_head list;
551 struct r8152 *context;
560 struct usb_device *udev;
561 struct tasklet_struct tl;
562 struct usb_interface *intf;
563 struct net_device *netdev;
564 struct urb *intr_urb;
565 struct tx_agg tx_info[RTL8152_MAX_TX];
566 struct rx_agg rx_info[RTL8152_MAX_RX];
567 struct list_head rx_done, tx_free;
568 struct sk_buff_head tx_queue;
569 spinlock_t rx_lock, tx_lock;
570 struct delayed_work schedule;
571 struct mii_if_info mii;
574 void (*init)(struct r8152 *);
575 int (*enable)(struct r8152 *);
576 void (*disable)(struct r8152 *);
577 void (*up)(struct r8152 *);
578 void (*down)(struct r8152 *);
579 void (*unload)(struct r8152 *);
608 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
609 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
611 static const int multicast_filter_limit = 32;
612 static unsigned int agg_buf_sz = 16384;
614 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
615 VLAN_ETH_HLEN - VLAN_HLEN)
618 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
623 tmp = kmalloc(size, GFP_KERNEL);
627 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
628 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
629 value, index, tmp, size, 500);
631 memcpy(data, tmp, size);
638 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
643 tmp = kmemdup(data, size, GFP_KERNEL);
647 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
648 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
649 value, index, tmp, size, 500);
656 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
657 void *data, u16 type)
662 if (test_bit(RTL8152_UNPLUG, &tp->flags))
665 /* both size and indix must be 4 bytes align */
666 if ((size & 3) || !size || (index & 3) || !data)
669 if ((u32)index + (u32)size > 0xffff)
674 ret = get_registers(tp, index, type, limit, data);
682 ret = get_registers(tp, index, type, size, data);
696 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
697 u16 size, void *data, u16 type)
700 u16 byteen_start, byteen_end, byen;
703 if (test_bit(RTL8152_UNPLUG, &tp->flags))
706 /* both size and indix must be 4 bytes align */
707 if ((size & 3) || !size || (index & 3) || !data)
710 if ((u32)index + (u32)size > 0xffff)
713 byteen_start = byteen & BYTE_EN_START_MASK;
714 byteen_end = byteen & BYTE_EN_END_MASK;
716 byen = byteen_start | (byteen_start << 4);
717 ret = set_registers(tp, index, type | byen, 4, data);
730 ret = set_registers(tp, index,
731 type | BYTE_EN_DWORD,
740 ret = set_registers(tp, index,
741 type | BYTE_EN_DWORD,
753 byen = byteen_end | (byteen_end >> 4);
754 ret = set_registers(tp, index, type | byen, 4, data);
764 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
766 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
770 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
772 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
776 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
778 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
782 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
784 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
787 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
791 generic_ocp_read(tp, index, sizeof(data), &data, type);
793 return __le32_to_cpu(data);
796 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
798 __le32 tmp = __cpu_to_le32(data);
800 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
803 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
807 u8 shift = index & 2;
811 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
813 data = __le32_to_cpu(tmp);
814 data >>= (shift * 8);
820 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
824 u16 byen = BYTE_EN_WORD;
825 u8 shift = index & 2;
831 mask <<= (shift * 8);
832 data <<= (shift * 8);
836 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
838 data |= __le32_to_cpu(tmp) & ~mask;
839 tmp = __cpu_to_le32(data);
841 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
844 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
848 u8 shift = index & 3;
852 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
854 data = __le32_to_cpu(tmp);
855 data >>= (shift * 8);
861 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
865 u16 byen = BYTE_EN_BYTE;
866 u8 shift = index & 3;
872 mask <<= (shift * 8);
873 data <<= (shift * 8);
877 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
879 data |= __le32_to_cpu(tmp) & ~mask;
880 tmp = __cpu_to_le32(data);
882 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
885 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
887 u16 ocp_base, ocp_index;
889 ocp_base = addr & 0xf000;
890 if (ocp_base != tp->ocp_base) {
891 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
892 tp->ocp_base = ocp_base;
895 ocp_index = (addr & 0x0fff) | 0xb000;
896 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
899 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
901 u16 ocp_base, ocp_index;
903 ocp_base = addr & 0xf000;
904 if (ocp_base != tp->ocp_base) {
905 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
906 tp->ocp_base = ocp_base;
909 ocp_index = (addr & 0x0fff) | 0xb000;
910 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
913 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
915 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
918 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
920 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
923 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
925 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
926 ocp_reg_write(tp, OCP_SRAM_DATA, data);
929 static u16 sram_read(struct r8152 *tp, u16 addr)
931 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
932 return ocp_reg_read(tp, OCP_SRAM_DATA);
935 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
937 struct r8152 *tp = netdev_priv(netdev);
940 if (test_bit(RTL8152_UNPLUG, &tp->flags))
943 if (phy_id != R8152_PHY_ID)
946 ret = usb_autopm_get_interface(tp->intf);
950 ret = r8152_mdio_read(tp, reg);
952 usb_autopm_put_interface(tp->intf);
959 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
961 struct r8152 *tp = netdev_priv(netdev);
963 if (test_bit(RTL8152_UNPLUG, &tp->flags))
966 if (phy_id != R8152_PHY_ID)
969 if (usb_autopm_get_interface(tp->intf) < 0)
972 r8152_mdio_write(tp, reg, val);
974 usb_autopm_put_interface(tp->intf);
978 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
980 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
982 struct r8152 *tp = netdev_priv(netdev);
983 struct sockaddr *addr = p;
985 if (!is_valid_ether_addr(addr->sa_data))
986 return -EADDRNOTAVAIL;
988 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
990 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
991 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
992 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
997 static int set_ethernet_addr(struct r8152 *tp)
999 struct net_device *dev = tp->netdev;
1003 if (tp->version == RTL_VER_01)
1004 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1006 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1009 netif_err(tp, probe, dev, "Get ether addr fail\n");
1010 } else if (!is_valid_ether_addr(sa.sa_data)) {
1011 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1013 eth_hw_addr_random(dev);
1014 ether_addr_copy(sa.sa_data, dev->dev_addr);
1015 ret = rtl8152_set_mac_address(dev, &sa);
1016 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1019 if (tp->version == RTL_VER_01)
1020 ether_addr_copy(dev->dev_addr, sa.sa_data);
1022 ret = rtl8152_set_mac_address(dev, &sa);
1028 static void read_bulk_callback(struct urb *urb)
1030 struct net_device *netdev;
1031 int status = urb->status;
1044 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1047 if (!test_bit(WORK_ENABLE, &tp->flags))
1050 netdev = tp->netdev;
1052 /* When link down, the driver would cancel all bulks. */
1053 /* This avoid the re-submitting bulk */
1054 if (!netif_carrier_ok(netdev))
1057 usb_mark_last_busy(tp->udev);
1061 if (urb->actual_length < ETH_ZLEN)
1064 spin_lock(&tp->rx_lock);
1065 list_add_tail(&agg->list, &tp->rx_done);
1066 spin_unlock(&tp->rx_lock);
1067 tasklet_schedule(&tp->tl);
1070 set_bit(RTL8152_UNPLUG, &tp->flags);
1071 netif_device_detach(tp->netdev);
1074 return; /* the urb is in unlink state */
1076 if (net_ratelimit())
1077 netdev_warn(netdev, "maybe reset is needed?\n");
1080 if (net_ratelimit())
1081 netdev_warn(netdev, "Rx status %d\n", status);
1085 result = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1086 if (result == -ENODEV) {
1087 netif_device_detach(tp->netdev);
1088 } else if (result) {
1089 spin_lock(&tp->rx_lock);
1090 list_add_tail(&agg->list, &tp->rx_done);
1091 spin_unlock(&tp->rx_lock);
1092 tasklet_schedule(&tp->tl);
1096 static void write_bulk_callback(struct urb *urb)
1098 struct net_device_stats *stats;
1099 struct net_device *netdev;
1102 int status = urb->status;
1112 netdev = tp->netdev;
1113 stats = &netdev->stats;
1115 if (net_ratelimit())
1116 netdev_warn(netdev, "Tx status %d\n", status);
1117 stats->tx_errors += agg->skb_num;
1119 stats->tx_packets += agg->skb_num;
1120 stats->tx_bytes += agg->skb_len;
1123 spin_lock(&tp->tx_lock);
1124 list_add_tail(&agg->list, &tp->tx_free);
1125 spin_unlock(&tp->tx_lock);
1127 usb_autopm_put_interface_async(tp->intf);
1129 if (!netif_carrier_ok(netdev))
1132 if (!test_bit(WORK_ENABLE, &tp->flags))
1135 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1138 if (!skb_queue_empty(&tp->tx_queue))
1139 tasklet_schedule(&tp->tl);
1142 static void intr_callback(struct urb *urb)
1146 int status = urb->status;
1153 if (!test_bit(WORK_ENABLE, &tp->flags))
1156 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1160 case 0: /* success */
1162 case -ECONNRESET: /* unlink */
1164 netif_device_detach(tp->netdev);
1168 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1170 /* -EPIPE: should clear the halt */
1172 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1176 d = urb->transfer_buffer;
1177 if (INTR_LINK & __le16_to_cpu(d[0])) {
1178 if (!(tp->speed & LINK_STATUS)) {
1179 set_bit(RTL8152_LINK_CHG, &tp->flags);
1180 schedule_delayed_work(&tp->schedule, 0);
1183 if (tp->speed & LINK_STATUS) {
1184 set_bit(RTL8152_LINK_CHG, &tp->flags);
1185 schedule_delayed_work(&tp->schedule, 0);
1190 res = usb_submit_urb(urb, GFP_ATOMIC);
1192 netif_device_detach(tp->netdev);
1194 netif_err(tp, intr, tp->netdev,
1195 "can't resubmit intr, status %d\n", res);
1198 static inline void *rx_agg_align(void *data)
1200 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1203 static inline void *tx_agg_align(void *data)
1205 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1208 static void free_all_mem(struct r8152 *tp)
1212 for (i = 0; i < RTL8152_MAX_RX; i++) {
1213 usb_free_urb(tp->rx_info[i].urb);
1214 tp->rx_info[i].urb = NULL;
1216 kfree(tp->rx_info[i].buffer);
1217 tp->rx_info[i].buffer = NULL;
1218 tp->rx_info[i].head = NULL;
1221 for (i = 0; i < RTL8152_MAX_TX; i++) {
1222 usb_free_urb(tp->tx_info[i].urb);
1223 tp->tx_info[i].urb = NULL;
1225 kfree(tp->tx_info[i].buffer);
1226 tp->tx_info[i].buffer = NULL;
1227 tp->tx_info[i].head = NULL;
1230 usb_free_urb(tp->intr_urb);
1231 tp->intr_urb = NULL;
1233 kfree(tp->intr_buff);
1234 tp->intr_buff = NULL;
1237 static int alloc_all_mem(struct r8152 *tp)
1239 struct net_device *netdev = tp->netdev;
1240 struct usb_interface *intf = tp->intf;
1241 struct usb_host_interface *alt = intf->cur_altsetting;
1242 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1247 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1249 spin_lock_init(&tp->rx_lock);
1250 spin_lock_init(&tp->tx_lock);
1251 INIT_LIST_HEAD(&tp->rx_done);
1252 INIT_LIST_HEAD(&tp->tx_free);
1253 skb_queue_head_init(&tp->tx_queue);
1255 for (i = 0; i < RTL8152_MAX_RX; i++) {
1256 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1260 if (buf != rx_agg_align(buf)) {
1262 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1268 urb = usb_alloc_urb(0, GFP_KERNEL);
1274 INIT_LIST_HEAD(&tp->rx_info[i].list);
1275 tp->rx_info[i].context = tp;
1276 tp->rx_info[i].urb = urb;
1277 tp->rx_info[i].buffer = buf;
1278 tp->rx_info[i].head = rx_agg_align(buf);
1281 for (i = 0; i < RTL8152_MAX_TX; i++) {
1282 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1286 if (buf != tx_agg_align(buf)) {
1288 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1294 urb = usb_alloc_urb(0, GFP_KERNEL);
1300 INIT_LIST_HEAD(&tp->tx_info[i].list);
1301 tp->tx_info[i].context = tp;
1302 tp->tx_info[i].urb = urb;
1303 tp->tx_info[i].buffer = buf;
1304 tp->tx_info[i].head = tx_agg_align(buf);
1306 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1309 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1313 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1317 tp->intr_interval = (int)ep_intr->desc.bInterval;
1318 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1319 tp->intr_buff, INTBUFSIZE, intr_callback,
1320 tp, tp->intr_interval);
1329 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1331 struct tx_agg *agg = NULL;
1332 unsigned long flags;
1334 if (list_empty(&tp->tx_free))
1337 spin_lock_irqsave(&tp->tx_lock, flags);
1338 if (!list_empty(&tp->tx_free)) {
1339 struct list_head *cursor;
1341 cursor = tp->tx_free.next;
1342 list_del_init(cursor);
1343 agg = list_entry(cursor, struct tx_agg, list);
1345 spin_unlock_irqrestore(&tp->tx_lock, flags);
1350 static inline __be16 get_protocol(struct sk_buff *skb)
1354 if (skb->protocol == htons(ETH_P_8021Q))
1355 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1357 protocol = skb->protocol;
1362 /* r8152_csum_workaround()
1363 * The hw limites the value the transport offset. When the offset is out of the
1364 * range, calculate the checksum by sw.
1366 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1367 struct sk_buff_head *list)
1369 if (skb_shinfo(skb)->gso_size) {
1370 netdev_features_t features = tp->netdev->features;
1371 struct sk_buff_head seg_list;
1372 struct sk_buff *segs, *nskb;
1374 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1375 segs = skb_gso_segment(skb, features);
1376 if (IS_ERR(segs) || !segs)
1379 __skb_queue_head_init(&seg_list);
1385 __skb_queue_tail(&seg_list, nskb);
1388 skb_queue_splice(&seg_list, list);
1390 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1391 if (skb_checksum_help(skb) < 0)
1394 __skb_queue_head(list, skb);
1396 struct net_device_stats *stats;
1399 stats = &tp->netdev->stats;
1400 stats->tx_dropped++;
1405 /* msdn_giant_send_check()
1406 * According to the document of microsoft, the TCP Pseudo Header excludes the
1407 * packet length for IPv6 TCP large packets.
1409 static int msdn_giant_send_check(struct sk_buff *skb)
1411 const struct ipv6hdr *ipv6h;
1415 ret = skb_cow_head(skb, 0);
1419 ipv6h = ipv6_hdr(skb);
1423 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1428 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1430 if (vlan_tx_tag_present(skb)) {
1433 opts2 = TX_VLAN_TAG | swab16(vlan_tx_tag_get(skb));
1434 desc->opts2 |= cpu_to_le32(opts2);
1438 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1440 u32 opts2 = le32_to_cpu(desc->opts2);
1442 if (opts2 & RX_VLAN_TAG)
1443 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1444 swab16(opts2 & 0xffff));
1447 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1448 struct sk_buff *skb, u32 len, u32 transport_offset)
1450 u32 mss = skb_shinfo(skb)->gso_size;
1451 u32 opts1, opts2 = 0;
1452 int ret = TX_CSUM_SUCCESS;
1454 WARN_ON_ONCE(len > TX_LEN_MAX);
1456 opts1 = len | TX_FS | TX_LS;
1459 if (transport_offset > GTTCPHO_MAX) {
1460 netif_warn(tp, tx_err, tp->netdev,
1461 "Invalid transport offset 0x%x for TSO\n",
1467 switch (get_protocol(skb)) {
1468 case htons(ETH_P_IP):
1472 case htons(ETH_P_IPV6):
1473 if (msdn_giant_send_check(skb)) {
1485 opts1 |= transport_offset << GTTCPHO_SHIFT;
1486 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1487 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1490 if (transport_offset > TCPHO_MAX) {
1491 netif_warn(tp, tx_err, tp->netdev,
1492 "Invalid transport offset 0x%x\n",
1498 switch (get_protocol(skb)) {
1499 case htons(ETH_P_IP):
1501 ip_protocol = ip_hdr(skb)->protocol;
1504 case htons(ETH_P_IPV6):
1506 ip_protocol = ipv6_hdr(skb)->nexthdr;
1510 ip_protocol = IPPROTO_RAW;
1514 if (ip_protocol == IPPROTO_TCP)
1516 else if (ip_protocol == IPPROTO_UDP)
1521 opts2 |= transport_offset << TCPHO_SHIFT;
1524 desc->opts2 = cpu_to_le32(opts2);
1525 desc->opts1 = cpu_to_le32(opts1);
1531 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1533 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1537 __skb_queue_head_init(&skb_head);
1538 spin_lock(&tx_queue->lock);
1539 skb_queue_splice_init(tx_queue, &skb_head);
1540 spin_unlock(&tx_queue->lock);
1542 tx_data = agg->head;
1545 remain = agg_buf_sz;
1547 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1548 struct tx_desc *tx_desc;
1549 struct sk_buff *skb;
1553 skb = __skb_dequeue(&skb_head);
1557 len = skb->len + sizeof(*tx_desc);
1560 __skb_queue_head(&skb_head, skb);
1564 tx_data = tx_agg_align(tx_data);
1565 tx_desc = (struct tx_desc *)tx_data;
1567 offset = (u32)skb_transport_offset(skb);
1569 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1570 r8152_csum_workaround(tp, skb, &skb_head);
1574 rtl_tx_vlan_tag(tx_desc, skb);
1576 tx_data += sizeof(*tx_desc);
1579 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1580 struct net_device_stats *stats = &tp->netdev->stats;
1582 stats->tx_dropped++;
1583 dev_kfree_skb_any(skb);
1584 tx_data -= sizeof(*tx_desc);
1589 agg->skb_len += len;
1592 dev_kfree_skb_any(skb);
1594 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1597 if (!skb_queue_empty(&skb_head)) {
1598 spin_lock(&tx_queue->lock);
1599 skb_queue_splice(&skb_head, tx_queue);
1600 spin_unlock(&tx_queue->lock);
1603 netif_tx_lock(tp->netdev);
1605 if (netif_queue_stopped(tp->netdev) &&
1606 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1607 netif_wake_queue(tp->netdev);
1609 netif_tx_unlock(tp->netdev);
1611 ret = usb_autopm_get_interface_async(tp->intf);
1615 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1616 agg->head, (int)(tx_data - (u8 *)agg->head),
1617 (usb_complete_t)write_bulk_callback, agg);
1619 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1621 usb_autopm_put_interface_async(tp->intf);
1627 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1629 u8 checksum = CHECKSUM_NONE;
1632 if (tp->version == RTL_VER_01)
1635 opts2 = le32_to_cpu(rx_desc->opts2);
1636 opts3 = le32_to_cpu(rx_desc->opts3);
1638 if (opts2 & RD_IPV4_CS) {
1640 checksum = CHECKSUM_NONE;
1641 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1642 checksum = CHECKSUM_NONE;
1643 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1644 checksum = CHECKSUM_NONE;
1646 checksum = CHECKSUM_UNNECESSARY;
1647 } else if (RD_IPV6_CS) {
1648 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1649 checksum = CHECKSUM_UNNECESSARY;
1650 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1651 checksum = CHECKSUM_UNNECESSARY;
1658 static void rx_bottom(struct r8152 *tp)
1660 unsigned long flags;
1661 struct list_head *cursor, *next, rx_queue;
1663 if (list_empty(&tp->rx_done))
1666 INIT_LIST_HEAD(&rx_queue);
1667 spin_lock_irqsave(&tp->rx_lock, flags);
1668 list_splice_init(&tp->rx_done, &rx_queue);
1669 spin_unlock_irqrestore(&tp->rx_lock, flags);
1671 list_for_each_safe(cursor, next, &rx_queue) {
1672 struct rx_desc *rx_desc;
1679 list_del_init(cursor);
1681 agg = list_entry(cursor, struct rx_agg, list);
1683 if (urb->actual_length < ETH_ZLEN)
1686 rx_desc = agg->head;
1687 rx_data = agg->head;
1688 len_used += sizeof(struct rx_desc);
1690 while (urb->actual_length > len_used) {
1691 struct net_device *netdev = tp->netdev;
1692 struct net_device_stats *stats = &netdev->stats;
1693 unsigned int pkt_len;
1694 struct sk_buff *skb;
1696 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1697 if (pkt_len < ETH_ZLEN)
1700 len_used += pkt_len;
1701 if (urb->actual_length < len_used)
1704 pkt_len -= CRC_SIZE;
1705 rx_data += sizeof(struct rx_desc);
1707 skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1709 stats->rx_dropped++;
1713 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1714 memcpy(skb->data, rx_data, pkt_len);
1715 skb_put(skb, pkt_len);
1716 skb->protocol = eth_type_trans(skb, netdev);
1717 rtl_rx_vlan_tag(rx_desc, skb);
1718 netif_receive_skb(skb);
1719 stats->rx_packets++;
1720 stats->rx_bytes += pkt_len;
1723 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1724 rx_desc = (struct rx_desc *)rx_data;
1725 len_used = (int)(rx_data - (u8 *)agg->head);
1726 len_used += sizeof(struct rx_desc);
1730 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1731 if (ret && ret != -ENODEV) {
1732 spin_lock_irqsave(&tp->rx_lock, flags);
1733 list_add_tail(&agg->list, &tp->rx_done);
1734 spin_unlock_irqrestore(&tp->rx_lock, flags);
1735 tasklet_schedule(&tp->tl);
1740 static void tx_bottom(struct r8152 *tp)
1747 if (skb_queue_empty(&tp->tx_queue))
1750 agg = r8152_get_tx_agg(tp);
1754 res = r8152_tx_agg_fill(tp, agg);
1756 struct net_device *netdev = tp->netdev;
1758 if (res == -ENODEV) {
1759 netif_device_detach(netdev);
1761 struct net_device_stats *stats = &netdev->stats;
1762 unsigned long flags;
1764 netif_warn(tp, tx_err, netdev,
1765 "failed tx_urb %d\n", res);
1766 stats->tx_dropped += agg->skb_num;
1768 spin_lock_irqsave(&tp->tx_lock, flags);
1769 list_add_tail(&agg->list, &tp->tx_free);
1770 spin_unlock_irqrestore(&tp->tx_lock, flags);
1776 static void bottom_half(unsigned long data)
1780 tp = (struct r8152 *)data;
1782 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1785 if (!test_bit(WORK_ENABLE, &tp->flags))
1788 /* When link down, the driver would cancel all bulks. */
1789 /* This avoid the re-submitting bulk */
1790 if (!netif_carrier_ok(tp->netdev))
1798 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1800 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1801 agg->head, agg_buf_sz,
1802 (usb_complete_t)read_bulk_callback, agg);
1804 return usb_submit_urb(agg->urb, mem_flags);
1807 static void rtl_drop_queued_tx(struct r8152 *tp)
1809 struct net_device_stats *stats = &tp->netdev->stats;
1810 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1811 struct sk_buff *skb;
1813 if (skb_queue_empty(tx_queue))
1816 __skb_queue_head_init(&skb_head);
1817 spin_lock_bh(&tx_queue->lock);
1818 skb_queue_splice_init(tx_queue, &skb_head);
1819 spin_unlock_bh(&tx_queue->lock);
1821 while ((skb = __skb_dequeue(&skb_head))) {
1823 stats->tx_dropped++;
1827 static void rtl8152_tx_timeout(struct net_device *netdev)
1829 struct r8152 *tp = netdev_priv(netdev);
1832 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1833 for (i = 0; i < RTL8152_MAX_TX; i++)
1834 usb_unlink_urb(tp->tx_info[i].urb);
1837 static void rtl8152_set_rx_mode(struct net_device *netdev)
1839 struct r8152 *tp = netdev_priv(netdev);
1841 if (tp->speed & LINK_STATUS) {
1842 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1843 schedule_delayed_work(&tp->schedule, 0);
1847 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1849 struct r8152 *tp = netdev_priv(netdev);
1850 u32 mc_filter[2]; /* Multicast hash filter */
1854 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1855 netif_stop_queue(netdev);
1856 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1857 ocp_data &= ~RCR_ACPT_ALL;
1858 ocp_data |= RCR_AB | RCR_APM;
1860 if (netdev->flags & IFF_PROMISC) {
1861 /* Unconditionally log net taps. */
1862 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1863 ocp_data |= RCR_AM | RCR_AAP;
1864 mc_filter[1] = 0xffffffff;
1865 mc_filter[0] = 0xffffffff;
1866 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1867 (netdev->flags & IFF_ALLMULTI)) {
1868 /* Too many to filter perfectly -- accept all multicasts. */
1870 mc_filter[1] = 0xffffffff;
1871 mc_filter[0] = 0xffffffff;
1873 struct netdev_hw_addr *ha;
1877 netdev_for_each_mc_addr(ha, netdev) {
1878 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1880 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1885 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1886 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1888 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1889 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1890 netif_wake_queue(netdev);
1893 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1894 struct net_device *netdev)
1896 struct r8152 *tp = netdev_priv(netdev);
1898 skb_tx_timestamp(skb);
1900 skb_queue_tail(&tp->tx_queue, skb);
1902 if (!list_empty(&tp->tx_free)) {
1903 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1904 set_bit(SCHEDULE_TASKLET, &tp->flags);
1905 schedule_delayed_work(&tp->schedule, 0);
1907 usb_mark_last_busy(tp->udev);
1908 tasklet_schedule(&tp->tl);
1910 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
1911 netif_stop_queue(netdev);
1914 return NETDEV_TX_OK;
1917 static void r8152b_reset_packet_filter(struct r8152 *tp)
1921 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1922 ocp_data &= ~FMC_FCR_MCU_EN;
1923 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1924 ocp_data |= FMC_FCR_MCU_EN;
1925 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1928 static void rtl8152_nic_reset(struct r8152 *tp)
1932 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1934 for (i = 0; i < 1000; i++) {
1935 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1937 usleep_range(100, 400);
1941 static void set_tx_qlen(struct r8152 *tp)
1943 struct net_device *netdev = tp->netdev;
1945 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
1946 sizeof(struct tx_desc));
1949 static inline u8 rtl8152_get_speed(struct r8152 *tp)
1951 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1954 static void rtl_set_eee_plus(struct r8152 *tp)
1959 speed = rtl8152_get_speed(tp);
1960 if (speed & _10bps) {
1961 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1962 ocp_data |= EEEP_CR_EEEP_TX;
1963 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1965 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1966 ocp_data &= ~EEEP_CR_EEEP_TX;
1967 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1971 static void rxdy_gated_en(struct r8152 *tp, bool enable)
1975 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1977 ocp_data |= RXDY_GATED_EN;
1979 ocp_data &= ~RXDY_GATED_EN;
1980 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1983 static int rtl_enable(struct r8152 *tp)
1988 r8152b_reset_packet_filter(tp);
1990 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
1991 ocp_data |= CR_RE | CR_TE;
1992 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
1994 rxdy_gated_en(tp, false);
1996 INIT_LIST_HEAD(&tp->rx_done);
1998 for (i = 0; i < RTL8152_MAX_RX; i++) {
1999 INIT_LIST_HEAD(&tp->rx_info[i].list);
2000 ret |= r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2006 static int rtl8152_enable(struct r8152 *tp)
2008 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2012 rtl_set_eee_plus(tp);
2014 return rtl_enable(tp);
2017 static void r8153_set_rx_agg(struct r8152 *tp)
2021 speed = rtl8152_get_speed(tp);
2022 if (speed & _1000bps) {
2023 if (tp->udev->speed == USB_SPEED_SUPER) {
2024 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2026 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2029 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2031 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2035 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW);
2036 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2041 static int rtl8153_enable(struct r8152 *tp)
2043 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2047 rtl_set_eee_plus(tp);
2048 r8153_set_rx_agg(tp);
2050 return rtl_enable(tp);
2053 static void rtl_disable(struct r8152 *tp)
2058 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2059 rtl_drop_queued_tx(tp);
2063 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2064 ocp_data &= ~RCR_ACPT_ALL;
2065 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2067 rtl_drop_queued_tx(tp);
2069 for (i = 0; i < RTL8152_MAX_TX; i++)
2070 usb_kill_urb(tp->tx_info[i].urb);
2072 rxdy_gated_en(tp, true);
2074 for (i = 0; i < 1000; i++) {
2075 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2076 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2078 usleep_range(1000, 2000);
2081 for (i = 0; i < 1000; i++) {
2082 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2084 usleep_range(1000, 2000);
2087 for (i = 0; i < RTL8152_MAX_RX; i++)
2088 usb_kill_urb(tp->rx_info[i].urb);
2090 rtl8152_nic_reset(tp);
2093 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2097 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2099 ocp_data |= POWER_CUT;
2101 ocp_data &= ~POWER_CUT;
2102 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2104 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2105 ocp_data &= ~RESUME_INDICATE;
2106 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2109 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2113 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2115 ocp_data |= CPCR_RX_VLAN;
2117 ocp_data &= ~CPCR_RX_VLAN;
2118 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2121 static int rtl8152_set_features(struct net_device *dev,
2122 netdev_features_t features)
2124 netdev_features_t changed = features ^ dev->features;
2125 struct r8152 *tp = netdev_priv(dev);
2127 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2128 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2129 rtl_rx_vlan_en(tp, true);
2131 rtl_rx_vlan_en(tp, false);
2137 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2139 static u32 __rtl_get_wol(struct r8152 *tp)
2144 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2145 if (!(ocp_data & LAN_WAKE_EN))
2148 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2149 if (ocp_data & LINK_ON_WAKE_EN)
2150 wolopts |= WAKE_PHY;
2152 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2153 if (ocp_data & UWF_EN)
2154 wolopts |= WAKE_UCAST;
2155 if (ocp_data & BWF_EN)
2156 wolopts |= WAKE_BCAST;
2157 if (ocp_data & MWF_EN)
2158 wolopts |= WAKE_MCAST;
2160 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2161 if (ocp_data & MAGIC_EN)
2162 wolopts |= WAKE_MAGIC;
2167 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2171 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2173 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2174 ocp_data &= ~LINK_ON_WAKE_EN;
2175 if (wolopts & WAKE_PHY)
2176 ocp_data |= LINK_ON_WAKE_EN;
2177 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2179 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2180 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2181 if (wolopts & WAKE_UCAST)
2183 if (wolopts & WAKE_BCAST)
2185 if (wolopts & WAKE_MCAST)
2187 if (wolopts & WAKE_ANY)
2188 ocp_data |= LAN_WAKE_EN;
2189 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2191 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2193 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2194 ocp_data &= ~MAGIC_EN;
2195 if (wolopts & WAKE_MAGIC)
2196 ocp_data |= MAGIC_EN;
2197 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2199 if (wolopts & WAKE_ANY)
2200 device_set_wakeup_enable(&tp->udev->dev, true);
2202 device_set_wakeup_enable(&tp->udev->dev, false);
2205 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2210 __rtl_set_wol(tp, WAKE_ANY);
2212 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2214 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2215 ocp_data |= LINK_OFF_WAKE_EN;
2216 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2218 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2220 __rtl_set_wol(tp, tp->saved_wolopts);
2224 static void rtl_phy_reset(struct r8152 *tp)
2229 clear_bit(PHY_RESET, &tp->flags);
2231 data = r8152_mdio_read(tp, MII_BMCR);
2233 /* don't reset again before the previous one complete */
2234 if (data & BMCR_RESET)
2238 r8152_mdio_write(tp, MII_BMCR, data);
2240 for (i = 0; i < 50; i++) {
2242 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2247 static void rtl_clear_bp(struct r8152 *tp)
2249 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_0, 0);
2250 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_2, 0);
2251 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_4, 0);
2252 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_6, 0);
2253 ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_0, 0);
2254 ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_2, 0);
2255 ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_4, 0);
2256 ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_6, 0);
2257 usleep_range(3000, 6000);
2258 ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_BA, 0);
2259 ocp_write_word(tp, MCU_TYPE_USB, USB_BP_BA, 0);
2262 static void r8153_clear_bp(struct r8152 *tp)
2264 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_BP_EN, 0);
2265 ocp_write_byte(tp, MCU_TYPE_USB, USB_BP_EN, 0);
2269 static void r8153_teredo_off(struct r8152 *tp)
2273 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2274 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2275 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2277 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2278 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2279 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2282 static void r8152b_disable_aldps(struct r8152 *tp)
2284 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2288 static inline void r8152b_enable_aldps(struct r8152 *tp)
2290 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2291 LINKENA | DIS_SDSAVE);
2294 static void rtl8152_disable(struct r8152 *tp)
2296 r8152b_disable_aldps(tp);
2298 r8152b_enable_aldps(tp);
2301 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2305 data = r8152_mdio_read(tp, MII_BMCR);
2306 if (data & BMCR_PDOWN) {
2307 data &= ~BMCR_PDOWN;
2308 r8152_mdio_write(tp, MII_BMCR, data);
2313 set_bit(PHY_RESET, &tp->flags);
2316 static void r8152b_exit_oob(struct r8152 *tp)
2321 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2322 ocp_data &= ~RCR_ACPT_ALL;
2323 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2325 rxdy_gated_en(tp, true);
2326 r8153_teredo_off(tp);
2327 r8152b_hw_phy_cfg(tp);
2329 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2330 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2332 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2333 ocp_data &= ~NOW_IS_OOB;
2334 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2336 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2337 ocp_data &= ~MCU_BORW_EN;
2338 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2340 for (i = 0; i < 1000; i++) {
2341 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2342 if (ocp_data & LINK_LIST_READY)
2344 usleep_range(1000, 2000);
2347 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2348 ocp_data |= RE_INIT_LL;
2349 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2351 for (i = 0; i < 1000; i++) {
2352 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2353 if (ocp_data & LINK_LIST_READY)
2355 usleep_range(1000, 2000);
2358 rtl8152_nic_reset(tp);
2360 /* rx share fifo credit full threshold */
2361 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2363 if (tp->udev->speed == USB_SPEED_FULL ||
2364 tp->udev->speed == USB_SPEED_LOW) {
2365 /* rx share fifo credit near full threshold */
2366 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2368 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2371 /* rx share fifo credit near full threshold */
2372 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2374 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2378 /* TX share fifo free credit full threshold */
2379 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2381 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2382 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2383 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2384 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2386 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2388 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2390 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2391 ocp_data |= TCR0_AUTO_FIFO;
2392 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2395 static void r8152b_enter_oob(struct r8152 *tp)
2400 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2401 ocp_data &= ~NOW_IS_OOB;
2402 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2404 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2405 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2406 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2410 for (i = 0; i < 1000; i++) {
2411 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2412 if (ocp_data & LINK_LIST_READY)
2414 usleep_range(1000, 2000);
2417 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2418 ocp_data |= RE_INIT_LL;
2419 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2421 for (i = 0; i < 1000; i++) {
2422 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2423 if (ocp_data & LINK_LIST_READY)
2425 usleep_range(1000, 2000);
2428 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2430 rtl_rx_vlan_en(tp, true);
2432 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2433 ocp_data |= ALDPS_PROXY_MODE;
2434 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2436 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2437 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2438 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2440 rxdy_gated_en(tp, false);
2442 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2443 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2444 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2447 static void r8153_hw_phy_cfg(struct r8152 *tp)
2452 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2453 data = r8152_mdio_read(tp, MII_BMCR);
2454 if (data & BMCR_PDOWN) {
2455 data &= ~BMCR_PDOWN;
2456 r8152_mdio_write(tp, MII_BMCR, data);
2461 if (tp->version == RTL_VER_03) {
2462 data = ocp_reg_read(tp, OCP_EEE_CFG);
2463 data &= ~CTAP_SHORT_EN;
2464 ocp_reg_write(tp, OCP_EEE_CFG, data);
2467 data = ocp_reg_read(tp, OCP_POWER_CFG);
2468 data |= EEE_CLKDIV_EN;
2469 ocp_reg_write(tp, OCP_POWER_CFG, data);
2471 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2472 data |= EN_10M_BGOFF;
2473 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2474 data = ocp_reg_read(tp, OCP_POWER_CFG);
2475 data |= EN_10M_PLLOFF;
2476 ocp_reg_write(tp, OCP_POWER_CFG, data);
2477 data = sram_read(tp, SRAM_IMPEDANCE);
2478 data &= ~RX_DRIVING_MASK;
2479 sram_write(tp, SRAM_IMPEDANCE, data);
2481 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2482 ocp_data |= PFM_PWM_SWITCH;
2483 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2485 data = sram_read(tp, SRAM_LPF_CFG);
2486 data |= LPF_AUTO_TUNE;
2487 sram_write(tp, SRAM_LPF_CFG, data);
2489 data = sram_read(tp, SRAM_10M_AMP1);
2490 data |= GDAC_IB_UPALL;
2491 sram_write(tp, SRAM_10M_AMP1, data);
2492 data = sram_read(tp, SRAM_10M_AMP2);
2494 sram_write(tp, SRAM_10M_AMP2, data);
2496 set_bit(PHY_RESET, &tp->flags);
2499 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2504 memset(u1u2, 0xff, sizeof(u1u2));
2506 memset(u1u2, 0x00, sizeof(u1u2));
2508 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2511 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2515 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2517 ocp_data |= U2P3_ENABLE;
2519 ocp_data &= ~U2P3_ENABLE;
2520 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2523 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2527 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2529 ocp_data |= PWR_EN | PHASE2_EN;
2531 ocp_data &= ~(PWR_EN | PHASE2_EN);
2532 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2534 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2535 ocp_data &= ~PCUT_STATUS;
2536 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2539 static void r8153_first_init(struct r8152 *tp)
2544 rxdy_gated_en(tp, true);
2545 r8153_teredo_off(tp);
2547 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2548 ocp_data &= ~RCR_ACPT_ALL;
2549 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2551 r8153_hw_phy_cfg(tp);
2553 rtl8152_nic_reset(tp);
2555 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2556 ocp_data &= ~NOW_IS_OOB;
2557 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2559 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2560 ocp_data &= ~MCU_BORW_EN;
2561 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2563 for (i = 0; i < 1000; i++) {
2564 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2565 if (ocp_data & LINK_LIST_READY)
2567 usleep_range(1000, 2000);
2570 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2571 ocp_data |= RE_INIT_LL;
2572 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2574 for (i = 0; i < 1000; i++) {
2575 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2576 if (ocp_data & LINK_LIST_READY)
2578 usleep_range(1000, 2000);
2581 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2583 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2584 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2586 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2587 ocp_data |= TCR0_AUTO_FIFO;
2588 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2590 rtl8152_nic_reset(tp);
2592 /* rx share fifo credit full threshold */
2593 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2594 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2595 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2596 /* TX share fifo free credit full threshold */
2597 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2599 /* rx aggregation */
2600 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2601 ocp_data &= ~RX_AGG_DISABLE;
2602 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2605 static void r8153_enter_oob(struct r8152 *tp)
2610 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2611 ocp_data &= ~NOW_IS_OOB;
2612 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2616 for (i = 0; i < 1000; i++) {
2617 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2618 if (ocp_data & LINK_LIST_READY)
2620 usleep_range(1000, 2000);
2623 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2624 ocp_data |= RE_INIT_LL;
2625 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2627 for (i = 0; i < 1000; i++) {
2628 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2629 if (ocp_data & LINK_LIST_READY)
2631 usleep_range(1000, 2000);
2634 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2636 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2637 ocp_data &= ~TEREDO_WAKE_MASK;
2638 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2640 rtl_rx_vlan_en(tp, true);
2642 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2643 ocp_data |= ALDPS_PROXY_MODE;
2644 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2646 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2647 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2648 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2650 rxdy_gated_en(tp, false);
2652 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2653 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2654 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2657 static void r8153_disable_aldps(struct r8152 *tp)
2661 data = ocp_reg_read(tp, OCP_POWER_CFG);
2663 ocp_reg_write(tp, OCP_POWER_CFG, data);
2667 static void r8153_enable_aldps(struct r8152 *tp)
2671 data = ocp_reg_read(tp, OCP_POWER_CFG);
2673 ocp_reg_write(tp, OCP_POWER_CFG, data);
2676 static void rtl8153_disable(struct r8152 *tp)
2678 r8153_disable_aldps(tp);
2680 r8153_enable_aldps(tp);
2683 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2685 u16 bmcr, anar, gbcr;
2688 cancel_delayed_work_sync(&tp->schedule);
2689 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2690 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2691 ADVERTISE_100HALF | ADVERTISE_100FULL);
2692 if (tp->mii.supports_gmii) {
2693 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2694 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2699 if (autoneg == AUTONEG_DISABLE) {
2700 if (speed == SPEED_10) {
2702 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2703 } else if (speed == SPEED_100) {
2704 bmcr = BMCR_SPEED100;
2705 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2706 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2707 bmcr = BMCR_SPEED1000;
2708 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2714 if (duplex == DUPLEX_FULL)
2715 bmcr |= BMCR_FULLDPLX;
2717 if (speed == SPEED_10) {
2718 if (duplex == DUPLEX_FULL)
2719 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2721 anar |= ADVERTISE_10HALF;
2722 } else if (speed == SPEED_100) {
2723 if (duplex == DUPLEX_FULL) {
2724 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2725 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2727 anar |= ADVERTISE_10HALF;
2728 anar |= ADVERTISE_100HALF;
2730 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2731 if (duplex == DUPLEX_FULL) {
2732 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2733 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2734 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2736 anar |= ADVERTISE_10HALF;
2737 anar |= ADVERTISE_100HALF;
2738 gbcr |= ADVERTISE_1000HALF;
2745 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2748 if (test_bit(PHY_RESET, &tp->flags))
2751 if (tp->mii.supports_gmii)
2752 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2754 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2755 r8152_mdio_write(tp, MII_BMCR, bmcr);
2757 if (test_bit(PHY_RESET, &tp->flags)) {
2760 clear_bit(PHY_RESET, &tp->flags);
2761 for (i = 0; i < 50; i++) {
2763 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2773 static void rtl8152_up(struct r8152 *tp)
2775 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2778 r8152b_disable_aldps(tp);
2779 r8152b_exit_oob(tp);
2780 r8152b_enable_aldps(tp);
2783 static void rtl8152_down(struct r8152 *tp)
2785 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2786 rtl_drop_queued_tx(tp);
2790 r8152_power_cut_en(tp, false);
2791 r8152b_disable_aldps(tp);
2792 r8152b_enter_oob(tp);
2793 r8152b_enable_aldps(tp);
2796 static void rtl8153_up(struct r8152 *tp)
2798 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2801 r8153_disable_aldps(tp);
2802 r8153_first_init(tp);
2803 r8153_enable_aldps(tp);
2806 static void rtl8153_down(struct r8152 *tp)
2808 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2809 rtl_drop_queued_tx(tp);
2813 r8153_u1u2en(tp, false);
2814 r8153_power_cut_en(tp, false);
2815 r8153_disable_aldps(tp);
2816 r8153_enter_oob(tp);
2817 r8153_enable_aldps(tp);
2820 static void set_carrier(struct r8152 *tp)
2822 struct net_device *netdev = tp->netdev;
2825 clear_bit(RTL8152_LINK_CHG, &tp->flags);
2826 speed = rtl8152_get_speed(tp);
2828 if (speed & LINK_STATUS) {
2829 if (!(tp->speed & LINK_STATUS)) {
2830 tp->rtl_ops.enable(tp);
2831 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2832 netif_carrier_on(netdev);
2835 if (tp->speed & LINK_STATUS) {
2836 netif_carrier_off(netdev);
2837 tasklet_disable(&tp->tl);
2838 tp->rtl_ops.disable(tp);
2839 tasklet_enable(&tp->tl);
2845 static void rtl_work_func_t(struct work_struct *work)
2847 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2849 if (usb_autopm_get_interface(tp->intf) < 0)
2852 if (!test_bit(WORK_ENABLE, &tp->flags))
2855 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2858 if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2861 if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2862 _rtl8152_set_rx_mode(tp->netdev);
2864 if (test_bit(SCHEDULE_TASKLET, &tp->flags) &&
2865 (tp->speed & LINK_STATUS)) {
2866 clear_bit(SCHEDULE_TASKLET, &tp->flags);
2867 tasklet_schedule(&tp->tl);
2870 if (test_bit(PHY_RESET, &tp->flags))
2874 usb_autopm_put_interface(tp->intf);
2877 static int rtl8152_open(struct net_device *netdev)
2879 struct r8152 *tp = netdev_priv(netdev);
2882 res = alloc_all_mem(tp);
2886 res = usb_autopm_get_interface(tp->intf);
2892 /* The WORK_ENABLE may be set when autoresume occurs */
2893 if (test_bit(WORK_ENABLE, &tp->flags)) {
2894 clear_bit(WORK_ENABLE, &tp->flags);
2895 usb_kill_urb(tp->intr_urb);
2896 cancel_delayed_work_sync(&tp->schedule);
2897 if (tp->speed & LINK_STATUS)
2898 tp->rtl_ops.disable(tp);
2903 rtl8152_set_speed(tp, AUTONEG_ENABLE,
2904 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
2907 netif_carrier_off(netdev);
2908 netif_start_queue(netdev);
2909 set_bit(WORK_ENABLE, &tp->flags);
2911 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
2914 netif_device_detach(tp->netdev);
2915 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
2920 usb_autopm_put_interface(tp->intf);
2926 static int rtl8152_close(struct net_device *netdev)
2928 struct r8152 *tp = netdev_priv(netdev);
2931 clear_bit(WORK_ENABLE, &tp->flags);
2932 usb_kill_urb(tp->intr_urb);
2933 cancel_delayed_work_sync(&tp->schedule);
2934 netif_stop_queue(netdev);
2936 res = usb_autopm_get_interface(tp->intf);
2938 rtl_drop_queued_tx(tp);
2940 /* The autosuspend may have been enabled and wouldn't
2941 * be disable when autoresume occurs, because the
2942 * netif_running() would be false.
2944 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2945 rtl_runtime_suspend_enable(tp, false);
2946 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
2949 tasklet_disable(&tp->tl);
2950 tp->rtl_ops.down(tp);
2951 tasklet_enable(&tp->tl);
2952 usb_autopm_put_interface(tp->intf);
2960 static void r8152b_enable_eee(struct r8152 *tp)
2964 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2965 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2966 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2967 ocp_reg_write(tp, OCP_EEE_CONFIG1, RG_TXLPI_MSK_HFDUP | RG_MATCLR_EN |
2968 EEE_10_CAP | EEE_NWAY_EN |
2969 TX_QUIET_EN | RX_QUIET_EN |
2970 SDRISETIME | RG_RXLPI_MSK_HFDUP |
2972 ocp_reg_write(tp, OCP_EEE_CONFIG2, RG_LPIHYS_NUM | RG_DACQUIET_EN |
2973 RG_LDVQUIET_EN | RG_CKRSEL |
2975 ocp_reg_write(tp, OCP_EEE_CONFIG3, FST_SNR_EYE_R | RG_LFS_SEL | MSK_PH);
2976 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | DEVICE_ADDR);
2977 ocp_reg_write(tp, OCP_EEE_DATA, EEE_ADDR);
2978 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | DEVICE_ADDR);
2979 ocp_reg_write(tp, OCP_EEE_DATA, EEE_DATA);
2980 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2983 static void r8153_enable_eee(struct r8152 *tp)
2988 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2989 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2990 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2991 data = ocp_reg_read(tp, OCP_EEE_CFG);
2993 ocp_reg_write(tp, OCP_EEE_CFG, data);
2994 data = ocp_reg_read(tp, OCP_EEE_CFG2);
2995 data |= MY1000_EEE | MY100_EEE;
2996 ocp_reg_write(tp, OCP_EEE_CFG2, data);
2999 static void r8152b_enable_fc(struct r8152 *tp)
3003 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3004 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3005 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3008 static void rtl_tally_reset(struct r8152 *tp)
3012 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3013 ocp_data |= TALLY_RESET;
3014 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3017 static void r8152b_init(struct r8152 *tp)
3021 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3024 r8152b_disable_aldps(tp);
3026 if (tp->version == RTL_VER_01) {
3027 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3028 ocp_data &= ~LED_MODE_MASK;
3029 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3032 r8152_power_cut_en(tp, false);
3034 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3035 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3036 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3037 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3038 ocp_data &= ~MCU_CLK_RATIO_MASK;
3039 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3040 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3041 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3042 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3043 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3045 r8152b_enable_eee(tp);
3046 r8152b_enable_aldps(tp);
3047 r8152b_enable_fc(tp);
3048 rtl_tally_reset(tp);
3050 /* enable rx aggregation */
3051 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3052 ocp_data &= ~RX_AGG_DISABLE;
3053 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3056 static void r8153_init(struct r8152 *tp)
3061 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3064 r8153_disable_aldps(tp);
3065 r8153_u1u2en(tp, false);
3067 for (i = 0; i < 500; i++) {
3068 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3074 for (i = 0; i < 500; i++) {
3075 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3076 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3081 r8153_u2p3en(tp, false);
3083 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3084 ocp_data &= ~TIMER11_EN;
3085 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3087 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3088 ocp_data &= ~LED_MODE_MASK;
3089 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3091 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL);
3092 ocp_data &= ~LPM_TIMER_MASK;
3093 if (tp->udev->speed == USB_SPEED_SUPER)
3094 ocp_data |= LPM_TIMER_500US;
3096 ocp_data |= LPM_TIMER_500MS;
3097 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3099 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3100 ocp_data &= ~SEN_VAL_MASK;
3101 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3102 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3104 r8153_power_cut_en(tp, false);
3105 r8153_u1u2en(tp, true);
3107 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3108 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3109 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3110 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3111 U1U2_SPDWN_EN | L1_SPDWN_EN);
3112 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3113 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3114 TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3117 r8153_enable_eee(tp);
3118 r8153_enable_aldps(tp);
3119 r8152b_enable_fc(tp);
3120 rtl_tally_reset(tp);
3123 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3125 struct r8152 *tp = usb_get_intfdata(intf);
3127 if (PMSG_IS_AUTO(message))
3128 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3130 netif_device_detach(tp->netdev);
3132 if (netif_running(tp->netdev)) {
3133 clear_bit(WORK_ENABLE, &tp->flags);
3134 usb_kill_urb(tp->intr_urb);
3135 cancel_delayed_work_sync(&tp->schedule);
3136 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3137 rtl_runtime_suspend_enable(tp, true);
3139 tasklet_disable(&tp->tl);
3140 tp->rtl_ops.down(tp);
3141 tasklet_enable(&tp->tl);
3148 static int rtl8152_resume(struct usb_interface *intf)
3150 struct r8152 *tp = usb_get_intfdata(intf);
3152 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3153 tp->rtl_ops.init(tp);
3154 netif_device_attach(tp->netdev);
3157 if (netif_running(tp->netdev)) {
3158 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3159 rtl_runtime_suspend_enable(tp, false);
3160 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3161 if (tp->speed & LINK_STATUS)
3162 tp->rtl_ops.disable(tp);
3165 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3166 tp->mii.supports_gmii ?
3167 SPEED_1000 : SPEED_100,
3171 netif_carrier_off(tp->netdev);
3172 set_bit(WORK_ENABLE, &tp->flags);
3173 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3179 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3181 struct r8152 *tp = netdev_priv(dev);
3183 if (usb_autopm_get_interface(tp->intf) < 0)
3186 wol->supported = WAKE_ANY;
3187 wol->wolopts = __rtl_get_wol(tp);
3189 usb_autopm_put_interface(tp->intf);
3192 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3194 struct r8152 *tp = netdev_priv(dev);
3197 ret = usb_autopm_get_interface(tp->intf);
3201 __rtl_set_wol(tp, wol->wolopts);
3202 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3204 usb_autopm_put_interface(tp->intf);
3210 static u32 rtl8152_get_msglevel(struct net_device *dev)
3212 struct r8152 *tp = netdev_priv(dev);
3214 return tp->msg_enable;
3217 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3219 struct r8152 *tp = netdev_priv(dev);
3221 tp->msg_enable = value;
3224 static void rtl8152_get_drvinfo(struct net_device *netdev,
3225 struct ethtool_drvinfo *info)
3227 struct r8152 *tp = netdev_priv(netdev);
3229 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3230 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3231 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3235 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3237 struct r8152 *tp = netdev_priv(netdev);
3239 if (!tp->mii.mdio_read)
3242 return mii_ethtool_gset(&tp->mii, cmd);
3245 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3247 struct r8152 *tp = netdev_priv(dev);
3250 ret = usb_autopm_get_interface(tp->intf);
3254 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3256 usb_autopm_put_interface(tp->intf);
3262 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3269 "tx_single_collisions",
3270 "tx_multi_collisions",
3278 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3282 return ARRAY_SIZE(rtl8152_gstrings);
3288 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3289 struct ethtool_stats *stats, u64 *data)
3291 struct r8152 *tp = netdev_priv(dev);
3292 struct tally_counter tally;
3294 if (usb_autopm_get_interface(tp->intf) < 0)
3297 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3299 usb_autopm_put_interface(tp->intf);
3301 data[0] = le64_to_cpu(tally.tx_packets);
3302 data[1] = le64_to_cpu(tally.rx_packets);
3303 data[2] = le64_to_cpu(tally.tx_errors);
3304 data[3] = le32_to_cpu(tally.rx_errors);
3305 data[4] = le16_to_cpu(tally.rx_missed);
3306 data[5] = le16_to_cpu(tally.align_errors);
3307 data[6] = le32_to_cpu(tally.tx_one_collision);
3308 data[7] = le32_to_cpu(tally.tx_multi_collision);
3309 data[8] = le64_to_cpu(tally.rx_unicast);
3310 data[9] = le64_to_cpu(tally.rx_broadcast);
3311 data[10] = le32_to_cpu(tally.rx_multicast);
3312 data[11] = le16_to_cpu(tally.tx_aborted);
3313 data[12] = le16_to_cpu(tally.tx_underun);
3316 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3318 switch (stringset) {
3320 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3325 static struct ethtool_ops ops = {
3326 .get_drvinfo = rtl8152_get_drvinfo,
3327 .get_settings = rtl8152_get_settings,
3328 .set_settings = rtl8152_set_settings,
3329 .get_link = ethtool_op_get_link,
3330 .get_msglevel = rtl8152_get_msglevel,
3331 .set_msglevel = rtl8152_set_msglevel,
3332 .get_wol = rtl8152_get_wol,
3333 .set_wol = rtl8152_set_wol,
3334 .get_strings = rtl8152_get_strings,
3335 .get_sset_count = rtl8152_get_sset_count,
3336 .get_ethtool_stats = rtl8152_get_ethtool_stats,
3339 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3341 struct r8152 *tp = netdev_priv(netdev);
3342 struct mii_ioctl_data *data = if_mii(rq);
3345 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3348 res = usb_autopm_get_interface(tp->intf);
3354 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3358 data->val_out = r8152_mdio_read(tp, data->reg_num);
3362 if (!capable(CAP_NET_ADMIN)) {
3366 r8152_mdio_write(tp, data->reg_num, data->val_in);
3373 usb_autopm_put_interface(tp->intf);
3379 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3381 struct r8152 *tp = netdev_priv(dev);
3383 switch (tp->version) {
3386 return eth_change_mtu(dev, new_mtu);
3391 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3399 static const struct net_device_ops rtl8152_netdev_ops = {
3400 .ndo_open = rtl8152_open,
3401 .ndo_stop = rtl8152_close,
3402 .ndo_do_ioctl = rtl8152_ioctl,
3403 .ndo_start_xmit = rtl8152_start_xmit,
3404 .ndo_tx_timeout = rtl8152_tx_timeout,
3405 .ndo_set_features = rtl8152_set_features,
3406 .ndo_set_rx_mode = rtl8152_set_rx_mode,
3407 .ndo_set_mac_address = rtl8152_set_mac_address,
3408 .ndo_change_mtu = rtl8152_change_mtu,
3409 .ndo_validate_addr = eth_validate_addr,
3412 static void r8152b_get_version(struct r8152 *tp)
3417 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3418 version = (u16)(ocp_data & VERSION_MASK);
3422 tp->version = RTL_VER_01;
3425 tp->version = RTL_VER_02;
3428 tp->version = RTL_VER_03;
3429 tp->mii.supports_gmii = 1;
3432 tp->version = RTL_VER_04;
3433 tp->mii.supports_gmii = 1;
3436 tp->version = RTL_VER_05;
3437 tp->mii.supports_gmii = 1;
3440 netif_info(tp, probe, tp->netdev,
3441 "Unknown version 0x%04x\n", version);
3446 static void rtl8152_unload(struct r8152 *tp)
3448 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3451 if (tp->version != RTL_VER_01)
3452 r8152_power_cut_en(tp, true);
3455 static void rtl8153_unload(struct r8152 *tp)
3457 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3460 r8153_power_cut_en(tp, true);
3463 static int rtl_ops_init(struct r8152 *tp, const struct usb_device_id *id)
3465 struct rtl_ops *ops = &tp->rtl_ops;
3468 switch (id->idVendor) {
3469 case VENDOR_ID_REALTEK:
3470 switch (id->idProduct) {
3471 case PRODUCT_ID_RTL8152:
3472 ops->init = r8152b_init;
3473 ops->enable = rtl8152_enable;
3474 ops->disable = rtl8152_disable;
3475 ops->up = rtl8152_up;
3476 ops->down = rtl8152_down;
3477 ops->unload = rtl8152_unload;
3480 case PRODUCT_ID_RTL8153:
3481 ops->init = r8153_init;
3482 ops->enable = rtl8153_enable;
3483 ops->disable = rtl8153_disable;
3484 ops->up = rtl8153_up;
3485 ops->down = rtl8153_down;
3486 ops->unload = rtl8153_unload;
3494 case VENDOR_ID_SAMSUNG:
3495 switch (id->idProduct) {
3496 case PRODUCT_ID_SAMSUNG:
3497 ops->init = r8153_init;
3498 ops->enable = rtl8153_enable;
3499 ops->disable = rtl8153_disable;
3500 ops->up = rtl8153_up;
3501 ops->down = rtl8153_down;
3502 ops->unload = rtl8153_unload;
3515 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3520 static int rtl8152_probe(struct usb_interface *intf,
3521 const struct usb_device_id *id)
3523 struct usb_device *udev = interface_to_usbdev(intf);
3525 struct net_device *netdev;
3528 if (udev->actconfig->desc.bConfigurationValue != 1) {
3529 usb_driver_set_configuration(udev, 1);
3533 usb_reset_device(udev);
3534 netdev = alloc_etherdev(sizeof(struct r8152));
3536 dev_err(&intf->dev, "Out of memory\n");
3540 SET_NETDEV_DEV(netdev, &intf->dev);
3541 tp = netdev_priv(netdev);
3542 tp->msg_enable = 0x7FFF;
3545 tp->netdev = netdev;
3548 ret = rtl_ops_init(tp, id);
3552 tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
3553 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
3555 netdev->netdev_ops = &rtl8152_netdev_ops;
3556 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
3558 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3559 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
3560 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
3561 NETIF_F_HW_VLAN_CTAG_TX;
3562 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3563 NETIF_F_TSO | NETIF_F_FRAGLIST |
3564 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
3565 NETIF_F_HW_VLAN_CTAG_RX |
3566 NETIF_F_HW_VLAN_CTAG_TX;
3567 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
3568 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
3569 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
3571 netdev->ethtool_ops = &ops;
3572 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
3574 tp->mii.dev = netdev;
3575 tp->mii.mdio_read = read_mii_word;
3576 tp->mii.mdio_write = write_mii_word;
3577 tp->mii.phy_id_mask = 0x3f;
3578 tp->mii.reg_num_mask = 0x1f;
3579 tp->mii.phy_id = R8152_PHY_ID;
3580 tp->mii.supports_gmii = 0;
3582 intf->needs_remote_wakeup = 1;
3584 r8152b_get_version(tp);
3585 tp->rtl_ops.init(tp);
3586 set_ethernet_addr(tp);
3588 usb_set_intfdata(intf, tp);
3590 ret = register_netdev(netdev);
3592 netif_err(tp, probe, netdev, "couldn't register the device\n");
3596 tp->saved_wolopts = __rtl_get_wol(tp);
3597 if (tp->saved_wolopts)
3598 device_set_wakeup_enable(&udev->dev, true);
3600 device_set_wakeup_enable(&udev->dev, false);
3602 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
3607 usb_set_intfdata(intf, NULL);
3609 free_netdev(netdev);
3613 static void rtl8152_disconnect(struct usb_interface *intf)
3615 struct r8152 *tp = usb_get_intfdata(intf);
3617 usb_set_intfdata(intf, NULL);
3619 set_bit(RTL8152_UNPLUG, &tp->flags);
3620 tasklet_kill(&tp->tl);
3621 unregister_netdev(tp->netdev);
3622 tp->rtl_ops.unload(tp);
3623 free_netdev(tp->netdev);
3627 /* table of devices that work with this driver */
3628 static struct usb_device_id rtl8152_table[] = {
3629 {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)},
3630 {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8153)},
3631 {USB_DEVICE(VENDOR_ID_SAMSUNG, PRODUCT_ID_SAMSUNG)},
3635 MODULE_DEVICE_TABLE(usb, rtl8152_table);
3637 static struct usb_driver rtl8152_driver = {
3639 .id_table = rtl8152_table,
3640 .probe = rtl8152_probe,
3641 .disconnect = rtl8152_disconnect,
3642 .suspend = rtl8152_suspend,
3643 .resume = rtl8152_resume,
3644 .reset_resume = rtl8152_resume,
3645 .supports_autosuspend = 1,
3646 .disable_hub_initiated_lpm = 1,
3649 module_usb_driver(rtl8152_driver);
3651 MODULE_AUTHOR(DRIVER_AUTHOR);
3652 MODULE_DESCRIPTION(DRIVER_DESC);
3653 MODULE_LICENSE("GPL");