2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #define PHY_MODE_MARVELL 0x0000
26 #define MII_MARVELL_LED_CTRL 0x0018
27 #define MII_MARVELL_STATUS 0x001b
28 #define MII_MARVELL_CTRL 0x0014
30 #define MARVELL_LED_MANUAL 0x0019
32 #define MARVELL_STATUS_HWCFG 0x0004
34 #define MARVELL_CTRL_TXDELAY 0x0002
35 #define MARVELL_CTRL_RXDELAY 0x0080
37 #define PHY_MODE_RTL8211CL 0x000C
39 struct ax88172_int_data {
47 static void asix_status(struct usbnet *dev, struct urb *urb)
49 struct ax88172_int_data *event;
52 if (urb->actual_length < 8)
55 event = urb->transfer_buffer;
56 link = event->link & 0x01;
57 if (netif_carrier_ok(dev->net) != link) {
59 netif_carrier_on(dev->net);
60 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
62 netif_carrier_off(dev->net);
63 netdev_dbg(dev->net, "Link Status is: %d\n", link);
67 static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
69 if (is_valid_ether_addr(addr)) {
70 memcpy(dev->net->dev_addr, addr, ETH_ALEN);
72 netdev_info(dev->net, "invalid hw address, using random\n");
73 eth_hw_addr_random(dev->net);
77 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
78 static u32 asix_get_phyid(struct usbnet *dev)
84 /* Poll for the rare case the FW or phy isn't ready yet. */
85 for (i = 0; i < 100; i++) {
86 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
87 if (phy_reg != 0 && phy_reg != 0xFFFF)
92 if (phy_reg <= 0 || phy_reg == 0xFFFF)
95 phy_id = (phy_reg & 0xffff) << 16;
97 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
101 phy_id |= (phy_reg & 0xffff);
106 static u32 asix_get_link(struct net_device *net)
108 struct usbnet *dev = netdev_priv(net);
110 return mii_link_ok(&dev->mii);
113 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
115 struct usbnet *dev = netdev_priv(net);
117 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
120 /* We need to override some ethtool_ops so we require our
121 own structure so we don't interfere with other usbnet
122 devices that may be connected at the same time. */
123 static const struct ethtool_ops ax88172_ethtool_ops = {
124 .get_drvinfo = asix_get_drvinfo,
125 .get_link = asix_get_link,
126 .get_msglevel = usbnet_get_msglevel,
127 .set_msglevel = usbnet_set_msglevel,
128 .get_wol = asix_get_wol,
129 .set_wol = asix_set_wol,
130 .get_eeprom_len = asix_get_eeprom_len,
131 .get_eeprom = asix_get_eeprom,
132 .set_eeprom = asix_set_eeprom,
133 .get_settings = usbnet_get_settings,
134 .set_settings = usbnet_set_settings,
135 .nway_reset = usbnet_nway_reset,
138 static void ax88172_set_multicast(struct net_device *net)
140 struct usbnet *dev = netdev_priv(net);
141 struct asix_data *data = (struct asix_data *)&dev->data;
144 if (net->flags & IFF_PROMISC) {
146 } else if (net->flags & IFF_ALLMULTI ||
147 netdev_mc_count(net) > AX_MAX_MCAST) {
149 } else if (netdev_mc_empty(net)) {
150 /* just broadcast and directed */
152 /* We use the 20 byte dev->data
153 * for our 8 byte filter buffer
154 * to avoid allocating memory that
155 * is tricky to free later */
156 struct netdev_hw_addr *ha;
159 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
161 /* Build the multicast hash filter. */
162 netdev_for_each_mc_addr(ha, net) {
163 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
164 data->multi_filter[crc_bits >> 3] |=
168 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
169 AX_MCAST_FILTER_SIZE, data->multi_filter);
174 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
177 static int ax88172_link_reset(struct usbnet *dev)
180 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
182 mii_check_media(&dev->mii, 1, 1);
183 mii_ethtool_gset(&dev->mii, &ecmd);
184 mode = AX88172_MEDIUM_DEFAULT;
186 if (ecmd.duplex != DUPLEX_FULL)
187 mode |= ~AX88172_MEDIUM_FD;
189 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
190 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
192 asix_write_medium_mode(dev, mode);
197 static const struct net_device_ops ax88172_netdev_ops = {
198 .ndo_open = usbnet_open,
199 .ndo_stop = usbnet_stop,
200 .ndo_start_xmit = usbnet_start_xmit,
201 .ndo_tx_timeout = usbnet_tx_timeout,
202 .ndo_change_mtu = usbnet_change_mtu,
203 .ndo_set_mac_address = eth_mac_addr,
204 .ndo_validate_addr = eth_validate_addr,
205 .ndo_do_ioctl = asix_ioctl,
206 .ndo_set_rx_mode = ax88172_set_multicast,
209 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
214 unsigned long gpio_bits = dev->driver_info->data;
216 usbnet_get_endpoints(dev,intf);
218 /* Toggle the GPIOs in a manufacturer/model specific way */
219 for (i = 2; i >= 0; i--) {
220 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
221 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
227 ret = asix_write_rx_ctl(dev, 0x80);
231 /* Get the MAC address */
232 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
234 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
239 asix_set_netdev_dev_addr(dev, buf);
241 /* Initialize MII structure */
242 dev->mii.dev = dev->net;
243 dev->mii.mdio_read = asix_mdio_read;
244 dev->mii.mdio_write = asix_mdio_write;
245 dev->mii.phy_id_mask = 0x3f;
246 dev->mii.reg_num_mask = 0x1f;
247 dev->mii.phy_id = asix_get_phy_addr(dev);
249 dev->net->netdev_ops = &ax88172_netdev_ops;
250 dev->net->ethtool_ops = &ax88172_ethtool_ops;
251 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
252 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
254 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
255 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
256 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
257 mii_nway_restart(&dev->mii);
265 static const struct ethtool_ops ax88772_ethtool_ops = {
266 .get_drvinfo = asix_get_drvinfo,
267 .get_link = asix_get_link,
268 .get_msglevel = usbnet_get_msglevel,
269 .set_msglevel = usbnet_set_msglevel,
270 .get_wol = asix_get_wol,
271 .set_wol = asix_set_wol,
272 .get_eeprom_len = asix_get_eeprom_len,
273 .get_eeprom = asix_get_eeprom,
274 .set_eeprom = asix_set_eeprom,
275 .get_settings = usbnet_get_settings,
276 .set_settings = usbnet_set_settings,
277 .nway_reset = usbnet_nway_reset,
280 static int ax88772_link_reset(struct usbnet *dev)
283 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
285 mii_check_media(&dev->mii, 1, 1);
286 mii_ethtool_gset(&dev->mii, &ecmd);
287 mode = AX88772_MEDIUM_DEFAULT;
289 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
290 mode &= ~AX_MEDIUM_PS;
292 if (ecmd.duplex != DUPLEX_FULL)
293 mode &= ~AX_MEDIUM_FD;
295 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
296 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
298 asix_write_medium_mode(dev, mode);
303 static int ax88772_reset(struct usbnet *dev)
305 struct asix_data *data = (struct asix_data *)&dev->data;
309 ret = asix_write_gpio(dev,
310 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
314 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
316 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
318 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
322 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
328 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
335 ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
339 ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
345 rx_ctl = asix_read_rx_ctl(dev);
346 netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
347 ret = asix_write_rx_ctl(dev, 0x0000);
351 rx_ctl = asix_read_rx_ctl(dev);
352 netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
354 ret = asix_sw_reset(dev, AX_SWRESET_PRL);
360 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
366 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
367 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
368 ADVERTISE_ALL | ADVERTISE_CSMA);
369 mii_nway_restart(&dev->mii);
371 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
375 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
376 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
377 AX88772_IPG2_DEFAULT, 0, NULL);
379 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
383 /* Rewrite MAC address */
384 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
385 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
390 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
391 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
395 rx_ctl = asix_read_rx_ctl(dev);
396 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
399 rx_ctl = asix_read_medium_status(dev);
401 "Medium Status is 0x%04x after all initializations\n",
411 static const struct net_device_ops ax88772_netdev_ops = {
412 .ndo_open = usbnet_open,
413 .ndo_stop = usbnet_stop,
414 .ndo_start_xmit = usbnet_start_xmit,
415 .ndo_tx_timeout = usbnet_tx_timeout,
416 .ndo_change_mtu = usbnet_change_mtu,
417 .ndo_set_mac_address = asix_set_mac_address,
418 .ndo_validate_addr = eth_validate_addr,
419 .ndo_do_ioctl = asix_ioctl,
420 .ndo_set_rx_mode = asix_set_multicast,
423 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
429 usbnet_get_endpoints(dev,intf);
431 /* Get the MAC address */
432 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
434 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
438 asix_set_netdev_dev_addr(dev, buf);
440 /* Initialize MII structure */
441 dev->mii.dev = dev->net;
442 dev->mii.mdio_read = asix_mdio_read;
443 dev->mii.mdio_write = asix_mdio_write;
444 dev->mii.phy_id_mask = 0x1f;
445 dev->mii.reg_num_mask = 0x1f;
446 dev->mii.phy_id = asix_get_phy_addr(dev);
448 dev->net->netdev_ops = &ax88772_netdev_ops;
449 dev->net->ethtool_ops = &ax88772_ethtool_ops;
450 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
451 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
453 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
455 /* Reset the PHY to normal operation mode */
456 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
458 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
462 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
468 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
474 ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
476 /* Read PHYID register *AFTER* the PHY was reset properly */
477 phyid = asix_get_phyid(dev);
478 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
480 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
481 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
482 /* hard_mtu is still the default - the device does not support
484 dev->rx_urb_size = 2048;
490 static const struct ethtool_ops ax88178_ethtool_ops = {
491 .get_drvinfo = asix_get_drvinfo,
492 .get_link = asix_get_link,
493 .get_msglevel = usbnet_get_msglevel,
494 .set_msglevel = usbnet_set_msglevel,
495 .get_wol = asix_get_wol,
496 .set_wol = asix_set_wol,
497 .get_eeprom_len = asix_get_eeprom_len,
498 .get_eeprom = asix_get_eeprom,
499 .set_eeprom = asix_set_eeprom,
500 .get_settings = usbnet_get_settings,
501 .set_settings = usbnet_set_settings,
502 .nway_reset = usbnet_nway_reset,
505 static int marvell_phy_init(struct usbnet *dev)
507 struct asix_data *data = (struct asix_data *)&dev->data;
510 netdev_dbg(dev->net, "marvell_phy_init()\n");
512 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
513 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
515 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
516 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
519 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
520 MII_MARVELL_LED_CTRL);
521 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
525 asix_mdio_write(dev->net, dev->mii.phy_id,
526 MII_MARVELL_LED_CTRL, reg);
528 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
529 MII_MARVELL_LED_CTRL);
530 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
537 static int rtl8211cl_phy_init(struct usbnet *dev)
539 struct asix_data *data = (struct asix_data *)&dev->data;
541 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
543 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
544 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
545 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
546 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
547 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
549 if (data->ledmode == 12) {
550 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
551 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
552 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
558 static int marvell_led_status(struct usbnet *dev, u16 speed)
560 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
562 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
564 /* Clear out the center LED bits - 0x03F0 */
578 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
579 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
584 static int ax88178_reset(struct usbnet *dev)
586 struct asix_data *data = (struct asix_data *)&dev->data;
593 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
594 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
596 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
597 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
598 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
600 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
602 if (eeprom == cpu_to_le16(0xffff)) {
603 data->phymode = PHY_MODE_MARVELL;
607 data->phymode = le16_to_cpu(eeprom) & 0x7F;
608 data->ledmode = le16_to_cpu(eeprom) >> 8;
609 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
611 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
613 /* Power up external GigaPHY through AX88178 GPIO pin */
614 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
615 if ((le16_to_cpu(eeprom) >> 8) != 1) {
616 asix_write_gpio(dev, 0x003c, 30);
617 asix_write_gpio(dev, 0x001c, 300);
618 asix_write_gpio(dev, 0x003c, 30);
620 netdev_dbg(dev->net, "gpio phymode == 1 path\n");
621 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
622 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
625 /* Read PHYID register *AFTER* powering up PHY */
626 phyid = asix_get_phyid(dev);
627 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
629 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
630 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
632 asix_sw_reset(dev, 0);
635 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
638 asix_write_rx_ctl(dev, 0);
640 if (data->phymode == PHY_MODE_MARVELL) {
641 marvell_phy_init(dev);
643 } else if (data->phymode == PHY_MODE_RTL8211CL)
644 rtl8211cl_phy_init(dev);
646 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
647 BMCR_RESET | BMCR_ANENABLE);
648 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
649 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
650 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
653 mii_nway_restart(&dev->mii);
655 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
659 /* Rewrite MAC address */
660 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
661 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
666 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
673 static int ax88178_link_reset(struct usbnet *dev)
676 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
677 struct asix_data *data = (struct asix_data *)&dev->data;
680 netdev_dbg(dev->net, "ax88178_link_reset()\n");
682 mii_check_media(&dev->mii, 1, 1);
683 mii_ethtool_gset(&dev->mii, &ecmd);
684 mode = AX88178_MEDIUM_DEFAULT;
685 speed = ethtool_cmd_speed(&ecmd);
687 if (speed == SPEED_1000)
688 mode |= AX_MEDIUM_GM;
689 else if (speed == SPEED_100)
690 mode |= AX_MEDIUM_PS;
692 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
694 mode |= AX_MEDIUM_ENCK;
696 if (ecmd.duplex == DUPLEX_FULL)
697 mode |= AX_MEDIUM_FD;
699 mode &= ~AX_MEDIUM_FD;
701 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
702 speed, ecmd.duplex, mode);
704 asix_write_medium_mode(dev, mode);
706 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
707 marvell_led_status(dev, speed);
712 static void ax88178_set_mfb(struct usbnet *dev)
714 u16 mfb = AX_RX_CTL_MFB_16384;
717 int old_rx_urb_size = dev->rx_urb_size;
719 if (dev->hard_mtu < 2048) {
720 dev->rx_urb_size = 2048;
721 mfb = AX_RX_CTL_MFB_2048;
722 } else if (dev->hard_mtu < 4096) {
723 dev->rx_urb_size = 4096;
724 mfb = AX_RX_CTL_MFB_4096;
725 } else if (dev->hard_mtu < 8192) {
726 dev->rx_urb_size = 8192;
727 mfb = AX_RX_CTL_MFB_8192;
728 } else if (dev->hard_mtu < 16384) {
729 dev->rx_urb_size = 16384;
730 mfb = AX_RX_CTL_MFB_16384;
733 rxctl = asix_read_rx_ctl(dev);
734 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
736 medium = asix_read_medium_status(dev);
737 if (dev->net->mtu > 1500)
738 medium |= AX_MEDIUM_JFE;
740 medium &= ~AX_MEDIUM_JFE;
741 asix_write_medium_mode(dev, medium);
743 if (dev->rx_urb_size > old_rx_urb_size)
744 usbnet_unlink_rx_urbs(dev);
747 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
749 struct usbnet *dev = netdev_priv(net);
750 int ll_mtu = new_mtu + net->hard_header_len + 4;
752 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
754 if (new_mtu <= 0 || ll_mtu > 16384)
757 if ((ll_mtu % dev->maxpacket) == 0)
761 dev->hard_mtu = net->mtu + net->hard_header_len;
762 ax88178_set_mfb(dev);
767 static const struct net_device_ops ax88178_netdev_ops = {
768 .ndo_open = usbnet_open,
769 .ndo_stop = usbnet_stop,
770 .ndo_start_xmit = usbnet_start_xmit,
771 .ndo_tx_timeout = usbnet_tx_timeout,
772 .ndo_set_mac_address = asix_set_mac_address,
773 .ndo_validate_addr = eth_validate_addr,
774 .ndo_set_rx_mode = asix_set_multicast,
775 .ndo_do_ioctl = asix_ioctl,
776 .ndo_change_mtu = ax88178_change_mtu,
779 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
784 usbnet_get_endpoints(dev,intf);
786 /* Get the MAC address */
787 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
789 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
793 asix_set_netdev_dev_addr(dev, buf);
795 /* Initialize MII structure */
796 dev->mii.dev = dev->net;
797 dev->mii.mdio_read = asix_mdio_read;
798 dev->mii.mdio_write = asix_mdio_write;
799 dev->mii.phy_id_mask = 0x1f;
800 dev->mii.reg_num_mask = 0xff;
801 dev->mii.supports_gmii = 1;
802 dev->mii.phy_id = asix_get_phy_addr(dev);
804 dev->net->netdev_ops = &ax88178_netdev_ops;
805 dev->net->ethtool_ops = &ax88178_ethtool_ops;
807 /* Blink LEDS so users know driver saw dongle */
808 asix_sw_reset(dev, 0);
811 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
814 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
815 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
816 /* hard_mtu is still the default - the device does not support
818 dev->rx_urb_size = 2048;
824 static const struct driver_info ax8817x_info = {
825 .description = "ASIX AX8817x USB 2.0 Ethernet",
826 .bind = ax88172_bind,
827 .status = asix_status,
828 .link_reset = ax88172_link_reset,
829 .reset = ax88172_link_reset,
830 .flags = FLAG_ETHER | FLAG_LINK_INTR,
834 static const struct driver_info dlink_dub_e100_info = {
835 .description = "DLink DUB-E100 USB Ethernet",
836 .bind = ax88172_bind,
837 .status = asix_status,
838 .link_reset = ax88172_link_reset,
839 .reset = ax88172_link_reset,
840 .flags = FLAG_ETHER | FLAG_LINK_INTR,
844 static const struct driver_info netgear_fa120_info = {
845 .description = "Netgear FA-120 USB Ethernet",
846 .bind = ax88172_bind,
847 .status = asix_status,
848 .link_reset = ax88172_link_reset,
849 .reset = ax88172_link_reset,
850 .flags = FLAG_ETHER | FLAG_LINK_INTR,
854 static const struct driver_info hawking_uf200_info = {
855 .description = "Hawking UF200 USB Ethernet",
856 .bind = ax88172_bind,
857 .status = asix_status,
858 .link_reset = ax88172_link_reset,
859 .reset = ax88172_link_reset,
860 .flags = FLAG_ETHER | FLAG_LINK_INTR,
864 static const struct driver_info ax88772_info = {
865 .description = "ASIX AX88772 USB 2.0 Ethernet",
866 .bind = ax88772_bind,
867 .status = asix_status,
868 .link_reset = ax88772_link_reset,
869 .reset = ax88772_reset,
870 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
871 .rx_fixup = asix_rx_fixup,
872 .tx_fixup = asix_tx_fixup,
875 static const struct driver_info ax88178_info = {
876 .description = "ASIX AX88178 USB 2.0 Ethernet",
877 .bind = ax88178_bind,
878 .status = asix_status,
879 .link_reset = ax88178_link_reset,
880 .reset = ax88178_reset,
881 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
882 .rx_fixup = asix_rx_fixup,
883 .tx_fixup = asix_tx_fixup,
886 extern const struct driver_info ax88172a_info;
888 static const struct usb_device_id products [] = {
891 USB_DEVICE (0x077b, 0x2226),
892 .driver_info = (unsigned long) &ax8817x_info,
895 USB_DEVICE (0x0846, 0x1040),
896 .driver_info = (unsigned long) &netgear_fa120_info,
899 USB_DEVICE (0x2001, 0x1a00),
900 .driver_info = (unsigned long) &dlink_dub_e100_info,
902 // Intellinet, ST Lab USB Ethernet
903 USB_DEVICE (0x0b95, 0x1720),
904 .driver_info = (unsigned long) &ax8817x_info,
906 // Hawking UF200, TrendNet TU2-ET100
907 USB_DEVICE (0x07b8, 0x420a),
908 .driver_info = (unsigned long) &hawking_uf200_info,
910 // Billionton Systems, USB2AR
911 USB_DEVICE (0x08dd, 0x90ff),
912 .driver_info = (unsigned long) &ax8817x_info,
915 USB_DEVICE (0x0557, 0x2009),
916 .driver_info = (unsigned long) &ax8817x_info,
918 // Buffalo LUA-U2-KTX
919 USB_DEVICE (0x0411, 0x003d),
920 .driver_info = (unsigned long) &ax8817x_info,
922 // Buffalo LUA-U2-GT 10/100/1000
923 USB_DEVICE (0x0411, 0x006e),
924 .driver_info = (unsigned long) &ax88178_info,
926 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
927 USB_DEVICE (0x6189, 0x182d),
928 .driver_info = (unsigned long) &ax8817x_info,
930 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
931 USB_DEVICE (0x0df6, 0x0056),
932 .driver_info = (unsigned long) &ax88178_info,
934 // corega FEther USB2-TX
935 USB_DEVICE (0x07aa, 0x0017),
936 .driver_info = (unsigned long) &ax8817x_info,
938 // Surecom EP-1427X-2
939 USB_DEVICE (0x1189, 0x0893),
940 .driver_info = (unsigned long) &ax8817x_info,
942 // goodway corp usb gwusb2e
943 USB_DEVICE (0x1631, 0x6200),
944 .driver_info = (unsigned long) &ax8817x_info,
946 // JVC MP-PRX1 Port Replicator
947 USB_DEVICE (0x04f1, 0x3008),
948 .driver_info = (unsigned long) &ax8817x_info,
950 // Lenovo U2L100P 10/100
951 USB_DEVICE (0x17ef, 0x7203),
952 .driver_info = (unsigned long) &ax88772_info,
954 // ASIX AX88772B 10/100
955 USB_DEVICE (0x0b95, 0x772b),
956 .driver_info = (unsigned long) &ax88772_info,
958 // ASIX AX88772 10/100
959 USB_DEVICE (0x0b95, 0x7720),
960 .driver_info = (unsigned long) &ax88772_info,
962 // ASIX AX88178 10/100/1000
963 USB_DEVICE (0x0b95, 0x1780),
964 .driver_info = (unsigned long) &ax88178_info,
966 // Logitec LAN-GTJ/U2A
967 USB_DEVICE (0x0789, 0x0160),
968 .driver_info = (unsigned long) &ax88178_info,
970 // Linksys USB200M Rev 2
971 USB_DEVICE (0x13b1, 0x0018),
972 .driver_info = (unsigned long) &ax88772_info,
974 // 0Q0 cable ethernet
975 USB_DEVICE (0x1557, 0x7720),
976 .driver_info = (unsigned long) &ax88772_info,
978 // DLink DUB-E100 H/W Ver B1
979 USB_DEVICE (0x07d1, 0x3c05),
980 .driver_info = (unsigned long) &ax88772_info,
982 // DLink DUB-E100 H/W Ver B1 Alternate
983 USB_DEVICE (0x2001, 0x3c05),
984 .driver_info = (unsigned long) &ax88772_info,
986 // DLink DUB-E100 H/W Ver C1
987 USB_DEVICE (0x2001, 0x1a02),
988 .driver_info = (unsigned long) &ax88772_info,
991 USB_DEVICE (0x1737, 0x0039),
992 .driver_info = (unsigned long) &ax88178_info,
995 USB_DEVICE (0x04bb, 0x0930),
996 .driver_info = (unsigned long) &ax88178_info,
999 USB_DEVICE(0x050d, 0x5055),
1000 .driver_info = (unsigned long) &ax88178_info,
1002 // Apple USB Ethernet Adapter
1003 USB_DEVICE(0x05ac, 0x1402),
1004 .driver_info = (unsigned long) &ax88772_info,
1006 // Cables-to-Go USB Ethernet Adapter
1007 USB_DEVICE(0x0b95, 0x772a),
1008 .driver_info = (unsigned long) &ax88772_info,
1011 USB_DEVICE(0x14ea, 0xab11),
1012 .driver_info = (unsigned long) &ax88178_info,
1015 USB_DEVICE(0x0db0, 0xa877),
1016 .driver_info = (unsigned long) &ax88772_info,
1018 // Asus USB Ethernet Adapter
1019 USB_DEVICE (0x0b95, 0x7e2b),
1020 .driver_info = (unsigned long) &ax88772_info,
1022 /* ASIX 88172a demo board */
1023 USB_DEVICE(0x0b95, 0x172a),
1024 .driver_info = (unsigned long) &ax88172a_info,
1028 MODULE_DEVICE_TABLE(usb, products);
1030 static struct usb_driver asix_driver = {
1031 .name = DRIVER_NAME,
1032 .id_table = products,
1033 .probe = usbnet_probe,
1034 .suspend = usbnet_suspend,
1035 .resume = usbnet_resume,
1036 .disconnect = usbnet_disconnect,
1037 .supports_autosuspend = 1,
1038 .disable_hub_initiated_lpm = 1,
1041 module_usb_driver(asix_driver);
1043 MODULE_AUTHOR("David Hollis");
1044 MODULE_VERSION(DRIVER_VERSION);
1045 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1046 MODULE_LICENSE("GPL");