1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 #include <linux/crc32.h>
35 #include <linux/delay.h>
36 #include <linux/errno.h>
37 #include <linux/etherdevice.h>
38 #include <linux/ethtool.h>
39 #include <linux/init.h>
40 #include <linux/ioport.h>
41 #include <linux/kernel.h>
42 #include <linux/module.h>
43 #include <linux/netdevice.h>
44 #include <linux/platform_device.h>
45 #include <linux/sched.h>
46 #include <linux/timer.h>
47 #include <linux/bug.h>
48 #include <linux/bitops.h>
49 #include <linux/irq.h>
51 #include <linux/swab.h>
52 #include <linux/phy.h>
53 #include <linux/smsc911x.h>
54 #include <linux/device.h>
57 #define SMSC_CHIPNAME "smsc911x"
58 #define SMSC_MDIONAME "smsc911x-mdio"
59 #define SMSC_DRV_VERSION "2008-10-21"
61 MODULE_LICENSE("GPL");
62 MODULE_VERSION(SMSC_DRV_VERSION);
63 MODULE_ALIAS("platform:smsc911x");
66 static int debug = 16;
71 module_param(debug, int, 0);
72 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
74 struct smsc911x_data {
79 /* used to decide which workarounds apply */
80 unsigned int generation;
82 /* device configuration (copied from platform_data during probe) */
83 struct smsc911x_platform_config config;
85 /* This needs to be acquired before calling any of below:
86 * smsc911x_mac_read(), smsc911x_mac_write()
90 /* spinlock to ensure register accesses are serialised */
93 struct phy_device *phy_dev;
94 struct mii_bus *mii_bus;
95 int phy_irq[PHY_MAX_ADDR];
96 unsigned int using_extphy;
101 unsigned int gpio_setting;
102 unsigned int gpio_orig_setting;
103 struct net_device *dev;
104 struct napi_struct napi;
106 unsigned int software_irq_signal;
108 #ifdef USE_PHY_WORK_AROUND
109 #define MIN_PACKET_SIZE (64)
110 char loopback_tx_pkt[MIN_PACKET_SIZE];
111 char loopback_rx_pkt[MIN_PACKET_SIZE];
112 unsigned int resetcount;
115 /* Members for Multicast filter workaround */
116 unsigned int multicast_update_pending;
117 unsigned int set_bits_mask;
118 unsigned int clear_bits_mask;
123 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
125 if (pdata->config.flags & SMSC911X_USE_32BIT)
126 return readl(pdata->ioaddr + reg);
128 if (pdata->config.flags & SMSC911X_USE_16BIT)
129 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
130 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
136 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
141 spin_lock_irqsave(&pdata->dev_lock, flags);
142 data = __smsc911x_reg_read(pdata, reg);
143 spin_unlock_irqrestore(&pdata->dev_lock, flags);
148 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
151 if (pdata->config.flags & SMSC911X_USE_32BIT) {
152 writel(val, pdata->ioaddr + reg);
156 if (pdata->config.flags & SMSC911X_USE_16BIT) {
157 writew(val & 0xFFFF, pdata->ioaddr + reg);
158 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
165 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
170 spin_lock_irqsave(&pdata->dev_lock, flags);
171 __smsc911x_reg_write(pdata, reg, val);
172 spin_unlock_irqrestore(&pdata->dev_lock, flags);
175 /* Writes a packet to the TX_DATA_FIFO */
177 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
178 unsigned int wordcount)
182 spin_lock_irqsave(&pdata->dev_lock, flags);
184 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
186 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
191 if (pdata->config.flags & SMSC911X_USE_32BIT) {
192 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
196 if (pdata->config.flags & SMSC911X_USE_16BIT) {
198 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
204 spin_unlock_irqrestore(&pdata->dev_lock, flags);
207 /* Reads a packet out of the RX_DATA_FIFO */
209 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
210 unsigned int wordcount)
214 spin_lock_irqsave(&pdata->dev_lock, flags);
216 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
218 *buf++ = swab32(__smsc911x_reg_read(pdata,
223 if (pdata->config.flags & SMSC911X_USE_32BIT) {
224 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
228 if (pdata->config.flags & SMSC911X_USE_16BIT) {
230 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
236 spin_unlock_irqrestore(&pdata->dev_lock, flags);
239 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
240 * and smsc911x_mac_write, so assumes mac_lock is held */
241 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
246 SMSC_ASSERT_MAC_LOCK(pdata);
248 for (i = 0; i < 40; i++) {
249 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
250 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
253 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
254 "MAC_CSR_CMD: 0x%08X", val);
258 /* Fetches a MAC register value. Assumes mac_lock is acquired */
259 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
263 SMSC_ASSERT_MAC_LOCK(pdata);
265 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
266 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
267 SMSC_WARN(pdata, hw, "MAC busy at entry");
271 /* Send the MAC cmd */
272 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
273 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
275 /* Workaround for hardware read-after-write restriction */
276 temp = smsc911x_reg_read(pdata, BYTE_TEST);
278 /* Wait for the read to complete */
279 if (likely(smsc911x_mac_complete(pdata) == 0))
280 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
282 SMSC_WARN(pdata, hw, "MAC busy after read");
286 /* Set a mac register, mac_lock must be acquired before calling */
287 static void smsc911x_mac_write(struct smsc911x_data *pdata,
288 unsigned int offset, u32 val)
292 SMSC_ASSERT_MAC_LOCK(pdata);
294 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
295 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
297 "smsc911x_mac_write failed, MAC busy at entry");
301 /* Send data to write */
302 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
304 /* Write the actual data */
305 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
306 MAC_CSR_CMD_CSR_BUSY_));
308 /* Workaround for hardware read-after-write restriction */
309 temp = smsc911x_reg_read(pdata, BYTE_TEST);
311 /* Wait for the write to complete */
312 if (likely(smsc911x_mac_complete(pdata) == 0))
315 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
318 /* Get a phy register */
319 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
321 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
326 spin_lock_irqsave(&pdata->mac_lock, flags);
328 /* Confirm MII not busy */
329 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
330 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
335 /* Set the address, index & direction (read from PHY) */
336 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
337 smsc911x_mac_write(pdata, MII_ACC, addr);
339 /* Wait for read to complete w/ timeout */
340 for (i = 0; i < 100; i++)
341 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
342 reg = smsc911x_mac_read(pdata, MII_DATA);
346 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
350 spin_unlock_irqrestore(&pdata->mac_lock, flags);
354 /* Set a phy register */
355 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
358 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
363 spin_lock_irqsave(&pdata->mac_lock, flags);
365 /* Confirm MII not busy */
366 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
367 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
372 /* Put the data to write in the MAC */
373 smsc911x_mac_write(pdata, MII_DATA, val);
375 /* Set the address, index & direction (write to PHY) */
376 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
378 smsc911x_mac_write(pdata, MII_ACC, addr);
380 /* Wait for write to complete w/ timeout */
381 for (i = 0; i < 100; i++)
382 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
387 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
391 spin_unlock_irqrestore(&pdata->mac_lock, flags);
395 /* Switch to external phy. Assumes tx and rx are stopped. */
396 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
398 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
400 /* Disable phy clocks to the MAC */
401 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
402 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
403 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
404 udelay(10); /* Enough time for clocks to stop */
406 /* Switch to external phy */
407 hwcfg |= HW_CFG_EXT_PHY_EN_;
408 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
410 /* Enable phy clocks to the MAC */
411 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
412 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
413 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
414 udelay(10); /* Enough time for clocks to restart */
416 hwcfg |= HW_CFG_SMI_SEL_;
417 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
420 /* Autodetects and enables external phy if present on supported chips.
421 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
422 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
423 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
425 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
427 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
428 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
429 pdata->using_extphy = 0;
430 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
431 SMSC_TRACE(pdata, hw, "Forcing external PHY");
432 smsc911x_phy_enable_external(pdata);
433 pdata->using_extphy = 1;
434 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
435 SMSC_TRACE(pdata, hw,
436 "HW_CFG EXT_PHY_DET set, using external PHY");
437 smsc911x_phy_enable_external(pdata);
438 pdata->using_extphy = 1;
440 SMSC_TRACE(pdata, hw,
441 "HW_CFG EXT_PHY_DET clear, using internal PHY");
442 pdata->using_extphy = 0;
446 /* Fetches a tx status out of the status fifo */
447 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
449 unsigned int result =
450 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
453 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
458 /* Fetches the next rx status */
459 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
461 unsigned int result =
462 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
465 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
470 #ifdef USE_PHY_WORK_AROUND
471 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
478 for (tries = 0; tries < 10; tries++) {
479 unsigned int txcmd_a;
480 unsigned int txcmd_b;
482 unsigned int pktlength;
485 /* Zero-out rx packet memory */
486 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
488 /* Write tx packet to 118 */
489 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
490 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
491 txcmd_a |= MIN_PACKET_SIZE;
493 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
495 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
496 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
498 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
499 wrsz = MIN_PACKET_SIZE + 3;
500 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
503 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
505 /* Wait till transmit is done */
509 status = smsc911x_tx_get_txstatus(pdata);
510 } while ((i--) && (!status));
514 "Failed to transmit during loopback test");
517 if (status & TX_STS_ES_) {
519 "Transmit encountered errors during loopback test");
523 /* Wait till receive is done */
527 status = smsc911x_rx_get_rxstatus(pdata);
528 } while ((i--) && (!status));
532 "Failed to receive during loopback test");
535 if (status & RX_STS_ES_) {
537 "Receive encountered errors during loopback test");
541 pktlength = ((status & 0x3FFF0000UL) >> 16);
542 bufp = (ulong)pdata->loopback_rx_pkt;
543 rdsz = pktlength + 3;
544 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
547 smsc911x_rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
549 if (pktlength != (MIN_PACKET_SIZE + 4)) {
550 SMSC_WARN(pdata, hw, "Unexpected packet size "
551 "during loop back test, size=%d, will retry",
556 for (j = 0; j < MIN_PACKET_SIZE; j++) {
557 if (pdata->loopback_tx_pkt[j]
558 != pdata->loopback_rx_pkt[j]) {
564 SMSC_TRACE(pdata, hw, "Successfully verified "
568 SMSC_WARN(pdata, hw, "Data mismatch "
569 "during loop back test, will retry");
577 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
579 struct phy_device *phy_dev = pdata->phy_dev;
581 unsigned int i = 100000;
584 BUG_ON(!phy_dev->bus);
586 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
587 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
590 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
592 } while ((i--) && (temp & BMCR_RESET));
594 if (temp & BMCR_RESET) {
595 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
598 /* Extra delay required because the phy may not be completed with
599 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
600 * enough delay but using 1ms here to be safe */
606 static int smsc911x_phy_loopbacktest(struct net_device *dev)
608 struct smsc911x_data *pdata = netdev_priv(dev);
609 struct phy_device *phy_dev = pdata->phy_dev;
614 /* Initialise tx packet using broadcast destination address */
615 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
617 /* Use incrementing source address */
618 for (i = 6; i < 12; i++)
619 pdata->loopback_tx_pkt[i] = (char)i;
621 /* Set length type field */
622 pdata->loopback_tx_pkt[12] = 0x00;
623 pdata->loopback_tx_pkt[13] = 0x00;
625 for (i = 14; i < MIN_PACKET_SIZE; i++)
626 pdata->loopback_tx_pkt[i] = (char)i;
628 val = smsc911x_reg_read(pdata, HW_CFG);
629 val &= HW_CFG_TX_FIF_SZ_;
631 smsc911x_reg_write(pdata, HW_CFG, val);
633 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
634 smsc911x_reg_write(pdata, RX_CFG,
635 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
637 for (i = 0; i < 10; i++) {
638 /* Set PHY to 10/FD, no ANEG, and loopback mode */
639 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
640 BMCR_LOOPBACK | BMCR_FULLDPLX);
642 /* Enable MAC tx/rx, FD */
643 spin_lock_irqsave(&pdata->mac_lock, flags);
644 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
645 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
646 spin_unlock_irqrestore(&pdata->mac_lock, flags);
648 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
655 spin_lock_irqsave(&pdata->mac_lock, flags);
656 smsc911x_mac_write(pdata, MAC_CR, 0);
657 spin_unlock_irqrestore(&pdata->mac_lock, flags);
659 smsc911x_phy_reset(pdata);
663 spin_lock_irqsave(&pdata->mac_lock, flags);
664 smsc911x_mac_write(pdata, MAC_CR, 0);
665 spin_unlock_irqrestore(&pdata->mac_lock, flags);
667 /* Cancel PHY loopback mode */
668 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
670 smsc911x_reg_write(pdata, TX_CFG, 0);
671 smsc911x_reg_write(pdata, RX_CFG, 0);
675 #endif /* USE_PHY_WORK_AROUND */
677 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
679 struct phy_device *phy_dev = pdata->phy_dev;
680 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
684 if (phy_dev->duplex == DUPLEX_FULL) {
685 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
686 u16 rmtadv = phy_read(phy_dev, MII_LPA);
687 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
689 if (cap & FLOW_CTRL_RX)
694 if (cap & FLOW_CTRL_TX)
699 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
700 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
701 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
703 SMSC_TRACE(pdata, hw, "half duplex");
708 spin_lock_irqsave(&pdata->mac_lock, flags);
709 smsc911x_mac_write(pdata, FLOW, flow);
710 spin_unlock_irqrestore(&pdata->mac_lock, flags);
712 smsc911x_reg_write(pdata, AFC_CFG, afc);
715 /* Update link mode if anything has changed. Called periodically when the
716 * PHY is in polling mode, even if nothing has changed. */
717 static void smsc911x_phy_adjust_link(struct net_device *dev)
719 struct smsc911x_data *pdata = netdev_priv(dev);
720 struct phy_device *phy_dev = pdata->phy_dev;
724 if (phy_dev->duplex != pdata->last_duplex) {
726 SMSC_TRACE(pdata, hw, "duplex state has changed");
728 spin_lock_irqsave(&pdata->mac_lock, flags);
729 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
730 if (phy_dev->duplex) {
731 SMSC_TRACE(pdata, hw,
732 "configuring for full duplex mode");
733 mac_cr |= MAC_CR_FDPX_;
735 SMSC_TRACE(pdata, hw,
736 "configuring for half duplex mode");
737 mac_cr &= ~MAC_CR_FDPX_;
739 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
740 spin_unlock_irqrestore(&pdata->mac_lock, flags);
742 smsc911x_phy_update_flowcontrol(pdata);
743 pdata->last_duplex = phy_dev->duplex;
746 carrier = netif_carrier_ok(dev);
747 if (carrier != pdata->last_carrier) {
748 SMSC_TRACE(pdata, hw, "carrier state has changed");
750 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
751 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
752 (!pdata->using_extphy)) {
753 /* Restore original GPIO configuration */
754 pdata->gpio_setting = pdata->gpio_orig_setting;
755 smsc911x_reg_write(pdata, GPIO_CFG,
756 pdata->gpio_setting);
759 SMSC_TRACE(pdata, hw, "configuring for no carrier");
760 /* Check global setting that LED1
761 * usage is 10/100 indicator */
762 pdata->gpio_setting = smsc911x_reg_read(pdata,
764 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
765 (!pdata->using_extphy)) {
766 /* Force 10/100 LED off, after saving
767 * original GPIO configuration */
768 pdata->gpio_orig_setting = pdata->gpio_setting;
770 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
771 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
774 smsc911x_reg_write(pdata, GPIO_CFG,
775 pdata->gpio_setting);
778 pdata->last_carrier = carrier;
782 static int smsc911x_mii_probe(struct net_device *dev)
784 struct smsc911x_data *pdata = netdev_priv(dev);
785 struct phy_device *phydev = NULL;
788 /* find the first phy */
789 phydev = phy_find_first(pdata->mii_bus);
791 netdev_err(dev, "no PHY found\n");
795 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
796 phydev->addr, phydev->phy_id);
798 ret = phy_connect_direct(dev, phydev,
799 &smsc911x_phy_adjust_link, 0,
800 pdata->config.phy_interface);
803 netdev_err(dev, "Could not attach to PHY\n");
808 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
809 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
811 /* mask with MAC supported features */
812 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
813 SUPPORTED_Asym_Pause);
814 phydev->advertising = phydev->supported;
816 pdata->phy_dev = phydev;
817 pdata->last_duplex = -1;
818 pdata->last_carrier = -1;
820 #ifdef USE_PHY_WORK_AROUND
821 if (smsc911x_phy_loopbacktest(dev) < 0) {
822 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
825 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
826 #endif /* USE_PHY_WORK_AROUND */
828 SMSC_TRACE(pdata, hw, "phy initialised successfully");
832 static int __devinit smsc911x_mii_init(struct platform_device *pdev,
833 struct net_device *dev)
835 struct smsc911x_data *pdata = netdev_priv(dev);
838 pdata->mii_bus = mdiobus_alloc();
839 if (!pdata->mii_bus) {
844 pdata->mii_bus->name = SMSC_MDIONAME;
845 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
846 pdata->mii_bus->priv = pdata;
847 pdata->mii_bus->read = smsc911x_mii_read;
848 pdata->mii_bus->write = smsc911x_mii_write;
849 pdata->mii_bus->irq = pdata->phy_irq;
850 for (i = 0; i < PHY_MAX_ADDR; ++i)
851 pdata->mii_bus->irq[i] = PHY_POLL;
853 pdata->mii_bus->parent = &pdev->dev;
855 switch (pdata->idrev & 0xFFFF0000) {
860 /* External PHY supported, try to autodetect */
861 smsc911x_phy_initialise_external(pdata);
864 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
865 "using internal PHY");
866 pdata->using_extphy = 0;
870 if (!pdata->using_extphy) {
871 /* Mask all PHYs except ID 1 (internal) */
872 pdata->mii_bus->phy_mask = ~(1 << 1);
875 if (mdiobus_register(pdata->mii_bus)) {
876 SMSC_WARN(pdata, probe, "Error registering mii bus");
877 goto err_out_free_bus_2;
880 if (smsc911x_mii_probe(dev) < 0) {
881 SMSC_WARN(pdata, probe, "Error registering mii bus");
882 goto err_out_unregister_bus_3;
887 err_out_unregister_bus_3:
888 mdiobus_unregister(pdata->mii_bus);
890 mdiobus_free(pdata->mii_bus);
895 /* Gets the number of tx statuses in the fifo */
896 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
898 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
899 & TX_FIFO_INF_TSUSED_) >> 16;
902 /* Reads tx statuses and increments counters where necessary */
903 static void smsc911x_tx_update_txcounters(struct net_device *dev)
905 struct smsc911x_data *pdata = netdev_priv(dev);
906 unsigned int tx_stat;
908 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
909 if (unlikely(tx_stat & 0x80000000)) {
910 /* In this driver the packet tag is used as the packet
911 * length. Since a packet length can never reach the
912 * size of 0x8000, this bit is reserved. It is worth
913 * noting that the "reserved bit" in the warning above
914 * does not reference a hardware defined reserved bit
915 * but rather a driver defined one.
917 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
919 if (unlikely(tx_stat & TX_STS_ES_)) {
920 dev->stats.tx_errors++;
922 dev->stats.tx_packets++;
923 dev->stats.tx_bytes += (tx_stat >> 16);
925 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
926 dev->stats.collisions += 16;
927 dev->stats.tx_aborted_errors += 1;
929 dev->stats.collisions +=
930 ((tx_stat >> 3) & 0xF);
932 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
933 dev->stats.tx_carrier_errors += 1;
934 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
935 dev->stats.collisions++;
936 dev->stats.tx_aborted_errors++;
942 /* Increments the Rx error counters */
944 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
948 if (unlikely(rxstat & RX_STS_ES_)) {
949 dev->stats.rx_errors++;
950 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
951 dev->stats.rx_crc_errors++;
955 if (likely(!crc_err)) {
956 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
957 (rxstat & RX_STS_LENGTH_ERR_)))
958 dev->stats.rx_length_errors++;
959 if (rxstat & RX_STS_MCAST_)
960 dev->stats.multicast++;
964 /* Quickly dumps bad packets */
966 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
968 unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2;
970 if (likely(pktwords >= 4)) {
971 unsigned int timeout = 500;
973 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
976 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
977 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
979 if (unlikely(timeout == 0))
980 SMSC_WARN(pdata, hw, "Timed out waiting for "
981 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
985 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
989 /* NAPI poll function */
990 static int smsc911x_poll(struct napi_struct *napi, int budget)
992 struct smsc911x_data *pdata =
993 container_of(napi, struct smsc911x_data, napi);
994 struct net_device *dev = pdata->dev;
997 while (npackets < budget) {
998 unsigned int pktlength;
999 unsigned int pktwords;
1000 struct sk_buff *skb;
1001 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1005 /* We processed all packets available. Tell NAPI it can
1006 * stop polling then re-enable rx interrupts */
1007 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1008 napi_complete(napi);
1009 temp = smsc911x_reg_read(pdata, INT_EN);
1010 temp |= INT_EN_RSFL_EN_;
1011 smsc911x_reg_write(pdata, INT_EN, temp);
1015 /* Count packet for NAPI scheduling, even if it has an error.
1016 * Error packets still require cycles to discard */
1019 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1020 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1021 smsc911x_rx_counterrors(dev, rxstat);
1023 if (unlikely(rxstat & RX_STS_ES_)) {
1024 SMSC_WARN(pdata, rx_err,
1025 "Discarding packet with error bit set");
1026 /* Packet has an error, discard it and continue with
1028 smsc911x_rx_fastforward(pdata, pktwords);
1029 dev->stats.rx_dropped++;
1033 skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN);
1034 if (unlikely(!skb)) {
1035 SMSC_WARN(pdata, rx_err,
1036 "Unable to allocate skb for rx packet");
1037 /* Drop the packet and stop this polling iteration */
1038 smsc911x_rx_fastforward(pdata, pktwords);
1039 dev->stats.rx_dropped++;
1043 skb->data = skb->head;
1044 skb_reset_tail_pointer(skb);
1046 /* Align IP on 16B boundary */
1047 skb_reserve(skb, NET_IP_ALIGN);
1048 skb_put(skb, pktlength - 4);
1049 smsc911x_rx_readfifo(pdata, (unsigned int *)skb->head,
1051 skb->protocol = eth_type_trans(skb, dev);
1052 skb_checksum_none_assert(skb);
1053 netif_receive_skb(skb);
1055 /* Update counters */
1056 dev->stats.rx_packets++;
1057 dev->stats.rx_bytes += (pktlength - 4);
1060 /* Return total received packets */
1064 /* Returns hash bit number for given MAC address
1066 * 01 00 5E 00 00 01 -> returns bit number 31 */
1067 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1069 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1072 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1074 /* Performs the multicast & mac_cr update. This is called when
1075 * safe on the current hardware, and with the mac_lock held */
1076 unsigned int mac_cr;
1078 SMSC_ASSERT_MAC_LOCK(pdata);
1080 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1081 mac_cr |= pdata->set_bits_mask;
1082 mac_cr &= ~(pdata->clear_bits_mask);
1083 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1084 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1085 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1086 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1087 mac_cr, pdata->hashhi, pdata->hashlo);
1090 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1092 unsigned int mac_cr;
1094 /* This function is only called for older LAN911x devices
1095 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1096 * be modified during Rx - newer devices immediately update the
1099 * This is called from interrupt context */
1101 spin_lock(&pdata->mac_lock);
1103 /* Check Rx has stopped */
1104 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1105 SMSC_WARN(pdata, drv, "Rx not stopped");
1107 /* Perform the update - safe to do now Rx has stopped */
1108 smsc911x_rx_multicast_update(pdata);
1111 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1112 mac_cr |= MAC_CR_RXEN_;
1113 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1115 pdata->multicast_update_pending = 0;
1117 spin_unlock(&pdata->mac_lock);
1120 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1122 unsigned int timeout;
1125 /* Reset the LAN911x */
1126 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1130 temp = smsc911x_reg_read(pdata, HW_CFG);
1131 } while ((--timeout) && (temp & HW_CFG_SRST_));
1133 if (unlikely(temp & HW_CFG_SRST_)) {
1134 SMSC_WARN(pdata, drv, "Failed to complete reset");
1140 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1142 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1144 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1145 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1146 (dev_addr[1] << 8) | dev_addr[0];
1148 SMSC_ASSERT_MAC_LOCK(pdata);
1150 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1151 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1154 static int smsc911x_open(struct net_device *dev)
1156 struct smsc911x_data *pdata = netdev_priv(dev);
1157 unsigned int timeout;
1159 unsigned int intcfg;
1161 /* if the phy is not yet registered, retry later*/
1162 if (!pdata->phy_dev) {
1163 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1167 if (!is_valid_ether_addr(dev->dev_addr)) {
1168 SMSC_WARN(pdata, hw, "dev_addr is not a valid MAC address");
1169 return -EADDRNOTAVAIL;
1172 /* Reset the LAN911x */
1173 if (smsc911x_soft_reset(pdata)) {
1174 SMSC_WARN(pdata, hw, "soft reset failed");
1178 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1179 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1181 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1182 spin_lock_irq(&pdata->mac_lock);
1183 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1184 spin_unlock_irq(&pdata->mac_lock);
1186 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1188 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1193 if (unlikely(timeout == 0))
1194 SMSC_WARN(pdata, ifup,
1195 "Timed out waiting for EEPROM busy bit to clear");
1197 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1199 /* The soft reset above cleared the device's MAC address,
1200 * restore it from local copy (set in probe) */
1201 spin_lock_irq(&pdata->mac_lock);
1202 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1203 spin_unlock_irq(&pdata->mac_lock);
1205 /* Initialise irqs, but leave all sources disabled */
1206 smsc911x_reg_write(pdata, INT_EN, 0);
1207 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1209 /* Set interrupt deassertion to 100uS */
1210 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1212 if (pdata->config.irq_polarity) {
1213 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1214 intcfg |= INT_CFG_IRQ_POL_;
1216 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1219 if (pdata->config.irq_type) {
1220 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1221 intcfg |= INT_CFG_IRQ_TYPE_;
1223 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1226 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1228 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1229 pdata->software_irq_signal = 0;
1232 temp = smsc911x_reg_read(pdata, INT_EN);
1233 temp |= INT_EN_SW_INT_EN_;
1234 smsc911x_reg_write(pdata, INT_EN, temp);
1238 if (pdata->software_irq_signal)
1243 if (!pdata->software_irq_signal) {
1244 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1248 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1251 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1252 (unsigned long)pdata->ioaddr, dev->irq);
1254 /* Reset the last known duplex and carrier */
1255 pdata->last_duplex = -1;
1256 pdata->last_carrier = -1;
1258 /* Bring the PHY up */
1259 phy_start(pdata->phy_dev);
1261 temp = smsc911x_reg_read(pdata, HW_CFG);
1262 /* Preserve TX FIFO size and external PHY configuration */
1263 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1265 smsc911x_reg_write(pdata, HW_CFG, temp);
1267 temp = smsc911x_reg_read(pdata, FIFO_INT);
1268 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1269 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1270 smsc911x_reg_write(pdata, FIFO_INT, temp);
1272 /* set RX Data offset to 2 bytes for alignment */
1273 smsc911x_reg_write(pdata, RX_CFG, (2 << 8));
1275 /* enable NAPI polling before enabling RX interrupts */
1276 napi_enable(&pdata->napi);
1278 temp = smsc911x_reg_read(pdata, INT_EN);
1279 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1280 smsc911x_reg_write(pdata, INT_EN, temp);
1282 spin_lock_irq(&pdata->mac_lock);
1283 temp = smsc911x_mac_read(pdata, MAC_CR);
1284 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1285 smsc911x_mac_write(pdata, MAC_CR, temp);
1286 spin_unlock_irq(&pdata->mac_lock);
1288 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1290 netif_start_queue(dev);
1294 /* Entry point for stopping the interface */
1295 static int smsc911x_stop(struct net_device *dev)
1297 struct smsc911x_data *pdata = netdev_priv(dev);
1300 /* Disable all device interrupts */
1301 temp = smsc911x_reg_read(pdata, INT_CFG);
1302 temp &= ~INT_CFG_IRQ_EN_;
1303 smsc911x_reg_write(pdata, INT_CFG, temp);
1305 /* Stop Tx and Rx polling */
1306 netif_stop_queue(dev);
1307 napi_disable(&pdata->napi);
1309 /* At this point all Rx and Tx activity is stopped */
1310 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1311 smsc911x_tx_update_txcounters(dev);
1313 /* Bring the PHY down */
1315 phy_stop(pdata->phy_dev);
1317 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1321 /* Entry point for transmitting a packet */
1322 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1324 struct smsc911x_data *pdata = netdev_priv(dev);
1325 unsigned int freespace;
1326 unsigned int tx_cmd_a;
1327 unsigned int tx_cmd_b;
1332 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1334 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1335 SMSC_WARN(pdata, tx_err,
1336 "Tx data fifo low, space available: %d", freespace);
1338 /* Word alignment adjustment */
1339 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1340 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1341 tx_cmd_a |= (unsigned int)skb->len;
1343 tx_cmd_b = ((unsigned int)skb->len) << 16;
1344 tx_cmd_b |= (unsigned int)skb->len;
1346 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1347 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1349 bufp = (ulong)skb->data & (~0x3);
1350 wrsz = (u32)skb->len + 3;
1351 wrsz += (u32)((ulong)skb->data & 0x3);
1354 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1355 freespace -= (skb->len + 32);
1358 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1359 smsc911x_tx_update_txcounters(dev);
1361 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1362 netif_stop_queue(dev);
1363 temp = smsc911x_reg_read(pdata, FIFO_INT);
1366 smsc911x_reg_write(pdata, FIFO_INT, temp);
1369 return NETDEV_TX_OK;
1372 /* Entry point for getting status counters */
1373 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1375 struct smsc911x_data *pdata = netdev_priv(dev);
1376 smsc911x_tx_update_txcounters(dev);
1377 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1381 /* Entry point for setting addressing modes */
1382 static void smsc911x_set_multicast_list(struct net_device *dev)
1384 struct smsc911x_data *pdata = netdev_priv(dev);
1385 unsigned long flags;
1387 if (dev->flags & IFF_PROMISC) {
1388 /* Enabling promiscuous mode */
1389 pdata->set_bits_mask = MAC_CR_PRMS_;
1390 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1393 } else if (dev->flags & IFF_ALLMULTI) {
1394 /* Enabling all multicast mode */
1395 pdata->set_bits_mask = MAC_CR_MCPAS_;
1396 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1399 } else if (!netdev_mc_empty(dev)) {
1400 /* Enabling specific multicast addresses */
1401 unsigned int hash_high = 0;
1402 unsigned int hash_low = 0;
1403 struct netdev_hw_addr *ha;
1405 pdata->set_bits_mask = MAC_CR_HPFILT_;
1406 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1408 netdev_for_each_mc_addr(ha, dev) {
1409 unsigned int bitnum = smsc911x_hash(ha->addr);
1410 unsigned int mask = 0x01 << (bitnum & 0x1F);
1418 pdata->hashhi = hash_high;
1419 pdata->hashlo = hash_low;
1421 /* Enabling local MAC address only */
1422 pdata->set_bits_mask = 0;
1423 pdata->clear_bits_mask =
1424 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1429 spin_lock_irqsave(&pdata->mac_lock, flags);
1431 if (pdata->generation <= 1) {
1432 /* Older hardware revision - cannot change these flags while
1434 if (!pdata->multicast_update_pending) {
1436 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1437 pdata->multicast_update_pending = 1;
1439 /* Request the hardware to stop, then perform the
1440 * update when we get an RX_STOP interrupt */
1441 temp = smsc911x_mac_read(pdata, MAC_CR);
1442 temp &= ~(MAC_CR_RXEN_);
1443 smsc911x_mac_write(pdata, MAC_CR, temp);
1445 /* There is another update pending, this should now
1446 * use the newer values */
1449 /* Newer hardware revision - can write immediately */
1450 smsc911x_rx_multicast_update(pdata);
1453 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1456 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1458 struct net_device *dev = dev_id;
1459 struct smsc911x_data *pdata = netdev_priv(dev);
1460 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1461 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1462 int serviced = IRQ_NONE;
1465 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1466 temp = smsc911x_reg_read(pdata, INT_EN);
1467 temp &= (~INT_EN_SW_INT_EN_);
1468 smsc911x_reg_write(pdata, INT_EN, temp);
1469 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1470 pdata->software_irq_signal = 1;
1472 serviced = IRQ_HANDLED;
1475 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1476 /* Called when there is a multicast update scheduled and
1477 * it is now safe to complete the update */
1478 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1479 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1480 if (pdata->multicast_update_pending)
1481 smsc911x_rx_multicast_update_workaround(pdata);
1482 serviced = IRQ_HANDLED;
1485 if (intsts & inten & INT_STS_TDFA_) {
1486 temp = smsc911x_reg_read(pdata, FIFO_INT);
1487 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1488 smsc911x_reg_write(pdata, FIFO_INT, temp);
1489 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1490 netif_wake_queue(dev);
1491 serviced = IRQ_HANDLED;
1494 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1495 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1496 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1497 serviced = IRQ_HANDLED;
1500 if (likely(intsts & inten & INT_STS_RSFL_)) {
1501 if (likely(napi_schedule_prep(&pdata->napi))) {
1502 /* Disable Rx interrupts */
1503 temp = smsc911x_reg_read(pdata, INT_EN);
1504 temp &= (~INT_EN_RSFL_EN_);
1505 smsc911x_reg_write(pdata, INT_EN, temp);
1506 /* Schedule a NAPI poll */
1507 __napi_schedule(&pdata->napi);
1509 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1511 serviced = IRQ_HANDLED;
1517 #ifdef CONFIG_NET_POLL_CONTROLLER
1518 static void smsc911x_poll_controller(struct net_device *dev)
1520 disable_irq(dev->irq);
1521 smsc911x_irqhandler(0, dev);
1522 enable_irq(dev->irq);
1524 #endif /* CONFIG_NET_POLL_CONTROLLER */
1526 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1528 struct smsc911x_data *pdata = netdev_priv(dev);
1529 struct sockaddr *addr = p;
1531 /* On older hardware revisions we cannot change the mac address
1532 * registers while receiving data. Newer devices can safely change
1533 * this at any time. */
1534 if (pdata->generation <= 1 && netif_running(dev))
1537 if (!is_valid_ether_addr(addr->sa_data))
1538 return -EADDRNOTAVAIL;
1540 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1542 spin_lock_irq(&pdata->mac_lock);
1543 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1544 spin_unlock_irq(&pdata->mac_lock);
1546 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1551 /* Standard ioctls for mii-tool */
1552 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1554 struct smsc911x_data *pdata = netdev_priv(dev);
1556 if (!netif_running(dev) || !pdata->phy_dev)
1559 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1563 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1565 struct smsc911x_data *pdata = netdev_priv(dev);
1569 return phy_ethtool_gset(pdata->phy_dev, cmd);
1573 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1575 struct smsc911x_data *pdata = netdev_priv(dev);
1577 return phy_ethtool_sset(pdata->phy_dev, cmd);
1580 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1581 struct ethtool_drvinfo *info)
1583 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1584 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1585 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1586 sizeof(info->bus_info));
1589 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1591 struct smsc911x_data *pdata = netdev_priv(dev);
1593 return phy_start_aneg(pdata->phy_dev);
1596 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1598 struct smsc911x_data *pdata = netdev_priv(dev);
1599 return pdata->msg_enable;
1602 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1604 struct smsc911x_data *pdata = netdev_priv(dev);
1605 pdata->msg_enable = level;
1608 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1610 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1615 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1618 struct smsc911x_data *pdata = netdev_priv(dev);
1619 struct phy_device *phy_dev = pdata->phy_dev;
1620 unsigned long flags;
1625 regs->version = pdata->idrev;
1626 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1627 data[j++] = smsc911x_reg_read(pdata, i);
1629 for (i = MAC_CR; i <= WUCSR; i++) {
1630 spin_lock_irqsave(&pdata->mac_lock, flags);
1631 data[j++] = smsc911x_mac_read(pdata, i);
1632 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1635 for (i = 0; i <= 31; i++)
1636 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1639 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1641 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1642 temp &= ~GPIO_CFG_EEPR_EN_;
1643 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1647 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1652 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
1653 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1654 SMSC_WARN(pdata, drv, "Busy at start");
1658 e2cmd = op | E2P_CMD_EPC_BUSY_;
1659 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1663 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1664 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
1667 SMSC_TRACE(pdata, drv, "TIMED OUT");
1671 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1672 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
1679 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1680 u8 address, u8 *data)
1682 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1685 SMSC_TRACE(pdata, drv, "address 0x%x", address);
1686 ret = smsc911x_eeprom_send_cmd(pdata, op);
1689 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1694 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1695 u8 address, u8 data)
1697 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1701 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
1702 ret = smsc911x_eeprom_send_cmd(pdata, op);
1705 op = E2P_CMD_EPC_CMD_WRITE_ | address;
1706 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
1708 /* Workaround for hardware read-after-write restriction */
1709 temp = smsc911x_reg_read(pdata, BYTE_TEST);
1711 ret = smsc911x_eeprom_send_cmd(pdata, op);
1717 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
1719 return SMSC911X_EEPROM_SIZE;
1722 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
1723 struct ethtool_eeprom *eeprom, u8 *data)
1725 struct smsc911x_data *pdata = netdev_priv(dev);
1726 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
1730 smsc911x_eeprom_enable_access(pdata);
1732 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
1733 for (i = 0; i < len; i++) {
1734 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
1741 memcpy(data, &eeprom_data[eeprom->offset], len);
1746 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
1747 struct ethtool_eeprom *eeprom, u8 *data)
1750 struct smsc911x_data *pdata = netdev_priv(dev);
1752 smsc911x_eeprom_enable_access(pdata);
1753 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
1754 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
1755 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
1757 /* Single byte write, according to man page */
1763 static const struct ethtool_ops smsc911x_ethtool_ops = {
1764 .get_settings = smsc911x_ethtool_getsettings,
1765 .set_settings = smsc911x_ethtool_setsettings,
1766 .get_link = ethtool_op_get_link,
1767 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
1768 .nway_reset = smsc911x_ethtool_nwayreset,
1769 .get_msglevel = smsc911x_ethtool_getmsglevel,
1770 .set_msglevel = smsc911x_ethtool_setmsglevel,
1771 .get_regs_len = smsc911x_ethtool_getregslen,
1772 .get_regs = smsc911x_ethtool_getregs,
1773 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
1774 .get_eeprom = smsc911x_ethtool_get_eeprom,
1775 .set_eeprom = smsc911x_ethtool_set_eeprom,
1778 static const struct net_device_ops smsc911x_netdev_ops = {
1779 .ndo_open = smsc911x_open,
1780 .ndo_stop = smsc911x_stop,
1781 .ndo_start_xmit = smsc911x_hard_start_xmit,
1782 .ndo_get_stats = smsc911x_get_stats,
1783 .ndo_set_multicast_list = smsc911x_set_multicast_list,
1784 .ndo_do_ioctl = smsc911x_do_ioctl,
1785 .ndo_change_mtu = eth_change_mtu,
1786 .ndo_validate_addr = eth_validate_addr,
1787 .ndo_set_mac_address = smsc911x_set_mac_address,
1788 #ifdef CONFIG_NET_POLL_CONTROLLER
1789 .ndo_poll_controller = smsc911x_poll_controller,
1793 /* copies the current mac address from hardware to dev->dev_addr */
1794 static void __devinit smsc911x_read_mac_address(struct net_device *dev)
1796 struct smsc911x_data *pdata = netdev_priv(dev);
1797 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
1798 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
1800 dev->dev_addr[0] = (u8)(mac_low32);
1801 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
1802 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
1803 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
1804 dev->dev_addr[4] = (u8)(mac_high16);
1805 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
1808 /* Initializing private device structures, only called from probe */
1809 static int __devinit smsc911x_init(struct net_device *dev)
1811 struct smsc911x_data *pdata = netdev_priv(dev);
1812 unsigned int byte_test;
1814 SMSC_TRACE(pdata, probe, "Driver Parameters:");
1815 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
1816 (unsigned long)pdata->ioaddr);
1817 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
1818 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
1820 spin_lock_init(&pdata->dev_lock);
1821 spin_lock_init(&pdata->mac_lock);
1823 if (pdata->ioaddr == 0) {
1824 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
1828 /* Check byte ordering */
1829 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1830 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
1831 if (byte_test == 0x43218765) {
1832 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
1833 "applying WORD_SWAP");
1834 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
1836 /* 1 dummy read of BYTE_TEST is needed after a write to
1837 * WORD_SWAP before its contents are valid */
1838 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1840 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1843 if (byte_test != 0x87654321) {
1844 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
1845 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
1846 SMSC_WARN(pdata, probe,
1847 "top 16 bits equal to bottom 16 bits");
1848 SMSC_TRACE(pdata, probe,
1849 "This may mean the chip is set "
1850 "for 32 bit while the bus is reading 16 bit");
1855 /* Default generation to zero (all workarounds apply) */
1856 pdata->generation = 0;
1858 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
1859 switch (pdata->idrev & 0xFFFF0000) {
1864 /* LAN911[5678] family */
1865 pdata->generation = pdata->idrev & 0x0000FFFF;
1872 /* LAN921[5678] family */
1873 pdata->generation = 3;
1880 /* LAN9210/LAN9211/LAN9220/LAN9221 */
1881 pdata->generation = 4;
1885 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
1890 SMSC_TRACE(pdata, probe,
1891 "LAN911x identified, idrev: 0x%08X, generation: %d",
1892 pdata->idrev, pdata->generation);
1894 if (pdata->generation == 0)
1895 SMSC_WARN(pdata, probe,
1896 "This driver is not intended for this chip revision");
1898 /* workaround for platforms without an eeprom, where the mac address
1899 * is stored elsewhere and set by the bootloader. This saves the
1900 * mac address before resetting the device */
1901 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
1902 spin_lock_irq(&pdata->mac_lock);
1903 smsc911x_read_mac_address(dev);
1904 spin_unlock_irq(&pdata->mac_lock);
1907 /* Reset the LAN911x */
1908 if (smsc911x_soft_reset(pdata))
1911 /* Disable all interrupt sources until we bring the device up */
1912 smsc911x_reg_write(pdata, INT_EN, 0);
1915 dev->flags |= IFF_MULTICAST;
1916 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
1917 dev->netdev_ops = &smsc911x_netdev_ops;
1918 dev->ethtool_ops = &smsc911x_ethtool_ops;
1923 static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
1925 struct net_device *dev;
1926 struct smsc911x_data *pdata;
1927 struct resource *res;
1929 dev = platform_get_drvdata(pdev);
1931 pdata = netdev_priv(dev);
1933 BUG_ON(!pdata->ioaddr);
1934 BUG_ON(!pdata->phy_dev);
1936 SMSC_TRACE(pdata, ifdown, "Stopping driver");
1938 phy_disconnect(pdata->phy_dev);
1939 pdata->phy_dev = NULL;
1940 mdiobus_unregister(pdata->mii_bus);
1941 mdiobus_free(pdata->mii_bus);
1943 platform_set_drvdata(pdev, NULL);
1944 unregister_netdev(dev);
1945 free_irq(dev->irq, dev);
1946 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1949 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1951 release_mem_region(res->start, resource_size(res));
1953 iounmap(pdata->ioaddr);
1960 static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
1962 struct net_device *dev;
1963 struct smsc911x_data *pdata;
1964 struct smsc911x_platform_config *config = pdev->dev.platform_data;
1965 struct resource *res, *irq_res;
1966 unsigned int intcfg = 0;
1967 int res_size, irq_flags;
1970 pr_info("Driver version %s\n", SMSC_DRV_VERSION);
1972 /* platform data specifies irq & dynamic bus configuration */
1973 if (!pdev->dev.platform_data) {
1974 pr_warn("platform_data not provided\n");
1979 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1982 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1984 pr_warn("Could not allocate resource\n");
1988 res_size = resource_size(res);
1990 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1992 pr_warn("Could not allocate irq resource\n");
1997 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2002 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2004 pr_warn("Could not allocate device\n");
2006 goto out_release_io_1;
2009 SET_NETDEV_DEV(dev, &pdev->dev);
2011 pdata = netdev_priv(dev);
2013 dev->irq = irq_res->start;
2014 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
2015 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2017 /* copy config parameters across to pdata */
2018 memcpy(&pdata->config, config, sizeof(pdata->config));
2021 pdata->msg_enable = ((1 << debug) - 1);
2023 if (pdata->ioaddr == NULL) {
2024 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2026 goto out_free_netdev_2;
2029 retval = smsc911x_init(dev);
2031 goto out_unmap_io_3;
2033 /* configure irq polarity and type before connecting isr */
2034 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2035 intcfg |= INT_CFG_IRQ_POL_;
2037 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2038 intcfg |= INT_CFG_IRQ_TYPE_;
2040 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2042 /* Ensure interrupts are globally disabled before connecting ISR */
2043 smsc911x_reg_write(pdata, INT_EN, 0);
2044 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
2046 retval = request_irq(dev->irq, smsc911x_irqhandler,
2047 irq_flags | IRQF_SHARED, dev->name, dev);
2049 SMSC_WARN(pdata, probe,
2050 "Unable to claim requested irq: %d", dev->irq);
2051 goto out_unmap_io_3;
2054 platform_set_drvdata(pdev, dev);
2056 retval = register_netdev(dev);
2058 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2059 goto out_unset_drvdata_4;
2061 SMSC_TRACE(pdata, probe,
2062 "Network interface: \"%s\"", dev->name);
2065 retval = smsc911x_mii_init(pdev, dev);
2067 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2068 goto out_unregister_netdev_5;
2071 spin_lock_irq(&pdata->mac_lock);
2073 /* Check if mac address has been specified when bringing interface up */
2074 if (is_valid_ether_addr(dev->dev_addr)) {
2075 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2076 SMSC_TRACE(pdata, probe,
2077 "MAC Address is specified by configuration");
2078 } else if (is_valid_ether_addr(pdata->config.mac)) {
2079 memcpy(dev->dev_addr, pdata->config.mac, 6);
2080 SMSC_TRACE(pdata, probe,
2081 "MAC Address specified by platform data");
2083 /* Try reading mac address from device. if EEPROM is present
2084 * it will already have been set */
2087 if (is_valid_ether_addr(dev->dev_addr)) {
2088 /* eeprom values are valid so use them */
2089 SMSC_TRACE(pdata, probe,
2090 "Mac Address is read from LAN911x EEPROM");
2092 /* eeprom values are invalid, generate random MAC */
2093 random_ether_addr(dev->dev_addr);
2094 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2095 SMSC_TRACE(pdata, probe,
2096 "MAC Address is set to random_ether_addr");
2100 spin_unlock_irq(&pdata->mac_lock);
2102 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2106 out_unregister_netdev_5:
2107 unregister_netdev(dev);
2108 out_unset_drvdata_4:
2109 platform_set_drvdata(pdev, NULL);
2110 free_irq(dev->irq, dev);
2112 iounmap(pdata->ioaddr);
2116 release_mem_region(res->start, resource_size(res));
2122 /* This implementation assumes the devices remains powered on its VDDVARIO
2123 * pins during suspend. */
2125 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2127 static int smsc911x_suspend(struct device *dev)
2129 struct net_device *ndev = dev_get_drvdata(dev);
2130 struct smsc911x_data *pdata = netdev_priv(ndev);
2132 /* enable wake on LAN, energy detection and the external PME
2134 smsc911x_reg_write(pdata, PMT_CTRL,
2135 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2136 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2141 static int smsc911x_resume(struct device *dev)
2143 struct net_device *ndev = dev_get_drvdata(dev);
2144 struct smsc911x_data *pdata = netdev_priv(ndev);
2145 unsigned int to = 100;
2147 /* Note 3.11 from the datasheet:
2148 * "When the LAN9220 is in a power saving state, a write of any
2149 * data to the BYTE_TEST register will wake-up the device."
2151 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2153 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2154 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2156 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2159 return (to == 0) ? -EIO : 0;
2162 static const struct dev_pm_ops smsc911x_pm_ops = {
2163 .suspend = smsc911x_suspend,
2164 .resume = smsc911x_resume,
2167 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2170 #define SMSC911X_PM_OPS NULL
2173 static struct platform_driver smsc911x_driver = {
2174 .probe = smsc911x_drv_probe,
2175 .remove = __devexit_p(smsc911x_drv_remove),
2177 .name = SMSC_CHIPNAME,
2178 .owner = THIS_MODULE,
2179 .pm = SMSC911X_PM_OPS,
2183 /* Entry point for loading the module */
2184 static int __init smsc911x_init_module(void)
2187 return platform_driver_register(&smsc911x_driver);
2190 /* entry point for unloading the module */
2191 static void __exit smsc911x_cleanup_module(void)
2193 platform_driver_unregister(&smsc911x_driver);
2196 module_init(smsc911x_init_module);
2197 module_exit(smsc911x_cleanup_module);